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authorNavdeep Parhar <np@FreeBSD.org>2021-06-01 19:14:17 +0000
committerNavdeep Parhar <np@FreeBSD.org>2021-10-20 17:31:35 +0000
commita27e3c20f6e4ce7b396c3f0dd1481313f6f629a7 (patch)
treea8f3fbf93d6108877c67ebd27fcb15c5fe6410b8
parent20cbc6676b87a00813b73676d9bcb390a41ce479 (diff)
cxgbe(4): Check if the firmware supports 512 SGL per FR MR.
Firmwares >= 1.25.6.0 support 512 SGL entries in a single memory registration request. Obtained from: Chelsio Communications Sponsored by: Chelsio Communications (cherry picked from commit db15dbf8801120241b7bfb6461341f2cb421ef8e)
-rw-r--r--sys/dev/cxgbe/common/common.h1
-rw-r--r--sys/dev/cxgbe/t4_main.c8
2 files changed, 9 insertions, 0 deletions
diff --git a/sys/dev/cxgbe/common/common.h b/sys/dev/cxgbe/common/common.h
index 6264a7d6ec07..b803a7106a0c 100644
--- a/sys/dev/cxgbe/common/common.h
+++ b/sys/dev/cxgbe/common/common.h
@@ -405,6 +405,7 @@ struct adapter_params {
bool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */
bool fr_nsmr_tpte_wr_support; /* FW support for FR_NSMR_TPTE_WR */
+ bool dev_512sgl_mr; /* FW support for 512 SGL per FR MR */
bool viid_smt_extn_support; /* FW returns vin, vfvld & smt index? */
unsigned int max_pkts_per_eth_tx_pkts_wr;
};
diff --git a/sys/dev/cxgbe/t4_main.c b/sys/dev/cxgbe/t4_main.c
index 2d33ba0ab95b..a9579ca874ec 100644
--- a/sys/dev/cxgbe/t4_main.c
+++ b/sys/dev/cxgbe/t4_main.c
@@ -5222,6 +5222,14 @@ get_params__post_init(struct adapter *sc)
else
sc->params.fr_nsmr_tpte_wr_support = false;
+ /* Support for 512 SGL entries per FR MR. */
+ param[0] = FW_PARAM_DEV(DEV_512SGL_MR);
+ rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
+ if (rc == 0)
+ sc->params.dev_512sgl_mr = val[0] != 0;
+ else
+ sc->params.dev_512sgl_mr = false;
+
param[0] = FW_PARAM_PFVF(MAX_PKTS_PER_ETH_TX_PKTS_WR);
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
if (rc == 0)