diff options
| author | Guinan Sun <guinanx.sun@intel.com> | 2020-07-06 08:12:19 +0000 |
|---|---|---|
| committer | Kevin Bowling <kbowling@FreeBSD.org> | 2021-09-24 01:39:53 +0000 |
| commit | e68491e21d7d7671dfc3ad1a322560bd46699dbc (patch) | |
| tree | c0e7d1e696f90d0cca7f08456fc31d4646ac9d30 | |
| parent | f0413f8ec9ba50c9f8d4299ecd6c442a5d810c5e (diff) | |
e1000: introduce DPGFR register
Defined DPGFR, Dynamic Power Gate Force Control Register.
Signed-off-by: Vitaly Lifshits <vitaly.lifshits@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
Reviewed-by: Wei Zhao <wei.zhao1@intel.com>
Approved by: imp
Obtained from: DPDK (1469e5aceffbdcebe834292aadb40b1bd1602867)
MFC after: 1 week
(cherry picked from commit 7fb2111413c799414c86d7bfdcc72bc1c6302726)
| -rw-r--r-- | sys/dev/e1000/e1000_regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/dev/e1000/e1000_regs.h b/sys/dev/e1000/e1000_regs.h index 01009d969620..27c456a432e8 100644 --- a/sys/dev/e1000/e1000_regs.h +++ b/sys/dev/e1000/e1000_regs.h @@ -71,6 +71,7 @@ #define E1000_FEXTNVM11 0x5BBC /* Future Extended NVM 11 - RW */ #define E1000_FEXTNVM12 0x5BC0 /* Future Extended NVM 12 - RW */ #define E1000_PCIEANACFG 0x00F18 /* PCIE Analog Config */ +#define E1000_DPGFR 0x00FAC /* Dynamic Power Gate Force Control Register */ #define E1000_FCT 0x00030 /* Flow Control Type - RW */ #define E1000_CONNSW 0x00034 /* Copper/Fiber switch control - RW */ #define E1000_VET 0x00038 /* VLAN Ether Type - RW */ |