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author | Andrew Turner <andrew@FreeBSD.org> | 2020-01-06 20:57:59 +0000 |
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committer | Andrew Turner <andrew@FreeBSD.org> | 2020-01-06 20:57:59 +0000 |
commit | 1b02a7660234156e9ea19d309631997b9bf373a5 (patch) | |
tree | 1ffe5857237b0ffa73d3845f4837058835e54df3 /Makefile.libcompat | |
parent | 91c4b68fa3416fb3f748cc911da6bf86a2f411a9 (diff) | |
download | src-1b02a7660234156e9ea19d309631997b9bf373a5.tar.gz src-1b02a7660234156e9ea19d309631997b9bf373a5.zip |
Add more Arm arm64 CPU identification values
- Add all the Cortex-A CPU ID register values I can find.
- Add the Neoverse-N1 ID regiser value [1]
- Sort macros by register value.
PR: 243065
Submitted by: Ali Saidi <alisaidi AT amazon.com> [1]
Sponsored by: DARPA, AFRL (other than [1])
Notes
Notes:
svn path=/head/; revision=356426
Diffstat (limited to 'Makefile.libcompat')
0 files changed, 0 insertions, 0 deletions