diff options
| author | Marcin Wojtas <mw@FreeBSD.org> | 2021-04-29 09:39:09 +0000 |
|---|---|---|
| committer | Marcin Wojtas <mw@FreeBSD.org> | 2021-04-30 22:58:26 +0000 |
| commit | e245ee2774b3e1d8b1462866a4084cc3e5a806a8 (patch) | |
| tree | eb0f54f446387d99fee472db6b9ddcb11cf5efb5 /bin/getfacl | |
| parent | 2f32a971b7f936170b4d61318238e6cf89f198b5 (diff) | |
| download | src-e245ee2774b3e1d8b1462866a4084cc3e5a806a8.tar.gz src-e245ee2774b3e1d8b1462866a4084cc3e5a806a8.zip | |
gicv3_its: Flush cache after allocating ITT memory
It has to be zeroed before committing it to device.
We do that by allocating it with M_ZERO, but there was no
memory barrier or cache flush to ensure its sees it zeroed.
This fixes MSIX on LS1028A SoC.
Submitted by: Kornel Duleba <mindal@semihalf.com>
Reviewed by: andrew
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D30033
Diffstat (limited to 'bin/getfacl')
0 files changed, 0 insertions, 0 deletions