e1000: Recover from 82576 memory errorsHEADmain

82576 reports fatal and non-fatal internal memory errors through
ICR.FER and ICR.NFER and identifies the affected memory in its
native PEIND layout.  Fatal errors can stop transmit, receive, or
both until software resets and reinitializes the port.

Enable the controller-wide parity detector and implemented PEINDM
reaction bits after hardware initialization, while preserving unrelated
register state and omitting the absent IPsec memories on 82576NS.
Enable both interrupt causes and capture the read-clear PEIND register
in the interrupt filter.

Keep the causes masked while the iflib admin task owns the event.
Acknowledge non-fatal packet data errors without disrupting the port.
Request normal port reinitialization for FER, a fatal PEIND source, or
the memory hang indication.  Do not apply the later I210/I350 register
layout or their special PCIe parity reset order.

Hardware validation used a dual-port 82576EB revision 1.  Firmware
left PEINDM at its 0x80000000 default; initialization explicitly
programmed the parity-enable bit and produced 0xffffff07 on both ports.
An NFER during two-stream TCP sustained line rate without a reset,
watchdog, or carrier event.  FER on the linked and disconnected ports
each requested exactly one reset.  The linked port resumed the existing
TCP sessions after autonegotiation.  PEINDM and both interrupt causes
were restored after every reset.

The injections set the ICR causes without corrupting SRAM, so their
empty PEIND values deliberately exercised the unknown source path.

MFC after:	2 weeks
Sponsored by:	BBOX.io

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