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| author | Dimitry Andric <dim@FreeBSD.org> | 2022-02-05 20:07:43 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2022-06-04 11:59:26 +0000 |
| commit | 67eec5325a1ab99d493fd7e0381d20aab19b286e (patch) | |
| tree | b14fe1fa6cc55067c1deecc4adc75920d3630d12 /contrib/llvm-project/llvm/lib/CodeGen/PostRASchedulerList.cpp | |
| parent | 390adc38fc112be360bd15499e5241bf4e675b6f (diff) | |
| download | src-67eec5325a1ab99d493fd7e0381d20aab19b286e.tar.gz src-67eec5325a1ab99d493fd7e0381d20aab19b286e.zip | |
Merge llvm-project main llvmorg-14-init-18294-gdb01b123d012
This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and
openmp to llvmorg-14-init-18294-gdb01b123d012, the last commit before
the upstream release/14.x branch was created.
PR: 261742
MFC after: 2 weeks
(cherry picked from commit 1fd87a682ad7442327078e1eeb63edc4258f9815)
Diffstat (limited to 'contrib/llvm-project/llvm/lib/CodeGen/PostRASchedulerList.cpp')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/CodeGen/PostRASchedulerList.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/contrib/llvm-project/llvm/lib/CodeGen/PostRASchedulerList.cpp b/contrib/llvm-project/llvm/lib/CodeGen/PostRASchedulerList.cpp index d7cd0a583cee..aac46cb22084 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/PostRASchedulerList.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/PostRASchedulerList.cpp @@ -139,7 +139,7 @@ namespace { /// /// This is the instruction number from the top of the current block, not /// the SlotIndex. It is only used by the AntiDepBreaker. - unsigned EndIndex; + unsigned EndIndex = 0; public: SchedulePostRATDList( @@ -206,7 +206,7 @@ SchedulePostRATDList::SchedulePostRATDList( const RegisterClassInfo &RCI, TargetSubtargetInfo::AntiDepBreakMode AntiDepMode, SmallVectorImpl<const TargetRegisterClass *> &CriticalPathRCs) - : ScheduleDAGInstrs(MF, &MLI), AA(AA), EndIndex(0) { + : ScheduleDAGInstrs(MF, &MLI), AA(AA) { const InstrItineraryData *InstrItins = MF.getSubtarget().getInstrItineraryData(); |