diff options
author | Mark Johnston <markj@FreeBSD.org> | 2020-10-23 14:16:52 +0000 |
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committer | Mark Johnston <markj@FreeBSD.org> | 2020-10-23 14:16:52 +0000 |
commit | 6660ef6e913c1da63438fb65f863aee4e55ca994 (patch) | |
tree | a7df554b50f16b4c3e3818446f59c4f8639fd698 /share | |
parent | 97441fab87c9c816963ac3f220185f6526e194ed (diff) | |
download | src-6660ef6e913c1da63438fb65f863aee4e55ca994.tar.gz src-6660ef6e913c1da63438fb65f863aee4e55ca994.zip |
ntb: Add Intel Xeon Gen3 support
The NTB hardware starting with Skylake has some changes to the register
map and the doorbell interface. Add a new NTB_XEON_GEN3 device type and
use it to conditionalize driver logic that differs from the existing
Xeon code.
Reviewed by: vangyzen
Discussed with: cem, Bret Ketchum <Bret.Ketchum@dell.com>
MFC after: 1 month
Sponsored by: NetApp, Inc.
Sponsored by: Klara, Inc.
Differential Revision: https://reviews.freebsd.org/D26683
Notes
Notes:
svn path=/head/; revision=366969
Diffstat (limited to 'share')
-rw-r--r-- | share/man/man4/ntb_hw_intel.4 | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/share/man/man4/ntb_hw_intel.4 b/share/man/man4/ntb_hw_intel.4 index 423dc9650785..67dc0b838185 100644 --- a/share/man/man4/ntb_hw_intel.4 +++ b/share/man/man4/ntb_hw_intel.4 @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd August 30, 2017 +.Dd October 11, 2020 .Dt NTB_HW_INTEL 4 .Os .Sh NAME @@ -50,16 +50,18 @@ The driver provides support for the Non-Transparent Bridge (NTB) hardware in Intel Xeon E3/E5 and S1200 processor families, which allow one of their PCIe ports to be switched from transparent to non-transparent bridge mode. -In this mode bridge looks not as a PCI bridge, but as PCI endpoint device. +In this mode the bridge looks not like a PCI bridge, but like a PCI endpoint +device. The driver hides hardware details, exposing memory windows, scratchpads -and doorbells of the other side via hardware independent KPI to +and doorbells of the other side via a hardware independent KPI to the .Xr ntb 4 subsystem. .Pp The hardware provides 2 or 3 memory windows to the other system's memory, -16 scratchpad registers and 14 or 34 doorbells to interrupt the other system. -On Xeon processors one of memory windows is typically consumed by the driver -itself to workaround multiple hardware erratas. +16 scratchpad registers and 14, 31 or 34 doorbells to interrupt the other +system, depending on the platform. +On Xeon processors one of the memory windows is typically consumed by the driver +itself to work around multiple hardware errata. .Sh CONFIGURATION The NTB configuration should be set by BIOS. It includes enabling NTB, choosing between NTB-to-NTB (back-to-back) or @@ -67,9 +69,10 @@ NTB-to-Root Port mode, enabling split BAR mode (one of two 64-bit BARs can be split into two 32-bit ones) and configuring BAR sizes in bits (from 12 to 29/39) for both NTB sides. .Pp -The recommended configuration is NTB-to-NTB mode, split bar is enabled and -all BAR sizes are set to 20 (1 MiB). +The recommended configuration is NTB-to-NTB mode, split bar enabled and +all BAR sizes set to 20 (1 MiB). This needs to be done on both systems. +Note, on Xeon SkyLake and newer platforms, split bar mode is not available. .Sh SEE ALSO .Xr if_ntb 4 , .Xr ntb_transport 4 , |