igc: Report corrected internal ECC errorsHEADmain

I225 and I226 do not interrupt for corrected internal ECC errors.
Instead, the DMA packet buffer and PCIe memories expose sticky status
bits in PBECCSTS and PCIEECCSTS.

Sample these bits with the regular hardware statistics update, preserve
the PBECCSTS ECC enable state while clearing its RW1C indication, and
expose separate counters for the DMA packet buffer, PCIe transmit-data
memory, and PCIe retry buffer.

These counters represent observed indications rather than an exact error
count because multiple corrections between samples collapse into one
sticky status bit.

Hardware validation used an I225-IT (rev 3) and a debug kernel that
wrote only the documented self-clearing injection bits.  Each test
armed the injector, exercised the owning RAM with traffic, and compared
the corresponding counter before and after.

Coverage:
    Memory                Observed result
    DMA packet buffer     corrected_dma advanced once
    PCIe transmit data    corrected_pcie_tx_data advanced once
    PCIe retry buffer     No PCIe replay source; not exercised

The retry-buffer injector requires a real PCIe replay to read the
corrupted entry.  The test root port exposed AER and DPC reporting but
no protocol error injector, so ordinary traffic could not cover that
case.

MFC after:	2 weeks
Sponsored by:	BBOX.io

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