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author | Warner Losh <imp@FreeBSD.org> | 2017-11-21 19:23:20 +0000 |
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committer | Warner Losh <imp@FreeBSD.org> | 2017-11-21 19:23:20 +0000 |
commit | 063e16324b35868584b976167392d267c1b6238a (patch) | |
tree | c8bebddb921671356525cab8b1dc201f2b951afb /stand/Makefile.inc | |
parent | 573a3ef083d5646f9b896e07d24c70404a1bee8e (diff) | |
download | src-063e16324b35868584b976167392d267c1b6238a.tar.gz src-063e16324b35868584b976167392d267c1b6238a.zip |
Unbreak riscv build in universe.
riscv doesn't have -msoft-float. For the moment, just don't add
anything. There's no /boot/loader or other bootstrap contained in the
tree for riscv*. However, with real hardware coming next year, there
are plans for one, so keep building at least a minimal libsa and
ficl to prevent bitrot.
Sponsored by: Netflix
Notes
Notes:
svn path=/head/; revision=326072
Diffstat (limited to 'stand/Makefile.inc')
-rw-r--r-- | stand/Makefile.inc | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/stand/Makefile.inc b/stand/Makefile.inc index b0b11ca7fbcc..610acfaa2bc2 100644 --- a/stand/Makefile.inc +++ b/stand/Makefile.inc @@ -10,10 +10,12 @@ CFLAGS+=-I${SASRC} SSP_CFLAGS= # Add in the no float / no SIMD stuff and announce we're freestanding +# aarch64 and riscv don't have -msoft-float, but all others do. riscv +# currently has no /boot/loader, but may soon. CFLAGS+= -ffreestanding ${CFLAGS_NO_SIMD} .if ${MACHINE_CPUARCH} == "aarch64" CFLAGS+= -mgeneral-regs-only -.else +.elif ${MACHINE_CPUARCH} != "riscv" CFLAGS+= -msoft-float .endif |