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authorAndriy Gapon <avg@FreeBSD.org>2009-09-24 07:11:23 +0000
committerAndriy Gapon <avg@FreeBSD.org>2009-09-24 07:11:23 +0000
commit1e908511f8cb3929cf42676ffcc1af0e84ded7fd (patch)
tree74e4fa7e170e28930cb74fb5fb991eab8429fe07 /sys/amd64/pci
parent87f4470620d060eec659ce296b55cb93957657f2 (diff)
downloadsrc-1e908511f8cb3929cf42676ffcc1af0e84ded7fd.tar.gz
src-1e908511f8cb3929cf42676ffcc1af0e84ded7fd.zip
number of cleanups in i386 and amd64 pci md code
o introduce PCIE_REGMAX and use it instead of ad-hoc constant o where 'reg' parameter/variable is not already unsigned, cast it to unsigned before comparison with maximum value to cut off negative values o use PCI_SLOTMAX in several places where 31 or 32 were explicitly used o drop redundant check of 'bytes' in i386 pciereg_cfgread() - valid values are already checked in the subsequent switch Reviewed by: jhb MFC after: 1 week
Notes
Notes: svn path=/head/; revision=197450
Diffstat (limited to 'sys/amd64/pci')
-rw-r--r--sys/amd64/pci/pci_cfgreg.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/sys/amd64/pci/pci_cfgreg.c b/sys/amd64/pci/pci_cfgreg.c
index be9e40488ee0..3e29a585be33 100644
--- a/sys/amd64/pci/pci_cfgreg.c
+++ b/sys/amd64/pci/pci_cfgreg.c
@@ -181,9 +181,9 @@ pci_cfgenable(unsigned bus, unsigned slot, unsigned func, int reg, int bytes)
{
int dataport = 0;
- if (bus <= PCI_BUSMAX && slot < 32 && func <= PCI_FUNCMAX &&
- reg <= PCI_REGMAX && bytes != 3 && (unsigned) bytes <= 4 &&
- (reg & (bytes - 1)) == 0) {
+ if (bus <= PCI_BUSMAX && slot <= PCI_SLOTMAX && func <= PCI_FUNCMAX &&
+ (unsigned)reg <= PCI_REGMAX && bytes != 3 &&
+ (unsigned)bytes <= 4 && (reg & (bytes - 1)) == 0) {
outl(CONF1_ADDR_PORT, (1 << 31) | (bus << 16) | (slot << 11)
| (func << 8) | (reg & ~0x03));
dataport = CONF1_DATA_PORT + (reg & 0x03);
@@ -281,7 +281,7 @@ pcie_cfgregopen(uint64_t base, uint8_t minbus, uint8_t maxbus)
* fall back to using type 1 config access instead.
*/
if (pci_cfgregopen() != 0) {
- for (slot = 0; slot < 32; slot++) {
+ for (slot = 0; slot <= PCI_SLOTMAX; slot++) {
val1 = pcireg_cfgread(0, slot, 0, 0, 4);
if (val1 == 0xffffffff)
continue;
@@ -309,8 +309,8 @@ pciereg_cfgread(int bus, unsigned slot, unsigned func, unsigned reg,
volatile vm_offset_t va;
int data = -1;
- if (bus < pcie_minbus || bus > pcie_maxbus || slot >= 32 ||
- func > PCI_FUNCMAX || reg >= 0x1000)
+ if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX ||
+ func > PCI_FUNCMAX || reg > PCIE_REGMAX)
return (-1);
va = PCIE_VADDR(pcie_base, reg, bus, slot, func);
@@ -336,8 +336,8 @@ pciereg_cfgwrite(int bus, unsigned slot, unsigned func, unsigned reg, int data,
{
volatile vm_offset_t va;
- if (bus < pcie_minbus || bus > pcie_maxbus || slot >= 32 ||
- func > PCI_FUNCMAX || reg >= 0x1000)
+ if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX ||
+ func > PCI_FUNCMAX || reg > PCIE_REGMAX)
return;
va = PCIE_VADDR(pcie_base, reg, bus, slot, func);