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authorMichal Meloun <mmel@FreeBSD.org>2017-06-13 12:07:18 +0000
committerMichal Meloun <mmel@FreeBSD.org>2017-06-13 12:07:18 +0000
commit7bf5720a3f84bf181bb5d3af8362a066d3087d36 (patch)
treec387d7d2a449711771c58888e3a0d2ddd67585ae /sys/arm/arm/cpuinfo.c
parentb83aa367a51b9449e175912b7eb604f5299e7971 (diff)
downloadsrc-7bf5720a3f84bf181bb5d3af8362a066d3087d36.tar.gz
src-7bf5720a3f84bf181bb5d3af8362a066d3087d36.zip
Implement tunable CPU quirks.
These quirks are intended for optimizing CPU performance, not for applying errata workarounds. Nobody can expect that CPU with unfixed errata is stable enough to execute the kernel until quirks are applied. MFC after: 3 weeks
Notes
Notes: svn path=/head/; revision=319896
Diffstat (limited to 'sys/arm/arm/cpuinfo.c')
-rw-r--r--sys/arm/arm/cpuinfo.c48
1 files changed, 47 insertions, 1 deletions
diff --git a/sys/arm/arm/cpuinfo.c b/sys/arm/arm/cpuinfo.c
index 3cb013cb2faf..4b4b67ed7d89 100644
--- a/sys/arm/arm/cpuinfo.c
+++ b/sys/arm/arm/cpuinfo.c
@@ -30,10 +30,15 @@ __FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
+#include <sys/sysctl.h>
#include <machine/cpu.h>
#include <machine/cpuinfo.h>
+#if __ARM_ARCH >= 6
+void reinit_mmu(uint32_t ttb, uint32_t aux_clr, uint32_t aux_set);
+#endif
+
struct cpuinfo cpuinfo =
{
/* Use safe defaults for start */
@@ -43,6 +48,30 @@ struct cpuinfo cpuinfo =
.icache_line_mask = 31,
};
+static SYSCTL_NODE(_hw, OID_AUTO, cpu, CTLFLAG_RD, 0,
+ "CPU");
+static SYSCTL_NODE(_hw_cpu, OID_AUTO, quirks, CTLFLAG_RD, 0,
+ "CPU quirks");
+
+/*
+ * Tunable CPU quirks.
+ * Be careful, ACTRL cannot be changed if CPU is started in secure
+ * mode(world) and write to ACTRL can cause exception!
+ * These quirks are intended for optimizing CPU performance, not for
+ * applying errata workarounds. Nobody can expect that CPU with unfixed
+ * errata is stable enough to execute the kernel until quirks are applied.
+ */
+static uint32_t cpu_quirks_actlr_mask;
+SYSCTL_INT(_hw_cpu_quirks, OID_AUTO, actlr_mask,
+ CTLFLAG_RDTUN | CTLFLAG_NOFETCH, &cpu_quirks_actlr_mask, 0,
+ "Bits to be masked in ACTLR");
+
+static uint32_t cpu_quirks_actlr_set;
+SYSCTL_INT(_hw_cpu_quirks, OID_AUTO, actlr_set,
+ CTLFLAG_RDTUN | CTLFLAG_NOFETCH, &cpu_quirks_actlr_set, 0,
+ "Bits to be set in ACTLR");
+
+
/* Read and parse CPU id scheme */
void
cpuinfo_init(void)
@@ -155,15 +184,17 @@ cpuinfo_init(void)
#endif
}
+#if __ARM_ARCH >= 6
/*
* Get bits that must be set or cleared in ACLR register.
* Note: Bits in ACLR register are IMPLEMENTATION DEFINED.
* Its expected that SCU is in operational state before this
* function is called.
*/
-void
+static void
cpuinfo_get_actlr_modifier(uint32_t *actlr_mask, uint32_t *actlr_set)
{
+
*actlr_mask = 0;
*actlr_set = 0;
@@ -238,3 +269,18 @@ cpuinfo_get_actlr_modifier(uint32_t *actlr_mask, uint32_t *actlr_set)
return;
}
}
+
+/* Reinitialize MMU to final kernel mapping and apply all CPU quirks. */
+void
+cpuinfo_reinit_mmu(uint32_t ttb)
+{
+ uint32_t actlr_mask;
+ uint32_t actlr_set;
+
+ cpuinfo_get_actlr_modifier(&actlr_mask, &actlr_set);
+ actlr_mask |= cpu_quirks_actlr_mask;
+ actlr_set |= cpu_quirks_actlr_set;
+ reinit_mmu(ttb, actlr_mask, actlr_set);
+}
+
+#endif /* __ARM_ARCH >= 6 */