ARM: Use new ARMv6 naming conventions for cache and TLB functions

in all but ARMv4 specific files.
Expand ARMv6 compatibility stubs in cpu-v4.h. Use physical address
in L2 cache functions if ARM_L2_PIPT is defined.

1 files changed, 5 insertions, 5 deletions

diff --git a/sys/arm/arm/db_interface.c b/sys/arm/arm/db_interface.c
index 613dc08149cc..bc49dc6e49c0 100644
--- a/sys/arm/arm/db_interface.c
+++ b/sys/arm/arm/db_interface.c
@@ -39,6 +39,7 @@ __FBSDID("$FreeBSD$");
 #include "opt_ddb.h"
 
 #include <sys/param.h>
+#include <sys/cons.h>
 #include <sys/proc.h>
 #include <sys/reboot.h>
 #include <sys/systm.h>	/* just for boothowto */
@@ -53,9 +54,9 @@ __FBSDID("$FreeBSD$");
 #include <vm/vm_extern.h>
 
 #include <machine/db_machdep.h>
+#include <machine/cpu.h>
 #include <machine/machdep.h>
 #include <machine/vmparam.h>
-#include <machine/cpu.h>
 
 #include <ddb/ddb.h>
 #include <ddb/db_access.h>
@@ -63,7 +64,7 @@ __FBSDID("$FreeBSD$");
 #include <ddb/db_output.h>
 #include <ddb/db_variables.h>
 #include <ddb/db_sym.h>
-#include <sys/cons.h>
+
 
 static int nil = 0;
 
@@ -245,11 +246,10 @@ db_write_bytes(vm_offset_t addr, size_t size, char *data)
 	}
 
 	/* make sure the caches and memory are in sync */
-	cpu_icache_sync_range(addr, size);
+	icache_sync(addr, size);
 
 	/* In case the current page tables have been modified ... */
-	cpu_tlb_flushID();
-	cpu_cpwait();
+	tlb_flush_all();
 	return (0);
 }