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authorSam Leffler <sam@FreeBSD.org>2008-12-13 01:21:37 +0000
committerSam Leffler <sam@FreeBSD.org>2008-12-13 01:21:37 +0000
commitd212022417b9a6ed5dd341c8440c4d5180d0a4a7 (patch)
tree644eaeb5764c12410edfb611ec530ca2d197a365 /sys/arm/include/armreg.h
parent366eaf1e2da426c46105c76307c74631f756d6a9 (diff)
downloadsrc-d212022417b9a6ed5dd341c8440c4d5180d0a4a7.tar.gz
src-d212022417b9a6ed5dd341c8440c4d5180d0a4a7.zip
Merge WIP from p4:
o recognize ixp435 cpu o change memory layout for for ixp4xx to not assume memory is aliases to 0x10000000 (Cambria/ixp435 memory starts at zero) o handle 64 irqs for ixp435 o dual EHCI USB 2.0 controller integral to ixp435 o overhaul NPE code for ixp435 and better MAC+MII naming o updated NPE firmware (including NPE-A image for ixp435/ixp465) o Gateworks Cambria board support: - IDE compact flash - MCU - front panel LED on i2c bus - Octal LED latch Sanity-tested with NFS-root on Avila and Cambria boards. Requires pending boot2 mods for CF-boot on Cambria.
Notes
Notes: svn path=/projects/cambria/; revision=186011
Diffstat (limited to 'sys/arm/include/armreg.h')
-rw-r--r--sys/arm/include/armreg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/arm/include/armreg.h b/sys/arm/include/armreg.h
index 6ba8cf437008..068073bd5a68 100644
--- a/sys/arm/include/armreg.h
+++ b/sys/arm/include/armreg.h
@@ -174,6 +174,7 @@
#define CPU_ID_IXP425_533 0x690541c0
#define CPU_ID_IXP425_400 0x690541d0
#define CPU_ID_IXP425_266 0x690541f0
+#define CPU_ID_IXP435 0x69054040
/* ARM3-specific coprocessor 15 registers */
#define ARM3_CP15_FLUSH 1