diff options
author | Olivier Houchard <cognet@FreeBSD.org> | 2006-11-07 22:36:57 +0000 |
---|---|---|
committer | Olivier Houchard <cognet@FreeBSD.org> | 2006-11-07 22:36:57 +0000 |
commit | 676b1fbdbfbdf8d82d53a8e8e4b30d2c2c0419eb (patch) | |
tree | 29b5027906b642b41278fa0984c646b646ee2258 /sys/arm/include/cpufunc.h | |
parent | 08b91759f3a67d64496d0f43493384930beffb01 (diff) | |
download | src-676b1fbdbfbdf8d82d53a8e8e4b30d2c2c0419eb.tar.gz src-676b1fbdbfbdf8d82d53a8e8e4b30d2c2c0419eb.zip |
Identify the xscale 81342.
Notes
Notes:
svn path=/head/; revision=164080
Diffstat (limited to 'sys/arm/include/cpufunc.h')
-rw-r--r-- | sys/arm/include/cpufunc.h | 26 |
1 files changed, 24 insertions, 2 deletions
diff --git a/sys/arm/include/cpufunc.h b/sys/arm/include/cpufunc.h index 9686aa2f93d3..35387deeecaf 100644 --- a/sys/arm/include/cpufunc.h +++ b/sys/arm/include/cpufunc.h @@ -374,7 +374,7 @@ extern unsigned arm10_dcache_index_inc; defined(CPU_SA1100) || defined(CPU_SA1110) || \ defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ - defined(CPU_XSCALE_80219) + defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) void armv4_tlb_flushID (void); void armv4_tlb_flushI (void); @@ -392,7 +392,7 @@ void ixp12x0_setup (char *string); #if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ - defined(CPU_XSCALE_80219) + defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) void xscale_cpwait (void); void xscale_cpu_sleep (int mode); @@ -433,6 +433,28 @@ void xscale_setup (char *string); #endif /* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 CPU_XSCALE_80219 */ +#ifdef CPU_XSCALE_81342 + +void xscalec3_cache_cleanID (void); +void xscalec3_cache_cleanD (void); + +void xscalec3_cache_purgeID (void); +void xscalec3_cache_purgeID_E (u_int entry); +void xscalec3_cache_purgeD (void); +void xscalec3_cache_purgeD_E (u_int entry); + +void xscalec3_cache_syncI (void); +void xscalec3_cache_cleanID_rng (vm_offset_t start, vm_size_t end); +void xscalec3_cache_cleanD_rng (vm_offset_t start, vm_size_t end); +void xscalec3_cache_purgeID_rng (vm_offset_t start, vm_size_t end); +void xscalec3_cache_purgeD_rng (vm_offset_t start, vm_size_t end); + + +void xscalec3_setttb (u_int ttb); +void xscalec3_context_switch (void); + +#endif /* CPU_XSCALE_81342 */ + #define tlb_flush cpu_tlb_flushID #define setttb cpu_setttb #define drain_writebuf cpu_drain_writebuf |