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| author | Andrew Turner <andrew@FreeBSD.org> | 2021-06-14 12:48:53 +0000 |
|---|---|---|
| committer | Andrew Turner <andrew@FreeBSD.org> | 2021-06-14 14:53:11 +0000 |
| commit | 15fa52a56494d050c4b8e1535d98e2fd416f1944 (patch) | |
| tree | 86fa58cff2fc3e294b184ac3b8f20aa3cc0218c6 /sys/arm | |
| parent | e7f369b1c18ca0377bb0b016b4cab3f0de2a74c5 (diff) | |
| download | src-15fa52a56494d050c4b8e1535d98e2fd416f1944.tar.gz src-15fa52a56494d050c4b8e1535d98e2fd416f1944.zip | |
Add more GIC and GICv3 registers
These aren't used by either driver, however they will be needed by
bhyve on arm64 to emulate a GICv3 interrupt controller.
Sponsored by: Innovate UK
Diffstat (limited to 'sys/arm')
| -rw-r--r-- | sys/arm/arm/gic_common.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/sys/arm/arm/gic_common.h b/sys/arm/arm/gic_common.h index 6643496afc38..4289146b0086 100644 --- a/sys/arm/arm/gic_common.h +++ b/sys/arm/arm/gic_common.h @@ -56,6 +56,7 @@ __BUS_ACCESSOR(gic, bus, GIC, BUS, u_int); /* Common register values */ #define GICD_CTLR 0x0000 /* v1 ICDDCR */ #define GICD_TYPER 0x0004 /* v1 ICDICTR */ +#define GICD_TYPER_ITLINESNUM_MASK 0x1f #define GICD_TYPER_I_NUM(n) ((((n) & 0x1F) + 1) * 32) #define GICD_IIDR 0x0008 /* v1 ICDIIDR */ #define GICD_IIDR_PROD_SHIFT 24 @@ -82,7 +83,8 @@ __BUS_ACCESSOR(gic, bus, GIC, BUS, u_int); #define GICD_ICENABLER(n) (0x0180 + (((n) >> 5) * 4)) /* v1 ICDICER */ #define GICD_ISPENDR(n) (0x0200 + (((n) >> 5) * 4)) /* v1 ICDISPR */ #define GICD_ICPENDR(n) (0x0280 + (((n) >> 5) * 4)) /* v1 ICDICPR */ -#define GICD_ICACTIVER(n) (0x0380 + (((n) >> 5) * 4)) /* v1 ICDABR */ +#define GICD_ISACTIVER(n) (0x0300 + (((n) >> 5) * 4)) /* v1 ICDABR */ +#define GICD_ICACTIVER(n) (0x0380 + (((n) >> 5) * 4)) #define GICD_IPRIORITYR(n) (0x0400 + (((n) >> 2) * 4)) /* v1 ICDIPR */ #define GICD_I_PER_IPRIORITYn 4 #define GICD_ITARGETSR(n) (0x0800 + (((n) >> 2) * 4)) /* v1 ICDIPTR */ |