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| author | Grzegorz Bernacki <gber@FreeBSD.org> | 2012-09-14 09:38:54 +0000 |
|---|---|---|
| committer | Grzegorz Bernacki <gber@FreeBSD.org> | 2012-09-14 09:38:54 +0000 |
| commit | f3d01034bc9d077f82410def7317a0eeb227a798 (patch) | |
| tree | bd2570f3714d607201d6ee9c2388b1cf039ac191 /sys/arm | |
| parent | 2c990564881f2c6fcf6d81b1e41ccf573e0f7e84 (diff) | |
| download | src-f3d01034bc9d077f82410def7317a0eeb227a798.tar.gz src-f3d01034bc9d077f82410def7317a0eeb227a798.zip | |
Support identification of new PJ4B cores.
Obtained from: Semihalf
Notes
Notes:
svn path=/head/; revision=240486
Diffstat (limited to 'sys/arm')
| -rw-r--r-- | sys/arm/arm/cpufunc.c | 5 | ||||
| -rw-r--r-- | sys/arm/arm/identcpu.c | 6 | ||||
| -rw-r--r-- | sys/arm/include/armreg.h | 5 |
3 files changed, 10 insertions, 6 deletions
diff --git a/sys/arm/arm/cpufunc.c b/sys/arm/arm/cpufunc.c index cec9ac05dbe5..d59c141064ab 100644 --- a/sys/arm/arm/cpufunc.c +++ b/sys/arm/arm/cpufunc.c @@ -1415,6 +1415,7 @@ set_cpufuncs() #if defined(CPU_MV_PJ4B) if (cputype == CPU_ID_MV88SV581X_V6 || cputype == CPU_ID_MV88SV581X_V7 || + cputype == CPU_ID_MV88SV584X_V7 || cputype == CPU_ID_ARM_88SV581X_V6 || cputype == CPU_ID_ARM_88SV581X_V7) { if (cpu_pfr(0) & ARM_PFR0_THUMBEE_MASK) @@ -1425,8 +1426,8 @@ set_cpufuncs() get_cachetype_cp15(); pmap_pte_init_mmu_v6(); goto out; - } else if (cputype == CPU_ID_ARM_88SV584X || - cputype == CPU_ID_MV88SV584X) { + } else if (cputype == CPU_ID_ARM_88SV584X_V6 || + cputype == CPU_ID_MV88SV584X_V6) { cpufuncs = pj4bv6_cpufuncs; get_cachetype_cp15(); pmap_pte_init_mmu_v6(); diff --git a/sys/arm/arm/identcpu.c b/sys/arm/arm/identcpu.c index 94e2707bcb7c..e3d5d4ec88cd 100644 --- a/sys/arm/arm/identcpu.c +++ b/sys/arm/arm/identcpu.c @@ -321,9 +321,11 @@ const struct cpuidtab cpuids[] = { generic_steppings }, { CPU_ID_ARM_88SV581X_V7, CPU_CLASS_MARVELL, "Sheeva 88SV581x", generic_steppings }, - { CPU_ID_MV88SV584X, CPU_CLASS_MARVELL, "Sheeva 88SV584x", + { CPU_ID_MV88SV584X_V6, CPU_CLASS_MARVELL, "Sheeva 88SV584x", generic_steppings }, - { CPU_ID_ARM_88SV584X, CPU_CLASS_MARVELL, "Sheeva 88SV584x", + { CPU_ID_ARM_88SV584X_V6, CPU_CLASS_MARVELL, "Sheeva 88SV584x", + generic_steppings }, + { CPU_ID_MV88SV584X_V7, CPU_CLASS_MARVELL, "Sheeva 88SV584x", generic_steppings }, { 0, CPU_CLASS_NONE, NULL, NULL } diff --git a/sys/arm/include/armreg.h b/sys/arm/include/armreg.h index a5638d06f8b4..05b38464f750 100644 --- a/sys/arm/include/armreg.h +++ b/sys/arm/include/armreg.h @@ -170,11 +170,12 @@ #define CPU_ID_MV88SV581X_V6 0x560F5810 /* Marvell Sheeva 88SV581x v6 Core */ #define CPU_ID_MV88SV581X_V7 0x561F5810 /* Marvell Sheeva 88SV581x v7 Core */ -#define CPU_ID_MV88SV584X 0x561F5840 /* Marvell Sheeva 88SV584x v6 Core */ +#define CPU_ID_MV88SV584X_V6 0x561F5840 /* Marvell Sheeva 88SV584x v6 Core */ +#define CPU_ID_MV88SV584X_V7 0x562F5840 /* Marvell Sheeva 88SV584x v7 Core */ /* Marvell's CPUIDs with ARM ID in implementor field */ #define CPU_ID_ARM_88SV581X_V6 0x410fb760 /* Marvell Sheeva 88SV581x v6 Core */ #define CPU_ID_ARM_88SV581X_V7 0x413FC080 /* Marvell Sheeva 88SV581x v7 Core */ -#define CPU_ID_ARM_88SV584X 0x410FB024 /* Marvell Sheeva 88SV584x v6 Core */ +#define CPU_ID_ARM_88SV584X_V6 0x410FB020 /* Marvell Sheeva 88SV584x v6 Core */ #define CPU_ID_FA526 0x66015260 #define CPU_ID_FA626TE 0x66056260 |