[bhnd] Initial bhnd(4) SPROM/NVRAM support.

This adds support for the NVRAM handling and the basic SPROM
hardware used on siba(4) and bcma(4) devices, including:

* SPROM directly attached to the PCI core, accessible via PCI configuration
  space.
* SPROM attached to later ChipCommon cores.
* SPROM variables vended from the parent SoC bus (e.g. via a directly-attached
  flash device).

Additional improvements to the NVRAM/SPROM interface will
be required, but this changeset stands alone as working
checkpoint.

Submitted by:	Landon Fuller <landonf@landonf.org>
Reviewed by:	Michael Zhilin <mizkha@gmail.com> (Broadcom MIPS support)
Differential Revision:	https://reviews.freebsd.org/D6196

1 files changed, 29 insertions, 12 deletions

diff --git a/sys/dev/bhnd/nvram/bhnd_nvram.h b/sys/dev/bhnd/nvram/bhnd_nvram.h
index e2b6b0b5e3a2..2c0c36b74319 100644
--- a/sys/dev/bhnd/nvram/bhnd_nvram.h
+++ b/sys/dev/bhnd/nvram/bhnd_nvram.h
@@ -36,10 +36,6 @@
  * NVRAM data sources supported by bhnd(4) devices.
  */
 typedef enum {
-	BHND_NVRAM_SRC_CIS,	/**< Default CIS source; this may
-				  *  apply, for example, to PCMCIA cards
-				  *  vending Broadcom NVRAM data via
-				  *  their standard CIS table. */
 	
 	BHND_NVRAM_SRC_OTP,	/**< On-chip one-time-programmable
 				  *  memory. */
@@ -51,15 +47,36 @@ typedef enum {
 				  *  NVRAM. */
 	BHND_NVRAM_SRC_SPROM,	/**< External serial EEPROM. */
 	
-	BHND_NVRAM_SRC_NONE	/**< No NVRAM source is directly
-				  *  attached. This is used on devices
-				  *  attached via PCI(e) to BHND SoCs,
-				  *  where to avoid unnecessary flash
-				  *  hardware, NVRAM configuration for
-				  *  individual devices is provided by
-				  *  hardware attached to the SoC
-				  *  itself.
+	BHND_NVRAM_SRC_UNKNOWN	/**< No NVRAM source is directly
+				  *  attached.
+				  *
+				  *  This will be returned by ChipCommon
+				  *  revisions (rev <= 31) used in early
+				  *  chipsets that vend SPROM/OTP via the
+				  *  native host bridge interface.
+				  *
+				  *  For example, PCMCIA cards may vend
+				  *  Broadcom NVRAM data via their standard CIS
+				  *  table, and earlier PCI(e) devices map
+				  *  SPROM statically into PCI BARs, and the
+				  *  control registers into PCI config space.
+				  
+				  *  This will also be returned on later
+				  *  devices that are attached via PCI(e) to
+				  *  BHND SoCs, but do not include an attached
+				  *  SPROM, or programmed OTP. On such SoCs,
+				  *  NVRAM configuration for individual devices
+				  *  is provided by a common platform NVRAM
+				  *  device.
 				  */
 } bhnd_nvram_src_t;
 
+/**
+ * Evaluates to true if the given NVRAM data source is accessible via
+ * ChipCommon.
+ */
+#define	BHND_NVRAM_SRC_CC(_src)	\
+	((_src) == BHND_NVRAM_SRC_OTP || (_src) == BHND_NVRAM_SRC_SPROM)
+
+
 #endif /* _BHND_NVRAM_BHND_NVRAM_H_ */
\ No newline at end of file