aboutsummaryrefslogtreecommitdiff
path: root/sys/dev/coretemp
diff options
context:
space:
mode:
authorAttilio Rao <attilio@FreeBSD.org>2011-08-19 13:31:48 +0000
committerAttilio Rao <attilio@FreeBSD.org>2011-08-19 13:31:48 +0000
commit72dc07eb4492c02c326278ae5aa6a3e81dcfe17c (patch)
tree089e06aab6196231fd848453f1d1fc2782970330 /sys/dev/coretemp
parent6bfcd9c37bc00efb632f648e10bf07bf69c13f2f (diff)
downloadsrc-72dc07eb4492c02c326278ae5aa6a3e81dcfe17c.tar.gz
src-72dc07eb4492c02c326278ae5aa6a3e81dcfe17c.zip
Bump the maximum coretemp limit (for CPU temperature) to 110. Several
cores with temp in the range 101-105 have been found in the past. Sponsored by: Sandvine Incorporated Reviewed by: delphij, emaste Approved by: re (kib) MFC after: 3 days
Notes
Notes: svn path=/head/; revision=225009
Diffstat (limited to 'sys/dev/coretemp')
-rw-r--r--sys/dev/coretemp/coretemp.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/sys/dev/coretemp/coretemp.c b/sys/dev/coretemp/coretemp.c
index 411b9eecf167..92109ad1c4be 100644
--- a/sys/dev/coretemp/coretemp.c
+++ b/sys/dev/coretemp/coretemp.c
@@ -225,12 +225,12 @@ coretemp_attach(device_t dev)
* these numbers are, with the publicly available
* documents from Intel.
*
- * For now, we consider [70, 100]C range, as
+ * For now, we consider [70, 110]C range, as
* described in #322683, as "reasonable" and accept
* these values whenever the MSR is available for
* read, regardless the CPU model.
*/
- if (tjtarget >= 70 && tjtarget <= 100)
+ if (tjtarget >= 70 && tjtarget <= 110)
sc->sc_tjmax = tjtarget;
else
device_printf(dev, "Tj(target) value %d "