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authorPyun YongHyeon <yongari@FreeBSD.org>2012-01-19 20:13:16 +0000
committerPyun YongHyeon <yongari@FreeBSD.org>2012-01-19 20:13:16 +0000
commitbc6b129bcda2125a37840c835672ad73b2052edf (patch)
tree7a5ec1dbd2affd3749c5b09ac3d2ee9ff8087608 /sys/dev/re
parent2a2443d8332be10a2d2b4421eb9c180d875bd95c (diff)
downloadsrc-bc6b129bcda2125a37840c835672ad73b2052edf.tar.gz
src-bc6b129bcda2125a37840c835672ad73b2052edf.zip
Fix a logic error which resulted in putting PHY into sleep when WOL
is active. If WOL is active driver should not put PHY into sleep. This change makes WOL work on RTL8168E.
Notes
Notes: svn path=/head/; revision=230336
Diffstat (limited to 'sys/dev/re')
-rw-r--r--sys/dev/re/if_re.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/dev/re/if_re.c b/sys/dev/re/if_re.c
index df7eda036635..0142308ec0cc 100644
--- a/sys/dev/re/if_re.c
+++ b/sys/dev/re/if_re.c
@@ -3808,7 +3808,7 @@ re_setwol(struct rl_softc *sc)
/* Config register write done. */
CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF);
- if ((ifp->if_capenable & IFCAP_WOL) != 0 &&
+ if ((ifp->if_capenable & IFCAP_WOL) == 0 &&
(sc->rl_flags & RL_FLAG_PHYWAKE_PM) != 0)
CSR_WRITE_1(sc, RL_PMCH, CSR_READ_1(sc, RL_PMCH) & ~0x80);
/*