Add support for the uart classes to set their default register shift value.

This is needed with the pl011 driver. Before this change it would default
to a shift of 0, however the hardware places the registers at 4-byte
addresses meaning the value should be 2.

This patch fixes this for the pl011 when configured using the fdt. The
other drivers have a default value of 0 to keep this a no-op.

MFC after:	1 week

1 files changed, 6 insertions, 0 deletions

diff --git a/sys/dev/uart/uart_core.c b/sys/dev/uart/uart_core.c
index eea2d8ce80a1..bbb06ff5c1f5 100644
--- a/sys/dev/uart/uart_core.c
+++ b/sys/dev/uart/uart_core.c
@@ -88,6 +88,12 @@ uart_getrange(struct uart_class *uc)
 	return ((uc != NULL) ? uc->uc_range : 0);
 }
 
+u_int
+uart_getregshift(struct uart_class *uc)
+{
+	return ((uc != NULL) ? uc->uc_rshift : 0);
+}
+
 /*
  * Schedule a soft interrupt. We do this on the 0 to !0 transition
  * of the TTY pending interrupt status.