ioat: Define DMACAPABILITY bits

Check for BFILL capability before initiating blockfill operations.

Sponsored by:	EMC / Isilon Storage Division

5 files changed, 37 insertions, 2 deletions

diff --git a/sys/dev/ioat/ioat.c b/sys/dev/ioat/ioat.c
index b3939f89b0da..2cc48df754f5 100644
--- a/sys/dev/ioat/ioat.c
+++ b/sys/dev/ioat/ioat.c
@@ -364,14 +364,16 @@ ioat3_attach(device_t device)
 	struct ioat_descriptor **ring;
 	struct ioat_descriptor *next;
 	struct ioat_dma_hw_descriptor *dma_hw_desc;
-	uint32_t capabilities;
 	int i, num_descriptors;
 	int error;
 	uint8_t xfercap;
 
 	error = 0;
 	ioat = DEVICE2SOFTC(device);
-	capabilities = ioat_read_dmacapability(ioat);
+	ioat->capabilities = ioat_read_dmacapability(ioat);
+
+	ioat_log_message(1, "Capabilities: %b\n", (int)ioat->capabilities,
+	    IOAT_DMACAP_STR);
 
 	xfercap = ioat_read_xfercap(ioat);
 	ioat->max_xfer_size = 1 << xfercap;
@@ -760,6 +762,12 @@ ioat_blockfill(bus_dmaengine_t dmaengine, bus_addr_t dst, uint64_t fillpattern,
 	CTR0(KTR_IOAT, __func__);
 	ioat = to_ioat_softc(dmaengine);
 
+	if ((ioat->capabilities & IOAT_DMACAP_BFILL) == 0) {
+		ioat_log_message(0, "%s: Device lacks BFILL capability\n",
+		    __func__);
+		return (NULL);
+	}
+
 	if ((dst & (0xffffull << 48)) != 0) {
 		ioat_log_message(0, "%s: High 16 bits of dst invalid\n",
 		    __func__);
diff --git a/sys/dev/ioat/ioat.h b/sys/dev/ioat/ioat.h
index e99714df275f..d72dcc5232d3 100644
--- a/sys/dev/ioat/ioat.h
+++ b/sys/dev/ioat/ioat.h
@@ -71,6 +71,8 @@ void ioat_release(bus_dmaengine_t dmaengine);
 /*
  * Issue a blockfill operation.  The 64-bit pattern 'fillpattern' is written to
  * 'len' physically contiguous bytes at 'dst'.
+ *
+ * Only supported on devices with the BFILL capability.
  */
 struct bus_dmadesc *ioat_blockfill(bus_dmaengine_t dmaengine, bus_addr_t dst,
     uint64_t fillpattern, bus_size_t len, bus_dmaengine_callback_t callback_fn,
diff --git a/sys/dev/ioat/ioat_hw.h b/sys/dev/ioat/ioat_hw.h
index b3a21cb14dc7..99b8d3e88aba 100644
--- a/sys/dev/ioat/ioat_hw.h
+++ b/sys/dev/ioat/ioat_hw.h
@@ -54,6 +54,21 @@ __FBSDID("$FreeBSD$");
 #define	IOAT_CS_STATUS_OFFSET		0x0E
 
 #define	IOAT_DMACAPABILITY_OFFSET	0x10
+#define	IOAT_DMACAP_PB			(1 << 0)
+#define	IOAT_DMACAP_DCA			(1 << 4)
+#define	IOAT_DMACAP_BFILL		(1 << 6)
+#define	IOAT_DMACAP_XOR			(1 << 8)
+#define	IOAT_DMACAP_PQ			(1 << 9)
+#define	IOAT_DMACAP_DMA_DIF		(1 << 10)
+#define	IOAT_DMACAP_DWBES		(1 << 13)
+#define	IOAT_DMACAP_RAID16SS		(1 << 17)
+#define	IOAT_DMACAP_DMAMC		(1 << 18)
+#define	IOAT_DMACAP_CTOS		(1 << 19)
+
+#define	IOAT_DMACAP_STR \
+    "\20\24Completion_Timeout_Support\23DMA_with_Multicasting_Support" \
+    "\22RAID_Super_descriptors\16Descriptor_Write_Back_Error_Support" \
+    "\13DMA_with_DIF\12PQ\11XOR\07Block_Fill\05DCA\01Page_Break"
 
 /* DMA Channel Registers */
 #define	IOAT_CHANCTRL_OFFSET			0x80
diff --git a/sys/dev/ioat/ioat_internal.h b/sys/dev/ioat/ioat_internal.h
index 2ca1ac65d805..00be4a042ef7 100644
--- a/sys/dev/ioat/ioat_internal.h
+++ b/sys/dev/ioat/ioat_internal.h
@@ -373,6 +373,7 @@ struct ioat_softc {
 	int			pci_resource_id;
 	struct resource		*pci_resource;
 	uint32_t		max_xfer_size;
+	uint32_t		capabilities;
 
 	struct resource		*res;
 	int			rid;
diff --git a/sys/dev/ioat/ioat_test.c b/sys/dev/ioat/ioat_test.c
index 3f88ed98a689..53d5e8a12b94 100644
--- a/sys/dev/ioat/ioat_test.c
+++ b/sys/dev/ioat/ioat_test.c
@@ -319,6 +319,15 @@ ioat_dma_test(void *arg)
 		return;
 	}
 
+	if (test->testkind == IOAT_TEST_FILL &&
+	    (to_ioat_softc(dmaengine)->capabilities & IOAT_DMACAP_BFILL) == 0)
+	{
+		ioat_test_log(0,
+		    "Hardware doesn't support block fill, aborting test\n");
+		test->status[IOAT_TEST_INVALID_INPUT]++;
+		goto out;
+	}
+
 	index = g_thread_index++;
 	TAILQ_INIT(&test->free_q);
 	TAILQ_INIT(&test->pend_q);