Change the preemption code for software interrupt thread schedules and

mutex releases to not require flags for the cases when preemption is
not allowed:

The purpose of the MTX_NOSWITCH and SWI_NOSWITCH flags is to prevent
switching to a higher priority thread on mutex releease and swi schedule,
respectively when that switch is not safe.  Now that the critical section
API maintains a per-thread nesting count, the kernel can easily check
whether or not it should switch without relying on flags from the
programmer.  This fixes a few bugs in that all current callers of
swi_sched() used SWI_NOSWITCH, when in fact, only the ones called from
fast interrupt handlers and the swi_sched of softclock needed this flag.
Note that to ensure that swi_sched()'s in clock and fast interrupt
handlers do not switch, these handlers have to be explicitly wrapped
in critical_enter/exit pairs.  Presently, just wrapping the handlers is
sufficient, but in the future with the fully preemptive kernel, the
interrupt must be EOI'd before critical_exit() is called.  (critical_exit()
can switch due to a deferred preemption in a fully preemptive kernel.)

I've tested the changes to the interrupt code on i386 and alpha.  I have
not tested ia64, but the interrupt code is almost identical to the alpha
code, so I expect it will work fine.  PowerPC and ARM do not yet have
interrupt code in the tree so they shouldn't be broken.  Sparc64 is
broken, but that's been ok'd by jake and tmm who will be fixing the
interrupt code for sparc64 shortly.

Reviewed by:	peter
Tested on:	i386, alpha

1 files changed, 2 insertions, 0 deletions

diff --git a/sys/i386/isa/atpic_vector.s b/sys/i386/isa/atpic_vector.s
index bd38dda0982d..4e10cc248be7 100644
--- a/sys/i386/isa/atpic_vector.s
+++ b/sys/i386/isa/atpic_vector.s
@@ -61,6 +61,7 @@ IDTVEC(vec_name) ; \
 	mov	$KPSEL,%ax ; \
 	mov	%ax,%fs ; \
 	FAKE_MCOUNT((12+ACTUALLY_PUSHED)*4(%esp)) ; \
+	call	critical_enter ; \
 	movl	PCPU(CURTHREAD),%ebx ; \
 	incl	TD_INTR_NESTING_LEVEL(%ebx) ; \
 	pushl	intr_unit + (irq_num) * 4 ; \
@@ -71,6 +72,7 @@ IDTVEC(vec_name) ; \
 	movl	intr_countp + (irq_num) * 4,%eax ; \
 	incl	(%eax) ; \
 	decl	TD_INTR_NESTING_LEVEL(%ebx) ; \
+	call	critical_exit ; \
 	MEXITCOUNT ; \
 	jmp	doreti