aboutsummaryrefslogtreecommitdiff
path: root/sys/i386/pci
diff options
context:
space:
mode:
authorJohn Baldwin <jhb@FreeBSD.org>2003-12-31 16:56:32 +0000
committerJohn Baldwin <jhb@FreeBSD.org>2003-12-31 16:56:32 +0000
commit21e25fa60774b9f318b66eadaafb7d450938b72e (patch)
tree6e9f55b7420eaf55d4749cb1d9cdcbfae4f0afb5 /sys/i386/pci
parentae59481b1a045583da8d0aacd6e58aa9c3916a48 (diff)
downloadsrc-21e25fa60774b9f318b66eadaafb7d450938b72e.tar.gz
src-21e25fa60774b9f318b66eadaafb7d450938b72e.zip
Replace an outb() during the test for configuration mechanism #1 with a
DELAY(1) instead. After wading through old commit logs, I found that the outb() was added not as part of the test but as an intentional delay. In fact, according to Shanley's PCI book, the configuration 1 data and address ports should only be accessed using aligned 32-bit accesses (i.e. inl() and outl()). Thus, using outb() to just the last byte of the port violates the PCI spec it would seem. On at least one box doing so broke the probe for PCI, whereas changing it to a DELAY(1) fixed the probe. Reported by: Sean Welch <welchsm@earthlink.net> MFC after: 1 week
Notes
Notes: svn path=/head/; revision=124021
Diffstat (limited to 'sys/i386/pci')
-rw-r--r--sys/i386/pci/pci_cfgreg.c2
-rw-r--r--sys/i386/pci/pci_pir.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/sys/i386/pci/pci_cfgreg.c b/sys/i386/pci/pci_cfgreg.c
index 91746fe5db9d..0e3b8c3ff15d 100644
--- a/sys/i386/pci/pci_cfgreg.c
+++ b/sys/i386/pci/pci_cfgreg.c
@@ -732,7 +732,7 @@ pcireg_cfgopen(void)
devmax = 32;
outl(CONF1_ADDR_PORT, CONF1_ENABLE_CHK);
- outb(CONF1_ADDR_PORT + 3, 0);
+ DELAY(1);
mode1res = inl(CONF1_ADDR_PORT);
outl(CONF1_ADDR_PORT, oldval1);
diff --git a/sys/i386/pci/pci_pir.c b/sys/i386/pci/pci_pir.c
index 91746fe5db9d..0e3b8c3ff15d 100644
--- a/sys/i386/pci/pci_pir.c
+++ b/sys/i386/pci/pci_pir.c
@@ -732,7 +732,7 @@ pcireg_cfgopen(void)
devmax = 32;
outl(CONF1_ADDR_PORT, CONF1_ENABLE_CHK);
- outb(CONF1_ADDR_PORT + 3, 0);
+ DELAY(1);
mode1res = inl(CONF1_ADDR_PORT);
outl(CONF1_ADDR_PORT, oldval1);