Replace sb_store64()/sb_load64() with mips3_sd()/mips3_ld() respectively.

Obtained from NetBSD.

Suggested by: jmallett@

2 files changed, 9 insertions, 52 deletions

diff --git a/sys/mips/sibyte/sb_asm.S b/sys/mips/sibyte/sb_asm.S
index 4baa5f397870..312d3a585351 100644
--- a/sys/mips/sibyte/sb_asm.S
+++ b/sys/mips/sibyte/sb_asm.S
@@ -28,61 +28,11 @@
 
 #include <machine/asm.h>
 #include <machine/cpuregs.h>
-#include <machine/endian.h>
-
-/*
- * We compile a 32-bit kernel to run on the SB-1 processor which is a 64-bit
- * processor. It has some registers that must be accessed using 64-bit load
- * and store instructions.
- *
- * So we have to resort to assembly because the compiler does not emit the
- * 'ld' and 'sd' instructions since it thinks that it is compiling for a
- * 32-bit mips processor.
- */
 
 .set	mips64
 .set	noat
 .set	noreorder
 
-/*
- * Parameters:		uint32_t ptr
- * Return value: 	*(uint64_t *)ptr
- */
-LEAF(sb_load64)
-	ld      v1, 0(a0)	/* result = *(uint64_t *)ptr */
-	move	v0, v1
-#if _BYTE_ORDER == _BIG_ENDIAN
-	dsll32	v1, v1, 0
-	dsra32	v1, v1, 0	/* v1 = lower_uint32(result) */
-	jr	ra
-	dsra32	v0, v0, 0	/* v0 = upper_uint32(result) */
-#else
-	dsll32	v0, v0, 0
-	dsra32	v0, v0, 0	/* v0 = lower_uint32(result) */
-	jr	ra
-	dsra32	v1, v1, 0	/* v1 = upper_uint32(result) */
-#endif
-END(sb_load64)
-
-/*
- * Parameters:		uint32_t ptr, uint64_t val
- * Return value:	void
- */
-LEAF(sb_store64)
-#if _BYTE_ORDER == _BIG_ENDIAN
-	dsll32	a2, a2, 0	/* a2 = upper_uint32(val) */
-	dsll32	a3, a3, 0	/* a3 = lower_uint32(val) */
-	dsrl32	a3, a3, 0
-#else
-	dsll32	a3, a3, 0	/* a3 = upper_uint32(val) */
-	dsll32	a2, a2, 0	/* a2 = lower_uint32(val) */
-	dsrl32	a2, a2, 0
-#endif
-	or	t0, a2, a3
-	jr	ra
-	sd	t0, 0(a0)
-END(sb_store64)
-
 #ifdef SMP
 /*
  * This function must be implemented in assembly because it is called early
diff --git a/sys/mips/sibyte/sb_scd.c b/sys/mips/sibyte/sb_scd.c
index c8fec6978a98..bfaa8d471f0c 100644
--- a/sys/mips/sibyte/sb_scd.c
+++ b/sys/mips/sibyte/sb_scd.c
@@ -38,8 +38,15 @@ __FBSDID("$FreeBSD$");
 
 #include "sb_scd.h"
 
-extern void	sb_store64(uint32_t addr, uint64_t val);
-extern uint64_t	sb_load64(uint32_t addr);
+/*
+ * We compile a 32-bit kernel to run on the SB-1 processor which is a 64-bit
+ * processor. It has some registers that must be accessed using 64-bit load
+ * and store instructions.
+ *
+ * We use the mips_ld() and mips_sd() functions to do this for us.
+ */
+#define	sb_store64(addr, val)	mips3_sd((uint64_t *)(addr), (val))
+#define	sb_load64(addr)		mips3_ld((uint64_t *)(addr))
 
 /*
  * System Control and Debug (SCD) unit on the Sibyte ZBbus.