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authorJayachandran C. <jchandra@FreeBSD.org>2015-02-28 00:22:10 +0000
committerJayachandran C. <jchandra@FreeBSD.org>2015-02-28 00:22:10 +0000
commitc483877531068b3bf30bdc02a103c1fa2b57a215 (patch)
tree847f5ee4efc10a00eae6562ee116aeca248d87c4 /sys/mips
parent72e64728c94dc9510d85af9da84ae3b8c6f665fc (diff)
downloadsrc-c483877531068b3bf30bdc02a103c1fa2b57a215.tar.gz
src-c483877531068b3bf30bdc02a103c1fa2b57a215.zip
Whitespace fixes for sys/mips/nlm/dev
Clean up whitespace issues under sys/mips/nlm/dev. No functional change in this commit.
Notes
Notes: svn path=/head/; revision=279388
Diffstat (limited to 'sys/mips')
-rw-r--r--sys/mips/nlm/dev/net/mdio.c40
-rw-r--r--sys/mips/nlm/dev/net/nae.c60
-rw-r--r--sys/mips/nlm/dev/net/sgmii.c2
-rw-r--r--sys/mips/nlm/dev/net/ucore/crt0_basic.S4
-rw-r--r--sys/mips/nlm/dev/net/ucore/ld.ucore.S8
-rw-r--r--sys/mips/nlm/dev/net/ucore/ucore.h24
-rw-r--r--sys/mips/nlm/dev/net/ucore/ucore_app.c12
-rw-r--r--sys/mips/nlm/dev/net/xaui.c2
-rw-r--r--sys/mips/nlm/dev/net/xlpge.c64
-rw-r--r--sys/mips/nlm/dev/net/xlpge.h4
-rw-r--r--sys/mips/nlm/dev/sec/nlmrsa.c6
-rw-r--r--sys/mips/nlm/dev/sec/nlmrsalib.h2
-rw-r--r--sys/mips/nlm/dev/sec/nlmsec.c14
-rw-r--r--sys/mips/nlm/dev/sec/nlmseclib.c2
-rw-r--r--sys/mips/nlm/dev/sec/nlmseclib.h6
-rw-r--r--sys/mips/nlm/dev/sec/rsa_ucode.h2
16 files changed, 121 insertions, 131 deletions
diff --git a/sys/mips/nlm/dev/net/mdio.c b/sys/mips/nlm/dev/net/mdio.c
index 08453392e5fb..0db54766168f 100644
--- a/sys/mips/nlm/dev/net/mdio.c
+++ b/sys/mips/nlm/dev/net/mdio.c
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -48,14 +48,14 @@ nlm_int_gmac_mdio_read(uint64_t nae_base, int bus, int block,
uint32_t mdio_ld_cmd;
uint32_t ctrlval;
- ctrlval = INT_MDIO_CTRL_SMP |
+ ctrlval = INT_MDIO_CTRL_SMP |
(phyaddr << INT_MDIO_CTRL_PHYADDR_POS) |
(regidx << INT_MDIO_CTRL_DEVTYPE_POS) |
(2 << INT_MDIO_CTRL_OP_POS) |
(1 << INT_MDIO_CTRL_ST_POS) |
- (7 << INT_MDIO_CTRL_XDIV_POS) |
+ (7 << INT_MDIO_CTRL_XDIV_POS) |
(2 << INT_MDIO_CTRL_TA_POS) |
- (2 << INT_MDIO_CTRL_MIIM_POS) |
+ (2 << INT_MDIO_CTRL_MIIM_POS) |
(1 << INT_MDIO_CTRL_MCDIV_POS);
mdio_ld_cmd = nlm_read_nae_reg(nae_base,
@@ -148,16 +148,16 @@ nlm_int_gmac_mdio_reset(uint64_t nae_base, int bus, int block,
{
uint32_t val;
- val = (7 << INT_MDIO_CTRL_XDIV_POS) |
+ val = (7 << INT_MDIO_CTRL_XDIV_POS) |
(1 << INT_MDIO_CTRL_MCDIV_POS) |
(INT_MDIO_CTRL_SMP);
nlm_write_nae_reg(nae_base,
- NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
+ NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
val | INT_MDIO_CTRL_RST);
nlm_write_nae_reg(nae_base,
- NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
+ NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
val);
return (0);
@@ -185,7 +185,7 @@ nlm_gmac_mdio_read(uint64_t nae_base, int bus, int block,
(EXT_G0_MDIO_CTRL + bus * 4)));
if (mdio_ld_cmd & EXT_G_MDIO_CMD_LCD) {
nlm_write_nae_reg(nae_base,
- NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
+ NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
(mdio_ld_cmd & ~EXT_G_MDIO_CMD_LCD));
while(nlm_read_nae_reg(nae_base,
NAE_REG(block, intf_type,
@@ -197,16 +197,16 @@ nlm_gmac_mdio_read(uint64_t nae_base, int bus, int block,
(phyaddr << EXT_G_MDIO_PHYADDR_POS) |
(regidx << EXT_G_MDIO_REGADDR_POS);
if (nlm_is_xlp8xx_ax() || nlm_is_xlp8xx_b0() || nlm_is_xlp3xx_ax())
- ctrlval |= EXT_G_MDIO_DIV;
+ ctrlval |= EXT_G_MDIO_DIV;
else
ctrlval |= EXT_G_MDIO_DIV_WITH_HW_DIV64;
- nlm_write_nae_reg(nae_base,
- NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
+ nlm_write_nae_reg(nae_base,
+ NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
ctrlval);
nlm_write_nae_reg(nae_base,
- NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
+ NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
ctrlval | (1<<18));
DELAY(1000);
/* poll master busy bit until it is not busy */
@@ -215,7 +215,7 @@ nlm_gmac_mdio_read(uint64_t nae_base, int bus, int block,
EXT_G_MDIO_STAT_MBSY);
nlm_write_nae_reg(nae_base,
- NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
+ NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
ctrlval);
/* Read the data back */
@@ -246,7 +246,7 @@ nlm_gmac_mdio_write(uint64_t nae_base, int bus, int block,
(EXT_G0_MDIO_CTRL + bus * 4)));
if (mdio_ld_cmd & EXT_G_MDIO_CMD_LCD) {
nlm_write_nae_reg(nae_base,
- NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
+ NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
(mdio_ld_cmd & ~EXT_G_MDIO_CMD_LCD));
while(nlm_read_nae_reg(nae_base,
NAE_REG(block, intf_type,
@@ -256,23 +256,23 @@ nlm_gmac_mdio_write(uint64_t nae_base, int bus, int block,
/* load data into ctrl data reg */
nlm_write_nae_reg(nae_base,
- NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL_DATA+bus*4)),
+ NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL_DATA+bus*4)),
val);
ctrlval = EXT_G_MDIO_CMD_SP |
(phyaddr << EXT_G_MDIO_PHYADDR_POS) |
(regidx << EXT_G_MDIO_REGADDR_POS);
if (nlm_is_xlp8xx_ax() || nlm_is_xlp8xx_b0() || nlm_is_xlp3xx_ax())
- ctrlval |= EXT_G_MDIO_DIV;
+ ctrlval |= EXT_G_MDIO_DIV;
else
ctrlval |= EXT_G_MDIO_DIV_WITH_HW_DIV64;
nlm_write_nae_reg(nae_base,
- NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
+ NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
ctrlval);
nlm_write_nae_reg(nae_base,
- NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
+ NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
ctrlval | EXT_G_MDIO_CMD_LCD);
DELAY(1000);
@@ -282,7 +282,7 @@ nlm_gmac_mdio_write(uint64_t nae_base, int bus, int block,
(EXT_G0_MDIO_RD_STAT + bus * 4))) & EXT_G_MDIO_STAT_MBSY);
nlm_write_nae_reg(nae_base,
- NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
+ NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
ctrlval);
return (0);
@@ -312,7 +312,7 @@ nlm_gmac_mdio_reset(uint64_t nae_base, int bus, int block,
ctrlval |= EXT_G_MDIO_DIV_WITH_HW_DIV64;
nlm_write_nae_reg(nae_base,
- NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL + bus * 4)),
+ NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL + bus * 4)),
EXT_G_MDIO_MMRST | ctrlval);
nlm_write_nae_reg(nae_base,
NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL + bus * 4)), ctrlval);
diff --git a/sys/mips/nlm/dev/net/nae.c b/sys/mips/nlm/dev/net/nae.c
index b3790a25268c..3fbcbb724305 100644
--- a/sys/mips/nlm/dev/net/nae.c
+++ b/sys/mips/nlm/dev/net/nae.c
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -419,7 +419,7 @@ xlp_ax_nae_lane_reset_txpll(uint64_t nae_base, int block, int lane_ctrl,
| val );
while (((val = nlm_read_nae_reg(nae_base,
- NAE_REG(block, PHY, lane_ctrl))) &
+ NAE_REG(block, PHY, lane_ctrl))) &
PHY_LANE_CTRL_CMD_PENDING));
val &= 0xFF;
@@ -447,7 +447,7 @@ xlp_ax_nae_lane_reset_txpll(uint64_t nae_base, int block, int lane_ctrl,
| val );
while (!((val = nlm_read_nae_reg(nae_base,
- NAE_REG(block, PHY, (lane_ctrl - PHY_LANE_0_CTRL)))) &
+ NAE_REG(block, PHY, (lane_ctrl - PHY_LANE_0_CTRL)))) &
PHY_LANE_STAT_PCR));
/* Clear the Power Down bit */
@@ -585,8 +585,8 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
offset = size;
if (offset > cfg[hwport].max_stg2_offset)
offset = cfg[hwport].max_stg2_offset;
- data = offset << 23 |
- start << 11 |
+ data = offset << 23 |
+ start << 11 |
i << 1 |
1;
nlm_write_nae_reg(nae_base, NAE_STG2_PMEM_PROG, data);
@@ -595,7 +595,7 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
cur_start[0] = start;
/* EH FIFO */
- start = cur_start[1];
+ start = cur_start[1];
for (i = start_ctxt; i < limit; i++) {
size = cfg[hwport].eh_fifo_size / max_ctxts;
if (size)
@@ -604,7 +604,7 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
offset = size ;
if (offset > cfg[hwport].max_eh_offset)
offset = cfg[hwport].max_eh_offset;
- data = offset << 23 |
+ data = offset << 23 |
start << 11 |
i << 1 |
1;
@@ -614,7 +614,7 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
cur_start[1] = start;
/* FROUT FIFO */
- start = cur_start[2];
+ start = cur_start[2];
for (i = start_ctxt; i < limit; i++) {
size = cfg[hwport].frout_fifo_size / max_ctxts;
if (size)
@@ -623,8 +623,8 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
offset = size ;
if (offset > cfg[hwport].max_frout_offset)
offset = cfg[hwport].max_frout_offset;
- data = offset << 23 |
- start << 11 |
+ data = offset << 23 |
+ start << 11 |
i << 1 |
1;
nlm_write_nae_reg(nae_base, NAE_FREE_PMEM_PROG, data);
@@ -633,7 +633,7 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
cur_start[2] = start;
/* MS FIFO */
- start = cur_start[3];
+ start = cur_start[3];
for (i = start_ctxt; i < limit; i++) {
size = cfg[hwport].ms_fifo_size / max_ctxts;
if (size)
@@ -643,7 +643,7 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
if (offset > cfg[hwport].max_ms_offset)
offset = cfg[hwport].max_ms_offset;
data = offset << 22 | /* FIXME in PRM */
- start << 11 |
+ start << 11 |
i << 1 |
1;
nlm_write_nae_reg(nae_base, NAE_STR_PMEM_CMD, data);
@@ -652,7 +652,7 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
cur_start[3] = start;
/* PKT FIFO */
- start = cur_start[4];
+ start = cur_start[4];
for (i = start_ctxt; i < limit; i++) {
size = cfg[hwport].pkt_fifo_size / max_ctxts;
if (size)
@@ -663,7 +663,7 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
offset = cfg[hwport].max_pmem_offset;
nlm_write_nae_reg(nae_base, NAE_TX_PKT_PMEM_CMD1, offset);
- data = start << 11 |
+ data = start << 11 |
i << 1 |
1;
nlm_write_nae_reg(nae_base, NAE_TX_PKT_PMEM_CMD0, data);
@@ -672,15 +672,15 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
cur_start[4] = start;
/* PKT LEN FIFO */
- start = cur_start[5];
+ start = cur_start[5];
for (i = start_ctxt; i < limit; i++) {
size = cfg[hwport].pktlen_fifo_size / max_ctxts;
if (size)
offset = size - 1;
else
offset = size ;
- data = offset << 22 |
- start << 11 |
+ data = offset << 22 |
+ start << 11 |
i << 1 |
1;
nlm_write_nae_reg(nae_base, NAE_TX_PKTLEN_PMEM_CMD, data);
@@ -703,7 +703,7 @@ config_egress_fifo_credits(uint64_t nae_base, int hwport, int start_ctxt,
credit = cfg[hwport].stg1_2_credit / max_ctxts;
if (credit > max_credit)
credit = max_credit;
- data = credit << 16 |
+ data = credit << 16 |
i << 4 |
1;
nlm_write_nae_reg(nae_base, NAE_STG1_STG2CRDT_CMD, data);
@@ -715,7 +715,7 @@ config_egress_fifo_credits(uint64_t nae_base, int hwport, int start_ctxt,
credit = cfg[hwport].stg2_eh_credit / max_ctxts;
if (credit > max_credit)
credit = max_credit;
- data = credit << 16 |
+ data = credit << 16 |
i << 4 |
1;
nlm_write_nae_reg(nae_base, NAE_STG2_EHCRDT_CMD, data);
@@ -727,7 +727,7 @@ config_egress_fifo_credits(uint64_t nae_base, int hwport, int start_ctxt,
credit = cfg[hwport].stg2_frout_credit / max_ctxts;
if (credit > max_credit)
credit = max_credit;
- data = credit << 16 |
+ data = credit << 16 |
i << 4 |
1;
nlm_write_nae_reg(nae_base, NAE_EH_FREECRDT_CMD, data);
@@ -739,7 +739,7 @@ config_egress_fifo_credits(uint64_t nae_base, int hwport, int start_ctxt,
credit = cfg[hwport].stg2_ms_credit / max_ctxts;
if (credit > max_credit)
credit = max_credit;
- data = credit << 16 |
+ data = credit << 16 |
i << 4 |
1;
nlm_write_nae_reg(nae_base, NAE_STG2_STRCRDT_CMD, data);
@@ -970,12 +970,12 @@ nlm_enable_hardware_parser(uint64_t nae_base)
val |= (1 << 12); /* hardware parser enable */
nlm_write_nae_reg(nae_base, NAE_RX_CONFIG, val);
- /***********************************************
+ /***********************************************
* program L3 CAM table
***********************************************/
/*
- * entry-0 is ipv4 MPLS type 1 label
+ * entry-0 is ipv4 MPLS type 1 label
*/
/* l3hdroff = 4 bytes, ether_type = 0x8847 for MPLS_type1 */
nlm_setup_l3ctable_even(nae_base, 0, 4, 1, 9, 1, 0x8847);
@@ -1018,11 +1018,11 @@ nlm_enable_hardware_parser(uint64_t nae_base)
nlm_setup_l3ctable_even(nae_base, 4, 0, 0, 9, 1, 0x8906);
/* FCoE packet consists of 4 byte start-of-frame,
* and 24 bytes of frame header, followed by
- * 64 bytes of optional-header (ESP, network..),
+ * 64 bytes of optional-header (ESP, network..),
* 2048 bytes of payload, 36 bytes of optional
* "fill bytes" or ESP trailer, 4 bytes of CRC,
* and 4 bytes of end-of-frame
- * We extract the first 4 + 24 = 28 bytes
+ * We extract the first 4 + 24 = 28 bytes
*/
nlm_setup_l3ctable_odd(nae_base, 4, 0, 28, 0, 0, 0, 0);
@@ -1116,7 +1116,7 @@ nlm_enable_hardware_parser(uint64_t nae_base)
/* We extract 31 bytes from packet start */
nlm_setup_l3ctable_odd(nae_base, 15, 0, 31, 0, 0, 0, 0);
- /***********************************************
+ /***********************************************
* program L4 CAM table
***********************************************/
@@ -1124,7 +1124,7 @@ nlm_enable_hardware_parser(uint64_t nae_base)
* entry-0 - tcp packets (0x6)
*/
nlm_setup_l4ctable_even(nae_base, 0, 0, 0, 1, 0, 0, 0x6);
- /* tcp header is 20 bytes without tcp options
+ /* tcp header is 20 bytes without tcp options
* We extract 20 bytes from tcp start */
nlm_setup_l4ctable_odd(nae_base, 0, 0, 15, 15, 5);
@@ -1149,7 +1149,7 @@ nlm_enable_hardware_parser(uint64_t nae_base)
* entry-3 - RDP packets (0x1b)
*/
nlm_setup_l4ctable_even(nae_base, 3, 0, 0, 1, 0, 0, 0x1b);
- /* RDP packets have 18 bytes of generic header
+ /* RDP packets have 18 bytes of generic header
* before variable header starts.
* We extract 18 bytes from rdp start */
nlm_setup_l4ctable_odd(nae_base, 3, 0, 15, 15, 3);
@@ -1407,7 +1407,7 @@ nlm_nae_open_if(uint64_t nae_base, int nblock, int port_type,
/* default to 1G */
nlm_write_nae_reg(nae_base,
- conf2_reg,
+ conf2_reg,
(0x7 << 12) | /* interface preamble length */
(0x2 << 8) | /* interface mode */
(0x1 << 2) | /* pad crc enable */
@@ -1444,7 +1444,7 @@ nlm_nae_open_if(uint64_t nae_base, int nblock, int port_type,
mac_cfg1 = nlm_read_nae_reg(nae_base, conf1_reg);
nlm_write_nae_reg(nae_base, conf1_reg,
mac_cfg1 | (0x3 << 4));
- break;
+ break;
}
nlm_nae_init_ingress(nae_base, desc_size);
diff --git a/sys/mips/nlm/dev/net/sgmii.c b/sys/mips/nlm/dev/net/sgmii.c
index 18b1411c7b12..1d7d741b63b3 100644
--- a/sys/mips/nlm/dev/net/sgmii.c
+++ b/sys/mips/nlm/dev/net/sgmii.c
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
diff --git a/sys/mips/nlm/dev/net/ucore/crt0_basic.S b/sys/mips/nlm/dev/net/ucore/crt0_basic.S
index 79f8f4b79911..25acbb7e28c4 100644
--- a/sys/mips/nlm/dev/net/ucore/crt0_basic.S
+++ b/sys/mips/nlm/dev/net/ucore/crt0_basic.S
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -37,7 +37,7 @@
_start:
.set noreorder
la gp, _gp
- .end _start
+ .end _start
.globl __stack
diff --git a/sys/mips/nlm/dev/net/ucore/ld.ucore.S b/sys/mips/nlm/dev/net/ucore/ld.ucore.S
index aff83b871132..a7d539f4c537 100644
--- a/sys/mips/nlm/dev/net/ucore/ld.ucore.S
+++ b/sys/mips/nlm/dev/net/ucore/ld.ucore.S
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -96,7 +96,7 @@ SECTIONS
/* ----------------------------------------- */
- . = 0x18000 ;
+ . = 0x18000 ;
shmemstart = . ;
.sharedmem : {
*(.sharedmem)
@@ -145,10 +145,10 @@ SECTIONS
PROVIDE(__stackmarker = .) ;
- . = 0xFFA00 ;
+ . = 0xFFA00 ;
/* 32 + 4(argc) + 4(argv), aligned to 64 */
- PROVIDE(__stack = . - 64);
+ PROVIDE(__stack = . - 64);
/* ----------------------------------------- */
diff --git a/sys/mips/nlm/dev/net/ucore/ucore.h b/sys/mips/nlm/dev/net/ucore/ucore.h
index 73fb090f1b0b..7d791fbd9fc4 100644
--- a/sys/mips/nlm/dev/net/ucore/ucore.h
+++ b/sys/mips/nlm/dev/net/ucore/ucore.h
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -118,10 +118,10 @@ NLM_DEFINE_UCORE(pktdistr, UCORE_PKT_DISTR);
* fsv - 0 : use interface-id for selecting the free fifo pool
* 1 : use free fifo pool selected by FFS field
* ffs - selects which free fifo pool to use to take a free fifo
- * prepad_en - If this field is set to 1, part or all of the
+ * prepad_en - If this field is set to 1, part or all of the
* 64 byte prepad seen by micro engines, is written
* infront of every packet.
- * prepad_ovride - If this field is 1, the ucore system uses
+ * prepad_ovride - If this field is 1, the ucore system uses
* prepad configuration defined in this register,
* 0 means that it uses the configuration defined
* in NAE RX_CONFIG register
@@ -167,7 +167,7 @@ nlm_ucore_pkt_done(int l3cachelines, int fsv, int ffs, int prepad_en,
nlm_write_ucore_obufdone(val);
}
-/* Get the class full vector field from POE.
+/* Get the class full vector field from POE.
* The POE maintains a threshold for each class.
* A bit in this field will be set corresponding to the class approaching
* class full status.
@@ -188,7 +188,7 @@ nlm_ucore_get_rxpkt_hwparsererr(unsigned int pktrdy)
}
/* This function returns the context number assigned to incoming
- * packet
+ * packet
*/
static __inline__ int
nlm_ucore_get_rxpkt_context(unsigned int pktrdy)
@@ -214,8 +214,8 @@ nlm_ucore_get_rxpkt_interface(unsigned int pktrdy)
return (pktrdy & 0x1f);
}
-/* This function returns 1 if end of packet (EOP) is set in
- * packet data.
+/* This function returns 1 if end of packet (EOP) is set in
+ * packet data.
*/
static __inline__ int
nlm_ucore_get_rxpkt_eop(unsigned int rxpkt_info)
@@ -256,7 +256,7 @@ nlm_ucore_get_cam_result(unsigned int cam_result)
/* This function sets up the csum in ucore.
* iphdr_start - defines the start of ip header (to check - is this byte
* position???)
- * iphdr_len - This field is auto filled by h/w parser if zero, else
+ * iphdr_len - This field is auto filled by h/w parser if zero, else
* the value defined will be used.
*/
static __inline__ void
@@ -270,7 +270,7 @@ nlm_ucore_csum_setup(int iphdr_start, int iphdr_len)
}
/* crcpos - position of crc in pkt. If crc position is within startcrc and
- * endcrc, zero out these bytes in the packet before computing crc. This
+ * endcrc, zero out these bytes in the packet before computing crc. This
* field is not needed for FCoE.
* cps - If 1, uses the polynomial in RX_CRC_POLY1 of NAE register.
* if 0, uses the polynomial in RX_CRC_POLY0 of NAE register.
@@ -281,7 +281,7 @@ nlm_ucore_csum_setup(int iphdr_start, int iphdr_len)
* cfi - If 1, performs a final inversion of crc before comarison is done during
* pkt reception.
* startcrc - This field is always required for both FCoE and SCTP crc.
- * endcrc - This information needs to be setup only for SCTP. For FCoE this
+ * endcrc - This information needs to be setup only for SCTP. For FCoE this
* information is provided by hardware.
* valid - if set to 1, CRC status is placed into bit 2 of rx descriptor
* if set to 0, TCP checksum status is placed into bit 2 of rx descriptor
@@ -310,7 +310,7 @@ nlm_ucore_crc_setup(int crcpos, int cps, int cfi, int cbm, int fcoe,
nlm_write_ucore_crcinfo(val);
}
-/* This function returns a fifo empty vector, where each bit provides
+/* This function returns a fifo empty vector, where each bit provides
* the status of a fifo pool, where if the pool is empty the bit gets
* set to 1.
*/
@@ -333,7 +333,7 @@ nlm_ucore_get_fifoempty(unsigned int fifoempty)
* from context->class_table
* pdl - poe distribution list
* dest - fixed destination setup
- * hash - if 1, use hash based destination
+ * hash - if 1, use hash based destination
*/
static __inline__ void
nlm_ucore_setup_poepktdistr(int pdm, int mc3, int pdl, int dest, int hash)
diff --git a/sys/mips/nlm/dev/net/ucore/ucore_app.c b/sys/mips/nlm/dev/net/ucore/ucore_app.c
index bd0489e4a810..71f2805dd62a 100644
--- a/sys/mips/nlm/dev/net/ucore/ucore_app.c
+++ b/sys/mips/nlm/dev/net/ucore/ucore_app.c
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -32,11 +32,6 @@
int main(void)
{
-#if 0
- volatile unsigned int *pkt =
- (volatile unsigned int *) (PACKET_MEMORY + PACKET_DATA_OFFSET);
- int intf, hw_parser_error, context;
-#endif
unsigned int pktrdy;
int num_cachelines = 1518 / 64 ; /* pktsize / L3 cacheline size */
@@ -44,11 +39,6 @@ int main(void)
/* Spray packets to using distribution vector */
while (1) {
pktrdy = nlm_read_ucore_rxpktrdy();
-#if 0
- intf = pktrdy & 0x1f;
- context = (pktrdy >> 13) & 0x3ff;
- hw_parser_error = (pktrdy >> 23) & 0x1;
-#endif
nlm_ucore_setup_poepktdistr(FWD_DIST_VEC, 0, 0, 0, 0);
nlm_ucore_pkt_done(num_cachelines, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0);
diff --git a/sys/mips/nlm/dev/net/xaui.c b/sys/mips/nlm/dev/net/xaui.c
index 3b18ef9ba9f4..ebefa66027be 100644
--- a/sys/mips/nlm/dev/net/xaui.c
+++ b/sys/mips/nlm/dev/net/xaui.c
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
diff --git a/sys/mips/nlm/dev/net/xlpge.c b/sys/mips/nlm/dev/net/xlpge.c
index 41962dfaebdb..e9bb86ea5b93 100644
--- a/sys/mips/nlm/dev/net/xlpge.c
+++ b/sys/mips/nlm/dev/net/xlpge.c
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -108,7 +108,7 @@ __FBSDID("$FreeBSD$");
static struct nae_port_config nae_port_config[64];
int poe_cl_tbl[MAX_POE_CLASSES] = {
- 0x0, 0x249249,
+ 0x0, 0x249249,
0x492492, 0x6db6db,
0x924924, 0xb6db6d,
0xdb6db6, 0xffffff
@@ -116,7 +116,7 @@ int poe_cl_tbl[MAX_POE_CLASSES] = {
/* #define DUMP_PACKET */
-static uint64_t
+static uint64_t
nlm_paddr_ld(uint64_t paddr)
{
uint64_t xkaddr = 0x9800000000000000 | paddr;
@@ -189,7 +189,7 @@ static device_method_t nlm_xlpge_methods[] = {
DEVMETHOD(device_resume, nlm_xlpge_resume),
DEVMETHOD(device_shutdown, nlm_xlpge_shutdown),
- /* Methods from the nexus bus needed for explicitly
+ /* Methods from the nexus bus needed for explicitly
* probing children when driver is loaded as a kernel module
*/
DEVMETHOD(miibus_readreg, nlm_xlpge_mii_read),
@@ -240,7 +240,7 @@ atomic_incr_long(unsigned long *addr)
/*
* xlpnae driver implementation
*/
-static int
+static int
nlm_xlpnae_probe(device_t dev)
{
if (pci_get_vendor(dev) != PCI_VENDOR_NETLOGIC ||
@@ -539,7 +539,7 @@ nlm_setup_portcfg(struct nlm_xlpnae_softc *sc, struct xlp_nae_ivars *naep,
sc->total_num_ports++;
}
-static int
+static int
nlm_xlpnae_attach(device_t dev)
{
struct xlp_nae_ivars *nae_ivars;
@@ -566,14 +566,14 @@ nlm_xlpnae_attach(device_t dev)
sc->sgmiimask = nae_ivars->sgmiimask;
sc->nblocks = nae_ivars->nblocks;
sc->freq = nae_ivars->freq;
-
+
/* flow table generation is done by CRC16 polynomial */
- sc->flow_crc_poly = nae_ivars->flow_crc_poly;
+ sc->flow_crc_poly = nae_ivars->flow_crc_poly;
- sc->hw_parser_en = nae_ivars->hw_parser_en;
- sc->prepad_en = nae_ivars->prepad_en;
- sc->prepad_size = nae_ivars->prepad_size;
- sc->ieee_1588_en = nae_ivars->ieee_1588_en;
+ sc->hw_parser_en = nae_ivars->hw_parser_en;
+ sc->prepad_en = nae_ivars->prepad_en;
+ sc->prepad_size = nae_ivars->prepad_size;
+ sc->ieee_1588_en = nae_ivars->ieee_1588_en;
nae_pcibase = nlm_get_nae_pcibase(sc->node);
sc->ncontexts = nlm_read_reg(nae_pcibase, XLP_PCI_DEVINFO_REG5);
@@ -692,26 +692,26 @@ nlm_xlpnae_attach(device_t dev)
return (0);
}
-static int
+static int
nlm_xlpnae_detach(device_t dev)
{
/* TODO - free zone here */
return (0);
}
-static int
+static int
nlm_xlpnae_suspend(device_t dev)
{
return (0);
}
-static int
+static int
nlm_xlpnae_resume(device_t dev)
{
return (0);
}
-static int
+static int
nlm_xlpnae_shutdown(device_t dev)
{
return (0);
@@ -745,13 +745,13 @@ nlm_xlpge_mac_set_rx_mode(struct nlm_xlpge_softc *sc)
}
}
-static int
+static int
nlm_xlpge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
{
struct mii_data *mii;
struct nlm_xlpge_softc *sc;
struct ifreq *ifr;
- int error;
+ int error;
sc = ifp->if_softc;
error = 0;
@@ -819,7 +819,7 @@ xlpge_tx(struct ifnet *ifp, struct mbuf *mbuf_chain)
xlp_handle_msg_vc(1 << XLPGE_FB_VC, 2);
/* vfb id table is setup to map cpu to vc 3 of the cpu */
- fbid = nlm_cpuid();
+ fbid = nlm_cpuid();
dst = sc->txq;
pos = 0;
@@ -943,7 +943,7 @@ nlm_mii_pollstat(void *arg)
mii_pollstat(mii);
- callout_reset(&sc->xlpge_callout, hz,
+ callout_reset(&sc->xlpge_callout, hz,
nlm_mii_pollstat, sc);
}
}
@@ -1033,7 +1033,7 @@ xlpge_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
ifmr->ifm_status |= IFM_ACTIVE;
}
-static int
+static int
nlm_xlpge_ifinit(struct nlm_xlpge_softc *sc)
{
struct ifnet *ifp;
@@ -1079,7 +1079,7 @@ nlm_xlpge_ifinit(struct nlm_xlpge_softc *sc)
return (0);
}
-static int
+static int
nlm_xlpge_probe(device_t dev)
{
return (BUS_PROBE_DEFAULT);
@@ -1159,7 +1159,7 @@ nlm_xlpge_setup_stats_sysctl(device_t dev, struct nlm_xlpge_softc *sc)
child = SYSCTL_CHILDREN(tree);
#define XLPGE_STAT(name, offset, desc) \
- SYSCTL_ADD_PROC(ctx, child, OID_AUTO, name, \
+ SYSCTL_ADD_PROC(ctx, child, OID_AUTO, name, \
CTLTYPE_UINT | CTLFLAG_RD, sc, offset, \
xlpge_stats_sysctl, "IU", desc)
@@ -1208,7 +1208,7 @@ nlm_xlpge_setup_stats_sysctl(device_t dev, struct nlm_xlpge_softc *sc)
#undef XLPGE_STAT
}
-static int
+static int
nlm_xlpge_attach(device_t dev)
{
struct xlp_port_ivars *pv;
@@ -1263,25 +1263,25 @@ nlm_xlpge_attach(device_t dev)
return (0);
}
-static int
+static int
nlm_xlpge_detach(device_t dev)
{
return (0);
}
-static int
+static int
nlm_xlpge_suspend(device_t dev)
{
return (0);
}
-static int
+static int
nlm_xlpge_resume(device_t dev)
{
return (0);
}
-static int
+static int
nlm_xlpge_shutdown(device_t dev)
{
return (0);
@@ -1290,14 +1290,14 @@ nlm_xlpge_shutdown(device_t dev)
/*
* miibus function with custom implementation
*/
-static int
+static int
nlm_xlpge_mii_read(struct device *dev, int phyaddr, int regidx)
{
struct nlm_xlpge_softc *sc;
int val;
sc = device_get_softc(dev);
- if (sc->type == SGMIIC)
+ if (sc->type == SGMIIC)
val = nlm_gmac_mdio_read(sc->base_addr, sc->mdio_bus,
BLOCK_7, LANE_CFG, phyaddr, regidx);
else
@@ -1306,7 +1306,7 @@ nlm_xlpge_mii_read(struct device *dev, int phyaddr, int regidx)
return (val);
}
-static int
+static int
nlm_xlpge_mii_write(struct device *dev, int phyaddr, int regidx, int val)
{
struct nlm_xlpge_softc *sc;
@@ -1319,7 +1319,7 @@ nlm_xlpge_mii_write(struct device *dev, int phyaddr, int regidx, int val)
return (0);
}
-static void
+static void
nlm_xlpge_mii_statchg(device_t dev)
{
struct nlm_xlpge_softc *sc;
diff --git a/sys/mips/nlm/dev/net/xlpge.h b/sys/mips/nlm/dev/net/xlpge.h
index ccf9d124f4a0..027e1cf82ebf 100644
--- a/sys/mips/nlm/dev/net/xlpge.h
+++ b/sys/mips/nlm/dev/net/xlpge.h
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -108,7 +108,7 @@ struct nlm_xlpge_softc {
int link; /* Port link status */
int flowctrl; /* Port flow control setting */
- unsigned char dev_addr[ETHER_ADDR_LEN];
+ unsigned char dev_addr[ETHER_ADDR_LEN];
struct mtx sc_lock;
int if_flags;
struct nae_port_config *portcfg;
diff --git a/sys/mips/nlm/dev/sec/nlmrsa.c b/sys/mips/nlm/dev/sec/nlmrsa.c
index 268fad15e8e8..8710dd9a32db 100644
--- a/sys/mips/nlm/dev/sec/nlmrsa.c
+++ b/sys/mips/nlm/dev/sec/nlmrsa.c
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -135,7 +135,7 @@ print_krp_params(struct cryptkop *krp)
}
#endif
-static int
+static int
xlp_rsa_init(struct xlp_rsa_softc *sc, int node)
{
struct xlp_rsa_command *cmd = NULL;
@@ -387,7 +387,7 @@ xlp_rsa_freesession(device_t dev, u_int64_t tid)
return (0);
}
-static void
+static void
xlp_free_cmd_params(struct xlp_rsa_command *cmd)
{
diff --git a/sys/mips/nlm/dev/sec/nlmrsalib.h b/sys/mips/nlm/dev/sec/nlmrsalib.h
index 03c470f8253e..6a29f376bb3e 100644
--- a/sys/mips/nlm/dev/sec/nlmrsalib.h
+++ b/sys/mips/nlm/dev/sec/nlmrsalib.h
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
diff --git a/sys/mips/nlm/dev/sec/nlmsec.c b/sys/mips/nlm/dev/sec/nlmsec.c
index 4c956617a483..78fc9615ae7a 100644
--- a/sys/mips/nlm/dev/sec/nlmsec.c
+++ b/sys/mips/nlm/dev/sec/nlmsec.c
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -114,12 +114,12 @@ DRIVER_MODULE(nlmsec, pci, xlp_sec_driver, xlp_sec_devclass, 0, 0);
MODULE_DEPEND(nlmsec, crypto, 1, 1, 1);
void
-nlm_xlpsec_msgring_handler(int vc, int size, int code, int src_id,
+nlm_xlpsec_msgring_handler(int vc, int size, int code, int src_id,
struct nlm_fmn_msg *msg, void *data);
#ifdef NLM_SEC_DEBUG
-#define extract_bits(x, bitshift, bitcnt) \
+#define extract_bits(x, bitshift, bitcnt) \
(((unsigned long long)x >> bitshift) & ((1ULL << bitcnt) - 1))
void
@@ -197,7 +197,7 @@ print_crypto_params(struct xlp_sec_command *cmd, struct nlm_fmn_msg m)
return;
}
-void
+void
xlp_sec_print_data(struct cryptop *crp)
{
int i, key_len;
@@ -265,7 +265,7 @@ print_cmd(struct xlp_sec_command *cmd)
}
#endif /* NLM_SEC_DEBUG */
-static int
+static int
xlp_sec_init(struct xlp_sec_softc *sc)
{
@@ -675,7 +675,7 @@ error:
return (err);
}
-static void
+static void
xlp_free_cmd_params(struct xlp_sec_command *cmd)
{
if (cmd->ctrlp != NULL)
@@ -754,7 +754,7 @@ xlp_sec_process(device_t dev, struct cryptop *crp, int hint)
}
if (crd1->crd_flags & CRD_F_IV_EXPLICIT)
cmd->cipheroff = cmd->ivlen;
- else
+ else
cmd->cipheroff = cmd->enccrd->crd_skip;
cmd->cipherlen = cmd->enccrd->crd_len;
if (crd1->crd_flags & CRD_F_IV_PRESENT)
diff --git a/sys/mips/nlm/dev/sec/nlmseclib.c b/sys/mips/nlm/dev/sec/nlmseclib.c
index 8439260a8b24..f953025ace4b 100644
--- a/sys/mips/nlm/dev/sec/nlmseclib.c
+++ b/sys/mips/nlm/dev/sec/nlmseclib.c
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
diff --git a/sys/mips/nlm/dev/sec/nlmseclib.h b/sys/mips/nlm/dev/sec/nlmseclib.h
index be209050955c..038b0ae9165a 100644
--- a/sys/mips/nlm/dev/sec/nlmseclib.h
+++ b/sys/mips/nlm/dev/sec/nlmseclib.h
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -105,13 +105,13 @@ struct xlp_sec_command {
uint32_t hashoff;
uint32_t hashlen;
uint32_t cipheroff;
- uint32_t cipherlen;
+ uint32_t cipherlen;
uint32_t ivoff;
uint32_t ivlen;
uint32_t hashalg;
uint32_t hashmode;
uint32_t cipheralg;
- uint32_t ciphermode;
+ uint32_t ciphermode;
uint32_t nsegs;
uint32_t hash_dst_len; /* used to store hash alg dst size */
};
diff --git a/sys/mips/nlm/dev/sec/rsa_ucode.h b/sys/mips/nlm/dev/sec/rsa_ucode.h
index a0f7cb3e31f5..4a4f3efa9bb6 100644
--- a/sys/mips/nlm/dev/sec/rsa_ucode.h
+++ b/sys/mips/nlm/dev/sec/rsa_ucode.h
@@ -12,7 +12,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE