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authorBrandon Bergren <bdragon@FreeBSD.org>2020-05-27 00:17:05 +0000
committerBrandon Bergren <bdragon@FreeBSD.org>2020-05-27 00:17:05 +0000
commit64cc3b0c28b9dcd292a92716748ff78260c45f68 (patch)
tree8c86e108c69b2ffd80fc7c5b14638d8195cfd585 /sys/powerpc/aim
parent71d104536b513298902be65342afe6f3792f29e4 (diff)
downloadsrc-64cc3b0c28b9dcd292a92716748ff78260c45f68.tar.gz
src-64cc3b0c28b9dcd292a92716748ff78260c45f68.zip
[PowerPC] Fix invalid asm in trap code
In this context, 0 actually means 0 (i.e. this is a li instruction). While most assemblers will ignore this, I did have a compile failure at one point when using an external toolchain. In the future, we should use the li syntax to make this clearer. Sponsored by: Tag1 Consulting, Inc.
Notes
Notes: svn path=/head/; revision=361542
Diffstat (limited to 'sys/powerpc/aim')
-rw-r--r--sys/powerpc/aim/trap_subr32.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/powerpc/aim/trap_subr32.S b/sys/powerpc/aim/trap_subr32.S
index 8dd52b952aa2..710a222fd84c 100644
--- a/sys/powerpc/aim/trap_subr32.S
+++ b/sys/powerpc/aim/trap_subr32.S
@@ -426,7 +426,7 @@ instr_sec_hash:
bne do_isi /* if so, go to ISI interrupt */
mfspr %r2, SPR_HASH2 /* get the second pointer */
ori %r3, %r3, 0x0040 /* change the compare value */
- addi %r1, %r0, 8 /* load 8 for counter */
+ addi %r1, 0, 8 /* load 8 for counter */
addi %r2, %r2, -8 /* pre dec for update on load */
b im0 /* try second hash */