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authorJustin Hibbits <jhibbits@FreeBSD.org>2019-03-02 20:59:18 +0000
committerJustin Hibbits <jhibbits@FreeBSD.org>2019-03-02 20:59:18 +0000
commit5b4c63b781ce9294eead6a9e08339b7125a45a1f (patch)
tree2c9487fc3cdac835e42a4c7571c52be12dfe30af /sys/powerpc/booke/locore.S
parentd4249d08d980df9425b62bcb11e960c2132fac36 (diff)
downloadsrc-5b4c63b781ce9294eead6a9e08339b7125a45a1f.tar.gz
src-5b4c63b781ce9294eead6a9e08339b7125a45a1f.zip
powerpc/booke: Depessimize MAS register updates even more
Remove isyncs between MAS register updates in the TLB miss handler, since it's only needed before the TLB update instructions.
Notes
Notes: svn path=/head/; revision=344729
Diffstat (limited to 'sys/powerpc/booke/locore.S')
-rw-r--r--sys/powerpc/booke/locore.S5
1 files changed, 3 insertions, 2 deletions
diff --git a/sys/powerpc/booke/locore.S b/sys/powerpc/booke/locore.S
index c0aa309bb713..0eecc1f3c9c3 100644
--- a/sys/powerpc/booke/locore.S
+++ b/sys/powerpc/booke/locore.S
@@ -252,6 +252,7 @@ __start:
isync
bl zero_mas7
bl zero_mas8
+ isync
tlbwe
isync
msync
@@ -505,6 +506,7 @@ bp_kernload:
isync
bl zero_mas7
bl zero_mas8
+ isync
tlbwe
isync
msync
@@ -695,6 +697,7 @@ tlb1_temp_mapping_as1:
bl zero_mas7
bl zero_mas8
mtlr %r3
+ isync
tlbwe
isync
msync
@@ -742,7 +745,6 @@ zero_mas7:
li %r20, 0
mtspr SPR_MAS7, %r20
- isync
1:
blr
@@ -759,7 +761,6 @@ zero_mas8:
1:
li %r20, 0
mtspr SPR_MAS8, %r20
- isync
blr
#endif