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| author | Nathan Whitehorn <nwhitehorn@FreeBSD.org> | 2009-06-23 04:02:36 +0000 |
|---|---|---|
| committer | Nathan Whitehorn <nwhitehorn@FreeBSD.org> | 2009-06-23 04:02:36 +0000 |
| commit | 7f0ad28f28296a9248d8a23627c84e198e841a7a (patch) | |
| tree | 8d5dcca12bdc34b3d07da077863fae18127123b9 /sys/powerpc | |
| parent | ed6d949afdbe3f25e6ef640881d8a0a72d7b7aa8 (diff) | |
| download | src-7f0ad28f28296a9248d8a23627c84e198e841a7a.tar.gz src-7f0ad28f28296a9248d8a23627c84e198e841a7a.zip | |
Fix copy/paste typo in last revision. PMC0 control should be shifted 8
bits, not 6, on the PPC 970.
Notes
Notes:
svn path=/head/; revision=194678
Diffstat (limited to 'sys/powerpc')
| -rw-r--r-- | sys/powerpc/include/spr.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/powerpc/include/spr.h b/sys/powerpc/include/spr.h index b40987e8cbb6..4e55326c4a3c 100644 --- a/sys/powerpc/include/spr.h +++ b/sys/powerpc/include/spr.h @@ -336,7 +336,7 @@ #define SPR_MMCR0_TRIGGER 0x00002000 /* Trigger */ #define SPR_MMCR0_PMC1SEL(x) ((x) << 6) /* PMC1 selector */ #define SPR_MMCR0_PMC2SEL(x) ((x) << 0) /* PMC2 selector */ -#define SPR_970MMCR0_PMC1SEL(x) ((x) << 6) /* PMC1 selector (970) */ +#define SPR_970MMCR0_PMC1SEL(x) ((x) << 8) /* PMC1 selector (970) */ #define SPR_970MMCR0_PMC2SEL(x) ((x) << 1) /* PMC2 selector (970) */ #define SPR_SGR 0x3b9 /* 4.. Storage Guarded Register */ #define SPR_PMC1 0x3b9 /* .6. Performance Counter Register 1 */ |