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| author | Andrew Turner <andrew@FreeBSD.org> | 2015-04-11 17:16:23 +0000 |
|---|---|---|
| committer | Andrew Turner <andrew@FreeBSD.org> | 2015-04-11 17:16:23 +0000 |
| commit | 405ada37fbdafaa6691a906f3630ba8d064e5f30 (patch) | |
| tree | 3242f4dc9f4677a166d03c3acecc2475385f4f3d /sys/sparc64/pci | |
| parent | 2574218578003321766b2bc85b3dc877308c0fe4 (diff) | |
| download | src-405ada37fbdafaa6691a906f3630ba8d064e5f30.tar.gz src-405ada37fbdafaa6691a906f3630ba8d064e5f30.zip | |
Add support for the uart classes to set their default register shift value.
This is needed with the pl011 driver. Before this change it would default
to a shift of 0, however the hardware places the registers at 4-byte
addresses meaning the value should be 2.
This patch fixes this for the pl011 when configured using the fdt. The
other drivers have a default value of 0 to keep this a no-op.
MFC after: 1 week
Notes
Notes:
svn path=/head/; revision=281438
Diffstat (limited to 'sys/sparc64/pci')
| -rw-r--r-- | sys/sparc64/pci/sbbc.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/sparc64/pci/sbbc.c b/sys/sparc64/pci/sbbc.c index c19fb71b0bb3..f1e7fab94ced 100644 --- a/sys/sparc64/pci/sbbc.c +++ b/sys/sparc64/pci/sbbc.c @@ -813,7 +813,8 @@ struct uart_class uart_sbbc_class = { sizeof(struct uart_softc), .uc_ops = &sbbc_uart_ops, .uc_range = 1, - .uc_rclk = 0x5bbc /* arbitrary */ + .uc_rclk = 0x5bbc, /* arbitrary */ + .uc_rshift = 0 }; #define SIGCHG(c, i, s, d) \ |