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author | Marcel Moolenaar <marcel@FreeBSD.org> | 2009-05-18 18:37:18 +0000 |
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committer | Marcel Moolenaar <marcel@FreeBSD.org> | 2009-05-18 18:37:18 +0000 |
commit | dbb95048da3ac080e2f3f83bcb730fe83661962b (patch) | |
tree | cf3c716dbc38984e19bd613ced4f6b9f8d4ca6b7 /sys/sparc64 | |
parent | e13e5f8fa52267fd6ec2cb15e7b05c01b02832fa (diff) | |
download | src-dbb95048da3ac080e2f3f83bcb730fe83661962b.tar.gz src-dbb95048da3ac080e2f3f83bcb730fe83661962b.zip |
Add cpu_flush_dcache() for use after non-DMA based I/O so that a
possible future I-cache coherency operation can succeed. On ARM
for example the L1 cache can be (is) virtually mapped, which
means that any I/O that uses temporary mappings will not see the
I-cache made coherent. On ia64 a similar behaviour has been
observed. By flushing the D-cache, execution of binaries backed
by md(4) and/or NFS work reliably.
For Book-E (powerpc), execution over NFS exhibits SIGILL once in
a while as well, though cpu_flush_dcache() hasn't been implemented
yet.
Doing an explicit D-cache flush as part of the non-DMA based I/O
read operation eliminates the need to do it as part of the
I-cache coherency operation itself and as such avoids pessimizing
the DMA-based I/O read operations for which D-cache are already
flushed/invalidated. It also allows future optimizations whereby
the bcopy() followed by the D-cache flush can be integrated in a
single operation, which could be implemented using on-chips DMA
engines, by-passing the D-cache altogether.
Notes
Notes:
svn path=/head/; revision=192323
Diffstat (limited to 'sys/sparc64')
-rw-r--r-- | sys/sparc64/sparc64/machdep.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/sys/sparc64/sparc64/machdep.c b/sys/sparc64/sparc64/machdep.c index 4eb8d9c4cb04..164a8b391fea 100644 --- a/sys/sparc64/sparc64/machdep.c +++ b/sys/sparc64/sparc64/machdep.c @@ -742,6 +742,16 @@ cpu_shutdown(void *args) ofw_exit(args); } +/* + * Flush the D-cache for non-DMA I/O so that the I-cache can + * be made coherent later. + */ +void +cpu_flush_dcache(void *ptr, size_t len) +{ + /* TBD */ +} + /* Get current clock frequency for the given CPU ID. */ int cpu_est_clockrate(int cpu_id, uint64_t *rate) |