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| author | Conrad Meyer <cem@FreeBSD.org> | 2017-08-28 22:28:41 +0000 |
|---|---|---|
| committer | Conrad Meyer <cem@FreeBSD.org> | 2017-08-28 22:28:41 +0000 |
| commit | 2744a0b69b2ee4c96e87242720907184a3380c56 (patch) | |
| tree | 36ffd8e6f53e5fb361a33ff811e7a5529b742bcb /sys/sys/param.h | |
| parent | 0cc18edf187d649c55c933eed5c8bc72fdbea965 (diff) | |
| download | src-2744a0b69b2ee4c96e87242720907184a3380c56.tar.gz src-2744a0b69b2ee4c96e87242720907184a3380c56.zip | |
Drop CACHE_LINE_SIZE to 64 bytes on x86
The actual cache line size has always been 64 bytes.
The 128 number arose as an optimization for Core 2 era Intel processors. By
default (configurable in BIOS), these CPUs would prefetch adjacent cache
lines unintelligently. Newer CPUs prefetch more intelligently.
The latest Core 2 era CPU was introduced in September 2008 (Xeon 7400
series, "Dunnington"). If you are still using one of these CPUs, especially
in a multi-socket configuration, consider locating the "adjacent cache line
prefetch" option in BIOS and disabling it.
Reported by: mjg
Reviewed by: np
Discussed with: jhb
Sponsored by: Dell EMC Isilon
Notes
Notes:
svn path=/head/; revision=322989
Diffstat (limited to 'sys/sys/param.h')
| -rw-r--r-- | sys/sys/param.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/sys/param.h b/sys/sys/param.h index df5cfda47d51..8a0e82c68b84 100644 --- a/sys/sys/param.h +++ b/sys/sys/param.h @@ -58,7 +58,7 @@ * in the range 5 to 9. */ #undef __FreeBSD_version -#define __FreeBSD_version 1200042 /* Master, propagated to newvers */ +#define __FreeBSD_version 1200043 /* Master, propagated to newvers */ /* * __FreeBSD_kernel__ indicates that this system uses the kernel of FreeBSD, |