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| author | Konstantin Belousov <kib@FreeBSD.org> | 2017-02-03 12:51:40 +0000 |
|---|---|---|
| committer | Konstantin Belousov <kib@FreeBSD.org> | 2017-02-03 12:51:40 +0000 |
| commit | 57f6622f92bd72f8dd00ef76ca63a9bc909d7d49 (patch) | |
| tree | 8e78ce819dead203b413f784eddbc2de25598390 /sys/x86 | |
| parent | 5b50ed80434233154dcdf40364b76c1491e668b8 (diff) | |
| download | src-57f6622f92bd72f8dd00ef76ca63a9bc909d7d49.tar.gz src-57f6622f92bd72f8dd00ef76ca63a9bc909d7d49.zip | |
For i386, remove config options CPU_DISABLE_CMPXCHG, CPU_DISABLE_SSE
and device npx.
This means that FPU is always initialized and handled when available,
and SSE+ register file and exception are handled when available. This
makes the kernel FPU code much easier to maintain by the cost of
slight bloat for CPUs older than 25 years.
CPU_DISABLE_CMPXCHG outlived its usefulness, see the removed comment
explaining the original purpose.
Suggested by and discussed with: bde
Tested by: pho
Sponsored by: The FreeBSD Foundation
MFC after: 3 weeks
Notes
Notes:
svn path=/head/; revision=313154
Diffstat (limited to 'sys/x86')
| -rw-r--r-- | sys/x86/acpica/acpi_wakeup.c | 7 | ||||
| -rw-r--r-- | sys/x86/x86/cpu_machdep.c | 1 | ||||
| -rw-r--r-- | sys/x86/x86/identcpu.c | 6 |
3 files changed, 2 insertions, 12 deletions
diff --git a/sys/x86/acpica/acpi_wakeup.c b/sys/x86/acpica/acpi_wakeup.c index d551b0234599..4a10ac7b3047 100644 --- a/sys/x86/acpica/acpi_wakeup.c +++ b/sys/x86/acpica/acpi_wakeup.c @@ -35,9 +35,6 @@ __FBSDID("$FreeBSD$"); #else #include "opt_apic.h" #endif -#ifdef __i386__ -#include "opt_npx.h" -#endif #include <sys/param.h> #include <sys/bus.h> @@ -213,7 +210,7 @@ acpi_sleep_machdep(struct acpi_softc *sc, int state) if (savectx(pcb)) { #ifdef __amd64__ fpususpend(susppcbs[0]->sp_fpususpend); -#elif defined(DEV_NPX) +#else npxsuspend(susppcbs[0]->sp_fpususpend); #endif #ifdef SMP @@ -250,7 +247,7 @@ acpi_sleep_machdep(struct acpi_softc *sc, int state) } else { #ifdef __amd64__ fpuresume(susppcbs[0]->sp_fpususpend); -#elif defined(DEV_NPX) +#else npxresume(susppcbs[0]->sp_fpususpend); #endif } diff --git a/sys/x86/x86/cpu_machdep.c b/sys/x86/x86/cpu_machdep.c index a5fd04912fba..265fb6c1dc8d 100644 --- a/sys/x86/x86/cpu_machdep.c +++ b/sys/x86/x86/cpu_machdep.c @@ -53,7 +53,6 @@ __FBSDID("$FreeBSD$"); #include "opt_mp_watchdog.h" #include "opt_platform.h" #ifdef __i386__ -#include "opt_npx.h" #include "opt_apic.h" #include "opt_xbox.h" #endif diff --git a/sys/x86/x86/identcpu.c b/sys/x86/x86/identcpu.c index d4cc22363d58..86bdc0ab70fb 100644 --- a/sys/x86/x86/identcpu.c +++ b/sys/x86/x86/identcpu.c @@ -67,10 +67,6 @@ __FBSDID("$FreeBSD$"); #include <x86/vmware.h> #ifdef __i386__ -#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) -#define CPU_ENABLE_SSE -#endif - #define IDENTBLUE_CYRIX486 0 #define IDENTBLUE_IBMCPU 1 #define IDENTBLUE_CYRIXM2 2 @@ -105,10 +101,8 @@ u_int cpu_procinfo; /* HyperThreading Info / Brand Index / CLFUSH */ u_int cpu_procinfo2; /* Multicore info */ char cpu_vendor[20]; /* CPU Origin code */ u_int cpu_vendor_id; /* CPU vendor ID */ -#if defined(__amd64__) || defined(CPU_ENABLE_SSE) u_int cpu_fxsr; /* SSE enabled */ u_int cpu_mxcsr_mask; /* Valid bits in mxcsr */ -#endif u_int cpu_clflush_line_size = 32; u_int cpu_stdext_feature; u_int cpu_stdext_feature2; |