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| author | Pyun YongHyeon <yongari@FreeBSD.org> | 2009-01-19 02:31:27 +0000 |
|---|---|---|
| committer | Pyun YongHyeon <yongari@FreeBSD.org> | 2009-01-19 02:31:27 +0000 |
| commit | 96b774f48971d1085f572c676c80ac0cbe5cf08f (patch) | |
| tree | 5de98897ad8229f53eb7036f5ff9122e93fdad61 /sys | |
| parent | 07707a24284aa1aed3423f22ef671835cf5ff906 (diff) | |
| download | src-96b774f48971d1085f572c676c80ac0cbe5cf08f.tar.gz src-96b774f48971d1085f572c676c80ac0cbe5cf08f.zip | |
Sometimes RTL8168B seems to take long time to access GMII registers
in device attach phase. Double GMII register access timeout value
to fix the issue.
Reported by: wkoszek
Tested by: wkoszek
Notes
Notes:
svn path=/head/; revision=187417
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/re/if_re.c | 8 | ||||
| -rw-r--r-- | sys/pci/if_rlreg.h | 1 |
2 files changed, 5 insertions, 4 deletions
diff --git a/sys/dev/re/if_re.c b/sys/dev/re/if_re.c index 21b8251c8335..5ae5cc9b7343 100644 --- a/sys/dev/re/if_re.c +++ b/sys/dev/re/if_re.c @@ -418,14 +418,14 @@ re_gmii_readreg(device_t dev, int phy, int reg) CSR_WRITE_4(sc, RL_PHYAR, reg << 16); - for (i = 0; i < RL_TIMEOUT; i++) { + for (i = 0; i < RL_PHY_TIMEOUT; i++) { rval = CSR_READ_4(sc, RL_PHYAR); if (rval & RL_PHYAR_BUSY) break; DELAY(100); } - if (i == RL_TIMEOUT) { + if (i == RL_PHY_TIMEOUT) { device_printf(sc->rl_dev, "PHY read failed\n"); return (0); } @@ -445,14 +445,14 @@ re_gmii_writereg(device_t dev, int phy, int reg, int data) CSR_WRITE_4(sc, RL_PHYAR, (reg << 16) | (data & RL_PHYAR_PHYDATA) | RL_PHYAR_BUSY); - for (i = 0; i < RL_TIMEOUT; i++) { + for (i = 0; i < RL_PHY_TIMEOUT; i++) { rval = CSR_READ_4(sc, RL_PHYAR); if (!(rval & RL_PHYAR_BUSY)) break; DELAY(100); } - if (i == RL_TIMEOUT) { + if (i == RL_PHY_TIMEOUT) { device_printf(sc->rl_dev, "PHY write failed\n"); return (0); } diff --git a/sys/pci/if_rlreg.h b/sys/pci/if_rlreg.h index b3569e8663f8..2cc51d72d2cf 100644 --- a/sys/pci/if_rlreg.h +++ b/sys/pci/if_rlreg.h @@ -937,6 +937,7 @@ struct rl_softc { CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) & ~(val)) #define RL_TIMEOUT 1000 +#define RL_PHY_TIMEOUT 2000 /* * General constants that are fun to know. |