Remove the bootconfig parsing. We never used it and always passed either an

empty string or NULL to the setup functions that called into it.

15 files changed, 29 insertions, 345 deletions

diff --git a/sys/arm/arm/bootconfig.c b/sys/arm/arm/bootconfig.c
deleted file mode 100644
index 3e9397e6667a..000000000000
--- a/sys/arm/arm/bootconfig.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/*	$NetBSD: bootconfig.c,v 1.2 2002/03/10 19:56:39 lukem Exp $	*/
-
-/*-
- * Copyright (c) 1994-1998 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by Mark Brinicombe
- *	for the NetBSD Project.
- * 4. The name of the company nor the name of the author may be used to
- *    endorse or promote products derived from this software without specific
- *    prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-
-#include <sys/systm.h>
-
-#include <machine/bootconfig.h>
-
-
-/*
- * Function to identify and process different types of boot argument
- */
-
-int
-get_bootconf_option(opts, opt, type, result)
-	char *opts;
-	char *opt;
-	int type;
-	void *result;
-{
-	char *ptr;
-	char *optstart;
-	int not;
-
-	ptr = opts;
-
-	while (*ptr) {
-		/* Find start of option */
-		while (*ptr == ' ' || *ptr == '\t')
-			++ptr;
-
-		if (*ptr == 0)
-			break;
-
-		not = 0;
-
-		/* Is it a negate option */
-		if ((type & BOOTOPT_TYPE_MASK) == BOOTOPT_TYPE_BOOLEAN && *ptr == '!') {
-			not = 1;
-			++ptr;
-		}
-
-		/* Find the end of option */
-		optstart = ptr;
-		while (*ptr != 0 && *ptr != ' ' && *ptr != '\t' && *ptr != '=')
-			++ptr;
-
-		if ((*ptr == '=')
-		    || (*ptr != '=' && ((type & BOOTOPT_TYPE_MASK) == BOOTOPT_TYPE_BOOLEAN))) {
-			/* compare the option */
-			if (strncmp(optstart, opt, (ptr - optstart)) == 0) {
-				/* found */
-
-				if (*ptr == '=')
-					++ptr;
-
-				switch(type & BOOTOPT_TYPE_MASK) {
-				case BOOTOPT_TYPE_BOOLEAN :
-					if (*(ptr - 1) == '=')
-						*((int *)result) = ((u_int)strtoul(ptr, NULL, 10) != 0);
-					else
-						*((int *)result) = !not;
-					break;
-				case BOOTOPT_TYPE_STRING :
-					*((char **)result) = ptr;
-					break;			
-				case BOOTOPT_TYPE_INT :
-					*((int *)result) = (u_int)strtoul(ptr, NULL, 10);
-					break;
-				case BOOTOPT_TYPE_BININT :
-					*((int *)result) = (u_int)strtoul(ptr, NULL, 2);
-					break;
-				case BOOTOPT_TYPE_HEXINT :
-					*((int *)result) = (u_int)strtoul(ptr, NULL, 16);
-					break;
-				default:
-					return(0);
-				}
-				return(1);
-			}
-		}
-		/* skip to next option */
-		while (*ptr != ' ' && *ptr != '\t' && *ptr != 0)
-			++ptr;
-	}
-	return(0);
-}
diff --git a/sys/arm/arm/cpufunc.c b/sys/arm/arm/cpufunc.c
index 2160e20c6457..e629d2a131bc 100644
--- a/sys/arm/arm/cpufunc.c
+++ b/sys/arm/arm/cpufunc.c
@@ -59,7 +59,6 @@ __FBSDID("$FreeBSD$");
 
 #include <machine/cpuconf.h>
 #include <machine/cpufunc.h>
-#include <machine/bootconfig.h>
 
 #ifdef CPU_XSCALE_80200
 #include <arm/xscale/i80200/i80200reg.h>
@@ -1158,75 +1157,9 @@ cpufunc_null_fixup(arg)
  * CPU Setup code
  */
 
-#if defined (CPU_ARM9) || \
-  defined(CPU_ARM9E) || \
-  defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) ||		\
-  defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) ||		\
-  defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \
-  defined(CPU_ARM1136) || defined(CPU_ARM1176) ||\
-  defined(CPU_FA526) || defined(CPU_FA626TE)
-
-#define IGN	0
-#define OR	1
-#define BIC	2
-
-struct cpu_option {
-	char	*co_name;
-	int	co_falseop;
-	int	co_trueop;
-	int	co_value;
-};
-
-static u_int parse_cpu_options(char *, struct cpu_option *, u_int);
-
-static u_int
-parse_cpu_options(args, optlist, cpuctrl)
-	char *args;
-	struct cpu_option *optlist;
-	u_int cpuctrl;
-{
-	int integer;
-
-	if (args == NULL)
-		return(cpuctrl);
-
-	while (optlist->co_name) {
-		if (get_bootconf_option(args, optlist->co_name,
-		    BOOTOPT_TYPE_BOOLEAN, &integer)) {
-			if (integer) {
-				if (optlist->co_trueop == OR)
-					cpuctrl |= optlist->co_value;
-				else if (optlist->co_trueop == BIC)
-					cpuctrl &= ~optlist->co_value;
-			} else {
-				if (optlist->co_falseop == OR)
-					cpuctrl |= optlist->co_value;
-				else if (optlist->co_falseop == BIC)
-					cpuctrl &= ~optlist->co_value;
-			}
-		}
-		++optlist;
-	}
-	return(cpuctrl);
-}
-#endif /* CPU_ARM9 || XSCALE*/
-
 #ifdef CPU_ARM9
-struct cpu_option arm9_options[] = {
-	{ "cpu.cache",		BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-	{ "cpu.nocache",	OR,  BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-	{ "arm9.cache",	BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-	{ "arm9.icache",	BIC, OR,  CPU_CONTROL_IC_ENABLE },
-	{ "arm9.dcache",	BIC, OR,  CPU_CONTROL_DC_ENABLE },
-	{ "cpu.writebuf",	BIC, OR,  CPU_CONTROL_WBUF_ENABLE },
-	{ "cpu.nowritebuf",	OR,  BIC, CPU_CONTROL_WBUF_ENABLE },
-	{ "arm9.writebuf",	BIC, OR,  CPU_CONTROL_WBUF_ENABLE },
-	{ NULL,			IGN, IGN, 0 }
-};
-
 void
-arm9_setup(args)
-	char *args;
+arm9_setup(void)
 {
 	int cpuctrl, cpuctrlmask;
 
@@ -1247,8 +1180,6 @@ arm9_setup(args)
 	cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
 #endif
 
-	cpuctrl = parse_cpu_options(args, arm9_options, cpuctrl);
-
 #ifdef __ARMEB__
 	cpuctrl |= CPU_CONTROL_BEND_ENABLE;
 #endif
@@ -1266,21 +1197,8 @@ arm9_setup(args)
 #endif	/* CPU_ARM9 */
 
 #if defined(CPU_ARM9E)
-struct cpu_option arm10_options[] = {
-	{ "cpu.cache",		BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-	{ "cpu.nocache",	OR,  BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-	{ "arm10.cache",	BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-	{ "arm10.icache",	BIC, OR,  CPU_CONTROL_IC_ENABLE },
-	{ "arm10.dcache",	BIC, OR,  CPU_CONTROL_DC_ENABLE },
-	{ "cpu.writebuf",	BIC, OR,  CPU_CONTROL_WBUF_ENABLE },
-	{ "cpu.nowritebuf",	OR,  BIC, CPU_CONTROL_WBUF_ENABLE },
-	{ "arm10.writebuf",	BIC, OR,  CPU_CONTROL_WBUF_ENABLE },
-	{ NULL,			IGN, IGN, 0 }
-};
-
 void
-arm10_setup(args)
-	char *args;
+arm10_setup(void)
 {
 	int cpuctrl, cpuctrlmask;
 
@@ -1298,8 +1216,6 @@ arm10_setup(args)
 	cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
 #endif
 
-	cpuctrl = parse_cpu_options(args, arm10_options, cpuctrl);
-
 #ifdef __ARMEB__
 	cpuctrl |= CPU_CONTROL_BEND_ENABLE;
 #endif
@@ -1370,17 +1286,8 @@ cpu_scc_setup_ccnt(void)
 #endif
 
 #if defined(CPU_ARM1136) || defined(CPU_ARM1176)
-struct cpu_option arm11_options[] = {
-	{ "cpu.cache",		BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-	{ "cpu.nocache",	OR,  BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-	{ "arm11.cache",	BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-	{ "arm11.icache",	BIC, OR,  CPU_CONTROL_IC_ENABLE },
-	{ "arm11.dcache",	BIC, OR,  CPU_CONTROL_DC_ENABLE },
-	{ NULL,			IGN, IGN, 0 }
-};
-
 void
-arm11x6_setup(char *args)
+arm11x6_setup(void)
 {
 	int cpuctrl, cpuctrl_wax;
 	uint32_t auxctrl, auxctrl_wax;
@@ -1415,8 +1322,6 @@ arm11x6_setup(char *args)
 	cpuctrl |= CPU_CONTROL_BPRD_ENABLE;
 	cpuctrl |= CPU_CONTROL_V6_EXTPAGE;
 
-	cpuctrl = parse_cpu_options(args, arm11_options, cpuctrl);
-
 #ifdef __ARMEB__
 	cpuctrl |= CPU_CONTROL_BEND_ENABLE;
 #endif
@@ -1479,8 +1384,7 @@ arm11x6_setup(char *args)
 
 #ifdef CPU_MV_PJ4B
 void
-pj4bv7_setup(args)
-	char *args;
+pj4bv7_setup(void)
 {
 	int cpuctrl;
 
@@ -1516,7 +1420,7 @@ pj4bv7_setup(args)
 #if defined(CPU_CORTEXA) || defined(CPU_KRAIT)
 
 void
-cortexa_setup(char *args)
+cortexa_setup(void)
 {
 	int cpuctrl, cpuctrlmask;
 	
@@ -1563,23 +1467,8 @@ cortexa_setup(char *args)
 #endif  /* CPU_CORTEXA */
 
 #if defined(CPU_FA526) || defined(CPU_FA626TE)
-struct cpu_option fa526_options[] = {
-#ifdef COMPAT_12
-	{ "nocache",		IGN, BIC, (CPU_CONTROL_IC_ENABLE |
-					   CPU_CONTROL_DC_ENABLE) },
-	{ "nowritebuf",		IGN, BIC, CPU_CONTROL_WBUF_ENABLE },
-#endif	/* COMPAT_12 */
-	{ "cpu.cache",		BIC, OR,  (CPU_CONTROL_IC_ENABLE |
-					   CPU_CONTROL_DC_ENABLE) },
-	{ "cpu.nocache",	OR,  BIC, (CPU_CONTROL_IC_ENABLE |
-					   CPU_CONTROL_DC_ENABLE) },
-	{ "cpu.writebuf",	BIC, OR,  CPU_CONTROL_WBUF_ENABLE },
-	{ "cpu.nowritebuf",	OR,  BIC, CPU_CONTROL_WBUF_ENABLE },
-	{ NULL,			IGN, IGN, 0 }
-};
-
 void
-fa526_setup(char *args)
+fa526_setup(void)
 {
 	int cpuctrl, cpuctrlmask;
 
@@ -1600,8 +1489,6 @@ fa526_setup(char *args)
 	cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
 #endif
 
-	cpuctrl = parse_cpu_options(args, fa526_options, cpuctrl);
-
 #ifdef __ARMEB__
 	cpuctrl |= CPU_CONTROL_BEND_ENABLE;
 #endif
@@ -1621,24 +1508,8 @@ fa526_setup(char *args)
 #if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
   defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
   defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342)
-struct cpu_option xscale_options[] = {
-#ifdef COMPAT_12
-	{ "branchpredict", 	BIC, OR,  CPU_CONTROL_BPRD_ENABLE },
-	{ "nocache",		IGN, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-#endif	/* COMPAT_12 */
-	{ "cpu.branchpredict", 	BIC, OR,  CPU_CONTROL_BPRD_ENABLE },
-	{ "cpu.cache",		BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-	{ "cpu.nocache",	OR,  BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-	{ "xscale.branchpredict", BIC, OR,  CPU_CONTROL_BPRD_ENABLE },
-	{ "xscale.cache",	BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-	{ "xscale.icache",	BIC, OR,  CPU_CONTROL_IC_ENABLE },
-	{ "xscale.dcache",	BIC, OR,  CPU_CONTROL_DC_ENABLE },
-	{ NULL,			IGN, IGN, 0 }
-};
-
 void
-xscale_setup(args)
-	char *args;
+xscale_setup(void)
 {
 	uint32_t auxctl;
 	int cpuctrl, cpuctrlmask;
@@ -1667,8 +1538,6 @@ xscale_setup(args)
 	cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
 #endif
 
-	cpuctrl = parse_cpu_options(args, xscale_options, cpuctrl);
-
 #ifdef __ARMEB__
 	cpuctrl |= CPU_CONTROL_BEND_ENABLE;
 #endif
diff --git a/sys/arm/arm/machdep.c b/sys/arm/arm/machdep.c
index a8f2dd67ff3e..68d31a94a520 100644
--- a/sys/arm/arm/machdep.c
+++ b/sys/arm/arm/machdep.c
@@ -1257,7 +1257,7 @@ initarm(struct arm_boot_params *abp)
 	 * Now that proper page tables are installed, call cpu_setup() to enable
 	 * instruction and data caches and other chip-specific features.
 	 */
-	cpu_setup("");
+	cpu_setup();
 
 	/*
 	 * Only after the SOC registers block is mapped we can perform device
@@ -1403,7 +1403,7 @@ initarm(struct arm_boot_params *abp)
 	 * Now that proper page tables are installed, call cpu_setup() to enable
 	 * instruction and data caches and other chip-specific features.
 	 */
-	cpu_setup("");
+	cpu_setup();
 
 	/* Platform-specific initialisation */
 	platform_probe_and_attach();
diff --git a/sys/arm/arm/mp_machdep.c b/sys/arm/arm/mp_machdep.c
index fff34c41a69c..55ba3559d2a6 100644
--- a/sys/arm/arm/mp_machdep.c
+++ b/sys/arm/arm/mp_machdep.c
@@ -155,14 +155,14 @@ init_secondary(int cpu)
 #ifdef ARM_NEW_PMAP
 	pmap_set_tex();
 	reinit_mmu(pmap_kern_ttb, (1<<6) | (1<< 0), (1<<6) | (1<< 0));
-	cpu_setup("");
+	cpu_setup();
 
 	/* Provide stack pointers for other processor modes. */
 	set_stackptrs(cpu);
 
 	enable_interrupts(PSR_A);
 #else /* ARM_NEW_PMAP */
-	cpu_setup(NULL);
+	cpu_setup();
 	setttb(pmap_pa);
 	cpu_tlb_flushID();
 #endif /* ARM_NEW_PMAP */
diff --git a/sys/arm/at91/at91_machdep.c b/sys/arm/at91/at91_machdep.c
index 293a352cb101..170d0296a077 100644
--- a/sys/arm/at91/at91_machdep.c
+++ b/sys/arm/at91/at91_machdep.c
@@ -606,7 +606,7 @@ initarm(struct arm_boot_params *abp)
 	 * of the stack memory.
 	 */
 	cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
-	cpu_setup("");
+	cpu_setup();
 
 	set_stackptrs(0);
 
diff --git a/sys/arm/cavium/cns11xx/econa_machdep.c b/sys/arm/cavium/cns11xx/econa_machdep.c
index b2c388f04359..b49053598718 100644
--- a/sys/arm/cavium/cns11xx/econa_machdep.c
+++ b/sys/arm/cavium/cns11xx/econa_machdep.c
@@ -303,7 +303,7 @@ initarm(struct arm_boot_params *abp)
 	 * this problem will not occur after initarm().
 	 */
 	cpu_idcache_wbinv_all();
-	cpu_setup("");
+	cpu_setup();
 
 	undefined_init();
 
diff --git a/sys/arm/include/bootconfig.h b/sys/arm/include/bootconfig.h
deleted file mode 100644
index 43d8ac3850ef..000000000000
--- a/sys/arm/include/bootconfig.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*	$NetBSD: bootconfig.h,v 1.1 2001/05/13 13:46:23 bjh21 Exp $	*/
-
-/*-
- * Copyright (c) 1994 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by Mark Brinicombe
- *	for the NetBSD Project.
- * 4. The name of the company nor the name of the author may be used to
- *    endorse or promote products derived from this software without specific
- *    prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_BOOTCONFIG_H_
-#define _MACHINE_BOOTCONFIG_H_
-
-#ifdef _KERNEL
-#define BOOTOPT_TYPE_BOOLEAN		0
-#define BOOTOPT_TYPE_STRING		1
-#define BOOTOPT_TYPE_INT		2
-#define BOOTOPT_TYPE_BININT		3
-#define BOOTOPT_TYPE_HEXINT		4
-#define BOOTOPT_TYPE_MASK		7
-
-int get_bootconf_option (char *, char *, int, void *);
-
-extern char *boot_args;
-extern char *boot_file;
-#endif	/* _KERNEL */
-
-#endif /* !_MACHINE_BOOTCONFIG_H_ */
diff --git a/sys/arm/include/cpufunc.h b/sys/arm/include/cpufunc.h
index 87a6942e8167..0ea26df953b9 100644
--- a/sys/arm/include/cpufunc.h
+++ b/sys/arm/include/cpufunc.h
@@ -169,7 +169,7 @@ struct cpu_functions {
 
 	void	(*cf_context_switch)	(void);
 
-	void	(*cf_setup)		(char *string);
+	void	(*cf_setup)		(void);
 };
 
 extern struct cpu_functions cpufuncs;
@@ -268,7 +268,7 @@ void tlb_broadcast(int);
 #define ABORT_FIXUP_FAILED	1	/* fixup failed */
 #define ABORT_FIXUP_RETURN	2	/* abort handler should return */
 
-#define cpu_setup(a)			cpufuncs.cf_setup(a)
+#define cpu_setup()			cpufuncs.cf_setup()
 
 int	set_cpufuncs		(void);
 #define ARCHITECTURE_NOT_PRESENT	1	/* known but not configured */
@@ -287,7 +287,7 @@ u_int	cpufunc_faultaddress	(void);
 u_int	cpu_pfr			(int);
 
 #if defined(CPU_FA526) || defined(CPU_FA626TE)
-void	fa526_setup		(char *arg);
+void	fa526_setup		(void);
 void	fa526_setttb		(u_int ttb);
 void	fa526_context_switch	(void);
 void	fa526_cpu_sleep		(int);
@@ -325,7 +325,7 @@ void	arm9_idcache_wbinv_range (vm_offset_t, vm_size_t);
 
 void	arm9_context_switch	(void);
 
-void	arm9_setup		(char *string);
+void	arm9_setup		(void);
 
 extern unsigned arm9_dcache_sets_max;
 extern unsigned arm9_dcache_sets_inc;
@@ -339,7 +339,7 @@ void	arm10_tlb_flushI_SE	(u_int);
 
 void	arm10_context_switch	(void);
 
-void	arm10_setup		(char *string);
+void	arm10_setup		(void);
 
 u_int	sheeva_control_ext 		(u_int, u_int);
 void	sheeva_cpu_sleep		(int);
@@ -372,18 +372,18 @@ void	armv7_dcache_wbinv_range	(vm_offset_t, vm_size_t);
 void	armv7_dcache_inv_range		(vm_offset_t, vm_size_t);
 void	armv7_dcache_wb_range		(vm_offset_t, vm_size_t);
 void	armv7_cpu_sleep			(int);
-void	armv7_setup			(char *string);
+void	armv7_setup			(void);
 void	armv7_context_switch		(void);
 void	armv7_drain_writebuf		(void);
 void	armv7_sev			(void);
 void	armv7_sleep			(int unused);
 u_int	armv7_auxctrl			(u_int, u_int);
-void	pj4bv7_setup			(char *string);
+void	pj4bv7_setup			(void);
 void	pj4b_config			(void);
 
 void	armadaxp_idcache_wbinv_all	(void);
 
-void 	cortexa_setup			(char *);
+void 	cortexa_setup			(void);
 #endif
 
 #if defined(CPU_ARM1136) || defined(CPU_ARM1176)
@@ -411,7 +411,7 @@ void    arm11x6_icache_sync_all         (void);
 void    arm11x6_flush_prefetchbuf       (void);
 void    arm11x6_icache_sync_range       (vm_offset_t, vm_size_t);
 void    arm11x6_idcache_wbinv_range     (vm_offset_t, vm_size_t);
-void    arm11x6_setup                   (char *string);
+void    arm11x6_setup                   (void);
 void    arm11x6_sleep                   (int);  /* no ref. for errata */
 #endif
 #if defined(CPU_ARM1136)
@@ -488,7 +488,7 @@ void	xscale_cache_flushD_rng	(vm_offset_t start, vm_size_t end);
 
 void	xscale_context_switch	(void);
 
-void	xscale_setup		(char *string);
+void	xscale_setup		(void);
 #endif	/* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425
 	   CPU_XSCALE_80219 */
 
diff --git a/sys/arm/samsung/s3c2xx0/s3c24x0_machdep.c b/sys/arm/samsung/s3c2xx0/s3c24x0_machdep.c
index 411447b416cc..fa60be53ea1f 100644
--- a/sys/arm/samsung/s3c2xx0/s3c24x0_machdep.c
+++ b/sys/arm/samsung/s3c2xx0/s3c24x0_machdep.c
@@ -350,7 +350,7 @@ initarm(struct arm_boot_params *abp)
 	 * this problem will not occur after initarm().
 	 */
 	cpu_idcache_wbinv_all();
-	cpu_setup("");
+	cpu_setup();
 
 	/* Disable all peripheral interrupts */
 	ioreg_write32(S3C24X0_INTCTL_BASE + INTCTL_INTMSK, ~0);
diff --git a/sys/arm/xscale/i80321/ep80219_machdep.c b/sys/arm/xscale/i80321/ep80219_machdep.c
index f04f7fdef977..ad9190cfe3d6 100644
--- a/sys/arm/xscale/i80321/ep80219_machdep.c
+++ b/sys/arm/xscale/i80321/ep80219_machdep.c
@@ -305,7 +305,7 @@ initarm(struct arm_boot_params *abp)
 	 * this problem will not occur after initarm().
 	 */
 	cpu_idcache_wbinv_all();
-	cpu_setup("");
+	cpu_setup();
 
 	/*
 	 * Fetch the SDRAM start/size from the i80321 SDRAM configration
diff --git a/sys/arm/xscale/i80321/iq31244_machdep.c b/sys/arm/xscale/i80321/iq31244_machdep.c
index 1a1b9e72fc79..681238780674 100644
--- a/sys/arm/xscale/i80321/iq31244_machdep.c
+++ b/sys/arm/xscale/i80321/iq31244_machdep.c
@@ -306,7 +306,7 @@ initarm(struct arm_boot_params *abp)
 	 * this problem will not occur after initarm().
 	 */
 	cpu_idcache_wbinv_all();
-	cpu_setup("");
+	cpu_setup();
 
 	/*
 	 * Fetch the SDRAM start/size from the i80321 SDRAM configration
diff --git a/sys/arm/xscale/i8134x/crb_machdep.c b/sys/arm/xscale/i8134x/crb_machdep.c
index 3e6440d4b012..1ea82eead136 100644
--- a/sys/arm/xscale/i8134x/crb_machdep.c
+++ b/sys/arm/xscale/i8134x/crb_machdep.c
@@ -290,7 +290,7 @@ initarm(struct arm_boot_params *abp)
 	 * this problem will not occur after initarm().
 	 */
 	cpu_idcache_wbinv_all();
-	cpu_setup("");
+	cpu_setup();
 
 	i80321_calibrate_delay();
 	i81342_sdram_bounds(obio_bs_tag, IOP34X_VADDR, &memstart, &memsize);
diff --git a/sys/arm/xscale/ixp425/avila_machdep.c b/sys/arm/xscale/ixp425/avila_machdep.c
index cd5bb06e03ba..cbcd0fb696da 100644
--- a/sys/arm/xscale/ixp425/avila_machdep.c
+++ b/sys/arm/xscale/ixp425/avila_machdep.c
@@ -376,7 +376,7 @@ initarm(struct arm_boot_params *abp)
 	 * this problem will not occur after initarm().
 	 */
 	cpu_idcache_wbinv_all();
-	cpu_setup("");
+	cpu_setup();
 
 	/* ready to setup the console (XXX move earlier if possible) */
 	cninit();
diff --git a/sys/arm/xscale/pxa/pxa_machdep.c b/sys/arm/xscale/pxa/pxa_machdep.c
index 130e0f383a9a..51b1efc59b50 100644
--- a/sys/arm/xscale/pxa/pxa_machdep.c
+++ b/sys/arm/xscale/pxa/pxa_machdep.c
@@ -291,7 +291,7 @@ initarm(struct arm_boot_params *abp)
 	 * this problem will not occur after initarm().
 	 */
 	cpu_idcache_wbinv_all();
-	cpu_setup("");
+	cpu_setup();
 
 	/*
 	 * Sort out bus_space for on-board devices.
diff --git a/sys/conf/files.arm b/sys/conf/files.arm
index d9f7f0ddb5cf..bffb58894723 100644
--- a/sys/conf/files.arm
+++ b/sys/conf/files.arm
@@ -3,7 +3,6 @@ arm/arm/autoconf.c		standard
 arm/arm/bcopy_page.S		standard
 arm/arm/bcopyinout.S		standard
 arm/arm/blockio.S		standard
-arm/arm/bootconfig.c		standard
 arm/arm/bus_space_asm_generic.S	standard
 arm/arm/busdma_machdep.c 	optional	!armv6
 arm/arm/busdma_machdep-v6.c 	optional	armv6