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author | Alan Cox <alc@FreeBSD.org> | 2025-06-28 19:49:26 +0000 |
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committer | Alan Cox <alc@FreeBSD.org> | 2025-07-03 21:30:02 +0000 |
commit | 1c1acaf6858be301384fd20b402cf2df831507a7 (patch) | |
tree | 9a2594bb95ea16cb3c1e2e7acdca7de55eb95187 /tests/sys/opencrypto/(developers-only) | |
parent | 906d7a4b521c19b2b1ae3ec844b5d4626f2fd529 (diff) |
Setting this option tells AMD processors that targeted TLB invalidation
instructions, such as invlpg, only have to invalidate cached entries
from the upper levels of the page table that lie along the path to the
targeted virtual address. Otherwise, by default, all cached entries
from the upper levels of the page table are invalidated.
After unmapping a page table page we always perform a TLB invalidation
that will invalidate any cached references to that page table page, so
this option is safe to enable.
Reviewed by: kib, markj
Tested by: dougm
Differential Revision: https://reviews.freebsd.org/D51093
Diffstat (limited to 'tests/sys/opencrypto/(developers-only)')
0 files changed, 0 insertions, 0 deletions