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authorTim Hostetler <thostet@google.com>2026-11-04 23:25:00 +0000
committerMark Johnston <markj@FreeBSD.org>2026-11-04 23:25:44 +0000
commit9d48e88e023634e12530bf9db4a2e85d022b93db (patch)
treea4baf8ad78a73e04f158bd9b4053d09fc51631db /usr.sbin/config/configvers.h
parent64ea2b980884adcc774b04b2c0d206ced711bd76 (diff)
gve: Page-align DQO descriptor and completion ringsHEADmain
Currently, gve_rx_alloc_ring_dqo() and gve_tx_alloc_ring_dqo() request CACHE_LINE_SIZE alignment when allocating DMA memory for the DQO TX/RX descriptor and completion rings. The device requires stronger alignment than cache line alignment, which was incidentally being met due to how the kernel allocates memory. Explicitly meet this requirement by requesting page aligned memory. Signed-off-by: Tim Hostetler <thostet@google.com> Reviewed by: markj, Jasper Tran O'Leary <jtranoleary@google.com> MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D61211
Diffstat (limited to 'usr.sbin/config/configvers.h')
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