diff options
560 files changed, 23666 insertions, 18496 deletions
diff --git a/COPYRIGHT b/COPYRIGHT index 9f8b3d4c01d6..f7134c977fa6 100644 --- a/COPYRIGHT +++ b/COPYRIGHT @@ -2,7 +2,7 @@ The compilation of software known as FreeBSD is distributed under the following terms: -Copyright (c) 1992-2025 The FreeBSD Project. +Copyright (c) 1992-2026 The FreeBSD Project. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions @@ -22,7 +22,7 @@ # kernel - buildkernel + installkernel. # kernel-toolchain - Builds the subset of world necessary to build a kernel # kernel-toolchains - Build kernel-toolchain for all universe targets. -# doxygen - Build API documentation of the kernel, needs doxygen. +# doxygen - Build API documentation of the kernel, needs doxygen, TeX, and graphviz. # checkworld - Run test suite on installed world. # check-old - List obsolete directories/files/libraries. # check-old-dirs - List obsolete directories. @@ -537,7 +537,7 @@ packages update-packages: .PHONY # Don't build rarely used, semi-supported architectures unless requested. # .if defined(EXTRA_TARGETS) -EXTRA_ARCHES_powerpc= powerpc powerpcspe +EXTRA_ARCHES_powerpc= powerpc .endif TARGETS?= ${TARGET_MACHINE_LIST} _UNIVERSE_TARGETS= ${TARGETS} @@ -804,7 +804,7 @@ universe_epilogue: .PHONY .MAKE.MODE= normal # Normally the things we run from here don't either. # Using -DWITH_META_MODE -# we can buildworld with meta files created which are useful +# we can buildworld with meta files created which are useful # for debugging, but without any of the rest of a meta mode build. MK_DIRDEPS_BUILD= no MK_STAGING= no diff --git a/Makefile.inc1 b/Makefile.inc1 index 9518d4034afc..03097d2d5209 100644 --- a/Makefile.inc1 +++ b/Makefile.inc1 @@ -2,7 +2,7 @@ # # Make command line options: # -DNO_CLEANDIR run ${MAKE} clean, instead of ${MAKE} cleandir -# -DNO_CLEAN do not clean at all +# -DNO_CLEAN do not clean at all (enabled by default) # -DDB_FROM_SRC use the user/group databases in src/etc instead of # the system database when installing. # -DNO_SHARE do not go into share subdir @@ -151,7 +151,6 @@ KNOWN_ARCHES?= aarch64/arm64 \ powerpc \ powerpc64/powerpc \ powerpc64le/powerpc \ - powerpcspe/powerpc \ riscv64/riscv .if ${TARGET} == ${TARGET_ARCH} @@ -1071,10 +1070,12 @@ _sanity_check: .PHONY .MAKE # tree changes, particularly with respect to removing source files and # replacing generated files. Handle these cases here in an ad-hoc fashion. _cleanobj_fast_depend_hack: .PHONY +.if ${MK_DEPEND_CLEANUP} != "no" @echo ">>> Deleting stale dependencies..."; MACHINE=${MACHINE} MACHINE_ARCH=${MACHINE_ARCH} \ - ALL_libcompats=${_ALL_libcompats:Q} \ + ALL_libcompats=${_ALL_libcompats:Q} MAKE=${MAKE} \ sh ${.CURDIR}/tools/build/depend-cleanup.sh ${OBJTOP} ${SRCTOP} +.endif _cleanworldtmp: .PHONY .if ${MK_CLEAN} == "yes" @@ -1168,7 +1169,7 @@ _cleanobj: .endfor .else ${_+_}cd ${.CURDIR}; env CLEANMK="_NO_INCLUDE_COMPILERMK=t ${CLEANDIR}" \ - MAKE=${MAKE} ${WMAKE} _cleanobj_fast_depend_hack + ${WMAKE} _cleanobj_fast_depend_hack .endif # ${MK_CLEAN} == "yes" _obj: @echo @@ -1354,28 +1355,6 @@ __installcheck_DESTDIR: .PHONY .endif .endif -# -# Don't allow installworld or installkernel on a pkgbase system. This avoids -# accidentally updating a pkgbase system with install{world,kernel}, causing -# the installed system to become out of date with the package database. -# -# Skip the check if DESTDIR is defined on the assumption the user knows what -# they're doing. This means the check can be disabled for the running system -# using DESTDIR=/. -# -.if !make(distributeworld) && !defined(DESTDIR) -_installcheck_world: __installcheck_PKG -_installcheck_kernel: __installcheck_PKG -__installcheck_PKG: .PHONY -.if exists(${LOCALBASE}/sbin/pkg-static) - @if ${LOCALBASE}/sbin/pkg-static info -e ${PKG_NAME_PREFIX}-runtime; then \ - echo >&2 "ERROR: This target should not be used on a system installed from packages." ; \ - echo >&2 " To override this check, set DESTDIR=/."; \ - false; \ - fi -.endif -.endif - .if !defined(DB_FROM_SRC) # # Check for missing UIDs/GIDs. @@ -1725,7 +1704,6 @@ KERNCONF=${KERNFAST} .endif GENERIC_KERNCONF_SUFX_powerpc64= 64 GENERIC_KERNCONF_SUFX_powerpc64le= 64LE -GENERIC_KERNCONF_powerpcspe= MPC85XXSPE GENERIC_KERNCONF?= ${GENERIC_KERNCONF_${TARGET_ARCH}:UGENERIC${GENERIC_KERNCONF_SUFX_${TARGET_ARCH}}} INSTKERNNAME?= kernel @@ -1753,10 +1731,6 @@ KERNCONF?= ${GENERIC_KERNCONF} BUILDKERNELS= INSTALLKERNEL= -.if defined(NO_INSTALLKERNEL) -# All of the BUILDKERNELS loops start at index 1. -BUILDKERNELS+= dummy -.endif .for _kernel in ${KERNCONF} .if !defined(_MKSHOWCONFIG) && exists(${KERNCONFDIR}/${_kernel}) BUILDKERNELS+= ${_kernel} @@ -1798,12 +1772,12 @@ _BUILDKERNEL_START!= date '+%s' # Builds all kernels defined by BUILDKERNELS. # buildkernel: .MAKE .PHONY -.if empty(BUILDKERNELS:Ndummy) +.if empty(BUILDKERNELS) @echo "ERROR: Missing kernel configuration file(s) (${KERNCONF})."; \ false .endif @echo -.for _kernel in ${BUILDKERNELS:Ndummy} +.for _kernel in ${BUILDKERNELS} @echo "--------------------------------------------------------------" @echo ">>> Kernel build for ${_kernel} started on `LC_ALL=C date`" @echo "--------------------------------------------------------------" @@ -1865,6 +1839,79 @@ NO_INSTALLEXTRAKERNELS?= yes NO_INSTALLEXTRAKERNELS?= no .endif +.if ${NO_INSTALLEXTRAKERNELS} != "yes" +.if defined(NO_INSTALLKERNEL) +INSTALLEXTRAKERNELS= ${BUILDKERNELS} +.elif ${BUILDKERNELS:[#]} > 1 +# First kernel is installed separately by INSTALLKERNEL, typically to +# /boot/kernel, rather than to a config-suffixed directory. +INSTALLEXTRAKERNELS= ${BUILDKERNELS:[2..-1]} +.else +INSTALLEXTRAKERNELS= +.endif +.endif + +# +# Don't allow installworld or installkernel on a pkgbase system. This avoids +# accidentally updating a pkgbase system with install{world,kernel}, causing +# the installed system to become out of date with the package database. +# +# Skip the check if DESTDIR is defined on the assumption the user knows what +# they're doing. This means the check can be disabled for the running system +# using DESTDIR=/. +# +# People who want to disable this check permanently may set two variables in +# /etc/make.conf, ALLOW_PKGBASE_INSTALLKERNEL and ALLOW_PKGBASE_INSTALLWORLD, +# to disable these checks. That doesn't stop this from breaking your system, +# it just stops make from warning about it. +# +.if !make(distributeworld) && !defined(DESTDIR) + +. if !defined(ALLOW_PKGBASE_INSTALLKERNEL) && exists(${LOCALBASE}/sbin/pkg-static) +# For installkernel, we check if this specific kernel was installed by pkg. +# This means people can continue to use installkernel for non-packaged +# kernels, which is useful for development. + +_installcheck_kernel: __installcheck_kernel_pkgbase +__installcheck_kernel_pkgbase: .PHONY +. for _kernel in ${NO_INSTALLKERNEL:D:U${INSTKERNNAME}} \ + ${INSTALLEXTRAKERNELS:S/^/${INSTKERNNAME}./} + @if ${LOCALBASE}/sbin/pkg-static which /boot/${_kernel}/kernel \ + >/dev/null 2>&1; then \ + echo >&2 "ERROR: The kernel at /boot/${_kernel} was installed from packages." ; \ + echo >&2 " A packaged kernel should never be updated using installkernel;" ; \ + echo >&2 " this will cause the package database to become out of sync with" ; \ + echo >&2 " the live system state. Either uninstall the packaged kernel," ; \ + echo >&2 " or install this kernel to a different path using INSTKERNNAME." ; \ + echo >&2 "" ; \ + echo >&2 " If you understand the risks and wish to proceed anyway, you may" ; \ + echo >&2 " set ALLOW_PKGBASE_INSTALLKERNEL=yes to override this safety check." ; \ + echo >&2 " After doing so, you should not use the pkg(8) utility until you" ; \ + echo >&2 " have resolved the inconsistency between the installed system and" ; \ + echo >&2 " the package database." ; \ + false; \ + fi +. endfor +. endif # !defined(ALLOW_PKGBASE_INSTALLKERNEL) && exists(pkg-static) + +. if !defined(ALLOW_PKGBASE_INSTALLWORLD) && exists(${LOCALBASE}/sbin/pkg-static) +_installcheck_world: __installcheck_world_pkgbase +__installcheck_world_pkgbase: .PHONY + @if ${LOCALBASE}/sbin/pkg-static info -e ${PKG_NAME_PREFIX}-runtime; then \ + echo >&2 "ERROR: This target should never be used on a system installed from packages;" ; \ + echo >&2 " doing so will cause the package database to become out of sync with" ; \ + echo >&2 " the live system state." ; \ + echo >&2 "" ; \ + echo >&2 " If you understand the risks and wish to proceed anyway, you may" ; \ + echo >&2 " set ALLOW_PKGBASE_INSTALLWORLD=yes to override this safety check." ; \ + echo >&2 " After doing so, you should not use the pkg(8) utility until you" ; \ + echo >&2 " have resolved the inconsistency between the installed system and" ; \ + echo >&2 " the package database." ; \ + false; \ + fi +. endif # !defined(ALLOW_PKGBASE_INSTALLWORLD) && exists(pkg-static) +.endif # !make(distributeworld) && !defined(DESTDIR) + # # installkernel, etc. # @@ -1891,8 +1938,8 @@ reinstallkernel reinstallkernel.debug: _installcheck_kernel .PHONY echo ">>> Install kernel(s) ${INSTALLKERNEL} completed in $$seconds seconds, ncpu: $$(${_ncpu_cmd})${.MAKE.JOBS:S/^/, make -j/}" @echo "--------------------------------------------------------------" .endif -.if ${BUILDKERNELS:[#]} > 1 && ${NO_INSTALLEXTRAKERNELS} != "yes" -.for _kernel in ${BUILDKERNELS:[2..-1]} +.if !empty(INSTALLEXTRAKERNELS) +.for _kernel in ${INSTALLEXTRAKERNELS} @echo "--------------------------------------------------------------" @echo ">>> Installing kernel ${_kernel} $$(LC_ALL=C date)" @echo "--------------------------------------------------------------" @@ -1929,8 +1976,8 @@ distributekernel distributekernel.debug: .PHONY ${METALOG_SORT_CMD} >> ${DESTDIR}/${DISTDIR}/kernel.meta .endif .endif -.if ${BUILDKERNELS:[#]} > 1 && ${NO_INSTALLEXTRAKERNELS} != "yes" -.for _kernel in ${BUILDKERNELS:[2..-1]} +.if !empty(INSTALLEXTRAKERNELS) +.for _kernel in ${INSTALLEXTRAKERNELS} rm -f ${DESTDIR}/${DISTDIR}/kernel.${_kernel}.premeta ${_+_}cd ${KRNLOBJDIR}/${_kernel}; \ ${IMAKEENV} ${IMAKE_INSTALL:S/METALOG/kernel.${_kernel}.premeta/} \ @@ -1961,8 +2008,8 @@ packagekernel: .PHONY @${DESTDIR}/${DISTDIR}/kernel.meta | \ ${XZ_CMD} > ${DESTDIR}/${DISTDIR}/kernel-dbg.txz .endif -.if ${BUILDKERNELS:[#]} > 1 && ${NO_INSTALLEXTRAKERNELS} != "yes" -.for _kernel in ${BUILDKERNELS:[2..-1]} +.if !empty(INSTALLEXTRAKERNELS) +.for _kernel in ${INSTALLEXTRAKERNELS} cd ${DESTDIR}/${DISTDIR}/kernel.${_kernel}; \ ${TAR_CMD} cvf - --exclude '*.debug' \ @${DESTDIR}/${DISTDIR}/kernel.${_kernel}.meta | \ @@ -2330,8 +2377,8 @@ create-kernel-packages-flavor${flavor:C,^""$,${_default_flavor},}: _pkgbootstrap create-kernel-packages: .PHONY .endif -.if ${BUILDKERNELS:[#]} > 1 && ${NO_INSTALLEXTRAKERNELS} != "yes" -. for _kernel in ${BUILDKERNELS:[2..-1]} +.if !empty(INSTALLEXTRAKERNELS) +.for _kernel in ${INSTALLEXTRAKERNELS} . if exists(${KSTAGEDIR}/kernel.${_kernel}.meta) . if ${MK_DEBUG_FILES} != "no" _debug=-dbg @@ -2415,6 +2462,14 @@ doxygen: .PHONY echo "You need doxygen (devel/doxygen) to generate the API documentation of the kernel." | /usr/bin/fmt; \ exit 1; \ fi + @if [ ! -x "${LOCALBASE}/bin/tex" ]; then \ + echo "You need TeX (print/texlive-full) to generate the API documentation of the kernel." | /usr/bin/fmt; \ + exit 1; \ + fi + @if [ ! -x "${LOCALBASE}/bin/dot" ]; then \ + echo "You need graphviz (graphics/graphviz) to generate the API documentation of the kernel." | /usr/bin/fmt; \ + exit 1; \ + fi ${_+_}cd ${.CURDIR}/tools/kerneldoc/subsys; ${MAKE} obj all # @@ -27,6 +27,12 @@ NOTE TO PEOPLE WHO THINK THAT FreeBSD 16.x IS SLOW: world, or to merely disable the most expensive debugging functionality at runtime, run "ln -s 'abort:false,junk:false' /etc/malloc.conf".) +20260106: + Zstd has moved to the new "zstd" package. If you have set-minimal + installed, this package will be installed automatically, otherwise + you might want to install it manually. This change only affects + pkgbase users. + 20251222: Commit 9f49f436a9ec changed the internal KAPI between the NFS modules. As such, nfscommon, nfscl and nfsd must all be rebuilt @@ -875,6 +881,10 @@ NOTE TO PEOPLE WHO THINK THAT FreeBSD 16.x IS SLOW: belongs. Consequently, users may experience surprising results with such names when roaming to different homenets. +20211118: + Mips has been removed from universe builds. It will be removed from the + tree shortly. + 20211110: Commit b8d60729deef changed the TCP congestion control framework so that any of the included congestion control modules could be @@ -888,10 +898,6 @@ NOTE TO PEOPLE WHO THINK THAT FreeBSD 16.x IS SLOW: kernel and you are including networking, the kernel compile will fail. Also if no default is declared the kernel compile will fail. -20211118: - Mips has been removed from universe builds. It will be removed from the - tree shortly. - 20211106: Commit f0c9847a6c47 changed the arguments for VOP_ALLOCATE. The NFS modules must be rebuilt from sources and any out diff --git a/bin/df/df.c b/bin/df/df.c index db5b8b18beae..12478d23a2ea 100644 --- a/bin/df/df.c +++ b/bin/df/df.c @@ -128,11 +128,12 @@ main(int argc, char *argv[]) /* * POSIX specifically discusses the behavior of * both -k and -P. It states that the blocksize should - * be set to 1024. Thus, if this occurs, simply break - * rather than clobbering the old blocksize. + * be set to 1024. */ - if (kflag) + if (kflag) { + setenv("BLOCKSIZE", "1024", 1); break; + } setenv("BLOCKSIZE", "512", 1); hflag = 0; break; @@ -154,7 +155,7 @@ main(int argc, char *argv[]) break; case 'k': kflag++; - setenv("BLOCKSIZE", "1024", 1); + setenv("BLOCKSIZE", "1k", 1); hflag = 0; break; case 'l': diff --git a/bin/ps/keyword.c b/bin/ps/keyword.c index f05e5245f695..0562fd2e4f9d 100644 --- a/bin/ps/keyword.c +++ b/bin/ps/keyword.c @@ -35,10 +35,10 @@ */ #include <sys/param.h> -#include <sys/time.h> -#include <sys/resource.h> #include <sys/proc.h> +#include <sys/resource.h> #include <sys/sysctl.h> +#include <sys/time.h> #include <sys/user.h> #include <assert.h> diff --git a/bin/ps/ps.c b/bin/ps/ps.c index bb5102729957..94218f8cb2aa 100644 --- a/bin/ps/ps.c +++ b/bin/ps/ps.c @@ -42,13 +42,13 @@ */ #include <sys/param.h> +#include <sys/ioctl.h> #include <sys/jail.h> +#include <sys/mount.h> #include <sys/proc.h> -#include <sys/user.h> #include <sys/stat.h> -#include <sys/ioctl.h> #include <sys/sysctl.h> -#include <sys/mount.h> +#include <sys/user.h> #include <ctype.h> #include <errno.h> diff --git a/bin/sh/options.h b/bin/sh/options.h index a059e19707b1..2ce2e6ebedf2 100644 --- a/bin/sh/options.h +++ b/bin/sh/options.h @@ -74,7 +74,7 @@ extern char optval[NOPTS]; extern const char optletter[NSHORTOPTS]; #ifdef DEFINE_OPTIONS char optval[NOPTS]; -const char optletter[NSHORTOPTS] = "efIimnsxvVECabupTPh"; +const char optletter[NSHORTOPTS] __nonstring = "efIimnsxvVECabupTPh"; static const unsigned char optname[] = "\007errexit" "\006noglob" diff --git a/bin/sh/sh.1 b/bin/sh/sh.1 index affb653cd3ae..b37e4785c871 100644 --- a/bin/sh/sh.1 +++ b/bin/sh/sh.1 @@ -2373,7 +2373,7 @@ is not specified by .Va optstring or if it is missing a required argument, the option is considered invalid and: -.Bl -offset indent +.Bl -enum .It If the first character of .Va optstring diff --git a/bin/test/test.c b/bin/test/test.c index a35c5b424d3f..5ba5df5d7e44 100644 --- a/bin/test/test.c +++ b/bin/test/test.c @@ -116,7 +116,7 @@ enum token { #define TOKEN_TYPE(token) ((token) & 0xff00) static const struct t_op { - char op_text[2]; + char op_text[2] __nonstring; short op_num; } ops1[] = { {"=", STREQ}, diff --git a/cddl/lib/libdtrace/Makefile b/cddl/lib/libdtrace/Makefile index 0742d0b5cd5a..fbc6d5fbbec2 100644 --- a/cddl/lib/libdtrace/Makefile +++ b/cddl/lib/libdtrace/Makefile @@ -51,7 +51,8 @@ SRCS= dt_aggregate.c \ dt_xlator.c \ gmatch.c -DSRCS= errno.d \ +DSRCS= cam.d \ + errno.d \ io.d \ ip.d \ psinfo.d \ diff --git a/cddl/lib/libdtrace/cam.d b/cddl/lib/libdtrace/cam.d new file mode 100644 index 000000000000..b31661b0ff42 --- /dev/null +++ b/cddl/lib/libdtrace/cam.d @@ -0,0 +1,194 @@ +/*- + * Copyrtight (c) 2026 Netflix, Inc + * + * SPDX-License-Expression: BSD-2-Clause + */ + +inline string xpt_action_string[int key] = + key == 0 ? "XPT_NOOP" : + key == 1 ? "XPT_SCSI_IO" : + key == 2 ? "XPT_GDEV_TYPE" : + key == 3 ? "XPT_GDEVLIST" : + key == 4 ? "XPT_PATH_INQ" : + key == 5 ? "XPT_REL_SIMQ" : + key == 6 ? "XPT_SASYNC_CB" : + key == 7 ? "XPT_SDEV_TYPE" : + key == 8 ? "XPT_SCAN_BUS" : + key == 9 ? "XPT_DEV_MATCH" : + key == 10 ? "XPT_DEBUG" : + key == 11 ? "XPT_PATH_STATS" : + key == 12 ? "XPT_GDEV_STATS" : + key == 13 ? "XPT_0X0d" : + key == 14 ? "XPT_DEV_ADVINFO" : + key == 15 ? "XPT_ASYNC" : + key == 16 ? "XPT_ABORT" : + key == 17 ? "XPT_RESET_BUS" : + key == 18 ? "XPT_RESET_DEV" : + key == 19 ? "XPT_TERM_IO" : + key == 20 ? "XPT_SCAN_LUN" : + key == 21 ? "XPT_GET_TRAN_SETTINGS" : + key == 22 ? "XPT_SET_TRAN_SETTINGS" : + key == 23 ? "XPT_CALC_GEOMETRY" : + key == 24 ? "XPT_ATA_IO" : + key == 25 ? "XPT_SET_SIM_KNOB" : + key == 26 ? "XPT_GET_SIM_KNOB" : + key == 27 ? "XPT_SMP_IO" : + key == 28 ? "XPT_NVME_IO" : + key == 29 ? "XPT_MMC_IO" : + key == 30 ? "XPT_SCAN_TGT" : + key == 31 ? "XPT_NVME_ADMIN" : + "Too big" ; + +inline string xpt_async_string[int key] = + key == 0x1 ? "AC_BUS_RESET" : + key == 0x2 ? "AC_UNSOL_RESEL" : + key == 0x4 ? "AC_0x4" : + key == 0x8 ? "AC_SENT_AEN" : + key == 0x10 ? "AC_SENT_BDR" : + key == 0x20 ? "AC_PATH_REGISTERED" : + key == 0x40 ? "AC_PATH_DEREGISTERED" : + key == 0x80 ? "AC_FOUND_DEVICE" : + key == 0x100 ? "AC_LOST_DEVICE" : + key == 0x200 ? "AC_TRANSFER_NEG" : + key == 0x400 ? "AC_INQ_CHANGED" : + key == 0x800 ? "AC_GETDEV_CHANGED" : + key == 0x1000 ? "AC_CONTRACT" : + key == 0x2000 ? "AC_ADVINFO_CHANGED" : + key == 0x4000 ? "AC_UNIT_ATTENTION" : + "AC UNKNOWN"; + + +inline int CAM_CDB_POINTER = 1; + +inline int XPT_OP_MASK = 0xff; +inline int XPT_NOOP = 0x00; +inline int XPT_SCSI_IO = 0x01; +inline int XPT_GDEV_TYPE = 0x02; +inline int XPT_GDEVLIST = 0x03; +inline int XPT_PATH_INQ = 0x04; +inline int XPT_REL_SIMQ = 0x05; +inline int XPT_SASYNC_CB = 0x06; +inline int XPT_SDEV_TYPE = 0x07; +inline int XPT_SCAN_BUS = 0x08; +inline int XPT_DEV_MATCH = 0x09; +inline int XPT_DEBUG = 0x0a; +inline int XPT_PATH_STATS = 0x0b; +inline int XPT_GDEV_STATS = 0x0c; +inline int XPT_DEV_ADVINFO = 0x0e; +inline int XPT_ASYNC = 0x0f; +inline int XPT_ABORT = 0x10; +inline int XPT_RESET_BUS = 0x11; +inline int XPT_RESET_DEV = 0x12; +inline int XPT_TERM_IO = 0x13; +inline int XPT_SCAN_LUN = 0x14; +inline int XPT_GET_TRAN_SETTINGS = 0x15; +inline int XPT_SET_TRAN_SETTINGS = 0x16; +inline int XPT_CALC_GEOMETRY = 0x17; +inline int XPT_ATA_IO = 0x18; +inline int XPT_SET_SIM_KNOB = 0x19; +inline int XPT_GET_SIM_KNOB = 0x1a; +inline int XPT_SMP_IO = 0x1b; +inline int XPT_NVME_IO = 0x1c; +inline int XPT_MMC_IO = 0x1c; +inline int XPT_SCAN_TGT = 0x1e; +inline int XPT_NVME_ADMIN = 0x1f; +inline int XPT_ENG_INQ = 0x20; +inline int XPT_ENG_EXEC = 0x21; +inline int XPT_EN_LUN = 0x30; +inline int XPT_TARGET_IO = 0x31; +inline int XPT_ACCEPT_TARGET_IO = 0x32; +inline int XPT_CONT_TARGET_IO = 0x33; +inline int XPT_IMMED_NOTIFY = 0x34; +inline int XPT_NOTIFY_ACK = 0x35; +inline int XPT_IMMEDIATE_NOTIFY = 0x36; +inline int XPT_NOTIFY_ACKNOWLEDGE = 0x37; +inline int XPT_REPROBE_LUN = 0x38; +inline int XPT_MMC_SET_TRAN_SETTINGS = 0x40; +inline int XPT_MMC_GET_TRAN_SETTINGS = 0x41; + +inline int XPT_FC_QUEUED = 0x100; +inline int XPT_FC_USER_CCB = 0x200; +inline int XPT_FC_XPT_ONLY = 0x400; +inline int XPT_FC_DEV_QUEUED = 0x800; + +inline int PROTO_UNKNOWN = 0; +inline int PROTO_UNSPECIFIED = 1; +inline int PROTO_SCSI = 2; +inline int PROTO_ATA = 3; +inline int PROTO_ATAPI = 4; +inline int PROTO_SATAPM = 5; +inline int PROTO_SEMB = 6; +inline int PROTO_NVME = 7; +inline int PROTO_MMCSD = 8; + +inline int XPORT_UNKNOWN = 0; +inline int XPORT_UNSPECIFIED = 1; +inline int XPORT_SPI = 2; +inline int XPORT_FC = 3; +inline int XPORT_SSA = 4; +inline int XPORT_USB = 5; +inline int XPORT_PPB = 6; +inline int XPORT_ATA = 7; +inline int XPORT_SAS = 8; +inline int XPORT_SATA = 9; +inline int XPORT_ISCSI = 10; +inline int XPORT_SRP = 11; +inline int XPORT_NVME = 12; +inline int XPORT_MMCSD = 13; +inline int XPORT_NVMF = 14; +inline int XPORT_UFSHCI = 15; + +inline int CAM_REQ_INPROG = 0x00; +inline int CAM_REQ_CMP = 0x01; +inline int CAM_REQ_ABORTED = 0x02; +inline int CAM_UA_ABORT = 0x03; +inline int CAM_REQ_CMP_ERR = 0x04; +inline int CAM_BUSY = 0x05; +inline int CAM_REQ_INVALID = 0x06; +inline int CAM_PATH_INVALID = 0x07; +inline int CAM_DEV_NOT_THERE = 0x08; +inline int CAM_UA_TERMIO = 0x09; +inline int CAM_SEL_TIMEOUT = 0x0a; +inline int CAM_CMD_TIMEOUT = 0x0b; +inline int CAM_SCSI_STATUS_ERROR = 0x0c; +inline int CAM_MSG_REJECT_REC = 0x0d; +inline int CAM_SCSI_BUS_RESET = 0x0e; +inline int CAM_UNCOR_PARITY = 0x0f; +inline int CAM_AUTOSENSE_FAIL = 0x10; +inline int CAM_NO_HBA = 0x11; +inline int CAM_DATA_RUN_ERR = 0x12; +inline int CAM_UNEXP_BUSFREE = 0x13; +inline int CAM_SEQUENCE_FAIL = 0x14; +inline int CAM_CCB_LEN_ERR = 0x15; +inline int CAM_PROVIDE_FAIL = 0x16; +inline int CAM_BDR_SENT = 0x17; +inline int CAM_REQ_TERMIO = 0x18; +inline int CAM_UNREC_HBA_ERROR = 0x19; +inline int CAM_REQ_TOO_BIG = 0x1a; +inline int CAM_REQUEUE_REQ = 0x1b; +inline int CAM_ATA_STATUS_ERROR = 0x1c; +inline int CAM_SCSI_IT_NEXUS_LOST = 0x1d; +inline int CAM_SMP_STATUS_ERROR = 0x1e; +inline int CAM_REQ_SOFTTIMEOUT = 0x1f; +inline int CAM_NVME_STATUS_ERROR = 0x20; +inline int CAM_IDE = 0x33; +inline int CAM_RESRC_UNAVAIL = 0x34; +inline int CAM_UNACKED_EVENT = 0x35; +inline int CAM_MESSAGE_RECV = 0x36; +inline int CAM_INVALID_CDB = 0x37; +inline int CAM_LUN_INVALID = 0x38; +inline int CAM_TID_INVALID = 0x39; +inline int CAM_FUNC_NOTAVAIL = 0x3a; +inline int CAM_NO_NEXUS = 0x3b; +inline int CAM_IID_INVALID = 0x3c; +inline int CAM_CDB_RECVD = 0x3d; +inline int CAM_LUN_ALRDY_ENA = 0x3e; +inline int CAM_SCSI_BUSY = 0x3f; + +inline int CAM_DEV_QFRZN = 0x40; +inline int CAM_AUTOSNS_VALID = 0x80; +inline int CAM_RELEASE_SIMQ = 0x100; +inline int CAM_SIM_QUEUED = 0x200; +inline int CAM_QOS_VALID = 0x400; +inline int CAM_STATUS_MASK = 0x3F; +inline int CAM_SENT_SENSE = 0x40000000; diff --git a/cddl/lib/libzpool/Makefile b/cddl/lib/libzpool/Makefile index 80fec2eb3fb1..ade864790f1c 100644 --- a/cddl/lib/libzpool/Makefile +++ b/cddl/lib/libzpool/Makefile @@ -21,7 +21,7 @@ ACFLAGS+= -Wa,--noexecstack ATOMIC_SRCS= opensolaris_atomic.c .endif -.if ${MACHINE_ARCH} == "powerpc" || ${MACHINE_ARCH} == "powerpcspe" +.if ${MACHINE_ARCH} == "powerpc" # Don't waste GOT entries on small data. PICFLAG= -fPIC .endif diff --git a/contrib/file/src/apprentice.c b/contrib/file/src/apprentice.c index 5289f8e87267..dde2dd1e0c2d 100644 --- a/contrib/file/src/apprentice.c +++ b/contrib/file/src/apprentice.c @@ -3646,15 +3646,14 @@ file_varint2uintmax_t(const unsigned char *us, int t, size_t *l) file_private void bs1(struct magic *m) { - m->cont_level = swap2(m->cont_level); + m->flag = swap2(m->flag); m->offset = swap4(CAST(uint32_t, m->offset)); m->in_offset = swap4(CAST(uint32_t, m->in_offset)); m->lineno = swap4(CAST(uint32_t, m->lineno)); if (IS_STRING(m->type)) { m->str_range = swap4(m->str_range); m->str_flags = swap4(m->str_flags); - } - else { + } else { m->value.q = swap8(m->value.q); m->num_mask = swap8(m->num_mask); } diff --git a/contrib/kyua/doc/kyua-db-exec.1.in b/contrib/kyua/doc/kyua-db-exec.1.in index 04f34c7b54e7..2e3bada4f849 100644 --- a/contrib/kyua/doc/kyua-db-exec.1.in +++ b/contrib/kyua/doc/kyua-db-exec.1.in @@ -62,7 +62,7 @@ The following subcommand options are recognized: .Bl -tag -width XX .It Fl -no-headers Avoids printing the headers of the table in the output of the command. -.It Fl -results-file Ar path , Fl s Ar path +.It Fl -results-file Ar path , Fl r Ar path __include__ results-file-flag-read.mdoc .El .Ss Results files diff --git a/contrib/kyua/doc/kyua-db-migrate.1.in b/contrib/kyua/doc/kyua-db-migrate.1.in index 67e46de46fec..4a1852aafd36 100644 --- a/contrib/kyua/doc/kyua-db-migrate.1.in +++ b/contrib/kyua/doc/kyua-db-migrate.1.in @@ -47,7 +47,7 @@ database lives. .Pp The following subcommand options are recognized: .Bl -tag -width XX -.It Fl -results-file Ar path , Fl s Ar path +.It Fl -results-file Ar path , Fl r Ar path __include__ results-file-flag-read.mdoc .El .Ss Results files diff --git a/contrib/kyua/doc/kyua-report-html.1.in b/contrib/kyua/doc/kyua-report-html.1.in index 1f9f55b69a3f..3ff044ca8d30 100644 --- a/contrib/kyua/doc/kyua-report-html.1.in +++ b/contrib/kyua/doc/kyua-report-html.1.in @@ -64,7 +64,7 @@ The directory must not exist unless the option is provided. The default is .Pa ./html . -.It Fl -results-file Ar path , Fl s Ar path +.It Fl -results-file Ar path , Fl r Ar path __include__ results-file-flag-read.mdoc .It Fl -results-filter Ar types Comma-separated list of the test result types to include in the report. diff --git a/contrib/kyua/doc/kyua-report-junit.1.in b/contrib/kyua/doc/kyua-report-junit.1.in index f1ad3a2e7f29..508ea30a3f6e 100644 --- a/contrib/kyua/doc/kyua-report-junit.1.in +++ b/contrib/kyua/doc/kyua-report-junit.1.in @@ -50,7 +50,7 @@ The following subcommand options are recognized: .Bl -tag -width XX .It Fl -output Ar directory Specifies the file into which to store the JUnit report. -.It Fl -results-file Ar path , Fl s Ar path +.It Fl -results-file Ar path , Fl r Ar path __include__ results-file-flag-read.mdoc .El .Ss Caveats diff --git a/contrib/kyua/doc/kyua-report.1.in b/contrib/kyua/doc/kyua-report.1.in index 8e2485f9c4ac..a3e4d75456cf 100644 --- a/contrib/kyua/doc/kyua-report.1.in +++ b/contrib/kyua/doc/kyua-report.1.in @@ -70,7 +70,7 @@ and .Pa /dev/stderr can be used to specify the standard output and the standard error, respectively. -.It Fl -results-file Ar path , Fl s Ar path +.It Fl -results-file Ar path , Fl r Ar path __include__ results-file-flag-read.mdoc .It Fl -results-filter Ar types Comma-separated list of the test result types to include in the report. diff --git a/contrib/kyua/doc/kyua-test.1.in b/contrib/kyua/doc/kyua-test.1.in index 8cd5f34ae6af..07db6cf461c2 100644 --- a/contrib/kyua/doc/kyua-test.1.in +++ b/contrib/kyua/doc/kyua-test.1.in @@ -69,7 +69,7 @@ Specifies the Kyuafile to process. Defaults to a .Pa Kyuafile file in the current directory. -.It Fl -results-file Ar path , Fl s Ar path +.It Fl -results-file Ar path , Fl r Ar path __include__ results-file-flag-write.mdoc .El .Pp diff --git a/contrib/libarchive/NEWS b/contrib/libarchive/NEWS index fbbb65440b39..be14de445b57 100644 --- a/contrib/libarchive/NEWS +++ b/contrib/libarchive/NEWS @@ -1,3 +1,5 @@ +Jan 05, 2026: libarchive 3.8.5 released + Dec 01, 2025: libarchive 3.8.4 released Nov 17, 2025: libarchive 3.8.3 released diff --git a/contrib/libarchive/README.md b/contrib/libarchive/README.md index 0d63357292ec..e9691f1b710b 100644 --- a/contrib/libarchive/README.md +++ b/contrib/libarchive/README.md @@ -191,7 +191,7 @@ questions we are asked about libarchive: libraries. This also reduces the size of statically-linked binaries in environments where that matters. -* The library is generally _thread safe_ depending on the platform: +* The library is generally _thread-safe_ depending on the platform: it does not define any global variables of its own. However, some platforms do not provide fully thread-safe versions of key C library functions. On those platforms, libarchive will use the non-thread-safe @@ -214,7 +214,7 @@ questions we are asked about libarchive: multiple threads. Of course, those modules are completely optional and you can use the rest of libarchive without them. -* The library is _not_ thread aware, however. It does no locking +* The library is _not_ thread-aware, however. It does no locking or thread management of any kind. If you create a libarchive object and need to access it from multiple threads, you will need to provide your own locking. diff --git a/contrib/libarchive/cpio/cpio.c b/contrib/libarchive/cpio/cpio.c index 262db510568b..77eefe809f37 100644 --- a/contrib/libarchive/cpio/cpio.c +++ b/contrib/libarchive/cpio/cpio.c @@ -725,7 +725,7 @@ file_to_archive(struct cpio *cpio, const char *srcpath) if (cpio->uid_override >= 0) archive_entry_set_uid(entry, cpio->uid_override); - if (cpio->gname_override != NULL) + if (cpio->uname_override != NULL) archive_entry_set_uname(entry, cpio->uname_override); if (cpio->gid_override >= 0) archive_entry_set_gid(entry, cpio->gid_override); diff --git a/contrib/libarchive/libarchive/archive.h b/contrib/libarchive/libarchive/archive.h index 0eda822ae6bf..a9d34beb4f5a 100644 --- a/contrib/libarchive/libarchive/archive.h +++ b/contrib/libarchive/libarchive/archive.h @@ -34,7 +34,7 @@ * assert that ARCHIVE_VERSION_NUMBER >= 2012108. */ /* Note: Compiler will complain if this does not match archive_entry.h! */ -#define ARCHIVE_VERSION_NUMBER 3008004 +#define ARCHIVE_VERSION_NUMBER 3008005 #include <sys/stat.h> #include <stddef.h> /* for wchar_t */ @@ -177,7 +177,7 @@ __LA_DECL int archive_version_number(void); /* * Textual name/version of the library, useful for version displays. */ -#define ARCHIVE_VERSION_ONLY_STRING "3.8.4" +#define ARCHIVE_VERSION_ONLY_STRING "3.8.5" #define ARCHIVE_VERSION_STRING "libarchive " ARCHIVE_VERSION_ONLY_STRING __LA_DECL const char * archive_version_string(void); diff --git a/contrib/libarchive/libarchive/archive_entry.h b/contrib/libarchive/libarchive/archive_entry.h index 74466f394c4a..b43435692c27 100644 --- a/contrib/libarchive/libarchive/archive_entry.h +++ b/contrib/libarchive/libarchive/archive_entry.h @@ -28,7 +28,7 @@ #define ARCHIVE_ENTRY_H_INCLUDED /* Note: Compiler will complain if this does not match archive.h! */ -#define ARCHIVE_VERSION_NUMBER 3008004 +#define ARCHIVE_VERSION_NUMBER 3008005 /* * Note: archive_entry.h is for use outside of libarchive; the diff --git a/contrib/libarchive/libarchive/archive_read_support_filter_uu.c b/contrib/libarchive/libarchive/archive_read_support_filter_uu.c index d722fe343657..acb8feb79b2d 100644 --- a/contrib/libarchive/libarchive/archive_read_support_filter_uu.c +++ b/contrib/libarchive/libarchive/archive_read_support_filter_uu.c @@ -232,8 +232,8 @@ bid_get_line(struct archive_read_filter *filter, size_t nbytes_req = (*ravail+1023) & ~1023U; ssize_t tested; - /* Increase reading bytes if it is not enough to at least - * new two lines. */ + /* Increase reading bytes if it is not enough for at least + * two new lines. */ if (nbytes_req < (size_t)*ravail + 160) nbytes_req <<= 1; @@ -411,7 +411,7 @@ ensure_in_buff_size(struct archive_read_filter *self, /* * Calculate a new buffer size for in_buff. - * Increase its value until it has enough size we need. + * Increase its value until it is enough for our needs. */ newsize = uudecode->in_allocated; do { @@ -494,7 +494,7 @@ read_more: } /* * If there is remaining data which is saved by - * previous calling, use it first. + * a previous call, use it first. */ if (ensure_in_buff_size(self, uudecode, avail_in + uudecode->in_cnt) != ARCHIVE_OK) diff --git a/contrib/libarchive/libarchive/archive_read_support_format_cab.c b/contrib/libarchive/libarchive/archive_read_support_format_cab.c index a96f7d313951..63755ef9e579 100644 --- a/contrib/libarchive/libarchive/archive_read_support_format_cab.c +++ b/contrib/libarchive/libarchive/archive_read_support_format_cab.c @@ -2813,7 +2813,7 @@ lzx_decode_blocks(struct lzx_stream *strm, int last) lzx_br_bits(&bre, mt_max_bits)); lzx_br_consume(&bre, mt_bitlen[c]); } - if (c > UCHAR_MAX) + if ((unsigned int)c > UCHAR_MAX) break; /* * 'c' is exactly literal code. diff --git a/contrib/libarchive/libarchive/archive_read_support_format_cpio.c b/contrib/libarchive/libarchive/archive_read_support_format_cpio.c index 74f3549d159e..526096b39f75 100644 --- a/contrib/libarchive/libarchive/archive_read_support_format_cpio.c +++ b/contrib/libarchive/libarchive/archive_read_support_format_cpio.c @@ -825,9 +825,9 @@ header_odc(struct archive_read *a, struct cpio *cpio, } /* - * NOTE: if a filename suffix is ".z", it is the file gziped by afio. - * it would be nice that we can show uncompressed file size and we can - * uncompressed file contents automatically, unfortunately we have nothing + * NOTE: if a filename suffix is ".z", it is a file gzipped by afio. + * it would be nice if we could show uncompressed file size and + * uncompress file contents automatically, unfortunately we have nothing * to get a uncompressed file size while reading each header. It means * we also cannot uncompress file contents under our framework. */ diff --git a/contrib/libarchive/libarchive/archive_read_support_format_lha.c b/contrib/libarchive/libarchive/archive_read_support_format_lha.c index abf8b8799636..cf6a147abda6 100644 --- a/contrib/libarchive/libarchive/archive_read_support_format_lha.c +++ b/contrib/libarchive/libarchive/archive_read_support_format_lha.c @@ -2374,7 +2374,7 @@ lzh_decode_blocks(struct lzh_stream *strm, int last) lzh_br_consume(&bre, lt_bitlen[c]); } blocks_avail--; - if (c > UCHAR_MAX) + if ((unsigned int)c > UCHAR_MAX) /* Current block is a match data. */ break; /* diff --git a/contrib/libarchive/libarchive/archive_read_support_format_mtree.c b/contrib/libarchive/libarchive/archive_read_support_format_mtree.c index 96d2c71f4c4f..10c07b05d965 100644 --- a/contrib/libarchive/libarchive/archive_read_support_format_mtree.c +++ b/contrib/libarchive/libarchive/archive_read_support_format_mtree.c @@ -392,8 +392,8 @@ next_line(struct archive_read *a, if (len >= MAX_LINE_LEN) return (-1); - /* Increase reading bytes if it is not enough to at least - * new two lines. */ + /* Increase reading bytes if it is not enough for at least + * two new lines. */ if (nbytes_req < (size_t)*ravail + 160) nbytes_req <<= 1; @@ -568,8 +568,8 @@ bid_keyword_list(const char *p, ssize_t len, int unset, int last_is_path) --len; value = 1; } - /* A keyword should have a its value unless - * "/unset" operation. */ + /* A keyword should have a value unless this is + * an "/unset" operation. */ if (!unset && value == 0) return (-1); } @@ -752,7 +752,7 @@ detect_form(struct archive_read *a, int *is_form_d) } else if (form_D == 1) { if (!last_is_path && keywords > 0) /* This this is not `form D' - * and We cannot accept mixed + * and we cannot accept mixed * format. */ break; } @@ -805,7 +805,7 @@ detect_form(struct archive_read *a, int *is_form_d) * to read the entire mtree file into memory up front. * * The parsing is done in two steps. First, it is decided if a line - * changes the global defaults and if it is, processed accordingly. + * changes the global defaults and if it does, it is processed accordingly. * Otherwise, the options of the line are merged with the current * global options. */ diff --git a/contrib/libarchive/libarchive/archive_string.c b/contrib/libarchive/libarchive/archive_string.c index 740308b6e4e3..a776dc85c688 100644 --- a/contrib/libarchive/libarchive/archive_string.c +++ b/contrib/libarchive/libarchive/archive_string.c @@ -3573,7 +3573,7 @@ win_strncat_from_utf16(struct archive_string *as, const void *_p, size_t bytes, if (sc->to_cp == CP_C_LOCALE) { /* - * "C" locale special process. + * "C" locale special processing. */ u16 = _p; ll = 0; @@ -3690,7 +3690,7 @@ win_strncat_to_utf16(struct archive_string *as16, const void *_p, avail = as16->buffer_length - 2; if (sc->from_cp == CP_C_LOCALE) { /* - * "C" locale special process. + * "C" locale special processing. */ count = 0; while (count < length && *s) { diff --git a/contrib/libarchive/libarchive/archive_util.c b/contrib/libarchive/libarchive/archive_util.c index d048bbc94650..0d1de1ef2091 100644 --- a/contrib/libarchive/libarchive/archive_util.c +++ b/contrib/libarchive/libarchive/archive_util.c @@ -456,7 +456,7 @@ __archive_issetugid(void) return (-1); if (ruid != euid || ruid != suid) return (1); - if (getresgid(&ruid, &egid, &sgid) != 0) + if (getresgid(&rgid, &egid, &sgid) != 0) return (-1); if (rgid != egid || rgid != sgid) return (1); diff --git a/contrib/libarchive/libarchive/archive_write_open_fd.c b/contrib/libarchive/libarchive/archive_write_open_fd.c index ba034ed92f8a..a795552020df 100644 --- a/contrib/libarchive/libarchive/archive_write_open_fd.c +++ b/contrib/libarchive/libarchive/archive_write_open_fd.c @@ -135,11 +135,7 @@ file_write(struct archive *a, void *client_data, const void *buff, size_t length static int file_free(struct archive *a, void *client_data) { - struct write_fd_data *mine = (struct write_fd_data *)client_data; - (void)a; /* UNUSED */ - if (mine == NULL) - return (ARCHIVE_OK); - free(mine); + free(client_data); return (ARCHIVE_OK); } diff --git a/contrib/libarchive/libarchive/archive_write_open_file.c b/contrib/libarchive/libarchive/archive_write_open_file.c index 0b310f3da83b..6271b368d07f 100644 --- a/contrib/libarchive/libarchive/archive_write_open_file.c +++ b/contrib/libarchive/libarchive/archive_write_open_file.c @@ -96,11 +96,7 @@ file_write(struct archive *a, void *client_data, const void *buff, size_t length static int file_free(struct archive *a, void *client_data) { - struct write_FILE_data *mine = client_data; - (void)a; /* UNUSED */ - if (mine == NULL) - return (ARCHIVE_OK); - free(mine); + free(client_data); return (ARCHIVE_OK); } diff --git a/contrib/libarchive/libarchive/archive_write_open_memory.c b/contrib/libarchive/libarchive/archive_write_open_memory.c index e31650447279..3b929ac7f60d 100644 --- a/contrib/libarchive/libarchive/archive_write_open_memory.c +++ b/contrib/libarchive/libarchive/archive_write_open_memory.c @@ -104,11 +104,7 @@ memory_write(struct archive *a, void *client_data, const void *buff, size_t leng static int memory_write_free(struct archive *a, void *client_data) { - struct write_memory_data *mine; (void)a; /* UNUSED */ - mine = client_data; - if (mine == NULL) - return (ARCHIVE_OK); - free(mine); + free(client_data); return (ARCHIVE_OK); } diff --git a/contrib/libarchive/libarchive/archive_write_set_format_shar.c b/contrib/libarchive/libarchive/archive_write_set_format_shar.c index be9f78ce96cd..f6f28debdfa9 100644 --- a/contrib/libarchive/libarchive/archive_write_set_format_shar.c +++ b/contrib/libarchive/libarchive/archive_write_set_format_shar.c @@ -144,7 +144,9 @@ archive_write_set_format_shar_dump(struct archive *_a) struct archive_write *a = (struct archive_write *)_a; struct shar *shar; - archive_write_set_format_shar(&a->archive); + int ret = archive_write_set_format_shar(&a->archive); + if (ret != ARCHIVE_OK) + return ret; shar = (struct shar *)a->format_data; shar->dump = 1; a->format_write_data = archive_write_shar_data_uuencode; @@ -240,6 +242,7 @@ archive_write_shar_header(struct archive_write *a, struct archive_entry *entry) shar_quote(&shar->work, p, 1); archive_strcat(&shar->work, " > /dev/null 2>&1\n"); + free(shar->last_dir); shar->last_dir = p; } } else { diff --git a/contrib/libarchive/libarchive/archive_write_set_format_ustar.c b/contrib/libarchive/libarchive/archive_write_set_format_ustar.c index 09b71fe6672a..4084eb455968 100644 --- a/contrib/libarchive/libarchive/archive_write_set_format_ustar.c +++ b/contrib/libarchive/libarchive/archive_write_set_format_ustar.c @@ -539,7 +539,7 @@ __archive_write_format_header_ustar(struct archive_write *a, char h[512], ret = ARCHIVE_WARN; } if (copy_length > 0) { - if (strlen(p) > USTAR_gname_size) { + if (copy_length > USTAR_gname_size) { if (tartype != 'x') { archive_set_error(&a->archive, ARCHIVE_ERRNO_MISC, "Group name too long"); diff --git a/contrib/libarchive/libarchive/test/test_compat_lzip.c b/contrib/libarchive/libarchive/test/test_compat_lzip.c index 50920eefb1cf..cd246b943b22 100644 --- a/contrib/libarchive/libarchive/test/test_compat_lzip.c +++ b/contrib/libarchive/libarchive/test/test_compat_lzip.c @@ -47,7 +47,7 @@ echo "f3" > $dir/d1/f3 rm -r $dir } # -# Make a lzip file from split tar file. +# Make a lzip file from the split tar file. # name=test_compat_lzip_1 dir="$name`date +%Y%m%d%H%M%S`.$USER" @@ -75,7 +75,7 @@ exit 0 */ /* - * Verify our ability to read sample files compatibly with lzip. + * Verify our ability to read the sample files compatibly with lzip. * * In particular: * * lzip will read multiple lzip streams, concatenating the output diff --git a/contrib/libarchive/libarchive_fe/line_reader.c b/contrib/libarchive/libarchive_fe/line_reader.c index 0af9db53c0a2..a4bc84b7f233 100644 --- a/contrib/libarchive/libarchive_fe/line_reader.c +++ b/contrib/libarchive/libarchive_fe/line_reader.c @@ -64,6 +64,8 @@ lafe_line_reader(const char *pathname, int nullSeparator) lr->nullSeparator = nullSeparator; lr->pathname = strdup(pathname); + if (lr->pathname == NULL) + lafe_errc(1, ENOMEM, "Can't open %s", pathname); if (strcmp(pathname, "-") == 0) lr->f = stdin; diff --git a/contrib/libarchive/tar/subst.c b/contrib/libarchive/tar/subst.c index a466f65358a5..53497ad0d1a3 100644 --- a/contrib/libarchive/tar/subst.c +++ b/contrib/libarchive/tar/subst.c @@ -237,7 +237,7 @@ apply_substitution(struct bsdtar *bsdtar, const char *name, char **result, char isEnd = 0; do { - isEnd = *name == '\0'; + isEnd = *name == '\0'; if (regexec(&rule->re, name, 10, matches, 0)) break; @@ -293,13 +293,13 @@ apply_substitution(struct bsdtar *bsdtar, const char *name, char **result, realloc_strcat(result, rule->result + j); if (matches[0].rm_eo > 0) { - name += matches[0].rm_eo; - } else { - // We skip a character because the match is 0-length - // so we need to add it to the output - realloc_strncat(result, name, 1); - name += 1; - } + name += matches[0].rm_eo; + } else if (!isEnd) { + // We skip a character because the match is 0-length + // so we need to add it to the output + realloc_strncat(result, name, 1); + name += 1; + } } while (rule->global && !isEnd); // Testing one step after because sed et al. run 0-length patterns a last time on the empty string at the end } diff --git a/contrib/libarchive/tar/write.c b/contrib/libarchive/tar/write.c index 9e6c97b580b7..b39a397707ba 100644 --- a/contrib/libarchive/tar/write.c +++ b/contrib/libarchive/tar/write.c @@ -163,7 +163,7 @@ set_writer_options(struct bsdtar *bsdtar, struct archive *a) * a format or filters which are not added to * the archive write object. */ memcpy(p, IGNORE_WRONG_MODULE_NAME, module_len); - memcpy(p, writer_options, opt_len); + memcpy(p + module_len, writer_options, opt_len); r = archive_write_set_options(a, p); free(p); if (r < ARCHIVE_WARN) @@ -190,13 +190,12 @@ set_reader_options(struct bsdtar *bsdtar, struct archive *a) char *p; /* Set default write options. */ if ((p = malloc(module_len + opt_len)) == NULL) - if (p == NULL) lafe_errc(1, errno, "Out of memory"); /* Prepend magic code to ignore options for * a format or filters which are not added to * the archive write object. */ memcpy(p, IGNORE_WRONG_MODULE_NAME, module_len); - memcpy(p, reader_options, opt_len); + memcpy(p + module_len, reader_options, opt_len); r = archive_read_set_options(a, p); free(p); if (r < ARCHIVE_WARN) diff --git a/contrib/libarchive/test_utils/test_main.c b/contrib/libarchive/test_utils/test_main.c index f31678166ad0..dbd3fcf60e9a 100644 --- a/contrib/libarchive/test_utils/test_main.c +++ b/contrib/libarchive/test_utils/test_main.c @@ -3681,11 +3681,19 @@ test_run(int i, const char *tmpdir) */ static void -usage(const char *program) +list_tests(void) { static const int limit = nitems(tests); int i; + for (i = 0; i < limit; i++) + printf(" %d: %s\n", i, tests[i].name); +} + +static void +usage(const char *program) +{ + printf("Usage: %s [options] <test> <test> ...\n", program); printf("Default is to run all tests.\n"); printf("Otherwise, specify the numbers of the tests you wish to run.\n"); @@ -3693,6 +3701,8 @@ usage(const char *program) printf(" -d Dump core after any failure, for debugging.\n"); printf(" -k Keep all temp files.\n"); printf(" Default: temp files for successful tests deleted.\n"); + printf(" -l List available tests and exit, ignoring all other.\n"); + printf(" options and arguments.\n"); #ifdef PROGRAM printf(" -p <path> Path to executable to be tested.\n"); printf(" Default: path taken from " ENVBASE " environment variable.\n"); @@ -3704,8 +3714,7 @@ usage(const char *program) printf(" -u Keep running specified tests until one fails.\n"); printf(" -v Verbose.\n"); printf("Available tests:\n"); - for (i = 0; i < limit; i++) - printf(" %d: %s\n", i, tests[i].name); + list_tests(); exit(1); } @@ -4079,6 +4088,10 @@ main(int argc, char **argv) case 'k': keep_temp_files = 1; break; + case 'l': + list_tests(); + exit(0); + break; case 'p': #ifdef PROGRAM testprogfile = option_arg; diff --git a/contrib/libarchive/unzip/bsdunzip.c b/contrib/libarchive/unzip/bsdunzip.c index 1b520e841690..14bd418f169c 100644 --- a/contrib/libarchive/unzip/bsdunzip.c +++ b/contrib/libarchive/unzip/bsdunzip.c @@ -654,11 +654,11 @@ recheck: #elif HAVE_STRUCT_STAT_ST_MTIME_N sb.st_mtime > mtime.tv_sec || (sb.st_mtime == mtime.tv_sec && - sb.st_mtime_n => mtime.tv_nsec) + sb.st_mtime_n >= mtime.tv_nsec) #elif HAVE_STRUCT_STAT_ST_MTIME_USEC sb.st_mtime > mtime.tv_sec || (sb.st_mtime == mtime.tv_sec && - sb.st_mtime_usec => mtime.tv_nsec / 1000) + sb.st_mtime_usec >= mtime.tv_nsec / 1000) #else sb.st_mtime > mtime.tv_sec #endif diff --git a/contrib/libarchive/unzip/la_queue.h b/contrib/libarchive/unzip/la_queue.h index 917526531b2a..bb305f5bd8ce 100644 --- a/contrib/libarchive/unzip/la_queue.h +++ b/contrib/libarchive/unzip/la_queue.h @@ -85,7 +85,7 @@ * _SWAP + + + + */ #ifdef QUEUE_MACRO_DEBUG -#warn Use QUEUE_MACRO_DEBUG_TRACE and/or QUEUE_MACRO_DEBUG_TRASH +#warning Use QUEUE_MACRO_DEBUG_TRACE and/or QUEUE_MACRO_DEBUG_TRASH #define QUEUE_MACRO_DEBUG_TRACE #define QUEUE_MACRO_DEBUG_TRASH #endif diff --git a/contrib/ncurses/progs/infocmp.c b/contrib/ncurses/progs/infocmp.c index 7932203ac2b1..f61633cfad80 100644 --- a/contrib/ncurses/progs/infocmp.c +++ b/contrib/ncurses/progs/infocmp.c @@ -687,7 +687,7 @@ compare_predicate(PredType type, PredIdx idx, const char *name) #define DATAX() DATA("", "") typedef struct { - const char from[4]; + const char from[8]; const char to[12]; } assoc; diff --git a/contrib/netbsd-tests/usr.bin/grep/d_color_d.out b/contrib/netbsd-tests/usr.bin/grep/d_color_d.out new file mode 100644 index 000000000000..a9ce473965ea --- /dev/null +++ b/contrib/netbsd-tests/usr.bin/grep/d_color_d.out @@ -0,0 +1 @@ +[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar[01;31m[Kfoo[m[Kbar diff --git a/contrib/netbsd-tests/usr.bin/grep/t_grep.sh b/contrib/netbsd-tests/usr.bin/grep/t_grep.sh index c4ba9a9657db..9f92160bc372 100755 --- a/contrib/netbsd-tests/usr.bin/grep/t_grep.sh +++ b/contrib/netbsd-tests/usr.bin/grep/t_grep.sh @@ -422,6 +422,12 @@ color_body() atf_check -o file:"$(atf_get_srcdir)/d_color_c.out" \ grep --color=always -f grepfile "$(atf_get_srcdir)/d_color_b.in" + # Begin FreeBSD + MAX_MATCHES=32 + for _ in $(seq $((MAX_MATCHES + 1))); do printf "foobar"; done > grepfile + atf_check -o file:"$(atf_get_srcdir)/d_color_d.out" \ + grep --color=always foo grepfile + # End FreeBSD } atf_test_case f_file_empty diff --git a/crypto/openssl/FREEBSD-upgrade b/crypto/openssl/FREEBSD-upgrade deleted file mode 100644 index 86e65e8e07dd..000000000000 --- a/crypto/openssl/FREEBSD-upgrade +++ /dev/null @@ -1,122 +0,0 @@ - FreeBSD maintainer's guide to OpenSSL - ===================================== - - These instructions assume you have a clone of the FreeBSD git repo - main branch in src/freebsd/main, and will store vendor trees under - src/freebsd/vendor/. In addition, this assumes there is a "freebsd" - origin pointing to git(repo).freebsd.org/src.git. - -01) Switch to the vendor branch: - - $ cd src/freebsd/main - $ git worktree add -b vendor/openssl-X.Y ../vendor/openssl-X.Y freebsd/vendor/openssl-X.Y - $ cd ../vendor/openssl-X.Y - -02) Download the latest OpenSSL tarball and signature from the official - website (https://www.openssl.org/source/). - - $ (cd .. && fetch https://github.com/openssl/openssl/releases/download/openssl-X.Y.Z/openssl-X.Y.Z.tar.gz) - $ (cd .. && fetch https://github.com/openssl/openssl/releases/download/openssl-X.Y.Z/openssl-X.Y.Z.tar.gz.asc) - -03) Verify the signature: - - $ gpg --verify ../openssl-X.Y.Z.tar.gz.asc ../openssl-X.Y.Z.tar.gz - -04) Unpack the OpenSSL tarball to the parent directory: - - $ tar xf ../openssl-X.Y.Z.tar.gz -C .. - -05) Copy to the vendor branch: - - $ rsync --exclude .git --delete -av ../openssl-X.Y.Z/ . - -06) Take care of added / deleted files: - - $ git add -A - -07) Commit: - - $ git commit -m "openssl: Vendor import of OpenSSL X.Y.Z" - -08) Tag: - - $ git tag -a -m "Tag OpenSSL X.Y.Z" vendor/openssl/X.Y.Z - - At this point the vendor branch can be pushed to the FreeBSD repo via: - - $ git push freebsd vendor/openssl-X.Y - $ git push freebsd vendor/openssl/X.Y.Z - - Note the second "git push" command is used to push the tag, which is - not pushed by default. - - It is also possible to push the branch and tag together, but use - --dry-run first to ensure that no undesired tags will be pushed: - - $ git push --dry-run --follow-tags freebsd vendor/openssl-X.Y - $ git push --follow-tags freebsd vendor/openssl-X.Y - - The update and tag could instead be pushed later, along with the merge - to main, but pushing now allows others to collaborate. - -09) Merge from the vendor branch: - - $ git subtree merge -P crypto/openssl vendor/openssl-X.Y - - A number of files have been deleted from FreeBSD's copy of OpenSSL. - If git prompts for these deleted files during the merge, choose 'd' - (leaving them deleted). - -10) Resolve conflicts. Remember to bump the version and date in - secure/lib/libcrypto/Makefile.inc and - crypto/openssl/include/openssl/opensslv.h. - -11) Diff against the vendor branch: - - $ git diff --diff-filter=M vendor/openssl/X.Y.Z HEAD:crypto/openssl - - Review the diff for any unexpected changes. - -12) Re-generate the assembly files: - - $ cd secure/lib/libcrypto - $ make cleanasm buildasm - -13) Update the appropriate makefiles to reflect changes in the vendor's - build.info files. This is especially important if source files have - been added or removed. Keep in mind that the assembly files generated - belong to sys/crypto/openssl, and will therefore affect the kernel as - well. - -14) If symbols have been added or removed, update the appropriate - Version.map to reflect these changes. - -15) Compare compilation flags, the list of files built and included, the - list of symbols generated with the corresponding port if available. - -16) Re-generate the manual files: - - $ tar xzf openssl-X.Y.Z.tar.gz - $ (cd openssl-X.Y.Z && ./Configure --prefix=/usr --openssldir=/etc/ssl && - make build_man_docs) - [...] - $ find openssl-X.Y.Z/doc/man/man1 -name '*.1' -exec cp {} secure/usr.bin/openssl/man/ \; - $ find openssl-X.Y.Z/doc/man/man3 -name '*.3' -exec cp {} secure/lib/libcrypto/man/man3/ \; - $ find openssl-X.Y.Z/doc/man/man5 -name '*.5' -exec cp {} secure/lib/libcrypto/man/man5/ \; - $ find openssl-X.Y.Z/doc/man/man7 -name '*.7' -exec cp {} secure/lib/libcrypto/man/man7/ \; - $ grep -nrF usr/local secure/lib/libcrypto/man secure/usr.bin/openssl/man - [correct the references to the prefix and OpenSSL directories] - $ git commit --amend secure/lib/libcrypto/man secure/usr.bin/openssl/man - - Review the diff and tree status for anything requiring attention. - -16) Build and install world, reboot, test. - -17) Test the legacy provider as well: (here with "test" as the password) - - $ echo test | openssl rc4 -provider legacy -e -a -pbkdf2 - enter RC4 encryption password: - Verifying - enter RC4 encryption password: - U2FsdGVkX1+JvhqxLMOvlxvTi1/h - -18) Commit and hope you did not miss anything. diff --git a/crypto/openssl/FREEBSD-upgrade.md b/crypto/openssl/FREEBSD-upgrade.md new file mode 100644 index 000000000000..1fc38c4dd17f --- /dev/null +++ b/crypto/openssl/FREEBSD-upgrade.md @@ -0,0 +1,202 @@ +# FreeBSD maintainer's guide to OpenSSL + +## Assumptions + +These instructions assume the following: + +- A git clone of FreeBSD will be available at `$GIT_ROOT/src/freebsd/main` with + an origin named `freebsd`. Example: + `git clone -o freebsd git@gitrepo.freebsd.org:src.git "$GIT_ROOT/src/freebsd/main"` +- The vendor trees will be stored under `$GIT_ROOT/src/freebsd/vendor/`. + +## Software requirements + +The following additional software must be installed from ports: + +- lang/perl5 +- lang/python +- net/rsync +- security/gnupg + +## Warning + +This is a long and complicated process, in part because OpenSSL is a large, +complex, and foundational software component in the FreeBSD distribution. A +lot of the overall process has been automated to reduce potential human error, +but some rough edges still exist. These rough edges have been highlighted in +the directions. + +## Process + +### Notes + +The following directions use X.Y.Z to describe the major, minor, subminor +versions, respectively for the OpenSSL release. Please substitute the values as +appropriate in the directions below. + +All single commands are prefixed with `%`. + +### Variables + +``` +% OPENSSL_VER_MAJOR_MINOR=X.Y +% OPENSSL_VER_FULL=X.Y.Z +% RELEASE_TARFILE="openssl-${OPENSSL_VER_FULL}.tar.gz" +% BASE_URL="https://github.com/openssl/openssl/releases/download/openssl-${OPENSSL_VER_FULL}/${RELEASE_TARFILE}" +``` + +### Switch to the vendor branch + +``` +% cd "$GIT_ROOT/src/freebsd/main" +% git worktree add -b vendor/openssl-${OPENSSL_VER_MAJOR_MINOR} \ + ../vendor/openssl-${OPENSSL_VER_MAJOR_MINOR} \ + freebsd/vendor/openssl-${OPENSSL_VER_MAJOR_MINOR} +% cd "$GIT_ROOT/src/freebsd/vendor/openssl-${OPENSSL_VER_MAJOR_MINOR} +``` + +### Download the latest OpenSSL release + +The following instructions demonstrate how to fetch a recent OpenSSL release +and its corresponding artifacts (release SHA256 checksum; release PGP +signature) from the [official website](https://www.openssl.org/source/). + +``` +% (cd .. && fetch ${BASE_URL} ${BASE_URL}.asc ${BASE_URL}.sha256) +``` + +### Verify the release authenticity and integrity + +**NOTE**: this step requires importing the project author's PGP keys beforehand. +See the [sources webpage](https://openssl-library.org/source/) for more +details. + +This step uses the PGP signature and SHA256 checksum files to verify the release +authenticity and integrity, respectively. + +``` +% (cd .. && sha256sum -c ${RELEASE_TARFILE}.sha256) +% (cd .. && gpg --verify ${RELEASE_TARFILE}.asc) +``` + +### Unpack the OpenSSL tarball to the parent directory + +``` +% (cd .. && tar xf ../${RELEASE_TARFILE}) +``` + +### Update the sources in the vendor branch + +**IMPORTANT**: the trailing slash in the source directory is required! + +``` +% rsync --exclude .git --delete -av ../openssl-${OPENSSL_VER_FULL}/ . +``` + +### Take care of added / deleted files + +``` +% git add -A +``` + +### Commit, tag, and push + +``` +% git commit -m "openssl: Vendor import of OpenSSL ${OPENSSL_VER_FULL}" +% git tag -a -m "Tag OpenSSL ${OPENSSL_VER_FULL}" vendor/openssl/${OPENSSL_VER_FULL} +``` + +The update and tag could instead be pushed later, along with the merge +to main, but pushing now allows others to collaborate. + +#### Push branch update and tag separately + +At this point the vendor branch can be pushed to the FreeBSD repo via: +``` +% git push freebsd vendor/openssl-${OPENSSL_VER_MAJOR_MINOR} +% git push freebsd vendor/openssl/${OPENSSL_VER_FULL} +``` + +**NOTE**: the second "git push" command is used to push the tag, which is not +pushed by default. + +#### Push branch update and tag simultaneously + +It is also possible to push the branch and tag together, but use +`--dry-run` first to ensure that no undesired tags will be pushed: + +``` +% git push --dry-run --follow-tags freebsd vendor/openssl-${OPENSSL_VER_MAJOR_MINOR} +% git push --follow-tags freebsd vendor/openssl-${OPENSSL_VER_MAJOR_MINOR} +``` + +### Remove any existing patches and generated files. + +``` +% make clean +``` + +Please note that this step does not remove any generated manpages: this happens +in a later step. + +### Merge from the vendor branch and resolve conflicts + +``` +% git subtree merge -P crypto/openssl vendor/openssl-${OPENSSL_VER_MAJOR_MINOR} +``` + +**NOTE**: Some files may have been deleted from FreeBSD's copy of OpenSSL. +If git prompts for these deleted files during the merge, choose 'd' +(leaving them deleted). + +### Patch, configure, and regenerate all files + +The following commands turn the crank associated with the vendor release +update: + +``` +% make patch +% make configure +% make all +``` + +This process updates all generated files, syncs the manpages with the new release, +regenerates assembly files, etc. + +For now, any build-related changes, e.g., a assembly source was removed, a manpage +was added, etc, will require makefile updates. + +### Diff against the vendor branch + +Review the diff for any unexpected changes: + +``` +% git diff --diff-filter=M vendor/openssl/${OPENSSL_VER_FULL} HEAD:crypto/openssl +``` + +The net-result should be just the applied patches from the freebsd/ directory. + +### Make build-related changes + +**IMPORTANT**: manual adjustments/care needed here. + +Update the appropriate makefiles to reflect changes in the vendor's +`build.info` metadata file. This is especially important if source files have +been added or removed. Keep in mind that the assembly files generated belong in +`sys/crypto/openssl`, and will therefore affect the kernel as well. + +If symbols have been added or removed, update the appropriate `Version.map` to +reflect these changes. Please try to stick to the new versioning scheme in the +target OpenSSL release to improve interoperability with binaries compiled +dynamically against the ports version of OpenSSL, for instance. + +Compare compilation flags, the list of files built and included, the list of +symbols generated with the corresponding port if available. + +### Build, install, and test + +Build and install a new version of world and the kernel with the newer release +of OpenSSL. Reboot the test host and run any appropriate tests using kyua, +`make checkworld`, etc. + +### Commit and push diff --git a/include/Makefile b/include/Makefile index 028e5055cc91..777529e344f2 100644 --- a/include/Makefile +++ b/include/Makefile @@ -318,7 +318,7 @@ LSUBDIRS+= dev/vmm .endif .endif -.if ${MACHINE_CPUARCH} == "powerpc" && ${MACHINE_ARCH} != "powerpcspe" +.if ${MACHINE_CPUARCH} == "powerpc" _dev_powermac_nvram= dev/powermac_nvram .endif diff --git a/include/search.h b/include/search.h index 0615da2b42ba..5ac25a0d491f 100644 --- a/include/search.h +++ b/include/search.h @@ -77,6 +77,7 @@ void twalk(const posix_tnode *, void (*)(const posix_tnode *, VISIT, int)); int hcreate_r(size_t, struct hsearch_data *); void hdestroy_r(struct hsearch_data *); int hsearch_r(ENTRY, ACTION, ENTRY **, struct hsearch_data *); +void tdestroy(void *, void (*)(void *)); #endif __END_DECLS diff --git a/include/stdbool.h b/include/stdbool.h index a03835ca6962..968967a4cfa6 100644 --- a/include/stdbool.h +++ b/include/stdbool.h @@ -26,15 +26,19 @@ * SUCH DAMAGE. */ +#ifndef __STDC_VERSION_STDBOOL_H__ +#define __STDC_VERSION_STDBOOL_H__ 202311L + #ifndef __bool_true_false_are_defined #define __bool_true_false_are_defined 1 -#ifndef __cplusplus +#if (__STDC_VERSION__ < 202311L) && !defined(__cplusplus) #define false 0 #define true 1 #define bool _Bool -#endif /* !__cplusplus */ +#endif /* (__STDC_VERSION__ < 202311L) && !defined(__cplusplus) */ #endif /* __bool_true_false_are_defined */ +#endif /* __STDC_VERSION_STDBOOL_H__ */ diff --git a/lib/geom/part/geom_part.c b/lib/geom/part/geom_part.c index ac1bc25118f1..852eec2d790a 100644 --- a/lib/geom/part/geom_part.c +++ b/lib/geom/part/geom_part.c @@ -46,6 +46,7 @@ #include <string.h> #include <strings.h> #include <unistd.h> + #include <libxo/xo.h> #include "core/geom.h" @@ -651,11 +652,12 @@ gpart_show_geom(struct ggeom *gp, const char *element, int show_providers) pp = LIST_FIRST(&gp->lg_consumer)->lg_provider; secsz = pp->lg_sectorsize; xo_open_instance("part"); - xo_emit("=>{t:start/%*jd} {t:sectors/%*jd} {t:name/%*s} {:scheme} ({h:size/%ld}){t:state}\n", - wblocks, (intmax_t)first, wblocks, (intmax_t)(last - first + 1), - wname, gp->lg_name, - scheme, pp->lg_mediasize, - s ? " [CORRUPT]": ""); + xo_emit("=>{t:start/%*jd} {t:sectors/%*jd} " + "{t:name/%*s} {:scheme} ({h:size/%jd})" + "{t:state}\n", + wblocks, (intmax_t)first, wblocks, (intmax_t)(last - first + 1), + wname, gp->lg_name, scheme, (intmax_t)pp->lg_mediasize, + s ? " [CORRUPT]": ""); xo_open_list("partitions"); while ((pp = find_provider(gp, first)) != NULL) { @@ -670,35 +672,43 @@ gpart_show_geom(struct ggeom *gp, const char *element, int show_providers) idx = atoi(s); if (first < sector) { xo_open_instance(s); - xo_emit(" {t:start/%*jd} {t:sectors/%*jd} {P:/%*s} {ne:free}- free - ({h:size/%ld})\n", - wblocks, (intmax_t)first, wblocks, - (intmax_t)(sector - first), wname, "", - "true", (sector - first) * secsz); + xo_emit(" {t:start/%*jd} " + "{t:sectors/%*jd} " + "{P:/%*s} " + "{ne:free}- free - ({h:size/%jd})\n", + wblocks, (intmax_t)first, + wblocks, (intmax_t)(sector - first), + wname, "", + "true", (intmax_t)(sector - first) * secsz); xo_close_instance(s); } xo_open_instance(s); xo_emit(" {t:start/%*jd} {t:sectors/%*jd}", - wblocks, (intmax_t)sector, wblocks, (intmax_t)length); + wblocks, (intmax_t)sector, wblocks, (intmax_t)length); if (show_providers) { - xo_emit(" {t:name/%*s}{e:index/%d}", wname, pp->lg_name, idx); - } else - xo_emit(" {t:index/%*d}{e:name}", wname, idx, pp->lg_name); + xo_emit(" {t:name/%*s}{e:index/%d}", + wname, pp->lg_name, idx); + } else { + xo_emit(" {t:index/%*d}{e:name}", + wname, idx, pp->lg_name); + } - if (strcmp(element, "label") == 0) + if (strcmp(element, "label") == 0) { xo_emit(" {:label}{e:type}{e:rawtype}", - find_provcfg(pp, element), - find_provcfg(pp, "type"), - find_provcfg(pp, "rawtype")); - else if (strcmp(element, "type") == 0) + find_provcfg(pp, element), + find_provcfg(pp, "type"), + find_provcfg(pp, "rawtype")); + } else if (strcmp(element, "type") == 0) { xo_emit(" {:type}{e:label}{e:rawtype}", - find_provcfg(pp, element), - find_provcfg(pp, "label"), - find_provcfg(pp, "rawtype")); - else + find_provcfg(pp, element), + find_provcfg(pp, "label"), + find_provcfg(pp, "rawtype")); + } else { xo_emit(" {:rawtype}{e:type}{e:label}", - find_provcfg(pp, element), - find_provcfg(pp, "type"), - find_provcfg(pp, "label")); + find_provcfg(pp, element), + find_provcfg(pp, "type"), + find_provcfg(pp, "label")); + } idx = 0; LIST_FOREACH(gc, &pp->lg_config, lg_config) { @@ -713,7 +723,7 @@ gpart_show_geom(struct ggeom *gp, const char *element, int show_providers) } if (idx) xo_emit("]"); - xo_emit(" ({h:size/%ld})\n", pp->lg_mediasize); + xo_emit(" ({h:size/%jd})\n", (intmax_t)pp->lg_mediasize); xo_close_instance(s); first = end + 1; } @@ -721,9 +731,10 @@ gpart_show_geom(struct ggeom *gp, const char *element, int show_providers) if (first <= last) { xo_open_instance("unallocated"); length = last - first + 1; - xo_emit(" {t:start/%*jd} {t:sectors/%*jd} {P:/%*s} {ne:free}- free - ({h:size/%ld})\n", + xo_emit(" {t:start/%*jd} {t:sectors/%*jd} " + "{P:/%*s} {ne:free}- free - ({h:size/%jd})\n", wblocks, (intmax_t)first, wblocks, (intmax_t)length, - wname, "", "true", length * secsz); + wname, "", "true", (intmax_t)length * secsz); xo_close_instance("unallocated"); } xo_close_list("partitions"); @@ -1112,7 +1123,7 @@ gpart_bootfile_read(const char *bootfile, ssize_t *size) if (sb.st_size == 0) errx(EXIT_FAILURE, "%s: empty file", bootfile); if (*size > 0 && sb.st_size > *size) - errx(EXIT_FAILURE, "%s: file too big (%zu limit)", bootfile, + errx(EXIT_FAILURE, "%s: file too big (%zd limit)", bootfile, *size); *size = sb.st_size; diff --git a/lib/googletest/Makefile.inc b/lib/googletest/Makefile.inc index 43ebace19a15..b1f7fa814166 100644 --- a/lib/googletest/Makefile.inc +++ b/lib/googletest/Makefile.inc @@ -10,3 +10,6 @@ CXXFLAGS+= ${GTESTS_FLAGS} # Silence warnings about usage of deprecated implicit copy constructors CXXWARNFLAGS+= -Wno-deprecated-copy + +# Silence warnings about implicit character conversions in gtest-printers.h +CXXWARNFLAGS+= ${NO_WCHARACTER_CONVERSION} diff --git a/lib/libblacklist/Makefile b/lib/libblacklist/Makefile index cac023d69bb7..d13633546c33 100644 --- a/lib/libblacklist/Makefile +++ b/lib/libblacklist/Makefile @@ -3,6 +3,8 @@ BLOCKLIST_DIR=${SRCTOP}/contrib/blocklist .PATH: ${BLOCKLIST_DIR}/lib ${BLOCKLIST_DIR}/include ${BLOCKLIST_DIR}/port PACKAGE= blocklist +LIB_PACKAGE= + LIB= blacklist SHLIB_MAJOR= 0 diff --git a/lib/libblocklist/Makefile b/lib/libblocklist/Makefile index 127abb23f43e..2f3ca53cf23a 100644 --- a/lib/libblocklist/Makefile +++ b/lib/libblocklist/Makefile @@ -3,6 +3,8 @@ BLOCKLIST_DIR=${SRCTOP}/contrib/blocklist .PATH: ${BLOCKLIST_DIR}/lib ${BLOCKLIST_DIR}/include ${BLOCKLIST_DIR}/port PACKAGE= blocklist +LIB_PACKAGE= + LIB= blocklist SHLIB_MAJOR= 0 diff --git a/lib/libc/amd64/string/stpncpy.S b/lib/libc/amd64/string/stpncpy.S index 764ee1d4008c..2efadc97a435 100644 --- a/lib/libc/amd64/string/stpncpy.S +++ b/lib/libc/amd64/string/stpncpy.S @@ -36,9 +36,7 @@ .set stpncpy, __stpncpy ARCHFUNCS(__stpncpy) ARCHFUNC(__stpncpy, scalar) -#if 0 /* temporarily disabled cf. PR 291720 */ ARCHFUNC(__stpncpy, baseline) -#endif ENDARCHFUNCS(__stpncpy) ARCHENTRY(__stpncpy, scalar) @@ -93,7 +91,6 @@ ARCHEND(__stpncpy, scalar) /* stpncpy(char *restrict rdi, const char *rsi, size_t rdx) */ ARCHENTRY(__stpncpy, baseline) #define bounce (-3*16-8) /* location of on-stack bounce buffer */ - test %rdx, %rdx # no bytes to copy? jz .L0 @@ -225,8 +222,8 @@ ARCHENTRY(__stpncpy, baseline) /* 1--32 bytes to copy, bounce through the stack */ .Lrunt: movdqa %xmm1, bounce+16(%rsp) # clear out rest of on-stack copy - bts %r10, %r8 # treat end of buffer as end of string and %r9d, %r8d # mask out head before string + bts %r10, %r8 # treat end of buffer as end of string test $0x1ffff, %r8d # end of string within first chunk or right after? jnz 0f # if yes, do not inspect second buffer @@ -235,10 +232,10 @@ ARCHENTRY(__stpncpy, baseline) pcmpeqb %xmm1, %xmm0 # NUL in second chunk? pmovmskb %xmm0, %r9d shl $16, %r9d - or %r9d, %r8d # merge found NUL bytes into NUL mask + or %r9, %r8 # merge found NUL bytes into NUL mask /* end of string after one buffer */ -0: tzcnt %r8d, %r8d # location of last char in string +0: tzcnt %r8, %r8 # location of last char in string movdqu %xmm1, bounce(%rsp, %r8, 1) # clear bytes behind string lea bounce(%rsp, %rcx, 1), %rsi # start of string copy on stack lea (%rdi, %r8, 1), %rax # return pointer to NUL byte diff --git a/lib/libc/csu/powerpcspe/Makefile.inc b/lib/libc/csu/powerpcspe/Makefile.inc deleted file mode 100644 index ddead75f874d..000000000000 --- a/lib/libc/csu/powerpcspe/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -# - -CFLAGS+= -DCRT_IRELOC_SUPPRESS diff --git a/lib/libc/gen/err.3 b/lib/libc/gen/err.3 index 088ead71239b..70a214152a19 100644 --- a/lib/libc/gen/err.3 +++ b/lib/libc/gen/err.3 @@ -114,6 +114,22 @@ preceded by another colon and space unless the argument is .Dv NULL . .Pp +If the kernel returned an extended error string in addition to the +.Va errno +code, the +.Fn err +function prints the string with interpolated values for parameters, +as provided to the corresponding invocation of +.Xr EXTERROR 9 . +If the extended error string was not provided, but extended error +information was, or even if string was provided and the +.Ev EXTERROR_VERBOSE +environment variable is present, an additional report is printed. +The report includes at least the category of the error, the name of +the source file (if known by the used version of libc), +the source line number, and parameters. +The format of the printed string is not contractual and might be changed. +.Pp In the case of the .Fn errc , .Fn verrc , diff --git a/lib/libc/gen/err.c b/lib/libc/gen/err.c index 16cbe27693e7..793bf7522e42 100644 --- a/lib/libc/gen/err.c +++ b/lib/libc/gen/err.c @@ -120,7 +120,7 @@ vexterr(bool doexterr, int code, const char *fmt, va_list ap) } fprintf(err_file, "%s", strerror(code)); if (doexterr && extstatus == 0 && exterr[0] != '\0') - fprintf(err_file, " (extended error %s)", exterr); + fprintf(err_file, " (%s)", exterr); fprintf(err_file, "\n"); } diff --git a/lib/libc/gen/exterr_cat_filenames.h b/lib/libc/gen/exterr_cat_filenames.h new file mode 100644 index 000000000000..883dd98289cd --- /dev/null +++ b/lib/libc/gen/exterr_cat_filenames.h @@ -0,0 +1,17 @@ +/* + * Automatically @generated, use + * tools/build/make_libc_exterr_cat_filenames.sh + */ + [EXTERR_CAT_FUSE_DEVICE] = "fs/fuse/fuse_device.c", + [EXTERR_CAT_FUSE_VFS] = "fs/fuse/fuse_vfsops.c", + [EXTERR_CAT_FUSE_VNOPS] = "fs/fuse/fuse_vnops.c", + [EXTERR_CAT_GEOM] = "geom/geom_subr.c", + [EXTERR_CAT_GEOMVFS] = "geom/geom_vfs.c", + [EXTERR_CAT_FILEDESC] = "kern/kern_descrip.c", + [EXTERR_CAT_INOTIFY] = "kern/vfs_inotify.c", + [EXTERR_CAT_GENIO] = "kern/sys_generic.c", + [EXTERR_CAT_VFSBIO] = "kern/vfs_bio.c", + [EXTERR_CAT_VFSSYSCALL] = "kern/vfs_syscalls.c", + [EXTERR_CAT_BRIDGE] = "net/if_bridge.c", + [EXTERR_CAT_SWAP] = "vm/swap_pager.c", + [EXTERR_CAT_MMAP] = "vm/vm_mmap.c", diff --git a/lib/libc/gen/uexterr_format.c b/lib/libc/gen/uexterr_format.c index e8ddfbd578e3..8d3b458ca9f2 100644 --- a/lib/libc/gen/uexterr_format.c +++ b/lib/libc/gen/uexterr_format.c @@ -8,28 +8,85 @@ * under sponsorship from the FreeBSD Foundation. */ -#include <sys/types.h> +#include <sys/param.h> #include <sys/exterrvar.h> #include <exterr.h> +#include <stdbool.h> #include <stdio.h> +#include <stdlib.h> #include <string.h> +#include <unistd.h> + +static const char * const cat_to_filenames[] = { +#include "exterr_cat_filenames.h" +}; + +static const char * +cat_to_filename(int category) +{ + if (category < 0 || category >= nitems(cat_to_filenames) || + cat_to_filenames[category] == NULL) + return ("unknown"); + return (cat_to_filenames[category]); +} + +static const char exterror_verbose_name[] = "EXTERROR_VERBOSE"; +enum exterr_verbose_state { + EXTERR_VERBOSE_UNKNOWN = 100, + EXTERR_VERBOSE_DEFAULT, + EXTERR_VERBOSE_ALLOW, +}; +static enum exterr_verbose_state exterror_verbose = EXTERR_VERBOSE_UNKNOWN; + +static void +exterr_verbose_init(void) +{ + /* + * No need to care about thread-safety, the result is + * idempotent. + */ + if (exterror_verbose != EXTERR_VERBOSE_UNKNOWN) + return; + if (issetugid()) { + exterror_verbose = EXTERR_VERBOSE_DEFAULT; + } else if (getenv(exterror_verbose_name) != NULL) { + exterror_verbose = EXTERR_VERBOSE_ALLOW; + } else { + exterror_verbose = EXTERR_VERBOSE_DEFAULT; + } +} int __uexterr_format(const struct uexterror *ue, char *buf, size_t bufsz) { + bool has_msg; + if (bufsz > UEXTERROR_MAXLEN) bufsz = UEXTERROR_MAXLEN; if (ue->error == 0) { strlcpy(buf, "", bufsz); return (0); } - if (ue->msg[0] == '\0') { - snprintf(buf, bufsz, - "errno %d category %u (src line %u) p1 %#jx p2 %#jx", - ue->error, ue->cat, ue->src_line, - (uintmax_t)ue->p1, (uintmax_t)ue->p2); + exterr_verbose_init(); + has_msg = ue->msg[0] != '\0'; + + if (has_msg) { + snprintf(buf, bufsz, ue->msg, (uintmax_t)ue->p1, + (uintmax_t)ue->p2); } else { - strlcpy(buf, ue->msg, bufsz); + strlcpy(buf, "", bufsz); + } + + if (exterror_verbose == EXTERR_VERBOSE_ALLOW || !has_msg) { + char lbuf[128]; + + snprintf(lbuf, sizeof(lbuf), + "errno %d category %u (src sys/%s:%u) p1 %#jx p2 %#jx", + ue->error, ue->cat, cat_to_filename(ue->cat), + ue->src_line, (uintmax_t)ue->p1, (uintmax_t)ue->p2); + if (has_msg) + strlcat(buf, " ", bufsz); + strlcat(buf, lbuf, bufsz); } return (0); } diff --git a/lib/libc/powerpcspe/Makefile.inc b/lib/libc/powerpcspe/Makefile.inc deleted file mode 100644 index 0b5879574480..000000000000 --- a/lib/libc/powerpcspe/Makefile.inc +++ /dev/null @@ -1,5 +0,0 @@ -CFLAGS+= -I${LIBC_SRCTOP}/powerpc - -# Long double is 64-bits -SRCS+=machdep_ldisd.c -SYM_MAPS+=${LIBC_SRCTOP}/powerpc/Symbol.map diff --git a/lib/libc/powerpcspe/gen/Makefile.inc b/lib/libc/powerpcspe/gen/Makefile.inc deleted file mode 100644 index 502f3dc231bf..000000000000 --- a/lib/libc/powerpcspe/gen/Makefile.inc +++ /dev/null @@ -1,5 +0,0 @@ -.include "${LIBC_SRCTOP}/powerpc/gen/Makefile.common" - -SRCS += fabs.S flt_rounds.c fpgetmask.c fpgetround.c \ - fpgetsticky.c fpsetmask.c fpsetround.c \ - _setjmp.S setjmp.S sigsetjmp.S diff --git a/lib/libc/powerpcspe/gen/_setjmp.S b/lib/libc/powerpcspe/gen/_setjmp.S deleted file mode 100644 index f282e0013f97..000000000000 --- a/lib/libc/powerpcspe/gen/_setjmp.S +++ /dev/null @@ -1,115 +0,0 @@ -/*- - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: _setjmp.S,v 1.1 1997/03/29 20:55:53 thorpej Exp $ */ - -#include <machine/asm.h> -/* - * C library -- _setjmp, _longjmp - * - * _longjmp(a,v) - * will generate a "return(v?v:1)" from the last call to - * _setjmp(a) - * by restoring registers from the stack. - * The previous signal state is NOT restored. - * - * jmpbuf layout: - * +------------+ - * | unused | - * +------------+ - * | unused | - * | | - * | (4 words) | - * | | - * +------------+ - * | saved regs | - * | ... | - */ - -ENTRY(_setjmp) - mflr %r11 - mfcr %r12 - evstdd %r1,24+0*8(%r3) - evstdd %r2,24+1*8(%r3) - evstdd %r11,24+2*8(%r3) - evstdd %r12,24+3*8(%r3) - evstdd %r13,24+4*8(%r3) - evstdd %r14,24+5*8(%r3) - evstdd %r15,24+6*8(%r3) - evstdd %r16,24+7*8(%r3) - evstdd %r17,24+8*8(%r3) - evstdd %r18,24+9*8(%r3) - evstdd %r19,24+10*8(%r3) - evstdd %r20,24+11*8(%r3) - evstdd %r21,24+12*8(%r3) - evstdd %r22,24+13*8(%r3) - evstdd %r23,24+14*8(%r3) - evstdd %r24,24+15*8(%r3) - evstdd %r25,24+16*8(%r3) - evstdd %r26,24+17*8(%r3) - evstdd %r27,24+18*8(%r3) - evstdd %r28,24+19*8(%r3) - evstdd %r29,24+20*8(%r3) - evstdd %r30,24+21*8(%r3) - evstdd %r31,24+22*8(%r3) - - li %r3,0 - blr -END(_setjmp) - -ENTRY(_longjmp) - evldd %r1,24+0*8(%r3) - evldd %r2,24+1*8(%r3) - evldd %r11,24+2*8(%r3) - evldd %r12,24+3*8(%r3) - evldd %r13,24+4*8(%r3) - evldd %r14,24+5*8(%r3) - evldd %r15,24+6*8(%r3) - evldd %r16,24+7*8(%r3) - evldd %r17,24+8*8(%r3) - evldd %r18,24+9*8(%r3) - evldd %r19,24+10*8(%r3) - evldd %r20,24+11*8(%r3) - evldd %r21,24+12*8(%r3) - evldd %r22,24+13*8(%r3) - evldd %r23,24+14*8(%r3) - evldd %r24,24+15*8(%r3) - evldd %r25,24+16*8(%r3) - evldd %r26,24+17*8(%r3) - evldd %r27,24+18*8(%r3) - evldd %r28,24+19*8(%r3) - evldd %r29,24+20*8(%r3) - evldd %r30,24+21*8(%r3) - evldd %r31,24+22*8(%r3) - - mtlr %r11 - mtcr %r12 - or. %r3,%r4,%r4 - bnelr - li %r3,1 - blr -END(_longjmp) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpcspe/gen/flt_rounds.c b/lib/libc/powerpcspe/gen/flt_rounds.c deleted file mode 100644 index 26dfca0e0e3a..000000000000 --- a/lib/libc/powerpcspe/gen/flt_rounds.c +++ /dev/null @@ -1,54 +0,0 @@ -/* $NetBSD: flt_rounds.c,v 1.4.10.3 2002/03/22 20:41:53 nathanw Exp $ */ - -/* - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Mark Brinicombe - * for the NetBSD Project. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include <sys/types.h> -#include <machine/float.h> -#include <machine/spr.h> - -#ifndef _SOFT_FLOAT -static const int map[] = { - 1, /* round to nearest */ - 0, /* round to zero */ - 2, /* round to positive infinity */ - 3 /* round to negative infinity */ -}; - -int -__flt_rounds() -{ - uint32_t fpscr; - - __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); - return map[(fpscr & 0x03)]; -} -#endif diff --git a/lib/libc/powerpcspe/gen/fpgetmask.c b/lib/libc/powerpcspe/gen/fpgetmask.c deleted file mode 100644 index f7679be4ca54..000000000000 --- a/lib/libc/powerpcspe/gen/fpgetmask.c +++ /dev/null @@ -1,46 +0,0 @@ -/* $NetBSD: fpgetmask.c,v 1.3 2002/01/13 21:45:47 thorpej Exp $ */ - -/* - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include <sys/types.h> -#include <machine/spr.h> -#include <ieeefp.h> - -#ifndef _SOFT_FLOAT -fp_except_t -fpgetmask() -{ - uint32_t fpscr; - - __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); - return ((fp_except_t)((fpscr >> 2) & 0x1f)); -} -#endif diff --git a/lib/libc/powerpcspe/gen/fpgetround.c b/lib/libc/powerpcspe/gen/fpgetround.c deleted file mode 100644 index 9c01bcbaf327..000000000000 --- a/lib/libc/powerpcspe/gen/fpgetround.c +++ /dev/null @@ -1,46 +0,0 @@ -/* $NetBSD: fpgetround.c,v 1.3 2002/01/13 21:45:47 thorpej Exp $ */ - -/* - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include <sys/types.h> -#include <machine/spr.h> -#include <ieeefp.h> - -#ifndef _SOFT_FLOAT -fp_rnd_t -fpgetround() -{ - uint32_t fpscr; - - __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); - return ((fp_rnd_t)(fpscr & 0x3)); -} -#endif diff --git a/lib/libc/powerpcspe/gen/fpgetsticky.c b/lib/libc/powerpcspe/gen/fpgetsticky.c deleted file mode 100644 index a97c27296cab..000000000000 --- a/lib/libc/powerpcspe/gen/fpgetsticky.c +++ /dev/null @@ -1,48 +0,0 @@ -/* $NetBSD: fpgetsticky.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ - -/* - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - - -#include "namespace.h" - -#include <sys/types.h> -#include <machine/spr.h> -#include <ieeefp.h> - -#ifndef _SOFT_FLOAT -fp_except_t -fpgetsticky() -{ - uint32_t fpscr; - - __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); - return ((fp_except_t)((fpscr >> 25) & 0x1f)); -} -#endif diff --git a/lib/libc/powerpcspe/gen/fpsetmask.c b/lib/libc/powerpcspe/gen/fpsetmask.c deleted file mode 100644 index a7a2569df905..000000000000 --- a/lib/libc/powerpcspe/gen/fpsetmask.c +++ /dev/null @@ -1,50 +0,0 @@ -/* $NetBSD: fpsetmask.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ - -/* - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include <sys/types.h> -#include <machine/spr.h> -#include <ieeefp.h> - -#ifndef _SOFT_FLOAT -fp_except_t -fpsetmask(fp_except_t mask) -{ - uint32_t fpscr; - fp_except_t old; - - __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); - old = (fp_except_t)((fpscr >> 2) & 0x1f); - fpscr = (fpscr & 0xffffff83) | ((mask & 0x1f) << 2); - __asm__ __volatile("mtspr %1,%0;isync" :: "r"(fpscr), "K"(SPR_SPEFSCR)); - return (old); -} -#endif diff --git a/lib/libc/powerpcspe/gen/fpsetround.c b/lib/libc/powerpcspe/gen/fpsetround.c deleted file mode 100644 index 2280e190b2f9..000000000000 --- a/lib/libc/powerpcspe/gen/fpsetround.c +++ /dev/null @@ -1,50 +0,0 @@ -/* $NetBSD: fpsetround.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ - -/* - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include <sys/types.h> -#include <machine/spr.h> -#include <ieeefp.h> - -#ifndef _SOFT_FLOAT -fp_rnd_t -fpsetround(fp_rnd_t rnd_dir) -{ - uint32_t fpscr; - fp_rnd_t old; - - __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR) ); - old = (fp_rnd_t)(fpscr & 0x3); - fpscr = (fpscr & 0xfffffffc) | rnd_dir; - __asm__ __volatile("mtspr %1, %0;isync" :: "r"(fpscr), "K"(SPR_SPEFSCR)); - return (old); -} -#endif diff --git a/lib/libc/powerpcspe/gen/setjmp.S b/lib/libc/powerpcspe/gen/setjmp.S deleted file mode 100644 index 1bd3edcf5239..000000000000 --- a/lib/libc/powerpcspe/gen/setjmp.S +++ /dev/null @@ -1,136 +0,0 @@ -/*- - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: setjmp.S,v 1.3 1998/10/03 12:30:38 tsubai Exp $ */ - -#include <machine/asm.h> -#include <sys/syscall.h> - -/* - * C library -- setjmp, longjmp - * - * longjmp(a,v) - * will generate a "return(v?v:1)" from the last call to - * setjmp(a) - * by restoring registers from the stack. - * The previous signal state is restored. - * - * jmpbuf layout: - * +------------+ - * | unused | - * +------------+ - * | sig state | - * | | - * | (4 words) | - * | | - * +------------+ - * | saved regs | - * | ... | - */ - -ENTRY(setjmp) - mr %r6,%r3 - li %r3,1 /* SIG_BLOCK, but doesn't matter */ - /* since set == NULL */ - li %r4,0 /* set = NULL */ - mr %r5,%r6 /* &oset */ - addi %r5,%r5,4 - li %r0, SYS_sigprocmask /*sigprocmask(SIG_BLOCK, NULL, &oset)*/ - sc /*assume no error XXX */ - mflr %r11 /* r11 <- link reg */ - mfcr %r12 /* r12 <- condition reg */ - mr %r10,%r1 /* r10 <- stackptr */ - mr %r9,%r2 /* r9 <- global ptr */ - evstdd %r9,24+0*8(%r6) - evstdd %r10,24+1*8(%r6) - evstdd %r11,24+2*8(%r6) - evstdd %r12,24+3*8(%r6) - evstdd %r13,24+4*8(%r6) - evstdd %r14,24+5*8(%r6) - evstdd %r15,24+6*8(%r6) - evstdd %r16,24+7*8(%r6) - evstdd %r17,24+8*8(%r6) - evstdd %r18,24+9*8(%r6) - evstdd %r19,24+10*8(%r6) - evstdd %r20,24+11*8(%r6) - evstdd %r21,24+12*8(%r6) - evstdd %r22,24+13*8(%r6) - evstdd %r23,24+14*8(%r6) - evstdd %r24,24+15*8(%r6) - evstdd %r25,24+16*8(%r6) - evstdd %r26,24+17*8(%r6) - evstdd %r27,24+18*8(%r6) - evstdd %r28,24+19*8(%r6) - evstdd %r29,24+20*8(%r6) - evstdd %r30,24+21*8(%r6) - evstdd %r31,24+22*8(%r6) - - li %r3,0 /* return (0) */ - blr -END(setjmp) - - WEAK_REFERENCE(CNAME(__longjmp), longjmp) -ENTRY(__longjmp) - evldd %r9,24+0*8(%r3) - evldd %r10,24+1*8(%r3) - evldd %r11,24+2*8(%r3) - evldd %r12,24+3*8(%r3) - evldd %r13,24+4*8(%r3) - evldd %r14,24+5*8(%r3) - evldd %r15,24+6*8(%r3) - evldd %r16,24+7*8(%r3) - evldd %r17,24+8*8(%r3) - evldd %r18,24+9*8(%r3) - evldd %r19,24+10*8(%r3) - evldd %r20,24+11*8(%r3) - evldd %r21,24+12*8(%r3) - evldd %r22,24+13*8(%r3) - evldd %r23,24+14*8(%r3) - evldd %r24,24+15*8(%r3) - evldd %r25,24+16*8(%r3) - evldd %r26,24+17*8(%r3) - evldd %r27,24+18*8(%r3) - evldd %r28,24+19*8(%r3) - evldd %r29,24+20*8(%r3) - evldd %r30,24+21*8(%r3) - evldd %r31,24+22*8(%r3) - - mr %r6,%r4 /* save val param */ - mtlr %r11 /* r11 -> link reg */ - mtcr %r12 /* r12 -> condition reg */ - mr %r1,%r10 /* r10 -> stackptr */ - mr %r4,%r3 - li %r3,3 /* SIG_SETMASK */ - addi %r4,%r4,4 /* &set */ - li %r5,0 /* oset = NULL */ - li %r0,SYS_sigprocmask /* sigprocmask(SIG_SET, &set, NULL) */ - sc /* assume no error XXX */ - or. %r3,%r6,%r6 - bnelr - li %r3,1 - blr -END(__longjmp) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpcspe/gen/sigsetjmp.S b/lib/libc/powerpcspe/gen/sigsetjmp.S deleted file mode 100644 index 45c85c3fce23..000000000000 --- a/lib/libc/powerpcspe/gen/sigsetjmp.S +++ /dev/null @@ -1,148 +0,0 @@ -/*- - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: sigsetjmp.S,v 1.4 1998/10/03 12:30:38 tsubai Exp $ */ - -#include <machine/asm.h> -/* - * C library -- sigsetjmp, siglongjmp - * - * siglongjmp(a,v) - * will generate a "return(v?v:1)" from the last call to - * sigsetjmp(a, savemask) - * by restoring registers from the stack. - * The previous signal state is restored if savemask is non-zero - * - * jmpbuf layout: - * +------------+ - * | savemask | - * +------------+ - * | sig state | - * | | - * | (4 words) | - * | | - * +------------+ - * | saved regs | - * | ... | - */ - - -#include <sys/syscall.h> - -ENTRY(sigsetjmp) - mr %r6,%r3 - stw %r4,0(%r3) - or. %r7,%r4,%r4 - beq 1f - li %r3,1 /* SIG_BLOCK, but doesn't matter */ - /* since set == NULL */ - li %r4,0 /* set = NULL */ - mr %r5,%r6 /* &oset */ - addi %r5,%r5,4 - li %r0, SYS_sigprocmask /* sigprocmask(SIG_BLOCK, NULL, &oset)*/ - sc /* assume no error XXX */ -1: - mflr %r11 - mfcr %r12 - mr %r10,%r1 - mr %r9,%r2 - - /* FPRs */ - evstdd %r9,24+0*8(%r6) - evstdd %r10,24+1*8(%r6) - evstdd %r11,24+2*8(%r6) - evstdd %r12,24+3*8(%r6) - evstdd %r13,24+4*8(%r6) - evstdd %r14,24+5*8(%r6) - evstdd %r15,24+6*8(%r6) - evstdd %r16,24+7*8(%r6) - evstdd %r17,24+8*8(%r6) - evstdd %r18,24+9*8(%r6) - evstdd %r19,24+10*8(%r6) - evstdd %r20,24+11*8(%r6) - evstdd %r21,24+12*8(%r6) - evstdd %r22,24+13*8(%r6) - evstdd %r23,24+14*8(%r6) - evstdd %r24,24+15*8(%r6) - evstdd %r25,24+16*8(%r6) - evstdd %r26,24+17*8(%r6) - evstdd %r27,24+18*8(%r6) - evstdd %r28,24+19*8(%r6) - evstdd %r29,24+20*8(%r6) - evstdd %r30,24+21*8(%r6) - evstdd %r31,24+22*8(%r6) - - li %r3,0 - blr -END(sigsetjmp) - -ENTRY(siglongjmp) - - /* FPRs */ - evldd %r9,24+0*8(%r3) - evldd %r10,24+1*8(%r3) - evldd %r11,24+2*8(%r3) - evldd %r12,24+3*8(%r3) - evldd %r13,24+4*8(%r3) - evldd %r14,24+5*8(%r3) - evldd %r15,24+6*8(%r3) - evldd %r16,24+7*8(%r3) - evldd %r17,24+8*8(%r3) - evldd %r18,24+9*8(%r3) - evldd %r19,24+10*8(%r3) - evldd %r20,24+11*8(%r3) - evldd %r21,24+12*8(%r3) - evldd %r22,24+13*8(%r3) - evldd %r23,24+14*8(%r3) - evldd %r24,24+15*8(%r3) - evldd %r25,24+16*8(%r3) - evldd %r26,24+17*8(%r3) - evldd %r27,24+18*8(%r3) - evldd %r28,24+19*8(%r3) - evldd %r29,24+20*8(%r3) - evldd %r30,24+21*8(%r3) - evldd %r31,24+22*8(%r3) - - lwz %r7,0(%r3) - mr %r6,%r4 - mtlr %r11 - mtcr %r12 - mr %r1,%r10 - or. %r7,%r7,%r7 - beq 1f - mr %r4,%r3 - li %r3,3 /* SIG_SETMASK */ - addi %r4,%r4,4 /* &set */ - li %r5,0 /* oset = NULL */ - li %r0,SYS_sigprocmask /* sigprocmask(SIG_SET, &set, NULL) */ - sc /* assume no error XXX */ -1: - or. %r3,%r6,%r6 - bnelr - li %r3,1 - blr -END(siglongjmp) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpcspe/softfloat/milieu.h b/lib/libc/powerpcspe/softfloat/milieu.h deleted file mode 100644 index 6139aa58b982..000000000000 --- a/lib/libc/powerpcspe/softfloat/milieu.h +++ /dev/null @@ -1,48 +0,0 @@ -/* $NetBSD: milieu.h,v 1.1 2000/12/29 20:13:54 bjh21 Exp $ */ - -/* -=============================================================================== - -This C header file is part of the SoftFloat IEC/IEEE Floating-point -Arithmetic Package, Release 2a. - -Written by John R. Hauser. This work was made possible in part by the -International Computer Science Institute, located at Suite 600, 1947 Center -Street, Berkeley, California 94704. Funding was partially provided by the -National Science Foundation under grant MIP-9311980. The original version -of this code was written as part of a project to build a fixed-point vector -processor in collaboration with the University of California at Berkeley, -overseen by Profs. Nelson Morgan and John Wawrzynek. More information -is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ -arithmetic/SoftFloat.html'. - -THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort -has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT -TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO -PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY -AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. - -Derivative works are acceptable, even for commercial purposes, so long as -(1) they include prominent notice that the work is derivative, and (2) they -include prominent notice akin to these four paragraphs for those parts of -this code that are retained. - -=============================================================================== -*/ - -/* -------------------------------------------------------------------------------- -Include common integer types and flags. -------------------------------------------------------------------------------- -*/ -#include "powerpc-gcc.h" - -/* -------------------------------------------------------------------------------- -Symbolic Boolean literals. -------------------------------------------------------------------------------- -*/ -enum { - FALSE = 0, - TRUE = 1 -}; diff --git a/lib/libc/powerpcspe/softfloat/powerpc-gcc.h b/lib/libc/powerpcspe/softfloat/powerpc-gcc.h deleted file mode 100644 index d11198866e39..000000000000 --- a/lib/libc/powerpcspe/softfloat/powerpc-gcc.h +++ /dev/null @@ -1,91 +0,0 @@ -/* $NetBSD: arm-gcc.h,v 1.2 2001/02/21 18:09:25 bjh21 Exp $ */ - -/* -------------------------------------------------------------------------------- -One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined. -------------------------------------------------------------------------------- -*/ -#define BIGENDIAN - -/* -------------------------------------------------------------------------------- -The macro `BITS64' can be defined to indicate that 64-bit integer types are -supported by the compiler. -------------------------------------------------------------------------------- -*/ -#define BITS64 - -/* -------------------------------------------------------------------------------- -Each of the following `typedef's defines the most convenient type that holds -integers of at least as many bits as specified. For example, `uint8' should -be the most convenient type that can hold unsigned integers of as many as -8 bits. The `flag' type must be able to hold either a 0 or 1. For most -implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed -to the same as `int'. -------------------------------------------------------------------------------- -*/ -typedef int flag; -typedef unsigned int uint8; -typedef int int8; -typedef unsigned int uint16; -typedef int int16; -typedef unsigned int uint32; -typedef signed int int32; -#ifdef BITS64 -typedef unsigned long long int uint64; -typedef signed long long int int64; -#endif - -/* -------------------------------------------------------------------------------- -Each of the following `typedef's defines a type that holds integers -of _exactly_ the number of bits specified. For instance, for most -implementation of C, `bits16' and `sbits16' should be `typedef'ed to -`unsigned short int' and `signed short int' (or `short int'), respectively. -------------------------------------------------------------------------------- -*/ -typedef unsigned char bits8; -typedef signed char sbits8; -typedef unsigned short int bits16; -typedef signed short int sbits16; -typedef unsigned int bits32; -typedef signed int sbits32; -#ifdef BITS64 -typedef unsigned long long int bits64; -typedef signed long long int sbits64; -#endif - -#ifdef BITS64 -/* -------------------------------------------------------------------------------- -The `LIT64' macro takes as its argument a textual integer literal and -if necessary ``marks'' the literal as having a 64-bit integer type. -For example, the GNU C Compiler (`gcc') requires that 64-bit literals be -appended with the letters `LL' standing for `long long', which is `gcc's -name for the 64-bit integer type. Some compilers may allow `LIT64' to be -defined as the identity macro: `#define LIT64( a ) a'. -------------------------------------------------------------------------------- -*/ -#define LIT64( a ) a##LL -#endif - -/* -------------------------------------------------------------------------------- -The macro `INLINE' can be used before functions that should be inlined. If -a compiler does not support explicit inlining, this macro should be defined -to be `static'. -------------------------------------------------------------------------------- -*/ -#define INLINE static __inline - -/* -------------------------------------------------------------------------------- -The ARM FPA is odd in that it stores doubles high-order word first, no matter -what the endianness of the CPU. VFP is sane. -------------------------------------------------------------------------------- -*/ -#if defined(SOFTFLOAT_FOR_GCC) -#define FLOAT64_DEMANGLE(a) (a) -#define FLOAT64_MANGLE(a) (a) -#endif diff --git a/lib/libc/powerpcspe/softfloat/softfloat.h b/lib/libc/powerpcspe/softfloat/softfloat.h deleted file mode 100644 index b20cb3e7aa00..000000000000 --- a/lib/libc/powerpcspe/softfloat/softfloat.h +++ /dev/null @@ -1,306 +0,0 @@ -/* $NetBSD: softfloat.h,v 1.6 2002/05/12 13:12:46 bjh21 Exp $ */ - -/* This is a derivative work. */ - -/* -=============================================================================== - -This C header file is part of the SoftFloat IEC/IEEE Floating-point -Arithmetic Package, Release 2a. - -Written by John R. Hauser. This work was made possible in part by the -International Computer Science Institute, located at Suite 600, 1947 Center -Street, Berkeley, California 94704. Funding was partially provided by the -National Science Foundation under grant MIP-9311980. The original version -of this code was written as part of a project to build a fixed-point vector -processor in collaboration with the University of California at Berkeley, -overseen by Profs. Nelson Morgan and John Wawrzynek. More information -is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ -arithmetic/SoftFloat.html'. - -THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort -has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT -TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO -PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY -AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. - -Derivative works are acceptable, even for commercial purposes, so long as -(1) they include prominent notice that the work is derivative, and (2) they -include prominent notice akin to these four paragraphs for those parts of -this code that are retained. - -=============================================================================== -*/ - -/* -------------------------------------------------------------------------------- -The macro `FLOATX80' must be defined to enable the extended double-precision -floating-point format `floatx80'. If this macro is not defined, the -`floatx80' type will not be defined, and none of the functions that either -input or output the `floatx80' type will be defined. The same applies to -the `FLOAT128' macro and the quadruple-precision format `float128'. -------------------------------------------------------------------------------- -*/ -/* #define FLOATX80 */ -/* #define FLOAT128 */ - -#include <machine/ieeefp.h> - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point types. -------------------------------------------------------------------------------- -*/ -typedef unsigned int float32; -typedef unsigned long long float64; -#ifdef FLOATX80 -typedef struct { - unsigned short high; - unsigned long long low; -} floatx80; -#endif -#ifdef FLOAT128 -typedef struct { - unsigned long long high, low; -} float128; -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point underflow tininess-detection mode. -------------------------------------------------------------------------------- -*/ -#ifndef SOFTFLOAT_FOR_GCC -extern int8 float_detect_tininess; -#endif -enum { - float_tininess_after_rounding = 0, - float_tininess_before_rounding = 1 -}; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point rounding mode. -------------------------------------------------------------------------------- -*/ -extern fp_rnd_t float_rounding_mode; -enum { - float_round_nearest_even = FP_RN, - float_round_to_zero = FP_RZ, - float_round_down = FP_RM, - float_round_up = FP_RP -}; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point exception flags. -------------------------------------------------------------------------------- -*/ -typedef fp_except_t fp_except; - -extern fp_except float_exception_flags; -extern fp_except float_exception_mask; -enum { - float_flag_inexact = FP_X_IMP, - float_flag_underflow = FP_X_UFL, - float_flag_overflow = FP_X_OFL, - float_flag_divbyzero = FP_X_DZ, - float_flag_invalid = FP_X_INV -}; - -/* -------------------------------------------------------------------------------- -Routine to raise any or all of the software IEC/IEEE floating-point -exception flags. -------------------------------------------------------------------------------- -*/ -void float_raise( fp_except ); - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE integer-to-floating-point conversion routines. -------------------------------------------------------------------------------- -*/ -float32 int32_to_float32( int ); -float64 int32_to_float64( int ); -#ifdef FLOATX80 -floatx80 int32_to_floatx80( int ); -#endif -#ifdef FLOAT128 -float128 int32_to_float128( int ); -#endif -float32 int64_to_float32( long long ); -float64 int64_to_float64( long long ); -#ifdef FLOATX80 -floatx80 int64_to_floatx80( long long ); -#endif -#ifdef FLOAT128 -float128 int64_to_float128( long long ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE single-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float32_to_int32( float32 ); -int float32_to_int32_round_to_zero( float32 ); -unsigned int float32_to_uint32_round_to_zero( float32 ); -long long float32_to_int64( float32 ); -long long float32_to_int64_round_to_zero( float32 ); -float64 float32_to_float64( float32 ); -#ifdef FLOATX80 -floatx80 float32_to_floatx80( float32 ); -#endif -#ifdef FLOAT128 -float128 float32_to_float128( float32 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE single-precision operations. -------------------------------------------------------------------------------- -*/ -float32 float32_round_to_int( float32 ); -float32 float32_add( float32, float32 ); -float32 float32_sub( float32, float32 ); -float32 float32_mul( float32, float32 ); -float32 float32_div( float32, float32 ); -float32 float32_rem( float32, float32 ); -float32 float32_sqrt( float32 ); -int float32_eq( float32, float32 ); -int float32_le( float32, float32 ); -int float32_lt( float32, float32 ); -int float32_eq_signaling( float32, float32 ); -int float32_le_quiet( float32, float32 ); -int float32_lt_quiet( float32, float32 ); -#ifndef SOFTFLOAT_FOR_GCC -int float32_is_signaling_nan( float32 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE double-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float64_to_int32( float64 ); -int float64_to_int32_round_to_zero( float64 ); -unsigned int float64_to_uint32_round_to_zero( float64 ); -long long float64_to_int64( float64 ); -long long float64_to_int64_round_to_zero( float64 ); -float32 float64_to_float32( float64 ); -#ifdef FLOATX80 -floatx80 float64_to_floatx80( float64 ); -#endif -#ifdef FLOAT128 -float128 float64_to_float128( float64 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE double-precision operations. -------------------------------------------------------------------------------- -*/ -float64 float64_round_to_int( float64 ); -float64 float64_add( float64, float64 ); -float64 float64_sub( float64, float64 ); -float64 float64_mul( float64, float64 ); -float64 float64_div( float64, float64 ); -float64 float64_rem( float64, float64 ); -float64 float64_sqrt( float64 ); -int float64_eq( float64, float64 ); -int float64_le( float64, float64 ); -int float64_lt( float64, float64 ); -int float64_eq_signaling( float64, float64 ); -int float64_le_quiet( float64, float64 ); -int float64_lt_quiet( float64, float64 ); -#ifndef SOFTFLOAT_FOR_GCC -int float64_is_signaling_nan( float64 ); -#endif - -#ifdef FLOATX80 - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int floatx80_to_int32( floatx80 ); -int floatx80_to_int32_round_to_zero( floatx80 ); -long long floatx80_to_int64( floatx80 ); -long long floatx80_to_int64_round_to_zero( floatx80 ); -float32 floatx80_to_float32( floatx80 ); -float64 floatx80_to_float64( floatx80 ); -#ifdef FLOAT128 -float128 floatx80_to_float128( floatx80 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision rounding precision. Valid -values are 32, 64, and 80. -------------------------------------------------------------------------------- -*/ -extern int floatx80_rounding_precision; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision operations. -------------------------------------------------------------------------------- -*/ -floatx80 floatx80_round_to_int( floatx80 ); -floatx80 floatx80_add( floatx80, floatx80 ); -floatx80 floatx80_sub( floatx80, floatx80 ); -floatx80 floatx80_mul( floatx80, floatx80 ); -floatx80 floatx80_div( floatx80, floatx80 ); -floatx80 floatx80_rem( floatx80, floatx80 ); -floatx80 floatx80_sqrt( floatx80 ); -int floatx80_eq( floatx80, floatx80 ); -int floatx80_le( floatx80, floatx80 ); -int floatx80_lt( floatx80, floatx80 ); -int floatx80_eq_signaling( floatx80, floatx80 ); -int floatx80_le_quiet( floatx80, floatx80 ); -int floatx80_lt_quiet( floatx80, floatx80 ); -int floatx80_is_signaling_nan( floatx80 ); - -#endif - -#ifdef FLOAT128 - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE quadruple-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float128_to_int32( float128 ); -int float128_to_int32_round_to_zero( float128 ); -long long float128_to_int64( float128 ); -long long float128_to_int64_round_to_zero( float128 ); -float32 float128_to_float32( float128 ); -float64 float128_to_float64( float128 ); -#ifdef FLOATX80 -floatx80 float128_to_floatx80( float128 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE quadruple-precision operations. -------------------------------------------------------------------------------- -*/ -float128 float128_round_to_int( float128 ); -float128 float128_add( float128, float128 ); -float128 float128_sub( float128, float128 ); -float128 float128_mul( float128, float128 ); -float128 float128_div( float128, float128 ); -float128 float128_rem( float128, float128 ); -float128 float128_sqrt( float128 ); -int float128_eq( float128, float128 ); -int float128_le( float128, float128 ); -int float128_lt( float128, float128 ); -int float128_eq_signaling( float128, float128 ); -int float128_le_quiet( float128, float128 ); -int float128_lt_quiet( float128, float128 ); -int float128_is_signaling_nan( float128 ); - -#endif - diff --git a/lib/libc/stdlib/Makefile.inc b/lib/libc/stdlib/Makefile.inc index b878a7625e9f..c311ba3d2bcc 100644 --- a/lib/libc/stdlib/Makefile.inc +++ b/lib/libc/stdlib/Makefile.inc @@ -1,19 +1,76 @@ # machine-independent stdlib sources .PATH: ${LIBC_SRCTOP}/${LIBC_ARCH}/stdlib ${LIBC_SRCTOP}/stdlib -MISRCS+=C99_Exit.c a64l.c abort.c abs.c atexit.c atof.c atoi.c atol.c atoll.c \ - bsearch.c bsearch_b.c \ - cxa_thread_atexit.c cxa_thread_atexit_impl.c \ - div.c exit.c getenv.c getopt.c getopt_long.c \ - getsubopt.c hcreate.c hcreate_r.c hdestroy_r.c heapsort.c heapsort_b.c \ - hsearch_r.c imaxabs.c imaxdiv.c \ - insque.c l64a.c labs.c ldiv.c llabs.c lldiv.c lsearch.c memalignment.c \ - merge.c mergesort_b.c ptsname.c qsort.c qsort_r.c qsort_r_compat.c \ - qsort_s.c quick_exit.c radixsort.c rand.c \ - random.c reallocarray.c reallocf.c realpath.c recallocarray.c remque.c \ - set_constraint_handler_s.c strfmon.c strtoimax.c \ - strtol.c strtold.c strtoll.c strtoq.c strtoul.c strtonum.c strtoull.c \ - strtoumax.c strtouq.c system.c tdelete.c tfind.c tsearch.c twalk.c +MISRCS+= \ + C99_Exit.c \ + a64l.c \ + abort.c \ + abs.c \ + atexit.c \ + atof.c \ + atoi.c \ + atol.c \ + atoll.c \ + bsearch.c \ + bsearch_b.c \ + cxa_thread_atexit.c \ + cxa_thread_atexit_impl.c \ + div.c \ + exit.c \ + getenv.c \ + getopt.c \ + getopt_long.c \ + getsubopt.c \ + hcreate.c \ + hcreate_r.c \ + hdestroy_r.c \ + heapsort.c \ + heapsort_b.c \ + hsearch_r.c \ + imaxabs.c \ + imaxdiv.c \ + insque.c \ + l64a.c \ + labs.c \ + ldiv.c \ + llabs.c \ + lldiv.c \ + lsearch.c \ + memalignment.c \ + merge.c \ + mergesort_b.c \ + ptsname.c \ + qsort.c \ + qsort_r.c \ + qsort_r_compat.c \ + qsort_s.c \ + quick_exit.c \ + radixsort.c \ + rand.c \ + random.c \ + reallocarray.c \ + reallocf.c \ + realpath.c \ + recallocarray.c \ + remque.c \ + set_constraint_handler_s.c \ + strfmon.c \ + strtoimax.c \ + strtol.c \ + strtold.c \ + strtoll.c \ + strtoq.c \ + strtoul.c \ + strtonum.c \ + strtoull.c \ + strtoumax.c \ + strtouq.c \ + system.c \ + tdelete.c \ + tdestroy.c \ + tfind.c \ + tsearch.c \ + twalk.c CFLAGS.qsort.c+= -Wsign-compare @@ -90,4 +147,5 @@ MLINKS+=strtoul.3 strtoull.3 \ strtoul.3 strtoumax.3 MLINKS+=tsearch.3 tdelete.3 \ tsearch.3 tfind.3 \ - tsearch.3 twalk.3 + tsearch.3 twalk.3 \ + tsearch.3 tdestroy.3 diff --git a/lib/libc/stdlib/Symbol.map b/lib/libc/stdlib/Symbol.map index 8b7e97c3cbdc..03a6d0b543ac 100644 --- a/lib/libc/stdlib/Symbol.map +++ b/lib/libc/stdlib/Symbol.map @@ -134,6 +134,7 @@ FBSD_1.8 { FBSD_1.9 { memalignment; recallocarray; + tdestroy; }; FBSDprivate_1.0 { diff --git a/lib/libc/stdlib/getopt.3 b/lib/libc/stdlib/getopt.3 index a5b5bff9d1a7..1b40f6dfea7e 100644 --- a/lib/libc/stdlib/getopt.3 +++ b/lib/libc/stdlib/getopt.3 @@ -27,7 +27,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.Dd June 5, 2014 +.Dd December 14, 2025 .Dt GETOPT 3 .Os .Sh NAME @@ -60,30 +60,49 @@ if it has been specified in the string of accepted option characters, The option string .Fa optstring may contain the following elements: individual characters, and -characters followed by a colon to indicate an option argument -is to follow. -If an individual character is followed by two colons, then the -option argument is optional; +characters followed by a colon +.Pq Ql \&: +to indicate an option argument is to follow. +If an individual character is followed by two colons +.Pq Ql \&:\&: , +then the option argument is optional; .Va optarg is set to the rest of the current -.Va argv +.Fa argv word, or .Dv NULL if there were no more characters in the current word. -This is a -.Tn GNU -extension. +This is an extension not covered by POSIX. +.Pp For example, an option string .Li \&"x" recognizes an option -.Dq Fl x , -and an option string +.Dq Fl x . +.Pp +An option string .Li \&"x:" -recognizes an option and argument -.Dq Fl x Ar argument . +recognizes an option with an argument, both +.Dq Fl x Ns Ar arg\^ , +and +.Dq Fl x Ar arg\^ . It does not matter to .Fn getopt -if a following argument has leading white space. +if the option's argument is a separate word or not. +.Pp +An option string +.Li \&"x::" +recognizes the option both without an argument +.Dq Fl x , +and with an argument +.Dq Fl x Ns Ar arg\^ . +In the latter case the argument must be part of the same +.Fa argv +word. +The +.Dq Fl x +and +.Dq Ar arg\^ +must not be separated by a whitespace on the command line. .Pp On return from .Fn getopt , @@ -267,7 +286,7 @@ Care should be taken not to use as the first character in .Fa optstring to avoid a semantic conflict with -.Tn GNU +GNU .Fn getopt , which assigns different meaning to an .Fa optstring diff --git a/lib/libc/stdlib/tdestroy.c b/lib/libc/stdlib/tdestroy.c new file mode 100644 index 000000000000..c324e151da11 --- /dev/null +++ b/lib/libc/stdlib/tdestroy.c @@ -0,0 +1,68 @@ +/* + * Copyright 2025 The FreeBSD Foundation + * + * SPDX-License-Identifier: BSD-2-Clause + * + * This software was developed by Konstantin Belousov <kib@FreeBSD.org> + * under sponsorship from the FreeBSD Foundation. + */ + +#define _SEARCH_PRIVATE +#include <search.h> +#include <stdlib.h> + +static void +nul_node_free(void *node __unused) +{ +} + +/* Find the leftmost node. */ +static posix_tnode * +tdestroy_find_leftmost(posix_tnode *tn) +{ + while (tn->llink != NULL) + tn = tn->llink; + return (tn); +} + +/* + * This algorithm for non-recursive non-allocating destruction of the tree + * is described in + * https://codegolf.stackexchange.com/questions/478/free-a-binary-tree/489#489P + * and in https://devblogs.microsoft.com/oldnewthing/20251107-00/?p=111774. + */ +void +tdestroy(void *rootp, void (*node_free)(void *)) +{ + posix_tnode *tn, *tn_leftmost, *xtn; + + tn = rootp; + if (tn == NULL) + return; + if (node_free == NULL) + node_free = nul_node_free; + tn_leftmost = tn; + + while (tn != NULL) { + /* + * Make the right subtree the left subtree of the + * leftmost node, and recalculate the leftmost. + */ + tn_leftmost = tdestroy_find_leftmost(tn_leftmost); + if (tn->rlink != NULL) { + tn_leftmost->llink = tn->rlink; + tn_leftmost = tn_leftmost->llink; + } + + /* + * At this point, all children of tn have been + * arranged to be reachable via tn->left. We can + * safely delete the current node and advance to its + * left child as the new root. + */ + xtn = tn->llink; + node_free(tn->key); + free(tn); + tn = xtn; + } +} diff --git a/lib/libc/stdlib/tsearch.3 b/lib/libc/stdlib/tsearch.3 index edee01cafc52..f412c37a4ef0 100644 --- a/lib/libc/stdlib/tsearch.3 +++ b/lib/libc/stdlib/tsearch.3 @@ -36,6 +36,7 @@ .In search.h .Ft void * .Fn tdelete "const void * restrict key" "posix_tnode ** restrict rootp" "int (*compar) (const void *, const void *)" +.Fn tdestroy "posix_tnode *root" "(void (*node_free)(void *)" .Ft posix_tnode * .Fn tfind "const void *key" "posix_tnode * const *rootp" "int (*compar) (const void *, const void *)" .Ft posix_tnode * @@ -45,6 +46,7 @@ .Sh DESCRIPTION The .Fn tdelete , +.Fn tdestroy , .Fn tfind , .Fn tsearch , and @@ -95,6 +97,13 @@ If the node to be deleted is the root of the binary search tree, will be adjusted. .Pp The +.Fn tdestroy +function destroys the whole search tree, freeing all allocated nodes. +If tree keys need special handling on free, the +.Fa node_free +function can be provided, which is called on each key. +.Pp +The .Fn twalk function walks the binary search tree rooted in @@ -128,7 +137,9 @@ is NULL or the datum cannot be found. .Pp The .Fn twalk -function returns no value. +and +.Fn tdestroy +functions return no value. .Sh EXAMPLES This example uses .Fn tsearch @@ -184,6 +195,7 @@ main(void) tdelete(four, &root, comp); twalk(root, printwalk); + tdestroy(root, NULL); return 0; } .Ed @@ -192,8 +204,17 @@ main(void) .Xr hsearch 3 , .Xr lsearch 3 .Sh STANDARDS -These functions conform to +These +.Fn tdelete , +.Fn tfind , +.Fn tsearch , +and +.Fn twalk +functions conform to .St -p1003.1-2008 . +The +.Fn tdestroy +function is the glibc extension. .Pp The .Fa posix_tnode diff --git a/lib/libc/tests/stdlib/tsearch_test.c b/lib/libc/tests/stdlib/tsearch_test.c index ee9deec588cb..f42729e5e75c 100644 --- a/lib/libc/tests/stdlib/tsearch_test.c +++ b/lib/libc/tests/stdlib/tsearch_test.c @@ -147,10 +147,75 @@ ATF_TC_BODY(tsearch_test, tc) ATF_CHECK_EQ(NULL, root); } +static int nodes; + +struct my_data { + int key; +}; + +static struct my_data * +new_my_data(int key) +{ + struct my_data *res; + + res = malloc(sizeof(struct my_data)); + res->key = key; + nodes++; + return (res); +} + +void +free_my_data(void *mdp) +{ + free(mdp); + nodes--; +} + +static int +compare_my_data(const void *mdp1, const void *mdp2) +{ + const struct my_data *md1, *md2; + + md1 = mdp1; + md2 = mdp2; + + return (md1->key - md2->key); +} + +static posix_tnode *root = NULL; + +static void +insert(int x) +{ + struct my_data *md; + + md = new_my_data(x); + tsearch(md, &root, compare_my_data); +} + +ATF_TC_WITHOUT_HEAD(tdestroy_test); +ATF_TC_BODY(tdestroy_test, tc) +{ + root = NULL; + insert(1); + insert(100); + insert(1000); + insert(5); + insert(6); + insert(12); + insert(2000); + insert(3); + + ATF_CHECK_EQ(8, nodes); + tdestroy(root, free_my_data); + ATF_CHECK_EQ(0, nodes); +} + ATF_TP_ADD_TCS(tp) { ATF_TP_ADD_TC(tp, tsearch_test); + ATF_TP_ADD_TC(tp, tdestroy_test); return (atf_no_error()); } diff --git a/lib/libgeom/geom_xml2tree.c b/lib/libgeom/geom_xml2tree.c index 2d2c43e29e77..a66938671845 100644 --- a/lib/libgeom/geom_xml2tree.c +++ b/lib/libgeom/geom_xml2tree.c @@ -29,21 +29,25 @@ * SUCH DAMAGE. */ -#include <stdio.h> -#include <inttypes.h> -#include <stdlib.h> -#include <string.h> -#include <unistd.h> -#include <errno.h> -#include <paths.h> -#include <fcntl.h> -#include <ctype.h> -#include <sys/stat.h> +#include <sys/types.h> #include <sys/mman.h> #include <sys/queue.h> #include <sys/sbuf.h> +#include <sys/stat.h> #include <sys/sysctl.h> + +#include <assert.h> +#include <ctype.h> #include <err.h> +#include <errno.h> +#include <fcntl.h> +#include <inttypes.h> +#include <paths.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + #include <bsdxml.h> #include <libgeom.h> @@ -67,6 +71,7 @@ StartElement(void *userData, const char *name, const char **attr) struct mystate *mt; void *id; void *ref; + uintmax_t umax; int i; mt = userData; @@ -75,17 +80,16 @@ StartElement(void *userData, const char *name, const char **attr) id = NULL; ref = NULL; for (i = 0; attr[i] != NULL; i += 2) { - if (!strcmp(attr[i], "id")) { - id = (void *)strtoul(attr[i + 1], NULL, 0); + if (strcmp(attr[i], "id") == 0) { + umax = strtoumax(attr[i + 1], NULL, 0); + id = (void *)(uintptr_t)umax; mt->nident++; - } else if (!strcmp(attr[i], "ref")) { - ref = (void *)strtoul(attr[i + 1], NULL, 0); - } else - printf("%*.*s[%s = %s]\n", - mt->level + 1, mt->level + 1, "", - attr[i], attr[i + 1]); - } - if (!strcmp(name, "class") && mt->class == NULL) { + } else if (strcmp(attr[i], "ref") == 0) { + umax = strtoumax(attr[i + 1], NULL, 0); + ref = (void *)(uintptr_t)umax; + } + } + if (strcmp(name, "class") == 0 && mt->class == NULL) { mt->class = calloc(1, sizeof *mt->class); if (mt->class == NULL) { mt->error = errno; @@ -100,7 +104,7 @@ StartElement(void *userData, const char *name, const char **attr) LIST_INIT(&mt->class->lg_config); return; } - if (!strcmp(name, "geom") && mt->geom == NULL) { + if (strcmp(name, "geom") == 0 && mt->geom == NULL) { mt->geom = calloc(1, sizeof *mt->geom); if (mt->geom == NULL) { mt->error = errno; @@ -116,11 +120,11 @@ StartElement(void *userData, const char *name, const char **attr) LIST_INIT(&mt->geom->lg_config); return; } - if (!strcmp(name, "class") && mt->geom != NULL) { + if (strcmp(name, "class") == 0 && mt->geom != NULL) { mt->geom->lg_class = ref; return; } - if (!strcmp(name, "consumer") && mt->consumer == NULL) { + if (strcmp(name, "consumer") == 0 && mt->consumer == NULL) { mt->consumer = calloc(1, sizeof *mt->consumer); if (mt->consumer == NULL) { mt->error = errno; @@ -135,15 +139,15 @@ StartElement(void *userData, const char *name, const char **attr) LIST_INIT(&mt->consumer->lg_config); return; } - if (!strcmp(name, "geom") && mt->consumer != NULL) { + if (strcmp(name, "geom") == 0 && mt->consumer != NULL) { mt->consumer->lg_geom = ref; return; } - if (!strcmp(name, "provider") && mt->consumer != NULL) { + if (strcmp(name, "provider") == 0 && mt->consumer != NULL) { mt->consumer->lg_provider = ref; return; } - if (!strcmp(name, "provider") && mt->provider == NULL) { + if (strcmp(name, "provider") == 0 && mt->provider == NULL) { mt->provider = calloc(1, sizeof *mt->provider); if (mt->provider == NULL) { mt->error = errno; @@ -159,11 +163,11 @@ StartElement(void *userData, const char *name, const char **attr) LIST_INIT(&mt->provider->lg_config); return; } - if (!strcmp(name, "geom") && mt->provider != NULL) { + if (strcmp(name, "geom") == 0 && mt->provider != NULL) { mt->provider->lg_geom = ref; return; } - if (!strcmp(name, "config")) { + if (strcmp(name, "config") == 0) { if (mt->provider != NULL) { mt->config = &mt->provider->lg_config; return; @@ -210,7 +214,7 @@ EndElement(void *userData, const char *name) p = NULL; } - if (!strcmp(name, "name")) { + if (strcmp(name, "name") == 0) { if (mt->provider != NULL) { mt->provider->lg_name = p; return; @@ -222,47 +226,47 @@ EndElement(void *userData, const char *name) return; } } - if (!strcmp(name, "rank") && mt->geom != NULL) { + if (strcmp(name, "rank") == 0 && mt->geom != NULL) { mt->geom->lg_rank = strtoul(p, NULL, 0); free(p); return; } - if (!strcmp(name, "mode") && mt->provider != NULL) { + if (strcmp(name, "mode") == 0 && mt->provider != NULL) { mt->provider->lg_mode = p; return; } - if (!strcmp(name, "mode") && mt->consumer != NULL) { + if (strcmp(name, "mode") == 0 && mt->consumer != NULL) { mt->consumer->lg_mode = p; return; } - if (!strcmp(name, "mediasize") && mt->provider != NULL) { + if (strcmp(name, "mediasize") == 0 && mt->provider != NULL) { mt->provider->lg_mediasize = strtoumax(p, NULL, 0); free(p); return; } - if (!strcmp(name, "sectorsize") && mt->provider != NULL) { + if (strcmp(name, "sectorsize") == 0 && mt->provider != NULL) { mt->provider->lg_sectorsize = strtoul(p, NULL, 0); free(p); return; } - if (!strcmp(name, "stripesize") && mt->provider != NULL) { + if (strcmp(name, "stripesize") == 0 && mt->provider != NULL) { mt->provider->lg_stripesize = strtoumax(p, NULL, 0); free(p); return; } - if (!strcmp(name, "stripeoffset") && mt->provider != NULL) { + if (strcmp(name, "stripeoffset") == 0 && mt->provider != NULL) { mt->provider->lg_stripeoffset = strtoumax(p, NULL, 0); free(p); return; } - if (!strcmp(name, "config")) { + if (strcmp(name, "config") == 0) { mt->config = NULL; free(p); return; } - if (mt->config != NULL || (!strcmp(name, "wither") && + if (mt->config != NULL || (strcmp(name, "wither") == 0 && (mt->provider != NULL || mt->geom != NULL))) { if (mt->config != NULL) c = mt->config; @@ -301,28 +305,28 @@ EndElement(void *userData, const char *name) free(p); } - if (!strcmp(name, "consumer") && mt->consumer != NULL) { + if (strcmp(name, "consumer") == 0 && mt->consumer != NULL) { mt->consumer = NULL; return; } - if (!strcmp(name, "provider") && mt->provider != NULL) { + if (strcmp(name, "provider") == 0 && mt->provider != NULL) { mt->provider = NULL; return; } - if (!strcmp(name, "geom") && mt->consumer != NULL) { + if (strcmp(name, "geom") == 0 && mt->consumer != NULL) { return; } - if (!strcmp(name, "geom") && mt->provider != NULL) { + if (strcmp(name, "geom") == 0 && mt->provider != NULL) { return; } - if (!strcmp(name, "geom") && mt->geom != NULL) { + if (strcmp(name, "geom") == 0 && mt->geom != NULL) { mt->geom = NULL; return; } - if (!strcmp(name, "class") && mt->geom != NULL) { + if (strcmp(name, "class") == 0 && mt->geom != NULL) { return; } - if (!strcmp(name, "class") && mt->class != NULL) { + if (strcmp(name, "class") == 0 && mt->class != NULL) { mt->class = NULL; return; } @@ -347,7 +351,7 @@ CharData(void *userData , const XML_Char *s , int len) } struct gident * -geom_lookupid(struct gmesh *gmp, const void *id) +geom_lookupid(const struct gmesh *gmp, const void *id) { struct gident *gip; @@ -358,14 +362,47 @@ geom_lookupid(struct gmesh *gmp, const void *id) } static void * -geom_lookupidptr(struct gmesh *gmp, const void *id) +geom_lookup_class(const struct gmesh *gmp, const void *id) { struct gident *gip; - gip = geom_lookupid(gmp, id); - if (gip) - return (gip->lg_ptr); - return (NULL); + if ((gip = geom_lookupid(gmp, id)) == NULL) + return (NULL); + assert(gip->lg_what == ISCLASS); + return (gip->lg_ptr); +} + +static void * +geom_lookup_geom(const struct gmesh *gmp, const void *id) +{ + struct gident *gip; + + if ((gip = geom_lookupid(gmp, id)) == NULL) + return (NULL); + assert(gip->lg_what == ISGEOM); + return (gip->lg_ptr); +} + +static void * +geom_lookup_provider(const struct gmesh *gmp, const void *id) +{ + struct gident *gip; + + if ((gip = geom_lookupid(gmp, id)) == NULL) + return (NULL); + assert(gip->lg_what == ISPROVIDER); + return (gip->lg_ptr); +} + +static void * __unused +geom_lookup_consumer(const struct gmesh *gmp, const void *id) +{ + struct gident *gip; + + if ((gip = geom_lookupid(gmp, id)) == NULL) + return (NULL); + assert(gip->lg_what == ISCONSUMER); + return (gip->lg_ptr); } int @@ -413,6 +450,7 @@ geom_xml2tree(struct gmesh *gmp, char *p) return (ENOMEM); i = 0; /* Collect all identifiers */ + /* XXX we should check for duplicate identifiers */ LIST_FOREACH(cl, &gmp->lg_class, lg_class) { gmp->lg_ident[i].lg_id = cl->lg_id; gmp->lg_ident[i].lg_ptr = cl; @@ -440,14 +478,15 @@ geom_xml2tree(struct gmesh *gmp, char *p) /* Substitute all identifiers */ LIST_FOREACH(cl, &gmp->lg_class, lg_class) { LIST_FOREACH(ge, &cl->lg_geom, lg_geom) { - ge->lg_class = geom_lookupidptr(gmp, ge->lg_class); - LIST_FOREACH(pr, &ge->lg_provider, lg_provider) - pr->lg_geom = geom_lookupidptr(gmp, pr->lg_geom); + ge->lg_class = geom_lookup_class(gmp, ge->lg_class); + LIST_FOREACH(pr, &ge->lg_provider, lg_provider) { + pr->lg_geom = geom_lookup_geom(gmp, pr->lg_geom); + } LIST_FOREACH(co, &ge->lg_consumer, lg_consumer) { - co->lg_geom = geom_lookupidptr(gmp, co->lg_geom); + co->lg_geom = geom_lookup_geom(gmp, co->lg_geom); if (co->lg_provider != NULL) { - co->lg_provider = geom_lookupidptr(gmp, - co->lg_provider); + co->lg_provider = geom_lookup_provider(gmp, + co->lg_provider); if (co->lg_provider != NULL) { LIST_INSERT_HEAD( &co->lg_provider->lg_consumers, @@ -522,22 +561,22 @@ geom_deletetree(struct gmesh *gmp) break; LIST_REMOVE(cl, lg_class); delete_config(&cl->lg_config); - if (cl->lg_name) free(cl->lg_name); + free(cl->lg_name); for (;;) { ge = LIST_FIRST(&cl->lg_geom); if (ge == NULL) break; LIST_REMOVE(ge, lg_geom); delete_config(&ge->lg_config); - if (ge->lg_name) free(ge->lg_name); + free(ge->lg_name); for (;;) { pr = LIST_FIRST(&ge->lg_provider); if (pr == NULL) break; LIST_REMOVE(pr, lg_provider); delete_config(&pr->lg_config); - if (pr->lg_name) free(pr->lg_name); - if (pr->lg_mode) free(pr->lg_mode); + free(pr->lg_name); + free(pr->lg_mode); free(pr); } for (;;) { @@ -546,7 +585,7 @@ geom_deletetree(struct gmesh *gmp) break; LIST_REMOVE(co, lg_consumer); delete_config(&co->lg_config); - if (co->lg_mode) free(co->lg_mode); + free(co->lg_mode); free(co); } free(ge); diff --git a/lib/libgeom/libgeom.h b/lib/libgeom/libgeom.h index 950508fd3637..2116645bd496 100644 --- a/lib/libgeom/libgeom.h +++ b/lib/libgeom/libgeom.h @@ -133,7 +133,7 @@ struct gprovider { struct gconf lg_config; }; -struct gident * geom_lookupid(struct gmesh *, const void *); +struct gident *geom_lookupid(const struct gmesh *, const void *); int geom_xml2tree(struct gmesh *, char *); int geom_gettree(struct gmesh *); int geom_gettree_geom(struct gmesh *, const char *, const char *, int); diff --git a/lib/libkldelf/Makefile b/lib/libkldelf/Makefile index 0d1716f17fca..9b0a08352633 100644 --- a/lib/libkldelf/Makefile +++ b/lib/libkldelf/Makefile @@ -11,7 +11,6 @@ SRCS= ef.c \ ef_arm.c \ ef_amd64.c \ ef_i386.c \ - ef_mips.c \ ef_powerpc.c \ ef_riscv.c WARNS?= 2 diff --git a/lib/libkldelf/ef_mips.c b/lib/libkldelf/ef_mips.c deleted file mode 100644 index 99790e11a9c3..000000000000 --- a/lib/libkldelf/ef_mips.c +++ /dev/null @@ -1,116 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 John Baldwin <jhb@FreeBSD.org> - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory (Department of Computer Science and - * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the - * DARPA SSITH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include <sys/endian.h> - -#include <err.h> -#include <errno.h> -#include <gelf.h> - -#include "kldelf.h" - -/* - * Apply relocations to the values obtained from the file. `relbase' is the - * target relocation address of the section, and `dataoff/len' is the region - * that is to be relocated, and has been copied to *dest - */ -static int -ef_mips_reloc(struct elf_file *ef, const void *reldata, Elf_Type reltype, - GElf_Addr relbase, GElf_Addr dataoff, size_t len, void *dest) -{ - char *where; - GElf_Addr addr, addend; - GElf_Size rtype, symidx; - const GElf_Rel *rel; - const GElf_Rela *rela; - - switch (reltype) { - case ELF_T_REL: - rel = (const GElf_Rel *)reldata; - where = (char *)dest + (relbase + rel->r_offset - dataoff); - addend = 0; - rtype = GELF_R_TYPE(rel->r_info); - symidx = GELF_R_SYM(rel->r_info); - break; - case ELF_T_RELA: - rela = (const GElf_Rela *)reldata; - where = (char *)dest + (relbase + rela->r_offset - dataoff); - addend = rela->r_addend; - rtype = GELF_R_TYPE(rela->r_info); - symidx = GELF_R_SYM(rela->r_info); - break; - default: - return (EINVAL); - } - - if (where < (char *)dest || where >= (char *)dest + len) - return (0); - - if (reltype == ELF_T_REL) { - if (elf_class(ef) == ELFCLASS64) { - if (elf_encoding(ef) == ELFDATA2LSB) - addend = le64dec(where); - else - addend = be64dec(where); - } else { - if (elf_encoding(ef) == ELFDATA2LSB) - addend = le32dec(where); - else - addend = be32dec(where); - } - } - - switch (rtype) { - case R_MIPS_64: /* S + A */ - addr = EF_SYMADDR(ef, symidx) + addend; - if (elf_encoding(ef) == ELFDATA2LSB) - le64enc(where, addr); - else - be64enc(where, addr); - break; - case R_MIPS_32: /* S + A */ - addr = EF_SYMADDR(ef, symidx) + addend; - if (elf_encoding(ef) == ELFDATA2LSB) - le32enc(where, addr); - else - be32enc(where, addr); - break; - default: - warnx("unhandled relocation type %d", (int)rtype); - } - return (0); -} - -ELF_RELOC(ELFCLASS32, ELFDATA2LSB, EM_MIPS, ef_mips_reloc); -ELF_RELOC(ELFCLASS32, ELFDATA2MSB, EM_MIPS, ef_mips_reloc); -ELF_RELOC(ELFCLASS64, ELFDATA2LSB, EM_MIPS, ef_mips_reloc); -ELF_RELOC(ELFCLASS64, ELFDATA2MSB, EM_MIPS, ef_mips_reloc); diff --git a/lib/libpfctl/libpfctl.c b/lib/libpfctl/libpfctl.c index 7e5a07ccd55a..f8c92a5cd319 100644 --- a/lib/libpfctl/libpfctl.c +++ b/lib/libpfctl/libpfctl.c @@ -3757,7 +3757,8 @@ struct nl_astats { struct pfr_astats *a; size_t max; size_t count; - uint64_t total_count; + uint32_t total_count; + uint32_t zeroed; }; #define _OUT(_field) offsetof(struct pfr_astats, _field) @@ -3792,6 +3793,7 @@ snl_attr_get_pfr_astats(struct snl_state *ss, struct nlattr *nla, static struct snl_attr_parser ap_table_get_astats[] = { { .type = PF_TAS_ASTATS, .off = 0, .cb = snl_attr_get_pfr_astats }, { .type = PF_TAS_ASTATS_COUNT, .off = _OUT(total_count), .cb = snl_attr_get_uint32 }, + { .type = PF_TAS_ASTATS_ZEROED, .off = _OUT(zeroed), .cb = snl_attr_get_uint32 }, }; #undef _OUT SNL_DECLARE_PARSER(table_astats_parser, struct genlmsghdr, snl_f_p_empty, ap_table_get_astats); @@ -3843,3 +3845,68 @@ pfctl_get_astats(struct pfctl_handle *h, const struct pfr_table *tbl, return (0); } + +static int +_pfctl_clr_astats(struct pfctl_handle *h, const struct pfr_table *tbl, + struct pfr_addr *addrs, int size, int *nzero, int flags) +{ + struct snl_writer nw; + struct snl_errmsg_data e = {}; + struct nlmsghdr *hdr; + uint32_t seq_id; + struct nl_astats attrs; + int family_id; + + family_id = snl_get_genl_family(&h->ss, PFNL_FAMILY_NAME); + if (family_id == 0) + return (ENOTSUP); + + snl_init_writer(&h->ss, &nw); + hdr = snl_create_genl_msg_request(&nw, family_id, PFNL_CMD_TABLE_CLEAR_ASTATS); + + snl_add_msg_attr_table(&nw, PF_TA_TABLE, tbl); + snl_add_msg_attr_u32(&nw, PF_TA_FLAGS, flags); + for (int i = 0; i < size; i++) + snl_add_msg_attr_pfr_addr(&nw, PF_TA_ADDR, &addrs[i]); + + if ((hdr = snl_finalize_msg(&nw)) == NULL) + return (ENXIO); + seq_id = hdr->nlmsg_seq; + + if (! snl_send_message(&h->ss, hdr)) + return (ENXIO); + + while ((hdr = snl_read_reply_multi(&h->ss, seq_id, &e)) != NULL) { + if (! snl_parse_nlmsg(&h->ss, hdr, &table_astats_parser, &attrs)) + continue; + } + + if (nzero) + *nzero = attrs.zeroed; + + return (e.error); +} + +int +pfctl_clr_astats(struct pfctl_handle *h, const struct pfr_table *tbl, + struct pfr_addr *addrs, int size, int *nzero, int flags) +{ + int ret; + int off = 0; + int partial_zeroed; + int chunk_size; + + do { + chunk_size = MIN(size - off, 256); + ret = _pfctl_clr_astats(h, tbl, &addrs[off], chunk_size, + &partial_zeroed, flags); + if (ret != 0) + break; + if (nzero) + *nzero += partial_zeroed; + off += chunk_size; + } while (off < size); + + return (ret); +} + diff --git a/lib/libpfctl/libpfctl.h b/lib/libpfctl/libpfctl.h index 9576118fe146..b885497ab0e8 100644 --- a/lib/libpfctl/libpfctl.h +++ b/lib/libpfctl/libpfctl.h @@ -587,5 +587,7 @@ int pfctl_clear_addrs(struct pfctl_handle *h, const struct pfr_table *filter, int pfctl_get_astats(struct pfctl_handle *h, const struct pfr_table *tbl, struct pfr_astats *addr, int *size, int flags); +int pfctl_clr_astats(struct pfctl_handle *h, const struct pfr_table *tbl, + struct pfr_addr *addr, int size, int *nzero, int flags); #endif diff --git a/lib/libpmc/pmu-events/arch/x86/amdzen5/branch-prediction.json b/lib/libpmc/pmu-events/arch/x86/amdzen5/branch-prediction.json new file mode 100644 index 000000000000..2d8d18cb85c1 --- /dev/null +++ b/lib/libpmc/pmu-events/arch/x86/amdzen5/branch-prediction.json @@ -0,0 +1,93 @@ +[ + { + "EventName": "bp_l1_tlb_miss_l2_tlb_hit", + "EventCode": "0x84", + "BriefDescription": "Instruction fetches that miss in the L1 ITLB but hit in the L2 ITLB." + }, + { + "EventName": "bp_l1_tlb_miss_l2_tlb_miss.if4k", + "EventCode": "0x85", + "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks are requested) for 4k pages.", + "UMask": "0x01" + }, + { + "EventName": "bp_l1_tlb_miss_l2_tlb_miss.if2m", + "EventCode": "0x85", + "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks are requested) for 2M pages.", + "UMask": "0x02" + }, + { + "EventName": "bp_l1_tlb_miss_l2_tlb_miss.if1g", + "EventCode": "0x85", + "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks are requested) for 1G pages.", + "UMask": "0x04" + }, + { + "EventName": "bp_l1_tlb_miss_l2_tlb_miss.coalesced_4k", + "EventCode": "0x85", + "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks are requested) for coalesced pages. A coalesced page is a 16k page created from four adjacent 4k pages.", + "UMask": "0x08" + }, + { + "EventName": "bp_l1_tlb_miss_l2_tlb_miss.all", + "EventCode": "0x85", + "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks are requested) for all page sizes.", + "UMask": "0x0f" + }, + { + "EventName": "bp_l2_btb_correct", + "EventCode": "0x8b", + "BriefDescription": "L2 branch prediction overrides existing prediction (speculative)." + }, + { + "EventName": "bp_dyn_ind_pred", + "EventCode": "0x8e", + "BriefDescription": "Dynamic indirect predictions (branch used the indirect predictor to make a prediction)." + }, + { + "EventName": "bp_de_redirect", + "EventCode": "0x91", + "BriefDescription": "Number of times an early redirect is sent to branch predictor. This happens when either the decoder or dispatch logic is able to detect that the branch predictor needs to be redirected." + }, + { + "EventName": "bp_l1_tlb_fetch_hit.if4k", + "EventCode": "0x94", + "BriefDescription": "Instruction fetches that hit in the L1 ITLB for 4k or coalesced pages. A coalesced page is a 16k page created from four adjacent 4k pages.", + "UMask": "0x01" + }, + { + "EventName": "bp_l1_tlb_fetch_hit.if2m", + "EventCode": "0x94", + "BriefDescription": "Instruction fetches that hit in the L1 ITLB for 2M pages.", + "UMask": "0x02" + }, + { + "EventName": "bp_l1_tlb_fetch_hit.if1g", + "EventCode": "0x94", + "BriefDescription": "Instruction fetches that hit in the L1 ITLB for 1G pages.", + "UMask": "0x04" + }, + { + "EventName": "bp_l1_tlb_fetch_hit.all", + "EventCode": "0x94", + "BriefDescription": "Instruction fetches that hit in the L1 ITLB for all page sizes.", + "UMask": "0x07" + }, + { + "EventName": "bp_redirects.resync", + "EventCode": "0x9f", + "BriefDescription": "Redirects of the branch predictor caused by resyncs.", + "UMask": "0x01" + }, + { + "EventName": "bp_redirects.ex_redir", + "EventCode": "0x9f", + "BriefDescription": "Redirects of the branch predictor caused by mispredicts.", + "UMask": "0x02" + }, + { + "EventName": "bp_redirects.all", + "EventCode": "0x9f", + "BriefDescription": "Redirects of the branch predictor." + } +] diff --git a/lib/libpmc/pmu-events/arch/x86/amdzen5/data-fabric.json b/lib/libpmc/pmu-events/arch/x86/amdzen5/data-fabric.json new file mode 100644 index 000000000000..fa06569d881d --- /dev/null +++ b/lib/libpmc/pmu-events/arch/x86/amdzen5/data-fabric.json @@ -0,0 +1,1634 @@ +[ + { + "EventName": "local_or_remote_socket_read_data_beats_dram_0", + "PublicDescription": "Read data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 0.", + "EventCode": "0x1f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_read_data_beats_dram_1", + "PublicDescription": "Read data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 1.", + "EventCode": "0x5f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_read_data_beats_dram_2", + "PublicDescription": "Read data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 2.", + "EventCode": "0x9f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_read_data_beats_dram_3", + "PublicDescription": "Read data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 3.", + "EventCode": "0xdf", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_read_data_beats_dram_4", + "PublicDescription": "Read data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 4.", + "EventCode": "0x11f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_read_data_beats_dram_5", + "PublicDescription": "Read data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 5.", + "EventCode": "0x15f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_read_data_beats_dram_6", + "PublicDescription": "Read data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 6.", + "EventCode": "0x19f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_read_data_beats_dram_7", + "PublicDescription": "Read data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 7.", + "EventCode": "0x1df", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_read_data_beats_dram_8", + "PublicDescription": "Read data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 8.", + "EventCode": "0x21f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_read_data_beats_dram_9", + "PublicDescription": "Read data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 9.", + "EventCode": "0x25f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_read_data_beats_dram_10", + "PublicDescription": "Read data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 10.", + "EventCode": "0x29f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_read_data_beats_dram_11", + "PublicDescription": "Read data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 11.", + "EventCode": "0x2df", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_write_data_beats_dram_0", + "PublicDescription": "Write data beats (64 bytes) for transactions between local socket and DRAM Channel 0.", + "EventCode": "0x1f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_write_data_beats_dram_1", + "PublicDescription": "Write data beats (64 bytes) for transactions between local socket and DRAM Channel 1.", + "EventCode": "0x5f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_write_data_beats_dram_2", + "PublicDescription": "Write data beats (64 bytes) for transactions between local socket and DRAM Channel 2.", + "EventCode": "0x9f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_write_data_beats_dram_3", + "PublicDescription": "Write data beats (64 bytes) for transactions between local socket and DRAM Channel 3.", + "EventCode": "0xdf", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_write_data_beats_dram_4", + "PublicDescription": "Write data beats (64 bytes) for transactions between local socket and DRAM Channel 4.", + "EventCode": "0x11f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_write_data_beats_dram_5", + "PublicDescription": "Write data beats (64 bytes) for transactions between local socket and DRAM Channel 5.", + "EventCode": "0x15f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_write_data_beats_dram_6", + "PublicDescription": "Write data beats (64 bytes) for transactions between local socket and DRAM Channel 6.", + "EventCode": "0x19f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_write_data_beats_dram_7", + "PublicDescription": "Write data beats (64 bytes) for transactions between local socket and DRAM Channel 7.", + "EventCode": "0x1df", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_write_data_beats_dram_8", + "PublicDescription": "Write data beats (64 bytes) for transactions between local socket and DRAM Channel 8.", + "EventCode": "0x21f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_write_data_beats_dram_9", + "PublicDescription": "Write data beats (64 bytes) for transactions between local socket and DRAM Channel 9.", + "EventCode": "0x25f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_write_data_beats_dram_10", + "PublicDescription": "Write data beats (64 bytes) for transactions between local socket and DRAM Channel 10.", + "EventCode": "0x29f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_write_data_beats_dram_11", + "PublicDescription": "Write data beats (64 bytes) for transactions between local socket and DRAM Channel 11.", + "EventCode": "0x2df", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_write_data_beats_dram_0", + "PublicDescription": "Write data beats (64 bytes) for transactions between remote socket and DRAM Channel 0.", + "EventCode": "0x1f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_write_data_beats_dram_1", + "PublicDescription": "Write data beats (64 bytes) for transactions between remote socket and DRAM Channel 1.", + "EventCode": "0x5f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_write_data_beats_dram_2", + "PublicDescription": "Write data beats (64 bytes) for transactions between remote socket and DRAM Channel 2.", + "EventCode": "0x9f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_write_data_beats_dram_3", + "PublicDescription": "Write data beats (64 bytes) for transactions between remote socket and DRAM Channel 3.", + "EventCode": "0xdf", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_write_data_beats_dram_4", + "PublicDescription": "Write data beats (64 bytes) for transactions between remote socket and DRAM Channel 4.", + "EventCode": "0x11f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_write_data_beats_dram_5", + "PublicDescription": "Write data beats (64 bytes) for transactions between remote socket and DRAM Channel 5.", + "EventCode": "0x15f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_write_data_beats_dram_6", + "PublicDescription": "Write data beats (64 bytes) for transactions between remote socket and DRAM Channel 6.", + "EventCode": "0x19f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_write_data_beats_dram_7", + "PublicDescription": "Write data beats (64 bytes) for transactions between remote socket and DRAM Channel 7.", + "EventCode": "0x1df", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_write_data_beats_dram_8", + "PublicDescription": "Write data beats (64 bytes) for transactions between remote socket and DRAM Channel 8.", + "EventCode": "0x21f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_write_data_beats_dram_9", + "PublicDescription": "Write data beats (64 bytes) for transactions between remote socket and DRAM Channel 9.", + "EventCode": "0x25f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_write_data_beats_dram_10", + "PublicDescription": "Write data beats (64 bytes) for transactions between remote socket and DRAM Channel 10.", + "EventCode": "0x29f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_write_data_beats_dram_11", + "PublicDescription": "Write data beats (64 bytes) for transactions between remote socket and DRAM Channel 11.", + "EventCode": "0x2df", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_write_data_beats_dram_0", + "PublicDescription": "Write data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 0.", + "EventCode": "0x1f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_write_data_beats_dram_1", + "PublicDescription": "Write data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 1.", + "EventCode": "0x5f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_write_data_beats_dram_2", + "PublicDescription": "Write data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 2.", + "EventCode": "0x9f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_write_data_beats_dram_3", + "PublicDescription": "Write data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 3.", + "EventCode": "0xdf", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_write_data_beats_dram_4", + "PublicDescription": "Write data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 4.", + "EventCode": "0x11f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_write_data_beats_dram_5", + "PublicDescription": "Write data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 5.", + "EventCode": "0x15f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_write_data_beats_dram_6", + "PublicDescription": "Write data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 6.", + "EventCode": "0x19f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_write_data_beats_dram_7", + "PublicDescription": "Write data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 7.", + "EventCode": "0x1df", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_write_data_beats_dram_8", + "PublicDescription": "Write data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 8.", + "EventCode": "0x21f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_write_data_beats_dram_9", + "PublicDescription": "Write data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 9.", + "EventCode": "0x25f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_write_data_beats_dram_10", + "PublicDescription": "Write data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 10.", + "EventCode": "0x29f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_write_data_beats_dram_11", + "PublicDescription": "Write data beats (64 bytes) for transactions between local or remote socket and DRAM Channel 11.", + "EventCode": "0x2df", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_read_data_beats_io_0", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local socket and IO Root Complex 0.", + "EventCode": "0x81f", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_read_data_beats_io_1", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local socket and IO Root Complex 1.", + "EventCode": "0x85f", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_read_data_beats_io_2", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local socket and IO Root Complex 2.", + "EventCode": "0x89f", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_read_data_beats_io_3", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local socket and IO Root Complex 3.", + "EventCode": "0x8df", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_read_data_beats_io_4", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local socket and IO Root Complex 4.", + "EventCode": "0x91f", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_read_data_beats_io_5", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local socket and IO Root Complex 5.", + "EventCode": "0x95f", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_read_data_beats_io_6", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local socket and IO Root Complex 6.", + "EventCode": "0x99f", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_read_data_beats_io_7", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local socket and IO Root Complex 7.", + "EventCode": "0x9df", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_write_data_beats_io_0", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local socket and IO Root Complex 0.", + "EventCode": "0x81f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_write_data_beats_io_1", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local socket and IO Root Complex 1.", + "EventCode": "0x85f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_write_data_beats_io_2", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local socket and IO Root Complex 2.", + "EventCode": "0x89f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_write_data_beats_io_3", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local socket and IO Root Complex 3.", + "EventCode": "0x8df", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_write_data_beats_io_4", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local socket and IO Root Complex 4.", + "EventCode": "0x91f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_write_data_beats_io_5", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local socket and IO Root Complex 5.", + "EventCode": "0x95f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_write_data_beats_io_6", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local socket and IO Root Complex 6.", + "EventCode": "0x99f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_upstream_write_data_beats_io_7", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local socket and IO Root Complex 7.", + "EventCode": "0x9df", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_read_data_beats_io_0", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between remote socket and IO Root Complex 0.", + "EventCode": "0x81f", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_read_data_beats_io_1", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between remote socket and IO Root Complex 1.", + "EventCode": "0x85f", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_read_data_beats_io_2", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between remote socket and IO Root Complex 2.", + "EventCode": "0x89f", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_read_data_beats_io_3", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between remote socket and IO Root Complex 3.", + "EventCode": "0x8df", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_read_data_beats_io_4", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between remote socket and IO Root Complex 4.", + "EventCode": "0x91f", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_read_data_beats_io_5", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between remote socket and IO Root Complex 5.", + "EventCode": "0x95f", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_read_data_beats_io_6", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between remote socket and IO Root Complex 6.", + "EventCode": "0x99f", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_read_data_beats_io_7", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between remote socket and IO Root Complex 7.", + "EventCode": "0x9df", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_write_data_beats_io_0", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between remote socket and IO Root Complex 0.", + "EventCode": "0x81f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_write_data_beats_io_1", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between remote socket and IO Root Complex 1.", + "EventCode": "0x85f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_write_data_beats_io_2", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between remote socket and IO Root Complex 2.", + "EventCode": "0x89f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_write_data_beats_io_3", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between remote socket and IO Root Complex 3.", + "EventCode": "0x8df", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_write_data_beats_io_4", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between remote socket and IO Root Complex 4.", + "EventCode": "0x91f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_write_data_beats_io_5", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between remote socket and IO Root Complex 5.", + "EventCode": "0x95f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_write_data_beats_io_6", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between remote socket and IO Root Complex 6.", + "EventCode": "0x99f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_upstream_write_data_beats_io_7", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between remote socket and IO Root Complex 7.", + "EventCode": "0x9df", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_read_data_beats_io_0", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 0.", + "EventCode": "0x81f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_read_data_beats_io_1", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 1.", + "EventCode": "0x85f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_read_data_beats_io_2", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 2.", + "EventCode": "0x89f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_read_data_beats_io_3", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 3.", + "EventCode": "0x8df", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_read_data_beats_io_4", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 4.", + "EventCode": "0x91f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_read_data_beats_io_5", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 5.", + "EventCode": "0x95f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_read_data_beats_io_6", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 6.", + "EventCode": "0x99f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_read_data_beats_io_7", + "PublicDescription": "Upstream DMA read data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 7.", + "EventCode": "0x9df", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_write_data_beats_io_0", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 0.", + "EventCode": "0x81f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_write_data_beats_io_1", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 1.", + "EventCode": "0x85f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_write_data_beats_io_2", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 2.", + "EventCode": "0x89f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_write_data_beats_io_3", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 3.", + "EventCode": "0x8df", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_write_data_beats_io_4", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 4.", + "EventCode": "0x91f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_write_data_beats_io_5", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 5.", + "EventCode": "0x95f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_write_data_beats_io_6", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 6.", + "EventCode": "0x99f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_upstream_write_data_beats_io_7", + "PublicDescription": "Upstream DMA write data beats (64 bytes) for transactions between local or remote socket and IO Root Complex 7.", + "EventCode": "0x9df", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_0", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 0.", + "EventCode": "0x41e", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_1", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 1.", + "EventCode": "0x45e", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_2", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 2.", + "EventCode": "0x49e", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_3", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 3.", + "EventCode": "0x4de", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_4", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 4.", + "EventCode": "0x51e", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_5", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 5.", + "EventCode": "0x55e", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_6", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 6.", + "EventCode": "0x59e", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_7", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 7.", + "EventCode": "0x5de", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_8", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 8.", + "EventCode": "0x41f", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_9", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 9.", + "EventCode": "0x45f", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_10", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 10.", + "EventCode": "0x49f", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_11", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 11.", + "EventCode": "0x4df", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_12", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 12.", + "EventCode": "0x51f", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_13", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 13.", + "EventCode": "0x55f", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_14", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 14.", + "EventCode": "0x59f", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_cfi_15", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface 15.", + "EventCode": "0x5df", + "UMask": "0x7fe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_0", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 0.", + "EventCode": "0x41e", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_1", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 1.", + "EventCode": "0x45e", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_2", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 2.", + "EventCode": "0x49e", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_3", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 3.", + "EventCode": "0x4de", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_4", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 4.", + "EventCode": "0x51e", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_5", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 5.", + "EventCode": "0x55e", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_6", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 6.", + "EventCode": "0x59e", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_7", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 7.", + "EventCode": "0x5de", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_8", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 8.", + "EventCode": "0x41f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_9", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 9.", + "EventCode": "0x45f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_10", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 10.", + "EventCode": "0x49f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_11", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 11.", + "EventCode": "0x4df", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_12", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 12.", + "EventCode": "0x51f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_13", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 13.", + "EventCode": "0x55f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_14", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 14.", + "EventCode": "0x59f", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_cfi_15", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and Core-to-Fabric Interface 15.", + "EventCode": "0x5df", + "UMask": "0x7ff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_0", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 0.", + "EventCode": "0x41e", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_1", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 1.", + "EventCode": "0x45e", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_2", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 2.", + "EventCode": "0x49e", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_3", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 3.", + "EventCode": "0x4de", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_4", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 4.", + "EventCode": "0x51e", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_5", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 5.", + "EventCode": "0x55e", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_6", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 6.", + "EventCode": "0x59e", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_7", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 7.", + "EventCode": "0x5de", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_8", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 8.", + "EventCode": "0x41f", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_9", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 9.", + "EventCode": "0x45f", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_10", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 10.", + "EventCode": "0x49f", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_11", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 11.", + "EventCode": "0x4df", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_12", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 12.", + "EventCode": "0x51f", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_13", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 13.", + "EventCode": "0x55f", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_14", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 14.", + "EventCode": "0x59f", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_inbound_data_beats_cfi_15", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between remote socket and Core-to-Fabric Interface 15.", + "EventCode": "0x5df", + "UMask": "0xbfe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_0", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 0.", + "EventCode": "0x41e", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_1", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 1.", + "EventCode": "0x45e", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_2", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 2.", + "EventCode": "0x49e", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_3", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 3.", + "EventCode": "0x4de", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_4", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 4.", + "EventCode": "0x51e", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_5", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 5.", + "EventCode": "0x55e", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_6", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 6.", + "EventCode": "0x59e", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_7", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 7.", + "EventCode": "0x5de", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_8", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 8.", + "EventCode": "0x41f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_9", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 9.", + "EventCode": "0x45f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_10", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 10.", + "EventCode": "0x49f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_11", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 11.", + "EventCode": "0x4df", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_12", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 12.", + "EventCode": "0x51f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_13", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 13.", + "EventCode": "0x55f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_14", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 14.", + "EventCode": "0x59f", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "remote_socket_outbound_data_beats_cfi_15", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between remote socket and Core-to-Fabric Interface 15.", + "EventCode": "0x5df", + "UMask": "0xbff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_0", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 0.", + "EventCode": "0x41e", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_1", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 1.", + "EventCode": "0x45e", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_2", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 2.", + "EventCode": "0x49e", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_3", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 3.", + "EventCode": "0x4de", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_4", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 4.", + "EventCode": "0x51e", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_5", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 5.", + "EventCode": "0x55e", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_6", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 6.", + "EventCode": "0x59e", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_7", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 7.", + "EventCode": "0x5de", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_8", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 8.", + "EventCode": "0x41f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_9", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 9.", + "EventCode": "0x45f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_10", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 10.", + "EventCode": "0x49f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_11", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 11.", + "EventCode": "0x4df", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_12", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 12.", + "EventCode": "0x51f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_13", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 13.", + "EventCode": "0x55f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_14", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 14.", + "EventCode": "0x59f", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_inbound_data_beats_cfi_15", + "PublicDescription": "Inbound data beats (32 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 15.", + "EventCode": "0x5df", + "UMask": "0xffe", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_0", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 0.", + "EventCode": "0x41e", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_1", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 1.", + "EventCode": "0x45e", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_2", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 2.", + "EventCode": "0x49e", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_3", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 3.", + "EventCode": "0x4de", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_4", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 4.", + "EventCode": "0x51e", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_5", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 5.", + "EventCode": "0x55e", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_6", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 6.", + "EventCode": "0x59e", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_7", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 7.", + "EventCode": "0x5de", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_8", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 8.", + "EventCode": "0x41f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_9", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 9.", + "EventCode": "0x45f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_10", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 10.", + "EventCode": "0x49f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_11", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 11.", + "EventCode": "0x4df", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_12", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 12.", + "EventCode": "0x51f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_13", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 13.", + "EventCode": "0x55f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_14", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 14.", + "EventCode": "0x59f", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_or_remote_socket_outbound_data_beats_cfi_15", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local or remote socket and Core-to-Fabric Interface 15.", + "EventCode": "0x5df", + "UMask": "0xfff", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_link_0", + "PublicDescription": "Inbound data beats (64 bytes) for transactions between local socket and remote socket over Cross-socket Link 0.", + "EventCode": "0xd5f", + "UMask": "0xf3f", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_link_1", + "PublicDescription": "Inbound data beats (64 bytes) for transactions between local socket and remote socket over Cross-socket Link 1.", + "EventCode": "0xd9f", + "UMask": "0xf3f", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_link_2", + "PublicDescription": "Inbound data beats (64 bytes) for transactions between local socket and remote socket over Cross-socket Link 2.", + "EventCode": "0xddf", + "UMask": "0xf3f", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_link_3", + "PublicDescription": "Inbound data beats (64 bytes) for transactions between local socket and remote socket over Cross-socket Link 3.", + "EventCode": "0xe1f", + "UMask": "0xf3f", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_link_4", + "PublicDescription": "Inbound data beats (64 bytes) for transactions between local socket and remote socket over Cross-socket Link 4.", + "EventCode": "0xe5f", + "UMask": "0xf3f", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_inbound_data_beats_link_5", + "PublicDescription": "Inbound data beats (64 bytes) for transactions between local socket and remote socket over Cross-socket Link 5.", + "EventCode": "0xe9f", + "UMask": "0xf3f", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_link_0", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and remote socket over Cross-socket Link 0.", + "EventCode": "0xd5f", + "UMask": "0xf3e", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_link_1", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and remote socket over Cross-socket Link 1.", + "EventCode": "0xd9f", + "UMask": "0xf3e", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_link_2", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and remote socket over Cross-socket Link 2.", + "EventCode": "0xddf", + "UMask": "0xf3e", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_link_3", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and remote socket over Cross-socket Link 3.", + "EventCode": "0xe1f", + "UMask": "0xf3e", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_link_4", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and remote socket over Cross-socket Link 4.", + "EventCode": "0xe5f", + "UMask": "0xf3e", + "PerPkg": "1", + "Unit": "DFPMC" + }, + { + "EventName": "local_socket_outbound_data_beats_link_5", + "PublicDescription": "Outbound data beats (64 bytes) for transactions between local socket and remote socket over Cross-socket Link 5.", + "EventCode": "0xe9f", + "UMask": "0xf3e", + "PerPkg": "1", + "Unit": "DFPMC" + } +] diff --git a/lib/libpmc/pmu-events/arch/x86/amdzen5/decode.json b/lib/libpmc/pmu-events/arch/x86/amdzen5/decode.json new file mode 100644 index 000000000000..d0eff7f2a3ea --- /dev/null +++ b/lib/libpmc/pmu-events/arch/x86/amdzen5/decode.json @@ -0,0 +1,115 @@ +[ + { + "EventName": "de_op_queue_empty", + "EventCode": "0xa9", + "BriefDescription": "Cycles where the op queue is empty. Such cycles indicate that the front-end is not delivering instructions fast enough." + }, + { + "EventName": "de_src_op_disp.x86_decoder", + "EventCode": "0xaa", + "BriefDescription": "Ops dispatched from x86 decoder.", + "UMask": "0x01" + }, + { + "EventName": "de_src_op_disp.op_cache", + "EventCode": "0xaa", + "BriefDescription": "Ops dispatched from op cache.", + "UMask": "0x02" + }, + { + "EventName": "de_src_op_disp.all", + "EventCode": "0xaa", + "BriefDescription": "Ops dispatched from any source.", + "UMask": "0x07" + }, + { + "EventName": "de_dis_ops_from_decoder.any_fp_dispatch", + "EventCode": "0xab", + "BriefDescription": "Number of ops dispatched to the floating-point unit.", + "UMask": "0x04" + }, + { + "EventName": "de_dis_ops_from_decoder.any_integer_dispatch", + "EventCode": "0xab", + "BriefDescription": "Number of ops dispatched to the integer execution unit.", + "UMask": "0x08" + }, + { + "EventName": "de_dispatch_stall_cycle_dynamic_tokens_part1.int_phy_reg_file_rsrc_stall", + "EventCode": "0xae", + "BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to an integer physical register file resource stall.", + "UMask": "0x01" + }, + { + "EventName": "de_dispatch_stall_cycle_dynamic_tokens_part1.load_queue_rsrc_stall", + "EventCode": "0xae", + "BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a lack of load queue tokens.", + "UMask": "0x02" + }, + { + "EventName": "de_dispatch_stall_cycle_dynamic_tokens_part1.store_queue_rsrc_stall", + "EventCode": "0xae", + "BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a lack of store queue tokens.", + "UMask": "0x04" + }, + { + "EventName": "de_dispatch_stall_cycle_dynamic_tokens_part1.taken_brnch_buffer_rsrc", + "EventCode": "0xae", + "BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a taken branch buffer resource stall.", + "UMask": "0x10" + }, + { + "EventName": "de_dispatch_stall_cycle_dynamic_tokens_part1.fp_sch_rsrc_stall", + "EventCode": "0xae", + "BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a floating-point non-schedulable queue token stall.", + "UMask": "0x40" + }, + { + "EventName": "de_dispatch_stall_cycle_dynamic_tokens_part2.al_tokens", + "EventCode": "0xaf", + "BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to unavailability of ALU tokens.", + "UMask": "0x01" + }, + { + "EventName": "de_dispatch_stall_cycle_dynamic_tokens_part2.ag_tokens", + "EventCode": "0xaf", + "BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to unavailability of agen tokens.", + "UMask": "0x02" + }, + { + "EventName": "de_dispatch_stall_cycle_dynamic_tokens_part2.ex_flush_recovery", + "EventCode": "0xaf", + "BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a pending integer execution flush recovery.", + "UMask": "0x04" + }, + { + "EventName": "de_dispatch_stall_cycle_dynamic_tokens_part2.retq", + "EventCode": "0xaf", + "BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to unavailability of retire queue tokens.", + "UMask": "0x20" + }, + { + "EventName": "de_no_dispatch_per_slot.no_ops_from_frontend", + "EventCode": "0x1a0", + "BriefDescription": "In each cycle counts dispatch slots left empty because the front-end did not supply ops.", + "UMask": "0x01" + }, + { + "EventName": "de_no_dispatch_per_slot.backend_stalls", + "EventCode": "0x1a0", + "BriefDescription": "In each cycle counts ops unable to dispatch because of back-end stalls.", + "UMask": "0x1e" + }, + { + "EventName": "de_no_dispatch_per_slot.smt_contention", + "EventCode": "0x1a0", + "BriefDescription": "In each cycle counts ops unable to dispatch because the dispatch cycle was granted to the other SMT thread.", + "UMask": "0x60" + }, + { + "EventName": "de_additional_resource_stalls.dispatch_stalls", + "EventCode": "0x1a2", + "BriefDescription": "Counts additional cycles where dispatch is stalled due to a lack of dispatch resources.", + "UMask": "0x30" + } +] diff --git a/lib/libpmc/pmu-events/arch/x86/amdzen5/execution.json b/lib/libpmc/pmu-events/arch/x86/amdzen5/execution.json new file mode 100644 index 000000000000..5a46d3db74e7 --- /dev/null +++ b/lib/libpmc/pmu-events/arch/x86/amdzen5/execution.json @@ -0,0 +1,174 @@ +[ + { + "EventName": "ex_ret_instr", + "EventCode": "0xc0", + "BriefDescription": "Retired instructions." + }, + { + "EventName": "ex_ret_ops", + "EventCode": "0xc1", + "BriefDescription": "Retired macro-ops." + }, + { + "EventName": "ex_ret_brn", + "EventCode": "0xc2", + "BriefDescription": "Retired branch instructions (all types of architectural control flow changes, including exceptions and interrupts)." + }, + { + "EventName": "ex_ret_brn_misp", + "EventCode": "0xc3", + "BriefDescription": "Retired branch instructions mispredicted." + }, + { + "EventName": "ex_ret_brn_tkn", + "EventCode": "0xc4", + "BriefDescription": "Retired taken branch instructions (all types of architectural control flow changes, including exceptions and interrupts)." + }, + { + "EventName": "ex_ret_brn_tkn_misp", + "EventCode": "0xc5", + "BriefDescription": "Retired taken branch instructions mispredicted." + }, + { + "EventName": "ex_ret_brn_far", + "EventCode": "0xc6", + "BriefDescription": "Retired far control transfers (far call/jump/return, IRET, SYSCALL and SYSRET, plus exceptions and interrupts). Far control transfers are not subject to branch prediction." + }, + { + "EventName": "ex_ret_near_ret", + "EventCode": "0xc8", + "BriefDescription": "Retired near returns (RET or RET Iw)." + }, + { + "EventName": "ex_ret_near_ret_mispred", + "EventCode": "0xc9", + "BriefDescription": "Retired near returns mispredicted. Each misprediction incurs the same penalty as a mispredicted conditional branch instruction." + }, + { + "EventName": "ex_ret_brn_ind_misp", + "EventCode": "0xca", + "BriefDescription": "Retired indirect branch instructions mispredicted (only EX mispredicts). Each misprediction incurs the same penalty as a mispredicted conditional branch instruction." + }, + { + "EventName": "ex_ret_mmx_fp_instr.x87", + "EventCode": "0xcb", + "BriefDescription": "Retired x87 instructions.", + "UMask": "0x01" + }, + { + "EventName": "ex_ret_mmx_fp_instr.mmx", + "EventCode": "0xcb", + "BriefDescription": "Retired MMX instructions.", + "UMask": "0x02" + }, + { + "EventName": "ex_ret_mmx_fp_instr.sse", + "EventCode": "0xcb", + "BriefDescription": "Retired SSE instructions (includes SSE, SSE2, SSE3, SSSE3, SSE4A, SSE41, SSE42 and AVX).", + "UMask": "0x04" + }, + { + "EventName": "ex_ret_ind_brch_instr", + "EventCode": "0xcc", + "BriefDescription": "Retired indirect branch instructions." + }, + { + "EventName": "ex_ret_cond", + "EventCode": "0xd1", + "BriefDescription": "Retired conditional branch instructions." + }, + { + "EventName": "ex_div_busy", + "EventCode": "0xd3", + "BriefDescription": "Number of cycles the divider is busy." + }, + { + "EventName": "ex_div_count", + "EventCode": "0xd4", + "BriefDescription": "Divide ops executed." + }, + { + "EventName": "ex_no_retire.empty", + "EventCode": "0xd6", + "BriefDescription": "Cycles with no retire due to the lack of valid ops in the retire queue (may be caused by front-end bottlenecks or pipeline redirects).", + "UMask": "0x01" + }, + { + "EventName": "ex_no_retire.not_complete", + "EventCode": "0xd6", + "BriefDescription": "Cycles with no retire while the oldest op is waiting to be executed.", + "UMask": "0x02" + }, + { + "EventName": "ex_no_retire.other", + "EventCode": "0xd6", + "BriefDescription": "Cycles with no retire caused by other reasons (retire breaks, traps, faults, etc.).", + "UMask": "0x08" + }, + { + "EventName": "ex_no_retire.thread_not_selected", + "EventCode": "0xd6", + "BriefDescription": "Cycles with no retire because thread arbitration did not select the thread.", + "UMask": "0x10" + }, + { + "EventName": "ex_no_retire.load_not_complete", + "EventCode": "0xd6", + "BriefDescription": "Cycles with no retire while the oldest op is waiting for load data.", + "UMask": "0xa2" + }, + { + "EventName": "ex_no_retire.all", + "EventCode": "0xd6", + "BriefDescription": "Cycles with no retire for any reason.", + "UMask": "0x1b" + }, + { + "EventName": "ex_ret_ucode_instr", + "EventCode": "0x1c1", + "BriefDescription": "Retired microcoded instructions." + }, + { + "EventName": "ex_ret_ucode_ops", + "EventCode": "0x1c2", + "BriefDescription": "Retired microcode ops." + }, + { + "EventName": "ex_ret_msprd_brnch_instr_dir_msmtch", + "EventCode": "0x1c7", + "BriefDescription": "Retired branch instructions mispredicted due to direction mismatch." + }, + { + "EventName": "ex_ret_uncond_brnch_instr_mispred", + "EventCode": "0x1c8", + "BriefDescription": "Retired unconditional indirect branch instructions mispredicted." + }, + { + "EventName": "ex_ret_uncond_brnch_instr", + "EventCode": "0x1c9", + "BriefDescription": "Retired unconditional branch instructions." + }, + { + "EventName": "ex_tagged_ibs_ops.ibs_tagged_ops", + "EventCode": "0x1cf", + "BriefDescription": "Ops tagged by IBS.", + "UMask": "0x01" + }, + { + "EventName": "ex_tagged_ibs_ops.ibs_tagged_ops_ret", + "EventCode": "0x1cf", + "BriefDescription": "Ops tagged by IBS that retired.", + "UMask": "0x02" + }, + { + "EventName": "ex_tagged_ibs_ops.ibs_count_rollover", + "EventCode": "0x1cf", + "BriefDescription": "Ops not tagged by IBS due to a previous tagged op that has not yet signaled interrupt.", + "UMask": "0x04" + }, + { + "EventName": "ex_ret_fused_instr", + "EventCode": "0x1d0", + "BriefDescription": "Retired fused instructions." + } +] diff --git a/lib/libpmc/pmu-events/arch/x86/amdzen5/floating-point.json b/lib/libpmc/pmu-events/arch/x86/amdzen5/floating-point.json new file mode 100644 index 000000000000..9204bfb1d69e --- /dev/null +++ b/lib/libpmc/pmu-events/arch/x86/amdzen5/floating-point.json @@ -0,0 +1,812 @@ +[ + { + "EventName": "fp_ret_x87_fp_ops.add_sub_ops", + "EventCode": "0x02", + "BriefDescription": "Retired x87 floating-point add and subtract ops.", + "UMask": "0x01" + }, + { + "EventName": "fp_ret_x87_fp_ops.mul_ops", + "EventCode": "0x02", + "BriefDescription": "Retired x87 floating-point multiply ops.", + "UMask": "0x02" + }, + { + "EventName": "fp_ret_x87_fp_ops.div_sqrt_ops", + "EventCode": "0x02", + "BriefDescription": "Retired x87 floating-point divide and square root ops.", + "UMask": "0x04" + }, + { + "EventName": "fp_ret_x87_fp_ops.all", + "EventCode": "0x02", + "BriefDescription": "Retired x87 floating-point ops of all types.", + "UMask": "0x07" + }, + { + "EventName": "fp_ret_sse_avx_ops.add_sub_flops", + "EventCode": "0x03", + "BriefDescription": "Retired SSE and AVX floating-point add and subtract ops.", + "UMask": "0x01" + }, + { + "EventName": "fp_ret_sse_avx_ops.mult_flops", + "EventCode": "0x03", + "BriefDescription": "Retired SSE and AVX floating-point multiply ops.", + "UMask": "0x02" + }, + { + "EventName": "fp_ret_sse_avx_ops.div_flops", + "EventCode": "0x03", + "BriefDescription": "Retired SSE and AVX floating-point divide and square root ops.", + "UMask": "0x04" + }, + { + "EventName": "fp_ret_sse_avx_ops.mac_flops", + "EventCode": "0x03", + "BriefDescription": "Retired SSE and AVX floating-point multiply-accumulate ops (each operation is counted as 2 ops).", + "UMask": "0x08" + }, + { + "EventName": "fp_ret_sse_avx_ops.bfloat16_flops", + "EventCode": "0x03", + "BriefDescription": "Retired SSE and AVX floating-point bfloat16 ops.", + "UMask": "0x20" + }, + { + "EventName": "fp_ret_sse_avx_ops.scalar_single_flops", + "EventCode": "0x03", + "BriefDescription": "Retired SSE and AVX floating-point scalar single-precision ops.", + "UMask": "0x40" + }, + { + "EventName": "fp_ret_sse_avx_ops.packed_single_flops", + "EventCode": "0x03", + "BriefDescription": "Retired SSE and AVX floating-point packed single-precision ops.", + "UMask": "0x60" + }, + { + "EventName": "fp_ret_sse_avx_ops.scalar_double_flops", + "EventCode": "0x03", + "BriefDescription": "Retired SSE and AVX floating-point scalar double-precision ops.", + "UMask": "0x80" + }, + { + "EventName": "fp_ret_sse_avx_ops.packed_double_flops", + "EventCode": "0x03", + "BriefDescription": "Retired SSE and AVX floating-point packed double-precision ops.", + "UMask": "0xa0" + }, + { + "EventName": "fp_ret_sse_avx_ops.all", + "EventCode": "0x03", + "BriefDescription": "Retired SSE and AVX floating-point ops of all types.", + "UMask": "0x0f" + }, + { + "EventName": "fp_ops_retired_by_width.x87_uops_retired", + "EventCode": "0x08", + "BriefDescription": "Retired x87 floating-point ops.", + "UMask": "0x01" + }, + { + "EventName": "fp_ops_retired_by_width.mmx_uops_retired", + "EventCode": "0x08", + "BriefDescription": "Retired MMX floating-point ops.", + "UMask": "0x02" + }, + { + "EventName": "fp_ops_retired_by_width.scalar_uops_retired", + "EventCode": "0x08", + "BriefDescription": "Retired scalar floating-point ops.", + "UMask": "0x04" + }, + { + "EventName": "fp_ops_retired_by_width.pack_128_uops_retired", + "EventCode": "0x08", + "BriefDescription": "Retired packed 128-bit floating-point ops.", + "UMask": "0x08" + }, + { + "EventName": "fp_ops_retired_by_width.pack_256_uops_retired", + "EventCode": "0x08", + "BriefDescription": "Retired packed 256-bit floating-point ops.", + "UMask": "0x10" + }, + { + "EventName": "fp_ops_retired_by_width.pack_512_uops_retired", + "EventCode": "0x08", + "BriefDescription": "Retired packed 512-bit floating-point ops.", + "UMask": "0x20" + }, + { + "EventName": "fp_ops_retired_by_width.all", + "EventCode": "0x08", + "BriefDescription": "Retired floating-point ops of all widths.", + "UMask": "0x3f" + }, + { + "EventName": "fp_ops_retired_by_type.scalar_add", + "EventCode": "0x0a", + "BriefDescription": "Retired scalar floating-point add ops.", + "UMask": "0x01" + }, + { + "EventName": "fp_ops_retired_by_type.scalar_sub", + "EventCode": "0x0a", + "BriefDescription": "Retired scalar floating-point subtract ops.", + "UMask": "0x02" + }, + { + "EventName": "fp_ops_retired_by_type.scalar_mul", + "EventCode": "0x0a", + "BriefDescription": "Retired scalar floating-point multiply ops.", + "UMask": "0x03" + }, + { + "EventName": "fp_ops_retired_by_type.scalar_mac", + "EventCode": "0x0a", + "BriefDescription": "Retired scalar floating-point multiply-accumulate ops.", + "UMask": "0x04" + }, + { + "EventName": "fp_ops_retired_by_type.scalar_div", + "EventCode": "0x0a", + "BriefDescription": "Retired scalar floating-point divide ops.", + "UMask": "0x05" + }, + { + "EventName": "fp_ops_retired_by_type.scalar_sqrt", + "EventCode": "0x0a", + "BriefDescription": "Retired scalar floating-point square root ops.", + "UMask": "0x06" + }, + { + "EventName": "fp_ops_retired_by_type.scalar_cmp", + "EventCode": "0x0a", + "BriefDescription": "Retired scalar floating-point compare ops.", + "UMask": "0x07" + }, + { + "EventName": "fp_ops_retired_by_type.scalar_cvt", + "EventCode": "0x0a", + "BriefDescription": "Retired scalar floating-point convert ops.", + "UMask": "0x08" + }, + { + "EventName": "fp_ops_retired_by_type.scalar_blend", + "EventCode": "0x0a", + "BriefDescription": "Retired scalar floating-point blend ops.", + "UMask": "0x09" + }, + { + "EventName": "fp_ops_retired_by_type.scalar_other", + "EventCode": "0x0a", + "BriefDescription": "Retired scalar floating-point ops of other types.", + "UMask": "0x0e" + }, + { + "EventName": "fp_ops_retired_by_type.scalar_all", + "EventCode": "0x0a", + "BriefDescription": "Retired scalar floating-point ops of all types.", + "UMask": "0x0f" + }, + { + "EventName": "fp_ops_retired_by_type.vector_add", + "EventCode": "0x0a", + "BriefDescription": "Retired vector floating-point add ops.", + "UMask": "0x10" + }, + { + "EventName": "fp_ops_retired_by_type.vector_sub", + "EventCode": "0x0a", + "BriefDescription": "Retired vector floating-point subtract ops.", + "UMask": "0x20" + }, + { + "EventName": "fp_ops_retired_by_type.vector_mul", + "EventCode": "0x0a", + "BriefDescription": "Retired vector floating-point multiply ops.", + "UMask": "0x30" + }, + { + "EventName": "fp_ops_retired_by_type.vector_mac", + "EventCode": "0x0a", + "BriefDescription": "Retired vector floating-point multiply-accumulate ops.", + "UMask": "0x40" + }, + { + "EventName": "fp_ops_retired_by_type.vector_div", + "EventCode": "0x0a", + "BriefDescription": "Retired vector floating-point divide ops.", + "UMask": "0x50" + }, + { + "EventName": "fp_ops_retired_by_type.vector_sqrt", + "EventCode": "0x0a", + "BriefDescription": "Retired vector floating-point square root ops.", + "UMask": "0x60" + }, + { + "EventName": "fp_ops_retired_by_type.vector_cmp", + "EventCode": "0x0a", + "BriefDescription": "Retired vector floating-point compare ops.", + "UMask": "0x70" + }, + { + "EventName": "fp_ops_retired_by_type.vector_cvt", + "EventCode": "0x0a", + "BriefDescription": "Retired vector floating-point convert ops.", + "UMask": "0x80" + }, + { + "EventName": "fp_ops_retired_by_type.vector_blend", + "EventCode": "0x0a", + "BriefDescription": "Retired vector floating-point blend ops.", + "UMask": "0x90" + }, + { + "EventName": "fp_ops_retired_by_type.vector_shuffle", + "EventCode": "0x0a", + "BriefDescription": "Retired vector floating-point shuffle ops (may include instructions not necessarily thought of as including shuffles e.g. horizontal add, dot product, and certain MOV instructions).", + "UMask": "0xb0" + }, + { + "EventName": "fp_ops_retired_by_type.vector_logical", + "EventCode": "0x0a", + "BriefDescription": "Retired vector floating-point logical ops.", + "UMask": "0xd0" + }, + { + "EventName": "fp_ops_retired_by_type.vector_other", + "EventCode": "0x0a", + "BriefDescription": "Retired vector floating-point ops of other types.", + "UMask": "0xe0" + }, + { + "EventName": "fp_ops_retired_by_type.vector_all", + "EventCode": "0x0a", + "BriefDescription": "Retired vector floating-point ops of all types.", + "UMask": "0xf0" + }, + { + "EventName": "fp_ops_retired_by_type.all", + "EventCode": "0x0a", + "BriefDescription": "Retired floating-point ops of all types.", + "UMask": "0xff" + }, + { + "EventName": "sse_avx_ops_retired.mmx_add", + "EventCode": "0x0b", + "BriefDescription": "Retired MMX integer add.", + "UMask": "0x01" + }, + { + "EventName": "sse_avx_ops_retired.mmx_sub", + "EventCode": "0x0b", + "BriefDescription": "Retired MMX integer subtract ops.", + "UMask": "0x02" + }, + { + "EventName": "sse_avx_ops_retired.mmx_mul", + "EventCode": "0x0b", + "BriefDescription": "Retired MMX integer multiply ops.", + "UMask": "0x03" + }, + { + "EventName": "sse_avx_ops_retired.mmx_mac", + "EventCode": "0x0b", + "BriefDescription": "Retired MMX integer multiply-accumulate ops.", + "UMask": "0x04" + }, + { + "EventName": "sse_avx_ops_retired.mmx_cmp", + "EventCode": "0x0b", + "BriefDescription": "Retired MMX integer compare ops.", + "UMask": "0x07" + }, + { + "EventName": "sse_avx_ops_retired.mmx_shift", + "EventCode": "0x0b", + "BriefDescription": "Retired MMX integer shift ops.", + "UMask": "0x09" + }, + { + "EventName": "sse_avx_ops_retired.mmx_mov", + "EventCode": "0x0b", + "BriefDescription": "Retired MMX integer MOV ops.", + "UMask": "0x0a" + }, + { + "EventName": "sse_avx_ops_retired.mmx_shuffle", + "EventCode": "0x0b", + "BriefDescription": "Retired MMX integer shuffle ops (may include instructions not necessarily thought of as including shuffles e.g. horizontal add, dot product, and certain MOV instructions).", + "UMask": "0x0b" + }, + { + "EventName": "sse_avx_ops_retired.mmx_pack", + "EventCode": "0x0b", + "BriefDescription": "Retired MMX integer pack ops.", + "UMask": "0x0c" + }, + { + "EventName": "sse_avx_ops_retired.mmx_logical", + "EventCode": "0x0b", + "BriefDescription": "Retired MMX integer logical ops.", + "UMask": "0x0d" + }, + { + "EventName": "sse_avx_ops_retired.mmx_other", + "EventCode": "0x0b", + "BriefDescription": "Retired MMX integer multiply ops of other types.", + "UMask": "0x0e" + }, + { + "EventName": "sse_avx_ops_retired.mmx_all", + "EventCode": "0x0b", + "BriefDescription": "Retired MMX integer ops of all types.", + "UMask": "0x0f" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_add", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer add ops.", + "UMask": "0x10" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_sub", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer subtract ops.", + "UMask": "0x20" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_mul", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer multiply ops.", + "UMask": "0x30" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_mac", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer multiply-accumulate ops.", + "UMask": "0x40" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_aes", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer AES ops.", + "UMask": "0x50" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_sha", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer SHA ops.", + "UMask": "0x60" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_cmp", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer compare ops.", + "UMask": "0x70" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_clm", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer CLM ops.", + "UMask": "0x80" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_shift", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer shift ops.", + "UMask": "0x90" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_mov", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer MOV ops.", + "UMask": "0xa0" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_shuffle", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer shuffle ops (may include instructions not necessarily thought of as including shuffles e.g. horizontal add, dot product, and certain MOV instructions).", + "UMask": "0xb0" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_pack", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer pack ops.", + "UMask": "0xc0" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_logical", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer logical ops.", + "UMask": "0xd0" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_other", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer ops of other types.", + "UMask": "0xe0" + }, + { + "EventName": "sse_avx_ops_retired.sse_avx_all", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE and AVX integer ops of all types.", + "UMask": "0xf0" + }, + { + "EventName": "sse_avx_ops_retired.all", + "EventCode": "0x0b", + "BriefDescription": "Retired SSE, AVX and MMX integer ops of all types.", + "UMask": "0xff" + }, + { + "EventName": "fp_pack_ops_retired.fp128_add", + "EventCode": "0x0c", + "BriefDescription": "Retired 128-bit packed floating-point add ops.", + "UMask": "0x01" + }, + { + "EventName": "fp_pack_ops_retired.fp128_sub", + "EventCode": "0x0c", + "BriefDescription": "Retired 128-bit packed floating-point subtract ops.", + "UMask": "0x02" + }, + { + "EventName": "fp_pack_ops_retired.fp128_mul", + "EventCode": "0x0c", + "BriefDescription": "Retired 128-bit packed floating-point multiply ops.", + "UMask": "0x03" + }, + { + "EventName": "fp_pack_ops_retired.fp128_mac", + "EventCode": "0x0c", + "BriefDescription": "Retired 128-bit packed floating-point multiply-accumulate ops.", + "UMask": "0x04" + }, + { + "EventName": "fp_pack_ops_retired.fp128_div", + "EventCode": "0x0c", + "BriefDescription": "Retired 128-bit packed floating-point divide ops.", + "UMask": "0x05" + }, + { + "EventName": "fp_pack_ops_retired.fp128_sqrt", + "EventCode": "0x0c", + "BriefDescription": "Retired 128-bit packed floating-point square root ops.", + "UMask": "0x06" + }, + { + "EventName": "fp_pack_ops_retired.fp128_cmp", + "EventCode": "0x0c", + "BriefDescription": "Retired 128-bit packed floating-point compare ops.", + "UMask": "0x07" + }, + { + "EventName": "fp_pack_ops_retired.fp128_cvt", + "EventCode": "0x0c", + "BriefDescription": "Retired 128-bit packed floating-point convert ops.", + "UMask": "0x08" + }, + { + "EventName": "fp_pack_ops_retired.fp128_blend", + "EventCode": "0x0c", + "BriefDescription": "Retired 128-bit packed floating-point blend ops.", + "UMask": "0x09" + }, + { + "EventName": "fp_pack_ops_retired.fp128_shuffle", + "EventCode": "0x0c", + "BriefDescription": "Retired 128-bit packed floating-point shuffle ops (may include instructions not necessarily thought of as including shuffles e.g. horizontal add, dot product, and certain MOV instructions).", + "UMask": "0x0b" + }, + { + "EventName": "fp_pack_ops_retired.fp128_logical", + "EventCode": "0x0c", + "BriefDescription": "Retired 128-bit packed floating-point logical ops.", + "UMask": "0x0d" + }, + { + "EventName": "fp_pack_ops_retired.fp128_other", + "EventCode": "0x0c", + "BriefDescription": "Retired 128-bit packed floating-point ops of other types.", + "UMask": "0x0e" + }, + { + "EventName": "fp_pack_ops_retired.fp128_all", + "EventCode": "0x0c", + "BriefDescription": "Retired 128-bit packed floating-point ops of all types.", + "UMask": "0x0f" + }, + { + "EventName": "fp_pack_ops_retired.fp256_add", + "EventCode": "0x0c", + "BriefDescription": "Retired 256-bit packed floating-point add ops.", + "UMask": "0x10" + }, + { + "EventName": "fp_pack_ops_retired.fp256_sub", + "EventCode": "0x0c", + "BriefDescription": "Retired 256-bit packed floating-point subtract ops.", + "UMask": "0x20" + }, + { + "EventName": "fp_pack_ops_retired.fp256_mul", + "EventCode": "0x0c", + "BriefDescription": "Retired 256-bit packed floating-point multiply ops.", + "UMask": "0x30" + }, + { + "EventName": "fp_pack_ops_retired.fp256_mac", + "EventCode": "0x0c", + "BriefDescription": "Retired 256-bit packed floating-point multiply-accumulate ops.", + "UMask": "0x40" + }, + { + "EventName": "fp_pack_ops_retired.fp256_div", + "EventCode": "0x0c", + "BriefDescription": "Retired 256-bit packed floating-point divide ops.", + "UMask": "0x50" + }, + { + "EventName": "fp_pack_ops_retired.fp256_sqrt", + "EventCode": "0x0c", + "BriefDescription": "Retired 256-bit packed floating-point square root ops.", + "UMask": "0x60" + }, + { + "EventName": "fp_pack_ops_retired.fp256_cmp", + "EventCode": "0x0c", + "BriefDescription": "Retired 256-bit packed floating-point compare ops.", + "UMask": "0x70" + }, + { + "EventName": "fp_pack_ops_retired.fp256_cvt", + "EventCode": "0x0c", + "BriefDescription": "Retired 256-bit packed floating-point convert ops.", + "UMask": "0x80" + }, + { + "EventName": "fp_pack_ops_retired.fp256_blend", + "EventCode": "0x0c", + "BriefDescription": "Retired 256-bit packed floating-point blend ops.", + "UMask": "0x90" + }, + { + "EventName": "fp_pack_ops_retired.fp256_shuffle", + "EventCode": "0x0c", + "BriefDescription": "Retired 256-bit packed floating-point shuffle ops (may include instructions not necessarily thought of as including shuffles e.g. horizontal add, dot product, and certain MOV instructions).", + "UMask": "0xb0" + }, + { + "EventName": "fp_pack_ops_retired.fp256_logical", + "EventCode": "0x0c", + "BriefDescription": "Retired 256-bit packed floating-point logical ops.", + "UMask": "0xd0" + }, + { + "EventName": "fp_pack_ops_retired.fp256_other", + "EventCode": "0x0c", + "BriefDescription": "Retired 256-bit packed floating-point ops of other types.", + "UMask": "0xe0" + }, + { + "EventName": "fp_pack_ops_retired.fp256_all", + "EventCode": "0x0c", + "BriefDescription": "Retired 256-bit packed floating-point ops of all types.", + "UMask": "0xf0" + }, + { + "EventName": "fp_pack_ops_retired.all", + "EventCode": "0x0c", + "BriefDescription": "Retired packed floating-point ops of all types.", + "UMask": "0xff" + }, + { + "EventName": "packed_int_op_type.int128_add", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer add ops.", + "UMask": "0x01" + }, + { + "EventName": "packed_int_op_type.int128_sub", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer subtract ops.", + "UMask": "0x02" + }, + { + "EventName": "packed_int_op_type.int128_mul", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer multiply ops.", + "UMask": "0x03" + }, + { + "EventName": "packed_int_op_type.int128_mac", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer multiply-accumulate ops.", + "UMask": "0x04" + }, + { + "EventName": "packed_int_op_type.int128_aes", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer AES ops.", + "UMask": "0x05" + }, + { + "EventName": "packed_int_op_type.int128_sha", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer SHA ops.", + "UMask": "0x06" + }, + { + "EventName": "packed_int_op_type.int128_cmp", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer compare ops.", + "UMask": "0x07" + }, + { + "EventName": "packed_int_op_type.int128_clm", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer CLM ops.", + "UMask": "0x08" + }, + { + "EventName": "packed_int_op_type.int128_shift", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer shift ops.", + "UMask": "0x09" + }, + { + "EventName": "packed_int_op_type.int128_mov", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer MOV ops.", + "UMask": "0x0a" + }, + { + "EventName": "packed_int_op_type.int128_shuffle", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer shuffle ops (may include instructions not necessarily thought of as including shuffles e.g. horizontal add, dot product, and certain MOV instructions).", + "UMask": "0x0b" + }, + { + "EventName": "packed_int_op_type.int128_pack", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer pack ops.", + "UMask": "0x0c" + }, + { + "EventName": "packed_int_op_type.int128_logical", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer logical ops.", + "UMask": "0x0d" + }, + { + "EventName": "packed_int_op_type.int128_other", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer ops of other types.", + "UMask": "0x0e" + }, + { + "EventName": "packed_int_op_type.int128_all", + "EventCode": "0x0d", + "BriefDescription": "Retired 128-bit packed integer ops of all types.", + "UMask": "0x0f" + }, + { + "EventName": "packed_int_op_type.int256_add", + "EventCode": "0x0d", + "BriefDescription": "Retired 256-bit packed integer add ops.", + "UMask": "0x10" + }, + { + "EventName": "packed_int_op_type.int256_sub", + "EventCode": "0x0d", + "BriefDescription": "Retired 256-bit packed integer subtract ops.", + "UMask": "0x20" + }, + { + "EventName": "packed_int_op_type.int256_mul", + "EventCode": "0x0d", + "BriefDescription": "Retired 256-bit packed integer multiply ops.", + "UMask": "0x30" + }, + { + "EventName": "packed_int_op_type.int256_mac", + "EventCode": "0x0d", + "BriefDescription": "Retired 256-bit packed integer multiply-accumulate ops.", + "UMask": "0x40" + }, + { + "EventName": "packed_int_op_type.int256_cmp", + "EventCode": "0x0d", + "BriefDescription": "Retired 256-bit packed integer compare ops.", + "UMask": "0x70" + }, + { + "EventName": "packed_int_op_type.int256_shift", + "EventCode": "0x0d", + "BriefDescription": "Retired 256-bit packed integer shift ops.", + "UMask": "0x90" + }, + { + "EventName": "packed_int_op_type.int256_mov", + "EventCode": "0x0d", + "BriefDescription": "Retired 256-bit packed integer MOV ops.", + "UMask": "0xa0" + }, + { + "EventName": "packed_int_op_type.int256_shuffle", + "EventCode": "0x0d", + "BriefDescription": "Retired 256-bit packed integer shuffle ops (may include instructions not necessarily thought of as including shuffles e.g. horizontal add, dot product, and certain MOV instructions).", + "UMask": "0xb0" + }, + { + "EventName": "packed_int_op_type.int256_pack", + "EventCode": "0x0d", + "BriefDescription": "Retired 256-bit packed integer pack ops.", + "UMask": "0xc0" + }, + { + "EventName": "packed_int_op_type.int256_logical", + "EventCode": "0x0d", + "BriefDescription": "Retired 256-bit packed integer logical ops.", + "UMask": "0xd0" + }, + { + "EventName": "packed_int_op_type.int256_other", + "EventCode": "0x0d", + "BriefDescription": "Retired 256-bit packed integer ops of other types.", + "UMask": "0xe0" + }, + { + "EventName": "packed_int_op_type.int256_all", + "EventCode": "0x0d", + "BriefDescription": "Retired 256-bit packed integer ops of all types.", + "UMask": "0xf0" + }, + { + "EventName": "packed_int_op_type.all", + "EventCode": "0x0d", + "BriefDescription": "Retired packed integer ops of all types.", + "UMask": "0xff" + }, + { + "EventName": "fp_disp_faults.x87_fill_fault", + "EventCode": "0x0e", + "BriefDescription": "Floating-point dispatch faults for x87 fills.", + "UMask": "0x01" + }, + { + "EventName": "fp_disp_faults.xmm_fill_fault", + "EventCode": "0x0e", + "BriefDescription": "Floating-point dispatch faults for XMM fills.", + "UMask": "0x02" + }, + { + "EventName": "fp_disp_faults.ymm_fill_fault", + "EventCode": "0x0e", + "BriefDescription": "Floating-point dispatch faults for YMM fills.", + "UMask": "0x04" + }, + { + "EventName": "fp_disp_faults.ymm_spill_fault", + "EventCode": "0x0e", + "BriefDescription": "Floating-point dispatch faults for YMM spills.", + "UMask": "0x08" + }, + { + "EventName": "fp_disp_faults.sse_avx_all", + "EventCode": "0x0e", + "BriefDescription": "Floating-point dispatch faults of all types for SSE and AVX ops.", + "UMask": "0x0e" + }, + { + "EventName": "fp_disp_faults.all", + "EventCode": "0x0e", + "BriefDescription": "Floating-point dispatch faults of all types.", + "UMask": "0x0f" + } +] diff --git a/lib/libpmc/pmu-events/arch/x86/amdzen5/inst-cache.json b/lib/libpmc/pmu-events/arch/x86/amdzen5/inst-cache.json new file mode 100644 index 000000000000..ad75e5bf9513 --- /dev/null +++ b/lib/libpmc/pmu-events/arch/x86/amdzen5/inst-cache.json @@ -0,0 +1,72 @@ +[ + { + "EventName": "ic_cache_fill_l2", + "EventCode": "0x82", + "BriefDescription": "Instruction cache lines (64 bytes) fulfilled from the L2 cache." + }, + { + "EventName": "ic_cache_fill_sys", + "EventCode": "0x83", + "BriefDescription": "Instruction cache lines (64 bytes) fulfilled from system memory or another cache." + }, + { + "EventName": "ic_fetch_ibs_events.fetch_tagged", + "EventCode": "0x188", + "BriefDescription": "Fetches tagged by Fetch IBS. Not all tagged fetches result in a valid sample and an IBS interrupt.", + "UMask": "0x02" + }, + { + "EventName": "ic_fetch_ibs_events.sample_discarded", + "EventCode": "0x188", + "BriefDescription": "Fetches discarded after being tagged by Fetch IBS due to reasons other than IBS filtering.", + "UMask": "0x04" + }, + { + "EventName": "ic_fetch_ibs_events.sample_filtered", + "EventCode": "0x188", + "BriefDescription": "Fetches discarded after being tagged by Fetch IBS due to IBS filtering.", + "UMask": "0x08" + }, + { + "EventName": "ic_fetch_ibs_events.sample_valid", + "EventCode": "0x188", + "BriefDescription": "Fetches tagged by Fetch IBS that result in a valid sample and an IBS interrupt.", + "UMask": "0x10" + }, + { + "EventName": "ic_tag_hit_miss.instruction_cache_hit", + "EventCode": "0x18e", + "BriefDescription": "Instruction cache hits.", + "UMask": "0x07" + }, + { + "EventName": "ic_tag_hit_miss.instruction_cache_miss", + "EventCode": "0x18e", + "BriefDescription": "Instruction cache misses.", + "UMask": "0x18" + }, + { + "EventName": "ic_tag_hit_miss.all_instruction_cache_accesses", + "EventCode": "0x18e", + "BriefDescription": "Instruction cache accesses of all types.", + "UMask": "0x1f" + }, + { + "EventName": "op_cache_hit_miss.op_cache_hit", + "EventCode": "0x28f", + "BriefDescription": "Op cache hits.", + "UMask": "0x03" + }, + { + "EventName": "op_cache_hit_miss.op_cache_miss", + "EventCode": "0x28f", + "BriefDescription": "Op cache misses.", + "UMask": "0x04" + }, + { + "EventName": "op_cache_hit_miss.all_op_cache_accesses", + "EventCode": "0x28f", + "BriefDescription": "Op cache accesses of all types.", + "UMask": "0x07" + } +] diff --git a/lib/libpmc/pmu-events/arch/x86/amdzen5/l2-cache.json b/lib/libpmc/pmu-events/arch/x86/amdzen5/l2-cache.json new file mode 100644 index 000000000000..d1de51a02922 --- /dev/null +++ b/lib/libpmc/pmu-events/arch/x86/amdzen5/l2-cache.json @@ -0,0 +1,266 @@ +[ + { + "EventName": "l2_request_g1.group2", + "EventCode": "0x60", + "BriefDescription": "L2 cache requests of non-cacheable type (non-cached data and instructions reads, self-modifying code checks).", + "UMask": "0x01" + }, + { + "EventName": "l2_request_g1.l2_hw_pf", + "EventCode": "0x60", + "BriefDescription": "L2 cache requests: from hardware prefetchers to prefetch directly into L2 (hit or miss).", + "UMask": "0x02" + }, + { + "EventName": "l2_request_g1.prefetch_l2_cmd", + "EventCode": "0x60", + "BriefDescription": "L2 cache requests: prefetch directly into L2.", + "UMask": "0x04" + }, + { + "EventName": "l2_request_g1.cacheable_ic_read", + "EventCode": "0x60", + "BriefDescription": "L2 cache requests: instruction cache reads.", + "UMask": "0x10" + }, + { + "EventName": "l2_request_g1.ls_rd_blk_c_s", + "EventCode": "0x60", + "BriefDescription": "L2 cache requests: data cache shared reads.", + "UMask": "0x20" + }, + { + "EventName": "l2_request_g1.rd_blk_x", + "EventCode": "0x60", + "BriefDescription": "L2 cache requests: data cache stores.", + "UMask": "0x40" + }, + { + "EventName": "l2_request_g1.rd_blk_l", + "EventCode": "0x60", + "BriefDescription": "L2 cache requests: data cache reads including hardware and software prefetch.", + "UMask": "0x80" + }, + { + "EventName": "l2_request_g1.all_dc", + "EventCode": "0x60", + "BriefDescription": "L2 cache requests of common types from L1 data cache (including prefetches).", + "UMask": "0xe0" + }, + { + "EventName": "l2_request_g1.all_no_prefetch", + "EventCode": "0x60", + "BriefDescription": "L2 cache requests of common types not including prefetches.", + "UMask": "0xf1" + }, + { + "EventName": "l2_request_g1.all", + "EventCode": "0x60", + "BriefDescription": "L2 cache requests of all types.", + "UMask": "0xf7" + }, + { + "EventName": "l2_request_g2.ls_rd_sized_nc", + "EventCode": "0x61", + "BriefDescription": "L2 cache requests: non-coherent, non-cacheable LS sized reads.", + "UMask": "0x20" + }, + { + "EventName": "l2_request_g2.ls_rd_sized", + "EventCode": "0x61", + "BriefDescription": "L2 cache requests: coherent, non-cacheable LS sized reads.", + "UMask": "0x40" + }, + { + "EventName": "l2_wcb_req.wcb_close", + "EventCode": "0x63", + "BriefDescription": "Write Combining Buffer (WCB) closures.", + "UMask": "0x20" + }, + { + "EventName": "l2_cache_req_stat.ic_fill_miss", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) with status: instruction cache request miss in L2.", + "UMask": "0x01" + }, + { + "EventName": "l2_cache_req_stat.ic_fill_hit_s", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) with status: instruction cache hit non-modifiable line in L2.", + "UMask": "0x02" + }, + { + "EventName": "l2_cache_req_stat.ic_fill_hit_x", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) with status: instruction cache hit modifiable line in L2.", + "UMask": "0x04" + }, + { + "EventName": "l2_cache_req_stat.ic_hit_in_l2", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) for instruction cache hits.", + "UMask": "0x06" + }, + { + "EventName": "l2_cache_req_stat.ic_access_in_l2", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) for instruction cache access.", + "UMask": "0x07" + }, + { + "EventName": "l2_cache_req_stat.ls_rd_blk_c", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) with status: data cache request miss in L2.", + "UMask": "0x08" + }, + { + "EventName": "l2_cache_req_stat.ic_dc_miss_in_l2", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) for data and instruction cache misses.", + "UMask": "0x09" + }, + { + "EventName": "l2_cache_req_stat.ls_rd_blk_x", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) with status: data cache store or state change hit in L2.", + "UMask": "0x10" + }, + { + "EventName": "l2_cache_req_stat.ls_rd_blk_l_hit_s", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) with status: data cache read hit non-modifiable line in L2.", + "UMask": "0x20" + }, + { + "EventName": "l2_cache_req_stat.ls_rd_blk_l_hit_x", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) with status: data cache read hit modifiable line in L2.", + "UMask": "0x40" + }, + { + "EventName": "l2_cache_req_stat.ls_rd_blk_cs", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) with status: data cache shared read hit in L2.", + "UMask": "0x80" + }, + { + "EventName": "l2_cache_req_stat.dc_hit_in_l2", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) for data cache hits.", + "UMask": "0xf0" + }, + { + "EventName": "l2_cache_req_stat.ic_dc_hit_in_l2", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) for data and instruction cache hits.", + "UMask": "0xf6" + }, + { + "EventName": "l2_cache_req_stat.dc_access_in_l2", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) for data cache access.", + "UMask": "0xf8" + }, + { + "EventName": "l2_cache_req_stat.all", + "EventCode": "0x64", + "BriefDescription": "Core to L2 cache requests (not including L2 prefetch) for data and instruction cache access.", + "UMask": "0xff" + }, + { + "EventName": "l2_pf_hit_l2.l2_hwpf", + "EventCode": "0x70", + "BriefDescription": "L2 prefetches accepted by the L2 pipeline which hit in the L2 cache and are generated from L2 hardware prefetchers.", + "UMask": "0x1f" + }, + { + "EventName": "l2_pf_hit_l2.l1_dc_hwpf", + "EventCode": "0x70", + "BriefDescription": "L2 prefetches accepted by the L2 pipeline which hit in the L2 cache and are generated from L1 data hardware prefetchers.", + "UMask": "0xe0" + }, + { + "EventName": "l2_pf_hit_l2.l1_dc_l2_hwpf", + "EventCode": "0x70", + "BriefDescription": "L2 prefetches accepted by the L2 pipeline which hit in the L2 cache and are generated from L1 data and L2 hardware prefetchers.", + "UMask": "0xff" + }, + { + "EventName": "l2_pf_miss_l2_hit_l3.l2_hwpf", + "EventCode": "0x71", + "BriefDescription": "L2 prefetches accepted by the L2 pipeline which miss the L2 cache but hit in the L3 cache and are generated from L2 hardware prefetchers.", + "UMask": "0x1f" + }, + { + "EventName": "l2_pf_miss_l2_hit_l3.l1_dc_hwpf", + "EventCode": "0x71", + "BriefDescription": "L2 prefetches accepted by the L2 pipeline which miss the L2 cache but hit in the L3 cache and are generated from L1 data hardware prefetchers.", + "UMask": "0xe0" + }, + { + "EventName": "l2_pf_miss_l2_hit_l3.l1_dc_l2_hwpf", + "EventCode": "0x71", + "BriefDescription": "L2 prefetches accepted by the L2 pipeline which miss the L2 cache but hit in the L3 cache and are generated from L1 data and L2 hardware prefetchers.", + "UMask": "0xff" + }, + { + "EventName": "l2_pf_miss_l2_l3.l2_hwpf", + "EventCode": "0x72", + "BriefDescription": "L2 prefetches accepted by the L2 pipeline which miss the L2 as well as the L3 caches and are generated from L2 hardware prefetchers.", + "UMask": "0x1f" + }, + { + "EventName": "l2_pf_miss_l2_l3.l1_dc_hwpf", + "EventCode": "0x72", + "BriefDescription": "L2 prefetches accepted by the L2 pipeline which miss the L2 as well as the L3 caches and are generated from L1 data hardware prefetchers.", + "UMask": "0xe0" + }, + { + "EventName": "l2_pf_miss_l2_l3.l1_dc_l2_hwpf", + "EventCode": "0x72", + "BriefDescription": "L2 prefetches accepted by the L2 pipeline which miss the L2 as well as the L3 caches and are generated from L1 data and L2 hardware prefetchers.", + "UMask": "0xff" + }, + { + "EventName": "l2_fill_rsp_src.local_ccx", + "EventCode": "0x165", + "BriefDescription": "L2 cache fills from L3 cache or different L2 cache in the same CCX.", + "UMask": "0x02" + }, + { + "EventName": "l2_fill_rsp_src.near_cache", + "EventCode": "0x165", + "BriefDescription": "L2 cache fills from cache of another CCX when the address was in the same NUMA node.", + "UMask": "0x04" + }, + { + "EventName": "l2_fill_rsp_src.dram_io_near", + "EventCode": "0x165", + "BriefDescription": "L2 cache fills from either DRAM or MMIO in the same NUMA node.", + "UMask": "0x08" + }, + { + "EventName": "l2_fill_rsp_src.far_cache", + "EventCode": "0x165", + "BriefDescription": "L2 cache fills from cache of another CCX when the address was in a different NUMA node.", + "UMask": "0x10" + }, + { + "EventName": "l2_fill_rsp_src.dram_io_far", + "EventCode": "0x165", + "BriefDescription": "L2 cache fills from either DRAM or MMIO in a different NUMA node (same or different socket).", + "UMask": "0x40" + }, + { + "EventName": "l2_fill_rsp_src.alternate_memories", + "EventCode": "0x165", + "BriefDescription": "L2 cache fills from extension memory.", + "UMask": "0x80" + }, + { + "EventName": "l2_fill_rsp_src.all", + "EventCode": "0x165", + "BriefDescription": "L2 cache fills from all types of data sources.", + "UMask": "0xde" + } +] diff --git a/lib/libpmc/pmu-events/arch/x86/amdzen5/l3-cache.json b/lib/libpmc/pmu-events/arch/x86/amdzen5/l3-cache.json new file mode 100644 index 000000000000..b50fe14d4520 --- /dev/null +++ b/lib/libpmc/pmu-events/arch/x86/amdzen5/l3-cache.json @@ -0,0 +1,177 @@ +[ + { + "EventName": "l3_lookup_state.l3_miss", + "EventCode": "0x04", + "BriefDescription": "L3 cache misses.", + "UMask": "0x01", + "Unit": "L3PMC" + }, + { + "EventName": "l3_lookup_state.l3_hit", + "EventCode": "0x04", + "BriefDescription": "L3 cache hits.", + "UMask": "0xfe", + "Unit": "L3PMC" + }, + { + "EventName": "l3_lookup_state.all_coherent_accesses_to_l3", + "EventCode": "0x04", + "BriefDescription": "L3 cache requests for all coherent accesses.", + "UMask": "0xff", + "Unit": "L3PMC" + }, + { + "EventName": "l3_xi_sampled_latency.dram_near", + "EventCode": "0xac", + "BriefDescription": "Average sampled latency when data is sourced from DRAM in the same NUMA node.", + "UMask": "0x01", + "EnAllCores": "0x1", + "EnAllSlices": "0x1", + "SliceId": "0x3", + "ThreadMask": "0x3", + "Unit": "L3PMC" + }, + { + "EventName": "l3_xi_sampled_latency.dram_far", + "EventCode": "0xac", + "BriefDescription": "Average sampled latency when data is sourced from DRAM in a different NUMA node.", + "UMask": "0x02", + "EnAllCores": "0x1", + "EnAllSlices": "0x1", + "SliceId": "0x3", + "ThreadMask": "0x3", + "Unit": "L3PMC" + }, + { + "EventName": "l3_xi_sampled_latency.near_cache", + "EventCode": "0xac", + "BriefDescription": "Average sampled latency when data is sourced from another CCX's cache when the address was in the same NUMA node.", + "UMask": "0x04", + "EnAllCores": "0x1", + "EnAllSlices": "0x1", + "SliceId": "0x3", + "ThreadMask": "0x3", + "Unit": "L3PMC" + }, + { + "EventName": "l3_xi_sampled_latency.far_cache", + "EventCode": "0xac", + "BriefDescription": "Average sampled latency when data is sourced from another CCX's cache when the address was in a different NUMA node.", + "UMask": "0x08", + "EnAllCores": "0x1", + "EnAllSlices": "0x1", + "SliceId": "0x3", + "ThreadMask": "0x3", + "Unit": "L3PMC" + }, + { + "EventName": "l3_xi_sampled_latency.ext_near", + "EventCode": "0xac", + "BriefDescription": "Average sampled latency when data is sourced from extension memory (CXL) in the same NUMA node.", + "UMask": "0x10", + "EnAllCores": "0x1", + "EnAllSlices": "0x1", + "SliceId": "0x3", + "ThreadMask": "0x3", + "Unit": "L3PMC" + }, + { + "EventName": "l3_xi_sampled_latency.ext_far", + "EventCode": "0xac", + "BriefDescription": "Average sampled latency when data is sourced from extension memory (CXL) in a different NUMA node.", + "UMask": "0x20", + "EnAllCores": "0x1", + "EnAllSlices": "0x1", + "SliceId": "0x3", + "ThreadMask": "0x3", + "Unit": "L3PMC" + }, + { + "EventName": "l3_xi_sampled_latency.all", + "EventCode": "0xac", + "BriefDescription": "Average sampled latency from all data sources.", + "UMask": "0x3f", + "EnAllCores": "0x1", + "EnAllSlices": "0x1", + "SliceId": "0x3", + "ThreadMask": "0x3", + "Unit": "L3PMC" + }, + { + "EventName": "l3_xi_sampled_latency_requests.dram_near", + "EventCode": "0xad", + "BriefDescription": "L3 cache fill requests sourced from DRAM in the same NUMA node.", + "UMask": "0x01", + "EnAllCores": "0x1", + "EnAllSlices": "0x1", + "SliceId": "0x3", + "ThreadMask": "0x3", + "Unit": "L3PMC" + }, + { + "EventName": "l3_xi_sampled_latency_requests.dram_far", + "EventCode": "0xad", + "BriefDescription": "L3 cache fill requests sourced from DRAM in a different NUMA node.", + "UMask": "0x02", + "EnAllCores": "0x1", + "EnAllSlices": "0x1", + "SliceId": "0x3", + "ThreadMask": "0x3", + "Unit": "L3PMC" + }, + { + "EventName": "l3_xi_sampled_latency_requests.near_cache", + "EventCode": "0xad", + "BriefDescription": "L3 cache fill requests sourced from another CCX's cache when the address was in the same NUMA node.", + "UMask": "0x04", + "EnAllCores": "0x1", + "EnAllSlices": "0x1", + "SliceId": "0x3", + "ThreadMask": "0x3", + "Unit": "L3PMC" + }, + { + "EventName": "l3_xi_sampled_latency_requests.far_cache", + "EventCode": "0xad", + "BriefDescription": "L3 cache fill requests sourced from another CCX's cache when the address was in a different NUMA node.", + "UMask": "0x08", + "EnAllCores": "0x1", + "EnAllSlices": "0x1", + "SliceId": "0x3", + "ThreadMask": "0x3", + "Unit": "L3PMC" + }, + { + "EventName": "l3_xi_sampled_latency_requests.ext_near", + "EventCode": "0xad", + "BriefDescription": "L3 cache fill requests sourced from extension memory (CXL) in the same NUMA node.", + "UMask": "0x10", + "EnAllCores": "0x1", + "EnAllSlices": "0x1", + "SliceId": "0x3", + "ThreadMask": "0x3", + "Unit": "L3PMC" + }, + { + "EventName": "l3_xi_sampled_latency_requests.ext_far", + "EventCode": "0xad", + "BriefDescription": "L3 cache fill requests sourced from extension memory (CXL) in a different NUMA node.", + "UMask": "0x20", + "EnAllCores": "0x1", + "EnAllSlices": "0x1", + "SliceId": "0x3", + "ThreadMask": "0x3", + "Unit": "L3PMC" + }, + { + "EventName": "l3_xi_sampled_latency_requests.all", + "EventCode": "0xad", + "BriefDescription": "L3 cache fill requests sourced from all data sources.", + "UMask": "0x3f", + "EnAllCores": "0x1", + "EnAllSlices": "0x1", + "SliceId": "0x3", + "ThreadMask": "0x3", + "Unit": "L3PMC" + } +] diff --git a/lib/libpmc/pmu-events/arch/x86/amdzen5/load-store.json b/lib/libpmc/pmu-events/arch/x86/amdzen5/load-store.json new file mode 100644 index 000000000000..ff6627a77805 --- /dev/null +++ b/lib/libpmc/pmu-events/arch/x86/amdzen5/load-store.json @@ -0,0 +1,517 @@ +[ + { + "EventName": "ls_bad_status2.stli_other", + "EventCode": "0x24", + "BriefDescription": "Store-to-load conflicts (load unable to complete due to a non-forwardable conflict with an older store).", + "UMask": "0x02" + }, + { + "EventName": "ls_locks.bus_lock", + "EventCode": "0x25", + "BriefDescription": "Retired Lock instructions which caused a bus lock.", + "UMask": "0x01" + }, + { + "EventName": "ls_ret_cl_flush", + "EventCode": "0x26", + "BriefDescription": "Retired CLFLUSH instructions." + }, + { + "EventName": "ls_ret_cpuid", + "EventCode": "0x27", + "BriefDescription": "Retired CPUID instructions." + }, + { + "EventName": "ls_dispatch.ld_dispatch", + "EventCode": "0x29", + "BriefDescription": "Number of memory load operations dispatched to the load-store unit.", + "UMask": "0x01" + }, + { + "EventName": "ls_dispatch.store_dispatch", + "EventCode": "0x29", + "BriefDescription": "Number of memory store operations dispatched to the load-store unit.", + "UMask": "0x02" + }, + { + "EventName": "ls_dispatch.ld_st_dispatch", + "EventCode": "0x29", + "BriefDescription": "Number of memory load-store operations dispatched to the load-store unit.", + "UMask": "0x04" + }, + { + "EventName": "ls_dispatch.all", + "EventCode": "0x29", + "BriefDescription": "Number of memory operations dispatched to the load-store unit.", + "UMask": "0x07" + }, + { + "EventName": "ls_smi_rx", + "EventCode": "0x2b", + "BriefDescription": "SMIs received." + }, + { + "EventName": "ls_int_taken", + "EventCode": "0x2c", + "BriefDescription": "Interrupts taken." + }, + { + "EventName": "ls_stlf", + "EventCode": "0x35", + "BriefDescription": "Store-to-load-forward (STLF) hits." + }, + { + "EventName": "ls_st_commit_cancel2.st_commit_cancel_wcb_full", + "EventCode": "0x37", + "BriefDescription": "Non-cacheable store commits cancelled due to the non-cacheable commit buffer being full.", + "UMask": "0x01" + }, + { + "EventName": "ls_mab_alloc.load_store_allocations", + "EventCode": "0x41", + "BriefDescription": "Miss Address Buffer (MAB) entries allocated by a Load-Store (LS) pipe for load-store allocations.", + "UMask": "0x3f" + }, + { + "EventName": "ls_mab_alloc.hardware_prefetcher_allocations", + "EventCode": "0x41", + "BriefDescription": "Miss Address Buffer (MAB) entries allocated by a Load-Store (LS) pipe for hardware prefetcher allocations.", + "UMask": "0x40" + }, + { + "EventName": "ls_mab_alloc.all_allocations", + "EventCode": "0x41", + "BriefDescription": "Miss Address Buffer (MAB) entries allocated by a Load-Store (LS) pipe for all types of allocations.", + "UMask": "0x7f" + }, + { + "EventName": "ls_dmnd_fills_from_sys.local_l2", + "EventCode": "0x43", + "BriefDescription": "Demand data cache fills from local L2 cache.", + "UMask": "0x01" + }, + { + "EventName": "ls_dmnd_fills_from_sys.local_ccx", + "EventCode": "0x43", + "BriefDescription": "Demand data cache fills from L3 cache or different L2 cache in the same CCX.", + "UMask": "0x02" + }, + { + "EventName": "ls_dmnd_fills_from_sys.local_all", + "EventCode": "0x43", + "BriefDescription": "Demand data cache fills from local L2 cache, L3 cache or different L2 cache in the same CCX.", + "UMask": "0x03" + }, + { + "EventName": "ls_dmnd_fills_from_sys.near_cache", + "EventCode": "0x43", + "BriefDescription": "Demand data cache fills from cache of another CCX when the address was in the same NUMA node.", + "UMask": "0x04" + }, + { + "EventName": "ls_dmnd_fills_from_sys.dram_io_near", + "EventCode": "0x43", + "BriefDescription": "Demand data cache fills from either DRAM or MMIO in the same NUMA node.", + "UMask": "0x08" + }, + { + "EventName": "ls_dmnd_fills_from_sys.far_cache", + "EventCode": "0x43", + "BriefDescription": "Demand data cache fills from cache of another CCX when the address was in a different NUMA node.", + "UMask": "0x10" + }, + { + "EventName": "ls_dmnd_fills_from_sys.remote_cache", + "EventCode": "0x43", + "BriefDescription": "Demand data cache fills from cache of another CCX when the address was in the same or a different NUMA node.", + "UMask": "0x14" + }, + { + "EventName": "ls_dmnd_fills_from_sys.dram_io_far", + "EventCode": "0x43", + "BriefDescription": "Demand data cache fills from either DRAM or MMIO in a different NUMA node (same or different socket).", + "UMask": "0x40" + }, + { + "EventName": "ls_dmnd_fills_from_sys.dram_io_all", + "EventCode": "0x43", + "BriefDescription": "Demand data cache fills from either DRAM or MMIO in the same or a different NUMA node (same or different socket).", + "UMask": "0x48" + }, + { + "EventName": "ls_dmnd_fills_from_sys.far_all", + "EventCode": "0x43", + "BriefDescription": "Demand data cache fills from either cache of another CCX, DRAM or MMIO when the address was in a different NUMA node (same or different socket).", + "UMask": "0x50" + }, + { + "EventName": "ls_dmnd_fills_from_sys.alternate_memories", + "EventCode": "0x43", + "BriefDescription": "Demand data cache fills from extension memory.", + "UMask": "0x80" + }, + { + "EventName": "ls_dmnd_fills_from_sys.all", + "EventCode": "0x43", + "BriefDescription": "Demand data cache fills from all types of data sources.", + "UMask": "0xff" + }, + { + "EventName": "ls_any_fills_from_sys.local_l2", + "EventCode": "0x44", + "BriefDescription": "Any data cache fills from local L2 cache.", + "UMask": "0x01" + }, + { + "EventName": "ls_any_fills_from_sys.local_ccx", + "EventCode": "0x44", + "BriefDescription": "Any data cache fills from L3 cache or different L2 cache in the same CCX.", + "UMask": "0x02" + }, + { + "EventName": "ls_any_fills_from_sys.local_all", + "EventCode": "0x44", + "BriefDescription": "Any data cache fills from local L2 cache or L3 cache or different L2 cache in the same CCX.", + "UMask": "0x03" + }, + { + "EventName": "ls_any_fills_from_sys.near_cache", + "EventCode": "0x44", + "BriefDescription": "Any data cache fills from cache of another CCX when the address was in the same NUMA node.", + "UMask": "0x04" + }, + { + "EventName": "ls_any_fills_from_sys.dram_io_near", + "EventCode": "0x44", + "BriefDescription": "Any data cache fills from either DRAM or MMIO in the same NUMA node.", + "UMask": "0x08" + }, + { + "EventName": "ls_any_fills_from_sys.far_cache", + "EventCode": "0x44", + "BriefDescription": "Any data cache fills from cache of another CCX when the address was in a different NUMA node.", + "UMask": "0x10" + }, + { + "EventName": "ls_any_fills_from_sys.remote_cache", + "EventCode": "0x44", + "BriefDescription": "Any data cache fills from cache of another CCX when the address was in the same or a different NUMA node.", + "UMask": "0x14" + }, + { + "EventName": "ls_any_fills_from_sys.dram_io_far", + "EventCode": "0x44", + "BriefDescription": "Any data cache fills from either DRAM or MMIO in a different NUMA node (same or different socket).", + "UMask": "0x40" + }, + { + "EventName": "ls_any_fills_from_sys.dram_io_all", + "EventCode": "0x44", + "BriefDescription": "Any data cache fills from either DRAM or MMIO in any NUMA node (same or different socket).", + "UMask": "0x48" + }, + { + "EventName": "ls_any_fills_from_sys.far_all", + "EventCode": "0x44", + "BriefDescription": "Any data cache fills from either cache of another CCX, DRAM or MMIO when the address was in a different NUMA node (same or different socket).", + "UMask": "0x50" + }, + { + "EventName": "ls_any_fills_from_sys.alternate_memories", + "EventCode": "0x44", + "BriefDescription": "Any data cache fills from extension memory.", + "UMask": "0x80" + }, + { + "EventName": "ls_any_fills_from_sys.all", + "EventCode": "0x44", + "BriefDescription": "Any data cache fills from all types of data sources.", + "UMask": "0xff" + }, + { + "EventName": "ls_l1_d_tlb_miss.tlb_reload_4k_l2_hit", + "EventCode": "0x45", + "BriefDescription": "L1 DTLB misses with L2 DTLB hits for 4k pages.", + "UMask": "0x01" + }, + { + "EventName": "ls_l1_d_tlb_miss.tlb_reload_coalesced_page_hit", + "EventCode": "0x45", + "BriefDescription": "L1 DTLB misses with L2 DTLB hits for coalesced pages. A coalesced page is a 16k page created from four adjacent 4k pages.", + "UMask": "0x02" + }, + { + "EventName": "ls_l1_d_tlb_miss.tlb_reload_2m_l2_hit", + "EventCode": "0x45", + "BriefDescription": "L1 DTLB misses with L2 DTLB hits for 2M pages.", + "UMask": "0x04" + }, + { + "EventName": "ls_l1_d_tlb_miss.tlb_reload_1g_l2_hit", + "EventCode": "0x45", + "BriefDescription": "L1 DTLB misses with L2 DTLB hits for 1G pages.", + "UMask": "0x08" + }, + { + "EventName": "ls_l1_d_tlb_miss.tlb_reload_4k_l2_miss", + "EventCode": "0x45", + "BriefDescription": "L1 DTLB misses with L2 DTLB misses (page-table walks are requested) for 4k pages.", + "UMask": "0x10" + }, + { + "EventName": "ls_l1_d_tlb_miss.tlb_reload_coalesced_page_miss", + "EventCode": "0x45", + "BriefDescription": "L1 DTLB misses with L2 DTLB misses (page-table walks are requested) for coalesced pages. A coalesced page is a 16k page created from four adjacent 4k pages.", + "UMask": "0x20" + }, + { + "EventName": "ls_l1_d_tlb_miss.tlb_reload_2m_l2_miss", + "EventCode": "0x45", + "BriefDescription": "L1 DTLB misses with L2 DTLB misses (page-table walks are requested) for 2M pages.", + "UMask": "0x40" + }, + { + "EventName": "ls_l1_d_tlb_miss.tlb_reload_1g_l2_miss", + "EventCode": "0x45", + "BriefDescription": "L1 DTLB misses with L2 DTLB misses (page-table walks are requested) for 1G pages.", + "UMask": "0x80" + }, + { + "EventName": "ls_l1_d_tlb_miss.all_l2_miss", + "EventCode": "0x45", + "BriefDescription": "L1 DTLB misses with L2 DTLB misses (page-table walks are requested) for all page sizes.", + "UMask": "0xf0" + }, + { + "EventName": "ls_l1_d_tlb_miss.all", + "EventCode": "0x45", + "BriefDescription": "L1 DTLB misses for all page sizes.", + "UMask": "0xff" + }, + { + "EventName": "ls_misal_loads.ma64", + "EventCode": "0x47", + "BriefDescription": "64B misaligned (cacheline crossing) loads.", + "UMask": "0x01" + }, + { + "EventName": "ls_misal_loads.ma4k", + "EventCode": "0x47", + "BriefDescription": "4kB misaligned (page crossing) loads.", + "UMask": "0x02" + }, + { + "EventName": "ls_pref_instr_disp.prefetch", + "EventCode": "0x4b", + "BriefDescription": "Software prefetch instructions dispatched (speculative) of type PrefetchT0 (move data to all cache levels), T1 (move data to all cache levels except L1) and T2 (move data to all cache levels except L1 and L2).", + "UMask": "0x01" + }, + { + "EventName": "ls_pref_instr_disp.prefetch_w", + "EventCode": "0x4b", + "BriefDescription": "Software prefetch instructions dispatched (speculative) of type PrefetchW (move data to L1 cache and mark it modifiable).", + "UMask": "0x02" + }, + { + "EventName": "ls_pref_instr_disp.prefetch_nta", + "EventCode": "0x4b", + "BriefDescription": "Software prefetch instructions dispatched (speculative) of type PrefetchNTA (move data with minimum cache pollution i.e. non-temporal access).", + "UMask": "0x04" + }, + { + "EventName": "ls_pref_instr_disp.all", + "EventCode": "0x4b", + "BriefDescription": "Software prefetch instructions dispatched (speculative) of all types.", + "UMask": "0x07" + }, + { + "EventName": "wcb_close.full_line_64b", + "EventCode": "0x50", + "BriefDescription": "Number of events that caused a Write Combining Buffer (WCB) entry to close because all 64 bytes of the entry have been written to.", + "UMask": "0x01" + }, + { + "EventName": "ls_inef_sw_pref.data_pipe_sw_pf_dc_hit", + "EventCode": "0x52", + "BriefDescription": "Software prefetches that did not fetch data outside of the processor core as the PREFETCH instruction saw a data cache hit.", + "UMask": "0x01" + }, + { + "EventName": "ls_inef_sw_pref.mab_mch_cnt", + "EventCode": "0x52", + "BriefDescription": "Software prefetches that did not fetch data outside of the processor core as the PREFETCH instruction saw a match on an already allocated Miss Address Buffer (MAB).", + "UMask": "0x02" + }, + { + "EventName": "ls_inef_sw_pref.all", + "EventCode": "0x52", + "BriefDescript6ion": "Software prefetches that did not fetch data outside of the processor core for any reason.", + "UMask": "0x03" + }, + { + "EventName": "ls_sw_pf_dc_fills.local_l2", + "EventCode": "0x59", + "BriefDescription": "Software prefetch data cache fills from local L2 cache.", + "UMask": "0x01" + }, + { + "EventName": "ls_sw_pf_dc_fills.local_ccx", + "EventCode": "0x59", + "BriefDescription": "Software prefetch data cache fills from L3 cache or different L2 cache in the same CCX.", + "UMask": "0x02" + }, + { + "EventName": "ls_sw_pf_dc_fills.local_all", + "EventCode": "0x59", + "BriefDescription": "Software prefetch data cache fills from local L2 cache, L3 cache or different L2 cache in the same CCX.", + "UMask": "0x03" + }, + { + "EventName": "ls_sw_pf_dc_fills.near_cache", + "EventCode": "0x59", + "BriefDescription": "Software prefetch data cache fills from cache of another CCX in the same NUMA node.", + "UMask": "0x04" + }, + { + "EventName": "ls_sw_pf_dc_fills.dram_io_near", + "EventCode": "0x59", + "BriefDescription": "Software prefetch data cache fills from either DRAM or MMIO in the same NUMA node.", + "UMask": "0x08" + }, + { + "EventName": "ls_sw_pf_dc_fills.far_cache", + "EventCode": "0x59", + "BriefDescription": "Software prefetch data cache fills from cache of another CCX in a different NUMA node.", + "UMask": "0x10" + }, + { + "EventName": "ls_sw_pf_dc_fills.remote_cache", + "EventCode": "0x59", + "BriefDescription": "Software prefetch data cache fills from cache of another CCX when the address was in the same or a different NUMA node.", + "UMask": "0x14" + }, + { + "EventName": "ls_sw_pf_dc_fills.dram_io_far", + "EventCode": "0x59", + "BriefDescription": "Software prefetch data cache fills from either DRAM or MMIO in a different NUMA node (same or different socket).", + "UMask": "0x40" + }, + { + "EventName": "ls_sw_pf_dc_fills.dram_io_all", + "EventCode": "0x59", + "BriefDescription": "Software prefetch data cache fills from either DRAM or MMIO in the same or a different NUMA node (same or different socket).", + "UMask": "0x48" + }, + { + "EventName": "ls_sw_pf_dc_fills.far_all", + "EventCode": "0x59", + "BriefDescription": "Software prefetch data cache fills from either cache of another CCX, DRAM or MMIO when the address was in a different NUMA node (same or different socket).", + "UMask": "0x50" + }, + { + "EventName": "ls_sw_pf_dc_fills.alternate_memories", + "EventCode": "0x59", + "BriefDescription": "Software prefetch data cache fills from extension memory.", + "UMask": "0x80" + }, + { + "EventName": "ls_sw_pf_dc_fills.all", + "EventCode": "0x59", + "BriefDescription": "Software prefetch data cache fills from all types of data sources.", + "UMask": "0xdf" + }, + { + "EventName": "ls_hw_pf_dc_fills.local_l2", + "EventCode": "0x5a", + "BriefDescription": "Hardware prefetch data cache fills from local L2 cache.", + "UMask": "0x01" + }, + { + "EventName": "ls_hw_pf_dc_fills.local_ccx", + "EventCode": "0x5a", + "BriefDescription": "Hardware prefetch data cache fills from L3 cache or different L2 cache in the same CCX.", + "UMask": "0x02" + }, + { + "EventName": "ls_hw_pf_dc_fills.local_all", + "EventCode": "0x5a", + "BriefDescription": "Hardware prefetch data cache fills from local L2 cache, L3 cache or different L2 cache in the same CCX.", + "UMask": "0x03" + }, + { + "EventName": "ls_hw_pf_dc_fills.near_cache", + "EventCode": "0x5a", + "BriefDescription": "Hardware prefetch data cache fills from cache of another CCX when the address was in the same NUMA node.", + "UMask": "0x04" + }, + { + "EventName": "ls_hw_pf_dc_fills.dram_io_near", + "EventCode": "0x5a", + "BriefDescription": "Hardware prefetch data cache fills from either DRAM or MMIO in the same NUMA node.", + "UMask": "0x08" + }, + { + "EventName": "ls_hw_pf_dc_fills.far_cache", + "EventCode": "0x5a", + "BriefDescription": "Hardware prefetch data cache fills from cache of another CCX when the address was in a different NUMA node.", + "UMask": "0x10" + }, + { + "EventName": "ls_hw_pf_dc_fills.remote_cache", + "EventCode": "0x5a", + "BriefDescription": "Hardware prefetch data cache fills from cache of another CCX when the address was in the same or a different NUMA node.", + "UMask": "0x14" + }, + { + "EventName": "ls_hw_pf_dc_fills.dram_io_far", + "EventCode": "0x5a", + "BriefDescription": "Hardware prefetch data cache fills from either DRAM or MMIO in a different NUMA node (same or different socket).", + "UMask": "0x40" + }, + { + "EventName": "ls_hw_pf_dc_fills.dram_io_all", + "EventCode": "0x5a", + "BriefDescription": "Hardware prefetch data cache fills from either DRAM or MMIO in the same or a different NUMA node (same or different socket).", + "UMask": "0x48" + }, + { + "EventName": "ls_hw_pf_dc_fills.far_all", + "EventCode": "0x5a", + "BriefDescription": "Hardware prefetch data cache fills from either cache of another CCX, DRAM or MMIO when the address was in a different NUMA node (same or different socket).", + "UMask": "0x50" + }, + { + "EventName": "ls_hw_pf_dc_fills.alternate_memories", + "EventCode": "0x5a", + "BriefDescription": "Hardware prefetch data cache fills from extension memory.", + "UMask": "0x80" + }, + { + "EventName": "ls_hw_pf_dc_fills.all", + "EventCode": "0x5a", + "BriefDescription": "Hardware prefetch data cache fills from all types of data sources.", + "UMask": "0xdf" + }, + { + "EventName": "ls_alloc_mab_count", + "EventCode": "0x5f", + "BriefDescription": "In-flight L1 data cache misses i.e. Miss Address Buffer (MAB) allocations each cycle." + }, + { + "EventName": "ls_not_halted_cyc", + "EventCode": "0x76", + "BriefDescription": "Core cycles not in halt." + }, + { + "EventName": "ls_tlb_flush.all", + "EventCode": "0x78", + "BriefDescription": "All TLB Flushes.", + "UMask": "0xff" + }, + { + "EventName": "ls_not_halted_p0_cyc.p0_freq_cyc", + "EventCode": "0x120", + "BriefDescription": "Reference cycles (P0 frequency) not in halt .", + "UMask": "0x1" + } +] diff --git a/lib/libpmc/pmu-events/arch/x86/amdzen5/memory-controller.json b/lib/libpmc/pmu-events/arch/x86/amdzen5/memory-controller.json new file mode 100644 index 000000000000..1a629fc9474a --- /dev/null +++ b/lib/libpmc/pmu-events/arch/x86/amdzen5/memory-controller.json @@ -0,0 +1,101 @@ +[ + { + "EventName": "umc_mem_clk", + "PublicDescription": "Number of memory clock (MEMCLK) cycles.", + "EventCode": "0x00", + "PerPkg": "1", + "Unit": "UMCPMC" + }, + { + "EventName": "umc_act_cmd.all", + "PublicDescription": "Number of ACTIVATE commands sent.", + "EventCode": "0x05", + "PerPkg": "1", + "Unit": "UMCPMC" + }, + { + "EventName": "umc_act_cmd.rd", + "PublicDescription": "Number of ACTIVATE commands sent for reads.", + "EventCode": "0x05", + "RdWrMask": "0x1", + "PerPkg": "1", + "Unit": "UMCPMC" + }, + { + "EventName": "umc_act_cmd.wr", + "PublicDescription": "Number of ACTIVATE commands sent for writes.", + "EventCode": "0x05", + "RdWrMask": "0x2", + "PerPkg": "1", + "Unit": "UMCPMC" + }, + { + "EventName": "umc_pchg_cmd.all", + "PublicDescription": "Number of PRECHARGE commands sent.", + "EventCode": "0x06", + "PerPkg": "1", + "Unit": "UMCPMC" + }, + { + "EventName": "umc_pchg_cmd.rd", + "PublicDescription": "Number of PRECHARGE commands sent for reads.", + "EventCode": "0x06", + "RdWrMask": "0x1", + "PerPkg": "1", + "Unit": "UMCPMC" + }, + { + "EventName": "umc_pchg_cmd.wr", + "PublicDescription": "Number of PRECHARGE commands sent for writes.", + "EventCode": "0x06", + "RdWrMask": "0x2", + "PerPkg": "1", + "Unit": "UMCPMC" + }, + { + "EventName": "umc_cas_cmd.all", + "PublicDescription": "Number of CAS commands sent.", + "EventCode": "0x0a", + "PerPkg": "1", + "Unit": "UMCPMC" + }, + { + "EventName": "umc_cas_cmd.rd", + "PublicDescription": "Number of CAS commands sent for reads.", + "EventCode": "0x0a", + "RdWrMask": "0x1", + "PerPkg": "1", + "Unit": "UMCPMC" + }, + { + "EventName": "umc_cas_cmd.wr", + "PublicDescription": "Number of CAS commands sent for writes.", + "EventCode": "0x0a", + "RdWrMask": "0x2", + "PerPkg": "1", + "Unit": "UMCPMC" + }, + { + "EventName": "umc_data_slot_clks.all", + "PublicDescription": "Number of clock cycles used by the data bus.", + "EventCode": "0x14", + "PerPkg": "1", + "Unit": "UMCPMC" + }, + { + "EventName": "umc_data_slot_clks.rd", + "PublicDescription": "Number of clock cycles used by the data bus for reads.", + "EventCode": "0x14", + "RdWrMask": "0x1", + "PerPkg": "1", + "Unit": "UMCPMC" + }, + { + "EventName": "umc_data_slot_clks.wr", + "PublicDescription": "Number of clock cycles used by the data bus for writes.", + "EventCode": "0x14", + "RdWrMask": "0x2", + "PerPkg": "1", + "Unit": "UMCPMC" + } +] diff --git a/lib/libpmc/pmu-events/arch/x86/amdzen5/pipeline.json b/lib/libpmc/pmu-events/arch/x86/amdzen5/pipeline.json new file mode 100644 index 000000000000..d860bf599cf2 --- /dev/null +++ b/lib/libpmc/pmu-events/arch/x86/amdzen5/pipeline.json @@ -0,0 +1,99 @@ +[ + { + "MetricName": "total_dispatch_slots", + "BriefDescription": "Total dispatch slots (up to 8 instructions can be dispatched in each cycle).", + "MetricExpr": "8 * ls_not_halted_cyc", + "ScaleUnit": "1slots" + }, + { + "MetricName": "frontend_bound", + "BriefDescription": "Percentage of dispatch slots that remained unused because the frontend did not supply enough instructions/ops.", + "MetricExpr": "d_ratio(de_no_dispatch_per_slot.no_ops_from_frontend, total_dispatch_slots)", + "MetricGroup": "PipelineL1", + "ScaleUnit": "100%slots" + }, + { + "MetricName": "bad_speculation", + "BriefDescription": "Percentage of dispatched ops that did not retire.", + "MetricExpr": "d_ratio(de_src_op_disp.all - ex_ret_ops, total_dispatch_slots)", + "MetricGroup": "PipelineL1", + "ScaleUnit": "100%ops" + }, + { + "MetricName": "backend_bound", + "BriefDescription": "Percentage of dispatch slots that remained unused because of backend stalls.", + "MetricExpr": "d_ratio(de_no_dispatch_per_slot.backend_stalls, total_dispatch_slots)", + "MetricGroup": "PipelineL1", + "ScaleUnit": "100%slots" + }, + { + "MetricName": "smt_contention", + "BriefDescription": "Percentage of dispatch slots that remained unused because the other thread was selected.", + "MetricExpr": "d_ratio(de_no_dispatch_per_slot.smt_contention, total_dispatch_slots)", + "MetricGroup": "PipelineL1", + "ScaleUnit": "100%slots" + }, + { + "MetricName": "retiring", + "BriefDescription": "Percentage of dispatch slots used by ops that retired.", + "MetricExpr": "d_ratio(ex_ret_ops, total_dispatch_slots)", + "MetricGroup": "PipelineL1", + "ScaleUnit": "100%slots" + }, + { + "MetricName": "frontend_bound_by_latency", + "BriefDescription": "Percentage of dispatch slots that remained unused because of a latency bottleneck in the frontend (such as instruction cache or TLB misses).", + "MetricExpr": "d_ratio((8 * cpu@de_no_dispatch_per_slot.no_ops_from_frontend\\,cmask\\=0x8@), total_dispatch_slots)", + "MetricGroup": "PipelineL2;frontend_bound_group", + "ScaleUnit": "100%slots" + }, + { + "MetricName": "frontend_bound_by_bandwidth", + "BriefDescription": "Percentage of dispatch slots that remained unused because of a bandwidth bottleneck in the frontend (such as decode or op cache fetch bandwidth).", + "MetricExpr": "d_ratio(de_no_dispatch_per_slot.no_ops_from_frontend - (8 * cpu@de_no_dispatch_per_slot.no_ops_from_frontend\\,cmask\\=0x8@), total_dispatch_slots)", + "MetricGroup": "PipelineL2;frontend_bound_group", + "ScaleUnit": "100%slots" + }, + { + "MetricName": "bad_speculation_from_mispredicts", + "BriefDescription": "Percentage of dispatched ops that were flushed due to branch mispredicts.", + "MetricExpr": "d_ratio(bad_speculation * ex_ret_brn_misp, ex_ret_brn_misp + bp_redirects.resync)", + "MetricGroup": "PipelineL2;bad_speculation_group", + "ScaleUnit": "100%ops" + }, + { + "MetricName": "bad_speculation_from_pipeline_restarts", + "BriefDescription": "Percentage of dispatched ops that were flushed due to pipeline restarts (resyncs).", + "MetricExpr": "d_ratio(bad_speculation * bp_redirects.resync, ex_ret_brn_misp + bp_redirects.resync)", + "MetricGroup": "PipelineL2;bad_speculation_group", + "ScaleUnit": "100%ops" + }, + { + "MetricName": "backend_bound_by_memory", + "BriefDescription": "Percentage of dispatch slots that remained unused because of stalls due to the memory subsystem.", + "MetricExpr": "backend_bound * d_ratio(ex_no_retire.load_not_complete, ex_no_retire.not_complete)", + "MetricGroup": "PipelineL2;backend_bound_group", + "ScaleUnit": "100%slots" + }, + { + "MetricName": "backend_bound_by_cpu", + "BriefDescription": "Percentage of dispatch slots that remained unused because of stalls not related to the memory subsystem.", + "MetricExpr": "backend_bound * (1 - d_ratio(ex_no_retire.load_not_complete, ex_no_retire.not_complete))", + "MetricGroup": "PipelineL2;backend_bound_group", + "ScaleUnit": "100%slots" + }, + { + "MetricName": "retiring_from_fastpath", + "BriefDescription": "Percentage of dispatch slots used by fastpath ops that retired.", + "MetricExpr": "retiring * (1 - d_ratio(ex_ret_ucode_ops, ex_ret_ops))", + "MetricGroup": "PipelineL2;retiring_group", + "ScaleUnit": "100%slots" + }, + { + "MetricName": "retiring_from_microcode", + "BriefDescription": "Percentage of dispatch slots used by microcode ops that retired.", + "MetricExpr": "retiring * d_ratio(ex_ret_ucode_ops, ex_ret_ops)", + "MetricGroup": "PipelineL2;retiring_group", + "ScaleUnit": "100%slots" + } +] diff --git a/lib/libpmc/pmu-events/arch/x86/amdzen5/recommended.json b/lib/libpmc/pmu-events/arch/x86/amdzen5/recommended.json new file mode 100644 index 000000000000..635d57e3bc15 --- /dev/null +++ b/lib/libpmc/pmu-events/arch/x86/amdzen5/recommended.json @@ -0,0 +1,457 @@ +[ + { + "MetricName": "branch_misprediction_rate", + "BriefDescription": "Execution-time branch misprediction rate (non-speculative).", + "MetricExpr": "d_ratio(ex_ret_brn_misp, ex_ret_brn)", + "MetricGroup": "branch_prediction", + "ScaleUnit": "1per_branch" + }, + { + "MetricName": "all_data_cache_accesses_pti", + "BriefDescription": "All data cache accesses per thousand instructions.", + "MetricExpr": "ls_dispatch.all / instructions", + "MetricGroup": "l1_dcache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "all_l2_cache_accesses_pti", + "BriefDescription": "All L2 cache accesses per thousand instructions.", + "MetricExpr": "(l2_request_g1.all_no_prefetch + l2_pf_hit_l2.l2_hwpf + l2_pf_miss_l2_hit_l3.l2_hwpf + l2_pf_miss_l2_l3.l2_hwpf) / instructions", + "MetricGroup": "l2_cache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l2_cache_accesses_from_l1_ic_misses_pti", + "BriefDescription": "L2 cache accesses from L1 instruction cache misses (including prefetch) per thousand instructions.", + "MetricExpr": "l2_request_g1.cacheable_ic_read / instructions", + "MetricGroup": "l2_cache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l2_cache_accesses_from_l1_dc_misses_pti", + "BriefDescription": "L2 cache accesses from L1 data cache misses (including prefetch) per thousand instructions.", + "MetricExpr": "l2_request_g1.all_dc / instructions", + "MetricGroup": "l2_cache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l2_cache_accesses_from_l2_hwpf_pti", + "BriefDescription": "L2 cache accesses from L2 cache hardware prefetcher per thousand instructions.", + "MetricExpr": "(l2_pf_hit_l2.l1_dc_l2_hwpf + l2_pf_miss_l2_hit_l3.l1_dc_l2_hwpf + l2_pf_miss_l2_l3.l1_dc_l2_hwpf) / instructions", + "MetricGroup": "l2_cache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "all_l2_cache_misses_pti", + "BriefDescription": "All L2 cache misses per thousand instructions.", + "MetricExpr": "(l2_cache_req_stat.ic_dc_miss_in_l2 + l2_pf_miss_l2_hit_l3.l2_hwpf + l2_pf_miss_l2_l3.l2_hwpf) / instructions", + "MetricGroup": "l2_cache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l2_cache_misses_from_l1_ic_miss_pti", + "BriefDescription": "L2 cache misses from L1 instruction cache misses per thousand instructions.", + "MetricExpr": "l2_cache_req_stat.ic_fill_miss / instructions", + "MetricGroup": "l2_cache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l2_cache_misses_from_l1_dc_miss_pti", + "BriefDescription": "L2 cache misses from L1 data cache misses per thousand instructions.", + "MetricExpr": "l2_cache_req_stat.ls_rd_blk_c / instructions", + "MetricGroup": "l2_cache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l2_cache_misses_from_l2_hwpf_pti", + "BriefDescription": "L2 cache misses from L2 cache hardware prefetcher per thousand instructions.", + "MetricExpr": "(l2_pf_miss_l2_hit_l3.l1_dc_l2_hwpf + l2_pf_miss_l2_l3.l1_dc_l2_hwpf) / instructions", + "MetricGroup": "l2_cache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "all_l2_cache_hits_pti", + "BriefDescription": "All L2 cache hits per thousand instructions.", + "MetricExpr": "(l2_cache_req_stat.ic_dc_hit_in_l2 + l2_pf_hit_l2.l2_hwpf) / instructions", + "MetricGroup": "l2_cache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l2_cache_hits_from_l1_ic_miss_pti", + "BriefDescription": "L2 cache hits from L1 instruction cache misses per thousand instructions.", + "MetricExpr": "l2_cache_req_stat.ic_hit_in_l2 / instructions", + "MetricGroup": "l2_cache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l2_cache_hits_from_l1_dc_miss_pti", + "BriefDescription": "L2 cache hits from L1 data cache misses per thousand instructions.", + "MetricExpr": "l2_cache_req_stat.dc_hit_in_l2 / instructions", + "MetricGroup": "l2_cache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l2_cache_hits_from_l2_hwpf_pti", + "BriefDescription": "L2 cache hits from L2 cache hardware prefetcher per thousand instructions.", + "MetricExpr": "l2_pf_hit_l2.l1_dc_l2_hwpf / instructions", + "MetricGroup": "l2_cache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l3_cache_accesses", + "BriefDescription": "L3 cache accesses.", + "MetricExpr": "l3_lookup_state.all_coherent_accesses_to_l3", + "MetricGroup": "l3_cache" + }, + { + "MetricName": "l3_misses", + "BriefDescription": "L3 misses (including cacheline state change requests).", + "MetricExpr": "l3_lookup_state.l3_miss", + "MetricGroup": "l3_cache" + }, + { + "MetricName": "l3_read_miss_latency", + "BriefDescription": "Average L3 read miss latency (in core clocks).", + "MetricExpr": "(l3_xi_sampled_latency.all * 10) / l3_xi_sampled_latency_requests.all", + "MetricGroup": "l3_cache", + "ScaleUnit": "1ns" + }, + { + "MetricName": "l3_read_miss_latency_for_local_dram", + "BriefDescription": "Average L3 read miss latency (in core clocks) for local DRAM.", + "MetricExpr": "(l3_xi_sampled_latency.dram_near * 10) / l3_xi_sampled_latency_requests.dram_near", + "MetricGroup": "l3_cache", + "ScaleUnit": "1ns" + }, + { + "MetricName": "l3_read_miss_latency_for_remote_dram", + "BriefDescription": "Average L3 read miss latency (in core clocks) for remote DRAM.", + "MetricExpr": "(l3_xi_sampled_latency.dram_far * 10) / l3_xi_sampled_latency_requests.dram_far", + "MetricGroup": "l3_cache", + "ScaleUnit": "1ns" + }, + { + "MetricName": "op_cache_fetch_miss_ratio", + "BriefDescription": "Op cache miss ratio for all fetches.", + "MetricExpr": "d_ratio(op_cache_hit_miss.op_cache_miss, op_cache_hit_miss.all_op_cache_accesses)", + "ScaleUnit": "100%" + }, + { + "MetricName": "ic_fetch_miss_ratio", + "BriefDescription": "Instruction cache miss ratio for all fetches. An instruction cache miss will not be counted by this metric if it is an OC hit.", + "MetricExpr": "d_ratio(ic_tag_hit_miss.instruction_cache_miss, ic_tag_hit_miss.all_instruction_cache_accesses)", + "ScaleUnit": "100%" + }, + { + "MetricName": "l1_data_cache_fills_from_memory_pti", + "BriefDescription": "L1 data cache fills from DRAM or MMIO in any NUMA node per thousand instructions.", + "MetricExpr": "ls_any_fills_from_sys.dram_io_all / instructions", + "MetricGroup": "l1_dcache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l1_data_cache_fills_from_remote_node_pti", + "BriefDescription": "L1 data cache fills from a different NUMA node per thousand instructions.", + "MetricExpr": "ls_any_fills_from_sys.far_all / instructions", + "MetricGroup": "l1_dcache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l1_data_cache_fills_from_same_ccx_pti", + "BriefDescription": "L1 data cache fills from within the same CCX per thousand instructions.", + "MetricExpr": "ls_any_fills_from_sys.local_all / instructions", + "MetricGroup": "l1_dcache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l1_data_cache_fills_from_different_ccx_pti", + "BriefDescription": "L1 data cache fills from another CCX cache in any NUMA node per thousand instructions.", + "MetricExpr": "ls_any_fills_from_sys.remote_cache / instructions", + "MetricGroup": "l1_dcache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "all_l1_data_cache_fills_pti", + "BriefDescription": "All L1 data cache fills per thousand instructions.", + "MetricExpr": "ls_any_fills_from_sys.all / instructions", + "MetricGroup": "l1_dcache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l1_demand_data_cache_fills_from_local_l2_pti", + "BriefDescription": "L1 demand data cache fills from local L2 cache per thousand instructions.", + "MetricExpr": "ls_dmnd_fills_from_sys.local_l2 / instructions", + "MetricGroup": "l1_dcache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l1_demand_data_cache_fills_from_same_ccx_pti", + "BriefDescription": "L1 demand data cache fills from within the same CCX per thousand instructions.", + "MetricExpr": "ls_dmnd_fills_from_sys.local_ccx / instructions", + "MetricGroup": "l1_dcache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l1_demand_data_cache_fills_from_near_cache_pti", + "BriefDescription": "L1 demand data cache fills from another CCX cache in the same NUMA node per thousand instructions.", + "MetricExpr": "ls_dmnd_fills_from_sys.near_cache / instructions", + "MetricGroup": "l1_dcache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l1_demand_data_cache_fills_from_near_memory_pti", + "BriefDescription": "L1 demand data cache fills from DRAM or MMIO in the same NUMA node per thousand instructions.", + "MetricExpr": "ls_dmnd_fills_from_sys.dram_io_near / instructions", + "MetricGroup": "l1_dcache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l1_demand_data_cache_fills_from_far_cache_pti", + "BriefDescription": "L1 demand data cache fills from another CCX cache in a different NUMA node per thousand instructions.", + "MetricExpr": "ls_dmnd_fills_from_sys.far_cache / instructions", + "MetricGroup": "l1_dcache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l1_demand_data_cache_fills_from_far_memory_pti", + "BriefDescription": "L1 demand data cache fills from DRAM or MMIO in a different NUMA node per thousand instructions.", + "MetricExpr": "ls_dmnd_fills_from_sys.dram_io_far / instructions", + "MetricGroup": "l1_dcache", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l1_itlb_misses_pti", + "BriefDescription": "L1 instruction TLB misses per thousand instructions.", + "MetricExpr": "(bp_l1_tlb_miss_l2_tlb_hit + bp_l1_tlb_miss_l2_tlb_miss.all) / instructions", + "MetricGroup": "tlb", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l2_itlb_misses_pti", + "BriefDescription": "L2 instruction TLB misses and instruction page walks per thousand instructions.", + "MetricExpr": "bp_l1_tlb_miss_l2_tlb_miss.all / instructions", + "MetricGroup": "tlb", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l1_dtlb_misses_pti", + "BriefDescription": "L1 data TLB misses per thousand instructions.", + "MetricExpr": "ls_l1_d_tlb_miss.all / instructions", + "MetricGroup": "tlb", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "l2_dtlb_misses_pti", + "BriefDescription": "L2 data TLB misses and data page walks per thousand instructions.", + "MetricExpr": "ls_l1_d_tlb_miss.all_l2_miss / instructions", + "MetricGroup": "tlb", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "all_tlbs_flushed_pti", + "BriefDescription": "All TLBs flushed per thousand instructions.", + "MetricExpr": "ls_tlb_flush.all / instructions", + "MetricGroup": "tlb", + "ScaleUnit": "1e3per_1k_instr" + }, + { + "MetricName": "macro_ops_dispatched", + "BriefDescription": "Macro-ops dispatched.", + "MetricExpr": "de_src_op_disp.all", + "MetricGroup": "decoder" + }, + { + "MetricName": "sse_avx_stalls", + "BriefDescription": "Mixed SSE/AVX stalls.", + "MetricExpr": "fp_disp_faults.sse_avx_all" + }, + { + "MetricName": "macro_ops_retired", + "BriefDescription": "Macro-ops retired.", + "MetricExpr": "ex_ret_ops" + }, + { + "MetricName": "umc_data_bus_utilization", + "BriefDescription": "Memory controller data bus utilization.", + "MetricExpr": "d_ratio(umc_data_slot_clks.all / 2, umc_mem_clk)", + "MetricGroup": "memory_controller", + "PerPkg": "1", + "ScaleUnit": "100%" + }, + { + "MetricName": "umc_cas_cmd_rate", + "BriefDescription": "Memory controller CAS command rate.", + "MetricExpr": "d_ratio(umc_cas_cmd.all * 1000, umc_mem_clk)", + "MetricGroup": "memory_controller", + "PerPkg": "1", + "ScaleUnit": "1per_memclk" + }, + { + "MetricName": "umc_cas_cmd_read_ratio", + "BriefDescription": "Ratio of memory controller CAS commands for reads.", + "MetricExpr": "d_ratio(umc_cas_cmd.rd, umc_cas_cmd.all)", + "MetricGroup": "memory_controller", + "PerPkg": "1", + "ScaleUnit": "100%" + }, + { + "MetricName": "umc_cas_cmd_write_ratio", + "BriefDescription": "Ratio of memory controller CAS commands for writes.", + "MetricExpr": "d_ratio(umc_cas_cmd.wr, umc_cas_cmd.all)", + "MetricGroup": "memory_controller", + "PerPkg": "1", + "ScaleUnit": "100%" + }, + { + "MetricName": "umc_mem_read_bandwidth", + "BriefDescription": "Estimated memory read bandwidth.", + "MetricExpr": "(umc_cas_cmd.rd * 64) / 1e6 / duration_time", + "MetricGroup": "memory_controller", + "PerPkg": "1", + "ScaleUnit": "1MB/s" + }, + { + "MetricName": "umc_mem_write_bandwidth", + "BriefDescription": "Estimated memory write bandwidth.", + "MetricExpr": "(umc_cas_cmd.wr * 64) / 1e6 / duration_time", + "MetricGroup": "memory_controller", + "PerPkg": "1", + "ScaleUnit": "1MB/s" + }, + { + "MetricName": "umc_mem_bandwidth", + "BriefDescription": "Estimated combined memory bandwidth.", + "MetricExpr": "(umc_cas_cmd.all * 64) / 1e6 / duration_time", + "MetricGroup": "memory_controller", + "PerPkg": "1", + "ScaleUnit": "1MB/s" + }, + { + "MetricName": "umc_activate_cmd_rate", + "BriefDescription": "Memory controller ACTIVATE command rate.", + "MetricExpr": "d_ratio(umc_act_cmd.all * 1000, umc_mem_clk)", + "MetricGroup": "memory_controller", + "PerPkg": "1", + "ScaleUnit": "1per_memclk" + }, + { + "MetricName": "umc_precharge_cmd_rate", + "BriefDescription": "Memory controller PRECHARGE command rate.", + "MetricExpr": "d_ratio(umc_pchg_cmd.all * 1000, umc_mem_clk)", + "MetricGroup": "memory_controller", + "PerPkg": "1", + "ScaleUnit": "1per_memclk" + }, + { + "MetricName": "dram_read_bandwidth_for_local_or_remote_socket", + "BriefDescription": "DRAM read data bandwidth for accesses in local or remote socket.", + "MetricExpr": "(local_or_remote_socket_read_data_beats_dram_0 + local_or_remote_socket_read_data_beats_dram_1 + local_or_remote_socket_read_data_beats_dram_2 + local_or_remote_socket_read_data_beats_dram_3 + local_or_remote_socket_read_data_beats_dram_4 + local_or_remote_socket_read_data_beats_dram_5 + local_or_remote_socket_read_data_beats_dram_6 + local_or_remote_socket_read_data_beats_dram_7 + local_or_remote_socket_read_data_beats_dram_8 + local_or_remote_socket_read_data_beats_dram_9 + local_or_remote_socket_read_data_beats_dram_10 + local_or_remote_socket_read_data_beats_dram_11) / duration_time", + "MetricGroup": "data_fabric", + "PerPkg": "1", + "ScaleUnit": "6.4e-5MB/s" + }, + { + "MetricName": "dram_write_bandwidth_for_local_socket", + "BriefDescription": "DRAM write data bandwidth for accesses in local socket.", + "MetricExpr": "(local_socket_write_data_beats_dram_0 + local_socket_write_data_beats_dram_1 + local_socket_write_data_beats_dram_2 + local_socket_write_data_beats_dram_3 + local_socket_write_data_beats_dram_4 + local_socket_write_data_beats_dram_5 + local_socket_write_data_beats_dram_6 + local_socket_write_data_beats_dram_7 + local_socket_write_data_beats_dram_8 + local_socket_write_data_beats_dram_9 + local_socket_write_data_beats_dram_10 + local_socket_write_data_beats_dram_11) / duration_time", + "MetricGroup": "data_fabric", + "PerPkg": "1", + "ScaleUnit": "6.4e-5MB/s" + }, + { + "MetricName": "dram_write_bandwidth_for_remote_socket", + "BriefDescription": "DRAM write data bandwidth for accesses in remote socket.", + "MetricExpr": "(remote_socket_write_data_beats_dram_0 + remote_socket_write_data_beats_dram_1 + remote_socket_write_data_beats_dram_2 + remote_socket_write_data_beats_dram_3 + remote_socket_write_data_beats_dram_4 + remote_socket_write_data_beats_dram_5 + remote_socket_write_data_beats_dram_6 + remote_socket_write_data_beats_dram_7 + remote_socket_write_data_beats_dram_8 + remote_socket_write_data_beats_dram_9 + remote_socket_write_data_beats_dram_10 + remote_socket_write_data_beats_dram_11) / duration_time", + "MetricGroup": "data_fabric", + "PerPkg": "1", + "ScaleUnit": "6.4e-5MB/s" + }, + { + "MetricName": "dram_write_bandwidth_for_local_or_remote_socket", + "BriefDescription": "DRAM write data bandwidth for accesses in local or remote socket.", + "MetricExpr": "(local_or_remote_socket_write_data_beats_dram_0 + local_or_remote_socket_write_data_beats_dram_1 + local_or_remote_socket_write_data_beats_dram_2 + local_or_remote_socket_write_data_beats_dram_3 + local_or_remote_socket_write_data_beats_dram_4 + local_or_remote_socket_write_data_beats_dram_5 + local_or_remote_socket_write_data_beats_dram_6 + local_or_remote_socket_write_data_beats_dram_7 + local_or_remote_socket_write_data_beats_dram_8 + local_or_remote_socket_write_data_beats_dram_9 + local_or_remote_socket_write_data_beats_dram_10 + local_or_remote_socket_write_data_beats_dram_11) / duration_time", + "MetricGroup": "data_fabric", + "PerPkg": "1", + "ScaleUnit": "6.4e-5MB/s" + }, + { + "MetricName": "upstream_dma_read_bandwidth_for_local_socket", + "BriefDescription": "Upstream DMA read data bandwidth for accesses in local socket.", + "MetricExpr": "(local_socket_upstream_read_data_beats_io_0 + local_socket_upstream_read_data_beats_io_1 + local_socket_upstream_read_data_beats_io_2 + local_socket_upstream_read_data_beats_io_3 + local_socket_upstream_read_data_beats_io_4 + local_socket_upstream_read_data_beats_io_5 + local_socket_upstream_read_data_beats_io_6 + local_socket_upstream_read_data_beats_io_7) / duration_time", + "MetricGroup": "data_fabric", + "PerPkg": "1", + "ScaleUnit": "6.4e-5MB/s" + }, + { + "MetricName": "upstream_dma_write_bandwidth_for_local_socket", + "BriefDescription": "Upstream DMA write data bandwidth for accesses in local socket.", + "MetricExpr": "(local_socket_upstream_write_data_beats_io_0 + local_socket_upstream_write_data_beats_io_1 + local_socket_upstream_write_data_beats_io_2 + local_socket_upstream_write_data_beats_io_3 + local_socket_upstream_write_data_beats_io_4 + local_socket_upstream_write_data_beats_io_5 + local_socket_upstream_write_data_beats_io_6 + local_socket_upstream_write_data_beats_io_7) / duration_time", + "MetricGroup": "data_fabric", + "PerPkg": "1", + "ScaleUnit": "6.4e-5MB/s" + }, + { + "MetricName": "upstream_dma_read_bandwidth_for_remote_socket", + "BriefDescription": "Upstream DMA read data bandwidth for accesses in remote socket.", + "MetricExpr": "(remote_socket_upstream_read_data_beats_io_0 + remote_socket_upstream_read_data_beats_io_1 + remote_socket_upstream_read_data_beats_io_2 + remote_socket_upstream_read_data_beats_io_3 + remote_socket_upstream_read_data_beats_io_4 + remote_socket_upstream_read_data_beats_io_5 + remote_socket_upstream_read_data_beats_io_6 + remote_socket_upstream_read_data_beats_io_7) / duration_time", + "MetricGroup": "data_fabric", + "PerPkg": "1", + "ScaleUnit": "6.4e-5MB/s" + }, + { + "MetricName": "upstream_dma_write_bandwidth_for_remote_socket", + "BriefDescription": "Upstream DMA write data bandwidth for accesses in remote socket.", + "MetricExpr": "(remote_socket_upstream_write_data_beats_io_0 + remote_socket_upstream_write_data_beats_io_1 + remote_socket_upstream_write_data_beats_io_2 + remote_socket_upstream_write_data_beats_io_3 + remote_socket_upstream_write_data_beats_io_4 + remote_socket_upstream_write_data_beats_io_5 + remote_socket_upstream_write_data_beats_io_6 + remote_socket_upstream_write_data_beats_io_7) / duration_time", + "MetricGroup": "data_fabric", + "PerPkg": "1", + "ScaleUnit": "6.4e-5MB/s" + }, + { + "MetricName": "core_inbound_data_bandwidth_for_local_socket", + "BriefDescription": "Core inbound data bandwidth for accesses in local socket.", + "MetricExpr": "(local_socket_inbound_data_beats_cfi_0 + local_socket_inbound_data_beats_cfi_1 + local_socket_inbound_data_beats_cfi_2 + local_socket_inbound_data_beats_cfi_3 + local_socket_inbound_data_beats_cfi_4 + local_socket_inbound_data_beats_cfi_5 + local_socket_inbound_data_beats_cfi_6 + local_socket_inbound_data_beats_cfi_7 + local_socket_inbound_data_beats_cfi_8 + local_socket_inbound_data_beats_cfi_9 + local_socket_inbound_data_beats_cfi_10 + local_socket_inbound_data_beats_cfi_11 + local_socket_inbound_data_beats_cfi_12 + local_socket_inbound_data_beats_cfi_13 + local_socket_inbound_data_beats_cfi_14 + local_socket_inbound_data_beats_cfi_15) / duration_time", + "MetricGroup": "data_fabric", + "PerPkg": "1", + "ScaleUnit": "3.2e-5MB/s" + }, + { + "MetricName": "core_outbound_data_bandwidth_for_local_socket", + "BriefDescription": "Core outbound data bandwidth for accesses in local socket.", + "MetricExpr": "(local_socket_outbound_data_beats_cfi_0 + local_socket_outbound_data_beats_cfi_1 + local_socket_outbound_data_beats_cfi_2 + local_socket_outbound_data_beats_cfi_3 + local_socket_outbound_data_beats_cfi_4 + local_socket_outbound_data_beats_cfi_5 + local_socket_outbound_data_beats_cfi_6 + local_socket_outbound_data_beats_cfi_7 + local_socket_outbound_data_beats_cfi_8 + local_socket_outbound_data_beats_cfi_9 + local_socket_outbound_data_beats_cfi_10 + local_socket_outbound_data_beats_cfi_11 + local_socket_outbound_data_beats_cfi_12 + local_socket_outbound_data_beats_cfi_13 + local_socket_outbound_data_beats_cfi_14 + local_socket_outbound_data_beats_cfi_15) / duration_time", + "MetricGroup": "data_fabric", + "PerPkg": "1", + "ScaleUnit": "6.4e-5MB/s" + }, + { + "MetricName": "core_inbound_data_bandwidth_for_remote_socket", + "BriefDescription": "Core inbound data bandwidth for accesses in remote socket.", + "MetricExpr": "(remote_socket_inbound_data_beats_cfi_0 + remote_socket_inbound_data_beats_cfi_1 + remote_socket_inbound_data_beats_cfi_2 + remote_socket_inbound_data_beats_cfi_3 + remote_socket_inbound_data_beats_cfi_4 + remote_socket_inbound_data_beats_cfi_5 + remote_socket_inbound_data_beats_cfi_6 + remote_socket_inbound_data_beats_cfi_7 + remote_socket_inbound_data_beats_cfi_8 + remote_socket_inbound_data_beats_cfi_9 + remote_socket_inbound_data_beats_cfi_10 + remote_socket_inbound_data_beats_cfi_11 + remote_socket_inbound_data_beats_cfi_12 + remote_socket_inbound_data_beats_cfi_13 + remote_socket_inbound_data_beats_cfi_14 + remote_socket_inbound_data_beats_cfi_15) / duration_time", + "MetricGroup": "data_fabric", + "PerPkg": "1", + "ScaleUnit": "3.2e-5MB/s" + }, + { + "MetricName": "core_outbound_data_bandwidth_for_remote_socket", + "BriefDescription": "Core outbound data bandwidth for accesses in remote socket.", + "MetricExpr": "(remote_socket_outbound_data_beats_cfi_0 + remote_socket_outbound_data_beats_cfi_1 + remote_socket_outbound_data_beats_cfi_2 + remote_socket_outbound_data_beats_cfi_3 + remote_socket_outbound_data_beats_cfi_4 + remote_socket_outbound_data_beats_cfi_5 + remote_socket_outbound_data_beats_cfi_6 + remote_socket_outbound_data_beats_cfi_7 + remote_socket_outbound_data_beats_cfi_8 + remote_socket_outbound_data_beats_cfi_9 + remote_socket_outbound_data_beats_cfi_10 + remote_socket_outbound_data_beats_cfi_11 + remote_socket_outbound_data_beats_cfi_12 + remote_socket_outbound_data_beats_cfi_13 + remote_socket_outbound_data_beats_cfi_14 + remote_socket_outbound_data_beats_cfi_15) / duration_time", + "MetricGroup": "data_fabric", + "PerPkg": "1", + "ScaleUnit": "6.4e-5MB/s" + }, + { + "MetricName": "cross_socket_inbound_data_bandwidth_for_local_socket", + "BriefDescription": "Inbound data bandwidth for accesses between local socket and remote socket.", + "MetricExpr": "(local_socket_inbound_data_beats_link_0 + local_socket_inbound_data_beats_link_1 + local_socket_inbound_data_beats_link_2 + local_socket_inbound_data_beats_link_3 + local_socket_inbound_data_beats_link_4 + local_socket_inbound_data_beats_link_5) / duration_time", + "MetricGroup": "data_fabric", + "PerPkg": "1", + "ScaleUnit": "6.4e-5MB/s" + }, + { + "MetricName": "cross_socket_outbound_data_bandwidth_for_local_socket", + "BriefDescription": "Outbound data bandwidth for accesses between local socket and remote socket.", + "MetricExpr": "(local_socket_outbound_data_beats_link_0 + local_socket_outbound_data_beats_link_1 + local_socket_outbound_data_beats_link_2 + local_socket_outbound_data_beats_link_3 + local_socket_outbound_data_beats_link_4 + local_socket_outbound_data_beats_link_5) / duration_time", + "MetricGroup": "data_fabric", + "PerPkg": "1", + "ScaleUnit": "6.4e-5MB/s" + } +] diff --git a/lib/libpmc/pmu-events/arch/x86/mapfile.csv b/lib/libpmc/pmu-events/arch/x86/mapfile.csv index 87a68de4a909..31c4c19417f3 100644 --- a/lib/libpmc/pmu-events/arch/x86/mapfile.csv +++ b/lib/libpmc/pmu-events/arch/x86/mapfile.csv @@ -55,4 +55,5 @@ AuthenticAMD-23-[012][0-9A-F],v2,amdzen1,core AuthenticAMD-23-[[:xdigit:]]+,v1,amdzen2,core AuthenticAMD-25-[0245][[:xdigit:]],v1,amdzen3,core AuthenticAMD-25-[[:xdigit:]]+,v1,amdzen4,core +AuthenticAMD-26-[[:xdigit:]]+,v1,amdzen5,core HygonGenuine-24-00,v2,amdzen1,core diff --git a/lib/libsys/chroot.2 b/lib/libsys/chroot.2 index 3347df5cceee..809dbaad2f65 100644 --- a/lib/libsys/chroot.2 +++ b/lib/libsys/chroot.2 @@ -62,7 +62,7 @@ It should be noted that has no effect on the process's current directory. .Pp This call is restricted to the super-user, unless the -.Ql security.bsd.unprivileged_chroot +.Ql Va security.bsd.unprivileged_chroot sysctl variable is set to 1 and the process has enabled the .Dv PROC_NO_NEW_PRIVS_CTL @@ -118,7 +118,7 @@ will fail and the root directory will be unchanged if: .Bl -tag -width Er .It Bq Er EPERM The effective user ID is not the super-user and the -.Ql security.bsd.unprivileged_chroot +.Ql Va security.bsd.unprivileged_chroot sysctl is 0. .It Bq Er EPERM The effective user ID is not the super-user and the @@ -127,7 +127,7 @@ process has not enabled the .Xr procctl 2 . .It Bq Er EPERM One or more filedescriptors are open directories and the -.Ql kern.chroot_allow_open_directories +.Ql Va kern.chroot_allow_open_directories sysctl is not set to permit this. .It Bq Er EIO An I/O error occurred while reading from or writing to the file system. diff --git a/lib/libsys/ioctl.2 b/lib/libsys/ioctl.2 index e96c5c48d097..5784f43ef98b 100644 --- a/lib/libsys/ioctl.2 +++ b/lib/libsys/ioctl.2 @@ -25,7 +25,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.Dd September 11, 2013 +.Dd December 29, 2025 .Dt IOCTL 2 .Os .Sh NAME @@ -110,6 +110,9 @@ The system call will fail if: .Bl -tag -width Er +.It Bq Er EACCES +The process does not have permission to call this +.Nm . .It Bq Er EBADF The .Fa fd diff --git a/lib/libsys/powerpcspe/Makefile.sys b/lib/libsys/powerpcspe/Makefile.sys deleted file mode 100644 index 35909d68cd5e..000000000000 --- a/lib/libsys/powerpcspe/Makefile.sys +++ /dev/null @@ -1,5 +0,0 @@ -CFLAGS+= -I${LIBC_SRCTOP}/powerpc -CFLAGS+= -I${LIBSYS_SRCTOP}/powerpc - -.PATH: ${LIBSYS_SRCTOP}/powerpc -.include "${LIBSYS_SRCTOP}/powerpc/Makefile.sys" diff --git a/lib/libsys/ptrace.2 b/lib/libsys/ptrace.2 index 7aa24a3f820b..a6798bb22b27 100644 --- a/lib/libsys/ptrace.2 +++ b/lib/libsys/ptrace.2 @@ -148,31 +148,31 @@ Sometimes it may be desirable to disallow it either completely, or limit its scope. The following controls are provided for this: .Bl -tag -width security.bsd.unprivileged_proc_debug -.It Dv security.bsd.allow_ptrace +.It Va security.bsd.allow_ptrace Setting this sysctl to zero makes .Nm return .Er ENOSYS always as if the syscall is not implemented by the kernel. -.It Dv security.bsd.unprivileged_proc_debug +.It Va security.bsd.unprivileged_proc_debug Setting this sysctl to zero disallows the use of .Fn ptrace by unprivileged processes. -.It Dv security.bsd.see_other_uids +.It Va security.bsd.see_other_uids Setting this sysctl to zero prevents .Fn ptrace requests from targeting processes with a real user identifier different from the caller's. These requests will fail with error .Er ESRCH . -.It Dv security.bsd.see_other_gids +.It Va security.bsd.see_other_gids Setting this sysctl to zero disallows .Fn ptrace requests from processes that have no groups in common with the target process, considering their sets of real and supplementary groups. These requests will fail with error .Er ESRCH . -.It Dv security.bsd.see_jail_proc +.It Va security.bsd.see_jail_proc Setting this sysctl to zero disallows .Fn ptrace requests from processes belonging to a different jail than that of the target diff --git a/lib/libutil/login.conf.5 b/lib/libutil/login.conf.5 index 942f3ecd2661..d4bbc1d67780 100644 --- a/lib/libutil/login.conf.5 +++ b/lib/libutil/login.conf.5 @@ -17,7 +17,7 @@ .\" 5. Modifications may be freely made to this file providing the above .\" conditions are met. .\" -.Dd September 25, 2025 +.Dd December 15, 2025 .Dt LOGIN.CONF 5 .Os .Sh NAME @@ -288,7 +288,6 @@ explicitly indicates not to change the umask. .Bl -column passwd_prompt indent indent .It Sy "Name Type Default Description" .\" .It "approve program Program to approve login. -.It "copyright file File containing additional copyright information" .It "host.allow list List of remote host wildcards from which users in" the class may access. .It "host.deny list List of remote host wildcards from which users" diff --git a/lib/libypclnt/Makefile b/lib/libypclnt/Makefile index 899e301f4608..ce63d8627a5f 100644 --- a/lib/libypclnt/Makefile +++ b/lib/libypclnt/Makefile @@ -1,4 +1,6 @@ -PACKAGE= runtime +PACKAGE= yp +LIB_PACKAGE= + LIB= ypclnt SHLIB_MAJOR= 4 SRCS= ypclnt_connect.c \ diff --git a/lib/libzstd/Makefile b/lib/libzstd/Makefile index 0e25f01d4881..4a1557a14517 100644 --- a/lib/libzstd/Makefile +++ b/lib/libzstd/Makefile @@ -1,3 +1,6 @@ +PACKAGE= zstd +LIB_PACKAGE= + LIB= zstd SRCS= entropy_common.c \ error_private.c \ @@ -43,7 +46,6 @@ LIBADD= pthread CFLAGS+= -DZSTD_DISABLE_ASM PRIVATELIB= yes -PACKAGE= runtime ZSTDDIR= ${SRCTOP}/sys/contrib/zstd .PATH: ${ZSTDDIR}/lib/common ${ZSTDDIR}/lib/compress \ diff --git a/libexec/nuageinit/nuageinit b/libexec/nuageinit/nuageinit index a5411c60b410..f7700f7d8e70 100755 --- a/libexec/nuageinit/nuageinit +++ b/libexec/nuageinit/nuageinit @@ -16,14 +16,28 @@ end local ni_path = arg[1] local citype = arg[2] -local default_user = { - name = "freebsd", - homedir = "/home/freebsd", - groups = "wheel", - gecos = "FreeBSD User", - shell = "/bin/sh", - plain_text_passwd = "freebsd" -} +local function default_user(obj, metadata) + local ssh_authorized_keys = {} + if type(metadata.public_keys) == "table" then + for _, k in pairs(metadata.public_keys) do + table.insert(ssh_authorized_keys, k) + end + end + if obj and type(obj.ssh_authorized_keys) == "table" then + for _, k in ipairs(obj.ssh_authorized_keys) do + table.insert(ssh_authorized_keys, k) + end + end + return { + name = "freebsd", + homedir = "/home/freebsd", + groups = "wheel", + gecos = "FreeBSD User", + shell = "/bin/sh", + plain_text_passwd = "freebsd", + ssh_authorized_keys = ssh_authorized_keys + } +end local root = os.getenv("NUAGE_FAKE_ROOTDIR") if not root then @@ -78,12 +92,16 @@ local function get_ifaces_by_mac() return myifaces end -local function sethostname(obj) +local function sethostname(obj, metadata) -- always prefer fqdn if specified over hostname - if obj.fqdn then + if obj and obj.fqdn then nuage.sethostname(obj.fqdn) - elseif obj.hostname then + elseif obj and obj.hostname then nuage.sethostname(obj.hostname) + elseif metadata["local-hostname"] then + nuage.sethostname(metadata["local-hostname"]) + elseif metadata["hostname"] then + nuage.sethostname(metadata["hostname"]) end end @@ -110,20 +128,44 @@ local function groups(obj) end end -local function create_default_user(obj) - if not obj.users then - -- default user if none are defined - nuage.adduser(default_user) +local function create_default_user(obj, metadata) + local function need_default_user() + -- no user data + if not obj then + return true + end + if not obj.users then + -- default user if "users" is undefined + return true + end + -- create default user if "default" is in the users list + for _, u in pairs(obj.users) do + if type(u) == "string" and u == "default" then + return true + end + end + return false + end + + if need_default_user() then + local du = default_user(obj, metadata) + local homedir = nuage.adduser(du) + if du.ssh_authorized_keys then + for _, k in ipairs(du.ssh_authorized_keys) do + nuage.addsshkey(homedir, k) + end + end end end -local function users(obj) +local function users(obj, metadata) if obj.users == nil then return end for n, u in pairs(obj.users) do if type(u) == "string" then if u == "default" then - nuage.adduser(default_user) + -- already done during create_default_user + nuage.adduser(default_user(obj, metadata)) else nuage.adduser({name = u}) end @@ -180,14 +222,6 @@ local function ssh_keys(obj) end end -local function ssh_authorized_keys(obj) - if obj.ssh_authorized_keys == nil then return end - local homedir = nuage.adduser(default_user) - for _, k in ipairs(obj.ssh_authorized_keys) do - nuage.addsshkey(homedir, k) - end -end - local function nameservers(interface, obj) local resolvconf_conf_handler = open_resolvconf_conf() @@ -236,9 +270,16 @@ local function nameservers(interface, obj) resolv_conf_handler:close() end - if not os.execute("resolvconf -a " .. interface .. " < " .. resolv_conf) then + -- Only call resolvconf with interface if interface is provided + if interface then + resolvconf_command = "resolvconf -a " .. interface .. " < " .. resolv_conf + else + resolvconf_command = "resolvconf -u" + end + if not os.execute(resolvconf_command) then nuage.warn("Failed to execute resolvconf(8)") end + end local function install_packages(packages) @@ -273,17 +314,17 @@ local function get_ifaces_by_driver() local drivers = {} local last_interface = nil for line in proc:lines() do - local interface = line:match("^([%S]+): ") + local interface = line:match("^([%S]+): ") - if interface then + if interface then last_interface = interface - end + end - local driver = line:match("^[%s]+drivername: ([%S]+)$") + local driver = line:match("^[%s]+drivername: ([%S]+)$") - if driver then + if driver then drivers[driver] = last_interface - end + end end proc:close() @@ -572,6 +613,22 @@ local function config2_network(p) --end end end + + -- Handle global nameservers from services section + if obj["services"] then + local dns_servers = {} + for _, service in pairs(obj["services"]) do + if service["type"] == "dns" then + table.insert(dns_servers, service["address"]) + end + end + if #dns_servers > 0 then + -- Use nameservers() function for global services + local nameserver_config = {addresses = dns_servers} + nameservers(nil, nameserver_config) + end + end + if #ipv4 > 0 then routing:write('static_routes="') routing:write(table.concat(ipv4, " ") .. '"\n') @@ -609,84 +666,104 @@ local function parse_network_config() return netobj end -if citype == "config-2" then - local parser = ucl.parser() - local res, err = parser:parse_file(ni_path .. "/meta_data.json") +local function load_metadata(citype) + if citype == "config-2" then + local parser = ucl.parser() + local res, err = parser:parse_file(ni_path .. "/meta_data.json") - if not res then - nuage.err("error parsing config-2 meta_data.json: " .. err) - end - local obj = parser:get_object() - if obj.public_keys then - local homedir = nuage.adduser(default_user) - for _,v in pairs(obj.public_keys) do - nuage.addsshkey(homedir, v) + if not res then + nuage.err("error parsing config-2 meta_data.json: " .. err) end + local obj = parser:get_object() + + return obj + elseif citype == "nocloud" then + local f, err = io.open(ni_path .. "/meta-data") + if err then + nuage.err("error parsing nocloud meta-data: " .. err) + end + local obj = yaml.load(f:read("*a")) + f:close() + if not obj then + nuage.err("error parsing nocloud meta-data") + end + return obj + elseif citype ~= "postnet" then + nuage.err("Unknown cloud init type: " .. citype) end - nuage.sethostname(obj["hostname"]) + return {} +end - -- network - config2_network(ni_path) -elseif citype == "nocloud" then - local f, err = io.open(ni_path .. "/meta-data") - if err then - nuage.err("error parsing nocloud meta-data: " .. err) +local function load_userdata() + local ud = nil + local f = nil + local userdatas = {"user-data", "user_data"} + for _, v in pairs(userdatas) do + f = io.open(ni_path .. "/" .. v, "r") + if f then + ud = v + break + end end - local obj = yaml.load(f:read("*a")) - f:close() - if not obj then - nuage.err("error parsing nocloud meta-data") + if not f then + return nil, nil end - local hostname = obj["local-hostname"] - if not hostname then - hostname = obj["hostname"] + local line = f:read("*l") + if not line or #string.gsub(line, "^%s*(.-)%s*$", "%1") == 0 then + f:close() + return end - if hostname then - nuage.sethostname(hostname) + if citype ~= "postnet" then + local content = f:read("*a") + if not content or #string.gsub(content, "^%s*(.-)%s*$", "%1") == 0 then + f:close() + return + end + nuage.mkdir_p(root .. "/var/cache/nuageinit") + local tof = assert(io.open(root .. "/var/cache/nuageinit/user_data", "w")) + tof:write(line .. "\n" .. content) + tof:close() end -elseif citype ~= "postnet" then - nuage.err("Unknown cloud init type: " .. citype) -end + f:close() --- deal with user-data -local ud = nil -local f = nil -local userdatas = {"user-data", "user_data"} -for _, v in pairs(userdatas) do - f = io.open(ni_path .. "/" .. v, "r") - if f then - ud = v - break + local obj = nil + if ud then + f = io.open(ni_path .. "/" .. ud) + obj = yaml.load(f:read("*a")) + f:close() + if not obj then + nuage.err("error parsing cloud-config file: " .. ud) + end end + return line, obj end -if not f then - os.exit(0) -end -local line = f:read("*l") -if not line or #string.gsub(line, "^%s*(.-)%s*$", "%1") == 0 then - f:close() - os.exit(0) + +if citype == "config-2" then + -- network + config2_network(ni_path) end -if citype ~= "postnet" then - local content = f:read("*a") - if not content or #string.gsub(content, "^%s*(.-)%s*$", "%1") == 0 then - f:close() - os.exit(0) + +local metadata = load_metadata(citype) +local line, obj = load_userdata() + +-- No user-data +if line == nil then + local calls_table = { + sethostname, + create_default_user, + } + + for i = 1, #calls_table do + calls_table[i](obj, metadata) end - nuage.mkdir_p(root .. "/var/cache/nuageinit") - local tof = assert(io.open(root .. "/var/cache/nuageinit/user_data", "w")) - tof:write(line .. "\n" .. content) - tof:close() -end -f:close() -if line == "#cloud-config" then +-- YAML user-data +elseif line == "#cloud-config" then local pre_network_calls = { sethostname, settimezone, groups, create_default_user, ssh_keys, - ssh_authorized_keys, network_config, ssh_pwauth, runcmd, @@ -700,13 +777,6 @@ if line == "#cloud-config" then write_files_deferred, } - f = io.open(ni_path .. "/" .. ud) - local obj = yaml.load(f:read("*a")) - f:close() - if not obj then - nuage.err("error parsing cloud-config file: " .. ud) - end - local calls_table = pre_network_calls if citype == "postnet" then calls_table = post_network_calls @@ -717,7 +787,7 @@ if line == "#cloud-config" then local netobj = parse_network_config() or obj network_config(netobj) else - calls_table[i](obj) + calls_table[i](obj, metadata) end end elseif line:sub(1, 2) == "#!" then diff --git a/libexec/nuageinit/nuageinit.7 b/libexec/nuageinit/nuageinit.7 index 445902ccf2c0..35e1d6024105 100644 --- a/libexec/nuageinit/nuageinit.7 +++ b/libexec/nuageinit/nuageinit.7 @@ -3,7 +3,7 @@ .\" Copyright (c) 2025 Baptiste Daroussin <bapt@FreeBSD.org> .\" Copyright (c) 2025 Jesús Daniel Colmenares Oviedo <dtxdf@FreeBSD.org> .\" -.Dd June 26, 2025 +.Dd January 6, 2026 .Dt NUAGEINIT 7 .Os .Sh NAME @@ -117,6 +117,8 @@ file supports the following keys: Array of network interfaces to be configured. .It Ic networks Array of network configurations to be set. +.It Ic services +Array of service configurations to be set (e.g: DNS). .El .El .Pp @@ -148,7 +150,7 @@ is not set. Sets the system timezone based on the value provided. .Pp See also -.Xr tzfile 3 Ns . +.Xr tzfile 5 . .It Ic groups An array of strings or objects to be created: .Bl -bullet @@ -189,7 +191,7 @@ Specifying the following parameters from a file named takes precedence over their specification from the .Ic network parameter of -.Pa user-data Ns . +.Pa user-data . .Bl -tag -width "ethernets" .It Ic ethernets Mapping representing a generic configuration for existing network interfaces. @@ -200,10 +202,11 @@ rule is specified. If .Sy match rules are specified, an arbitrary name can be used -.Po e.g.: id0 Pc Ns . +.Po e.g.: id0 Pc . .Bl -tag -width "nameservers" .It Ic match -This selects a subset of available physical devices by various hardware properties. +This selects a subset of available physical devices by various hardware +properties. The following configuration will then apply to all matching devices, as soon as they appear. All specified properties must match. @@ -211,7 +214,7 @@ The following properties for creating matches are supported: .Bl -tag -width "macaddress" .It Ic macaddress -.No Device's MAC address in the form Sy xx:xx:xx:xx:xx:xx Ns . +.No Device's MAC address in the form Sy xx:xx:xx:xx:xx:xx . Letters should be lowercase. .It Ic name Current interface name. @@ -222,8 +225,8 @@ Lua pattern-natching expressions are supported. .El .It Ic set-name -When matching on unique properties such as MAC, match rules can be written so that they -match only one device. +When matching on unique properties such as MAC, match rules can be written so +that they match only one device. Then this property can be used to give that device a more specific/desirable/nicer name than the default. .Pp @@ -231,8 +234,8 @@ While multiple properties can be used in a match, .Sy macaddress is required for nuageinit to perform the rename. .It Ic mtu -The MTU key represents a device's Maximum Transmission Unit, the largest size packet -or frame. +The MTU key represents a device's Maximum Transmission Unit, the largest size +packet or frame. .It Ic wakeonlan Enable wake on LAN. Off by default. @@ -250,16 +253,16 @@ This requires setting .Sy addresses too. .Pp -Since only one default router can be configured at a time, this parameter is applied -when processing the first entry, and any others are silently ignored. +Since only one default router can be configured at a time, this parameter is +applied when processing the first entry, and any others are silently ignored. .It Ic gateway6 Set default gateway for IPv6, for manual address configuration. This requires setting .Sy addresses too. .Pp -Since only one default router can be configured at a time, this parameter is applied -when processing the first entry, and any others are silently ignored. +Since only one default router can be configured at a time, this parameter is +applied when processing the first entry, and any others are silently ignored. .It Ic nameservers Set DNS servers and search domains, for manual address configuration. .Pp @@ -314,13 +317,21 @@ A string or an array of strings which should be appended to .Pa ${LOCALBASE}/etc/doas.conf .Pp Instead of hardcoding the username, you can use -.Sy %u Ns , +.Sy %u , which will be replaced by the current username. .El .Pp A special case exist: if the entry is a simple string with the value .Qq default , then the default user is created. +Configuring +.Nm sudo +or +.Nm doas +does not automatically install them. +Ensure the relevant command is listed in your +.Nm packages +section. .It Ic chpasswd Change the passwords for users, it accepts the following keys: .Bl -tag -width "expire" @@ -395,6 +406,7 @@ users: packages: - neovim - git-lite + - sudo package_update: true package_upgrade: true runcmd: diff --git a/libexec/nuageinit/tests/nuageinit.sh b/libexec/nuageinit/tests/nuageinit.sh index 851f7110378a..3a01413f8487 100644 --- a/libexec/nuageinit/tests/nuageinit.sh +++ b/libexec/nuageinit/tests/nuageinit.sh @@ -59,6 +59,7 @@ args_body() nocloud_body() { mkdir -p media/nuageinit + setup_test_adduser atf_check -s exit:1 -e match:"nuageinit: error parsing nocloud.*" /usr/libexec/nuageinit "${PWD}"/media/nuageinit/ nocloud printf "instance-id: iid-local01\nlocal-hostname: cloudimg\n" > "${PWD}"/media/nuageinit/meta-data atf_check -s exit:0 /usr/libexec/nuageinit "${PWD}"/media/nuageinit nocloud @@ -220,6 +221,7 @@ EOF config2_body() { mkdir -p media/nuageinit + setup_test_adduser atf_check -s exit:1 -e match:"nuageinit: error parsing config-2 meta_data.json:.*" /usr/libexec/nuageinit "${PWD}"/media/nuageinit config-2 printf "{}" > media/nuageinit/meta_data.json atf_check /usr/libexec/nuageinit "${PWD}"/media/nuageinit config-2 @@ -335,6 +337,7 @@ EOF config2_network_body() { mkdir -p media/nuageinit + setup_test_adduser printf "{}" > media/nuageinit/meta_data.json mynetworks=$(ifconfig -l ether) if [ -z "$mynetworks" ]; then @@ -401,6 +404,7 @@ EOF config2_network_static_v4_body() { mkdir -p media/nuageinit + setup_test_adduser printf "{}" > media/nuageinit/meta_data.json mynetworks=$(ifconfig -l ether) if [ -z "$mynetworks" ]; then diff --git a/libexec/rtld-elf/rtld-libc/Makefile.inc b/libexec/rtld-elf/rtld-libc/Makefile.inc index a10bd562a7ce..6cc33777f78f 100644 --- a/libexec/rtld-elf/rtld-libc/Makefile.inc +++ b/libexec/rtld-elf/rtld-libc/Makefile.inc @@ -69,7 +69,7 @@ _libc_other_objects+=aeabi_unwind_cpp .elif ${LIBC_ARCH} == "i386" # i386 needs i386_set_gsbase for allocate_initial_tls() _libsys_other_objects+=i386_set_gsbase -.elif ${LIBC_ARCH} == "powerpc" || ${LIBC_ARCH} == "powerpcspe" +.elif ${LIBC_ARCH} == "powerpc" # ppc needs __syncicache and abs for reloc.c _libc_other_objects+=syncicache abs .elif ${LIBC_ARCH} == "powerpc64" diff --git a/release/Makefile b/release/Makefile index fc91b31df579..bcc640075bf0 100644 --- a/release/Makefile +++ b/release/Makefile @@ -40,7 +40,7 @@ # TARGET/TARGET_ARCH: architecture of built release # -WORLDDIR?= ${.CURDIR}/.. +WORLDDIR?= ${.CURDIR:H} PORTSDIR?= /usr/ports .include "${WORLDDIR}/share/mk/bsd.compat.pre.mk" @@ -62,7 +62,7 @@ DISTDIR= dist # Define OSRELEASE by using newvers.sh .if !defined(OSRELEASE) || empty(OSRELEASE) .for _V in TYPE BRANCH REVISION -${_V}!= eval $$(awk '/^${_V}=/{print}' ${.CURDIR}/../sys/conf/newvers.sh); echo $$${_V} +${_V}!= eval $$(awk '/^${_V}=/{print}' ${.CURDIR:H}/sys/conf/newvers.sh); echo $$${_V} .endfor .for _V in ${TARGET_ARCH} .if !empty(TARGET:M${_V}) @@ -278,7 +278,6 @@ disc1: .endif # Set up installation environment ln -fs /tmp/bsdinstall_etc/resolv.conf ${.TARGET}/etc/resolv.conf - echo sendmail_enable=\"NONE\" > ${.TARGET}/etc/rc.conf echo hostid_enable=\"NO\" >> ${.TARGET}/etc/rc.conf echo debug.witness.trace=0 >> ${.TARGET}/etc/sysctl.conf echo vfs.mountroot.timeout=\"10\" >> ${.TARGET}/boot/loader.conf @@ -323,7 +322,6 @@ bootonly: .endif # Set up installation environment ln -fs /tmp/bsdinstall_etc/resolv.conf ${.TARGET}/etc/resolv.conf - echo sendmail_enable=\"NONE\" > ${.TARGET}/etc/rc.conf echo hostid_enable=\"NO\" >> ${.TARGET}/etc/rc.conf echo debug.witness.trace=0 >> ${.TARGET}/etc/sysctl.conf echo vfs.mountroot.timeout=\"10\" >> ${.TARGET}/boot/loader.conf @@ -382,7 +380,6 @@ dvd: .endif # Set up installation environment ln -fs /tmp/bsdinstall_etc/resolv.conf ${.TARGET}/etc/resolv.conf - echo sendmail_enable=\"NONE\" > ${.TARGET}/etc/rc.conf echo hostid_enable=\"NO\" >> ${.TARGET}/etc/rc.conf echo debug.witness.trace=0 >> ${.TARGET}/etc/sysctl.conf echo vfs.mountroot.timeout=\"10\" >> ${.TARGET}/boot/loader.conf diff --git a/release/Makefile.vm b/release/Makefile.vm index 142fd6e7bdf5..3e5f4936b518 100644 --- a/release/Makefile.vm +++ b/release/Makefile.vm @@ -73,7 +73,7 @@ CLOUDWARE?= ${CLOUDWARE_GEN} .for _V in TYPE BRANCH REVISION . if !defined(${_V}) || empty(${_V}) -${_V}!= eval $$(awk '/^${_V}=/{print}' ${.CURDIR}/../sys/conf/newvers.sh); echo $$${_V} +${_V}!= eval $$(awk '/^${_V}=/{print}' ${.CURDIR:H}/sys/conf/newvers.sh); echo $$${_V} . endif .endfor diff --git a/release/packages/ucl/zstd-all.ucl b/release/packages/ucl/zstd-all.ucl new file mode 100644 index 000000000000..ada125444b68 --- /dev/null +++ b/release/packages/ucl/zstd-all.ucl @@ -0,0 +1,30 @@ +/* + * SPDX-License-Identifier: ISC + * + * Copyright (c) 2025 Lexi Winter <ivy@FreeBSD.org> + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +comment = "Fast, lossless compression algorithm" + +desc = <<EOD +Zstandard, also called zstd, is a fast data compression algorithm developed +by Meta Platforms, Inc. and standardised by the IETF in RFC 8478. Zstd is +designed to offer a compression ratio comparable to DEFLATE (zlib), but with +performance suitable for real-time compression applications. +EOD + +annotations { + set = "minimal,minimal-jail" +} diff --git a/release/powerpc/powerpcspe.conf b/release/powerpc/powerpcspe.conf deleted file mode 100644 index 955287f94e3c..000000000000 --- a/release/powerpc/powerpcspe.conf +++ /dev/null @@ -1,9 +0,0 @@ -#!/bin/sh -# -# - -# Configuration file for release/release.sh to build powerpc/powerpcspe. - -TARGET="powerpc" -TARGET_ARCH="powerpcspe" -KERNEL="MPC85XXSPE" diff --git a/release/tools/arm.subr b/release/tools/arm.subr index 5c5ebd29681d..05436b4f00f6 100644 --- a/release/tools/arm.subr +++ b/release/tools/arm.subr @@ -98,7 +98,7 @@ arm_create_user() { chroot ${CHROOTDIR} /usr/sbin/pw -R ${DESTDIR} \ useradd freebsd \ -m -M 0755 -w yes -n freebsd -u 1001 -g 1001 -G 0 \ - -c 'FreeBSD User' -d '/home/freebsd' -s '/bin/csh' + -c 'FreeBSD User' -d '/home/freebsd' -s '/bin/sh' chroot ${CHROOTDIR} /usr/sbin/pw -R ${DESTDIR} \ usermod root -w yes @@ -209,10 +209,6 @@ arm_install_base() { echo "hostname=\"${hostname}\"" > ${CHROOTDIR}/${DESTDIR}/etc/rc.conf echo 'ifconfig_DEFAULT="DHCP inet6 accept_rtadv"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf echo 'sshd_enable="YES"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf - echo 'sendmail_enable="NONE"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf - echo 'sendmail_submit_enable="NO"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf - echo 'sendmail_outbound_enable="NO"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf - echo 'sendmail_msp_queue_enable="NO"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf echo 'growfs_enable="YES"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf if [ -n "${CONFIG_POWERD_ENABLE}" ]; then echo 'powerd_enable="YES"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf diff --git a/release/tools/gce.conf b/release/tools/gce.conf index 558641821b16..7298aabf3956 100644 --- a/release/tools/gce.conf +++ b/release/tools/gce.conf @@ -39,7 +39,7 @@ vm_extra_pre_umount() { # Enable growfs on every boot, not only the first, as as instance's disk can # be enlarged post-creation - sed -i -e '/KEYWORD: firstboot/d' /etc/rc.d/growfs + sed -i -e '/KEYWORD: firstboot/d' ${DESTDIR}/etc/rc.d/growfs cat << EOF >> ${DESTDIR}/etc/rc.conf dumpdev="AUTO" @@ -56,10 +56,12 @@ beastie_disable="YES" loader_logo="none" hw.memtest.tests="0" console="comconsole,vidconsole" -hw.vtnet.mq_disable=1 kern.timecounter.hardware=ACPI-safe aesni_load="YES" nvme_load="YES" + +# Required for arm64. +hw.pci.honor_msi_blacklist=0 EOF metalog_add_data ./boot/loader.conf diff --git a/release/tools/openstack.conf b/release/tools/openstack.conf index b73734a4fd04..9ce65a75c3c5 100644 --- a/release/tools/openstack.conf +++ b/release/tools/openstack.conf @@ -22,12 +22,6 @@ vm_extra_pre_umount() { # Allow root to ssh using keys echo 'PermitRootLogin without-password' >> ${DESTDIR}/etc/ssh/sshd_config - # Disable sendmail - echo 'sendmail_enable="NO"' >> ${DESTDIR}/etc/rc.conf - echo 'sendmail_submit_enable="NO"' >> ${DESTDIR}/etc/rc.conf - echo 'sendmail_outbound_enable="NO"' >> ${DESTDIR}/etc/rc.conf - echo 'sendmail_msp_queue_enable="NO"' >> ${DESTDIR}/etc/rc.conf - # Enable DHCP for the OpenStack instance echo 'ifconfig_DEFAULT="SYNCDHCP"' >> ${DESTDIR}/etc/rc.conf diff --git a/release/tools/oracle.conf b/release/tools/oracle.conf index 152c48af1829..b289f4e4e7e7 100644 --- a/release/tools/oracle.conf +++ b/release/tools/oracle.conf @@ -55,7 +55,6 @@ MISSING_METALOGS=" vm_extra_pre_umount() { cat <<-'EOF' >> ${DESTDIR}/etc/rc.conf dumpdev=AUTO - sendmail_enable=NONE EOF cat <<-'EOF' >> ${DESTDIR}/boot/loader.conf diff --git a/release/tools/vagrant.conf b/release/tools/vagrant.conf index 5b0f38b740a6..37eff7a899ab 100644 --- a/release/tools/vagrant.conf +++ b/release/tools/vagrant.conf @@ -33,19 +33,13 @@ vagrant_common () { # Disable DNS lookups by default to make SSH connect quickly echo 'UseDNS no' >> ${DESTDIR}/etc/ssh/sshd_config - # Disable sendmail - echo 'sendmail_enable="NO"' >> ${DESTDIR}/etc/rc.conf - echo 'sendmail_submit_enable="NO"' >> ${DESTDIR}/etc/rc.conf - echo 'sendmail_outbound_enable="NO"' >> ${DESTDIR}/etc/rc.conf - echo 'sendmail_msp_queue_enable="NO"' >> ${DESTDIR}/etc/rc.conf - # Create the vagrant user with a password of vagrant /usr/sbin/pw -R ${DESTDIR} \ groupadd vagrant -g 1001 /usr/sbin/pw -R ${DESTDIR} -M ${DESTDIR}/METALOG \ useradd vagrant \ -m -M 0755 -w yes -n vagrant -u 1001 -g 1001 -G 0 \ - -c 'Vagrant User' -d '/home/vagrant' -s '/bin/csh' + -c 'Vagrant User' -d '/home/vagrant' -s '/bin/sh' # Change root's password to vagrant echo 'vagrant' | /usr/sbin/pw -R ${DESTDIR} usermod root -h 0 diff --git a/sbin/ipfw/ipfw.8 b/sbin/ipfw/ipfw.8 index 7a81c84de3e4..867a43868ecc 100644 --- a/sbin/ipfw/ipfw.8 +++ b/sbin/ipfw/ipfw.8 @@ -1,5 +1,5 @@ .\" -.Dd December 10, 2025 +.Dd December 29, 2025 .Dt IPFW 8 .Os .Sh NAME @@ -104,6 +104,11 @@ in-kernel NAT.\& .Cm config .Ar config-options .Nm +.Op Fl q +.Cm nat +.Ar number +.Cm delete +.Nm .Cm nat .Ar number .Cm show @@ -839,8 +844,12 @@ When a packet matches a rule with the .Cm setmark keyword, a 32-bit numeric mark is assigned to the packet. The mark is an extension to the tags. -As tags, mark is "sticky" so the value is kept the same within the kernel and -is lost when the packet leaves the kernel. +The mark is preserved for a packet within a single ipfw ruleset traversal +and is lost when the packet is checked against the active ruleset +next time (see +.Sx PACKET FLOW +section) or leaves ipfw context (e.g. accepted, +diverted, bridged or routed). Unlike tags, mark can be matched as a lookup table key or compared with bitwise mask applied against another value. Each packet can have only one mark, so @@ -3507,6 +3516,15 @@ For more information about aliasing modes, refer to See Section .Sx EXAMPLES for some examples of nat usage. +.Pp +To delete specific nat configuration instance, use the following command: +.Bd -ragged -offset indent +.Bk -words +.Cm nat +.Ar nat_number +.Cm delete +.Ek +.Ed .Ss REDIRECT AND LSNAT SUPPORT IN IPFW Redirect and LSNAT support follow closely the syntax used in .Xr natd 8 . diff --git a/sbin/pfctl/pfctl_radix.c b/sbin/pfctl/pfctl_radix.c index 3ea127dd2451..e8d3a1b8dcc3 100644 --- a/sbin/pfctl/pfctl_radix.c +++ b/sbin/pfctl/pfctl_radix.c @@ -201,23 +201,13 @@ int pfr_clr_astats(struct pfr_table *tbl, struct pfr_addr *addr, int size, int *nzero, int flags) { - struct pfioc_table io; + int ret; - if (size < 0 || !tbl || (size && !addr)) { - errno = EINVAL; - return (-1); - } - bzero(&io, sizeof io); - io.pfrio_flags = flags; - io.pfrio_table = *tbl; - io.pfrio_buffer = addr; - io.pfrio_esize = sizeof(*addr); - io.pfrio_size = size; - if (ioctl(dev, DIOCRCLRASTATS, &io) == -1) - return (-1); - if (nzero) - *nzero = io.pfrio_nzero; - return (0); + ret = pfctl_clr_astats(pfh, tbl, addr, size, nzero, flags); + if (ret != 0) + errno = ret; + + return (ret); } int diff --git a/share/examples/etc/make.conf b/share/examples/etc/make.conf index 93c611557cb6..61bc132bad57 100644 --- a/share/examples/etc/make.conf +++ b/share/examples/etc/make.conf @@ -47,7 +47,12 @@ # cortex-a7, cortex-a8, cortex-a9, cortex-a12, # cortex-a15, cortex-a17 # ARM64 architecture: cortex-a53, cortex-a57, cortex-a72, -# exynos-m1 +# exynos-m1 +# POWER / PowerPC architecture: +# (POWER CPUs) power5, power5x, power6, power6x, power7, power8, +# power9, power10, power11 +# (PowerPC CPUs) g5, 970, e5500 +# # # (?= allows to buildworld for a different CPUTYPE.) # diff --git a/share/man/man4/Makefile b/share/man/man4/Makefile index 5ee6eedd89ee..23bb8495975b 100644 --- a/share/man/man4/Makefile +++ b/share/man/man4/Makefile @@ -1009,6 +1009,7 @@ _ccd.4= ccd.4 .if ${MK_CDDL} != "no" _dtrace_provs= dtrace_audit.4 \ dtrace_callout_execute.4 \ + dtrace_cam.4 \ dtrace_dtrace.4 \ dtrace_fbt.4 \ dtrace_io.4 \ diff --git a/share/man/man4/cpuctl.4 b/share/man/man4/cpuctl.4 index fc42cf14f254..5846fc4129f8 100644 --- a/share/man/man4/cpuctl.4 +++ b/share/man/man4/cpuctl.4 @@ -1,3 +1,6 @@ +.\" +.\" SPDX-License-Identifier: BSD-2-Clause +.\" .\" Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org> .\" All rights reserved. .\" @@ -63,7 +66,7 @@ All of the supported operations are invoked using the .Xr ioctl 2 system call. Currently, the following ioctls are defined: -.Bl -tag -width CPUCTL_CPUID_COUNT +.Bl -tag -width indent .It Dv CPUCTL_RDMSR Fa cpuctl_msr_args_t *args .It Dv CPUCTL_WRMSR Fa cpuctl_msr_args_t *args Read/write CPU machine specific register. @@ -92,6 +95,7 @@ typedef struct { uint32_t data[4]; } cpuctl_cpuid_args_t; .Ed +.Pp It is equivalent to the .Dv CPUCTL_CPUID_COUNT request with @@ -107,6 +111,7 @@ typedef struct { uint32_t data[4]; } cpuctl_cpuid_count_args_t; .Ed +.Pp The .Va level field indicates the CPUID level to retrieve, diff --git a/share/man/man4/cxgbe.4 b/share/man/man4/cxgbe.4 index 77465a3ae590..c401deea9577 100644 --- a/share/man/man4/cxgbe.4 +++ b/share/man/man4/cxgbe.4 @@ -29,12 +29,12 @@ .\" .\" * Other names and brands may be claimed as the property of others. .\" -.Dd September 29, 2025 +.Dd December 17, 2025 .Dt CXGBE 4 .Os .Sh NAME .Nm cxgbe -.Nd "Chelsio T4-, T5-, and T6-based 100Gb, 40Gb, 25Gb, 10Gb, and 1Gb Ethernet adapter driver" +.Nd Chelsio T7, T6, T5, and T4 based 1Gb to 400Gb Ethernet driver .Sh SYNOPSIS To compile this driver into the kernel, place the following lines in your @@ -47,20 +47,22 @@ To load the driver as a module at boot time, place the following lines in .Xr loader.conf 5 : .Bd -literal -offset indent -t4fw_cfg_load="YES" -t5fw_cfg_load="YES" +t7fw_cfg_load="YES" t6fw_cfg_load="YES" +t5fw_cfg_load="YES" +t4fw_cfg_load="YES" if_cxgbe_load="YES" .Ed .Sh DESCRIPTION The .Nm driver provides support for PCI Express Ethernet adapters based on -the Chelsio Terminator 4, Terminator 5, and Terminator 6 ASICs (T4, T5, and T6). +the Chelsio Terminator 7, Terminator 6, Terminator 5, and Terminator 4 +ASICs (T7, T6, T5, and T4). The driver supports Jumbo Frames, Transmit/Receive checksum offload, TCP segmentation offload (TSO), Large Receive Offload (LRO), VLAN -tag insertion/extraction, VLAN checksum offload, VLAN TSO, VXLAN checksum -offload, VXLAN TSO, and Receive Side Steering (RSS). +tag insertion/extraction, VLAN checksum offload, VLAN TSO, +VXLAN checksum offload, VXLAN TSO, and Receive Side Steering (RSS). For further hardware information and questions related to hardware requirements, see .Pa http://www.chelsio.com/ . @@ -70,10 +72,10 @@ The driver uses different names for devices based on the associated ASIC: .Bl -column -offset indent "ASIC" "Port Name" "Parent Device" .It Sy ASIC Ta Sy Port Name Ta Sy Parent Device Ta Sy Virtual Interface -.It T4 Ta cxgbe Ta t4nex Ta vcxgbe -.It T5 Ta cxl Ta t5nex Ta vcxl -.It T6 Ta cc Ta t6nex Ta vcc .It T7 Ta che Ta chnex Ta vche +.It T6 Ta cc Ta t6nex Ta vcc +.It T5 Ta cxl Ta t5nex Ta vcxl +.It T4 Ta cxgbe Ta t4nex Ta vcxgbe .El .Pp Loader tunables with the hw.cxgbe prefix apply to all cards. @@ -89,6 +91,42 @@ For more information on configuring this device, see .Sh HARDWARE The .Nm +driver supports +400Gb, 200Gb, 50Gb, and 10Gb Ethernet adapters based on the T7 ASIC: +.Pp +.Bl -bullet -compact +.It +Chelsio S71400 +.It +Chelsio S72200 +.It +Chelsio S72200-OCP +.It +Chelsio T72200 +.It +Chelsio T72200-DPU +.It +Chelsio T72200-FH +.It +Chelsio T72200-FH-DPU +.It +Chelsio T72200-OCP +.It +Chelsio S7450-DPU +.It +Chelsio S7450-OCP +.It +Chelsio T71200-iNIC +.It +Chelsio T7250 +.It +Chelsio T7210-BT +.It +Chelsio T7410-BT-OCP +.El +.Pp +The +.Nm driver supports 100Gb and 25Gb Ethernet adapters based on the T6 ASIC: .Pp .Bl -bullet -compact diff --git a/share/man/man4/dtrace_cam.4 b/share/man/man4/dtrace_cam.4 new file mode 100644 index 000000000000..e5b7ae34c391 --- /dev/null +++ b/share/man/man4/dtrace_cam.4 @@ -0,0 +1,42 @@ +.\" Copyright (c) 2026 Netflix, Inc +.\" +.\" SPDX-License-Identifier: BSD-2-Clause +.\" +.Dd December 26, 2025 +.Dt DTRACE_CAM 4 +.Os +.Sh NAME +.Nm dtrace_cam +.Nd a DTrace provider for tracing events related to CAM +.Sh SYNOPSIS +.Fn cam::xpt:action "union ccb *ccn" +.Fn cam::xpt:done "union ccb *ccb" +.Fn cam::xpt:async-cb "void *cbarg" "uint32_t async_code" "struct cam_path *path" "void *async_Arg" +.Sh DESCRIPTION +The +.Nm cam +provider allows the tracing of CAM events. +The +.Fn cam::xpt_action +probe fires when a CAM Control Block (ccb) is submitted to a CAM SIM driver. +The +.Fn cam::xpt:done +probe fires when that request completes. +The +.Fn cam::xpt:async-cb +probe fires just before an async callback is called. +.Sh ARGUMENTS +.Sh FILES +.Sh EXAMPLES +.Sh SEE ALSO +.Xr dtrace 1 , +.Xr SDT 9 +.Sh HISTORY +The +.Nm cam +provider first appeared in +.Fx +15.1 and 16.0. +.Sh AUTHORS +This manual page was written by +.An Warner Losh Aq Mt imp@FreeBSD.org . diff --git a/share/man/man4/genet.4 b/share/man/man4/genet.4 index 665aaff49507..1de92294ee9d 100644 --- a/share/man/man4/genet.4 +++ b/share/man/man4/genet.4 @@ -1,3 +1,6 @@ +.\" +.\" SPDX-License-Identifier: BSD-2-Clause +.\" .\" Copyright (c) 2021 Michael J. Karels .\" .\" Redistribution and use in source and binary forms, with or without @@ -22,7 +25,7 @@ .\" SUCH DAMAGE. .\" .Dd December 8, 2021 -.Dt GENET 4 +.Dt GENET 4 aarch64 .Os .Sh NAME .Nm genet diff --git a/share/man/man4/iflib.4 b/share/man/man4/iflib.4 index 2040698f0087..349fa402d319 100644 --- a/share/man/man4/iflib.4 +++ b/share/man/man4/iflib.4 @@ -1,4 +1,4 @@ -.Dd August 20, 2025 +.Dd January 7, 2026 .Dt IFLIB 4 .Os .Sh NAME @@ -94,6 +94,22 @@ If set to a non-zero value, task returns immediately and the transmit ring is serviced by a different task. This returns control to the caller faster and under high receive load, may result in fewer dropped RX frames. +.It Va tx_defer_mfree +Controls the threshold in packets before iflib will free the memory +(mbufs) for the packets that it has transmitted. +When this is nonzero, mbufs will be freed outside the transmit lock. +Setting this can reduce lock contention and CPU use when using simple_tx. +Note that this applies only when simple_tx is enabled. +.It Va tx_reclaim_thresh +Controls the threshold in packets before iflib will ask the driver +how many transmitted packets can be reclaimed. +Determining how many many packets can be reclaimed can be expensive +on some drivers. +.It Va tx_reclaim_ticks +Controls the time in ticks before iflib will ask the driver +how many transmitted packets can be reclaimed. +Determining how many many packets can be reclaimed can be expensive +on some drivers. .It Va rx_budget Sets the maximum number of frames to be received at a time. Zero (the default) indicates the default (currently 16) should be used. diff --git a/share/man/man4/jedec_dimm.4 b/share/man/man4/jedec_dimm.4 index 30e89b0afd0c..db11931ee183 100644 --- a/share/man/man4/jedec_dimm.4 +++ b/share/man/man4/jedec_dimm.4 @@ -24,7 +24,7 @@ .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. .\" -.Dd April 25, 2023 +.Dd January 2, 2026 .Dt JEDEC_DIMM 4 .Os .Sh NAME @@ -167,6 +167,10 @@ dev.jedec_dimm.6.serial: 0c4c46ad dev.jedec_dimm.6.temp: 43.1C dev.jedec_dimm.6.type: DDR4 .Ed +.Pp +You can use +.Xr smbmsg 8 +to probe for devices. .Sh COMPATIBILITY .Nm implements a superset of the functionality of the now-deleted diff --git a/share/man/man4/linuxkpi_wlan.4 b/share/man/man4/linuxkpi_wlan.4 index 136e04c32bb7..65c77d8d7631 100644 --- a/share/man/man4/linuxkpi_wlan.4 +++ b/share/man/man4/linuxkpi_wlan.4 @@ -6,7 +6,7 @@ .\" This documentation was written by Bj\xc3\xb6rn Zeeb under sponsorship from .\" the FreeBSD Foundation. .\" -.Dd June 13, 2025 +.Dd December 28, 2025 .Dt LINUXKPI_WLAN 4 .Os .Sh NAME @@ -112,6 +112,13 @@ Print statistics for a given, associated .Xr wlan 4 interface; typically IF would be .Em wlan0 . +.It Va compat.linuxkpi.80211.IF.dump_stas_queues +Like +.Va compat.linuxkpi.80211.IF.dump_stas +but also print queue statistics. +This sysctl is +.Sq hidden +and normally only needed for debugging purposes. .El .Sh SEE ALSO .Xr iwlwifi 4 , diff --git a/share/man/man4/mfi.4 b/share/man/man4/mfi.4 index 4a55467d81f2..6b660c4cd744 100644 --- a/share/man/man4/mfi.4 +++ b/share/man/man4/mfi.4 @@ -109,6 +109,8 @@ Dell PERC5 .It Dell PERC6 .It +Fujitsu RAID Controller SAS 6Gbit/s 1GB (D3116) +.It IBM ServeRAID M1015 SAS/SATA .It IBM ServeRAID M1115 SAS/SATA diff --git a/share/man/man4/mrsas.4 b/share/man/man4/mrsas.4 index 5f7a0e6e45ea..6645835d0bb2 100644 --- a/share/man/man4/mrsas.4 +++ b/share/man/man4/mrsas.4 @@ -35,7 +35,7 @@ .\" are those of the authors and should not be interpreted as representing .\" official policies, either expressed or implied, of the FreeBSD Project. .\" -.Dd August 22, 2025 +.Dd January 6, 2026 .Dt MRSAS 4 .Os .Sh NAME @@ -151,6 +151,7 @@ driver supports the following LSI/Broadcom SATA/SAS RAID controllers: .It DELL PERC H730/P Ta Invader/Fury Ta 12Gb/s .It DELL PERC H710/P Ta Thunderbolt Ta 6Gb/s .It DELL PERC H330 Ta Invader/Fury Ta 12Gb/s +.It Fujitsu D3116 Ta Thunderbolt Ta 6Gb/s .El .Sh CONFIGURATION To disable Online Controller Reset(OCR) for a specific @@ -333,7 +334,7 @@ was extended to support up to MR-Fusion .Nm is the new driver reworked by LSI which supports Thunderbolt and onward products. -The SAS+SATA RAID controller with device id 0x005b is referred to as +The SAS+SATA RAID controller with device id 0x005B is referred to as the Thunderbolt controller throughout this man page. .Ed .Bd -ragged diff --git a/share/man/man4/nvme.4 b/share/man/man4/nvme.4 index dcd2ec86f5fa..76960a7e06c8 100644 --- a/share/man/man4/nvme.4 +++ b/share/man/man4/nvme.4 @@ -128,6 +128,27 @@ hw.nvme.hmb_max .Pp The default value is 5% of physical memory size per device. .Pp +To enable Autonomous Power State Transition (APST), set the following +tunable value in +.Xr loader.conf 5 : +.Bd -literal -offset indent +hw.nvme.apst_enable=1 +.Ed +.Pp +The default vendor-provided settings, if any, will be applied. +To override this, set the following tunable: +.Bd -literal -offset indent +hw.nvme.apst_data +.Ed +.Pp +The string must contain up to 32 encoded integers, e.g. "0x6418 0 +0 0x3e820". +Each value corresponds to a specific available power state starting +from the lowest, and defines the target state (bits 3..7) to +transition to, as well as the idle time in milliseconds (bits 8..31) +to wait before that transition. +Bits 0..2 must be zero. +.Pp The .Xr nvd 4 driver is used to provide a disk driver to the system by default. diff --git a/share/man/man4/smartpqi.4 b/share/man/man4/smartpqi.4 index f5fab85d13bd..ef5f903fe422 100644 --- a/share/man/man4/smartpqi.4 +++ b/share/man/man4/smartpqi.4 @@ -1,4 +1,4 @@ -.\" Copyright (C) 2019-2023, Microchip Technology Inc. and its subsidiaries +.\" Copyright (C) 2019-2025, Microchip Technology Inc. and its subsidiaries .\" Copyright (C) 2016-2018, Microsemi Corporation .\" Copyright (C) 2016, PMC-Sierra, Inc. .\" Written by John Hall <john.hall@microchip.com> @@ -24,7 +24,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.Dd August 24, 2023 +.Dd August 28, 2025 .Dt SMARTPQI 4 amd64 .Os .Sh NAME @@ -48,7 +48,7 @@ smartpqi_load="YES" The .Nm driver provides support for Microchip Technology Inc. / Adaptec SmartRaid and -SmartHBA SATA/SAS/NVME PCIe controllers +SmartHBA SATA/SAS/NVMe PCIe controllers .Sh HARDWARE Controllers supported by the .Nm @@ -63,6 +63,86 @@ Adaptec SmartRaid and SmartHBA Controllers OEM Controllers based on the Microchip Technology Inc. SmartROC and SmartIOC Chipsets .El +.Sh DEBUGGING +Driver diagnostic printing is controlled in +.Xr loader.conf 5 +by using the global +.Va hw.smartpqi.debug_level +tunable. +.Pp +The +.Va debug_level +variable is set with an integer value. +The default value is 0x0060 (warn && error). +.Pp +The following levels are available: +.Bl -column "FlagXX" "NameXXXX" "Description" -offset indent +.It Em Flag Ta Em Name Ta Em Description +.It 0x0001 Ta init Ta System initialization operations +.It 0x0002 Ta info Ta Basic information +.It 0x0004 Ta function Ta Used to show function entry and exit +.It 0x0008 Ta io Ta Logging data from controller +.It 0x0010 Ta discovery Ta Device discovery +.It 0x0020 Ta warning Ta Operational warnings +.It 0x0040 Ta error Ta Parameter errors and programming bugs +.It 0x0080 Ta note Ta More detailed information +.El +.Sh DEVICE HINTS +The following tunable values can be set in +.Pa /boot/device.hints +to control the behavior of the +.Nm +driver. +These hints are specified as: +.Bd -literal -offset indent +hint.smartpqi.<unit>.<variable>=<value> +.Ed +.Pp +The supported variables are: +.Bl -tag -width ".Va aio_raid1_write_disable" +.It Va stream_disable +If set to 0, disables Stream Detection. +.Pp +Default is (enabled). +.It Va sata_unique_wwn_disable +If set to 0, disables SATA Unique World Wide Number. +.Pp +Default is (enabled). +.It Va aio_raid1_write_disable +If set to 0, disables acceleration of RAID1 writes +.Pp +Default is (enabled). +.It Va aio_raid5_write_disable +If set to 0, disables acceleration of RAID5 writes +.Pp +Default is (enabled). +.It Va aio_raid6_write_disable +If set to 0, disables acceleration of RAID6 writes +.Pp +Default is (enabled). +.It Va queue_depth +Sets queue depth for the controller. If the queue depth value +is greater than the maximum supported queue size of the driver or +controller, it will be set to the lowest size. If the queue +depth value is lower than the minimum queue depth then this will +be set to the minimum queue depth. +.Pp +Default is driver-determined. +.It Va sg_count +Sets the scatter gather (sg) count. If this sg count is greater +than maximum sg count it will be set to the maximum sg count. +If this sg count is less than minimum sg count it will be set to +the minimum sg count. +.Pp +Default is driver-determined. +.El +.Pp +For example, to disable Stream Detection on the first controller, add +the following line to +.Pa /boot/device.hints : +.Bd -literal -offset indent +hint.smartpqi.0.stream_disable="0" +.Ed .Sh FILES .Bl -tag -width /boot/kernel/smartpqi.ko -compact .It Pa /dev/smartpqi? diff --git a/share/man/man4/smbus.4 b/share/man/man4/smbus.4 index 250017defd36..c02cb4b3b176 100644 --- a/share/man/man4/smbus.4 +++ b/share/man/man4/smbus.4 @@ -60,7 +60,8 @@ between the internal SMB devices and external ACCESS bus devices. .Sh SEE ALSO .Xr iicbus 4 , .Xr iicsmb 4 , -.Xr smb 4 +.Xr smb 4 , +.Xr smbmsg 8 .Rs .%T The SMBus specification .%U http://www.smbus.org/specs/ diff --git a/share/man/man4/vt.4 b/share/man/man4/vt.4 index 6176c8c3093e..d59030cfff9d 100644 --- a/share/man/man4/vt.4 +++ b/share/man/man4/vt.4 @@ -420,7 +420,6 @@ at boot: .Xr getty 8 , .Xr kldload 8 , .Xr moused 8 , -.Xr vidcontrol 8 , .Xr vtfontcvt 8 .Sh HISTORY The diff --git a/share/man/man5/src.conf.5 b/share/man/man5/src.conf.5 index 1d55ab074a45..eaed8f9e3fb0 100644 --- a/share/man/man5/src.conf.5 +++ b/share/man/man5/src.conf.5 @@ -1,5 +1,5 @@ .\" DO NOT EDIT-- this file is @generated by tools/build/options/makeman. -.Dd December 21, 2025 +.Dd December 29, 2025 .Dt SRC.CONF 5 .Os .Sh NAME @@ -449,6 +449,14 @@ Clean before building world and/or kernel. Note that recording a new epoch in .Pa .clean_build_epoch in the root of the source tree will also force a clean world build. +When set, these options are also in effect: +.Pp +.Bl -inset -compact +.It Va WITHOUT_DEPEND_CLEANUP +(unless +.Va WITH_DEPEND_CLEANUP +is set explicitly) +.El .It Va WITHOUT_CPP Do not build .Xr cpp 1 . @@ -537,6 +545,12 @@ amd64/amd64, arm64/aarch64, i386/i386, powerpc/powerpc64 and powerpc/powerpc64le .It Va WITHOUT_DEBUG_FILES Avoid building or installing standalone debug files for each executable binary and shared library. +.It Va WITHOUT_DEPEND_CLEANUP +Do not attempt to detect if the object tree needs cleaning in part or in +whole before building. +This speeds up incremental builds, especially when experimenting with +build options, but may cause the build to inexplicably fail or produce +non-functioning binaries. .It Va WITH_DETECT_TZ_CHANGES Make the time handling code detect changes to the timezone files. .It Va WITH_DIALOG @@ -1590,6 +1604,13 @@ option. Exclude build metadata (such as the build time, user, or host) from the kernel, boot loaders, and uname output, so that builds produce bit-for-bit identical output. +.It Va WITH_REPRODUCIBLE_PATHS +Modify the paths encoded in binary artifacts to be standard path + +Normally, the actual path is encoded in the binary. However, this makes the +build differ depending on the path it was built from. With this option enabled, +the paths recorded are /usr/src, regardless of the actual path. With this option +disabled, the actual paths are recorded. .It Va WITHOUT_RESCUE Do not build .Xr rescue 8 . diff --git a/share/man/man7/environ.7 b/share/man/man7/environ.7 index 51fb6544fc5a..ada2cc45a650 100644 --- a/share/man/man7/environ.7 +++ b/share/man/man7/environ.7 @@ -114,6 +114,18 @@ A startup list of commands read by .Xr ex 1 and .Xr vi 1 . +.It Ev EXTERROR_VERBOSE +Request the +.Xr err 3 +and +.Xr uexterr_gettext +functions to unconditionally report additional information, +mostly useful for the (kernel) developer to diagnose the issue. +See +.Xr err 3 +and +.Xr exterror 9 +for more details. .It Ev HOME A user's login directory, set by .Xr login 1 @@ -298,6 +310,7 @@ built-in command in .Xr cd 1 , .Xr csh 1 , .Xr env 1 , +.Xr err 3 , .Xr ex 1 , .Xr login 1 , .Xr printenv 1 , @@ -311,7 +324,8 @@ built-in command in .Xr system 3 , .Xr termcap 3 , .Xr termcap 5 , -.Xr simd 7 +.Xr simd 7 , +.Xr exterror 9 .Sh HISTORY The .Nm diff --git a/share/man/man7/freebsd-base.7 b/share/man/man7/freebsd-base.7 index 9844d7d5063d..383808579487 100644 --- a/share/man/man7/freebsd-base.7 +++ b/share/man/man7/freebsd-base.7 @@ -206,7 +206,7 @@ pkg install FreeBSD-set-devel .Pp Apply available updates to the running system: .Bd -literal -offset indent -pkg update -r FreeBSD-base +pkg upgrade -r FreeBSD-base .Ed .Pp Install the development toolchain for FreeBSD/powerpc64le in an @@ -214,7 +214,7 @@ alternate root (for example, to support cross-compiling software for a different target than the host system): .Bd -literal -offset indent pkg -r /ppcdev -oABI=FreeBSD:16:powerpc64le \e - install -r FreeBSD-set-devel + install FreeBSD-set-devel .Ed .Sh SEE ALSO .Xr build 7 , diff --git a/share/man/man7/security.7 b/share/man/man7/security.7 index f1035fd093d5..0685da5db437 100644 --- a/share/man/man7/security.7 +++ b/share/man/man7/security.7 @@ -955,7 +955,7 @@ briefly listed there, together with controls which enable some mitigations of the hardware state leaks. .Pp Hardware mitigation sysctl knobs described below have been moved under -.Pa machdep.mitigations , +.Va machdep.mitigations , with backwards-compatibility shims to accept the existing names. A future change will rationalize the sense of the individual sysctls (so that enabled / true always indicates that the mitigation is active). @@ -965,20 +965,20 @@ Backwards compatibility shims for the interim sysctls under .Pa machdep.mitigations will not be added. .Bl -tag -width security.bsd.unprivileged_proc_debug -.It Dv security.bsd.see_other_uids +.It Va security.bsd.see_other_uids Controls visibility and reachability of subjects (e.g., processes) and objects (e.g., sockets) owned by a different uid. The knob directly affects the -.Dv kern.proc +.Va kern.proc sysctls filtering of data, which results in restricted output from utilities like .Xr ps 1 . -.It Dv security.bsd.see_other_gids +.It Va security.bsd.see_other_gids Same, for subjects and objects owned by a different gid. -.It Dv security.bsd.see_jail_proc +.It Va security.bsd.see_jail_proc Same, for subjects and objects belonging to a different jail, including sub-jails. -.It Dv security.bsd.conservative_signals +.It Va security.bsd.conservative_signals When enabled, unprivileged users are only allowed to send job control and usual termination signals like .Dv SIGKILL , @@ -986,13 +986,13 @@ and usual termination signals like and .Dv SIGTERM , to the processes executing programs with changed uids. -.It Dv security.bsd.unprivileged_proc_debug +.It Va security.bsd.unprivileged_proc_debug Controls availability of the process debugging facilities to non-root users. See also .Xr proccontrol 1 mode .Dv trace . -.It Dv vm.pmap.pti +.It Va vm.pmap.pti Tunable, amd64-only. Enables mode of operation of virtual memory system where usermode page tables are sanitized to prevent so-called Meltdown information leak on @@ -1003,25 +1003,25 @@ See also .Xr proccontrol 1 mode .Dv kpti . -.It Dv machdep.mitigations.flush_rsb_ctxsw +.It Va machdep.mitigations.flush_rsb_ctxsw amd64. Controls Return Stack Buffer flush on context switch, to prevent cross-process ret2spec attacks. Only needed, and only enabled by default, if the machine supports SMEP, otherwise IBRS would do necessary flushing on kernel entry anyway. -.It Dv hw.mds_disable +.It Va hw.mds_disable amd64 and i386. Controls Microarchitectural Data Sampling hardware information leak mitigation. -.It Dv hw.spec_store_bypass_disable +.It Va hw.spec_store_bypass_disable amd64 and i386. Controls Speculative Store Bypass hardware information leak mitigation. -.It Dv hw.ibrs_disable +.It Va hw.ibrs_disable amd64 and i386. Controls Indirect Branch Restricted Speculation hardware information leak mitigation. -.It Dv machdep.syscall_ret_flush_l1d +.It Va machdep.syscall_ret_flush_l1d amd64. Controls force-flush of L1D cache on return from syscalls which report errors other than @@ -1036,62 +1036,62 @@ This is mostly a paranoid setting added to prevent hypothetical exploitation of unknown gadgets for unknown hardware issues. The error codes exclusion list is composed of the most common errors which typically occurs on normal system operation. -.It Dv machdep.nmi_flush_l1d_sw +.It Va machdep.nmi_flush_l1d_sw amd64. Controls force-flush of L1D cache on NMI; this provides software assist for bhyve mitigation of L1 terminal fault hardware information leak. -.It Dv hw.vmm.vmx.l1d_flush +.It Va hw.vmm.vmx.l1d_flush amd64. Controls the mitigation of L1 Terminal Fault in bhyve hypervisor. -.It Dv vm.pmap.allow_2m_x_ept +.It Va vm.pmap.allow_2m_x_ept amd64. Allows the use of superpages for executable mappings under the EPT page table format used by hypervisors on Intel CPUs to map the guest physical address space to machine physical memory. May be disabled to work around a CPU Erratum called Machine Check Error Avoidance on Page Size Change. -.It Dv machdep.mitigations.rngds.enable +.It Va machdep.mitigations.rngds.enable amd64 and i386. Controls mitigation of Special Register Buffer Data Sampling versus optimization of the MCU access. When set to zero, the mitigation is disabled, and the RDSEED and RDRAND instructions do not incur serialization overhead for shared buffer accesses, and do not serialize off-core memory accesses. -.It Dv kern.elf32.aslr.enable +.It Va kern.elf32.aslr.enable Controls system-global Address Space Layout Randomization (ASLR) for normal non-PIE (Position Independent Executable) 32-bit ELF binaries. See also the .Xr proccontrol 1 .Dv aslr mode, also affected by the per-image control note flag. -.It Dv kern.elf32.aslr.pie_enable +.It Va kern.elf32.aslr.pie_enable Controls system-global Address Space Layout Randomization for position-independent (PIE) 32-bit binaries. -.It Dv kern.elf32.aslr.honor_sbrk +.It Va kern.elf32.aslr.honor_sbrk Makes ASLR less aggressive and more compatible with old binaries relying on the sbrk area. -.It Dv kern.elf32.aslr.stack +.It Va kern.elf32.aslr.stack Enable randomization of the stack for 32-bit binaries. Otherwise, the stack is mapped at a fixed location determined by the process ABI. -.It Dv kern.elf64.aslr.enable +.It Va kern.elf64.aslr.enable ASLR control for 64-bit ELF binaries. -.It Dv kern.elf64.aslr.pie_enable +.It Va kern.elf64.aslr.pie_enable ASLR control for 64-bit ELF PIEs. -.It Dv kern.elf64.aslr.honor_sbrk +.It Va kern.elf64.aslr.honor_sbrk ASLR sbrk compatibility control for 64-bit binaries. -.It Dv kern.elf64.aslr.stack +.It Va kern.elf64.aslr.stack Controls stack address randomization for 64-bit binaries. -.It Dv kern.elf32.nxstack +.It Va kern.elf32.nxstack Enables non-executable stack for 32-bit processes. Enabled by default if supported by hardware and corresponding binary. -.It Dv kern.elf64.nxstack +.It Va kern.elf64.nxstack Enables non-executable stack for 64-bit processes. -.It Dv kern.elf32.allow_wx +.It Va kern.elf32.allow_wx Enables mapping of simultaneously writable and executable pages for 32-bit processes. -.It Dv kern.elf64.allow_wx +.It Va kern.elf64.allow_wx Enables mapping of simultaneously writable and executable pages for 64-bit processes. .El diff --git a/share/man/man9/exterror.9 b/share/man/man9/exterror.9 index fd4b732b8213..a7c7a11d1315 100644 --- a/share/man/man9/exterror.9 +++ b/share/man/man9/exterror.9 @@ -90,6 +90,16 @@ The .Fn EXTERROR macro can take two optional 64-bit integer arguments, whose meaning is specific to the subsystem. +The format string may include up to two printf-like format +specifiers to insert the optional argument values in the +user output, which is done in userspace. +.Pp +The format specifier must be for an integer type, and include the +.Dq j +format modifier to accept only the types +.Vt intmax_t +or +.Vt uintmax_t . .El .Pp The strings passed as the second argument are only retained diff --git a/share/man/man9/locking.9 b/share/man/man9/locking.9 index b29cd07e2c2a..ad044b6e1d46 100644 --- a/share/man/man9/locking.9 +++ b/share/man/man9/locking.9 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.Dd February 3, 2023 +.Dd December 28, 2025 .Dt LOCKING 9 .Os .Sh NAME @@ -371,9 +371,9 @@ functions, and any of the .Fn sleep functions. -.Bl -column ".Ic xxxxxxxxxxxxxxxx" ".Xr XXXXXXXXX" ".Xr XXXXXXXXX" ".Xr XXXXXXX" ".Xr XXXXXXXXX" ".Xr XXXXXX" -offset 3n +.Bl -column " You want:" "spin mtx " "mutex/rw " "rmlock " "sleep rm " "sx/lk " -offset 3n .It Em " You want:" Ta spin mtx Ta mutex/rw Ta rmlock Ta sleep rm Ta sx/lk Ta sleep -.It Em "You have: " Ta -------- Ta -------- Ta ------ Ta -------- Ta ------ Ta ------ +.It Em "You have:" Ta -------- Ta -------- Ta ------ Ta -------- Ta ----- Ta ------ .It spin mtx Ta \&ok Ta \&no Ta \&no Ta \&no Ta \&no Ta \&no-1 .It mutex/rw Ta \&ok Ta \&ok Ta \&ok Ta \&no Ta \&no Ta \&no-1 .It rmlock Ta \&ok Ta \&ok Ta \&ok Ta \&no Ta \&no Ta \&no-1 @@ -407,13 +407,13 @@ Note that non-blocking try operations on locks are always permitted. .Ss Context mode table The next table shows what can be used in different contexts. At this time this is a rather easy to remember table. -.Bl -column ".Ic Xxxxxxxxxxxxxxxxxxx" ".Xr XXXXXXXXX" ".Xr XXXXXXXXX" ".Xr XXXXXXX" ".Xr XXXXXXXXX" ".Xr XXXXXX" -offset 3n +.Bl -column "interrupt filter: " "spin mtx " "mutex/rw " "rmlock " "sleep rm " "sx/lk " -offset 3n .It Em "Context:" Ta spin mtx Ta mutex/rw Ta rmlock Ta sleep rm Ta sx/lk Ta sleep .It interrupt filter: Ta \&ok Ta \&no Ta \&no Ta \&no Ta \&no Ta \&no .It interrupt thread: Ta \&ok Ta \&ok Ta \&ok Ta \&no Ta \&no Ta \&no -.It callout: Ta \&ok Ta \&ok Ta \&ok Ta \&no Ta \&no Ta \&no -.It direct callout: Ta \&ok Ta \&no Ta \&no Ta \&no Ta \&no Ta \&no -.It system call: Ta \&ok Ta \&ok Ta \&ok Ta \&ok Ta \&ok Ta \&ok +.It callout: Ta \&ok Ta \&ok Ta \&ok Ta \&no Ta \&no Ta \&no +.It direct callout: Ta \&ok Ta \&no Ta \&no Ta \&no Ta \&no Ta \&no +.It system call: Ta \&ok Ta \&ok Ta \&ok Ta \&ok Ta \&ok Ta \&ok .El .Sh SEE ALSO .Xr lockstat 1 , diff --git a/share/mk/bsd.cpu.mk b/share/mk/bsd.cpu.mk index d11b8994dcd7..33587b6ba25a 100644 --- a/share/mk/bsd.cpu.mk +++ b/share/mk/bsd.cpu.mk @@ -277,29 +277,23 @@ MACHINE_CPU = sse3 . endif MACHINE_CPU += amd64 sse2 sse mmx ########## powerpc -. elif ${MACHINE_ARCH} == "powerpc" -. if ${CPUTYPE} == "e500" -MACHINE_CPU = booke softfp -. elif ${CPUTYPE} == "g4" -MACHINE_CPU = aim altivec -. else -MACHINE_CPU= aim -. endif . elif ${MACHINE_ARCH} == "powerpc64" . if ${CPUTYPE} == "e5500" MACHINE_CPU = booke -. elif ${CPUTYPE} == power7 +. elif ${CPUTYPE} == "power7" MACHINE_CPU = altivec vsx -. elif ${CPUTYPE} == power8 +. elif ${CPUTYPE} == "power8" MACHINE_CPU = altivec vsx vsx2 -. elif ${CPUTYPE} == power9 +. elif ${CPUTYPE} == "power9" || ${CPUTYPE} == "power10" || \ + ${CPUTYPE} == "power11" MACHINE_CPU = altivec vsx vsx2 vsx3 . else MACHINE_CPU = aim altivec . endif . elif ${MACHINE_ARCH} == "powerpc64le" MACHINE_CPU = aim altivec vsx vsx2 -. if ${CPUTYPE} == power9 +. if ${CPUTYPE} == "power9" || ${CPUTYPE} == "power10" || \ + ${CPUTYPE} == "power11" MACHINE_CPU += vsx3 . endif ########## riscv @@ -329,15 +323,10 @@ CFLAGS += -mfloat-abi=softfp . endif .endif -.if ${MACHINE_ARCH} == "powerpc" || ${MACHINE_ARCH} == "powerpcspe" +.if ${MACHINE_ARCH} == "powerpc" LDFLAGS.bfd+= -Wl,--secure-plt .endif -.if ${MACHINE_ARCH} == "powerpcspe" -CFLAGS += -mcpu=8548 -mspe -CFLAGS.gcc+= -mabi=spe -mfloat-gprs=double -Wa,-me500 -.endif - .if ${MACHINE_CPUARCH} == "riscv" CFLAGS += -march=rv64imafdc -mabi=lp64d .endif diff --git a/share/mk/bsd.debug.mk b/share/mk/bsd.debug.mk index cf2fb4356aef..1c85d3f183a7 100644 --- a/share/mk/bsd.debug.mk +++ b/share/mk/bsd.debug.mk @@ -16,7 +16,7 @@ MK_WERROR= no # If reproducible build mode is enabled, map the root of the source # directory to /usr/src and the root of the object directory to # /usr/obj. -.if ${MK_REPRODUCIBLE_BUILD} != "no" && !defined(DEBUG_PREFIX) +.if ${MK_REPRODUCIBLE_PATHS} != "no" && !defined(DEBUG_PREFIX) .if defined(SRCTOP) DEBUG_PREFIX+= ${SRCTOP:S,/$,,}=/usr/src .endif @@ -61,7 +61,7 @@ CTFFLAGS+= -g _debuginstall: .if ${MK_DEBUG_FILES} != "no" && defined(DEBUGFILE) .if defined(DEBUGMKDIR) - ${INSTALL} ${TAG_ARGS:D${TAG_ARGS},dbg} -d ${DESTDIR}${DEBUGFILEDIR}/ + ${INSTALL} ${TAG_ARGS:D${TAG_ARGS},dbg} -d ${DESTDIR}${DEBUGFILEDIR} .endif ${INSTALL} ${TAG_ARGS:D${TAG_ARGS},dbg} -o ${DEBUGOWN} -g ${DEBUGGRP} -m ${DEBUGMODE} \ ${DEBUGFILE} ${DESTDIR}${DEBUGFILEDIR}/${DEBUGFILE} diff --git a/share/mk/bsd.endian.mk b/share/mk/bsd.endian.mk index 24da57954b5a..0c5ebb7aeba2 100644 --- a/share/mk/bsd.endian.mk +++ b/share/mk/bsd.endian.mk @@ -9,8 +9,7 @@ TARGET_ENDIANNESS= 1234 CAP_MKDB_ENDIAN= -l LOCALEDEF_ENDIAN= -l .elif ${MACHINE_ARCH} == "powerpc" || \ - ${MACHINE_ARCH} == "powerpc64" || \ - ${MACHINE_ARCH} == "powerpcspe" + ${MACHINE_ARCH} == "powerpc64" TARGET_ENDIANNESS= 4321 CAP_MKDB_ENDIAN= -b LOCALEDEF_ENDIAN= -b diff --git a/share/mk/bsd.opts.mk b/share/mk/bsd.opts.mk index 66eb427c3505..d09b5a212606 100644 --- a/share/mk/bsd.opts.mk +++ b/share/mk/bsd.opts.mk @@ -79,6 +79,7 @@ __DEFAULT_NO_OPTIONS = \ INSTALL_AS_USER \ MANSPLITPKG \ REPRODUCIBLE_BUILD \ + REPRODUCIBLE_PATHS \ RETPOLINE \ RUN_TESTS \ STALE_STAGED \ @@ -98,8 +99,7 @@ __DEFAULT_DEPENDENT_OPTIONS = \ # some memory-hungry workloads. # .if ${MACHINE_ARCH} == "armv7" \ - || ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "powerpc" \ - || ${MACHINE_ARCH} == "powerpcspe" + || ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "powerpc" __DEFAULT_NO_OPTIONS+= PIE .else __DEFAULT_YES_OPTIONS+=PIE diff --git a/share/mk/bsd.sys.mk b/share/mk/bsd.sys.mk index 2134886abcf5..2757033f39b3 100644 --- a/share/mk/bsd.sys.mk +++ b/share/mk/bsd.sys.mk @@ -93,6 +93,11 @@ CWARNFLAGS.clang+= -Wno-error=unused-but-set-parameter # Similar to gcc >= 8.1 -Wno-error=cast-function-type below CWARNFLAGS.clang+= -Wno-error=cast-function-type-mismatch .endif +.if ${COMPILER_TYPE} == "clang" && ${COMPILER_VERSION} >= 210000 +CXXWARNFLAGS.clang+= -Wno-c++20-extensions +CXXWARNFLAGS.clang+= -Wno-c++23-lambda-attributes +CXXWARNFLAGS.clang+= -Wno-nullability-completeness +.endif .endif # WARNS <= 6 .if ${WARNS} <= 3 CWARNFLAGS.clang+= -Wno-tautological-compare -Wno-unused-value\ @@ -128,6 +133,9 @@ NO_WARRAY_PARAMETER= -Wno-array-parameter NO_WSTRICT_PROTOTYPES= -Wno-strict-prototypes NO_WDEPRECATED_NON_PROTOTYPE=-Wno-deprecated-non-prototype .endif +.if ${COMPILER_TYPE} == "clang" && ${COMPILER_VERSION} >= 210000 +NO_WCHARACTER_CONVERSION=-Wno-character-conversion +.endif .if ${COMPILER_TYPE} == "gcc" && ${COMPILER_VERSION} >= 50200 NO_WUNUSED_BUT_SET_VARIABLE=-Wno-unused-but-set-variable .endif @@ -236,7 +244,8 @@ CWARNFLAGS+= -Wno-error=overflow .if ${COMPILER_VERSION} >= 120100 # These warnings are raised by headers in libc++ so are disabled # globally for all C++ -CXXWARNFLAGS+= -Wno-literal-suffix \ +CXXWARNFLAGS+= -Wno-literal-suffix \ + -Wno-c++20-extensions \ -Wno-error=unknown-pragmas .endif diff --git a/share/mk/googletest.test.inc.mk b/share/mk/googletest.test.inc.mk index 9ef5a3ceac00..5f4445e76205 100644 --- a/share/mk/googletest.test.inc.mk +++ b/share/mk/googletest.test.inc.mk @@ -10,3 +10,6 @@ GTESTS_CXXFLAGS+= -frtti CXXFLAGS+= -I${DESTDIR}${INCLUDEDIR}/private NO_WTHREAD_SAFETY= + +# Silence warnings about implicit character conversions in gtest-printers.h +CXXWARNFLAGS+= ${NO_WCHARACTER_CONVERSION} diff --git a/share/mk/src.opts.mk b/share/mk/src.opts.mk index 0d806702417f..68d48271d7bc 100644 --- a/share/mk/src.opts.mk +++ b/share/mk/src.opts.mk @@ -86,6 +86,7 @@ __DEFAULT_YES_OPTIONS = \ CRYPT \ CUSE \ CXGBETOOL \ + DEPEND_CLEANUP \ DICT \ DMAGENT \ DTRACE \ @@ -515,6 +516,10 @@ MK_LLVM_CXXFILT:= yes MK_LOADER_VERIEXEC_PASS_MANIFEST := no .endif +.if ${MK_CLEAN} == "yes" +MK_DEPEND_CLEANUP:= no +.endif + # # MK_* options whose default value depends on another option. # diff --git a/share/vt/fonts/Makefile b/share/vt/fonts/Makefile index 01f56a235e5e..706207e70070 100644 --- a/share/vt/fonts/Makefile +++ b/share/vt/fonts/Makefile @@ -21,7 +21,7 @@ FILES= ${FONTS} INDEX.fonts CLEANFILES+= ${FONTS} -.SUFFIXES: .bdf .fnt .fnt.uu .hex +.SUFFIXES: .bdf .fnt .hex .bdf.fnt .hex.fnt: vtfontcvt -o ${.TARGET} ${.IMPSRC} diff --git a/stand/common/gfx_fb.c b/stand/common/gfx_fb.c index eb41c51c50b6..d99d9b7a868f 100644 --- a/stand/common/gfx_fb.c +++ b/stand/common/gfx_fb.c @@ -83,6 +83,7 @@ */ #include <sys/param.h> +#include <assert.h> #include <stand.h> #include <teken.h> #include <gfx_fb.h> @@ -856,7 +857,7 @@ gfxfb_blt(void *BltBuffer, GFXFB_BLT_OPERATION BltOperation, int rv; #if defined(EFI) EFI_STATUS status; - EFI_GRAPHICS_OUTPUT_PROTOCOL *gop = gfx_state.tg_private; + EFI_GRAPHICS_OUTPUT_PROTOCOL *gop; EFI_TPL tpl; /* @@ -866,7 +867,10 @@ gfxfb_blt(void *BltBuffer, GFXFB_BLT_OPERATION BltOperation, * done as they are provided by protocols that disappear when exit * boot services. */ - if (!ignore_gop_blt && gop != NULL && boot_services_active) { + if (gfx_state.tg_fb_type == FB_GOP && !ignore_gop_blt && + boot_services_active) { + assert(gfx_state.tg_private != NULL); + gop = gfx_state.tg_private; tpl = BS->RaiseTPL(TPL_NOTIFY); switch (BltOperation) { case GfxFbBltVideoFill: diff --git a/stand/defs.mk b/stand/defs.mk index 504493ebe648..b74dac395d15 100644 --- a/stand/defs.mk +++ b/stand/defs.mk @@ -157,11 +157,6 @@ CFLAGS.gcc+= -mcmodel=medany CFLAGS+= -msoft-float .endif -# -msoft-float seems to be insufficient for powerpcspe -.if ${MACHINE_ARCH} == "powerpcspe" -CFLAGS+= -mno-spe -.endif - .if ${MACHINE_CPUARCH} == "i386" || (${MACHINE_CPUARCH} == "amd64" && ${DO32:U0} == 1) CFLAGS+= -march=i386 CFLAGS.gcc+= -mpreferred-stack-boundary=2 diff --git a/stand/efi/loader/arch/amd64/multiboot2.c b/stand/efi/loader/arch/amd64/multiboot2.c index 086dba33895a..b1c60601a8bd 100644 --- a/stand/efi/loader/arch/amd64/multiboot2.c +++ b/stand/efi/loader/arch/amd64/multiboot2.c @@ -558,5 +558,11 @@ obj_exec(struct preloaded_file *fp) return (EFTYPE); } -struct file_format multiboot2 = { loadfile, exec }; -struct file_format multiboot2_obj = { obj_loadfile, obj_exec }; +struct file_format multiboot2 = { + .l_load = loadfile, + .l_exec = exec +}; +struct file_format multiboot2_obj = { + .l_load = obj_loadfile, + .l_exec = obj_exec +}; diff --git a/stand/efi/loader/arch/arm/exec.c b/stand/efi/loader/arch/arm/exec.c index 3963b6c0104b..50e94af05fd2 100644 --- a/stand/efi/loader/arch/arm/exec.c +++ b/stand/efi/loader/arch/arm/exec.c @@ -90,8 +90,8 @@ __elfN(arm_exec)(struct preloaded_file *fp) } static struct file_format arm_elf = { - __elfN(arm_load), - __elfN(arm_exec) + .l_load = __elfN(arm_load), + .l_exec = __elfN(arm_exec) }; struct file_format *file_formats[] = { diff --git a/stand/efi/loader/arch/arm64/exec.c b/stand/efi/loader/arch/arm64/exec.c index 89e2ad7521a8..6b5181b54507 100644 --- a/stand/efi/loader/arch/arm64/exec.c +++ b/stand/efi/loader/arch/arm64/exec.c @@ -43,8 +43,8 @@ static int elf64_exec(struct preloaded_file *amp); static int elf64_obj_exec(struct preloaded_file *amp); static struct file_format arm64_elf = { - elf64_loadfile, - elf64_exec + .l_load = elf64_loadfile, + .l_exec = elf64_exec }; struct file_format *file_formats[] = { diff --git a/stand/efi/loader/arch/riscv/exec.c b/stand/efi/loader/arch/riscv/exec.c index 8d1a0bd03de0..64e522775471 100644 --- a/stand/efi/loader/arch/riscv/exec.c +++ b/stand/efi/loader/arch/riscv/exec.c @@ -106,8 +106,8 @@ __elfN(exec)(struct preloaded_file *fp) } static struct file_format riscv_elf = { - __elfN(loadfile), - __elfN(exec) + .l_load = __elfN(loadfile), + .l_exec = __elfN(exec) }; struct file_format *file_formats[] = { diff --git a/stand/efi/loader/bootinfo.c b/stand/efi/loader/bootinfo.c index 67b36313c26f..151ac34dd08e 100644 --- a/stand/efi/loader/bootinfo.c +++ b/stand/efi/loader/bootinfo.c @@ -432,9 +432,10 @@ bi_load(char *args, vm_offset_t *modulep, vm_offset_t *kernendp, bool exit_bs) #if defined(LOADER_FDT_SUPPORT) if (dtb_size) file_addmetadata(kfp, MODINFOMD_DTBP, sizeof(dtbp), &dtbp); - else + else if (getenv("acpi.revision") == NULL) { printf("WARNING! Trying to fire up the kernel, but no " "device tree blob found!\n"); + } #endif file_addmetadata(kfp, MODINFOMD_KERNEND, sizeof(kernend), &kernend); #ifdef MODINFOMD_MODULEP diff --git a/stand/efi/loader/framebuffer.c b/stand/efi/loader/framebuffer.c index 08834aa7106b..632377613f58 100644 --- a/stand/efi/loader/framebuffer.c +++ b/stand/efi/loader/framebuffer.c @@ -392,6 +392,23 @@ efifb_from_uga(struct efi_fb *efifb) /* These are the missing bits. */ offset = 0x0; stride = 2048; + } else if (ev != NULL && !strcmp(ev, "MacBookPro3,1")) { + /* + * Valid for MacBookPro 17" with standard resolution. + * Other Models are: + * MacBookPro 15" with horiz=1440 + * MacBookPro 17" with horiz=1920 + */ + + /* These are the expected values we should have. */ + if (horiz == 1680) { + vert = 1050; + fbaddr = 0xc0000000; + /* These are the missing bits. */ + stride = 2048; + /* 24 scan lines down */ + offset = stride * 4 * 24; + } } } @@ -590,53 +607,55 @@ efi_find_framebuffer(teken_gfx_t *gfx_state) if (EFI_ERROR(status)) free(hlist); } - if (EFI_ERROR(status)) - return (efi_status_to_errno(status)); - - nhandles = hsize / sizeof(*hlist); - /* - * Search for ConOut protocol, if not found, use first handle. - */ - gop_handle = NULL; - for (i = 0; i < nhandles; i++) { - EFI_GRAPHICS_OUTPUT_PROTOCOL *tgop; - void *dummy; + if (EFI_ERROR(status)) { + status = BS->LocateProtocol(&uga_guid, NULL, (VOID **)&uga); + if (status == EFI_SUCCESS) { + gfx_state->tg_fb_type = FB_UGA; + gfx_state->tg_private = uga; + } else { + return (efi_status_to_errno(status)); + } + } else { + nhandles = hsize / sizeof(*hlist); - status = OpenProtocolByHandle(hlist[i], &gop_guid, (void **)&tgop); - if (status != EFI_SUCCESS) - continue; + /* + * Search for ConOut protocol, if not found, use first handle. + */ + gop_handle = NULL; + for (i = 0; i < nhandles; i++) { + EFI_GRAPHICS_OUTPUT_PROTOCOL *tgop; + void *dummy; + + status = OpenProtocolByHandle(hlist[i], &gop_guid, + (void **)&tgop); + if (status != EFI_SUCCESS) + continue; - if (tgop->Mode->Info->PixelFormat == PixelBltOnly || - tgop->Mode->Info->PixelFormat >= PixelFormatMax) - continue; + if (tgop->Mode->Info->PixelFormat == PixelBltOnly || + tgop->Mode->Info->PixelFormat >= PixelFormatMax) + continue; - status = OpenProtocolByHandle(hlist[i], &conout_guid, &dummy); - if (status == EFI_SUCCESS) { - gop_handle = hlist[i]; - gop = tgop; - break; - } else if (gop_handle == NULL) { - gop_handle = hlist[i]; - gop = tgop; + status = OpenProtocolByHandle(hlist[i], &conout_guid, + &dummy); + if (status == EFI_SUCCESS) { + gop_handle = hlist[i]; + gop = tgop; + break; + } else if (gop_handle == NULL) { + gop_handle = hlist[i]; + gop = tgop; + } } - } - free(hlist); + free(hlist); + if (gop_handle == NULL) + return (ENXIO); - if (gop_handle != NULL) { gfx_state->tg_fb_type = FB_GOP; gfx_state->tg_private = gop; if (edid_info == NULL) edid_info = efifb_gop_get_edid(gop_handle); - } else { - status = BS->LocateProtocol(&uga_guid, NULL, (VOID **)&uga); - if (status == EFI_SUCCESS) { - gfx_state->tg_fb_type = FB_UGA; - gfx_state->tg_private = uga; - } else { - return (efi_status_to_errno(status)); - } } switch (gfx_state->tg_fb_type) { diff --git a/stand/efi/loader/main.c b/stand/efi/loader/main.c index b731136fca4b..22dbd10a0f37 100644 --- a/stand/efi/loader/main.c +++ b/stand/efi/loader/main.c @@ -867,10 +867,10 @@ acpi_uart_parity(UINT8 p) } /* - * See if we can find a SPCR ACPI table in the static tables. If so, then it - * describes the serial console that's been redirected to, so we know that at - * least there's a serial console. this is most important for embedded systems - * that don't have traidtional PC serial ports. + * See if we can find an enabled SPCR ACPI table in the static tables. If so, + * then it describes the serial console that's been redirected to, so we know + * that at least there's a serial console. This is most important for embedded + * systems that don't have traidtional PC serial ports. * * All the two letter variables in this function correspond to their usage in * the uart(4) console string. We use io == -1 to select between I/O ports and @@ -886,8 +886,12 @@ check_acpi_spcr(void) const char *dt, *pa; char *val = NULL; + /* + * The SPCR is enabled when SerialPort is non-zero. Address being zero + * should suffice to see if it's disabled. + */ spcr = acpi_find_table(ACPI_SIG_SPCR); - if (spcr == NULL) + if (spcr == NULL || spcr->SerialPort.Address == 0) return (0); dt = acpi_uart_type(spcr->InterfaceType); if (dt == NULL) { /* Kernel can't use unknown types */ diff --git a/stand/i386/libi386/elf32_freebsd.c b/stand/i386/libi386/elf32_freebsd.c index ae5702e5e65f..40111bdd4d6c 100644 --- a/stand/i386/libi386/elf32_freebsd.c +++ b/stand/i386/libi386/elf32_freebsd.c @@ -39,8 +39,14 @@ static int elf32_exec(struct preloaded_file *amp); static int elf32_obj_exec(struct preloaded_file *amp); -struct file_format i386_elf = { elf32_loadfile, elf32_exec }; -struct file_format i386_elf_obj = { elf32_obj_loadfile, elf32_obj_exec }; +struct file_format i386_elf = { + .l_load = elf32_loadfile, + .l_exec = elf32_exec +}; +struct file_format i386_elf_obj = { + .l_load = elf32_obj_loadfile, + .l_exec = elf32_obj_exec +}; /* * There is an ELF kernel and one or more ELF modules loaded. diff --git a/stand/i386/libi386/elf64_freebsd.c b/stand/i386/libi386/elf64_freebsd.c index 89cc249e9d96..73d1ad088824 100644 --- a/stand/i386/libi386/elf64_freebsd.c +++ b/stand/i386/libi386/elf64_freebsd.c @@ -43,8 +43,14 @@ static int elf64_exec(struct preloaded_file *amp); static int elf64_obj_exec(struct preloaded_file *amp); -struct file_format amd64_elf = { elf64_loadfile, elf64_exec }; -struct file_format amd64_elf_obj = { elf64_obj_loadfile, elf64_obj_exec }; +struct file_format amd64_elf = { + .l_load = elf64_loadfile, + .l_exec = elf64_exec +}; +struct file_format amd64_elf_obj = { + .l_load = elf64_obj_loadfile, + .l_exec = elf64_obj_exec +}; /* * i386's pmap_pae.h doesn't provide this, so diff --git a/stand/i386/libi386/multiboot.c b/stand/i386/libi386/multiboot.c index e2bd44fe83f5..f30787ecebe0 100644 --- a/stand/i386/libi386/multiboot.c +++ b/stand/i386/libi386/multiboot.c @@ -67,9 +67,14 @@ static int multiboot_exec(struct preloaded_file *); static int multiboot_obj_loadfile(char *, uint64_t, struct preloaded_file **); static int multiboot_obj_exec(struct preloaded_file *fp); -struct file_format multiboot = { multiboot_loadfile, multiboot_exec }; -struct file_format multiboot_obj = - { multiboot_obj_loadfile, multiboot_obj_exec }; +struct file_format multiboot = { + .l_load = multiboot_loadfile, + .l_exec = multiboot_exec +}; +struct file_format multiboot_obj = { + .l_load = multiboot_obj_loadfile, + .l_exec = multiboot_obj_exec +}; extern void multiboot_tramp(); diff --git a/stand/i386/pxeldr/pxeboot.8 b/stand/i386/pxeldr/pxeboot.8 index e10e570edf54..496b244cf00f 100644 --- a/stand/i386/pxeldr/pxeboot.8 +++ b/stand/i386/pxeldr/pxeboot.8 @@ -1,3 +1,6 @@ +.\" +.\" SPDX-License-Identifier: BSD-2-Clause +.\" .\" Copyright (c) 1999 Doug White .\" All rights reserved. .\" @@ -142,8 +145,8 @@ bootloader first appeared in The .Nm bootloader was written by -.An John Baldwin Aq jhb@FreeBSD.org +.An John Baldwin Aq Mt jhb@FreeBSD.org and -.An Paul Saab Aq ps@FreeBSD.org . +.An Paul Saab Aq Mt ps@FreeBSD.org . This manual page was written by -.An Doug White Aq dwhite@FreeBSD.org . +.An Doug White Aq Mt dwhite@FreeBSD.org . diff --git a/stand/kboot/kboot/arch/aarch64/exec.c b/stand/kboot/kboot/arch/aarch64/exec.c index df3e922dfe11..bc7cd6917e13 100644 --- a/stand/kboot/kboot/arch/aarch64/exec.c +++ b/stand/kboot/kboot/arch/aarch64/exec.c @@ -73,8 +73,8 @@ int bi_load(char *args, vm_offset_t *modulep, vm_offset_t *kernendp, #endif static struct file_format arm64_elf = { - elf64_loadfile, - elf64_exec + .l_load = elf64_loadfile, + .l_exec = elf64_exec }; struct file_format *file_formats[] = { diff --git a/stand/kboot/kboot/arch/powerpc64/ppc64_elf_freebsd.c b/stand/kboot/kboot/arch/powerpc64/ppc64_elf_freebsd.c index ae398e357df2..65c43a411433 100644 --- a/stand/kboot/kboot/arch/powerpc64/ppc64_elf_freebsd.c +++ b/stand/kboot/kboot/arch/powerpc64/ppc64_elf_freebsd.c @@ -157,10 +157,9 @@ ppc64_elf_exec(struct preloaded_file *fp) while (1) {} } -struct file_format ppc_elf64 = -{ - ppc64_elf_loadfile, - ppc64_elf_exec +struct file_format ppc_elf64 = { + .l_load = ppc64_elf_loadfile, + .l_exec = ppc64_elf_exec }; /* diff --git a/stand/lua/core.lua b/stand/lua/core.lua index ad417e5f97e5..b1b321d10868 100644 --- a/stand/lua/core.lua +++ b/stand/lua/core.lua @@ -289,6 +289,12 @@ function core.kernelList() kernels[n] = kernels[n + 1] end end + + -- The config/boot bits use the env var as a fallback if the + -- menu's kernel selector remains untouched, so we want to + -- update our notion of the default kernel to one that is + -- actually present. + loader.setenv("kernel", kernels[1]) end core.cached_kernels = kernels diff --git a/stand/man/loader.efi.8 b/stand/man/loader.efi.8 index d9a5c827ba71..80d16d45670a 100644 --- a/stand/man/loader.efi.8 +++ b/stand/man/loader.efi.8 @@ -41,20 +41,28 @@ On UEFI systems, .Nm loads the kernel. .Pp -.Xr boot1.efi 8 -is used to load -.Nm -when it is placed within a UFS or ZFS file system. -Alternatively, .Nm -is used directly when configured with -.Xr efibootmgr 8 , -or when placed directly as the default boot program as described in -.Xr uefi 8 . -When a system is built using +is invoked directly from the EFI System Partition (ESP) +on systems installed using .Xr bsdinstall 8 , -.Nm -will be used directly. +when installed as the default EFI boot program as described in +.Xr uefi 8 +or when configured as an EFI boot entry with +.Xr efibootmgr 8 . +.Pp +On systems upgraded from FreeBSD 10 or earlier, the EFI System Partition (ESP) +can be too small to accommodate +.Nm . +In such cases, +.Xr boot1.efi 8 +may be retained as the firmware boot program. It +will chain-load the current +.Pa /boot/loader.efi , +which is updated during the +.Cm installworld +process. +.Xr boot1.efi 8 +is deprecated for new installations. .Ss Console Considerations The EFI BIOS provides a generic console. In @@ -485,15 +493,6 @@ Typically in these embedded situations, there is only one .efi file (loader.efi or a copy of loader.efi). The path to this file is typically the default removable path above. .Pp -Managing booting multiple OSes on UEFI varies greatly, so extra caution when -updating the UEFI default loader. -.Pp -The old, now obsolete, boot1.efi was installed as bootx64.efi in -.Fx 10 -and earlier. -Since it was quite limited in functionality, we created very small -ESPs by default. -A modern loader.efi will not fit. -However, if the old boot1.efi still works, there's no need to update -it since it will chain boot /boot/loader.efi from a copy that -make installworld updates. +Managing booting multiple OSes on UEFI varies greatly, so extra caution is required +when updating the UEFI default loader. +.Pp diff --git a/stand/powerpc/ofw/elf_freebsd.c b/stand/powerpc/ofw/elf_freebsd.c index 4d34fa18c5dd..5f8d84ac8bec 100644 --- a/stand/powerpc/ofw/elf_freebsd.c +++ b/stand/powerpc/ofw/elf_freebsd.c @@ -97,8 +97,7 @@ __elfN(ofw_exec)(struct preloaded_file *fp) panic("exec returned"); } -struct file_format ofw_elf = -{ - __elfN(ofw_loadfile), - __elfN(ofw_exec) +struct file_format ofw_elf = { + .l_load = __elfN(ofw_loadfile), + .l_exec = __elfN(ofw_exec) }; diff --git a/stand/powerpc/ofw/powerpcspe.ldscript b/stand/powerpc/ofw/powerpcspe.ldscript deleted file mode 100644 index aa48f257af1a..000000000000 --- a/stand/powerpc/ofw/powerpcspe.ldscript +++ /dev/null @@ -1,3 +0,0 @@ -OUTPUT_FORMAT("elf32-powerpc-freebsd", "elf32-powerpc-freebsd", - "elf32-powerpc-freebsd") -INCLUDE "ppc-common.ldscript" diff --git a/stand/powerpc/ofw/ppc-common.ldscript b/stand/powerpc/ofw/ppc-common.ldscript index e12dee74824a..edd37eba8fca 100644 --- a/stand/powerpc/ofw/ppc-common.ldscript +++ b/stand/powerpc/ofw/ppc-common.ldscript @@ -9,7 +9,7 @@ PHDRS SECTIONS { /* Read-only sections, merged into text segment: */ - . = 0x02c00000 + SIZEOF_HEADERS; + . = 0x02c00000 + SIZEOF_HEADERS + 32; .interp : { *(.interp) } :text .hash : { *(.hash) } .dynsym : { *(.dynsym) } diff --git a/stand/powerpc/ofw/ppc64_elf_freebsd.c b/stand/powerpc/ofw/ppc64_elf_freebsd.c index bc68d129f353..92d394963678 100644 --- a/stand/powerpc/ofw/ppc64_elf_freebsd.c +++ b/stand/powerpc/ofw/ppc64_elf_freebsd.c @@ -101,8 +101,7 @@ ppc64_ofw_elf_exec(struct preloaded_file *fp) panic("exec returned"); } -struct file_format ofw_elf64 = -{ - ppc64_ofw_elf_loadfile, - ppc64_ofw_elf_exec +struct file_format ofw_elf64 = { + .l_load = ppc64_ofw_elf_loadfile, + .l_exec = ppc64_ofw_elf_exec }; diff --git a/stand/uboot/arch/powerpc/ppc64_elf_freebsd.c b/stand/uboot/arch/powerpc/ppc64_elf_freebsd.c index e500b862de2e..1df64d166840 100644 --- a/stand/uboot/arch/powerpc/ppc64_elf_freebsd.c +++ b/stand/uboot/arch/powerpc/ppc64_elf_freebsd.c @@ -88,8 +88,7 @@ ppc64_uboot_elf_exec(struct preloaded_file *fp) panic("exec returned"); } -struct file_format uboot_elf64 = -{ - ppc64_uboot_elf_loadfile, - ppc64_uboot_elf_exec +struct file_format uboot_elf64 = { + .l_load = ppc64_uboot_elf_loadfile, + .l_exec = ppc64_uboot_elf_exec }; diff --git a/stand/uboot/elf_freebsd.c b/stand/uboot/elf_freebsd.c index 3b1bdc542538..772ba32bb7b7 100644 --- a/stand/uboot/elf_freebsd.c +++ b/stand/uboot/elf_freebsd.c @@ -87,6 +87,6 @@ __elfN(uboot_exec)(struct preloaded_file *fp) } struct file_format uboot_elf = { - __elfN(uboot_load), - __elfN(uboot_exec) + .l_load = __elfN(uboot_load), + .l_exec = __elfN(uboot_exec) }; diff --git a/stand/userboot/userboot/elf32_freebsd.c b/stand/userboot/userboot/elf32_freebsd.c index c2492dce7397..984218f419d9 100644 --- a/stand/userboot/userboot/elf32_freebsd.c +++ b/stand/userboot/userboot/elf32_freebsd.c @@ -39,8 +39,14 @@ static int elf32_exec(struct preloaded_file *amp); static int elf32_obj_exec(struct preloaded_file *amp); -struct file_format i386_elf = { elf32_loadfile, elf32_exec }; -struct file_format i386_elf_obj = { elf32_obj_loadfile, elf32_obj_exec }; +struct file_format i386_elf = { + .l_load = elf32_loadfile, + .l_exec = elf32_exec +}; +struct file_format i386_elf_obj = { + .l_load = elf32_obj_loadfile, + .l_exec = elf32_obj_exec +}; #define GUEST_STACK 0x1000 /* Initial stack base */ #define GUEST_GDT 0x3000 /* Address of initial GDT */ diff --git a/stand/userboot/userboot/elf64_freebsd.c b/stand/userboot/userboot/elf64_freebsd.c index 5a63fdb4990c..b4cbefd07aad 100644 --- a/stand/userboot/userboot/elf64_freebsd.c +++ b/stand/userboot/userboot/elf64_freebsd.c @@ -43,8 +43,14 @@ static int elf64_exec(struct preloaded_file *amp); static int elf64_obj_exec(struct preloaded_file *amp); -struct file_format amd64_elf = { elf64_loadfile, elf64_exec }; -struct file_format amd64_elf_obj = { elf64_obj_loadfile, elf64_obj_exec }; +struct file_format amd64_elf = { + .l_load = elf64_loadfile, + .l_exec = elf64_exec +}; +struct file_format amd64_elf_obj = { + .l_load = elf64_obj_loadfile, + .l_exec = elf64_obj_exec +}; #define GUEST_NULL_SEL 0 #define GUEST_CODE_SEL 1 diff --git a/sys/amd64/amd64/mp_machdep.c b/sys/amd64/amd64/mp_machdep.c index 96ed0a2cc3ba..61f1bdb6f942 100644 --- a/sys/amd64/amd64/mp_machdep.c +++ b/sys/amd64/amd64/mp_machdep.c @@ -344,7 +344,6 @@ start_all_aps(void) u_char mpbiosreason; amd64_mp_alloc_pcpu(); - mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); MPASS(bootMP_size <= PAGE_SIZE); m_boottramp = vm_page_alloc_noobj_contig(0, 1, 0, diff --git a/sys/amd64/conf/GENERIC b/sys/amd64/conf/GENERIC index ef7ce215474e..8475e0c03e74 100644 --- a/sys/amd64/conf/GENERIC +++ b/sys/amd64/conf/GENERIC @@ -242,6 +242,7 @@ device axp # AMD EPYC integrated NIC (requires miibus) # PCI Ethernet NICs. device bxe # Broadcom NetXtreme II BCM5771X/BCM578XX 10GbE device le # AMD Am7900 LANCE and Am79C9xx PCnet +device rge # Realtek 8125/8126/8127 device ti # Alteon Networks Tigon I/II gigabit Ethernet # Nvidia/Mellanox Connect-X 4 and later, Ethernet only @@ -324,7 +325,8 @@ device bpf # Berkeley packet filter # random(4) device rdrand_rng # Intel Bull Mountain RNG -device tpm # Trusted Platform Module +# Disabled for now since tpm(4) breaks suspend/resume. +#device tpm # Trusted Platform Module options RANDOM_ENABLE_TPM # enable entropy from TPM 2.0 options RANDOM_ENABLE_KBD options RANDOM_ENABLE_MOUSE diff --git a/sys/amd64/conf/MINIMAL b/sys/amd64/conf/MINIMAL index 8df3349b4c34..9f80fe2f42d5 100644 --- a/sys/amd64/conf/MINIMAL +++ b/sys/amd64/conf/MINIMAL @@ -122,7 +122,8 @@ device bpf # Berkeley packet filter # random(4) device rdrand_rng # Intel Bull Mountain RNG -device tpm # Trusted Platform Module +# Disabled for now since tpm(4) breaks suspend/resume. +#device tpm # Trusted Platform Module options RANDOM_ENABLE_TPM # enable entropy from TPM 2.0 options RANDOM_ENABLE_KBD options RANDOM_ENABLE_MOUSE diff --git a/sys/amd64/conf/NOTES b/sys/amd64/conf/NOTES index d48fd10c0e62..efcc03623c05 100644 --- a/sys/amd64/conf/NOTES +++ b/sys/amd64/conf/NOTES @@ -43,9 +43,6 @@ cpu HAMMER # aka K8, aka Opteron & Athlon64 # Optional devices: # -# vt(4) drivers. -device vt_efifb # EFI framebuffer - # 3Dfx Voodoo Graphics, Voodoo II /dev/3dfx CDEV support. This will create # the /dev/3dfx0 device to work with glide implementations. This should get # linked to /dev/3dfx and /dev/voodoo. Note that this is not the same as @@ -116,6 +113,10 @@ device efidev # EFI RTC device efirtc +# Apple System Management Controller (SMC) +device asmc +options ASMC_DEBUG # Enable asmc(4)-specific debug logic. + # # Intel QuickAssist driver with OpenCrypto support # diff --git a/sys/amd64/include/vmm.h b/sys/amd64/include/vmm.h index 5cf1ae2d769c..eef8e6760fd6 100644 --- a/sys/amd64/include/vmm.h +++ b/sys/amd64/include/vmm.h @@ -123,6 +123,33 @@ enum x2apic_state { #define VM_INTINFO_SWINTR (4 << 8) #ifdef _KERNEL +#define VMM_VCPU_MD_FIELDS \ + struct vlapic *vlapic; /* (i) APIC device model */ \ + enum x2apic_state x2apic_state; /* (i) APIC mode */ \ + uint64_t exitintinfo; /* (i) events pending at VM exit */ \ + int nmi_pending; /* (i) NMI pending */ \ + int extint_pending; /* (i) INTR pending */ \ + int exception_pending; /* (i) exception pending */ \ + int exc_vector; /* (x) exception collateral */ \ + int exc_errcode_valid; \ + uint32_t exc_errcode; \ + struct savefpu *guestfpu; /* (a,i) guest fpu state */ \ + uint64_t guest_xcr0; /* (i) guest %xcr0 register */ \ + struct vm_exit exitinfo; /* (x) exit reason and collateral */ \ + cpuset_t exitinfo_cpuset; /* (x) storage for vmexit handlers */ \ + uint64_t nextrip; /* (x) next instruction to execute */ \ + uint64_t tsc_offset /* (o) TSC offsetting */ + +#define VMM_VM_MD_FIELDS \ + cpuset_t startup_cpus; /* (i) [r] waiting for startup */ \ + void *iommu; /* (x) iommu-specific data */ \ + struct vioapic *vioapic; /* (i) virtual ioapic */ \ + struct vatpic *vatpic; /* (i) virtual atpic */ \ + struct vatpit *vatpit; /* (i) virtual atpit */ \ + struct vpmtmr *vpmtmr; /* (i) virtual ACPI PM timer */ \ + struct vrtc *vrtc; /* (o) virtual RTC */ \ + struct vhpet *vhpet /* (i) virtual HPET */ + struct vm; struct vm_exception; struct vm_mem; @@ -133,17 +160,12 @@ struct vhpet; struct vioapic; struct vlapic; struct vmspace; +struct vm_eventinfo; struct vm_object; struct vm_guest_paging; struct pmap; enum snapshot_req; -struct vm_eventinfo { - cpuset_t *rptr; /* rendezvous cookie */ - int *sptr; /* suspend cookie */ - int *iptr; /* reqidle cookie */ -}; - #define DECLARE_VMMOPS_FUNC(ret_type, opname, args) \ typedef ret_type (*vmmops_##opname##_t) args; \ ret_type vmmops_##opname args @@ -206,20 +228,6 @@ struct vmm_ops { extern const struct vmm_ops vmm_ops_intel; extern const struct vmm_ops vmm_ops_amd; -int vm_create(const char *name, struct vm **retvm); -struct vcpu *vm_alloc_vcpu(struct vm *vm, int vcpuid); -void vm_disable_vcpu_creation(struct vm *vm); -void vm_lock_vcpus(struct vm *vm); -void vm_unlock_vcpus(struct vm *vm); -void vm_destroy(struct vm *vm); -int vm_reinit(struct vm *vm); -const char *vm_name(struct vm *vm); -uint16_t vm_get_maxcpus(struct vm *vm); -void vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, - uint16_t *threads, uint16_t *maxcpus); -int vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, - uint16_t threads, uint16_t maxcpus); - int vm_map_mmio(struct vm *vm, vm_paddr_t gpa, size_t len, vm_paddr_t hpa); int vm_unmap_mmio(struct vm *vm, vm_paddr_t gpa, size_t len); int vm_assign_pptdev(struct vm *vm, int bus, int slot, int func); @@ -232,16 +240,12 @@ int vm_get_seg_desc(struct vcpu *vcpu, int reg, int vm_set_seg_desc(struct vcpu *vcpu, int reg, struct seg_desc *desc); int vm_run(struct vcpu *vcpu); -int vm_suspend(struct vm *vm, enum vm_suspend_how how); int vm_inject_nmi(struct vcpu *vcpu); int vm_nmi_pending(struct vcpu *vcpu); void vm_nmi_clear(struct vcpu *vcpu); int vm_inject_extint(struct vcpu *vcpu); int vm_extint_pending(struct vcpu *vcpu); void vm_extint_clear(struct vcpu *vcpu); -int vcpu_vcpuid(struct vcpu *vcpu); -struct vm *vcpu_vm(struct vcpu *vcpu); -struct vcpu *vm_vcpu(struct vm *vm, int cpu); struct vlapic *vm_lapic(struct vcpu *vcpu); struct vioapic *vm_ioapic(struct vm *vm); struct vhpet *vm_hpet(struct vm *vm); @@ -250,9 +254,6 @@ int vm_set_capability(struct vcpu *vcpu, int type, int val); int vm_get_x2apic_state(struct vcpu *vcpu, enum x2apic_state *state); int vm_set_x2apic_state(struct vcpu *vcpu, enum x2apic_state state); int vm_apicid2vcpuid(struct vm *vm, int apicid); -int vm_activate_cpu(struct vcpu *vcpu); -int vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu); -int vm_resume_cpu(struct vm *vm, struct vcpu *vcpu); int vm_restart_instruction(struct vcpu *vcpu); struct vm_exit *vm_exitinfo(struct vcpu *vcpu); cpuset_t *vm_exitinfo_cpuset(struct vcpu *vcpu); @@ -265,57 +266,10 @@ int vm_snapshot_req(struct vm *vm, struct vm_snapshot_meta *meta); int vm_restore_time(struct vm *vm); #ifdef _SYS__CPUSET_H_ -/* - * Rendezvous all vcpus specified in 'dest' and execute 'func(arg)'. - * The rendezvous 'func(arg)' is not allowed to do anything that will - * cause the thread to be put to sleep. - * - * The caller cannot hold any locks when initiating the rendezvous. - * - * The implementation of this API may cause vcpus other than those specified - * by 'dest' to be stalled. The caller should not rely on any vcpus making - * forward progress when the rendezvous is in progress. - */ -typedef void (*vm_rendezvous_func_t)(struct vcpu *vcpu, void *arg); -int vm_smp_rendezvous(struct vcpu *vcpu, cpuset_t dest, - vm_rendezvous_func_t func, void *arg); - -cpuset_t vm_active_cpus(struct vm *vm); -cpuset_t vm_debug_cpus(struct vm *vm); -cpuset_t vm_suspended_cpus(struct vm *vm); cpuset_t vm_start_cpus(struct vm *vm, const cpuset_t *tostart); void vm_await_start(struct vm *vm, const cpuset_t *waiting); #endif /* _SYS__CPUSET_H_ */ -static __inline int -vcpu_rendezvous_pending(struct vcpu *vcpu, struct vm_eventinfo *info) -{ - /* - * This check isn't done with atomic operations or under a lock because - * there's no need to. If the vcpuid bit is set, the vcpu is part of a - * rendezvous and the bit won't be cleared until the vcpu enters the - * rendezvous. On rendezvous exit, the cpuset is cleared and the vcpu - * will see an empty cpuset. So, the races are harmless. - */ - return (CPU_ISSET(vcpu_vcpuid(vcpu), info->rptr)); -} - -static __inline int -vcpu_suspended(struct vm_eventinfo *info) -{ - - return (*info->sptr); -} - -static __inline int -vcpu_reqidle(struct vm_eventinfo *info) -{ - - return (*info->iptr); -} - -int vcpu_debugged(struct vcpu *vcpu); - /* * Return true if device indicated by bus/slot/func is supposed to be a * pci passthrough device. @@ -326,38 +280,7 @@ bool vmm_is_pptdev(int bus, int slot, int func); void *vm_iommu_domain(struct vm *vm); -enum vcpu_state { - VCPU_IDLE, - VCPU_FROZEN, - VCPU_RUNNING, - VCPU_SLEEPING, -}; - -int vcpu_set_state(struct vcpu *vcpu, enum vcpu_state state, bool from_idle); -int vcpu_set_state_all(struct vm *vm, enum vcpu_state state); -enum vcpu_state vcpu_get_state(struct vcpu *vcpu, int *hostcpu); - -static int __inline -vcpu_is_running(struct vcpu *vcpu, int *hostcpu) -{ - return (vcpu_get_state(vcpu, hostcpu) == VCPU_RUNNING); -} - -#ifdef _SYS_PROC_H_ -static int __inline -vcpu_should_yield(struct vcpu *vcpu) -{ - struct thread *td; - - td = curthread; - return (td->td_ast != 0 || td->td_owepreempt != 0); -} -#endif - -void *vcpu_stats(struct vcpu *vcpu); -void vcpu_notify_event(struct vcpu *vcpu); void vcpu_notify_lapic(struct vcpu *vcpu); -struct vm_mem *vm_mem(struct vm *vm); struct vatpic *vm_atpic(struct vm *vm); struct vatpit *vm_atpit(struct vm *vm); struct vpmtmr *vm_pmtmr(struct vm *vm); diff --git a/sys/amd64/vmm/amd/svm.c b/sys/amd64/vmm/amd/svm.c index 2fe6a5bc3584..37c950cfbc5f 100644 --- a/sys/amd64/vmm/amd/svm.c +++ b/sys/amd64/vmm/amd/svm.c @@ -50,12 +50,12 @@ #include <machine/specialreg.h> #include <machine/smp.h> #include <machine/vmm.h> -#include <machine/vmm_dev.h> #include <machine/vmm_instruction_emul.h> #include <machine/vmm_snapshot.h> #include <dev/vmm/vmm_ktr.h> #include <dev/vmm/vmm_mem.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_lapic.h" #include "vmm_stat.h" diff --git a/sys/amd64/vmm/intel/vmx.c b/sys/amd64/vmm/intel/vmx.c index 4189c1214b40..7a2d0de6beff 100644 --- a/sys/amd64/vmm/intel/vmx.c +++ b/sys/amd64/vmm/intel/vmx.c @@ -53,13 +53,13 @@ #include <machine/vmparam.h> #include <machine/vmm.h> -#include <machine/vmm_dev.h> #include <machine/vmm_instruction_emul.h> #include <machine/vmm_snapshot.h> #include <dev/vmm/vmm_dev.h> #include <dev/vmm/vmm_ktr.h> #include <dev/vmm/vmm_mem.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_lapic.h" #include "vmm_host.h" diff --git a/sys/amd64/vmm/io/vhpet.c b/sys/amd64/vmm/io/vhpet.c index 88063f2952e5..b01736a56c00 100644 --- a/sys/amd64/vmm/io/vhpet.c +++ b/sys/amd64/vmm/io/vhpet.c @@ -38,11 +38,13 @@ #include <sys/systm.h> #include <machine/vmm.h> -#include <machine/vmm_dev.h> #include <machine/vmm_snapshot.h> #include <dev/acpica/acpi_hpet.h> + +#include <dev/vmm/vmm_dev.h> #include <dev/vmm/vmm_ktr.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_lapic.h" #include "vatpic.h" diff --git a/sys/amd64/vmm/io/vioapic.c b/sys/amd64/vmm/io/vioapic.c index 7df6193d6dc0..a3956785d049 100644 --- a/sys/amd64/vmm/io/vioapic.c +++ b/sys/amd64/vmm/io/vioapic.c @@ -43,6 +43,7 @@ #include <machine/vmm_snapshot.h> #include <dev/vmm/vmm_ktr.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_lapic.h" #include "vlapic.h" diff --git a/sys/amd64/vmm/io/vlapic.c b/sys/amd64/vmm/io/vlapic.c index afd5045de574..6849ef7aa589 100644 --- a/sys/amd64/vmm/io/vlapic.c +++ b/sys/amd64/vmm/io/vlapic.c @@ -47,6 +47,7 @@ #include <machine/vmm_snapshot.h> #include <dev/vmm/vmm_ktr.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_lapic.h" #include "vmm_stat.h" diff --git a/sys/amd64/vmm/vmm.c b/sys/amd64/vmm/vmm.c index f3f9717129c9..6312fafa2975 100644 --- a/sys/amd64/vmm/vmm.c +++ b/sys/amd64/vmm/vmm.c @@ -71,6 +71,7 @@ #include <dev/vmm/vmm_dev.h> #include <dev/vmm/vmm_ktr.h> #include <dev/vmm/vmm_mem.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_ioport.h" #include "vmm_host.h" @@ -91,88 +92,6 @@ struct vlapic; -/* - * Initialization: - * (a) allocated when vcpu is created - * (i) initialized when vcpu is created and when it is reinitialized - * (o) initialized the first time the vcpu is created - * (x) initialized before use - */ -struct vcpu { - struct mtx mtx; /* (o) protects 'state' and 'hostcpu' */ - enum vcpu_state state; /* (o) vcpu state */ - int vcpuid; /* (o) */ - int hostcpu; /* (o) vcpu's host cpu */ - int reqidle; /* (i) request vcpu to idle */ - struct vm *vm; /* (o) */ - void *cookie; /* (i) cpu-specific data */ - struct vlapic *vlapic; /* (i) APIC device model */ - enum x2apic_state x2apic_state; /* (i) APIC mode */ - uint64_t exitintinfo; /* (i) events pending at VM exit */ - int nmi_pending; /* (i) NMI pending */ - int extint_pending; /* (i) INTR pending */ - int exception_pending; /* (i) exception pending */ - int exc_vector; /* (x) exception collateral */ - int exc_errcode_valid; - uint32_t exc_errcode; - struct savefpu *guestfpu; /* (a,i) guest fpu state */ - uint64_t guest_xcr0; /* (i) guest %xcr0 register */ - void *stats; /* (a,i) statistics */ - struct vm_exit exitinfo; /* (x) exit reason and collateral */ - cpuset_t exitinfo_cpuset; /* (x) storage for vmexit handlers */ - uint64_t nextrip; /* (x) next instruction to execute */ - uint64_t tsc_offset; /* (o) TSC offsetting */ -}; - -#define vcpu_lock_init(v) mtx_init(&((v)->mtx), "vcpu lock", 0, MTX_SPIN) -#define vcpu_lock_destroy(v) mtx_destroy(&((v)->mtx)) -#define vcpu_lock(v) mtx_lock_spin(&((v)->mtx)) -#define vcpu_unlock(v) mtx_unlock_spin(&((v)->mtx)) -#define vcpu_assert_locked(v) mtx_assert(&((v)->mtx), MA_OWNED) - -/* - * Initialization: - * (o) initialized the first time the VM is created - * (i) initialized when VM is created and when it is reinitialized - * (x) initialized before use - * - * Locking: - * [m] mem_segs_lock - * [r] rendezvous_mtx - * [v] reads require one frozen vcpu, writes require freezing all vcpus - */ -struct vm { - void *cookie; /* (i) cpu-specific data */ - void *iommu; /* (x) iommu-specific data */ - struct vhpet *vhpet; /* (i) virtual HPET */ - struct vioapic *vioapic; /* (i) virtual ioapic */ - struct vatpic *vatpic; /* (i) virtual atpic */ - struct vatpit *vatpit; /* (i) virtual atpit */ - struct vpmtmr *vpmtmr; /* (i) virtual ACPI PM timer */ - struct vrtc *vrtc; /* (o) virtual RTC */ - volatile cpuset_t active_cpus; /* (i) active vcpus */ - volatile cpuset_t debug_cpus; /* (i) vcpus stopped for debug */ - cpuset_t startup_cpus; /* (i) [r] waiting for startup */ - int suspend; /* (i) stop VM execution */ - bool dying; /* (o) is dying */ - volatile cpuset_t suspended_cpus; /* (i) suspended vcpus */ - volatile cpuset_t halted_cpus; /* (x) cpus in a hard halt */ - cpuset_t rendezvous_req_cpus; /* (x) [r] rendezvous requested */ - cpuset_t rendezvous_done_cpus; /* (x) [r] rendezvous finished */ - void *rendezvous_arg; /* (x) [r] rendezvous func/arg */ - vm_rendezvous_func_t rendezvous_func; - struct mtx rendezvous_mtx; /* (o) rendezvous lock */ - struct vm_mem mem; /* (i) [m+v] guest memory */ - char name[VM_MAX_NAMELEN+1]; /* (o) virtual machine name */ - struct vcpu **vcpu; /* (o) guest vcpus */ - /* The following describe the vm cpu topology */ - uint16_t sockets; /* (o) num of sockets */ - uint16_t cores; /* (o) num of cores/socket */ - uint16_t threads; /* (o) num of threads/core */ - uint16_t maxcpus; /* (o) max pluggable cpus */ - struct sx vcpus_init_lock; /* (o) */ -}; - #define VMM_CTR0(vcpu, format) \ VCPU_CTR0((vcpu)->vm, (vcpu)->vcpuid, format) @@ -242,8 +161,7 @@ static MALLOC_DEFINE(M_VM, "vm", "vm"); /* statistics */ static VMM_STAT(VCPU_TOTAL_RUNTIME, "vcpu total runtime"); -SYSCTL_NODE(_hw, OID_AUTO, vmm, CTLFLAG_RW | CTLFLAG_MPSAFE, NULL, - NULL); +SYSCTL_DECL(_hw_vmm); /* * Halt the guest if all vcpus are executing a HLT instruction with @@ -254,10 +172,6 @@ SYSCTL_INT(_hw_vmm, OID_AUTO, halt_detection, CTLFLAG_RDTUN, &halt_detection_enabled, 0, "Halt VM if all vcpus execute HLT with interrupts disabled"); -static int vmm_ipinum; -SYSCTL_INT(_hw_vmm, OID_AUTO, ipinum, CTLFLAG_RD, &vmm_ipinum, 0, - "IPI vector used for vcpu notifications"); - static int trace_guest_exceptions; SYSCTL_INT(_hw_vmm, OID_AUTO, trace_guest_exceptions, CTLFLAG_RDTUN, &trace_guest_exceptions, 0, @@ -267,8 +181,6 @@ static int trap_wbinvd; SYSCTL_INT(_hw_vmm, OID_AUTO, trap_wbinvd, CTLFLAG_RDTUN, &trap_wbinvd, 0, "WBINVD triggers a VM-exit"); -static void vcpu_notify_event_locked(struct vcpu *vcpu); - /* global statistics */ VMM_STAT(VCPU_MIGRATIONS, "vcpu migration across host cpus"); VMM_STAT(VMEXIT_COUNT, "total number of vm exits"); @@ -365,7 +277,6 @@ vcpu_init(struct vcpu *vcpu) int vcpu_trace_exceptions(struct vcpu *vcpu) { - return (trace_guest_exceptions); } @@ -445,14 +356,6 @@ vm_init(struct vm *vm, bool create) } } -void -vm_disable_vcpu_creation(struct vm *vm) -{ - sx_xlock(&vm->vcpus_init_lock); - vm->dying = true; - sx_xunlock(&vm->vcpus_init_lock); -} - struct vcpu * vm_alloc_vcpu(struct vm *vm, int vcpuid) { @@ -483,18 +386,6 @@ vm_alloc_vcpu(struct vm *vm, int vcpuid) return (vcpu); } -void -vm_lock_vcpus(struct vm *vm) -{ - sx_xlock(&vm->vcpus_init_lock); -} - -void -vm_unlock_vcpus(struct vm *vm) -{ - sx_unlock(&vm->vcpus_init_lock); -} - int vm_create(const char *name, struct vm **retvm) { @@ -524,35 +415,6 @@ vm_create(const char *name, struct vm **retvm) return (0); } -void -vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, - uint16_t *threads, uint16_t *maxcpus) -{ - *sockets = vm->sockets; - *cores = vm->cores; - *threads = vm->threads; - *maxcpus = vm->maxcpus; -} - -uint16_t -vm_get_maxcpus(struct vm *vm) -{ - return (vm->maxcpus); -} - -int -vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, - uint16_t threads, uint16_t maxcpus __unused) -{ - /* Ignore maxcpus. */ - if ((sockets * cores * threads) > vm->maxcpus) - return (EINVAL); - vm->sockets = sockets; - vm->cores = cores; - vm->threads = threads; - return(0); -} - static void vm_cleanup(struct vm *vm, bool destroy) { @@ -601,29 +463,11 @@ vm_destroy(struct vm *vm) free(vm, M_VM); } -int -vm_reinit(struct vm *vm) -{ - int error; - - /* - * A virtual machine can be reset only if all vcpus are suspended. - */ - if (CPU_CMP(&vm->suspended_cpus, &vm->active_cpus) == 0) { - vm_cleanup(vm, false); - vm_init(vm, false); - error = 0; - } else { - error = EBUSY; - } - - return (error); -} - -const char * -vm_name(struct vm *vm) +void +vm_reset(struct vm *vm) { - return (vm->name); + vm_cleanup(vm, false); + vm_init(vm, false); } int @@ -891,210 +735,6 @@ save_guest_fpustate(struct vcpu *vcpu) static VMM_STAT(VCPU_IDLE_TICKS, "number of ticks vcpu was idle"); -/* - * Invoke the rendezvous function on the specified vcpu if applicable. Return - * true if the rendezvous is finished, false otherwise. - */ -static bool -vm_rendezvous(struct vcpu *vcpu) -{ - struct vm *vm = vcpu->vm; - int vcpuid; - - mtx_assert(&vcpu->vm->rendezvous_mtx, MA_OWNED); - KASSERT(vcpu->vm->rendezvous_func != NULL, - ("vm_rendezvous: no rendezvous pending")); - - /* 'rendezvous_req_cpus' must be a subset of 'active_cpus' */ - CPU_AND(&vm->rendezvous_req_cpus, &vm->rendezvous_req_cpus, - &vm->active_cpus); - - vcpuid = vcpu->vcpuid; - if (CPU_ISSET(vcpuid, &vm->rendezvous_req_cpus) && - !CPU_ISSET(vcpuid, &vm->rendezvous_done_cpus)) { - VMM_CTR0(vcpu, "Calling rendezvous func"); - (*vm->rendezvous_func)(vcpu, vm->rendezvous_arg); - CPU_SET(vcpuid, &vm->rendezvous_done_cpus); - } - if (CPU_CMP(&vm->rendezvous_req_cpus, - &vm->rendezvous_done_cpus) == 0) { - VMM_CTR0(vcpu, "Rendezvous completed"); - CPU_ZERO(&vm->rendezvous_req_cpus); - vm->rendezvous_func = NULL; - wakeup(&vm->rendezvous_func); - return (true); - } - return (false); -} - -static void -vcpu_wait_idle(struct vcpu *vcpu) -{ - KASSERT(vcpu->state != VCPU_IDLE, ("vcpu already idle")); - - vcpu->reqidle = 1; - vcpu_notify_event_locked(vcpu); - VMM_CTR1(vcpu, "vcpu state change from %s to " - "idle requested", vcpu_state2str(vcpu->state)); - msleep_spin(&vcpu->state, &vcpu->mtx, "vmstat", hz); -} - -static int -vcpu_set_state_locked(struct vcpu *vcpu, enum vcpu_state newstate, - bool from_idle) -{ - int error; - - vcpu_assert_locked(vcpu); - - /* - * State transitions from the vmmdev_ioctl() must always begin from - * the VCPU_IDLE state. This guarantees that there is only a single - * ioctl() operating on a vcpu at any point. - */ - if (from_idle) { - while (vcpu->state != VCPU_IDLE) - vcpu_wait_idle(vcpu); - } else { - KASSERT(vcpu->state != VCPU_IDLE, ("invalid transition from " - "vcpu idle state")); - } - - if (vcpu->state == VCPU_RUNNING) { - KASSERT(vcpu->hostcpu == curcpu, ("curcpu %d and hostcpu %d " - "mismatch for running vcpu", curcpu, vcpu->hostcpu)); - } else { - KASSERT(vcpu->hostcpu == NOCPU, ("Invalid hostcpu %d for a " - "vcpu that is not running", vcpu->hostcpu)); - } - - /* - * The following state transitions are allowed: - * IDLE -> FROZEN -> IDLE - * FROZEN -> RUNNING -> FROZEN - * FROZEN -> SLEEPING -> FROZEN - */ - switch (vcpu->state) { - case VCPU_IDLE: - case VCPU_RUNNING: - case VCPU_SLEEPING: - error = (newstate != VCPU_FROZEN); - break; - case VCPU_FROZEN: - error = (newstate == VCPU_FROZEN); - break; - default: - error = 1; - break; - } - - if (error) - return (EBUSY); - - VMM_CTR2(vcpu, "vcpu state changed from %s to %s", - vcpu_state2str(vcpu->state), vcpu_state2str(newstate)); - - vcpu->state = newstate; - if (newstate == VCPU_RUNNING) - vcpu->hostcpu = curcpu; - else - vcpu->hostcpu = NOCPU; - - if (newstate == VCPU_IDLE) - wakeup(&vcpu->state); - - return (0); -} - -/* - * Try to lock all of the vCPUs in the VM while taking care to avoid deadlocks - * with vm_smp_rendezvous(). - * - * The complexity here suggests that the rendezvous mechanism needs a rethink. - */ -int -vcpu_set_state_all(struct vm *vm, enum vcpu_state newstate) -{ - cpuset_t locked; - struct vcpu *vcpu; - int error, i; - uint16_t maxcpus; - - KASSERT(newstate != VCPU_IDLE, - ("vcpu_set_state_all: invalid target state %d", newstate)); - - error = 0; - CPU_ZERO(&locked); - maxcpus = vm->maxcpus; - - mtx_lock(&vm->rendezvous_mtx); -restart: - if (vm->rendezvous_func != NULL) { - /* - * If we have a pending rendezvous, then the initiator may be - * blocked waiting for other vCPUs to execute the callback. The - * current thread may be a vCPU thread so we must not block - * waiting for the initiator, otherwise we get a deadlock. - * Thus, execute the callback on behalf of any idle vCPUs. - */ - for (i = 0; i < maxcpus; i++) { - vcpu = vm_vcpu(vm, i); - if (vcpu == NULL) - continue; - vcpu_lock(vcpu); - if (vcpu->state == VCPU_IDLE) { - (void)vcpu_set_state_locked(vcpu, VCPU_FROZEN, - true); - CPU_SET(i, &locked); - } - if (CPU_ISSET(i, &locked)) { - /* - * We can safely execute the callback on this - * vCPU's behalf. - */ - vcpu_unlock(vcpu); - (void)vm_rendezvous(vcpu); - vcpu_lock(vcpu); - } - vcpu_unlock(vcpu); - } - } - - /* - * Now wait for remaining vCPUs to become idle. This may include the - * initiator of a rendezvous that is currently blocked on the rendezvous - * mutex. - */ - CPU_FOREACH_ISCLR(i, &locked) { - if (i >= maxcpus) - break; - vcpu = vm_vcpu(vm, i); - if (vcpu == NULL) - continue; - vcpu_lock(vcpu); - while (vcpu->state != VCPU_IDLE) { - mtx_unlock(&vm->rendezvous_mtx); - vcpu_wait_idle(vcpu); - vcpu_unlock(vcpu); - mtx_lock(&vm->rendezvous_mtx); - if (vm->rendezvous_func != NULL) - goto restart; - vcpu_lock(vcpu); - } - error = vcpu_set_state_locked(vcpu, newstate, true); - vcpu_unlock(vcpu); - if (error != 0) { - /* Roll back state changes. */ - CPU_FOREACH_ISSET(i, &locked) - (void)vcpu_set_state(vcpu, VCPU_IDLE, false); - break; - } - CPU_SET(i, &locked); - } - mtx_unlock(&vm->rendezvous_mtx); - return (error); -} - static void vcpu_require_state(struct vcpu *vcpu, enum vcpu_state newstate) { @@ -1113,37 +753,6 @@ vcpu_require_state_locked(struct vcpu *vcpu, enum vcpu_state newstate) panic("Error %d setting state to %d", error, newstate); } -static int -vm_handle_rendezvous(struct vcpu *vcpu) -{ - struct vm *vm; - struct thread *td; - - td = curthread; - vm = vcpu->vm; - - mtx_lock(&vm->rendezvous_mtx); - while (vm->rendezvous_func != NULL) { - if (vm_rendezvous(vcpu)) - break; - - VMM_CTR0(vcpu, "Wait for rendezvous completion"); - mtx_sleep(&vm->rendezvous_func, &vm->rendezvous_mtx, 0, - "vmrndv", hz); - if (td_ast_pending(td, TDA_SUSPEND)) { - int error; - - mtx_unlock(&vm->rendezvous_mtx); - error = thread_check_susp(td, true); - if (error != 0) - return (error); - mtx_lock(&vm->rendezvous_mtx); - } - } - mtx_unlock(&vm->rendezvous_mtx); - return (0); -} - /* * Emulate a guest 'hlt' by sleeping until the vcpu is ready to run. */ @@ -1467,33 +1076,6 @@ vm_handle_db(struct vcpu *vcpu, struct vm_exit *vme, bool *retu) return (0); } -int -vm_suspend(struct vm *vm, enum vm_suspend_how how) -{ - int i; - - if (how <= VM_SUSPEND_NONE || how >= VM_SUSPEND_LAST) - return (EINVAL); - - if (atomic_cmpset_int(&vm->suspend, 0, how) == 0) { - VM_CTR2(vm, "virtual machine already suspended %d/%d", - vm->suspend, how); - return (EALREADY); - } - - VM_CTR1(vm, "virtual machine successfully suspended %d", how); - - /* - * Notify all active vcpus that they are now suspended. - */ - for (i = 0; i < vm->maxcpus; i++) { - if (CPU_ISSET(i, &vm->active_cpus)) - vcpu_notify_event(vm_vcpu(vm, i)); - } - - return (0); -} - void vm_exit_suspended(struct vcpu *vcpu, uint64_t rip) { @@ -2033,24 +1615,6 @@ vm_set_capability(struct vcpu *vcpu, int type, int val) return (vmmops_setcap(vcpu->cookie, type, val)); } -struct vm * -vcpu_vm(struct vcpu *vcpu) -{ - return (vcpu->vm); -} - -int -vcpu_vcpuid(struct vcpu *vcpu) -{ - return (vcpu->vcpuid); -} - -struct vcpu * -vm_vcpu(struct vm *vm, int vcpuid) -{ - return (vm->vcpu[vcpuid]); -} - struct vlapic * vm_lapic(struct vcpu *vcpu) { @@ -2120,107 +1684,6 @@ vm_iommu_domain(struct vm *vm) return (vm->iommu); } -int -vcpu_set_state(struct vcpu *vcpu, enum vcpu_state newstate, bool from_idle) -{ - int error; - - vcpu_lock(vcpu); - error = vcpu_set_state_locked(vcpu, newstate, from_idle); - vcpu_unlock(vcpu); - - return (error); -} - -enum vcpu_state -vcpu_get_state(struct vcpu *vcpu, int *hostcpu) -{ - enum vcpu_state state; - - vcpu_lock(vcpu); - state = vcpu->state; - if (hostcpu != NULL) - *hostcpu = vcpu->hostcpu; - vcpu_unlock(vcpu); - - return (state); -} - -int -vm_activate_cpu(struct vcpu *vcpu) -{ - struct vm *vm = vcpu->vm; - - if (CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) - return (EBUSY); - - VMM_CTR0(vcpu, "activated"); - CPU_SET_ATOMIC(vcpu->vcpuid, &vm->active_cpus); - return (0); -} - -int -vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu) -{ - if (vcpu == NULL) { - vm->debug_cpus = vm->active_cpus; - for (int i = 0; i < vm->maxcpus; i++) { - if (CPU_ISSET(i, &vm->active_cpus)) - vcpu_notify_event(vm_vcpu(vm, i)); - } - } else { - if (!CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) - return (EINVAL); - - CPU_SET_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); - vcpu_notify_event(vcpu); - } - return (0); -} - -int -vm_resume_cpu(struct vm *vm, struct vcpu *vcpu) -{ - - if (vcpu == NULL) { - CPU_ZERO(&vm->debug_cpus); - } else { - if (!CPU_ISSET(vcpu->vcpuid, &vm->debug_cpus)) - return (EINVAL); - - CPU_CLR_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); - } - return (0); -} - -int -vcpu_debugged(struct vcpu *vcpu) -{ - - return (CPU_ISSET(vcpu->vcpuid, &vcpu->vm->debug_cpus)); -} - -cpuset_t -vm_active_cpus(struct vm *vm) -{ - - return (vm->active_cpus); -} - -cpuset_t -vm_debug_cpus(struct vm *vm) -{ - - return (vm->debug_cpus); -} - -cpuset_t -vm_suspended_cpus(struct vm *vm) -{ - - return (vm->suspended_cpus); -} - /* * Returns the subset of vCPUs in tostart that are awaiting startup. * These vCPUs are also marked as no longer awaiting startup. @@ -2245,13 +1708,6 @@ vm_await_start(struct vm *vm, const cpuset_t *waiting) mtx_unlock(&vm->rendezvous_mtx); } -void * -vcpu_stats(struct vcpu *vcpu) -{ - - return (vcpu->stats); -} - int vm_get_x2apic_state(struct vcpu *vcpu, enum x2apic_state *state) { @@ -2273,47 +1729,6 @@ vm_set_x2apic_state(struct vcpu *vcpu, enum x2apic_state state) return (0); } -/* - * This function is called to ensure that a vcpu "sees" a pending event - * as soon as possible: - * - If the vcpu thread is sleeping then it is woken up. - * - If the vcpu is running on a different host_cpu then an IPI will be directed - * to the host_cpu to cause the vcpu to trap into the hypervisor. - */ -static void -vcpu_notify_event_locked(struct vcpu *vcpu) -{ - int hostcpu; - - hostcpu = vcpu->hostcpu; - if (vcpu->state == VCPU_RUNNING) { - KASSERT(hostcpu != NOCPU, ("vcpu running on invalid hostcpu")); - if (hostcpu != curcpu) { - ipi_cpu(hostcpu, vmm_ipinum); - } else { - /* - * If the 'vcpu' is running on 'curcpu' then it must - * be sending a notification to itself (e.g. SELF_IPI). - * The pending event will be picked up when the vcpu - * transitions back to guest context. - */ - } - } else { - KASSERT(hostcpu == NOCPU, ("vcpu state %d not consistent " - "with hostcpu %d", vcpu->state, hostcpu)); - if (vcpu->state == VCPU_SLEEPING) - wakeup_one(vcpu); - } -} - -void -vcpu_notify_event(struct vcpu *vcpu) -{ - vcpu_lock(vcpu); - vcpu_notify_event_locked(vcpu); - vcpu_unlock(vcpu); -} - void vcpu_notify_lapic(struct vcpu *vcpu) { @@ -2325,12 +1740,6 @@ vcpu_notify_lapic(struct vcpu *vcpu) vcpu_unlock(vcpu); } -struct vm_mem * -vm_mem(struct vm *vm) -{ - return (&vm->mem); -} - int vm_apicid2vcpuid(struct vm *vm, int apicid) { diff --git a/sys/amd64/vmm/vmm_ioport.c b/sys/amd64/vmm/vmm_ioport.c index 8aab28f5e68e..65710c8de717 100644 --- a/sys/amd64/vmm/vmm_ioport.c +++ b/sys/amd64/vmm/vmm_ioport.c @@ -33,6 +33,7 @@ #include <machine/vmm_instruction_emul.h> #include <dev/vmm/vmm_ktr.h> +#include <dev/vmm/vmm_vm.h> #include "vatpic.h" #include "vatpit.h" diff --git a/sys/amd64/vmm/vmm_lapic.c b/sys/amd64/vmm/vmm_lapic.c index 63bdee69bb59..44bae5da31e5 100644 --- a/sys/amd64/vmm/vmm_lapic.c +++ b/sys/amd64/vmm/vmm_lapic.c @@ -34,6 +34,7 @@ #include <x86/apicreg.h> #include <dev/vmm/vmm_ktr.h> +#include <dev/vmm/vmm_vm.h> #include <machine/vmm.h> #include "vmm_lapic.h" diff --git a/sys/amd64/vmm/x86.c b/sys/amd64/vmm/x86.c index 2e2224595ab4..f32107124eb8 100644 --- a/sys/amd64/vmm/x86.c +++ b/sys/amd64/vmm/x86.c @@ -39,6 +39,7 @@ #include <machine/vmm.h> #include <dev/vmm/vmm_ktr.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_host.h" #include "vmm_util.h" diff --git a/sys/arm64/arm64/exec_machdep.c b/sys/arm64/arm64/exec_machdep.c index 7c50dc93fdb4..207e10ede96c 100644 --- a/sys/arm64/arm64/exec_machdep.c +++ b/sys/arm64/arm64/exec_machdep.c @@ -60,6 +60,10 @@ #include <machine/vfp.h> #endif +#define CTX_SIZE_SVE(buf_size) \ + roundup2(sizeof(struct sve_context) + (buf_size), \ + _Alignof(struct sve_context)) + _Static_assert(sizeof(mcontext_t) == 880, "mcontext_t size incorrect"); _Static_assert(sizeof(ucontext_t) == 960, "ucontext_t size incorrect"); _Static_assert(sizeof(siginfo_t) == 80, "siginfo_t size incorrect"); @@ -585,8 +589,7 @@ set_mcontext(struct thread *td, mcontext_t *mcp) buf_size = sve_buf_size(td); /* Check the size is valid */ - if (ctx.ctx_size != - (sizeof(sve_ctx) + buf_size)) + if (ctx.ctx_size != CTX_SIZE_SVE(buf_size)) return (EINVAL); memset(pcb->pcb_svesaved, 0, @@ -729,7 +732,7 @@ sendsig_ctx_sve(struct thread *td, vm_offset_t *addrp) { struct sve_context ctx; struct pcb *pcb; - size_t buf_size; + size_t buf_size, ctx_size; vm_offset_t ctx_addr; pcb = td->td_pcb; @@ -740,14 +743,15 @@ sendsig_ctx_sve(struct thread *td, vm_offset_t *addrp) MPASS(pcb->pcb_svesaved != NULL); buf_size = sve_buf_size(td); + ctx_size = CTX_SIZE_SVE(buf_size); /* Address for the full context */ - *addrp -= sizeof(ctx) + buf_size; + *addrp -= ctx_size; ctx_addr = *addrp; memset(&ctx, 0, sizeof(ctx)); ctx.sve_ctx.ctx_id = ARM64_CTX_SVE; - ctx.sve_ctx.ctx_size = sizeof(ctx) + buf_size; + ctx.sve_ctx.ctx_size = ctx_size; ctx.sve_vector_len = pcb->pcb_sve_len; ctx.sve_flags = 0; diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S index c22d5fe76468..46d3bac576e8 100644 --- a/sys/arm64/arm64/locore.S +++ b/sys/arm64/arm64/locore.S @@ -997,7 +997,7 @@ LEND(link_l2_pagetable) * VA start (x8) modulo L3C_SIZE must equal PA start (x9) modulo L3C_SIZE. */ LENTRY(build_l3_page_pagetable) - cbz x10, 2f + cbz x10, 4f /* * Build the L3 table entry. */ @@ -1037,7 +1037,7 @@ LENTRY(build_l3_page_pagetable) add x11, x11, #1 add x9, x9, #1 cbnz x10, 1b -2: +4: ret LEND(build_l3_page_pagetable) diff --git a/sys/arm64/conf/NOTES b/sys/arm64/conf/NOTES index e773253da6d7..102066025e8f 100644 --- a/sys/arm64/conf/NOTES +++ b/sys/arm64/conf/NOTES @@ -92,6 +92,7 @@ device al_eth # Annapurna Alpine Ethernet NIC device dwc # Synopsys Designware GMAC Ethernet device dwc_rk # Rockchip Designware device dwc_socfpga # Altera SOCFPGA Ethernet MAC +device ixl # Intel 700 Series Physical Function device ice # Intel 800 Series Physical Function device ice_ddp # Intel 800 Series DDP Package diff --git a/sys/arm64/include/vmm.h b/sys/arm64/include/vmm.h index e67540eac66d..f076bd07f323 100644 --- a/sys/arm64/include/vmm.h +++ b/sys/arm64/include/vmm.h @@ -107,7 +107,39 @@ enum vm_reg_name { #define VM_GUEST_BASE_IPA 0x80000000UL /* Guest kernel start ipa */ #ifdef _KERNEL +#include <machine/vmm_instruction_emul.h> + +#define VMM_VCPU_MD_FIELDS \ + struct vm_exit exitinfo; \ + uint64_t nextpc; /* (x) next instruction to execute */ \ + struct vfpstate *guestfpu /* (a,i) guest fpu state */ + +#define VMM_VM_MD_FIELDS \ + struct vmm_mmio_region mmio_region[VM_MAX_MMIO_REGIONS]; \ + struct vmm_special_reg special_reg[VM_MAX_SPECIAL_REGS] + +struct vmm_mmio_region { + uint64_t start; + uint64_t end; + mem_region_read_t read; + mem_region_write_t write; +}; +#define VM_MAX_MMIO_REGIONS 4 + +struct vmm_special_reg { + uint32_t esr_iss; + uint32_t esr_mask; + reg_read_t reg_read; + reg_write_t reg_write; + void *arg; +}; +#define VM_MAX_SPECIAL_REGS 16 + +#define DECLARE_VMMOPS_FUNC(ret_type, opname, args) \ + ret_type vmmops_##opname args + struct vm; +struct vm_eventinfo; struct vm_exception; struct vm_exit; struct vm_run; @@ -116,15 +148,6 @@ struct vm_guest_paging; struct vm_vgic_descr; struct pmap; -struct vm_eventinfo { - void *rptr; /* rendezvous cookie */ - int *sptr; /* suspend cookie */ - int *iptr; /* reqidle cookie */ -}; - -#define DECLARE_VMMOPS_FUNC(ret_type, opname, args) \ - ret_type vmmops_##opname args - DECLARE_VMMOPS_FUNC(int, modinit, (int ipinum)); DECLARE_VMMOPS_FUNC(int, modcleanup, (void)); DECLARE_VMMOPS_FUNC(void *, init, (struct vm *vm, struct pmap *pmap)); @@ -153,34 +176,13 @@ DECLARE_VMMOPS_FUNC(int, restore_tsc, (void *vcpui, uint64_t now)); #endif #endif -int vm_create(const char *name, struct vm **retvm); -struct vcpu *vm_alloc_vcpu(struct vm *vm, int vcpuid); -void vm_disable_vcpu_creation(struct vm *vm); -void vm_lock_vcpus(struct vm *vm); -void vm_unlock_vcpus(struct vm *vm); -void vm_destroy(struct vm *vm); -int vm_reinit(struct vm *vm); -const char *vm_name(struct vm *vm); - -uint16_t vm_get_maxcpus(struct vm *vm); -void vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, - uint16_t *threads, uint16_t *maxcpus); -int vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, - uint16_t threads, uint16_t maxcpus); int vm_get_register(struct vcpu *vcpu, int reg, uint64_t *retval); int vm_set_register(struct vcpu *vcpu, int reg, uint64_t val); int vm_run(struct vcpu *vcpu); -int vm_suspend(struct vm *vm, enum vm_suspend_how how); void* vm_get_cookie(struct vm *vm); -int vcpu_vcpuid(struct vcpu *vcpu); void *vcpu_get_cookie(struct vcpu *vcpu); -struct vm *vcpu_vm(struct vcpu *vcpu); -struct vcpu *vm_vcpu(struct vm *vm, int cpu); int vm_get_capability(struct vcpu *vcpu, int type, int *val); int vm_set_capability(struct vcpu *vcpu, int type, int val); -int vm_activate_cpu(struct vcpu *vcpu); -int vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu); -int vm_resume_cpu(struct vm *vm, struct vcpu *vcpu); int vm_inject_exception(struct vcpu *vcpu, uint64_t esr, uint64_t far); int vm_attach_vgic(struct vm *vm, struct vm_vgic_descr *descr); int vm_assert_irq(struct vm *vm, uint32_t irq); @@ -190,62 +192,8 @@ int vm_raise_msi(struct vm *vm, uint64_t msg, uint64_t addr, int bus, int slot, struct vm_exit *vm_exitinfo(struct vcpu *vcpu); void vm_exit_suspended(struct vcpu *vcpu, uint64_t pc); void vm_exit_debug(struct vcpu *vcpu, uint64_t pc); -void vm_exit_rendezvous(struct vcpu *vcpu, uint64_t pc); void vm_exit_astpending(struct vcpu *vcpu, uint64_t pc); -cpuset_t vm_active_cpus(struct vm *vm); -cpuset_t vm_debug_cpus(struct vm *vm); -cpuset_t vm_suspended_cpus(struct vm *vm); - -static __inline int -vcpu_rendezvous_pending(struct vm_eventinfo *info) -{ - - return (*((uintptr_t *)(info->rptr)) != 0); -} - -static __inline int -vcpu_suspended(struct vm_eventinfo *info) -{ - - return (*info->sptr); -} - -int vcpu_debugged(struct vcpu *vcpu); - -enum vcpu_state { - VCPU_IDLE, - VCPU_FROZEN, - VCPU_RUNNING, - VCPU_SLEEPING, -}; - -int vcpu_set_state(struct vcpu *vcpu, enum vcpu_state state, bool from_idle); -enum vcpu_state vcpu_get_state(struct vcpu *vcpu, int *hostcpu); - -static int __inline -vcpu_is_running(struct vcpu *vcpu, int *hostcpu) -{ - return (vcpu_get_state(vcpu, hostcpu) == VCPU_RUNNING); -} - -#ifdef _SYS_PROC_H_ -static int __inline -vcpu_should_yield(struct vcpu *vcpu) -{ - struct thread *td; - - td = curthread; - return (td->td_ast != 0 || td->td_owepreempt != 0); -} -#endif - -void *vcpu_stats(struct vcpu *vcpu); -void vcpu_notify_event(struct vcpu *vcpu); -struct vm_mem *vm_mem(struct vm *vm); - -enum vm_reg_name vm_segment_name(int seg_encoding); - struct vm_copyinfo { uint64_t gpa; size_t len; diff --git a/sys/arm64/include/vmm_instruction_emul.h b/sys/arm64/include/vmm_instruction_emul.h index a295f7cce127..dc281f442543 100644 --- a/sys/arm64/include/vmm_instruction_emul.h +++ b/sys/arm64/include/vmm_instruction_emul.h @@ -27,6 +27,14 @@ #ifndef _VMM_INSTRUCTION_EMUL_H_ #define _VMM_INSTRUCTION_EMUL_H_ +#include <sys/types.h> + +struct vcpu; +struct vm; +struct vie; +struct vre; +struct vm_guest_paging; + /* * Callback functions to read and write memory regions. */ diff --git a/sys/arm64/spe/arm_spe_backend.c b/sys/arm64/spe/arm_spe_backend.c index b4e1132f9cbc..c8d7de8f0c8c 100644 --- a/sys/arm64/spe/arm_spe_backend.c +++ b/sys/arm64/spe/arm_spe_backend.c @@ -91,11 +91,13 @@ #include <sys/module.h> #include <sys/mutex.h> #include <sys/proc.h> +#include <sys/queue.h> #include <sys/rman.h> #include <sys/rwlock.h> #include <sys/smp.h> #include <sys/sysctl.h> #include <sys/systm.h> +#include <sys/taskqueue.h> #include <machine/bus.h> @@ -123,13 +125,12 @@ static struct hwt_backend backend = { .kva_req = 1, }; -static struct arm_spe_info *spe_info; +/* Pointers to current info structure per CPU. This points to either a per-CPU + * structure (for CPU mode) or a per-thread structure (for thread mode). + */ +static struct arm_spe_info **spe_info; -static int -spe_backend_init_thread(struct hwt_context *ctx) -{ - return (ENOTSUP); -} +static struct arm_spe_info *spe_info_cpu; static void spe_backend_init_cpu(struct hwt_context *ctx) @@ -140,13 +141,12 @@ spe_backend_init_cpu(struct hwt_context *ctx) char *tmp = "Arm SPE lock/cpu/"; int cpu_id; - spe_info = malloc(sizeof(struct arm_spe_info) * mp_ncpus, + spe_info_cpu = malloc(sizeof(struct arm_spe_info) * mp_ncpus, M_ARM_SPE, M_WAITOK | M_ZERO); - sc->spe_info = spe_info; CPU_FOREACH_ISSET(cpu_id, &ctx->cpu_map) { - info = &spe_info[cpu_id]; + info = &spe_info_cpu[cpu_id]; info->sc = sc; info->ident = cpu_id; info->buf_info[0].info = info; @@ -155,6 +155,8 @@ spe_backend_init_cpu(struct hwt_context *ctx) info->buf_info[1].buf_idx = 1; snprintf(lock_name, sizeof(lock_name), "%s%d", tmp, cpu_id); mtx_init(&info->lock, lock_name, NULL, MTX_SPIN); + + spe_info[cpu_id] = info; } } @@ -183,9 +185,11 @@ spe_backend_init(struct hwt_context *ctx) sc->kqueue_fd = ctx->kqueue_fd; sc->hwt_td = ctx->hwt_td; - if (ctx->mode == HWT_MODE_THREAD) - error = spe_backend_init_thread(ctx); - else + spe_info = malloc(sizeof(struct arm_spe_info *) * mp_ncpus, + M_ARM_SPE, M_WAITOK | M_ZERO); + sc->spe_info = spe_info; + + if (ctx->mode == HWT_MODE_CPU) spe_backend_init_cpu(ctx); return (error); @@ -218,19 +222,30 @@ spe_backend_deinit(struct hwt_context *ctx) { #ifdef ARM_SPE_DEBUG struct arm_spe_info *info; + struct hwt_thread *thr; int cpu_id; - CPU_FOREACH_ISSET(cpu_id, &ctx->cpu_map) { - info = &spe_info[cpu_id]; - hex_dump((void *)info->kvaddr, 128); - hex_dump((void *)(info->kvaddr + (info->buf_size/2)), 128); + if (ctx->mode == HWT_MODE_CPU) { + CPU_FOREACH_ISSET(cpu_id, &ctx->cpu_map) { + info = &spe_info_cpu[cpu_id]; + printf("CPU %u:\n", cpu_id); + hex_dump((void *)info->kvaddr, 128); + hex_dump((void *)(info->kvaddr + (info->buf_size/2)), 128); + } + } else { + TAILQ_FOREACH(thr, &ctx->threads, next) { + info = (struct arm_spe_info *)thr->private; + printf("TID %u:\n", thr->thread_id); + hex_dump((void *)info->kvaddr, 128); + hex_dump((void *)(info->kvaddr + (info->buf_size/2)), 128); + } } #endif - if (ctx->state == CTX_STATE_RUNNING) { - spe_backend_disable_smp(ctx); - ctx->state = CTX_STATE_STOPPED; - } + spe_backend_disable_smp(ctx); + + if (ctx->mode == HWT_MODE_CPU) + free(spe_info_cpu, M_ARM_SPE); free(spe_info, M_ARM_SPE); @@ -279,14 +294,31 @@ arm_spe_set_interval(struct arm_spe_info *info, uint64_t interval) } static int -spe_backend_configure(struct hwt_context *ctx, int cpu_id, int session_id) +spe_backend_configure(struct hwt_context *ctx, int cpu_id, int thread_id) { - struct arm_spe_info *info = &spe_info[cpu_id]; + struct arm_spe_info *info = NULL; struct arm_spe_config *cfg; + struct hwt_thread *thr = NULL; int err = 0; + if (ctx->mode == HWT_MODE_CPU) + info = &spe_info_cpu[cpu_id]; + else { + TAILQ_FOREACH(thr, &ctx->threads, next) { + if (thr->thread_id != thread_id) + continue; + info = (struct arm_spe_info *)thr->private; + break; + } + if (info == NULL) + return (ENOENT); + } + mtx_lock_spin(&info->lock); - info->ident = cpu_id; + if (ctx->mode == HWT_MODE_CPU) + info->ident = cpu_id; + else + info->ident = thread_id; /* Set defaults */ info->pmsfcr = 0; info->pmsevfr = 0xFFFFFFFFFFFFFFFFUL; @@ -311,6 +343,13 @@ spe_backend_configure(struct hwt_context *ctx, int cpu_id, int session_id) info->ctx_field = cfg->ctx_field; } else err = (EINVAL); + + if (ctx->mode == HWT_MODE_THREAD) { + info->kvaddr = thr->vm->kvaddr; + info->buf_size = ctx->bufsize; + } + + spe_info[cpu_id] = info; mtx_unlock_spin(&info->lock); return (err); @@ -320,13 +359,20 @@ spe_backend_configure(struct hwt_context *ctx, int cpu_id, int session_id) static void arm_spe_enable(void *arg __unused) { - struct arm_spe_info *info = &spe_info[PCPU_GET(cpuid)]; + struct arm_spe_info *info = spe_info[PCPU_GET(cpuid)]; + struct arm_spe_buf_info *buf = &info->buf_info[info->buf_idx]; + struct hwt_context *ctx = info->sc->ctx; uint64_t base, limit; dprintf("%s on cpu:%d\n", __func__, PCPU_GET(cpuid)); mtx_lock_spin(&info->lock); + if (info->stopped) { + mtx_unlock_spin(&info->lock); + return; + } + if (info->ctx_field == ARM_SPE_CTX_CPU_ID) WRITE_SPECIALREG(CONTEXTIDR_EL1_REG, PCPU_GET(cpuid)); @@ -342,13 +388,19 @@ arm_spe_enable(void *arg __unused) WRITE_SPECIALREG(PMSICR_EL1_REG, info->pmsicr); isb(); - base = info->kvaddr; + base = buf_start_addr(info->buf_idx, info); limit = base + (info->buf_size/2); /* Enable the buffer */ limit &= PMBLIMITR_LIMIT_MASK; /* Zero lower 12 bits */ limit |= PMBLIMITR_E; - /* Set the base and limit */ - WRITE_SPECIALREG(PMBPTR_EL1_REG, base); + /* Set the base and limit. Restore base pointer if sampling has previously + * been enabled for this thread. + */ + if (buf->pmbptr == 0) { + WRITE_SPECIALREG(PMBPTR_EL1_REG, base); + } else { + WRITE_SPECIALREG(PMBPTR_EL1_REG, buf->pmbptr); + } WRITE_SPECIALREG(PMBLIMITR_EL1_REG, limit); isb(); @@ -358,6 +410,9 @@ arm_spe_enable(void *arg __unused) info->enabled = true; + if (ctx->mode == HWT_MODE_THREAD) + CPU_SET(PCPU_GET(cpuid), &ctx->cpu_map); + mtx_unlock_spin(&info->lock); } @@ -368,11 +423,13 @@ spe_backend_enable_smp(struct hwt_context *ctx) struct hwt_vm *vm; int cpu_id; + KASSERT(ctx->mode == HWT_MODE_CPU, ("%s: should only be called for CPU mode", __func__)); + HWT_CTX_LOCK(ctx); CPU_FOREACH_ISSET(cpu_id, &ctx->cpu_map) { vm = hwt_cpu_get(ctx, cpu_id)->vm; - - info = &spe_info[cpu_id]; + KASSERT(spe_info[cpu_id] == &spe_info_cpu[cpu_id], ("%s: spe_info mismatch for cpu_id=%u", __func__, cpu_id)); + info = &spe_info_cpu[cpu_id]; mtx_lock_spin(&info->lock); info->kvaddr = vm->kvaddr; @@ -382,7 +439,8 @@ spe_backend_enable_smp(struct hwt_context *ctx) HWT_CTX_UNLOCK(ctx); cpu_id = CPU_FFS(&ctx->cpu_map) - 1; - info = &spe_info[cpu_id]; + KASSERT(spe_info[cpu_id] == &spe_info_cpu[cpu_id], ("%s: spe_info mismatch for cpu_id=%u", __func__, cpu_id)); + info = spe_info[cpu_id]; if (info->ctx_field == ARM_SPE_CTX_PID) arm64_pid_in_contextidr = true; else @@ -394,11 +452,12 @@ spe_backend_enable_smp(struct hwt_context *ctx) return (0); } -void -arm_spe_disable(void *arg __unused) +static void +arm_spe_disable_nolock(void) { - struct arm_spe_info *info = &spe_info[PCPU_GET(cpuid)]; + struct arm_spe_info *info = spe_info[PCPU_GET(cpuid)]; struct arm_spe_buf_info *buf = &info->buf_info[info->buf_idx]; + struct hwt_context *ctx = info->sc->ctx; if (!info->enabled) return; @@ -423,9 +482,20 @@ arm_spe_disable(void *arg __unused) /* Clear PID/CPU_ID from context ID reg */ WRITE_SPECIALREG(CONTEXTIDR_EL1_REG, 0); - mtx_lock_spin(&info->lock); buf->pmbptr = READ_SPECIALREG(PMBPTR_EL1_REG); info->enabled = false; + + if (ctx->mode == HWT_MODE_THREAD) + CPU_CLR(PCPU_GET(cpuid), &ctx->cpu_map); +} + +void +arm_spe_disable(void *arg __unused) +{ + struct arm_spe_info *info = spe_info[PCPU_GET(cpuid)]; + + mtx_lock_spin(&info->lock); + arm_spe_disable_nolock(); mtx_unlock_spin(&info->lock); } @@ -438,14 +508,16 @@ spe_backend_disable_smp(struct hwt_context *ctx) int cpu_id; int ret; - /* Disable and send out remaining data in bufs */ - smp_rendezvous_cpus(ctx->cpu_map, smp_no_rendezvous_barrier, - arm_spe_disable, smp_no_rendezvous_barrier, NULL); + if (!CPU_EMPTY(&ctx->cpu_map)) { + /* Disable and send out remaining data in bufs */ + smp_rendezvous_cpus(ctx->cpu_map, smp_no_rendezvous_barrier, + arm_spe_disable, smp_no_rendezvous_barrier, NULL); - CPU_FOREACH_ISSET(cpu_id, &ctx->cpu_map) { - info = &spe_info[cpu_id]; - buf = &info->buf_info[info->buf_idx]; - arm_spe_send_buffer(buf, 0); + CPU_FOREACH_ISSET(cpu_id, &ctx->cpu_map) { + info = spe_info[cpu_id]; + buf = &info->buf_info[info->buf_idx]; + arm_spe_send_buffer(buf, 0); + } } arm64_pid_in_contextidr = false; @@ -463,15 +535,96 @@ spe_backend_disable_smp(struct hwt_context *ctx) } static void +spe_backend_enable(struct hwt_context *ctx, int cpu_id) +{ + struct arm_spe_info *info; + + if (ctx->mode == HWT_MODE_CPU) + return; + KASSERT(curcpu == cpu_id, ("%s: attempting to enable SPE on another cpu", __func__)); + + info = spe_info[cpu_id]; + + KASSERT(info != NULL, ("%s: info=NULL", __func__)); + + if (info->ctx_field == ARM_SPE_CTX_PID) + arm64_pid_in_contextidr = true; + else + arm64_pid_in_contextidr = false; + + arm_spe_enable(NULL); +} + +static void +spe_backend_disable(struct hwt_context *ctx, int cpu_id) +{ + struct arm_spe_info *info = spe_info[PCPU_GET(cpuid)]; + + if (ctx->mode == HWT_MODE_CPU) + return; + + KASSERT(curcpu == cpu_id, ("%s: attempting to disable SPE on another cpu", __func__)); + + mtx_lock_spin(&info->lock); + + if (!info->stopped) + arm_spe_disable_nolock(); + + mtx_unlock_spin(&info->lock); +} + +static void +arm_spe_flush(void *arg, int pending __unused) +{ + struct arm_spe_info *info = arg; + struct arm_spe_buf_info *buf = &info->buf_info[info->buf_idx]; + + arm_spe_send_buffer(buf, 0); +} + +static void spe_backend_stop(struct hwt_context *ctx) { + struct arm_spe_info *info; + struct hwt_thread *thr; + + HWT_CTX_LOCK(ctx); + + if (ctx->mode == HWT_MODE_THREAD) { + ctx->state = CTX_STATE_STOPPED; + + TAILQ_FOREACH(thr, &ctx->threads, next) { + info = (struct arm_spe_info *)thr->private; + + mtx_lock_spin(&info->lock); + + info->stopped = true; + + if (!info->enabled) { + /* Not currently tracing. Enqueue buffer for sending */ + TASK_INIT(&info->flush_task, 0, (task_fn_t *)arm_spe_flush, info); + taskqueue_enqueue(taskqueue_arm_spe, &info->flush_task); + } + /* Otherwise tracing currently active. As this thread has been + * marked as stopped, buffer will be sent on next disable + */ + + mtx_unlock_spin(&info->lock); + } + + } + + HWT_CTX_UNLOCK(ctx); + + taskqueue_drain_all(taskqueue_arm_spe); + spe_backend_disable_smp(ctx); } static void arm_spe_reenable(void *arg __unused) { - struct arm_spe_info *info = &spe_info[PCPU_GET(cpuid)];; + struct arm_spe_info *info = spe_info[PCPU_GET(cpuid)]; WRITE_SPECIALREG(PMSCR_EL1_REG, info->pmscr); isb(); @@ -481,9 +634,10 @@ static int spe_backend_svc_buf(struct hwt_context *ctx, void *data, size_t data_size, int data_version) { - struct arm_spe_info *info; + struct arm_spe_info *info = NULL; struct arm_spe_buf_info *buf; struct arm_spe_svc_buf *s; + struct hwt_thread *thr; int err = 0; cpuset_t cpu_set; @@ -496,15 +650,29 @@ spe_backend_svc_buf(struct hwt_context *ctx, void *data, size_t data_size, s = (struct arm_spe_svc_buf *)data; if (s->buf_idx > 1) return (ENODEV); - if (s->ident >= mp_ncpus) - return (EINVAL); - info = &spe_info[s->ident]; + if (ctx->mode == HWT_MODE_CPU) { + if (s->ident >= mp_ncpus) + return (EINVAL); + + info = spe_info[s->ident]; + } else { + TAILQ_FOREACH(thr, &ctx->threads, next) { + if (thr->thread_id != s->ident) + continue; + info = (struct arm_spe_info *)thr->private; + break; + } + + if (info == NULL) + return (ENOENT); + } + mtx_lock_spin(&info->lock); buf = &info->buf_info[s->buf_idx]; - if (!info->enabled) { + if (!info->enabled && ctx->mode == HWT_MODE_CPU) { err = ENXIO; goto end; } @@ -513,7 +681,7 @@ spe_backend_svc_buf(struct hwt_context *ctx, void *data, size_t data_size, buf->buf_svc = false; /* Re-enable profiling if we've been waiting for this notification */ - if (buf->buf_wait) { + if (buf->buf_wait && !info->stopped) { CPU_SETOF(s->ident, &cpu_set); mtx_unlock_spin(&info->lock); @@ -563,6 +731,38 @@ error: return (0); } +static int +spe_backend_thread_alloc(struct hwt_thread *thr) +{ + struct arm_spe_softc *sc = device_get_softc(spe_dev); + char lock_name[32]; + struct arm_spe_info *info; + + info = malloc(sizeof(*info), M_ARM_SPE, M_WAITOK | M_ZERO); + + info->sc = sc; + info->buf_info[0].info = info; + info->buf_info[0].buf_idx = 0; + info->buf_info[1].info = info; + info->buf_info[1].buf_idx = 1; + snprintf(lock_name, sizeof(lock_name), "Arm SPE lock/thr/%d", thr->thread_id); + mtx_init(&info->lock, lock_name, NULL, MTX_SPIN); + + thr->private = info; + + return (0); +} + +static void +spe_backend_thread_free(struct hwt_thread *thr) +{ + struct arm_spe_info *info; + + info = (struct arm_spe_info *)thr->private; + + free(info, M_ARM_SPE); +} + static struct hwt_backend_ops spe_ops = { .hwt_backend_init = spe_backend_init, .hwt_backend_deinit = spe_backend_deinit, @@ -571,10 +771,16 @@ static struct hwt_backend_ops spe_ops = { .hwt_backend_svc_buf = spe_backend_svc_buf, .hwt_backend_stop = spe_backend_stop, + .hwt_backend_enable = spe_backend_enable, + .hwt_backend_disable = spe_backend_disable, + .hwt_backend_enable_smp = spe_backend_enable_smp, .hwt_backend_disable_smp = spe_backend_disable_smp, .hwt_backend_read = spe_backend_read, + + .hwt_backend_thread_alloc = spe_backend_thread_alloc, + .hwt_backend_thread_free = spe_backend_thread_free, }; int diff --git a/sys/arm64/spe/arm_spe_dev.c b/sys/arm64/spe/arm_spe_dev.c index 8a834197eeef..61c0b5cc16c4 100644 --- a/sys/arm64/spe/arm_spe_dev.c +++ b/sys/arm64/spe/arm_spe_dev.c @@ -131,7 +131,7 @@ arm_spe_intr(void *arg) uint64_t pmbsr; uint64_t base, limit; uint8_t ec; - struct arm_spe_info *info = &sc->spe_info[cpu_id]; + struct arm_spe_info *info = sc->spe_info[cpu_id]; uint8_t i = info->buf_idx; struct arm_spe_buf_info *buf = &info->buf_info[i]; struct arm_spe_buf_info *prev_buf = &info->buf_info[!i]; @@ -311,8 +311,9 @@ arm_spe_error(void *arg, int pending __unused) struct kevent kev; int ret; - smp_rendezvous_cpus(ctx->cpu_map, smp_no_rendezvous_barrier, - arm_spe_disable, smp_no_rendezvous_barrier, NULL); + if (!CPU_EMPTY(&ctx->cpu_map)) + smp_rendezvous_cpus(ctx->cpu_map, smp_no_rendezvous_barrier, + arm_spe_disable, smp_no_rendezvous_barrier, NULL); EV_SET(&kev, ARM_SPE_KQ_SHUTDOWN, EVFILT_USER, 0, NOTE_TRIGGER, 0, NULL); ret = kqfd_register(ctx->kqueue_fd, &kev, ctx->hwt_td, M_WAITOK); diff --git a/sys/arm64/spe/arm_spe_dev.h b/sys/arm64/spe/arm_spe_dev.h index df88d98ef1c0..ed1727b5b090 100644 --- a/sys/arm64/spe/arm_spe_dev.h +++ b/sys/arm64/spe/arm_spe_dev.h @@ -80,7 +80,7 @@ struct arm_spe_softc { int64_t sc_pmsidr; int kqueue_fd; struct thread *hwt_td; - struct arm_spe_info *spe_info; + struct arm_spe_info **spe_info; struct hwt_context *ctx; STAILQ_HEAD(, arm_spe_queue) pending; uint64_t npending; @@ -105,7 +105,9 @@ struct arm_spe_info { struct mtx lock; struct arm_spe_softc *sc; struct task task[2]; + struct task flush_task; bool enabled : 1; + bool stopped : 1; /* buffer is split in half as a ping-pong buffer */ vm_object_t bufobj; diff --git a/sys/arm64/vmm/io/vgic_v3.c b/sys/arm64/vmm/io/vgic_v3.c index 023406c64182..22cd06b09d7d 100644 --- a/sys/arm64/vmm/io/vgic_v3.c +++ b/sys/arm64/vmm/io/vgic_v3.c @@ -57,7 +57,6 @@ #include <machine/vmparam.h> #include <machine/intr.h> #include <machine/vmm.h> -#include <machine/vmm_dev.h> #include <machine/vmm_instruction_emul.h> #include <arm/arm/gic_common.h> @@ -69,6 +68,9 @@ #include <arm64/vmm/arm64.h> #include <arm64/vmm/vmm_handlers.h> +#include <dev/vmm/vmm_dev.h> +#include <dev/vmm/vmm_vm.h> + #include "vgic.h" #include "vgic_v3.h" #include "vgic_v3_reg.h" diff --git a/sys/arm64/vmm/io/vtimer.c b/sys/arm64/vmm/io/vtimer.c index 7c7fbb49e691..d1c489463882 100644 --- a/sys/arm64/vmm/io/vtimer.c +++ b/sys/arm64/vmm/io/vtimer.c @@ -47,6 +47,8 @@ #include <arm64/vmm/arm64.h> +#include <dev/vmm/vmm_vm.h> + #include "vgic.h" #include "vtimer.h" diff --git a/sys/arm64/vmm/vmm.c b/sys/arm64/vmm/vmm.c index 31d2fb3f516b..031400f3f1d0 100644 --- a/sys/arm64/vmm/vmm.c +++ b/sys/arm64/vmm/vmm.c @@ -40,7 +40,6 @@ #include <sys/rwlock.h> #include <sys/sched.h> #include <sys/smp.h> -#include <sys/sysctl.h> #include <vm/vm.h> #include <vm/vm_object.h> @@ -61,10 +60,12 @@ #include <machine/vmm_instruction_emul.h> #include <dev/pci/pcireg.h> + #include <dev/vmm/vmm_dev.h> #include <dev/vmm/vmm_ktr.h> #include <dev/vmm/vmm_mem.h> #include <dev/vmm/vmm_stat.h> +#include <dev/vmm/vmm_vm.h> #include "arm64.h" #include "mmu.h" @@ -72,85 +73,11 @@ #include "io/vgic.h" #include "io/vtimer.h" -struct vcpu { - int flags; - enum vcpu_state state; - struct mtx mtx; - int hostcpu; /* host cpuid this vcpu last ran on */ - int vcpuid; - void *stats; - struct vm_exit exitinfo; - uint64_t nextpc; /* (x) next instruction to execute */ - struct vm *vm; /* (o) */ - void *cookie; /* (i) cpu-specific data */ - struct vfpstate *guestfpu; /* (a,i) guest fpu state */ -}; - -#define vcpu_lock_init(v) mtx_init(&((v)->mtx), "vcpu lock", 0, MTX_SPIN) -#define vcpu_lock_destroy(v) mtx_destroy(&((v)->mtx)) -#define vcpu_lock(v) mtx_lock_spin(&((v)->mtx)) -#define vcpu_unlock(v) mtx_unlock_spin(&((v)->mtx)) -#define vcpu_assert_locked(v) mtx_assert(&((v)->mtx), MA_OWNED) - -struct vmm_mmio_region { - uint64_t start; - uint64_t end; - mem_region_read_t read; - mem_region_write_t write; -}; -#define VM_MAX_MMIO_REGIONS 4 - -struct vmm_special_reg { - uint32_t esr_iss; - uint32_t esr_mask; - reg_read_t reg_read; - reg_write_t reg_write; - void *arg; -}; -#define VM_MAX_SPECIAL_REGS 16 - -/* - * Initialization: - * (o) initialized the first time the VM is created - * (i) initialized when VM is created and when it is reinitialized - * (x) initialized before use - */ -struct vm { - void *cookie; /* (i) cpu-specific data */ - volatile cpuset_t active_cpus; /* (i) active vcpus */ - volatile cpuset_t debug_cpus; /* (i) vcpus stopped for debug */ - int suspend; /* (i) stop VM execution */ - bool dying; /* (o) is dying */ - volatile cpuset_t suspended_cpus; /* (i) suspended vcpus */ - volatile cpuset_t halted_cpus; /* (x) cpus in a hard halt */ - struct vm_mem mem; /* (i) guest memory */ - char name[VM_MAX_NAMELEN + 1]; /* (o) virtual machine name */ - struct vcpu **vcpu; /* (i) guest vcpus */ - struct vmm_mmio_region mmio_region[VM_MAX_MMIO_REGIONS]; - /* (o) guest MMIO regions */ - struct vmm_special_reg special_reg[VM_MAX_SPECIAL_REGS]; - /* The following describe the vm cpu topology */ - uint16_t sockets; /* (o) num of sockets */ - uint16_t cores; /* (o) num of cores/socket */ - uint16_t threads; /* (o) num of threads/core */ - uint16_t maxcpus; /* (o) max pluggable cpus */ - struct sx vcpus_init_lock; /* (o) */ -}; - -static int vm_handle_wfi(struct vcpu *vcpu, - struct vm_exit *vme, bool *retu); - static MALLOC_DEFINE(M_VMM, "vmm", "vmm"); /* statistics */ static VMM_STAT(VCPU_TOTAL_RUNTIME, "vcpu total runtime"); -SYSCTL_NODE(_hw, OID_AUTO, vmm, CTLFLAG_RW, NULL, NULL); - -static int vmm_ipinum; -SYSCTL_INT(_hw_vmm, OID_AUTO, ipinum, CTLFLAG_RD, &vmm_ipinum, 0, - "IPI vector used for vcpu notifications"); - struct vmm_regs { uint64_t id_aa64afr0; uint64_t id_aa64afr1; @@ -205,8 +132,6 @@ static const struct vmm_regs vmm_arch_regs_masks = { /* Host registers masked by vmm_arch_regs_masks. */ static struct vmm_regs vmm_arch_regs; -static void vcpu_notify_event_locked(struct vcpu *vcpu); - /* global statistics */ VMM_STAT(VMEXIT_COUNT, "total number of vm exits"); VMM_STAT(VMEXIT_UNKNOWN, "number of vmexits for the unknown exception"); @@ -357,14 +282,6 @@ vm_init(struct vm *vm, bool create) } } -void -vm_disable_vcpu_creation(struct vm *vm) -{ - sx_xlock(&vm->vcpus_init_lock); - vm->dying = true; - sx_xunlock(&vm->vcpus_init_lock); -} - struct vcpu * vm_alloc_vcpu(struct vm *vm, int vcpuid) { @@ -401,18 +318,6 @@ vm_alloc_vcpu(struct vm *vm, int vcpuid) return (vcpu); } -void -vm_lock_vcpus(struct vm *vm) -{ - sx_xlock(&vm->vcpus_init_lock); -} - -void -vm_unlock_vcpus(struct vm *vm) -{ - sx_unlock(&vm->vcpus_init_lock); -} - int vm_create(const char *name, struct vm **retvm) { @@ -426,6 +331,7 @@ vm_create(const char *name, struct vm **retvm) return (error); } strcpy(vm->name, name); + mtx_init(&vm->rendezvous_mtx, "vm rendezvous lock", 0, MTX_DEF); sx_init(&vm->vcpus_init_lock, "vm vcpus"); vm->sockets = 1; @@ -442,35 +348,6 @@ vm_create(const char *name, struct vm **retvm) return (0); } -void -vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, - uint16_t *threads, uint16_t *maxcpus) -{ - *sockets = vm->sockets; - *cores = vm->cores; - *threads = vm->threads; - *maxcpus = vm->maxcpus; -} - -uint16_t -vm_get_maxcpus(struct vm *vm) -{ - return (vm->maxcpus); -} - -int -vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, - uint16_t threads, uint16_t maxcpus) -{ - /* Ignore maxcpus. */ - if ((sockets * cores * threads) > vm->maxcpus) - return (EINVAL); - vm->sockets = sockets; - vm->cores = cores; - vm->threads = threads; - return(0); -} - static void vm_cleanup(struct vm *vm, bool destroy) { @@ -515,29 +392,11 @@ vm_destroy(struct vm *vm) free(vm, M_VMM); } -int -vm_reinit(struct vm *vm) -{ - int error; - - /* - * A virtual machine can be reset only if all vcpus are suspended. - */ - if (CPU_CMP(&vm->suspended_cpus, &vm->active_cpus) == 0) { - vm_cleanup(vm, false); - vm_init(vm, false); - error = 0; - } else { - error = EBUSY; - } - - return (error); -} - -const char * -vm_name(struct vm *vm) +void +vm_reset(struct vm *vm) { - return (vm->name); + vm_cleanup(vm, false); + vm_init(vm, false); } int @@ -828,33 +687,6 @@ out_user: return (0); } -int -vm_suspend(struct vm *vm, enum vm_suspend_how how) -{ - int i; - - if (how <= VM_SUSPEND_NONE || how >= VM_SUSPEND_LAST) - return (EINVAL); - - if (atomic_cmpset_int(&vm->suspend, 0, how) == 0) { - VM_CTR2(vm, "virtual machine already suspended %d/%d", - vm->suspend, how); - return (EALREADY); - } - - VM_CTR1(vm, "virtual machine successfully suspended %d", how); - - /* - * Notify all active vcpus that they are now suspended. - */ - for (i = 0; i < vm->maxcpus; i++) { - if (CPU_ISSET(i, &vm->active_cpus)) - vcpu_notify_event(vm_vcpu(vm, i)); - } - - return (0); -} - void vm_exit_suspended(struct vcpu *vcpu, uint64_t pc) { @@ -882,136 +714,6 @@ vm_exit_debug(struct vcpu *vcpu, uint64_t pc) vmexit->exitcode = VM_EXITCODE_DEBUG; } -int -vm_activate_cpu(struct vcpu *vcpu) -{ - struct vm *vm = vcpu->vm; - - if (CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) - return (EBUSY); - - CPU_SET_ATOMIC(vcpu->vcpuid, &vm->active_cpus); - return (0); - -} - -int -vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu) -{ - if (vcpu == NULL) { - vm->debug_cpus = vm->active_cpus; - for (int i = 0; i < vm->maxcpus; i++) { - if (CPU_ISSET(i, &vm->active_cpus)) - vcpu_notify_event(vm_vcpu(vm, i)); - } - } else { - if (!CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) - return (EINVAL); - - CPU_SET_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); - vcpu_notify_event(vcpu); - } - return (0); -} - -int -vm_resume_cpu(struct vm *vm, struct vcpu *vcpu) -{ - - if (vcpu == NULL) { - CPU_ZERO(&vm->debug_cpus); - } else { - if (!CPU_ISSET(vcpu->vcpuid, &vm->debug_cpus)) - return (EINVAL); - - CPU_CLR_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); - } - return (0); -} - -int -vcpu_debugged(struct vcpu *vcpu) -{ - - return (CPU_ISSET(vcpu->vcpuid, &vcpu->vm->debug_cpus)); -} - -cpuset_t -vm_active_cpus(struct vm *vm) -{ - - return (vm->active_cpus); -} - -cpuset_t -vm_debug_cpus(struct vm *vm) -{ - - return (vm->debug_cpus); -} - -cpuset_t -vm_suspended_cpus(struct vm *vm) -{ - - return (vm->suspended_cpus); -} - - -void * -vcpu_stats(struct vcpu *vcpu) -{ - - return (vcpu->stats); -} - -/* - * This function is called to ensure that a vcpu "sees" a pending event - * as soon as possible: - * - If the vcpu thread is sleeping then it is woken up. - * - If the vcpu is running on a different host_cpu then an IPI will be directed - * to the host_cpu to cause the vcpu to trap into the hypervisor. - */ -static void -vcpu_notify_event_locked(struct vcpu *vcpu) -{ - int hostcpu; - - hostcpu = vcpu->hostcpu; - if (vcpu->state == VCPU_RUNNING) { - KASSERT(hostcpu != NOCPU, ("vcpu running on invalid hostcpu")); - if (hostcpu != curcpu) { - ipi_cpu(hostcpu, vmm_ipinum); - } else { - /* - * If the 'vcpu' is running on 'curcpu' then it must - * be sending a notification to itself (e.g. SELF_IPI). - * The pending event will be picked up when the vcpu - * transitions back to guest context. - */ - } - } else { - KASSERT(hostcpu == NOCPU, ("vcpu state %d not consistent " - "with hostcpu %d", vcpu->state, hostcpu)); - if (vcpu->state == VCPU_SLEEPING) - wakeup_one(vcpu); - } -} - -void -vcpu_notify_event(struct vcpu *vcpu) -{ - vcpu_lock(vcpu); - vcpu_notify_event_locked(vcpu); - vcpu_unlock(vcpu); -} - -struct vm_mem * -vm_mem(struct vm *vm) -{ - return (&vm->mem); -} - static void restore_guest_fpustate(struct vcpu *vcpu) { @@ -1047,71 +749,6 @@ save_guest_fpustate(struct vcpu *vcpu) KASSERT(PCPU_GET(fpcurthread) == NULL, ("%s: fpcurthread set with guest registers", __func__)); } -static int -vcpu_set_state_locked(struct vcpu *vcpu, enum vcpu_state newstate, - bool from_idle) -{ - int error; - - vcpu_assert_locked(vcpu); - - /* - * State transitions from the vmmdev_ioctl() must always begin from - * the VCPU_IDLE state. This guarantees that there is only a single - * ioctl() operating on a vcpu at any point. - */ - if (from_idle) { - while (vcpu->state != VCPU_IDLE) { - vcpu_notify_event_locked(vcpu); - msleep_spin(&vcpu->state, &vcpu->mtx, "vmstat", hz); - } - } else { - KASSERT(vcpu->state != VCPU_IDLE, ("invalid transition from " - "vcpu idle state")); - } - - if (vcpu->state == VCPU_RUNNING) { - KASSERT(vcpu->hostcpu == curcpu, ("curcpu %d and hostcpu %d " - "mismatch for running vcpu", curcpu, vcpu->hostcpu)); - } else { - KASSERT(vcpu->hostcpu == NOCPU, ("Invalid hostcpu %d for a " - "vcpu that is not running", vcpu->hostcpu)); - } - - /* - * The following state transitions are allowed: - * IDLE -> FROZEN -> IDLE - * FROZEN -> RUNNING -> FROZEN - * FROZEN -> SLEEPING -> FROZEN - */ - switch (vcpu->state) { - case VCPU_IDLE: - case VCPU_RUNNING: - case VCPU_SLEEPING: - error = (newstate != VCPU_FROZEN); - break; - case VCPU_FROZEN: - error = (newstate == VCPU_FROZEN); - break; - default: - error = 1; - break; - } - - if (error) - return (EBUSY); - - vcpu->state = newstate; - if (newstate == VCPU_RUNNING) - vcpu->hostcpu = curcpu; - else - vcpu->hostcpu = NOCPU; - - if (newstate == VCPU_IDLE) - wakeup(&vcpu->state); - - return (0); -} static void vcpu_require_state(struct vcpu *vcpu, enum vcpu_state newstate) @@ -1149,56 +786,12 @@ vm_set_capability(struct vcpu *vcpu, int type, int val) return (vmmops_setcap(vcpu->cookie, type, val)); } -struct vm * -vcpu_vm(struct vcpu *vcpu) -{ - return (vcpu->vm); -} - -int -vcpu_vcpuid(struct vcpu *vcpu) -{ - return (vcpu->vcpuid); -} - void * vcpu_get_cookie(struct vcpu *vcpu) { return (vcpu->cookie); } -struct vcpu * -vm_vcpu(struct vm *vm, int vcpuid) -{ - return (vm->vcpu[vcpuid]); -} - -int -vcpu_set_state(struct vcpu *vcpu, enum vcpu_state newstate, bool from_idle) -{ - int error; - - vcpu_lock(vcpu); - error = vcpu_set_state_locked(vcpu, newstate, from_idle); - vcpu_unlock(vcpu); - - return (error); -} - -enum vcpu_state -vcpu_get_state(struct vcpu *vcpu, int *hostcpu) -{ - enum vcpu_state state; - - vcpu_lock(vcpu); - state = vcpu->state; - if (hostcpu != NULL) - *hostcpu = vcpu->hostcpu; - vcpu_unlock(vcpu); - - return (state); -} - int vm_get_register(struct vcpu *vcpu, int reg, uint64_t *retval) { diff --git a/sys/arm64/vmm/vmm_arm64.c b/sys/arm64/vmm/vmm_arm64.c index aa1361049f49..d529f000b828 100644 --- a/sys/arm64/vmm/vmm_arm64.c +++ b/sys/arm64/vmm/vmm_arm64.c @@ -52,12 +52,12 @@ #include <machine/cpu.h> #include <machine/machdep.h> #include <machine/vmm.h> -#include <machine/vmm_dev.h> #include <machine/atomic.h> #include <machine/hypervisor.h> #include <machine/pmap.h> #include <dev/vmm/vmm_mem.h> +#include <dev/vmm/vmm_vm.h> #include "mmu.h" #include "arm64.h" diff --git a/sys/arm64/vmm/vmm_reset.c b/sys/arm64/vmm/vmm_reset.c index 0e4910ea87b4..06ac6dec5af8 100644 --- a/sys/arm64/vmm/vmm_reset.c +++ b/sys/arm64/vmm/vmm_reset.c @@ -34,6 +34,8 @@ #include <machine/cpu.h> #include <machine/hypervisor.h> +#include <dev/vmm/vmm_vm.h> + #include "arm64.h" #include "reset.h" diff --git a/sys/cam/cam.c b/sys/cam/cam.c index 917197542edc..8e70aacba9a9 100644 --- a/sys/cam/cam.c +++ b/sys/cam/cam.c @@ -30,9 +30,13 @@ #include <sys/param.h> #ifdef _KERNEL +#include "opt_kdtrace.h" + #include <sys/systm.h> #include <sys/kernel.h> #include <sys/memdesc.h> +#include <sys/queue.h> +#include <sys/sdt.h> #include <sys/sysctl.h> #else /* _KERNEL */ #include <stdlib.h> @@ -55,6 +59,7 @@ FEATURE(scbus, "SCSI devices support"); +SDT_PROVIDER_DEFINE(cam); #endif static int camstatusentrycomp(const void *key, const void *member); diff --git a/sys/cam/cam.h b/sys/cam/cam.h index 83c1fc7b35ca..4d12debdd86f 100644 --- a/sys/cam/cam.h +++ b/sys/cam/cam.h @@ -33,6 +33,9 @@ #ifdef _KERNEL #include "opt_cam.h" +/* Only need the hooks here so no opt_kdtrace.h */ +#include <sys/queue.h> +#include <sys/sdt.h> #endif #ifndef _KERNEL @@ -374,6 +377,17 @@ extern const struct cam_status_entry cam_status_table[]; extern const int num_cam_status_entries; #ifdef _KERNEL extern int cam_sort_io_queues; +#ifdef SDT_PROVIDER_DECLARE +SDT_PROVIDER_DECLARE(cam); +#endif +#define CAM_PROBE1(group, probe, arg0) \ + SDT_PROBE1(cam, , group, probe, arg0) +#define CAM_PROBE2(group, probe, arg0, arg1) \ + SDT_PROBE2(cam, , group, probe, arg0, arg1) +#define CAM_PROBE3(group, probe, arg0, arg1, arg2) \ + SDT_PROBE3(cam, , group, probe, arg0, arg1, arg2) +#define CAM_PROBE4(group, probe, arg0, arg1, arg2, arg3) \ + SDT_PROBE4(cam, , group, probe, arg0, arg1, arg2, arg3) #endif union ccb; struct sbuf; diff --git a/sys/cam/cam_ccb.h b/sys/cam/cam_ccb.h index bb23c6bed26f..cedb3a9ad61c 100644 --- a/sys/cam/cam_ccb.h +++ b/sys/cam/cam_ccb.h @@ -160,12 +160,14 @@ typedef enum { /* Path statistics (error counts, etc.) */ XPT_GDEV_STATS = 0x0c, /* Device statistics (error counts, etc.) */ + + /* 0x0d unused */ XPT_DEV_ADVINFO = 0x0e, /* Get/Set Device advanced information */ XPT_ASYNC = 0x0f | XPT_FC_QUEUED | XPT_FC_USER_CCB | XPT_FC_XPT_ONLY, /* Asynchronous event */ -/* SCSI Control Functions: 0x10->0x1F */ +/* SCSI, NVME, and ATA Control Functions: 0x10->0x1F */ XPT_ABORT = 0x10, /* Abort the specified CCB */ XPT_RESET_BUS = 0x11 | XPT_FC_XPT_ONLY, @@ -199,14 +201,10 @@ typedef enum { XPT_GET_SIM_KNOB_OLD = 0x18, /* Compat only */ XPT_SET_SIM_KNOB = 0x19, - /* - * Set SIM specific knob values. - */ + /* Set SIM specific knob values. */ XPT_GET_SIM_KNOB = 0x1a, - /* - * Get SIM specific knob values. - */ + /* Get SIM specific knob values. */ XPT_SMP_IO = 0x1b | XPT_FC_DEV_QUEUED, /* Serial Management Protocol */ @@ -250,8 +248,11 @@ typedef enum { XPT_REPROBE_LUN = 0x38 | XPT_FC_QUEUED | XPT_FC_USER_CCB, /* Query device capacity and notify GEOM */ +/* More common commands: 0x40-0x7f */ XPT_MMC_SET_TRAN_SETTINGS = 0x40 | XPT_FC_DEV_QUEUED, + /* Queued MMC/SD set transmit settings */ XPT_MMC_GET_TRAN_SETTINGS = 0x41 | XPT_FC_DEV_QUEUED, + /* Queued MMC/SD get transmit settings */ /* Vendor Unique codes: 0x80->0x8F */ XPT_VUNIQUE = 0x80 diff --git a/sys/cam/cam_xpt.c b/sys/cam/cam_xpt.c index ecf06045ed90..8b42fb2ca6c5 100644 --- a/sys/cam/cam_xpt.c +++ b/sys/cam/cam_xpt.c @@ -70,6 +70,12 @@ #include <cam/scsi/scsi_pass.h> +/* SDT Probes */ +SDT_PROBE_DEFINE1(cam, , xpt, action, "union ccb *"); +SDT_PROBE_DEFINE1(cam, , xpt, done, "union ccb *"); +SDT_PROBE_DEFINE4(cam, , xpt, async__cb, "void *", "uint32_t", + "struct cam_path *", "void *"); + /* Wild guess based on not wanting to grow the stack too much */ #define XPT_PRINT_MAXLEN 512 #ifdef PRINTF_BUFR_SIZE @@ -2479,6 +2485,8 @@ xptsetasyncfunc(struct cam_ed *device, void *arg) device->target->target_id, device->lun_id); xpt_gdev_type(&cgd, &path); + CAM_PROBE4(xpt, async__cb, csa->callback_arg, + AC_FOUND_DEVICE, &path, &cgd); csa->callback(csa->callback_arg, AC_FOUND_DEVICE, &path, &cgd); @@ -2500,6 +2508,8 @@ xptsetasyncbusfunc(struct cam_eb *bus, void *arg) CAM_LUN_WILDCARD); xpt_path_lock(&path); xpt_path_inq(&cpi, &path); + CAM_PROBE4(xpt, async__cb, csa->callback_arg, + AC_PATH_REGISTERED, &path, &cpi); csa->callback(csa->callback_arg, AC_PATH_REGISTERED, &path, &cpi); @@ -2526,6 +2536,7 @@ xpt_action(union ccb *start_ccb) start_ccb->ccb_h.pinfo.priority != CAM_PRIORITY_NONE, ("%s: queued ccb and CAM_PRIORITY_NONE illegal.", __func__)); + CAM_PROBE1(xpt, action, start_ccb); start_ccb->ccb_h.status = CAM_REQ_INPROG; (*(start_ccb->ccb_h.path->bus->xport->ops->action))(start_ccb); } @@ -4260,6 +4271,8 @@ xpt_async_bcast(struct async_list *async_head, path->device->sim->mtx : NULL; if (mtx) mtx_lock(mtx); + CAM_PROBE4(xpt, async__cb, cur_entry->callback_arg, + async_code, path, async_arg); cur_entry->callback(cur_entry->callback_arg, async_code, path, async_arg); @@ -4499,8 +4512,10 @@ xpt_done(union ccb *done_ccb) done_ccb->ccb_h.func_code, xpt_action_name(done_ccb->ccb_h.func_code), done_ccb->ccb_h.status)); - if ((done_ccb->ccb_h.func_code & XPT_FC_QUEUED) == 0) + if ((done_ccb->ccb_h.func_code & XPT_FC_QUEUED) == 0) { + CAM_PROBE1(xpt, done, done_ccb); return; + } /* Store the time the ccb was in the sim */ done_ccb->ccb_h.qos.periph_data = cam_iosched_delta_t(done_ccb->ccb_h.qos.periph_data); @@ -5376,6 +5391,11 @@ xpt_done_process(struct ccb_hdr *ccb_h) } } + /* + * Call as late as possible. Do we want an early one too before the + * unfreeze / releases above? + */ + CAM_PROBE1(xpt, done, (union ccb *)ccb_h); /* container_of? */ /* Call the peripheral driver's callback */ ccb_h->pinfo.index = CAM_UNQUEUED_INDEX; (*ccb_h->cbfcnp)(ccb_h->path->periph, (union ccb *)ccb_h); diff --git a/sys/cam/scsi/scsi_all.c b/sys/cam/scsi/scsi_all.c index 4ea2ab7d4acd..d8bba97e79bc 100644 --- a/sys/cam/scsi/scsi_all.c +++ b/sys/cam/scsi/scsi_all.c @@ -3711,13 +3711,12 @@ scsi_command_string(struct cam_device *device, struct ccb_scsiio *csio, xpt_gdev_type(cgd, csio->ccb_h.path); /* - * If the device is unconfigured, just pretend that it is a hard - * drive. scsi_op_desc() needs this. + * If the device is unconfigured, the inq data is invalid. */ if (cgd->ccb_h.status == CAM_DEV_NOT_THERE) - cgd->inq_data.device = T_DIRECT; - - inq_data = &cgd->inq_data; + inq_data = NULL; + else + inq_data = &cgd->inq_data; #else /* !_KERNEL */ @@ -5170,13 +5169,12 @@ scsi_sense_sbuf(struct cam_device *device, struct ccb_scsiio *csio, xpt_gdev_type(cgd, csio->ccb_h.path); /* - * If the device is unconfigured, just pretend that it is a hard - * drive. scsi_op_desc() needs this. + * If the device is unconfigured, the inq data is invalid. */ if (cgd->ccb_h.status == CAM_DEV_NOT_THERE) - cgd->inq_data.device = T_DIRECT; - - inq_data = &cgd->inq_data; + inq_data = NULL; + else + inq_data = &cgd->inq_data; #else /* !_KERNEL */ diff --git a/sys/cam/scsi/scsi_da.c b/sys/cam/scsi/scsi_da.c index 773a786d08f7..3f18817030c1 100644 --- a/sys/cam/scsi/scsi_da.c +++ b/sys/cam/scsi/scsi_da.c @@ -2059,8 +2059,9 @@ dainit(void) status = xpt_register_async(AC_FOUND_DEVICE, daasync, NULL, NULL); if (status != CAM_REQ_CMP) { - printf("da: Failed to attach master async callback " - "due to status 0x%x!\n", status); + printf( + "da: Failed to attach master async callback due to status 0x%x!\n", + status); } else if (da_send_ordered) { /* Register our shutdown event handler */ if ((EVENTHANDLER_REGISTER(shutdown_post_sync, dashutdown, @@ -2186,10 +2187,10 @@ daasync(void *callback_arg, uint32_t code, path, daasync, AC_FOUND_DEVICE, cgd); - if (status != CAM_REQ_CMP - && status != CAM_REQ_INPROG) - printf("daasync: Unable to attach to new device " - "due to status 0x%x\n", status); + if (status != CAM_REQ_CMP && status != CAM_REQ_INPROG) + printf( + "daasync: Unable to attach to new device due to status 0x%x\n", + status); return; } case AC_ADVINFO_CHANGED: /* Doesn't touch periph */ @@ -2372,8 +2373,7 @@ dasysctlinit(void *context, int pending) SYSCTL_CHILDREN(softc->sysctl_tree), OID_AUTO, "optimal_nonseq_zones", CTLFLAG_RD, &softc->optimal_nonseq_zones, - "Optimal Number of Non-Sequentially Written Sequential Write " - "Preferred Zones"); + "Optimal Number of Non-Sequentially Written Sequential Write Preferred Zones"); SYSCTL_ADD_UQUAD(&softc->sysctl_ctx, SYSCTL_CHILDREN(softc->sysctl_tree), OID_AUTO, "max_seq_zones", CTLFLAG_RD, &softc->max_seq_zones, @@ -2859,8 +2859,8 @@ daregister(struct cam_periph *periph, void *arg) M_NOWAIT|M_ZERO); if (softc == NULL) { - printf("daregister: Unable to probe new device. " - "Unable to allocate softc\n"); + printf( + "daregister: Unable to probe new device. Unable to allocate softc\n"); return(CAM_REQ_CMP_ERR); } @@ -3035,8 +3035,8 @@ daregister(struct cam_periph *periph, void *arg) if (cam_iosched_init(&softc->cam_iosched, periph, softc->disk, daschedule) != 0) { - printf("daregister: Unable to probe new device. " - "Unable to allocate iosched memory\n"); + printf( + "daregister: Unable to probe new device. Unable to allocate iosched memory\n"); free(softc, M_DEVBUF); return(CAM_REQ_CMP_ERR); } @@ -3115,8 +3115,9 @@ da_zone_cmd(struct cam_periph *periph, union ccb *ccb, struct bio *bp, zone_sa = da_zone_bio_to_scsi(bp->bio_zone.zone_cmd); if (zone_sa == -1) { - xpt_print(periph->path, "Cannot translate zone " - "cmd %#x to SCSI\n", bp->bio_zone.zone_cmd); + xpt_print(periph->path, + "Cannot translate zone cmd %#x to SCSI\n", + bp->bio_zone.zone_cmd); error = EINVAL; goto bailout; } @@ -3180,8 +3181,7 @@ da_zone_cmd(struct cam_periph *periph, union ccb *ccb, struct bio *bp, if (error != 0) { error = EINVAL; xpt_print(periph->path, - "scsi_ata_zac_mgmt_out() returned an " - "error!"); + "scsi_ata_zac_mgmt_out() returned an error!"); goto bailout; } } @@ -3198,8 +3198,8 @@ da_zone_cmd(struct cam_periph *periph, union ccb *ccb, struct bio *bp, num_entries = rep->entries_allocated; if (num_entries == 0) { - xpt_print(periph->path, "No entries allocated for " - "Report Zones request\n"); + xpt_print(periph->path, + "No entries allocated for Report Zones request\n"); error = EINVAL; goto bailout; } @@ -3208,8 +3208,8 @@ da_zone_cmd(struct cam_periph *periph, union ccb *ccb, struct bio *bp, alloc_size = min(alloc_size, softc->disk->d_maxsize); rz_ptr = malloc(alloc_size, M_SCSIDA, M_NOWAIT | M_ZERO); if (rz_ptr == NULL) { - xpt_print(periph->path, "Unable to allocate memory " - "for Report Zones request\n"); + xpt_print(periph->path, + "Unable to allocate memory for Report Zones request\n"); error = ENOMEM; goto bailout; } @@ -3266,8 +3266,7 @@ da_zone_cmd(struct cam_periph *periph, union ccb *ccb, struct bio *bp, if (error != 0) { error = EINVAL; xpt_print(periph->path, - "scsi_ata_zac_mgmt_in() returned an " - "error!"); + "scsi_ata_zac_mgmt_in() returned an error!"); goto bailout; } } @@ -3599,8 +3598,8 @@ out: mode_buf_len = 192; mode_buf = malloc(mode_buf_len, M_SCSIDA, M_NOWAIT); if (mode_buf == NULL) { - xpt_print(periph->path, "Unable to send mode sense - " - "malloc failure\n"); + xpt_print(periph->path, + "Unable to send mode sense - malloc failure\n"); if ((softc->flags & DA_FLAG_CAN_RC16) != 0) softc->state = DA_STATE_PROBE_RC16; else @@ -3882,8 +3881,7 @@ out: log_dir = malloc(sizeof(*log_dir), M_SCSIDA, M_NOWAIT|M_ZERO); if (log_dir == NULL) { - xpt_print(periph->path, "Couldn't malloc log_dir " - "data\n"); + xpt_print(periph->path, "Couldn't malloc log_dir data\n"); daprobedone(periph, start_ccb); break; } @@ -3932,8 +3930,7 @@ out: id_dir = malloc(sizeof(*id_dir), M_SCSIDA, M_NOWAIT | M_ZERO); if (id_dir == NULL) { - xpt_print(periph->path, "Couldn't malloc id_dir " - "data\n"); + xpt_print(periph->path, "Couldn't malloc id_dir data\n"); daprobedone(periph, start_ccb); break; } @@ -3981,8 +3978,7 @@ out: sup_cap = malloc(sizeof(*sup_cap), M_SCSIDA, M_NOWAIT|M_ZERO); if (sup_cap == NULL) { - xpt_print(periph->path, "Couldn't malloc sup_cap " - "data\n"); + xpt_print(periph->path, "Couldn't malloc sup_cap data\n"); daprobedone(periph, start_ccb); break; } @@ -4032,8 +4028,7 @@ out: ata_zone = malloc(sizeof(*ata_zone), M_SCSIDA, M_NOWAIT|M_ZERO); if (ata_zone == NULL) { - xpt_print(periph->path, "Couldn't malloc ata_zone " - "data\n"); + xpt_print(periph->path, "Couldn't malloc ata_zone data\n"); daprobedone(periph, start_ccb); break; } @@ -4084,8 +4079,7 @@ out: if (bdc == NULL) { xpt_release_ccb(start_ccb); - xpt_print(periph->path, "Couldn't malloc zone VPD " - "data\n"); + xpt_print(periph->path, "Couldn't malloc zone VPD data\n"); break; } scsi_inquiry(&start_ccb->csio, @@ -4201,8 +4195,7 @@ da_delete_unmap(struct cam_periph *periph, union ccb *ccb, struct bio *bp) if (totalcount + c > softc->unmap_max_lba || ranges >= softc->unmap_max_ranges) { xpt_print(periph->path, - "%s issuing short delete %ld > %ld" - "|| %d >= %d", + "%s issuing short delete %ld > %ld || %d >= %d", da_delete_method_desc[softc->delete_method], totalcount + c, softc->unmap_max_lba, ranges, softc->unmap_max_ranges); @@ -4483,8 +4476,8 @@ cmd6workaround(union ccb *ccb) (*cdb != READ_6 && *cdb != WRITE_6)) return 0; - xpt_print(ccb->ccb_h.path, "READ(6)/WRITE(6) not supported, " - "increasing minimum_cmd_size to 10.\n"); + xpt_print(ccb->ccb_h.path, + "READ(6)/WRITE(6) not supported, increasing minimum_cmd_size to 10.\n"); softc->minimum_cmd_size = 10; bcopy(cdb, &cmd6, sizeof(struct scsi_rw_6)); @@ -5124,8 +5117,7 @@ dadone_proberc(struct cam_periph *periph, union ccb *done_ccb) &cgd.inq_data, &sense_key_desc, &asc_desc); snprintf(announce_buf, DA_ANNOUNCETMP_SZ, - "Attempt to query device " - "size failed: %s, %s", + "Attempt to query device size failed: %s, %s", sense_key_desc, asc_desc); } else { if (have_sense) @@ -5135,9 +5127,8 @@ dadone_proberc(struct cam_periph *periph, union ccb *done_ccb) "got CAM status %#x\n", done_ccb->ccb_h.status); } - - xpt_print(periph->path, "fatal error, " - "failed to attach to device\n"); + xpt_print(periph->path, + "fatal error, failed to attach to device\n"); announce_buf = NULL; @@ -5171,8 +5162,8 @@ dadone_proberc(struct cam_periph *periph, union ccb *done_ccb) &softc->sysctl_task); } else { /* XXX This message is useless! */ - xpt_print(periph->path, "fatal error, " - "could not acquire reference count\n"); + xpt_print(periph->path, + "fatal error, could not acquire reference count\n"); } } @@ -5410,8 +5401,7 @@ dadone_probebdc(struct cam_periph *periph, union ccb *done_ccb) DA_ZONE_IF_ATA_SAT : DA_ZONE_IF_SCSI; } else if ((bdc->flags & SVPD_ZBC_MASK) != SVPD_ZBC_NR) { - xpt_print(periph->path, "Unknown zoned " - "type %#x", + xpt_print(periph->path, "Unknown zoned type %#x", bdc->flags & SVPD_ZBC_MASK); } } @@ -6516,8 +6506,9 @@ dasetgeom(struct cam_periph *periph, uint32_t block_len, uint64_t maxsector, if ((cdai.ccb_h.status & CAM_DEV_QFRZN) != 0) cam_release_devq(cdai.ccb_h.path, 0, 0, 0, FALSE); if (cdai.ccb_h.status != CAM_REQ_CMP) { - xpt_print(periph->path, "%s: failed to set read " - "capacity advinfo\n", __func__); + xpt_print(periph->path, + "%s: failed to set read capacity advinfo\n", + __func__); /* Use cam_error_print() to decode the status */ cam_error_print((union ccb *)&cdai, CAM_ESF_CAM_STATUS, CAM_EPF_ALL); diff --git a/sys/cddl/compat/opensolaris/sys/cpuvar_defs.h b/sys/cddl/compat/opensolaris/sys/cpuvar_defs.h index d99eaea7947e..1bcc721b7c15 100644 --- a/sys/cddl/compat/opensolaris/sys/cpuvar_defs.h +++ b/sys/cddl/compat/opensolaris/sys/cpuvar_defs.h @@ -40,9 +40,6 @@ #define CPU_DTRACE_KPRIV 0x0080 /* DTrace fault: bad kernel access */ #define CPU_DTRACE_UPRIV 0x0100 /* DTrace fault: bad user access */ #define CPU_DTRACE_TUPOFLOW 0x0200 /* DTrace fault: tuple stack overflow */ -#if defined(__sparc) -#define CPU_DTRACE_FAKERESTORE 0x0400 /* pid provider hint to getreg */ -#endif #define CPU_DTRACE_ENTRY 0x0800 /* pid provider hint to ustack() */ #define CPU_DTRACE_BADSTACK 0x1000 /* DTrace fault: bad stack */ diff --git a/sys/cddl/contrib/opensolaris/uts/common/dtrace/fasttrap.c b/sys/cddl/contrib/opensolaris/uts/common/dtrace/fasttrap.c index 28e2c26f5b1c..42c50ce07d03 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/dtrace/fasttrap.c +++ b/sys/cddl/contrib/opensolaris/uts/common/dtrace/fasttrap.c @@ -2167,11 +2167,7 @@ fasttrap_meta_create_probe(void *arg, void *parg, pp->ftp_tps[i].fit_tp = tp; pp->ftp_tps[i].fit_id.fti_probe = pp; -#ifdef __sparc - pp->ftp_tps[i].fit_id.fti_ptype = DTFTP_POST_OFFSETS; -#else pp->ftp_tps[i].fit_id.fti_ptype = DTFTP_OFFSETS; -#endif } /* diff --git a/sys/cddl/contrib/opensolaris/uts/common/sys/dtrace.h b/sys/cddl/contrib/opensolaris/uts/common/sys/dtrace.h index 242a32e140f5..c322071c6193 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/sys/dtrace.h +++ b/sys/cddl/contrib/opensolaris/uts/common/sys/dtrace.h @@ -2411,11 +2411,6 @@ extern void dtrace_invop_add(int (*)(uintptr_t, struct trapframe *, uintptr_t)); extern void dtrace_invop_remove(int (*)(uintptr_t, struct trapframe *, uintptr_t)); -#ifdef __sparc -extern int dtrace_blksuword32(uintptr_t, uint32_t *, int); -extern void dtrace_getfsr(uint64_t *); -#endif - #ifndef illumos extern void dtrace_helpers_duplicate(proc_t *, proc_t *); extern void dtrace_helpers_destroy(proc_t *); diff --git a/sys/cddl/contrib/opensolaris/uts/common/sys/dtrace_impl.h b/sys/cddl/contrib/opensolaris/uts/common/sys/dtrace_impl.h index 10ba0d37ac1b..c26956a646ff 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/sys/dtrace_impl.h +++ b/sys/cddl/contrib/opensolaris/uts/common/sys/dtrace_impl.h @@ -1302,15 +1302,8 @@ extern int dtrace_attached(void); extern hrtime_t dtrace_gethrestime(void); #endif -#ifdef __sparc -extern void dtrace_flush_windows(void); -extern void dtrace_flush_user_windows(void); -extern uint_t dtrace_getotherwin(void); -extern uint_t dtrace_getfprs(void); -#else extern void dtrace_copy(uintptr_t, uintptr_t, size_t); extern void dtrace_copystr(uintptr_t, uintptr_t, size_t, volatile uint16_t *); -#endif /* * DTrace Assertions diff --git a/sys/cddl/contrib/opensolaris/uts/common/sys/isa_defs.h b/sys/cddl/contrib/opensolaris/uts/common/sys/isa_defs.h index 93f1855b3908..2e4281d959a8 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/sys/isa_defs.h +++ b/sys/cddl/contrib/opensolaris/uts/common/sys/isa_defs.h @@ -109,7 +109,7 @@ * * _LP64: * Long/Pointer are 64 bits, Int is 32 bits. This is the chosen - * implementation for 64-bit ABIs such as SPARC V9. + * implementation for 64-bit ABIs. * * _I32LPx: * A compilation environment where 'int' is 32-bit, and @@ -190,7 +190,7 @@ * __x86 * This is ONLY a synonym for defined(__i386) || defined(__amd64) * which is useful only insofar as these two architectures share - * common attributes. Analogous to __sparc. + * common attributes. * * _PSM_MODULES * This indicates whether or not the implementation uses PSM @@ -235,9 +235,6 @@ extern "C" { /* * Define the appropriate "processor characteristics" */ -#ifdef illumos -#define _LITTLE_ENDIAN -#endif #define _STACK_GROWS_DOWNWARD #define _LONG_LONG_LTOH #define _BIT_FIELDS_LTOH @@ -302,9 +299,6 @@ extern "C" { /* * Define the appropriate "processor characteristics" */ -#ifdef illumos -#define _LITTLE_ENDIAN -#endif #define _STACK_GROWS_DOWNWARD #define _LONG_LONG_LTOH #define _BIT_FIELDS_LTOH @@ -475,71 +469,6 @@ extern "C" { #define _DONT_USE_1275_GENERIC_NAMES #define _HAVE_CPUID_INSN -#elif defined(__mips__) - -/* - * Define the appropriate "processor characteristics" - */ -#define _STACK_GROWS_DOWNWARD -#define _LONG_LONG_LTOH -#define _BIT_FIELDS_LTOH -#define _IEEE_754 -#define _CHAR_IS_SIGNED -#define _BOOL_ALIGNMENT 1 -#define _CHAR_ALIGNMENT 1 -#define _SHORT_ALIGNMENT 2 -#define _INT_ALIGNMENT 4 -#define _FLOAT_ALIGNMENT 4 -#define _FLOAT_COMPLEX_ALIGNMENT 4 -#if defined(__mips_n64) -#define _LONG_ALIGNMENT 8 -#define _LONG_LONG_ALIGNMENT 8 -#define _DOUBLE_ALIGNMENT 8 -#define _DOUBLE_COMPLEX_ALIGNMENT 8 -#define _LONG_DOUBLE_ALIGNMENT 8 -#define _LONG_DOUBLE_COMPLEX_ALIGNMENT 8 -#define _POINTER_ALIGNMENT 8 -#define _MAX_ALIGNMENT 8 -#define _ALIGNMENT_REQUIRED 0 - -#define _LONG_LONG_ALIGNMENT_32 _INT_ALIGNMENT -/* - * Define the appropriate "implementation choices". - */ -#if !defined(_LP64) -#define _LP64 -#endif -#else -#define _LONG_ALIGNMENT 4 -#define _LONG_LONG_ALIGNMENT 4 -#define _DOUBLE_ALIGNMENT 4 -#define _DOUBLE_COMPLEX_ALIGNMENT 4 -#define _LONG_DOUBLE_ALIGNMENT 4 -#define _LONG_DOUBLE_COMPLEX_ALIGNMENT 4 -#define _POINTER_ALIGNMENT 4 -#define _MAX_ALIGNMENT 4 -#define _ALIGNMENT_REQUIRED 0 - -#define _LONG_LONG_ALIGNMENT_32 _LONG_LONG_ALIGNMENT - -/* - * Define the appropriate "implementation choices". - */ -#if !defined(_ILP32) -#define _ILP32 -#endif -#if !defined(_I32LPx) && defined(_KERNEL) -#define _I32LPx -#endif -#endif -#define _SUNOS_VTOC_16 -#define _DMA_USES_PHYSADDR -#define _FIRMWARE_NEEDS_FDISK -#define _PSM_MODULES -#define _RTC_CONFIG -#define _DONT_USE_1275_GENERIC_NAMES -#define _HAVE_CPUID_INSN - #elif defined(__powerpc__) #if defined(__BIG_ENDIAN__) @@ -549,137 +478,6 @@ extern "C" { #endif /* - * The following set of definitions characterize the Solaris on SPARC systems. - * - * The symbol __sparc indicates any of the SPARC family of processor - * architectures. This includes SPARC V7, SPARC V8 and SPARC V9. - * - * The symbol __sparcv8 indicates the 32-bit SPARC V8 architecture as defined - * by Version 8 of the SPARC Architecture Manual. (SPARC V7 is close enough - * to SPARC V8 for the former to be subsumed into the latter definition.) - * - * The symbol __sparcv9 indicates the 64-bit SPARC V9 architecture as defined - * by Version 9 of the SPARC Architecture Manual. - * - * The symbols __sparcv8 and __sparcv9 are mutually exclusive, and are only - * relevant when the symbol __sparc is defined. - */ -/* - * XXX Due to the existence of 5110166, "defined(__sparcv9)" needs to be added - * to support backwards builds. This workaround should be removed in s10_71. - */ -#elif defined(__sparc) || defined(__sparcv9) || defined(__sparc__) -#if !defined(__sparc) -#define __sparc -#endif - -/* - * You can be 32-bit or 64-bit, but not both at the same time. - */ -#if defined(__sparcv8) && defined(__sparcv9) -#error "SPARC Versions 8 and 9 are mutually exclusive choices" -#endif - -/* - * Existing compilers do not set __sparcv8. Years will transpire before - * the compilers can be depended on to set the feature test macro. In - * the interim, we'll set it here on the basis of historical behaviour; - * if you haven't asked for SPARC V9, then you must've meant SPARC V8. - */ -#if !defined(__sparcv9) && !defined(__sparcv8) -#define __sparcv8 -#endif - -/* - * Define the appropriate "processor characteristics" shared between - * all Solaris on SPARC systems. - */ -#ifdef illumos -#define _BIG_ENDIAN -#endif -#define _STACK_GROWS_DOWNWARD -#define _LONG_LONG_HTOL -#define _BIT_FIELDS_HTOL -#define _IEEE_754 -#define _CHAR_IS_SIGNED -#define _BOOL_ALIGNMENT 1 -#define _CHAR_ALIGNMENT 1 -#define _SHORT_ALIGNMENT 2 -#define _INT_ALIGNMENT 4 -#define _FLOAT_ALIGNMENT 4 -#define _FLOAT_COMPLEX_ALIGNMENT 4 -#define _LONG_LONG_ALIGNMENT 8 -#define _DOUBLE_ALIGNMENT 8 -#define _DOUBLE_COMPLEX_ALIGNMENT 8 -#define _ALIGNMENT_REQUIRED 1 - -/* - * Define the appropriate "implementation choices" shared between versions. - */ -#define _SUNOS_VTOC_8 -#define _DMA_USES_VIRTADDR -#define _NO_FDISK_PRESENT -#define _HAVE_TEM_FIRMWARE -#define _OBP - -/* - * The following set of definitions characterize the implementation of - * 32-bit Solaris on SPARC V8 systems. - */ -#if defined(__sparcv8) - -/* - * Define the appropriate "processor characteristics" - */ -#define _LONG_ALIGNMENT 4 -#define _LONG_DOUBLE_ALIGNMENT 8 -#define _LONG_DOUBLE_COMPLEX_ALIGNMENT 8 -#define _POINTER_ALIGNMENT 4 -#define _MAX_ALIGNMENT 8 - -#define _LONG_LONG_ALIGNMENT_32 _LONG_LONG_ALIGNMENT - -/* - * Define the appropriate "implementation choices" - */ -#define _ILP32 -#if !defined(_I32LPx) && defined(_KERNEL) -#define _I32LPx -#endif - -/* - * The following set of definitions characterize the implementation of - * 64-bit Solaris on SPARC V9 systems. - */ -#elif defined(__sparcv9) - -/* - * Define the appropriate "processor characteristics" - */ -#define _LONG_ALIGNMENT 8 -#define _LONG_DOUBLE_ALIGNMENT 16 -#define _LONG_DOUBLE_COMPLEX_ALIGNMENT 16 -#define _POINTER_ALIGNMENT 8 -#define _MAX_ALIGNMENT 16 - -#define _LONG_LONG_ALIGNMENT_32 _LONG_LONG_ALIGNMENT - -/* - * Define the appropriate "implementation choices" - */ -#if !defined(_LP64) -#define _LP64 -#endif -#if !defined(_I32LPx) -#define _I32LPx -#endif -#define _MULTI_DATAMODEL - -#else -#error "unknown SPARC version" -#endif - -/* * #error is strictly ansi-C, but works as well as anything for K&R systems. */ #else diff --git a/sys/cddl/contrib/opensolaris/uts/mips/dtrace/fasttrap_isa.c b/sys/cddl/contrib/opensolaris/uts/mips/dtrace/fasttrap_isa.c deleted file mode 100644 index a31eac8cf0b8..000000000000 --- a/sys/cddl/contrib/opensolaris/uts/mips/dtrace/fasttrap_isa.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License (the "License"). - * You may not use this file except in compliance with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ - -/* - * Copyright 2007 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - - -/* - * XXX: Placeholder for MIPS fasttrap code - */ diff --git a/sys/cddl/contrib/opensolaris/uts/mips/sys/fasttrap_isa.h b/sys/cddl/contrib/opensolaris/uts/mips/sys/fasttrap_isa.h deleted file mode 100644 index eb99752ce415..000000000000 --- a/sys/cddl/contrib/opensolaris/uts/mips/sys/fasttrap_isa.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 2005 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#ifndef _FASTTRAP_ISA_H -#define _FASTTRAP_ISA_H - -#pragma ident "%Z%%M% %I% %E% SMI" - -#include <sys/types.h> - -#ifdef __cplusplus -extern "C" { -#endif -/* - * XXXDTRACE: placehodler for MIPS fasttrap stuff - */ - -typedef uint32_t fasttrap_instr_t; -#define FASTTRAP_SUNWDTRACE_SIZE 64 - -#ifdef __cplusplus -} -#endif - -#endif /* _FASTTRAP_ISA_H */ diff --git a/sys/compat/linux/linux_ioctl.c b/sys/compat/linux/linux_ioctl.c index ceb17bd040b5..d2fa0331026b 100644 --- a/sys/compat/linux/linux_ioctl.c +++ b/sys/compat/linux/linux_ioctl.c @@ -58,6 +58,7 @@ #include <net/if_types.h> #include <dev/evdev/input.h> +#include <dev/hid/hidraw.h> #include <dev/usb/usb_ioctl.h> #ifdef COMPAT_LINUX32 @@ -113,6 +114,7 @@ DEFINE_LINUX_IOCTL_SET(kcov, KCOV); #ifndef COMPAT_LINUX32 DEFINE_LINUX_IOCTL_SET(nvme, NVME); #endif +DEFINE_LINUX_IOCTL_SET(hidraw, HIDRAW); #undef DEFINE_LINUX_IOCTL_SET @@ -331,6 +333,17 @@ struct linux_termios { unsigned char c_cc[LINUX_NCCS]; }; +struct linux_termios2 { + unsigned int c_iflag; + unsigned int c_oflag; + unsigned int c_cflag; + unsigned int c_lflag; + unsigned char c_line; + unsigned char c_cc[LINUX_NCCS]; + unsigned int c_ispeed; + unsigned int c_ospeed; +}; + struct linux_winsize { unsigned short ws_row, ws_col; unsigned short ws_xpixel, ws_ypixel; @@ -386,7 +399,7 @@ bsd_to_linux_speed(int speed, struct speedtab *table) for ( ; table->sp_speed != -1; table++) if (table->sp_speed == speed) return (table->sp_code); - return (-1); + return (LINUX_BOTHER); } static void @@ -509,6 +522,14 @@ bsd_to_linux_termios(struct termios *bios, struct linux_termios *lios) } static void +bsd_to_linux_termios2(struct termios *bios, struct linux_termios2 *lios2) +{ + bsd_to_linux_termios(bios, (struct linux_termios *)lios2); + lios2->c_ospeed = bios->c_ospeed; + lios2->c_ispeed = bios->c_ispeed; +} + +static void linux_to_bsd_termios(struct linux_termios *lios, struct termios *bios) { int i; @@ -629,6 +650,16 @@ linux_to_bsd_termios(struct linux_termios *lios, struct termios *bios) } static void +linux_to_bsd_termios2(struct linux_termios2 *lios2, struct termios *bios) +{ + linux_to_bsd_termios((struct linux_termios *)lios2, bios); + if ((lios2->c_cflag & LINUX_CBAUD) == LINUX_BOTHER) + bios->c_ospeed = lios2->c_ospeed; + if ((lios2->c_cflag & LINUX_CIBAUD) == LINUX_BOTHER << LINUX_IBSHIFT) + bios->c_ispeed = lios2->c_ispeed; +} + +static void bsd_to_linux_termio(struct termios *bios, struct linux_termio *lio) { struct linux_termios lios; @@ -664,6 +695,7 @@ linux_ioctl_termio(struct thread *td, struct linux_ioctl_args *args) { struct termios bios; struct linux_termios lios; + struct linux_termios2 lios2; struct linux_termio lio; struct file *fp; int error; @@ -1001,6 +1033,43 @@ linux_ioctl_termio(struct thread *td, struct linux_ioctl_args *args) args->cmd = TIOCCBRK; error = (sys_ioctl(td, (struct ioctl_args *)args)); break; + + case LINUX_TCGETS2: + error = fo_ioctl(fp, TIOCGETA, (caddr_t)&bios, td->td_ucred, + td); + if (error) + break; + bsd_to_linux_termios2(&bios, &lios2); + error = copyout(&lios2, (void *)args->arg, sizeof(lios2)); + break; + + case LINUX_TCSETS2: + error = copyin((void *)args->arg, &lios2, sizeof(lios2)); + if (error) + break; + linux_to_bsd_termios2(&lios2, &bios); + error = (fo_ioctl(fp, TIOCSETA, (caddr_t)&bios, td->td_ucred, + td)); + break; + + case LINUX_TCSETSW2: + error = copyin((void *)args->arg, &lios2, sizeof(lios2)); + if (error) + break; + linux_to_bsd_termios2(&lios2, &bios); + error = (fo_ioctl(fp, TIOCSETAW, (caddr_t)&bios, td->td_ucred, + td)); + break; + + case LINUX_TCSETSF2: + error = copyin((void *)args->arg, &lios2, sizeof(lios2)); + if (error) + break; + linux_to_bsd_termios2(&lios2, &bios); + error = (fo_ioctl(fp, TIOCSETAF, (caddr_t)&bios, td->td_ucred, + td)); + break; + case LINUX_TIOCGPTN: { int nb; @@ -3570,6 +3639,55 @@ linux_ioctl_nvme(struct thread *td, struct linux_ioctl_args *args) } #endif +static int +linux_ioctl_hidraw(struct thread *td, struct linux_ioctl_args *args) +{ + int len = (args->cmd & 0x3fff0000) >> 16; + if (len > 8192) + return (EINVAL); + + switch (args->cmd & 0xffff) { + case LINUX_HIDIOCGRDESCSIZE: + args->cmd = HIDIOCGRDESCSIZE; + break; + case LINUX_HIDIOCGRDESC: + args->cmd = HIDIOCGRDESC; + break; + case LINUX_HIDIOCGRAWINFO: + args->cmd = HIDIOCGRAWINFO; + break; + case LINUX_HIDIOCGRAWNAME: + args->cmd = HIDIOCGRAWNAME(len); + break; + case LINUX_HIDIOCGRAWPHYS: + args->cmd = HIDIOCGRAWPHYS(len); + break; + case LINUX_HIDIOCSFEATURE: + args->cmd = HIDIOCSFEATURE(len); + break; + case LINUX_HIDIOCGFEATURE: + args->cmd = HIDIOCGFEATURE(len); + break; + case LINUX_HIDIOCGRAWUNIQ: + args->cmd = HIDIOCGRAWUNIQ(len); + break; + case LINUX_HIDIOCSINPUT: + args->cmd = HIDIOCSINPUT(len); + break; + case LINUX_HIDIOCGINPUT: + args->cmd = HIDIOCGINPUT(len); + break; + case LINUX_HIDIOCSOUTPUT: + args->cmd = HIDIOCSOUTPUT(len); + break; + case LINUX_HIDIOCGOUTPUT: + args->cmd = HIDIOCGOUTPUT(len); + break; + } + + return (sys_ioctl(td, (struct ioctl_args *)args)); +} + /* * main ioctl syscall function */ diff --git a/sys/compat/linux/linux_ioctl.h b/sys/compat/linux/linux_ioctl.h index 8345b7e4b719..116a4e676228 100644 --- a/sys/compat/linux/linux_ioctl.h +++ b/sys/compat/linux/linux_ioctl.h @@ -383,6 +383,11 @@ #define LINUX_TIOCSBRK 0x5427 #define LINUX_TIOCCBRK 0x5428 +#define LINUX_TCGETS2 0x542A +#define LINUX_TCSETS2 0x542B +#define LINUX_TCSETSW2 0x542C +#define LINUX_TCSETSF2 0x542D + #define LINUX_TIOCGPTN 0x5430 #define LINUX_TIOCSPTLCK 0x5431 @@ -501,6 +506,7 @@ #define LINUX_FF1 0x0008000 #define LINUX_CBAUD 0x0000100f +#define LINUX_CIBAUD (LINUX_CBAUD << LINUX_IBSHIFT) #define LINUX_B0 0x00000000 #define LINUX_B50 0x00000001 @@ -537,8 +543,12 @@ #define LINUX_HUPCL 0x00000400 #define LINUX_CLOCAL 0x00000800 +#define LINUX_BOTHER 0x00001000 + #define LINUX_CRTSCTS 0x80000000 +#define LINUX_IBSHIFT 16 + /* Linux c_lflag masks */ #define LINUX_ISIG 0x00000001 #define LINUX_ICANON 0x00000002 @@ -797,6 +807,25 @@ #define LINUX_IOCTL_NVME_MAX LINUX_NVME_IOCTL_RESCAN /* + * hidraw + */ +#define LINUX_HIDIOCGRDESCSIZE 0x4801 +#define LINUX_HIDIOCGRDESC 0x4802 +#define LINUX_HIDIOCGRAWINFO 0x4803 +#define LINUX_HIDIOCGRAWNAME 0x4804 +#define LINUX_HIDIOCGRAWPHYS 0x4805 +#define LINUX_HIDIOCSFEATURE 0x4806 +#define LINUX_HIDIOCGFEATURE 0x4807 +#define LINUX_HIDIOCGRAWUNIQ 0x4808 +#define LINUX_HIDIOCSINPUT 0x4809 +#define LINUX_HIDIOCGINPUT 0x480A +#define LINUX_HIDIOCSOUTPUT 0x480B +#define LINUX_HIDIOCGOUTPUT 0x480C + +#define LINUX_IOCTL_HIDRAW_MIN LINUX_HIDIOCGRDESCSIZE +#define LINUX_IOCTL_HIDRAW_MAX LINUX_HIDIOCGOUTPUT + +/* * Pluggable ioctl handlers */ struct linux_ioctl_args; diff --git a/sys/compat/linux/linux_timer.c b/sys/compat/linux/linux_timer.c index ed9133359302..230be9572b85 100644 --- a/sys/compat/linux/linux_timer.c +++ b/sys/compat/linux/linux_timer.c @@ -131,7 +131,7 @@ linux_timer_settime(struct thread *td, struct linux_timer_settime_args *uap) return (error); error = kern_ktimer_settime(td, uap->timerid, flags, &val, ovalp); if (error == 0 && uap->old != NULL) { - error = native_to_linux_itimerspec(&l_val, &val); + error = native_to_linux_itimerspec(&l_oval, &oval); if (error == 0) error = copyout(&l_oval, uap->old, sizeof(l_oval)); } @@ -158,7 +158,7 @@ linux_timer_settime64(struct thread *td, struct linux_timer_settime64_args *uap) return (error); error = kern_ktimer_settime(td, uap->timerid, flags, &val, ovalp); if (error == 0 && uap->old != NULL) { - error = native_to_linux_itimerspec64(&l_val, &val); + error = native_to_linux_itimerspec64(&l_oval, &oval); if (error == 0) error = copyout(&l_oval, uap->old, sizeof(l_oval)); } diff --git a/sys/compat/linuxkpi/common/include/asm/unaligned.h b/sys/compat/linuxkpi/common/include/asm/unaligned.h index e45846a3b543..6778e9fcede1 100644 --- a/sys/compat/linuxkpi/common/include/asm/unaligned.h +++ b/sys/compat/linuxkpi/common/include/asm/unaligned.h @@ -48,6 +48,13 @@ get_unaligned_le32(const void *p) return (le32_to_cpup((const __le32 *)p)); } +static __inline uint64_t +get_unaligned_le64(const void *p) +{ + + return (le64_to_cpup((const __le64 *)p)); +} + static __inline void put_unaligned_le16(__le16 v, void *p) { diff --git a/sys/compat/linuxkpi/common/include/linux/bitops.h b/sys/compat/linuxkpi/common/include/linux/bitops.h index 8fac80820f30..ebe9aa120094 100644 --- a/sys/compat/linuxkpi/common/include/linux/bitops.h +++ b/sys/compat/linuxkpi/common/include/linux/bitops.h @@ -437,4 +437,16 @@ sign_extend32(uint32_t value, int index) return ((int32_t)(value << shift) >> shift); } +static inline uint64_t +rol64(uint64_t word, unsigned int shift) +{ + return ((word << (shift & 63)) | (word >> ((-shift) & 63))); +} + +static inline uint32_t +rol32(uint32_t word, unsigned int shift) +{ + return ((word << (shift & 31)) | (word >> ((-shift) & 31))); +} + #endif /* _LINUXKPI_LINUX_BITOPS_H_ */ diff --git a/sys/compat/linuxkpi/common/include/linux/cec-funcs.h b/sys/compat/linuxkpi/common/include/linux/cec-funcs.h new file mode 100644 index 000000000000..1107b04e4e08 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/cec-funcs.h @@ -0,0 +1,16 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025-2026 The FreeBSD Foundation + * Copyright (c) 2025-2026 Jean-Sébastien Pédron <dumbbell@FreeBSD.org> + * + * This software was developed by Jean-Sébastien Pédron under sponsorship + * from the FreeBSD Foundation. + */ + +#ifndef _LINUXKPI_LINUX_CEC_FUNCS_H_ +#define _LINUXKPI_LINUX_CEC_FUNCS_H_ + +#include <linux/cec.h> + +#endif diff --git a/sys/compat/linuxkpi/common/include/linux/cec.h b/sys/compat/linuxkpi/common/include/linux/cec.h index e0854d87d85c..b08d891537a9 100644 --- a/sys/compat/linuxkpi/common/include/linux/cec.h +++ b/sys/compat/linuxkpi/common/include/linux/cec.h @@ -3,6 +3,9 @@ #ifndef _LINUXKPI_LINUX_CEC_H_ #define _LINUXKPI_LINUX_CEC_H_ +#include <linux/types.h> +#include <linux/string.h> + #define CEC_PHYS_ADDR_INVALID 0xffff #endif /* _LINUXKPI_LINUX_CEC_H_ */ diff --git a/sys/compat/linuxkpi/common/include/linux/cgroup.h b/sys/compat/linuxkpi/common/include/linux/cgroup.h index a9dd22fd0f4c..c75404fd6cf3 100644 --- a/sys/compat/linuxkpi/common/include/linux/cgroup.h +++ b/sys/compat/linuxkpi/common/include/linux/cgroup.h @@ -29,6 +29,15 @@ #ifndef _LINUXKPI_LINUX_CGROUP_H_ #define _LINUXKPI_LINUX_CGROUP_H_ +#include <linux/sched.h> +#include <linux/nodemask.h> +#include <linux/list.h> +#include <linux/rculist.h> +#include <linux/fs.h> +#include <linux/seq_file.h> +#include <linux/jump_label.h> +#include <linux/types.h> +#include <linux/refcount.h> #include <linux/kernel_stat.h> #endif /* _LINUXKPI_LINUX_CGROUP_H_ */ diff --git a/sys/compat/linuxkpi/common/include/linux/compiler.h b/sys/compat/linuxkpi/common/include/linux/compiler.h index 4146c829b936..90d907dd4d45 100644 --- a/sys/compat/linuxkpi/common/include/linux/compiler.h +++ b/sys/compat/linuxkpi/common/include/linux/compiler.h @@ -33,48 +33,18 @@ #include <sys/cdefs.h> #include <sys/endian.h> -#define __user -#define __kernel -#define __safe -#define __force -#define __nocast -#define __iomem -#define __chk_user_ptr(x) ((void)0) -#define __chk_io_ptr(x) ((void)0) -#define __builtin_warning(x, y...) (1) -#define __acquires(x) -#define __releases(x) -#define __acquire(x) do { } while (0) -#define __release(x) do { } while (0) -#define __cond_lock(x,c) (c) +#include <compat/linuxkpi/common/include/linux/compiler_types.h> + #define __bitwise #define __devinitdata -#ifndef __deprecated -#define __deprecated -#endif #define __init #define __initconst #define __devinit #define __devexit #define __exit -#define __rcu -#define __percpu -#define __weak __weak_symbol -#define __malloc -#define __attribute_const__ __attribute__((__const__)) -#undef __always_inline -#define __always_inline inline -#define noinline __noinline -#define noinline_for_stack __noinline #define ____cacheline_aligned __aligned(CACHE_LINE_SIZE) #define ____cacheline_aligned_in_smp __aligned(CACHE_LINE_SIZE) -#define fallthrough /* FALLTHROUGH */ do { } while(0) -#if __has_attribute(__nonstring__) -#define __nonstring __attribute__((__nonstring__)) -#else -#define __nonstring -#endif #if __has_attribute(__counted_by__) #define __counted_by(_x) __attribute__((__counted_by__(_x))) #else @@ -93,24 +63,12 @@ #define typeof(x) __typeof(x) #define uninitialized_var(x) x = x -#define __maybe_unused __unused -#define __always_unused __unused -#define __must_check __result_use_check - -#define __printf(a,b) __printflike(a,b) - -#define __diag_push() -#define __diag_pop() -#define __diag_ignore_all(...) #define barrier() __asm__ __volatile__("": : :"memory") #define lower_32_bits(n) ((u32)(n)) #define upper_32_bits(n) ((u32)(((n) >> 16) >> 16)) -#define ___PASTE(a,b) a##b -#define __PASTE(a,b) ___PASTE(a,b) - #define WRITE_ONCE(x,v) do { \ barrier(); \ (*(volatile __typeof(x) *)(uintptr_t)&(x)) = (v); \ @@ -129,8 +87,6 @@ #define lockless_dereference(p) READ_ONCE(p) #define _AT(T,X) ((T)(X)) - -#define __same_type(a, b) __builtin_types_compatible_p(typeof(a), typeof(b)) #define __must_be_array(a) __same_type(a, &(a)[0]) #define sizeof_field(_s, _m) sizeof(((_s *)0)->_m) diff --git a/sys/compat/linuxkpi/common/include/linux/compiler_attributes.h b/sys/compat/linuxkpi/common/include/linux/compiler_attributes.h new file mode 100644 index 000000000000..42908bb6c2b5 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/compiler_attributes.h @@ -0,0 +1,49 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2010 Isilon Systems, Inc. + * Copyright (c) 2010 iX Systems, Inc. + * Copyright (c) 2010 Panasas, Inc. + * Copyright (c) 2013-2016 Mellanox Technologies, Ltd. + * Copyright (c) 2015 François Tigeot + * All rights reserved. + */ + +#ifndef _LINUXKPI_LINUX_COMPILER_ATTRIBUTES_H_ +#define _LINUXKPI_LINUX_COMPILER_ATTRIBUTES_H_ + +#include <sys/cdefs.h> + +#define __attribute_const__ __attribute__((__const__)) + +#ifndef __deprecated +#define __deprecated +#endif + +#define fallthrough /* FALLTHROUGH */ do { } while(0) + +#undef __always_inline +#define __always_inline inline + +#define __printf(a,b) __printflike(a,b) + +#define __malloc + +#define noinline __noinline + +#if __has_attribute(__nonstring__) +#define __nonstring __attribute__((__nonstring__)) +#else +#define __nonstring +#endif + +#define noinline_for_stack __noinline + +#define __maybe_unused __unused +#define __always_unused __unused + +#define __must_check __result_use_check + +#define __weak __weak_symbol + +#endif diff --git a/sys/compat/linuxkpi/common/include/linux/compiler_types.h b/sys/compat/linuxkpi/common/include/linux/compiler_types.h new file mode 100644 index 000000000000..7151c03de690 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/compiler_types.h @@ -0,0 +1,45 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2010 Isilon Systems, Inc. + * Copyright (c) 2010 iX Systems, Inc. + * Copyright (c) 2010 Panasas, Inc. + * Copyright (c) 2013-2016 Mellanox Technologies, Ltd. + * Copyright (c) 2015 François Tigeot + * All rights reserved. + */ + +#ifndef _LINUXKPI_LINUX_COMPILER_TYPES_H_ +#define _LINUXKPI_LINUX_COMPILER_TYPES_H_ + +#include <sys/cdefs.h> + +#include <compat/linuxkpi/common/include/linux/compiler_attributes.h> + +#define __kernel +#define __user +#define __iomem +#define __percpu +#define __rcu +#define __chk_user_ptr(x) ((void)0) +#define __chk_io_ptr(x) ((void)0) +#define __acquires(x) +#define __releases(x) +#define __acquire(x) do { } while (0) +#define __release(x) do { } while (0) +#define __cond_lock(x,c) (c) +#define __force +#define __nocast +#define __safe +#define __builtin_warning(x, y...) (1) + +#define ___PASTE(a,b) a##b +#define __PASTE(a,b) ___PASTE(a,b) + +#define __diag_push() +#define __diag_pop() +#define __diag_ignore_all(...) + +#define __same_type(a, b) __builtin_types_compatible_p(typeof(a), typeof(b)) + +#endif diff --git a/sys/compat/linuxkpi/common/include/linux/file.h b/sys/compat/linuxkpi/common/include/linux/file.h index f6e988c2d88e..be12d5f1bccf 100644 --- a/sys/compat/linuxkpi/common/include/linux/file.h +++ b/sys/compat/linuxkpi/common/include/linux/file.h @@ -39,6 +39,11 @@ #include <linux/fs.h> #include <linux/slab.h> +#include <linux/compiler.h> +#include <linux/types.h> +#include <linux/errno.h> +#include <linux/cleanup.h> + struct linux_file; #undef file diff --git a/sys/compat/linuxkpi/common/include/linux/font.h b/sys/compat/linuxkpi/common/include/linux/font.h new file mode 100644 index 000000000000..45daa00b61f0 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/font.h @@ -0,0 +1,33 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025-2026 The FreeBSD Foundation + * Copyright (c) 2025-2026 Jean-Sébastien Pédron <dumbbell@FreeBSD.org> + * + * This software was developed by Jean-Sébastien Pédron under sponsorship + * from the FreeBSD Foundation. + */ + +#ifndef _LINUXKPI_LINUX_FONT_H_ +#define _LINUXKPI_LINUX_FONT_H_ + +#include <linux/types.h> + +struct font_desc { + const char *name; + const void *data; + int idx; + unsigned int width; + unsigned int height; + unsigned int charcount; + int pref; +}; + +static inline const struct font_desc * +get_default_font(int xres, int yres, unsigned long *font_w, + unsigned long *font_h) +{ + return (NULL); +} + +#endif diff --git a/sys/compat/linuxkpi/common/include/linux/i2c.h b/sys/compat/linuxkpi/common/include/linux/i2c.h index f24d282586f6..a6a4ee85d584 100644 --- a/sys/compat/linuxkpi/common/include/linux/i2c.h +++ b/sys/compat/linuxkpi/common/include/linux/i2c.h @@ -31,7 +31,14 @@ #include <sys/errno.h> #include <sys/systm.h> +#include <linux/bits.h> +#include <linux/mod_devicetable.h> #include <linux/device.h> +#include <linux/sched.h> +#include <linux/mutex.h> +#include <linux/regulator/consumer.h> +#include <linux/irqdomain.h> +#include <linux/of.h> #define I2C_MAX_ADAPTER_NAME_LENGTH 32 diff --git a/sys/compat/linuxkpi/common/include/linux/kfifo.h b/sys/compat/linuxkpi/common/include/linux/kfifo.h index d2f570781661..fbe16e22683e 100644 --- a/sys/compat/linuxkpi/common/include/linux/kfifo.h +++ b/sys/compat/linuxkpi/common/include/linux/kfifo.h @@ -33,8 +33,26 @@ #include <linux/slab.h> #include <linux/gfp.h> -#define INIT_KFIFO(x) 0 -#define DECLARE_KFIFO(x, y, z) +/* + * INIT_KFIFO() is used to initialize the structure declared with + * DECLARE_KFIFO(). It doesn't work with DECLARE_KFIFO_PTR(). + */ +#define INIT_KFIFO(_kf) \ + ({ \ + (_kf).total = nitems((_kf).head); \ + (_kf).count = 0; \ + (_kf).first = 0; \ + (_kf).last = 0; \ + }) + +#define DECLARE_KFIFO(_name, _type, _size) \ + struct kfifo_ ## _name { \ + size_t total; \ + size_t count; \ + size_t first; \ + size_t last; \ + _type head[_size]; \ + } _name #define DECLARE_KFIFO_PTR(_name, _type) \ struct kfifo_ ## _name { \ diff --git a/sys/compat/linuxkpi/common/include/linux/kmsg_dump.h b/sys/compat/linuxkpi/common/include/linux/kmsg_dump.h new file mode 100644 index 000000000000..25f96b304f59 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/kmsg_dump.h @@ -0,0 +1,51 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025-2026 The FreeBSD Foundation + * Copyright (c) 2025-2026 Jean-Sébastien Pédron <dumbbell@FreeBSD.org> + * + * This software was developed by Jean-Sébastien Pédron under sponsorship + * from the FreeBSD Foundation. + */ + +#ifndef _LINUXKPI_LINUX_KMSG_DUMP_H_ +#define _LINUXKPI_LINUX_KMSG_DUMP_H_ + +#include <linux/errno.h> +#include <linux/list.h> + +#include <linux/kernel.h> /* For pr_debug() */ + +enum kmsg_dump_reason { + KMSG_DUMP_UNDEF, + KMSG_DUMP_PANIC, + KMSG_DUMP_OOPS, + KMSG_DUMP_EMERG, + KMSG_DUMP_SHUTDOWN, + KMSG_DUMP_MAX +}; + +struct kmsg_dumper { + struct list_head list; + void (*dump)(struct kmsg_dumper *dumper, enum kmsg_dump_reason reason); + enum kmsg_dump_reason max_reason; + bool registered; +}; + +static inline int +kmsg_dump_register(struct kmsg_dumper *dumper) +{ + pr_debug("TODO"); + + return (-EINVAL); +} + +static inline int +kmsg_dump_unregister(struct kmsg_dumper *dumper) +{ + pr_debug("TODO"); + + return (-EINVAL); +} + +#endif diff --git a/sys/compat/linuxkpi/common/include/linux/kstrtox.h b/sys/compat/linuxkpi/common/include/linux/kstrtox.h index 5da99de24197..05bf94dd375d 100644 --- a/sys/compat/linuxkpi/common/include/linux/kstrtox.h +++ b/sys/compat/linuxkpi/common/include/linux/kstrtox.h @@ -74,14 +74,17 @@ static inline int kstrtoul(const char *cp, unsigned int base, unsigned long *res) { char *end; + unsigned long temp; - *res = strtoul(cp, &end, base); + temp = strtoul(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') end++; if (*cp == 0 || *end != 0) return (-EINVAL); + + *res = temp; return (0); } @@ -89,14 +92,17 @@ static inline int kstrtol(const char *cp, unsigned int base, long *res) { char *end; + long temp; - *res = strtol(cp, &end, base); + temp = strtol(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') end++; if (*cp == 0 || *end != 0) return (-EINVAL); + + *res = temp; return (0); } @@ -106,7 +112,7 @@ kstrtoint(const char *cp, unsigned int base, int *res) char *end; long temp; - *res = temp = strtol(cp, &end, base); + temp = strtol(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') @@ -115,6 +121,8 @@ kstrtoint(const char *cp, unsigned int base, int *res) return (-EINVAL); if (temp != (int)temp) return (-ERANGE); + + *res = (int)temp; return (0); } @@ -124,7 +132,7 @@ kstrtouint(const char *cp, unsigned int base, unsigned int *res) char *end; unsigned long temp; - *res = temp = strtoul(cp, &end, base); + temp = strtoul(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') @@ -133,6 +141,8 @@ kstrtouint(const char *cp, unsigned int base, unsigned int *res) return (-EINVAL); if (temp != (unsigned int)temp) return (-ERANGE); + + *res = (unsigned int)temp; return (0); } @@ -142,7 +152,7 @@ kstrtou8(const char *cp, unsigned int base, uint8_t *res) char *end; unsigned long temp; - *res = temp = strtoul(cp, &end, base); + temp = strtoul(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') @@ -151,6 +161,8 @@ kstrtou8(const char *cp, unsigned int base, uint8_t *res) return (-EINVAL); if (temp != (uint8_t)temp) return (-ERANGE); + + *res = (uint8_t)temp; return (0); } @@ -160,7 +172,7 @@ kstrtou16(const char *cp, unsigned int base, uint16_t *res) char *end; unsigned long temp; - *res = temp = strtoul(cp, &end, base); + temp = strtoul(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') @@ -169,20 +181,20 @@ kstrtou16(const char *cp, unsigned int base, uint16_t *res) return (-EINVAL); if (temp != (uint16_t)temp) return (-ERANGE); + + *res = (uint16_t)temp; return (0); } static inline int kstrtou32(const char *cp, unsigned int base, uint32_t *res) { - return (kstrtouint(cp, base, res)); } static inline int kstrtos32(const char *cp, unsigned int base, int32_t *res) { - return (kstrtoint(cp, base, res)); } @@ -190,14 +202,17 @@ static inline int kstrtos64(const char *cp, unsigned int base, int64_t *res) { char *end; + quad_t temp; - *res = strtoq(cp, &end, base); + temp = strtoq(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') end++; if (*cp == 0 || *end != 0) return (-EINVAL); + + *res = (int64_t)temp; return (0); } @@ -208,17 +223,20 @@ kstrtoll(const char *cp, unsigned int base, long long *res) } static inline int -kstrtou64(const char *cp, unsigned int base, u64 *res) +kstrtou64(const char *cp, unsigned int base, uint64_t *res) { char *end; + u_quad_t temp; - *res = strtouq(cp, &end, base); + temp = strtouq(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') end++; if (*cp == 0 || *end != 0) return (-EINVAL); + + *res = (uint64_t)temp; return (0); } @@ -231,22 +249,16 @@ kstrtoull(const char *cp, unsigned int base, unsigned long long *res) static inline int kstrtobool(const char *s, bool *res) { - int len; - - if (s == NULL || (len = strlen(s)) == 0 || res == NULL) + if (s == NULL || *s == '\0') return (-EINVAL); - /* skip newline character, if any */ - if (s[len - 1] == '\n') - len--; - - if (len == 1 && strchr("yY1", s[0]) != NULL) + if (strchr("eEtTyY1", s[0]) != NULL) *res = true; - else if (len == 1 && strchr("nN0", s[0]) != NULL) + else if (strchr("dDfFnN0", s[0]) != NULL) *res = false; - else if (strncasecmp("on", s, len) == 0) + else if (strncasecmp("on", s, 2) == 0) *res = true; - else if (strncasecmp("off", s, len) == 0) + else if (strncasecmp("of", s, 2) == 0) *res = false; else return (-EINVAL); @@ -302,7 +314,6 @@ static inline int kstrtou32_from_user(const char __user *s, size_t count, unsigned int base, unsigned int *p) { - return (kstrtouint_from_user(s, count, base, p)); } diff --git a/lib/libc/powerpcspe/_fpmath.h b/sys/compat/linuxkpi/common/include/linux/memcontrol.h index 9bc7450aacaf..57fadf9af60f 100644 --- a/lib/libc/powerpcspe/_fpmath.h +++ b/sys/compat/linuxkpi/common/include/linux/memcontrol.h @@ -1,8 +1,9 @@ /*- - * SPDX-License-Identifier: BSD-2-Clause + * Copyright (c) 2025 The FreeBSD Foundation + * Copyright (c) 2025 Jean-Sébastien Pédron <dumbbell@FreeBSD.org> * - * Copyright (c) 2003 David Schultz <das@FreeBSD.ORG> - * All rights reserved. + * This software was developed by Jean-Sébastien Pédron under sponsorship + * from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -26,31 +27,17 @@ * SUCH DAMAGE. */ -union IEEEl2bits { - long double e; - struct { -#if _BYTE_ORDER == _LITTLE_ENDIAN - unsigned int manl :32; - unsigned int manh :20; - unsigned int exp :11; - unsigned int sign :1; -#else /* _BYTE_ORDER == _LITTLE_ENDIAN */ - unsigned int sign :1; - unsigned int exp :11; - unsigned int manh :20; - unsigned int manl :32; -#endif - } bits; -}; -#define mask_nbit_l(u) ((void)0) -#define LDBL_IMPLICIT_NBIT -#define LDBL_NBIT 0 +#ifndef _LINUXKPI_LINUX_MEMCONTROL_H_ +#define _LINUXKPI_LINUX_MEMCONTROL_H_ -#define LDBL_MANH_SIZE 20 -#define LDBL_MANL_SIZE 32 +#include <linux/cgroup.h> +#include <linux/hardirq.h> +#include <linux/jump_label.h> +#include <linux/kernel.h> +#include <linux/eventfd.h> +#include <linux/mm.h> +#include <linux/page-flags.h> +#include <linux/shrinker.h> -#define LDBL_TO_ARRAY32(u, a) do { \ - (a)[0] = (uint32_t)(u).bits.manl; \ - (a)[1] = (uint32_t)(u).bits.manh; \ -} while(0) +#endif /* defined(_LINUXKPI_LINUX_MEMCONTROL_H_) */ diff --git a/sys/compat/linuxkpi/common/include/linux/notifier.h b/sys/compat/linuxkpi/common/include/linux/notifier.h index 9302a1ce4606..4fe43255c648 100644 --- a/sys/compat/linuxkpi/common/include/linux/notifier.h +++ b/sys/compat/linuxkpi/common/include/linux/notifier.h @@ -32,6 +32,11 @@ #include <sys/types.h> #include <sys/eventhandler.h> +#include <linux/errno.h> +#include <linux/mutex.h> +#include <linux/rwsem.h> +#include <linux/srcu.h> + #define NOTIFY_DONE 0 #define NOTIFY_OK 0x0001 #define NOTIFY_STOP_MASK 0x8000 diff --git a/sys/compat/linuxkpi/common/include/linux/pci.h b/sys/compat/linuxkpi/common/include/linux/pci.h index 06336bf963d6..8fe09554aed2 100644 --- a/sys/compat/linuxkpi/common/include/linux/pci.h +++ b/sys/compat/linuxkpi/common/include/linux/pci.h @@ -253,6 +253,20 @@ extern const char *pci_power_names[6]; #define PCI_IRQ_LEGACY PCI_IRQ_INTX #endif +/* + * Linux PCI code uses `PCI_SET_ERROR_RESPONSE()` to indicate to the caller of + * a `pci_read_*()` function that the read failed. An example of failure is + * whether the device was disconnected. It is a bit weird because Linux + * `pci_read_*()` can return an error value, as the read value is stored in a + * integer passed by pointer. + * + * We don't set PCI_ERROR_RESPONSE anywhere as of this commit, but the DRM + * drivers started to use `PCI_POSSIBLE_ERROR()`. + */ +#define PCI_ERROR_RESPONSE (~0ULL) +#define PCI_SET_ERROR_RESPONSE(val) (*(val) = ((typeof(*(val))) PCI_ERROR_RESPONSE)) +#define PCI_POSSIBLE_ERROR(val) ((val) == ((typeof(val)) PCI_ERROR_RESPONSE)) + struct pci_dev; struct pci_driver { diff --git a/sys/compat/linuxkpi/common/include/linux/printk.h b/sys/compat/linuxkpi/common/include/linux/printk.h index d2d197682782..066ec900f04e 100644 --- a/sys/compat/linuxkpi/common/include/linux/printk.h +++ b/sys/compat/linuxkpi/common/include/linux/printk.h @@ -48,7 +48,13 @@ int __lkpi_hexdump_printf(void *, const char *, ...) __printflike(2, 3); void lkpi_hex_dump(int(*)(void *, const char *, ...), void *arg1, const char *, const char *, const int, const int, const int, - const void *, size_t, const bool); + const void *, size_t, const bool, const bool); + +#define hex_dump_to_buffer(buf, len, rowsize, groupsize, linebuf, linebuflen, ascii) \ + lkpi_hex_dump_to_buffer((buf), (len), (rowsize), (groupsize), (linebuf), (linebuflen), (ascii)) + +int lkpi_hex_dump_to_buffer(const void *buf, size_t len, int rowsize, + int groupsize, char *linebuf, size_t linebuflen, bool ascii); static inline void print_hex_dump(const char *level, const char *prefix_str, @@ -56,7 +62,7 @@ print_hex_dump(const char *level, const char *prefix_str, const void *buf, size_t len, const bool ascii) { lkpi_hex_dump(__lkpi_hexdump_printf, NULL, level, prefix_str, prefix_type, - rowsize, groupsize, buf, len, ascii); + rowsize, groupsize, buf, len, ascii, true); } static inline void diff --git a/sys/compat/linuxkpi/common/include/linux/radix-tree.h b/sys/compat/linuxkpi/common/include/linux/radix-tree.h index 1019697303db..55f0fc949807 100644 --- a/sys/compat/linuxkpi/common/include/linux/radix-tree.h +++ b/sys/compat/linuxkpi/common/include/linux/radix-tree.h @@ -68,6 +68,12 @@ struct radix_tree_iter { for ((iter)->index = (start); \ radix_tree_iter_find(root, iter, &(slot)); (iter)->index++) +static inline void * +radix_tree_deref_slot(void **slot) +{ + return (*slot); +} + static inline int radix_tree_exception(void *arg) { diff --git a/sys/compat/linuxkpi/common/include/linux/ratelimit.h b/sys/compat/linuxkpi/common/include/linux/ratelimit.h index 9585b4b994d7..fdef57c7882d 100644 --- a/sys/compat/linuxkpi/common/include/linux/ratelimit.h +++ b/sys/compat/linuxkpi/common/include/linux/ratelimit.h @@ -14,4 +14,11 @@ struct ratelimit_state { #define ratelimit_state_init(x, y, z) #define ratelimit_set_flags(x, y) +#define WARN_RATELIMIT(condition, ...) ({ \ + bool __ret_warn_on = (condition); \ + if (unlikely(__ret_warn_on)) \ + pr_warn_ratelimited(__VA_ARGS__); \ + unlikely(__ret_warn_on); \ +}) + #endif diff --git a/sys/compat/linuxkpi/common/include/linux/regulator/consumer.h b/sys/compat/linuxkpi/common/include/linux/regulator/consumer.h new file mode 100644 index 000000000000..d6c23575bc83 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/regulator/consumer.h @@ -0,0 +1,17 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025-2026 The FreeBSD Foundation + * Copyright (c) 2025-2026 Jean-Sébastien Pédron <dumbbell@FreeBSD.org> + * + * This software was developed by Jean-Sébastien Pédron under sponsorship + * from the FreeBSD Foundation. + */ + +#ifndef _LINUXKPI_LINUX_REGULATOR_CONSUMER_H_ +#define _LINUXKPI_LINUX_REGULATOR_CONSUMER_H_ + +#include <linux/err.h> +#include <linux/suspend.h> + +#endif diff --git a/sys/compat/linuxkpi/common/include/linux/seq_file.h b/sys/compat/linuxkpi/common/include/linux/seq_file.h index 47da16ab8688..3c7862890c67 100644 --- a/sys/compat/linuxkpi/common/include/linux/seq_file.h +++ b/sys/compat/linuxkpi/common/include/linux/seq_file.h @@ -115,7 +115,7 @@ seq_hex_dump(struct seq_file *m, const char *prefix_str, int prefix_type, int rowsize, int groupsize, const void *buf, size_t len, bool ascii) { lkpi_hex_dump(__lkpi_hexdump_sbuf_printf, m->buf, NULL, prefix_str, prefix_type, - rowsize, groupsize, buf, len, ascii); + rowsize, groupsize, buf, len, ascii, true); } #define file linux_file diff --git a/sys/compat/linuxkpi/common/include/linux/siphash.h b/sys/compat/linuxkpi/common/include/linux/siphash.h new file mode 100644 index 000000000000..9153e77382e1 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/siphash.h @@ -0,0 +1,168 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ +/* Copyright (C) 2016-2022 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved. + * + * SipHash: a fast short-input PRF + * https://131002.net/siphash/ + * + * This implementation is specifically for SipHash2-4 for a secure PRF + * and HalfSipHash1-3/SipHash1-3 for an insecure PRF only suitable for + * hashtables. + */ + +#ifndef _LINUX_SIPHASH_H +#define _LINUX_SIPHASH_H + +#include <linux/types.h> +#include <linux/kernel.h> + +#define SIPHASH_ALIGNMENT __alignof__(u64) +typedef struct { + u64 key[2]; +} siphash_key_t; + +#define siphash_aligned_key_t siphash_key_t __aligned(16) + +static inline bool siphash_key_is_zero(const siphash_key_t *key) +{ + return !(key->key[0] | key->key[1]); +} + +u64 __siphash_aligned(const void *data, size_t len, const siphash_key_t *key); +u64 __siphash_unaligned(const void *data, size_t len, const siphash_key_t *key); + +u64 siphash_1u64(const u64 a, const siphash_key_t *key); +u64 siphash_2u64(const u64 a, const u64 b, const siphash_key_t *key); +u64 siphash_3u64(const u64 a, const u64 b, const u64 c, + const siphash_key_t *key); +u64 siphash_4u64(const u64 a, const u64 b, const u64 c, const u64 d, + const siphash_key_t *key); +u64 siphash_1u32(const u32 a, const siphash_key_t *key); +u64 siphash_3u32(const u32 a, const u32 b, const u32 c, + const siphash_key_t *key); + +static inline u64 siphash_2u32(const u32 a, const u32 b, + const siphash_key_t *key) +{ + return siphash_1u64((u64)b << 32 | a, key); +} +static inline u64 siphash_4u32(const u32 a, const u32 b, const u32 c, + const u32 d, const siphash_key_t *key) +{ + return siphash_2u64((u64)b << 32 | a, (u64)d << 32 | c, key); +} + + +static inline u64 ___siphash_aligned(const __le64 *data, size_t len, + const siphash_key_t *key) +{ + if (__builtin_constant_p(len) && len == 4) + return siphash_1u32(le32_to_cpup((const __le32 *)data), key); + if (__builtin_constant_p(len) && len == 8) + return siphash_1u64(le64_to_cpu(data[0]), key); + if (__builtin_constant_p(len) && len == 16) + return siphash_2u64(le64_to_cpu(data[0]), le64_to_cpu(data[1]), + key); + if (__builtin_constant_p(len) && len == 24) + return siphash_3u64(le64_to_cpu(data[0]), le64_to_cpu(data[1]), + le64_to_cpu(data[2]), key); + if (__builtin_constant_p(len) && len == 32) + return siphash_4u64(le64_to_cpu(data[0]), le64_to_cpu(data[1]), + le64_to_cpu(data[2]), le64_to_cpu(data[3]), + key); + return __siphash_aligned(data, len, key); +} + +/** + * siphash - compute 64-bit siphash PRF value + * @data: buffer to hash + * @size: size of @data + * @key: the siphash key + */ +static inline u64 siphash(const void *data, size_t len, + const siphash_key_t *key) +{ + if (IS_ENABLED(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) || + !IS_ALIGNED((unsigned long)data, SIPHASH_ALIGNMENT)) + return __siphash_unaligned(data, len, key); + return ___siphash_aligned(data, len, key); +} + +#define HSIPHASH_ALIGNMENT __alignof__(unsigned long) +typedef struct { + unsigned long key[2]; +} hsiphash_key_t; + +u32 __hsiphash_aligned(const void *data, size_t len, + const hsiphash_key_t *key); +u32 __hsiphash_unaligned(const void *data, size_t len, + const hsiphash_key_t *key); + +u32 hsiphash_1u32(const u32 a, const hsiphash_key_t *key); +u32 hsiphash_2u32(const u32 a, const u32 b, const hsiphash_key_t *key); +u32 hsiphash_3u32(const u32 a, const u32 b, const u32 c, + const hsiphash_key_t *key); +u32 hsiphash_4u32(const u32 a, const u32 b, const u32 c, const u32 d, + const hsiphash_key_t *key); + +static inline u32 ___hsiphash_aligned(const __le32 *data, size_t len, + const hsiphash_key_t *key) +{ + if (__builtin_constant_p(len) && len == 4) + return hsiphash_1u32(le32_to_cpu(data[0]), key); + if (__builtin_constant_p(len) && len == 8) + return hsiphash_2u32(le32_to_cpu(data[0]), le32_to_cpu(data[1]), + key); + if (__builtin_constant_p(len) && len == 12) + return hsiphash_3u32(le32_to_cpu(data[0]), le32_to_cpu(data[1]), + le32_to_cpu(data[2]), key); + if (__builtin_constant_p(len) && len == 16) + return hsiphash_4u32(le32_to_cpu(data[0]), le32_to_cpu(data[1]), + le32_to_cpu(data[2]), le32_to_cpu(data[3]), + key); + return __hsiphash_aligned(data, len, key); +} + +/** + * hsiphash - compute 32-bit hsiphash PRF value + * @data: buffer to hash + * @size: size of @data + * @key: the hsiphash key + */ +static inline u32 hsiphash(const void *data, size_t len, + const hsiphash_key_t *key) +{ + if (IS_ENABLED(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) || + !IS_ALIGNED((unsigned long)data, HSIPHASH_ALIGNMENT)) + return __hsiphash_unaligned(data, len, key); + return ___hsiphash_aligned(data, len, key); +} + +/* + * These macros expose the raw SipHash and HalfSipHash permutations. + * Do not use them directly! If you think you have a use for them, + * be sure to CC the maintainer of this file explaining why. + */ + +#define SIPHASH_PERMUTATION(a, b, c, d) ( \ + (a) += (b), (b) = rol64((b), 13), (b) ^= (a), (a) = rol64((a), 32), \ + (c) += (d), (d) = rol64((d), 16), (d) ^= (c), \ + (a) += (d), (d) = rol64((d), 21), (d) ^= (a), \ + (c) += (b), (b) = rol64((b), 17), (b) ^= (c), (c) = rol64((c), 32)) + +#define SIPHASH_CONST_0 0x736f6d6570736575ULL +#define SIPHASH_CONST_1 0x646f72616e646f6dULL +#define SIPHASH_CONST_2 0x6c7967656e657261ULL +#define SIPHASH_CONST_3 0x7465646279746573ULL + +#define HSIPHASH_PERMUTATION(a, b, c, d) ( \ + (a) += (b), (b) = rol32((b), 5), (b) ^= (a), (a) = rol32((a), 16), \ + (c) += (d), (d) = rol32((d), 8), (d) ^= (c), \ + (a) += (d), (d) = rol32((d), 7), (d) ^= (a), \ + (c) += (b), (b) = rol32((b), 13), (b) ^= (c), (c) = rol32((c), 16)) + +#define HSIPHASH_CONST_0 0U +#define HSIPHASH_CONST_1 0U +#define HSIPHASH_CONST_2 0x6c796765U +#define HSIPHASH_CONST_3 0x74656462U + +#endif /* _LINUX_SIPHASH_H */ diff --git a/sys/compat/linuxkpi/common/include/linux/spinlock.h b/sys/compat/linuxkpi/common/include/linux/spinlock.h index dc10b0457153..341e89b6feed 100644 --- a/sys/compat/linuxkpi/common/include/linux/spinlock.h +++ b/sys/compat/linuxkpi/common/include/linux/spinlock.h @@ -178,4 +178,24 @@ _atomic_dec_and_lock_irqsave(atomic_t *cnt, spinlock_t *lock, return (0); } +/* + * struct raw_spinlock + */ + +typedef struct raw_spinlock { + struct mtx lock; +} raw_spinlock_t; + +#define raw_spin_lock_init(rlock) \ + mtx_init(&(rlock)->lock, spin_lock_name("lnxspin_raw"), \ + NULL, MTX_DEF | MTX_NOWITNESS | MTX_NEW) + +#define raw_spin_lock(rl) spin_lock(&(rl)->lock) +#define raw_spin_trylock(rl) spin_trylock(&(rl)->lock) +#define raw_spin_unlock(rl) spin_unlock(&(rl)->lock) + +#define raw_spin_lock_irqsave(rl, f) spin_lock_irqsave(&(rl)->lock, (f)) +#define raw_spin_trylock_irqsave(rl, f) spin_trylock_irqsave(&(rl)->lock, (f)) +#define raw_spin_unlock_irqrestore(rl, f) spin_unlock_irqrestore(&(rl)->lock, (f)) + #endif /* _LINUXKPI_LINUX_SPINLOCK_H_ */ diff --git a/sys/compat/linuxkpi/common/include/linux/suspend.h b/sys/compat/linuxkpi/common/include/linux/suspend.h index dacecbebdc08..3d5d5d594127 100644 --- a/sys/compat/linuxkpi/common/include/linux/suspend.h +++ b/sys/compat/linuxkpi/common/include/linux/suspend.h @@ -3,6 +3,12 @@ #ifndef _LINUXKPI_LINUX_SUSPEND_H_ #define _LINUXKPI_LINUX_SUSPEND_H_ +#include <linux/swap.h> +#include <linux/notifier.h> +#include <linux/init.h> +#include <linux/pm.h> +#include <linux/mm.h> + typedef int suspend_state_t; extern suspend_state_t pm_suspend_target_state; diff --git a/sys/compat/linuxkpi/common/include/linux/swap.h b/sys/compat/linuxkpi/common/include/linux/swap.h index 5828db7ae392..9c1db9677f9e 100644 --- a/sys/compat/linuxkpi/common/include/linux/swap.h +++ b/sys/compat/linuxkpi/common/include/linux/swap.h @@ -37,7 +37,14 @@ #include <vm/swap_pager.h> #include <vm/vm_pageout.h> +#include <linux/spinlock.h> +#include <linux/mmzone.h> +#include <linux/list.h> +#include <linux/memcontrol.h> +#include <linux/sched.h> +#include <linux/fs.h> #include <linux/pagemap.h> +#include <linux/atomic.h> #include <linux/page-flags.h> static inline long diff --git a/sys/compat/linuxkpi/common/include/media/cec-notifier.h b/sys/compat/linuxkpi/common/include/media/cec-notifier.h new file mode 100644 index 000000000000..8d6fc452b907 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/media/cec-notifier.h @@ -0,0 +1,17 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025-2026 The FreeBSD Foundation + * Copyright (c) 2025-2026 Jean-Sébastien Pédron <dumbbell@FreeBSD.org> + * + * This software was developed by Jean-Sébastien Pédron under sponsorship + * from the FreeBSD Foundation. + */ + +#ifndef _LINUXKPI_MEDIA_CEC_NOTIFIER_H_ +#define _LINUXKPI_MEDIA_CEC_NOTIFIER_H_ + +#include <linux/err.h> +#include <media/cec.h> + +#endif diff --git a/sys/compat/linuxkpi/common/include/media/cec.h b/sys/compat/linuxkpi/common/include/media/cec.h new file mode 100644 index 000000000000..c96b57868e23 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/media/cec.h @@ -0,0 +1,23 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025-2026 The FreeBSD Foundation + * Copyright (c) 2025-2026 Jean-Sébastien Pédron <dumbbell@FreeBSD.org> + * + * This software was developed by Jean-Sébastien Pédron under sponsorship + * from the FreeBSD Foundation. + */ + +#ifndef _LINUXKPI_MEDIA_CEC_H_ +#define _LINUXKPI_MEDIA_CEC_H_ + +#include <linux/poll.h> +#include <linux/fs.h> +#include <linux/debugfs.h> +#include <linux/device.h> +#include <linux/cdev.h> +#include <linux/kthread.h> +#include <linux/timer.h> +#include <linux/cec-funcs.h> + +#endif diff --git a/sys/compat/linuxkpi/common/src/linux_80211.c b/sys/compat/linuxkpi/common/src/linux_80211.c index 02724433d89d..1ac28dfef448 100644 --- a/sys/compat/linuxkpi/common/src/linux_80211.c +++ b/sys/compat/linuxkpi/common/src/linux_80211.c @@ -282,7 +282,7 @@ lkpi_nl80211_sta_info_to_str(struct sbuf *s, const char *prefix, } static void -lkpi_80211_dump_lvif_stas(struct lkpi_vif *lvif, struct sbuf *s) +lkpi_80211_dump_lvif_stas(struct lkpi_vif *lvif, struct sbuf *s, bool dump_queues) { struct lkpi_hw *lhw; struct ieee80211_hw *hw; @@ -292,6 +292,7 @@ lkpi_80211_dump_lvif_stas(struct lkpi_vif *lvif, struct sbuf *s) struct ieee80211_sta *sta; struct station_info sinfo; int error; + uint8_t tid; vif = LVIF_TO_VIF(lvif); vap = LVIF_TO_VAP(lvif); @@ -376,6 +377,39 @@ lkpi_80211_dump_lvif_stas(struct lkpi_vif *lvif, struct sbuf *s) sbuf_printf(s, " he_dcm %u he_gi %u he_ru_alloc %u eht_gi %u\n", sinfo.txrate.he_dcm, sinfo.txrate.he_gi, sinfo.txrate.he_ru_alloc, sinfo.txrate.eht_gi); + + if (!dump_queues) + continue; + + /* Dump queue information. */ + sbuf_printf(s, " Queue information:\n"); + sbuf_printf(s, " frms direct tx %ju\n", lsta->frms_tx); + for (tid = 0; tid <= IEEE80211_NUM_TIDS; tid++) { + struct lkpi_txq *ltxq; + + if (sta->txq[tid] == NULL) { + sbuf_printf(s, " tid %-2u NOQ\n", tid); + continue; + } + + ltxq = TXQ_TO_LTXQ(sta->txq[tid]); +#ifdef __notyet__ + sbuf_printf(s, " tid %-2u flags: %b " + "txq_generation %u skbq len %d\n", + tid, ltxq->flags, LKPI_TXQ_FLAGS_BITS, + ltxq->txq_generation, + skb_queue_len_lockless(<xq->skbq)); +#else + sbuf_printf(s, " tid %-2u " + "txq_generation %u skbq len %d\n", + tid, + ltxq->txq_generation, + skb_queue_len_lockless(<xq->skbq)); +#endif + sbuf_printf(s, " frms_enqueued %ju frms_dequeued %ju " + "frms_tx %ju\n", + ltxq->frms_enqueued, ltxq->frms_dequeued, ltxq->frms_tx); + } } wiphy_unlock(hw->wiphy); } @@ -393,7 +427,28 @@ lkpi_80211_dump_stas(SYSCTL_HANDLER_ARGS) sbuf_new_for_sysctl(&s, NULL, 1024, req); - lkpi_80211_dump_lvif_stas(lvif, &s); + lkpi_80211_dump_lvif_stas(lvif, &s, false); + + sbuf_finish(&s); + sbuf_delete(&s); + + return (0); +} + +static int +lkpi_80211_dump_sta_queues(SYSCTL_HANDLER_ARGS) +{ + struct lkpi_vif *lvif; + struct sbuf s; + + if (req->newptr) + return (EPERM); + + lvif = (struct lkpi_vif *)arg1; + + sbuf_new_for_sysctl(&s, NULL, 1024, req); + + lkpi_80211_dump_lvif_stas(lvif, &s, true); sbuf_finish(&s); sbuf_delete(&s); @@ -638,7 +693,8 @@ skip_bw: sta = IEEE80211_VHT_MCS_NOT_SUPPORTED; else { sta = MIN(sta, card); - rx_nss = i + 1; + if (rx_nss == 0) + rx_nss = i + 1; } } rx_map |= (sta << (2 * i)); @@ -4173,6 +4229,11 @@ lkpi_ic_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], SYSCTL_CHILDREN(node), OID_AUTO, "dump_stas", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, lvif, 0, lkpi_80211_dump_stas, "A", "Dump sta statistics of this vif"); + SYSCTL_ADD_PROC(&lvif->sysctl_ctx, + SYSCTL_CHILDREN(node), OID_AUTO, "dump_stas_queues", + CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE | CTLFLAG_SKIP, lvif, 0, + lkpi_80211_dump_sta_queues, "A", + "Dump queue statistics for any sta of this vif"); IMPROVE(); @@ -5513,6 +5574,8 @@ lkpi_80211_txq_tx_one(struct lkpi_sta *lsta, struct mbuf *m) #endif ni = lsta->ni; + ieee80211_output_seqno_assign(ni, -1, m); + k = NULL; keyix = IEEE80211_KEYIX_NONE; wh = mtod(m, struct ieee80211_frame *); @@ -5667,6 +5730,8 @@ lkpi_80211_txq_tx_one(struct lkpi_sta *lsta, struct mbuf *m) dev_kfree_skb(skb); return; } + /* Reset header as data might have moved. */ + hdr = (void *)skb->data; } #endif @@ -5690,6 +5755,7 @@ lkpi_80211_txq_tx_one(struct lkpi_sta *lsta, struct mbuf *m) LKPI_80211_LTXQ_LOCK(ltxq); skb_queue_tail(<xq->skbq, skb); + ltxq->frms_enqueued++; #ifdef LINUXKPI_DEBUG_80211 if (linuxkpi_debug_80211 & D80211_TRACE_TX) printf("%s:%d mo_wake_tx_queue :: %d %lu lsta %p sta %p " @@ -5719,6 +5785,7 @@ ops_tx: control.sta = sta; wiphy_lock(hw->wiphy); lkpi_80211_mo_tx(hw, &control, skb); + lsta->frms_tx++; wiphy_unlock(hw->wiphy); } @@ -8121,6 +8188,8 @@ linuxkpi_ieee80211_tx_dequeue(struct ieee80211_hw *hw, LKPI_80211_LTXQ_LOCK(ltxq); skb = skb_dequeue(<xq->skbq); + if (skb != NULL) + ltxq->frms_dequeued++; LKPI_80211_LTXQ_UNLOCK(ltxq); stopped: @@ -8769,18 +8838,21 @@ linuxkpi_ieee80211_handle_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq) { struct lkpi_hw *lhw; - struct ieee80211_txq *ntxq; - struct ieee80211_tx_control control; - struct sk_buff *skb; lhw = HW_TO_LHW(hw); LKPI_80211_LHW_TXQ_LOCK(lhw); ieee80211_txq_schedule_start(hw, txq->ac); do { + struct lkpi_txq *ltxq; + struct ieee80211_txq *ntxq; + struct ieee80211_tx_control control; + struct sk_buff *skb; + ntxq = ieee80211_next_txq(hw, txq->ac); if (ntxq == NULL) break; + ltxq = TXQ_TO_LTXQ(ntxq); memset(&control, 0, sizeof(control)); control.sta = ntxq->sta; @@ -8788,6 +8860,7 @@ linuxkpi_ieee80211_handle_wake_tx_queue(struct ieee80211_hw *hw, skb = linuxkpi_ieee80211_tx_dequeue(hw, ntxq); if (skb == NULL) break; + ltxq->frms_tx++; lkpi_80211_mo_tx(hw, &control, skb); } while(1); diff --git a/sys/compat/linuxkpi/common/src/linux_80211.h b/sys/compat/linuxkpi/common/src/linux_80211.h index fcbef46fc6de..d4f18fcafbba 100644 --- a/sys/compat/linuxkpi/common/src/linux_80211.h +++ b/sys/compat/linuxkpi/common/src/linux_80211.h @@ -154,6 +154,9 @@ struct lkpi_txq { bool stopped; uint32_t txq_generation; struct sk_buff_head skbq; + uint64_t frms_enqueued; + uint64_t frms_dequeued; + uint64_t frms_tx; /* Must be last! */ struct ieee80211_txq txq __aligned(CACHE_LINE_SIZE); @@ -180,6 +183,7 @@ struct lkpi_sta { bool in_mgd; /* XXX-BZ should this be per-vif? */ struct station_info sinfo; /* statistics */ + uint64_t frms_tx; /* (*tx) */ /* Must be last! */ struct ieee80211_sta sta __aligned(CACHE_LINE_SIZE); diff --git a/sys/compat/linuxkpi/common/src/linux_compat.c b/sys/compat/linuxkpi/common/src/linux_compat.c index 35430daf311d..8fc644241d79 100644 --- a/sys/compat/linuxkpi/common/src/linux_compat.c +++ b/sys/compat/linuxkpi/common/src/linux_compat.c @@ -1894,56 +1894,168 @@ void lkpi_hex_dump(int(*_fpf)(void *, const char *, ...), void *arg1, const char *level, const char *prefix_str, const int prefix_type, const int rowsize, const int groupsize, - const void *buf, size_t len, const bool ascii) + const void *buf, size_t len, const bool ascii, const bool trailing_newline) { typedef const struct { long long value; } __packed *print_64p_t; typedef const struct { uint32_t value; } __packed *print_32p_t; typedef const struct { uint16_t value; } __packed *print_16p_t; const void *buf_old = buf; - int row; + int row, linelen, ret; while (len > 0) { - if (level != NULL) - _fpf(arg1, "%s", level); - if (prefix_str != NULL) - _fpf(arg1, "%s ", prefix_str); + linelen = 0; + if (level != NULL) { + ret = _fpf(arg1, "%s", level); + if (ret < 0) + break; + linelen += ret; + } + if (prefix_str != NULL) { + ret = _fpf( + arg1, "%s%s", linelen ? " " : "", prefix_str); + if (ret < 0) + break; + linelen += ret; + } switch (prefix_type) { case DUMP_PREFIX_ADDRESS: - _fpf(arg1, "[%p] ", buf); + ret = _fpf( + arg1, "%s[%p]", linelen ? " " : "", buf); + if (ret < 0) + return; + linelen += ret; break; case DUMP_PREFIX_OFFSET: - _fpf(arg1, "[%#tx] ", ((const char *)buf - - (const char *)buf_old)); + ret = _fpf( + arg1, "%s[%#tx]", linelen ? " " : "", + ((const char *)buf - (const char *)buf_old)); + if (ret < 0) + return; + linelen += ret; break; default: break; } for (row = 0; row != rowsize; row++) { if (groupsize == 8 && len > 7) { - _fpf(arg1, "%016llx ", ((print_64p_t)buf)->value); + ret = _fpf( + arg1, "%s%016llx", linelen ? " " : "", + ((print_64p_t)buf)->value); + if (ret < 0) + return; + linelen += ret; buf = (const uint8_t *)buf + 8; len -= 8; } else if (groupsize == 4 && len > 3) { - _fpf(arg1, "%08x ", ((print_32p_t)buf)->value); + ret = _fpf( + arg1, "%s%08x", linelen ? " " : "", + ((print_32p_t)buf)->value); + if (ret < 0) + return; + linelen += ret; buf = (const uint8_t *)buf + 4; len -= 4; } else if (groupsize == 2 && len > 1) { - _fpf(arg1, "%04x ", ((print_16p_t)buf)->value); + ret = _fpf( + arg1, "%s%04x", linelen ? " " : "", + ((print_16p_t)buf)->value); + if (ret < 0) + return; + linelen += ret; buf = (const uint8_t *)buf + 2; len -= 2; } else if (len > 0) { - _fpf(arg1, "%02x ", *(const uint8_t *)buf); + ret = _fpf( + arg1, "%s%02x", linelen ? " " : "", + *(const uint8_t *)buf); + if (ret < 0) + return; + linelen += ret; buf = (const uint8_t *)buf + 1; len--; } else { break; } } - _fpf(arg1, "\n"); + if (len > 0 && trailing_newline) { + ret = _fpf(arg1, "\n"); + if (ret < 0) + break; + } } } +struct hdtb_context { + char *linebuf; + size_t linebuflen; + int written; +}; + +static int +hdtb_cb(void *arg, const char *format, ...) +{ + struct hdtb_context *context; + int written; + va_list args; + + context = arg; + + va_start(args, format); + written = vsnprintf( + context->linebuf, context->linebuflen, format, args); + va_end(args); + + if (written < 0) + return (written); + + /* + * Linux' hex_dump_to_buffer() function has the same behaviour as + * snprintf() basically. Therefore, it returns the number of bytes it + * would have written if the destination buffer was large enough. + * + * If the destination buffer was exhausted, lkpi_hex_dump() will + * continue to call this callback but it will only compute the bytes it + * would have written but write nothing to that buffer. + */ + context->written += written; + + if (written < context->linebuflen) { + context->linebuf += written; + context->linebuflen -= written; + } else { + context->linebuf += context->linebuflen; + context->linebuflen = 0; + } + + return (written); +} + +int +lkpi_hex_dump_to_buffer(const void *buf, size_t len, int rowsize, + int groupsize, char *linebuf, size_t linebuflen, bool ascii) +{ + int written; + struct hdtb_context context; + + context.linebuf = linebuf; + context.linebuflen = linebuflen; + context.written = 0; + + if (rowsize != 16 && rowsize != 32) + rowsize = 16; + + len = min(len, rowsize); + + lkpi_hex_dump( + hdtb_cb, &context, NULL, NULL, DUMP_PREFIX_NONE, + rowsize, groupsize, buf, len, ascii, false); + + written = context.written; + + return (written); +} + static void linux_timer_callback_wrapper(void *context) { diff --git a/sys/compat/linuxkpi/common/src/linux_siphash.c b/sys/compat/linuxkpi/common/src/linux_siphash.c new file mode 100644 index 000000000000..b4842a8250e1 --- /dev/null +++ b/sys/compat/linuxkpi/common/src/linux_siphash.c @@ -0,0 +1,546 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +/* Copyright (C) 2016-2022 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved. + * + * SipHash: a fast short-input PRF + * https://131002.net/siphash/ + * + * This implementation is specifically for SipHash2-4 for a secure PRF + * and HalfSipHash1-3/SipHash1-3 for an insecure PRF only suitable for + * hashtables. + */ + +#include <linux/siphash.h> +#include <asm/unaligned.h> + +#if defined(CONFIG_DCACHE_WORD_ACCESS) && BITS_PER_LONG == 64 +#include <linux/dcache.h> +#include <asm/word-at-a-time.h> +#endif + +#define EXPORT_SYMBOL(name) + +#define SIPROUND SIPHASH_PERMUTATION(v0, v1, v2, v3) + +#define PREAMBLE(len) \ + u64 v0 = SIPHASH_CONST_0; \ + u64 v1 = SIPHASH_CONST_1; \ + u64 v2 = SIPHASH_CONST_2; \ + u64 v3 = SIPHASH_CONST_3; \ + u64 b = ((u64)(len)) << 56; \ + v3 ^= key->key[1]; \ + v2 ^= key->key[0]; \ + v1 ^= key->key[1]; \ + v0 ^= key->key[0]; + +#define POSTAMBLE \ + v3 ^= b; \ + SIPROUND; \ + SIPROUND; \ + v0 ^= b; \ + v2 ^= 0xff; \ + SIPROUND; \ + SIPROUND; \ + SIPROUND; \ + SIPROUND; \ + return (v0 ^ v1) ^ (v2 ^ v3); + +#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS +u64 __siphash_aligned(const void *_data, size_t len, const siphash_key_t *key) +{ + const u8 *data = _data; + const u8 *end = data + len - (len % sizeof(u64)); + const u8 left = len & (sizeof(u64) - 1); + u64 m; + PREAMBLE(len) + for (; data != end; data += sizeof(u64)) { + m = le64_to_cpup(data); + v3 ^= m; + SIPROUND; + SIPROUND; + v0 ^= m; + } +#if defined(CONFIG_DCACHE_WORD_ACCESS) && BITS_PER_LONG == 64 + if (left) + b |= le64_to_cpu((__force __le64)(load_unaligned_zeropad(data) & + bytemask_from_count(left))); +#else + switch (left) { + case 7: b |= ((u64)end[6]) << 48; fallthrough; + case 6: b |= ((u64)end[5]) << 40; fallthrough; + case 5: b |= ((u64)end[4]) << 32; fallthrough; + case 4: b |= le32_to_cpup(data); break; + case 3: b |= ((u64)end[2]) << 16; fallthrough; + case 2: b |= le16_to_cpup(data); break; + case 1: b |= end[0]; + } +#endif + POSTAMBLE +} +EXPORT_SYMBOL(__siphash_aligned); +#endif + +u64 __siphash_unaligned(const void *_data, size_t len, const siphash_key_t *key) +{ + const u8 *data = _data; + const u8 *end = data + len - (len % sizeof(u64)); + const u8 left = len & (sizeof(u64) - 1); + u64 m; + PREAMBLE(len) + for (; data != end; data += sizeof(u64)) { + m = get_unaligned_le64(data); + v3 ^= m; + SIPROUND; + SIPROUND; + v0 ^= m; + } +#if defined(CONFIG_DCACHE_WORD_ACCESS) && BITS_PER_LONG == 64 + if (left) + b |= le64_to_cpu((__force __le64)(load_unaligned_zeropad(data) & + bytemask_from_count(left))); +#else + switch (left) { + case 7: b |= ((u64)end[6]) << 48; fallthrough; + case 6: b |= ((u64)end[5]) << 40; fallthrough; + case 5: b |= ((u64)end[4]) << 32; fallthrough; + case 4: b |= get_unaligned_le32(end); break; + case 3: b |= ((u64)end[2]) << 16; fallthrough; + case 2: b |= get_unaligned_le16(end); break; + case 1: b |= end[0]; + } +#endif + POSTAMBLE +} +EXPORT_SYMBOL(__siphash_unaligned); + +/** + * siphash_1u64 - compute 64-bit siphash PRF value of a u64 + * @first: first u64 + * @key: the siphash key + */ +u64 siphash_1u64(const u64 first, const siphash_key_t *key) +{ + PREAMBLE(8) + v3 ^= first; + SIPROUND; + SIPROUND; + v0 ^= first; + POSTAMBLE +} +EXPORT_SYMBOL(siphash_1u64); + +/** + * siphash_2u64 - compute 64-bit siphash PRF value of 2 u64 + * @first: first u64 + * @second: second u64 + * @key: the siphash key + */ +u64 siphash_2u64(const u64 first, const u64 second, const siphash_key_t *key) +{ + PREAMBLE(16) + v3 ^= first; + SIPROUND; + SIPROUND; + v0 ^= first; + v3 ^= second; + SIPROUND; + SIPROUND; + v0 ^= second; + POSTAMBLE +} +EXPORT_SYMBOL(siphash_2u64); + +/** + * siphash_3u64 - compute 64-bit siphash PRF value of 3 u64 + * @first: first u64 + * @second: second u64 + * @third: third u64 + * @key: the siphash key + */ +u64 siphash_3u64(const u64 first, const u64 second, const u64 third, + const siphash_key_t *key) +{ + PREAMBLE(24) + v3 ^= first; + SIPROUND; + SIPROUND; + v0 ^= first; + v3 ^= second; + SIPROUND; + SIPROUND; + v0 ^= second; + v3 ^= third; + SIPROUND; + SIPROUND; + v0 ^= third; + POSTAMBLE +} +EXPORT_SYMBOL(siphash_3u64); + +/** + * siphash_4u64 - compute 64-bit siphash PRF value of 4 u64 + * @first: first u64 + * @second: second u64 + * @third: third u64 + * @forth: forth u64 + * @key: the siphash key + */ +u64 siphash_4u64(const u64 first, const u64 second, const u64 third, + const u64 forth, const siphash_key_t *key) +{ + PREAMBLE(32) + v3 ^= first; + SIPROUND; + SIPROUND; + v0 ^= first; + v3 ^= second; + SIPROUND; + SIPROUND; + v0 ^= second; + v3 ^= third; + SIPROUND; + SIPROUND; + v0 ^= third; + v3 ^= forth; + SIPROUND; + SIPROUND; + v0 ^= forth; + POSTAMBLE +} +EXPORT_SYMBOL(siphash_4u64); + +u64 siphash_1u32(const u32 first, const siphash_key_t *key) +{ + PREAMBLE(4) + b |= first; + POSTAMBLE +} +EXPORT_SYMBOL(siphash_1u32); + +u64 siphash_3u32(const u32 first, const u32 second, const u32 third, + const siphash_key_t *key) +{ + u64 combined = (u64)second << 32 | first; + PREAMBLE(12) + v3 ^= combined; + SIPROUND; + SIPROUND; + v0 ^= combined; + b |= third; + POSTAMBLE +} +EXPORT_SYMBOL(siphash_3u32); + +#if BITS_PER_LONG == 64 +/* Note that on 64-bit, we make HalfSipHash1-3 actually be SipHash1-3, for + * performance reasons. On 32-bit, below, we actually implement HalfSipHash1-3. + */ + +#define HSIPROUND SIPROUND +#define HPREAMBLE(len) PREAMBLE(len) +#define HPOSTAMBLE \ + v3 ^= b; \ + HSIPROUND; \ + v0 ^= b; \ + v2 ^= 0xff; \ + HSIPROUND; \ + HSIPROUND; \ + HSIPROUND; \ + return (v0 ^ v1) ^ (v2 ^ v3); + +#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS +u32 __hsiphash_aligned(const void *_data, size_t len, const hsiphash_key_t *key) +{ + const u8 *data = _data; + const u8 *end = data + len - (len % sizeof(u64)); + const u8 left = len & (sizeof(u64) - 1); + u64 m; + HPREAMBLE(len) + for (; data != end; data += sizeof(u64)) { + m = le64_to_cpup(data); + v3 ^= m; + HSIPROUND; + v0 ^= m; + } +#if defined(CONFIG_DCACHE_WORD_ACCESS) && BITS_PER_LONG == 64 + if (left) + b |= le64_to_cpu((__force __le64)(load_unaligned_zeropad(data) & + bytemask_from_count(left))); +#else + switch (left) { + case 7: b |= ((u64)end[6]) << 48; fallthrough; + case 6: b |= ((u64)end[5]) << 40; fallthrough; + case 5: b |= ((u64)end[4]) << 32; fallthrough; + case 4: b |= le32_to_cpup(data); break; + case 3: b |= ((u64)end[2]) << 16; fallthrough; + case 2: b |= le16_to_cpup(data); break; + case 1: b |= end[0]; + } +#endif + HPOSTAMBLE +} +EXPORT_SYMBOL(__hsiphash_aligned); +#endif + +u32 __hsiphash_unaligned(const void *_data, size_t len, + const hsiphash_key_t *key) +{ + const u8 *data = _data; + const u8 *end = data + len - (len % sizeof(u64)); + const u8 left = len & (sizeof(u64) - 1); + u64 m; + HPREAMBLE(len) + for (; data != end; data += sizeof(u64)) { + m = get_unaligned_le64(data); + v3 ^= m; + HSIPROUND; + v0 ^= m; + } +#if defined(CONFIG_DCACHE_WORD_ACCESS) && BITS_PER_LONG == 64 + if (left) + b |= le64_to_cpu((__force __le64)(load_unaligned_zeropad(data) & + bytemask_from_count(left))); +#else + switch (left) { + case 7: b |= ((u64)end[6]) << 48; fallthrough; + case 6: b |= ((u64)end[5]) << 40; fallthrough; + case 5: b |= ((u64)end[4]) << 32; fallthrough; + case 4: b |= get_unaligned_le32(end); break; + case 3: b |= ((u64)end[2]) << 16; fallthrough; + case 2: b |= get_unaligned_le16(end); break; + case 1: b |= end[0]; + } +#endif + HPOSTAMBLE +} +EXPORT_SYMBOL(__hsiphash_unaligned); + +/** + * hsiphash_1u32 - compute 64-bit hsiphash PRF value of a u32 + * @first: first u32 + * @key: the hsiphash key + */ +u32 hsiphash_1u32(const u32 first, const hsiphash_key_t *key) +{ + HPREAMBLE(4) + b |= first; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_1u32); + +/** + * hsiphash_2u32 - compute 32-bit hsiphash PRF value of 2 u32 + * @first: first u32 + * @second: second u32 + * @key: the hsiphash key + */ +u32 hsiphash_2u32(const u32 first, const u32 second, const hsiphash_key_t *key) +{ + u64 combined = (u64)second << 32 | first; + HPREAMBLE(8) + v3 ^= combined; + HSIPROUND; + v0 ^= combined; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_2u32); + +/** + * hsiphash_3u32 - compute 32-bit hsiphash PRF value of 3 u32 + * @first: first u32 + * @second: second u32 + * @third: third u32 + * @key: the hsiphash key + */ +u32 hsiphash_3u32(const u32 first, const u32 second, const u32 third, + const hsiphash_key_t *key) +{ + u64 combined = (u64)second << 32 | first; + HPREAMBLE(12) + v3 ^= combined; + HSIPROUND; + v0 ^= combined; + b |= third; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_3u32); + +/** + * hsiphash_4u32 - compute 32-bit hsiphash PRF value of 4 u32 + * @first: first u32 + * @second: second u32 + * @third: third u32 + * @forth: forth u32 + * @key: the hsiphash key + */ +u32 hsiphash_4u32(const u32 first, const u32 second, const u32 third, + const u32 forth, const hsiphash_key_t *key) +{ + u64 combined = (u64)second << 32 | first; + HPREAMBLE(16) + v3 ^= combined; + HSIPROUND; + v0 ^= combined; + combined = (u64)forth << 32 | third; + v3 ^= combined; + HSIPROUND; + v0 ^= combined; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_4u32); +#else +#define HSIPROUND HSIPHASH_PERMUTATION(v0, v1, v2, v3) + +#define HPREAMBLE(len) \ + u32 v0 = HSIPHASH_CONST_0; \ + u32 v1 = HSIPHASH_CONST_1; \ + u32 v2 = HSIPHASH_CONST_2; \ + u32 v3 = HSIPHASH_CONST_3; \ + u32 b = ((u32)(len)) << 24; \ + v3 ^= key->key[1]; \ + v2 ^= key->key[0]; \ + v1 ^= key->key[1]; \ + v0 ^= key->key[0]; + +#define HPOSTAMBLE \ + v3 ^= b; \ + HSIPROUND; \ + v0 ^= b; \ + v2 ^= 0xff; \ + HSIPROUND; \ + HSIPROUND; \ + HSIPROUND; \ + return v1 ^ v3; + +#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS +u32 __hsiphash_aligned(const void *_data, size_t len, const hsiphash_key_t *key) +{ + const u8 *data = _data; + const u8 *end = data + len - (len % sizeof(u32)); + const u8 left = len & (sizeof(u32) - 1); + u32 m; + HPREAMBLE(len) + for (; data != end; data += sizeof(u32)) { + m = le32_to_cpup(data); + v3 ^= m; + HSIPROUND; + v0 ^= m; + } + switch (left) { + case 3: b |= ((u32)end[2]) << 16; fallthrough; + case 2: b |= le16_to_cpup(data); break; + case 1: b |= end[0]; + } + HPOSTAMBLE +} +EXPORT_SYMBOL(__hsiphash_aligned); +#endif + +u32 __hsiphash_unaligned(const void *_data, size_t len, + const hsiphash_key_t *key) +{ + const u8 *data = _data; + const u8 *end = data + len - (len % sizeof(u32)); + const u8 left = len & (sizeof(u32) - 1); + u32 m; + HPREAMBLE(len) + for (; data != end; data += sizeof(u32)) { + m = get_unaligned_le32(data); + v3 ^= m; + HSIPROUND; + v0 ^= m; + } + switch (left) { + case 3: b |= ((u32)end[2]) << 16; fallthrough; + case 2: b |= get_unaligned_le16(end); break; + case 1: b |= end[0]; + } + HPOSTAMBLE +} +EXPORT_SYMBOL(__hsiphash_unaligned); + +/** + * hsiphash_1u32 - compute 32-bit hsiphash PRF value of a u32 + * @first: first u32 + * @key: the hsiphash key + */ +u32 hsiphash_1u32(const u32 first, const hsiphash_key_t *key) +{ + HPREAMBLE(4) + v3 ^= first; + HSIPROUND; + v0 ^= first; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_1u32); + +/** + * hsiphash_2u32 - compute 32-bit hsiphash PRF value of 2 u32 + * @first: first u32 + * @second: second u32 + * @key: the hsiphash key + */ +u32 hsiphash_2u32(const u32 first, const u32 second, const hsiphash_key_t *key) +{ + HPREAMBLE(8) + v3 ^= first; + HSIPROUND; + v0 ^= first; + v3 ^= second; + HSIPROUND; + v0 ^= second; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_2u32); + +/** + * hsiphash_3u32 - compute 32-bit hsiphash PRF value of 3 u32 + * @first: first u32 + * @second: second u32 + * @third: third u32 + * @key: the hsiphash key + */ +u32 hsiphash_3u32(const u32 first, const u32 second, const u32 third, + const hsiphash_key_t *key) +{ + HPREAMBLE(12) + v3 ^= first; + HSIPROUND; + v0 ^= first; + v3 ^= second; + HSIPROUND; + v0 ^= second; + v3 ^= third; + HSIPROUND; + v0 ^= third; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_3u32); + +/** + * hsiphash_4u32 - compute 32-bit hsiphash PRF value of 4 u32 + * @first: first u32 + * @second: second u32 + * @third: third u32 + * @forth: forth u32 + * @key: the hsiphash key + */ +u32 hsiphash_4u32(const u32 first, const u32 second, const u32 third, + const u32 forth, const hsiphash_key_t *key) +{ + HPREAMBLE(16) + v3 ^= first; + HSIPROUND; + v0 ^= first; + v3 ^= second; + HSIPROUND; + v0 ^= second; + v3 ^= third; + HSIPROUND; + v0 ^= third; + v3 ^= forth; + HSIPROUND; + v0 ^= forth; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_4u32); +#endif diff --git a/sys/compat/linuxkpi/dummy/include/media/cec-notifier.h b/sys/compat/linuxkpi/dummy/include/linux/fpu.h index e69de29bb2d1..e69de29bb2d1 100644 --- a/sys/compat/linuxkpi/dummy/include/media/cec-notifier.h +++ b/sys/compat/linuxkpi/dummy/include/linux/fpu.h diff --git a/sys/compat/linuxkpi/dummy/include/linux/kdebug.h b/sys/compat/linuxkpi/dummy/include/linux/kdebug.h new file mode 100644 index 000000000000..e69de29bb2d1 --- /dev/null +++ b/sys/compat/linuxkpi/dummy/include/linux/kdebug.h diff --git a/sys/conf/Makefile.powerpc b/sys/conf/Makefile.powerpc index 643fd8677dda..68e198bbe85e 100644 --- a/sys/conf/Makefile.powerpc +++ b/sys/conf/Makefile.powerpc @@ -32,11 +32,6 @@ LDSCRIPT_NAME?= ldscript.${MACHINE_ARCH} INCLUDES+= -I$S/contrib/libfdt -.if "${MACHINE_ARCH}" == "powerpcspe" -# Force __SPE__, since the builtin will be removed later with -mno-spe -CFLAGS.gcc+= -mabi=spe -D__SPE__ -CFLAGS.clang+= -mspe -D__SPE__ -m32 -.endif CFLAGS+= -msoft-float CFLAGS.gcc+= -Wa,-many diff --git a/sys/conf/NOTES b/sys/conf/NOTES index 8d413fb4f583..eb33d0abf919 100644 --- a/sys/conf/NOTES +++ b/sys/conf/NOTES @@ -1922,6 +1922,7 @@ device xmphy # XaQti XMAC II # oce: Emulex 10 Gbit adapters (OneConnect Ethernet) # ral: Ralink Technology IEEE 802.11 wireless adapter # re: Realtek 8139C+/8169/816xS/811xS/8101E PCI/PCIe Ethernet adapter +# rge: Realtek 8125/8126/8127 PCIe Ethernet adapter # rl: Support for PCI fast ethernet adapters based on the Realtek 8129/8139 # chipset. Note that the Realtek driver defaults to using programmed # I/O to do register accesses because memory mapped mode seems to cause @@ -2009,6 +2010,7 @@ device cxgbe # Chelsio T4-T6 1/10/25/40/100 Gigabit Ethernet device cxgbev # Chelsio T4-T6 Virtual Functions device le # AMD Am7900 LANCE and Am79C9xx PCnet device mxge # Myricom Myri-10G 10GbE NIC +device rge # Realtek 8125/8126/8127 device oce # Emulex 10GbE (OneConnect Ethernet) device ti # Alteon Networks Tigon I/II gigabit Ethernet diff --git a/sys/conf/files b/sys/conf/files index 474f337e569a..d0c4ea5f544d 100644 --- a/sys/conf/files +++ b/sys/conf/files @@ -3199,7 +3199,6 @@ dev/sound/pcm/feeder_volume.c optional sound \ dependency "snd_fxdiv_gen.h" dev/sound/pcm/mixer.c optional sound dev/sound/pcm/mixer_if.m optional sound -dev/sound/pcm/sndstat.c optional sound dev/sound/pcm/sound.c optional sound dev/sound/pcm/vchan.c optional sound dev/sound/usb/uaudio.c optional snd_uaudio usb @@ -3208,6 +3207,7 @@ dev/sound/midi/midi.c optional sound dev/sound/midi/mpu401.c optional sound dev/sound/midi/mpu_if.m optional sound dev/sound/midi/mpufoi_if.m optional sound +dev/sound/sndstat.c optional sound dev/spibus/acpi_spibus.c optional acpi spibus dev/spibus/ofw_spibus.c optional fdt spibus dev/spibus/spibus.c optional spibus \ @@ -4704,6 +4704,8 @@ compat/linuxkpi/common/src/linux_shmemfs.c optional compat_linuxkpi \ compile-with "${LINUXKPI_C}" compat/linuxkpi/common/src/linux_shrinker.c optional compat_linuxkpi \ compile-with "${LINUXKPI_C}" +compat/linuxkpi/common/src/linux_siphash.c optional compat_linuxkpi \ + compile-with "${LINUXKPI_C}" compat/linuxkpi/common/src/linux_skbuff.c optional compat_linuxkpi \ compile-with "${LINUXKPI_C}" compat/linuxkpi/common/src/linux_slab.c optional compat_linuxkpi \ diff --git a/sys/conf/files.arm64 b/sys/conf/files.arm64 index 4bd03989afa0..ee1108eca0d4 100644 --- a/sys/conf/files.arm64 +++ b/sys/conf/files.arm64 @@ -413,6 +413,35 @@ dev/ipmi/ipmi_smbus.c optional ipmi smbus dev/ipmi/ipmi_smic.c optional ipmi dev/ipmi/ipmi_ssif.c optional ipmi smbus +dev/ixl/if_ixl.c optional ixl pci \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/ixl_pf_main.c optional ixl pci \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/ixl_pf_iflib.c optional ixl pci \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/ixl_pf_qmgr.c optional ixl pci \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/ixl_pf_iov.c optional ixl pci pci_iov \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/ixl_pf_i2c.c optional ixl pci \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/ixl_txrx.c optional ixl pci \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/i40e_osdep.c optional ixl pci \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/i40e_lan_hmc.c optional ixl pci \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/i40e_hmc.c optional ixl pci \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/i40e_common.c optional ixl pci \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/i40e_nvm.c optional ixl pci \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/i40e_adminq.c optional ixl pci \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/i40e_dcb.c optional ixl pci \ + compile-with "${NORMAL_C} -I$S/dev/ixl" + dev/mailbox/arm/arm_doorbell.c optional fdt arm_doorbell dev/mbox/mbox_if.m optional soc_brcm_bcm2837 diff --git a/sys/conf/files.powerpc b/sys/conf/files.powerpc index 0deada385f31..7989f1c9bea4 100644 --- a/sys/conf/files.powerpc +++ b/sys/conf/files.powerpc @@ -75,7 +75,7 @@ crypto/openssl/powerpc64/sha512p8-ppc.S optional ossl powerpc64 crypto/openssl/powerpc64/vpaes-ppc.S optional ossl powerpc64 crypto/openssl/powerpc64/x25519-ppc64.S optional ossl powerpc64 -cddl/compat/opensolaris/kern/opensolaris_atomic.c optional zfs powerpc | dtrace powerpc | zfs powerpcspe | dtrace powerpcspe compile-with "${ZFS_C}" +cddl/compat/opensolaris/kern/opensolaris_atomic.c optional zfs powerpc | dtrace powerpc compile-with "${ZFS_C}" cddl/dev/dtrace/powerpc/dtrace_asm.S optional dtrace compile-with "${DTRACE_S}" cddl/dev/dtrace/powerpc/dtrace_subr.c optional dtrace compile-with "${DTRACE_C}" cddl/dev/fbt/powerpc/fbt_isa.c optional dtrace_fbt | dtraceall compile-with "${FBT_C}" @@ -235,25 +235,25 @@ dev/tsec/if_tsec_fdt.c optional tsec dev/uart/uart_cpu_powerpc.c optional uart dev/usb/controller/ehci_fsl.c optional ehci mpc85xx dev/vt/hw/ofwfb/ofwfb.c optional vt aim -kern/subr_atomic64.c optional powerpc | powerpcspe +kern/subr_atomic64.c optional powerpc kern/subr_dummy_vdso_tc.c standard kern/subr_sfbuf.c standard -libkern/ashldi3.c optional powerpc | powerpcspe -libkern/ashrdi3.c optional powerpc | powerpcspe +libkern/ashldi3.c optional powerpc +libkern/ashrdi3.c optional powerpc libkern/bcopy.c standard -libkern/cmpdi2.c optional powerpc | powerpcspe -libkern/divdi3.c optional powerpc | powerpcspe -libkern/lshrdi3.c optional powerpc | powerpcspe +libkern/cmpdi2.c optional powerpc +libkern/divdi3.c optional powerpc +libkern/lshrdi3.c optional powerpc libkern/memcmp.c standard libkern/memset.c standard -libkern/moddi3.c optional powerpc | powerpcspe -libkern/qdivrem.c optional powerpc | powerpcspe +libkern/moddi3.c optional powerpc +libkern/qdivrem.c optional powerpc libkern/strcmp.c standard libkern/strlen.c standard libkern/strncmp.c standard -libkern/ucmpdi2.c optional powerpc | powerpcspe -libkern/udivdi3.c optional powerpc | powerpcspe -libkern/umoddi3.c optional powerpc | powerpcspe +libkern/ucmpdi2.c optional powerpc +libkern/udivdi3.c optional powerpc +libkern/umoddi3.c optional powerpc powerpc/aim/locore.S optional aim no-obj powerpc/aim/aim_machdep.c optional aim powerpc/aim/mmu_oea.c optional aim powerpc @@ -263,29 +263,28 @@ powerpc/aim/moea64_native.c optional aim powerpc/aim/mp_cpudep.c optional aim powerpc/aim/slb.c optional aim powerpc64 | aim powerpc64le powerpc/amigaone/platform_amigaone.c optional amigaone -powerpc/amigaone/cpld_a1222.c optional powerpc amigaone | powerpcspe amigaone -powerpc/amigaone/cpld_x5000.c optional powerpc amigaone | powerpc64 amigaone +powerpc/amigaone/cpld_a1222.c optional powerpc amigaone +powerpc/amigaone/cpld_x5000.c optional powerpc amigaone powerpc/booke/locore.S optional booke no-obj powerpc/booke/booke_machdep.c optional booke powerpc/booke/machdep_e500.c optional booke_e500 powerpc/booke/mp_cpudep.c optional booke smp powerpc/booke/platform_bare.c optional booke powerpc/booke/pmap.c optional booke -powerpc/booke/spe.c optional powerpcspe powerpc/cpufreq/dfs.c optional cpufreq powerpc/cpufreq/mpc85xx_jog.c optional cpufreq mpc85xx powerpc/cpufreq/pcr.c optional cpufreq aim powerpc/cpufreq/pmcr.c optional cpufreq aim powerpc64 | cpufreq aim powerpc64le powerpc/cpufreq/pmufreq.c optional cpufreq aim pmu -powerpc/fpu/fpu_add.c optional fpu_emu | powerpcspe -powerpc/fpu/fpu_compare.c optional fpu_emu | powerpcspe -powerpc/fpu/fpu_div.c optional fpu_emu | powerpcspe +powerpc/fpu/fpu_add.c optional fpu_emu +powerpc/fpu/fpu_compare.c optional fpu_emu +powerpc/fpu/fpu_div.c optional fpu_emu powerpc/fpu/fpu_emu.c optional fpu_emu -powerpc/fpu/fpu_explode.c optional fpu_emu | powerpcspe -powerpc/fpu/fpu_implode.c optional fpu_emu | powerpcspe -powerpc/fpu/fpu_mul.c optional fpu_emu | powerpcspe +powerpc/fpu/fpu_explode.c optional fpu_emu +powerpc/fpu/fpu_implode.c optional fpu_emu +powerpc/fpu/fpu_mul.c optional fpu_emu powerpc/fpu/fpu_sqrt.c optional fpu_emu -powerpc/fpu/fpu_subr.c optional fpu_emu | powerpcspe +powerpc/fpu/fpu_subr.c optional fpu_emu powerpc/mambo/mambocall.S optional mambo powerpc/mambo/mambo.c optional mambo powerpc/mambo/mambo_console.c optional mambo @@ -358,7 +357,7 @@ powerpc/powernv/platform_powernv.c optional powernv powerpc/powernv/powernv_centaur.c optional powernv powerpc/powernv/powernv_xscom.c optional powernv powerpc/powernv/xive.c optional powernv -powerpc/powerpc/altivec.c optional !powerpcspe +powerpc/powerpc/altivec.c standard powerpc/powerpc/autoconf.c standard powerpc/powerpc/bus_machdep.c standard powerpc/powerpc/busdma_machdep.c standard @@ -371,7 +370,7 @@ powerpc/powerpc/db_hwwatch.c optional ddb powerpc/powerpc/db_interface.c optional ddb powerpc/powerpc/db_trace.c optional ddb powerpc/powerpc/dump_machdep.c standard -powerpc/powerpc/elf32_machdep.c optional powerpc | powerpcspe | compat_freebsd32 +powerpc/powerpc/elf32_machdep.c optional powerpc | compat_freebsd32 powerpc/powerpc/elf64_machdep.c optional powerpc64 | powerpc64le powerpc/powerpc/exec_machdep.c standard powerpc/powerpc/fpu.c standard @@ -393,9 +392,9 @@ powerpc/powerpc/ptrace_machdep.c standard powerpc/powerpc/sc_machdep.c optional sc powerpc/powerpc/sdt_machdep.c optional powerpc64 kdtrace_hooks powerpc/powerpc/setjmp.S standard -powerpc/powerpc/sigcode32.S optional powerpc | powerpcspe | compat_freebsd32 +powerpc/powerpc/sigcode32.S optional powerpc | compat_freebsd32 powerpc/powerpc/sigcode64.S optional powerpc64 | powerpc64le -powerpc/powerpc/swtch32.S optional powerpc | powerpcspe +powerpc/powerpc/swtch32.S optional powerpc powerpc/powerpc/swtch64.S optional powerpc64 | powerpc64le powerpc/powerpc/stack_machdep.c optional ddb | stack powerpc/powerpc/support.S optional powerpc64 | powerpc64le | booke diff --git a/sys/conf/kern.mk b/sys/conf/kern.mk index 653a798778c4..4e18a1300791 100644 --- a/sys/conf/kern.mk +++ b/sys/conf/kern.mk @@ -205,10 +205,6 @@ CFLAGS+= -mno-altivec -msoft-float INLINE_LIMIT?= 15000 .endif -.if ${MACHINE_ARCH} == "powerpcspe" -CFLAGS.gcc+= -mno-spe -.endif - # # Use dot symbols (or, better, the V2 ELF ABI) on powerpc64 to make # DDB happy. ELFv2, if available, has some other efficiency benefits. @@ -407,7 +403,6 @@ LD_EMULATION_arm=armelf_fbsd LD_EMULATION_armv7=armelf_fbsd LD_EMULATION_i386=elf_i386_fbsd LD_EMULATION_powerpc= elf32ppc_fbsd -LD_EMULATION_powerpcspe= elf32ppc_fbsd LD_EMULATION_powerpc64= elf64ppc_fbsd LD_EMULATION_powerpc64le= elf64lppc_fbsd LD_EMULATION_riscv64= elf64lriscv diff --git a/sys/conf/kern.opts.mk b/sys/conf/kern.opts.mk index cef4dd11ba58..81b117492916 100644 --- a/sys/conf/kern.opts.mk +++ b/sys/conf/kern.opts.mk @@ -56,6 +56,7 @@ __DEFAULT_NO_OPTIONS = \ KERNEL_RETPOLINE \ RATELIMIT \ REPRODUCIBLE_BUILD \ + REPRODUCIBLE_PATHS \ VERIEXEC # Some options are totally broken on some architectures. We disable them. If you diff --git a/sys/conf/kern.post.mk b/sys/conf/kern.post.mk index 7cdfd17778db..343abc5853f7 100644 --- a/sys/conf/kern.post.mk +++ b/sys/conf/kern.post.mk @@ -372,7 +372,7 @@ _ILINKS+= x86 _ILINKS+= i386 .endif -.if ${MK_REPRODUCIBLE_BUILD} != "no" +.if ${MK_REPRODUCIBLE_PATHS} != "no" PREFIX_SYSDIR=/usr/src/sys PREFIX_OBJDIR=/usr/obj/usr/src/${MACHINE}.${MACHINE_CPUARCH}/sys/${KERN_IDENT} CFLAGS+= -ffile-prefix-map=${SYSDIR}=${PREFIX_SYSDIR} diff --git a/sys/conf/kern.pre.mk b/sys/conf/kern.pre.mk index 0251486247da..440ed2df5644 100644 --- a/sys/conf/kern.pre.mk +++ b/sys/conf/kern.pre.mk @@ -223,7 +223,7 @@ ZFS_CFLAGS+= -D__x86_64 -DHAVE_SSE2 -DHAVE_SSSE3 -DHAVE_SSE4_1 -DHAVE_SSE4_2 \ .endif .if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "powerpc" || \ - ${MACHINE_ARCH} == "powerpcspe" || ${MACHINE_ARCH} == "arm" + ${MACHINE_ARCH} == "arm" ZFS_CFLAGS+= -DBITS_PER_LONG=32 .else ZFS_CFLAGS+= -DBITS_PER_LONG=64 diff --git a/sys/conf/kmod.mk b/sys/conf/kmod.mk index 6e20dce0653f..edc311348971 100644 --- a/sys/conf/kmod.mk +++ b/sys/conf/kmod.mk @@ -303,7 +303,7 @@ all: ${PROG} beforedepend: ${_ILINKS} beforebuild: ${_ILINKS} -.if ${MK_REPRODUCIBLE_BUILD} != "no" +.if ${MK_REPRODUCIBLE_PATHS} != "no" PREFIX_SYSDIR=/usr/src/sys CFLAGS+= -ffile-prefix-map=${SYSDIR}=${PREFIX_SYSDIR} .if defined(KERNBUILDDIR) diff --git a/sys/conf/ldscript.powerpcspe b/sys/conf/ldscript.powerpcspe deleted file mode 100644 index fa82cbe8330f..000000000000 --- a/sys/conf/ldscript.powerpcspe +++ /dev/null @@ -1,143 +0,0 @@ -OUTPUT_FORMAT("elf32-powerpc-freebsd", "elf32-powerpc-freebsd", - "elf32-powerpc-freebsd") -OUTPUT_ARCH(powerpc) -ENTRY(__start) -SEARCH_DIR(/usr/lib); -PROVIDE (__stack = 0); -PHDRS -{ - kernel PT_LOAD; - dynamic PT_DYNAMIC; -} -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - - . = kernbase + SIZEOF_HEADERS; - PROVIDE (begin = . - SIZEOF_HEADERS); - - .text : - { - *(.glink) - *(.text) - *(.stub) - /* .gnu.warning sections are handled specially by elf32.em. */ - *(.gnu.warning) - *(.gnu.linkonce.t*) - } :kernel =0 - _etext = .; - PROVIDE (etext = .); - - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .gnu.version : { *(.gnu.version) } - .gnu.version_d : { *(.gnu.version_d) } - .gnu.version_r : { *(.gnu.version_r) } - .rela.text : - { *(.rela.text) *(.rela.gnu.linkonce.t*) } - .rela.data : - { *(.rela.data) *(.rela.gnu.linkonce.d*) } - .rela.rodata : - { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } - .rela.got : { *(.rela.got) } - .rela.got1 : { *(.rela.got1) } - .rela.got2 : { *(.rela.got2) } - .rela.ctors : { *(.rela.ctors) } - .rela.dtors : { *(.rela.dtors) } - .rela.init : { *(.rela.init) } - .rela.fini : { *(.rela.fini) } - .rela.bss : { *(.rela.bss) } - .rela.plt : { *(.rela.plt) } - .rela.sdata : { *(.rela.sdata) } - .rela.sbss : { *(.rela.sbss) } - .rela.sdata2 : { *(.rela.sdata2) } - .rela.sbss2 : { *(.rela.sbss2) } - - .init : { *(.init) } =0 - .fini : { *(.fini) } =0 - .rodata : { *(.rodata) *(.gnu.linkonce.r*) } - .rodata1 : { *(.rodata1) } - .note.gnu.build-id : { - PROVIDE (__build_id_start = .); - *(.note.gnu.build-id) - PROVIDE (__build_id_end = .); - } - .sdata2 : { *(.sdata2) } - .sbss2 : { *(.sbss2) } - /* Adjust the address for the data segment to the next page up. */ - . = ((. + 0x1000) & ~(0x1000 - 1)); - .data : - { - *(.data) - *(.gnu.linkonce.d*) - CONSTRUCTORS - } - .data1 : { *(.data1) } - .got1 : { *(.got1) } - . = ALIGN(4096); - .got : { *(.got) } - .got.plt : { *(.got.plt) } - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*))) - KEEP (*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - } - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*))) - KEEP (*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - } - .dynamic : { *(.dynamic) } :kernel :dynamic - /* Put .ctors and .dtors next to the .got2 section, so that the pointers - get relocated with -mrelocatable. Also put in the .fixup pointers. - The current compiler no longer needs this, but keep it around for 2.7.2 */ - PROVIDE (_GOT2_START_ = .); - .got2 : { *(.got2) } :kernel - PROVIDE (__CTOR_LIST__ = .); - .ctors : { *(.ctors) } - PROVIDE (__CTOR_END__ = .); - PROVIDE (__DTOR_LIST__ = .); - .dtors : { *(.dtors) } - PROVIDE (__DTOR_END__ = .); - PROVIDE (_FIXUP_START_ = .); - .fixup : { *(.fixup) } - PROVIDE (_FIXUP_END_ = .); - PROVIDE (_GOT2_END_ = .); - /* We want the small data sections together, so single-instruction offsets - can access them all, and initialized data all before uninitialized, so - we can shorten the on-disk segment size. */ - .sdata : { *(.sdata) } - _edata = .; - PROVIDE (edata = .); - .sbss : - { - PROVIDE (__sbss_start = .); - *(.sbss) - *(.scommon) - *(.dynsbss) - PROVIDE (__sbss_end = .); - } - .plt : { *(.plt) } - .bss : - { - PROVIDE (__bss_start = .); - *(.dynbss) - *(.bss) - *(COMMON) - } - _end = . ; - PROVIDE (end = .); - - /* Debug */ - INCLUDE debuginfo.ldscript - - .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) } - /DISCARD/ : { *(.note.GNU-stack) } -} - diff --git a/sys/conf/options.amd64 b/sys/conf/options.amd64 index df18abfa8e1e..a3a735731438 100644 --- a/sys/conf/options.amd64 +++ b/sys/conf/options.amd64 @@ -68,3 +68,6 @@ MPTABLE_LINUX_BUG_COMPAT # x86 specific uart options UART_NS8250_EARLY_PORT opt_uart.h + +# Enable asmc(4)-specific debug logic. +ASMC_DEBUG opt_asmc.h diff --git a/sys/conf/options.arm64 b/sys/conf/options.arm64 index 4bdd408f4651..5e6f25cd8db8 100644 --- a/sys/conf/options.arm64 +++ b/sys/conf/options.arm64 @@ -16,6 +16,9 @@ COMPAT_FREEBSD32 opt_global.h # Emulate SWP/SWPB for COMPAT_FREEBSD32 EMUL_SWP opt_global.h +# iWARP client interface support in ixl +IXL_IW opt_ixl.h + # EFI Runtime services support EFIRT opt_efirt.h diff --git a/sys/conf/options.i386 b/sys/conf/options.i386 index c577568c837f..62bf3baf8649 100644 --- a/sys/conf/options.i386 +++ b/sys/conf/options.i386 @@ -112,3 +112,6 @@ MPTABLE_LINUX_BUG_COMPAT # x86 specific uart options UART_NS8250_EARLY_PORT opt_uart.h + +# Enable asmc(4)-specific debug logic. +ASMC_DEBUG opt_asmc.h diff --git a/sys/conf/options.powerpc b/sys/conf/options.powerpc index a6096d1b32ca..c8ab0e066f49 100644 --- a/sys/conf/options.powerpc +++ b/sys/conf/options.powerpc @@ -8,7 +8,6 @@ CELL POWERPC POWERPC64 POWERPC64LE -POWERPCSPE FPU_EMU diff --git a/sys/contrib/device-tree/include/dt-bindings/clock/cv181x-clock.h b/sys/contrib/device-tree/include/dt-bindings/clock/cv181x-clock.h new file mode 100644 index 000000000000..ed76e4d8ef95 --- /dev/null +++ b/sys/contrib/device-tree/include/dt-bindings/clock/cv181x-clock.h @@ -0,0 +1,175 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2021. All rights reserved. + * + * File Name: cv181x-clock.h + * Description: + */ + +#ifndef __DT_BINDINGS_CLK_CV181X_H__ +#define __DT_BINDINGS_CLK_CV181X_H__ + +#define CV181X_CLK_MPLL 0 +#define CV181X_CLK_TPLL 1 +#define CV181X_CLK_FPLL 2 +#define CV181X_CLK_MIPIMPLL 3 +#define CV181X_CLK_A0PLL 4 +#define CV181X_CLK_DISPPLL 5 +#define CV181X_CLK_CAM0PLL 6 +#define CV181X_CLK_CAM1PLL 7 + +#define CV181X_CLK_MIPIMPLL_D3 8 +#define CV181X_CLK_CAM0PLL_D2 9 +#define CV181X_CLK_CAM0PLL_D3 10 + +#define CV181X_CLK_A53 11 +#define CV181X_CLK_CPU_AXI0 12 +#define CV181X_CLK_CPU_GIC 13 +#define CV181X_CLK_XTAL_A53 14 +#define CV181X_CLK_TPU 15 +#define CV181X_CLK_TPU_FAB 16 +#define CV181X_CLK_AHB_ROM 17 +#define CV181X_CLK_DDR_AXI_REG 18 +#define CV181X_CLK_RTC_25M 19 +#define CV181X_CLK_TEMPSEN 20 +#define CV181X_CLK_SARADC 21 +#define CV181X_CLK_EFUSE 22 +#define CV181X_CLK_APB_EFUSE 23 +#define CV181X_CLK_DEBUG 24 +#define CV181X_CLK_XTAL_MISC 25 +#define CV181X_CLK_AXI4_EMMC 26 +#define CV181X_CLK_EMMC 27 +#define CV181X_CLK_100K_EMMC 28 +#define CV181X_CLK_AXI4_SD0 29 +#define CV181X_CLK_SD0 30 +#define CV181X_CLK_100K_SD0 31 +#define CV181X_CLK_AXI4_SD1 32 +#define CV181X_CLK_SD1 33 +#define CV181X_CLK_100K_SD1 34 +#define CV181X_CLK_SPI_NAND 35 +#define CV181X_CLK_500M_ETH0 36 +#define CV181X_CLK_AXI4_ETH0 37 +#define CV181X_CLK_500M_ETH1 38 +#define CV181X_CLK_AXI4_ETH1 39 +#define CV181X_CLK_APB_GPIO 40 +#define CV181X_CLK_APB_GPIO_INTR 41 +#define CV181X_CLK_GPIO_DB 42 +#define CV181X_CLK_AHB_SF 43 +#define CV181X_CLK_SDMA_AXI 44 +#define CV181X_CLK_SDMA_AUD0 45 +#define CV181X_CLK_SDMA_AUD1 46 +#define CV181X_CLK_SDMA_AUD2 47 +#define CV181X_CLK_SDMA_AUD3 48 +#define CV181X_CLK_APB_I2C 49 +#define CV181X_CLK_APB_WDT 50 +#define CV181X_CLK_PWM 51 +#define CV181X_CLK_APB_SPI0 52 +#define CV181X_CLK_APB_SPI1 53 +#define CV181X_CLK_APB_SPI2 54 +#define CV181X_CLK_APB_SPI3 55 +#define CV181X_CLK_CAM0_200 56 +#define CV181X_CLK_UART0 57 +#define CV181X_CLK_APB_UART0 58 +#define CV181X_CLK_UART1 59 +#define CV181X_CLK_APB_UART1 60 +#define CV181X_CLK_UART2 61 +#define CV181X_CLK_APB_UART2 62 +#define CV181X_CLK_UART3 63 +#define CV181X_CLK_APB_UART3 64 +#define CV181X_CLK_UART4 65 +#define CV181X_CLK_APB_UART4 66 +#define CV181X_CLK_APB_I2S0 67 +#define CV181X_CLK_APB_I2S1 68 +#define CV181X_CLK_APB_I2S2 69 +#define CV181X_CLK_APB_I2S3 70 +#define CV181X_CLK_AXI4_USB 71 +#define CV181X_CLK_APB_USB 72 +#define CV181X_CLK_125M_USB 73 +#define CV181X_CLK_33K_USB 74 +#define CV181X_CLK_12M_USB 75 +#define CV181X_CLK_AXI4 76 +#define CV181X_CLK_AXI6 77 +#define CV181X_CLK_DSI_ESC 78 +#define CV181X_CLK_AXI_VIP 79 +#define CV181X_CLK_SRC_VIP_SYS_0 80 +#define CV181X_CLK_SRC_VIP_SYS_1 81 +#define CV181X_CLK_DISP_SRC_VIP 82 +#define CV181X_CLK_AXI_VIDEO_CODEC 83 +#define CV181X_CLK_VC_SRC0 84 +#define CV181X_CLK_H264C 85 +#define CV181X_CLK_H265C 86 +#define CV181X_CLK_JPEG 87 +#define CV181X_CLK_APB_JPEG 88 +#define CV181X_CLK_APB_H264C 89 +#define CV181X_CLK_APB_H265C 90 +#define CV181X_CLK_CAM0 91 +#define CV181X_CLK_CAM1 92 +#define CV181X_CLK_CSI_MAC0_VIP 93 +#define CV181X_CLK_CSI_MAC1_VIP 94 +#define CV181X_CLK_ISP_TOP_VIP 95 +#define CV181X_CLK_IMG_D_VIP 96 +#define CV181X_CLK_IMG_V_VIP 97 +#define CV181X_CLK_SC_TOP_VIP 98 +#define CV181X_CLK_SC_D_VIP 99 +#define CV181X_CLK_SC_V1_VIP 100 +#define CV181X_CLK_SC_V2_VIP 101 +#define CV181X_CLK_SC_V3_VIP 102 +#define CV181X_CLK_DWA_VIP 103 +#define CV181X_CLK_BT_VIP 104 +#define CV181X_CLK_DISP_VIP 105 +#define CV181X_CLK_DSI_MAC_VIP 106 +#define CV181X_CLK_LVDS0_VIP 107 +#define CV181X_CLK_LVDS1_VIP 108 +#define CV181X_CLK_CSI0_RX_VIP 109 +#define CV181X_CLK_CSI1_RX_VIP 110 +#define CV181X_CLK_PAD_VI_VIP 111 +#define CV181X_CLK_1M 112 +#define CV181X_CLK_SPI 113 +#define CV181X_CLK_I2C 114 +#define CV181X_CLK_PM 115 +#define CV181X_CLK_TIMER0 116 +#define CV181X_CLK_TIMER1 117 +#define CV181X_CLK_TIMER2 118 +#define CV181X_CLK_TIMER3 119 +#define CV181X_CLK_TIMER4 120 +#define CV181X_CLK_TIMER5 121 +#define CV181X_CLK_TIMER6 122 +#define CV181X_CLK_TIMER7 123 +#define CV181X_CLK_APB_I2C0 124 +#define CV181X_CLK_APB_I2C1 125 +#define CV181X_CLK_APB_I2C2 126 +#define CV181X_CLK_APB_I2C3 127 +#define CV181X_CLK_APB_I2C4 128 +#define CV181X_CLK_WGN 129 +#define CV181X_CLK_WGN0 130 +#define CV181X_CLK_WGN1 131 +#define CV181X_CLK_WGN2 132 +#define CV181X_CLK_KEYSCAN 133 +#define CV181X_CLK_AHB_SF1 134 +#define CV181X_CLK_VC_SRC1 135 +#define CV181X_CLK_SRC_VIP_SYS_2 136 +#define CV181X_CLK_PAD_VI1_VIP 137 +#define CV181X_CLK_CFG_REG_VIP 138 +#define CV181X_CLK_CFG_REG_VC 139 +#define CV181X_CLK_AUDSRC 140 +#define CV181X_CLK_APB_AUDSRC 141 +#define CV181X_CLK_VC_SRC2 142 +#define CV181X_CLK_PWM_SRC 143 +#define CV181X_CLK_AP_DEBUG 144 +#define CV181X_CLK_SRC_RTC_SYS_0 145 +#define CV181X_CLK_PAD_VI2_VIP 146 +#define CV181X_CLK_CSI_BE_VIP 147 +#define CV181X_CLK_VIP_IP0 148 +#define CV181X_CLK_VIP_IP1 149 +#define CV181X_CLK_VIP_IP2 150 +#define CV181X_CLK_VIP_IP3 151 +#define CV181X_CLK_C906_0 152 +#define CV181X_CLK_C906_1 153 +#define CV181X_CLK_SRC_VIP_SYS_3 154 +#define CV181X_CLK_SRC_VIP_SYS_4 155 +#define CV181X_CLK_IVE_VIP 156 +#define CV181X_CLK_RAW_VIP 157 +#define CV181X_CLK_OSDC_VIP 158 +#define CV181X_CLK_CSI_MAC2_VIP 159 +#define CV181X_CLK_CAM0_VIP 160 + +#endif /* __DT_BINDINGS_CLK_CV181X_H__ */ diff --git a/sys/contrib/device-tree/include/dt-bindings/dma/cv181x-dmamap.h b/sys/contrib/device-tree/include/dt-bindings/dma/cv181x-dmamap.h new file mode 100644 index 000000000000..84a4c3664ee1 --- /dev/null +++ b/sys/contrib/device-tree/include/dt-bindings/dma/cv181x-dmamap.h @@ -0,0 +1,48 @@ +#ifndef __DT_BINDINGS_CV181X_DMAMAP_H__ +#define __DT_BINDINGS_CV181X_DMAMAP_H__ + +#define CVI_I2S0_RX 0 +#define CVI_I2S0_TX 1 +#define CVI_I2S1_RX 2 +#define CVI_I2S1_TX 3 +#define CVI_I2S2_RX 4 +#define CVI_I2S2_TX 5 +#define CVI_I2S3_RX 6 +#define CVI_I2S3_TX 7 +#define CVI_UART0_RX 8 +#define CVI_UART0_TX 9 +#define CVI_UART1_RX 10 +#define CVI_UART1_TX 11 +#define CVI_UART2_RX 12 +#define CVI_UART2_TX 13 +#define CVI_UART3_RX 14 +#define CVI_UART3_TX 15 +#define CVI_SPI0_RX 16 +#define CVI_SPI0_TX 17 +#define CVI_SPI1_RX 18 +#define CVI_SPI1_TX 19 +#define CVI_SPI2_RX 20 +#define CVI_SPI2_TX 21 +#define CVI_SPI3_RX 22 +#define CVI_SPI3_TX 23 +#define CVI_I2C0_RX 24 +#define CVI_I2C0_TX 25 +#define CVI_I2C1_RX 26 +#define CVI_I2C1_TX 27 +#define CVI_I2C2_RX 28 +#define CVI_I2C2_TX 29 +#define CVI_I2C3_RX 30 +#define CVI_I2C3_TX 31 +#define CVI_I2C4_RX 32 +#define CVI_I2C4_TX 33 +#define CVI_TDM0_RX 34 +#define CVI_TDM0_TX 35 +#define CVI_TDM1_RX 36 +#define CVI_AUDSRC 37 +#define CVI_SPI_NAND 38 +#define CVI_SPI_NOR 39 +#define CVI_UART4_RX 40 +#define CVI_UART4_TX 41 +#define CVI_SPI_NOR1 42 + +#endif diff --git a/sys/contrib/device-tree/include/dt-bindings/reset/cv181x-resets.h b/sys/contrib/device-tree/include/dt-bindings/reset/cv181x-resets.h new file mode 100644 index 000000000000..e10d33b35446 --- /dev/null +++ b/sys/contrib/device-tree/include/dt-bindings/reset/cv181x-resets.h @@ -0,0 +1,172 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: cvi_template.h + * Description: + */ + +#ifndef __DT_BINDINGS_RST_CV181X_H__ +#define __DT_BINDINGS_RST_CV181X_H__ + +#define RST_MAINRST_AP 0 +#define RST_SECONDRST_AP 1 +#define RST_DDR 2 +#define RST_H264C 3 +#define RST_JPEG 4 +#define RST_H265C 5 +#define RST_VIPSYS 6 +#define RST_TDMA 7 +#define RST_TPU 8 +#define RST_TPUSYS 9 +#define RST_TSM 10 +#define RST_USB 11 +#define RST_ETH0 12 +#define RST_ETH1 13 +#define RST_NAND 14 +#define RST_EMMC 15 +#define RST_SD0 16 +#define RST_SD1 17 +#define RST_SDMA 18 +#define RST_I2S0 19 +#define RST_I2S1 20 +#define RST_I2S2 21 +#define RST_I2S3 22 +#define RST_UART0 23 +#define RST_UART1 24 +#define RST_UART2 25 +#define RST_UART3 26 +#define RST_I2C0 27 +#define RST_I2C1 28 +#define RST_I2C2 29 +#define RST_I2C3 30 +#define RST_I2C4 31 +#define RST_PWM0 32 +#define RST_PWM1 33 +#define RST_PWM2 34 +#define RST_PWM3 35 +#define RST_PWM4 36 +#define RST_PWM5 37 +#define RST_PWM6 38 +#define RST_PWM7 39 +#define RST_SPI0 40 +#define RST_SPI1 41 +#define RST_SPI2 42 +#define RST_SPI3 43 +#define RST_GPIO0 44 +#define RST_GPIO1 45 +#define RST_GPIO2 46 +#define RST_EFUSE 47 +#define RST_WDT 48 +#define RST_AHBRST_ROM 49 +#define RST_SPIC 50 +#define RST_TEMPSEN 51 +#define RST_SARADC 52 +#define RST_PCIERST_CDMA 53 +#define RST_PCIERST_SMMU 54 +#define RST_PCIERST_PCIE 55 +#define RST_PCIERST_FABS 56 +#define RST_PCIERST_IRQ 57 +#define RST_COMBORST_PHY0 58 +#define RST_COMBORST_PHY1 59 +#define RST_USB1 60 +#define RST_SPIRST_NAND 61 +#define RST_SE 62 +#define RST_RTCRST_SWRST_ONLY 63 +#define RST_CPUCORE0 64 +#define RST_CPUCORE1 65 +#define RST_CPUCORE2 66 +#define RST_CPUCORE3 67 +#define RST_DSIPHY 68 +#define RST_DSIPHYRST_APB 69 +#define RST_CSIPHY0 70 +#define RST_CSIPHY0RST_APB 71 +#define RST_CSIPHY1 72 +#define RST_CSIPHY1RST_APB 73 +#define RST_UART4 74 +#define RST_GPIO3 75 +#define RST_SYSTEM 76 +#define RST_TIMER 77 +#define RST_TIMER0 78 +#define RST_TIMER1 79 +#define RST_TIMER2 80 +#define RST_TIMER3 81 +#define RST_TIMER4 82 +#define RST_TIMER5 83 +#define RST_TIMER6 84 +#define RST_TIMER7 85 +#define RST_WGN0 86 +#define RST_WGN1 87 +#define RST_WGN2 88 +#define RST_KEYSCAN 89 +#define RST_SPIC1 90 +#define RST_AUDDAC 91 +#define RST_AUDDACRST_APB 92 +#define RST_AUDADC 93 +#define RST_AUDADCRST_APB 94 +#define RST_VCSYS 95 +#define RST_ETHPHY 96 +#define RST_ETHPHYRST_APB 97 +#define RST_AUDSRC 98 +#define RST_AUTO_CLEAR_CPUCORE0 99 +#define RST_AUTO_CLEAR_CPUCORE1 100 +#define RST_AUTO_CLEAR_CPUCORE2 101 +#define RST_AUTO_CLEAR_CPUCORE3 102 +#define RST_AUTO_CLEAR_MAINRST_AP 103 +#define RST_AUTO_CLEAR_SECONDRST_AP 104 + +#define CLK_RST_A53 0 +#define CLK_RST_50M_A53 1 +#define CLK_RST_AHB_ROM 2 +#define CLK_RST_AXI_SRAM 3 +#define CLK_RST_DDR_AXI 4 +#define CLK_RST_EFUSE 5 +#define CLK_RST_APB_EFUSE 6 +#define CLK_RST_AXI_EMMC 7 +#define CLK_RST_EMMC 8 +#define CLK_RST_100K_EMMC 9 +#define CLK_RST_AXI_SD 10 +#define CLK_RST_SD 11 +#define CLK_RST_100K_SD 12 +#define CLK_RST_500M_ETH0 13 +#define CLK_RST_AXI_ETH0 14 +#define CLK_RST_500M_ETH1 15 +#define CLK_RST_AXI_ETH1 16 +#define CLK_RST_AXI_GDMA 17 +#define CLK_RST_APB_GPIO 18 +#define CLK_RST_APB_GPIO_INTR 19 +#define CLK_RST_GPIO_DB 20 +#define CLK_RST_AXI_MINER 21 +#define CLK_RST_AHB_SF 22 +#define CLK_RST_SDMA_AXI 23 +#define CLK_RST_SDMA_AUD 24 +#define CLK_RST_APB_I2C 25 +#define CLK_RST_APB_WDT 26 +#define CLK_RST_APB_JPEG 27 +#define CLK_RST_JPEG_AXI 28 +#define CLK_RST_AXI_NF 29 +#define CLK_RST_APB_NF 30 +#define CLK_RST_NF 31 +#define CLK_RST_APB_PWM 32 +#define CLK_RST_RV 33 +#define CLK_RST_APB_SPI 34 +#define CLK_RST_TPU_AXI 35 +#define CLK_RST_UART_500M 36 +#define CLK_RST_APB_UART 37 +#define CLK_RST_APB_I2S 38 +#define CLK_RST_AXI_USB 39 +#define CLK_RST_APB_USB 40 +#define CLK_RST_125M_USB 41 +#define CLK_RST_33K_USB 42 +#define CLK_RST_12M_USB 43 +#define CLK_RST_APB_VIDEO 44 +#define CLK_RST_VIDEO_AXI 45 +#define CLK_RST_VPP_AXI 46 +#define CLK_RST_APB_VPP 47 +#define CLK_RST_AXI1 48 +#define CLK_RST_AXI2 49 +#define CLK_RST_AXI3 50 +#define CLK_RST_AXI4 51 +#define CLK_RST_AXI5 52 +#define CLK_RST_AXI6 53 + +#endif /* _DT_BINDINGS_RST_CV1835_H_ */ diff --git a/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_bga.dtsi b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_bga.dtsi new file mode 100644 index 000000000000..93039e182782 --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_bga.dtsi @@ -0,0 +1,56 @@ +&dac{ + mute-gpio-l = <&porta 15 GPIO_ACTIVE_LOW>; + mute-gpio-r = <&porta 30 GPIO_ACTIVE_LOW>; +}; + +&spi0 { + status = "disabled"; + num-cs = <1>; + spidev@0 { + compatible = "rohm,dh2228fv"; + spi-max-frequency = <1000000>; + reg = <0>; + }; +}; + +&spi1 { + status = "disabled"; + num-cs = <1>; + spidev@0 { + compatible = "rohm,dh2228fv"; + spi-max-frequency = <1000000>; + reg = <0>; + }; +}; + +&spi2 { + status = "disabled"; + num-cs = <1>; + spidev@0 { + compatible = "rohm,dh2228fv"; + spi-max-frequency = <1000000>; + reg = <0>; + }; +}; + +&spi3 { + status = "okay"; + num-cs = <1>; + spidev@0 { + compatible = "rohm,dh2228fv"; + spi-max-frequency = <1000000>; + reg = <0>; + }; +}; + +&i2c1 { + status = "disabled"; +}; + +/ { + /delete-node/ i2s@04110000; + /delete-node/ i2s@04120000; + /delete-node/ sound_ext1; + /delete-node/ sound_ext2; + /delete-node/ sound_PDM; +}; diff --git a/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_emmc.dtsi b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_emmc.dtsi new file mode 100644 index 000000000000..507a3a46b342 --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_emmc.dtsi @@ -0,0 +1,4 @@ +/ { + /delete-node/ cvi-spif@10000000; + /delete-node/ cv-spinf@4060000; +}; diff --git a/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_qfn.dtsi b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_qfn.dtsi new file mode 100644 index 000000000000..5d81e8c2cedc --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_qfn.dtsi @@ -0,0 +1,120 @@ +&sd { + no-1-8-v; +}; + +&mipi_rx{ + snsr-reset = <&portc 13 GPIO_ACTIVE_LOW>, <&portc 13 GPIO_ACTIVE_LOW>, <&portc 13 GPIO_ACTIVE_LOW>; +}; + +&mipi_tx { + reset-gpio = <&porta 15 GPIO_ACTIVE_LOW>; + pwm-gpio = <&porta 18 GPIO_ACTIVE_HIGH>; + power-ct-gpio = <&porta 19 GPIO_ACTIVE_HIGH>; +}; + +&dac{ + mute-gpio-r = <&porte 2 GPIO_ACTIVE_LOW>; +}; + +&spi0 { + status = "disabled"; + num-cs = <1>; + spidev@0 { + compatible = "rohm,dh2228fv"; + spi-max-frequency = <1000000>; + reg = <0>; + }; +}; + +&spi1 { + status = "disabled"; + num-cs = <1>; + spidev@0 { + compatible = "rohm,dh2228fv"; + spi-max-frequency = <1000000>; + reg = <0>; + }; +}; + +&spi2 { + status = "disabled"; + num-cs = <1>; + spidev@0 { + compatible = "rohm,dh2228fv"; + spi-max-frequency = <1000000>; + reg = <0>; + }; +}; + +&spi3 { + status = "okay"; + num-cs = <1>; + spidev@0 { + compatible = "rohm,dh2228fv"; + spi-max-frequency = <1000000>; + reg = <0>; + }; +}; + +#ifndef CONFIG_PM +&i2c0 { + /* FMUX_GPIO_REG iic_func_sel gpio_func_sel */ + scl-pinmux = <0x03001070 0x0 0x3>; // IIC0_SCL/IIC0_SCL/XGPIOA[28] + sda-pinmux = <0x03001074 0x0 0x3>; // IIC0_SDA/IIC0_SDA/XGPIOA[29] + /* gpio port */ + scl-gpios = <&porta 28 GPIO_ACTIVE_HIGH>; + sda-gpios = <&porta 29 GPIO_ACTIVE_HIGH>; +}; + +&i2c1 { + /* FMUX_GPIO_REG iic_func_sel gpio_func_sel */ + scl-pinmux = <0x03009408 0x2 0x3>; // SPI1_MOSI/IIC1_SCL/XGPIOB[7] + sda-pinmux = <0x0300940c 0x2 0x3>; // SPI1_MISO/IIC1_SDA/XGPIOB[8] + /* gpio port */ + scl-gpios = <&portb 7 GPIO_ACTIVE_HIGH>; + sda-gpios = <&portb 8 GPIO_ACTIVE_HIGH>; +}; + +&i2c2 { + /* FMUX_GPIO_REG iic_func_sel gpio_func_sel */ + scl-pinmux = <0x030011a0 0x4 0x3>; // PAD_MIPI_TXP1/IIC2_SCL/XGPIOC[15] + sda-pinmux = <0x0300119c 0x4 0x3>; // PAD_MIPI_TXM1/IIC2_SDA/XGPIOC[14] + /* gpio port */ + scl-gpios = <&portc 15 GPIO_ACTIVE_HIGH>; + sda-gpios = <&portc 14 GPIO_ACTIVE_HIGH>; +}; + +&i2c3 { + /* FMUX_GPIO_REG iic_func_sel gpio_func_sel */ + scl-pinmux = <0x03001014 0x0 0x3>; // IIC3_SCL/IIC3_SCL/XGPIOA[5] + sda-pinmux = <0x03001018 0x0 0x3>; // IIC3_SDA/IIC3_SDA/XGPIOA[6] + /* gpio port */ + scl-gpios = <&porta 5 GPIO_ACTIVE_HIGH>; + sda-gpios = <&porta 6 GPIO_ACTIVE_HIGH>; +}; + +&i2c4 { + /* FMUX_GPIO_REG iic_func_sel gpio_func_sel */ + scl-pinmux = <0x030010f0 0x2 0x3>; // ADC3/IIC4_SCL/XGPIOB[1] + sda-pinmux = <0x030010f4 0x2 0x3>; // ADC2/IIC4_SDA/XGPIOB[2] + /* gpio port */ + scl-gpios = <&portb 1 GPIO_ACTIVE_HIGH>; + sda-gpios = <&portb 2 GPIO_ACTIVE_HIGH>; +}; +#endif + +/ { + /delete-node/ wifi-sd@4320000; + /delete-node/ i2s@04110000; + /delete-node/ i2s@04120000; + /delete-node/ sound_ext1; + /delete-node/ sound_ext2; + /delete-node/ sound_PDM; + + wifi_pin { + compatible = "cvitek,wifi-pin"; + poweron-gpio = <&porte 2 GPIO_ACTIVE_HIGH>; + wakeup-gpio = <&porte 6 GPIO_ACTIVE_HIGH>; + }; + +}; diff --git a/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_sd.dtsi b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_sd.dtsi new file mode 100644 index 000000000000..5af9620d8630 --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_sd.dtsi @@ -0,0 +1,4 @@ +/ { + /delete-node/ cv-emmc@4300000; + /delete-node/ cv-spinf@4060000; +}; diff --git a/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_spinand.dtsi b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_spinand.dtsi new file mode 100644 index 000000000000..2c3c6065caa3 --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_spinand.dtsi @@ -0,0 +1,5 @@ +/ { + /delete-node/ cvi-spif@10000000; + /delete-node/ cv-emmc@4300000; +}; + diff --git a/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_spinor.dtsi b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_spinor.dtsi new file mode 100644 index 000000000000..cd125408284a --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_asic_spinor.dtsi @@ -0,0 +1,5 @@ +/ { + /delete-node/ cv-emmc@4300000; + /delete-node/ cv-spinf@4060000; +}; + diff --git a/sys/contrib/device-tree/src/riscv/sophgo/cv181x_base.dtsi b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_base.dtsi new file mode 100644 index 000000000000..13747090dfa6 --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_base.dtsi @@ -0,0 +1,932 @@ + +/ { + compatible = "cvitek,cv181x"; + + #size-cells = <0x2>; + #address-cells = <0x2>; + + top_misc:top_misc_ctrl@3000000 { + compatible = "syscon"; + reg = <0x0 0x03000000 0x0 0x8000>; + }; + + clk_rst: clk-reset-controller { + #reset-cells = <1>; + compatible = "cvitek,clk-reset"; + reg = <0x0 0x03002000 0x0 0x8>; + }; + + osc: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + clock-output-names = "osc"; + }; + + clk: clock-controller { + compatible = "cvitek,cv181x-clk"; + reg = <0x0 0x03002000 0x0 0x1000>; + clocks = <&osc>; + #clock-cells = <1>; + }; + + rst: reset-controller { + #reset-cells = <1>; + compatible = "cvitek,reset"; + reg = <0x0 0x03003000 0x0 0x10>; + }; + + restart: restart-controller { + compatible = "cvitek,restart"; + reg = <0x0 0x05025000 0x0 0x2000>; + }; + + tpu { + compatible = "cvitek,tpu"; + reg-names = "tdma", "tiu"; + reg = <0x0 0x0C100000 0x0 0x1000>, + <0x0 0x0C101000 0x0 0x1000>; + clocks = <&clk CV181X_CLK_TPU>, <&clk CV181X_CLK_TPU_FAB>; + clock-names = "clk_tpu_axi", "clk_tpu_fab"; + resets = <&rst RST_TDMA>, <&rst RST_TPU>, <&rst RST_TPUSYS>; + reset-names = "res_tdma", "res_tpu", "res_tpusys"; + }; + + mon { + compatible = "cvitek,mon"; + reg-names = "pcmon", "ddr_ctrl", "ddr_phyd", "ddr_aximon", "ddr_top"; + reg = <0x0 0x01040000 0x0 0x1000>, + <0x0 0x08004000 0x0 0x1000>, + <0x0 0x08006000 0x0 0x1000>, + <0x0 0x08008000 0x0 0x1000>, + <0x0 0x0800A000 0x0 0x1000>; + }; + + wiegand0 { + compatible = "cvitek,wiegand"; + reg-names = "wiegand"; + reg = <0x0 0x03030000 0x0 0x1000>; + clocks = <&clk CV181X_CLK_WGN>, <&clk CV181X_CLK_WGN0>; + clock-names = "clk_wgn", "clk_wgn1"; + resets = <&rst RST_WGN0>; + reset-names = "res_wgn"; + }; + + wiegand1 { + compatible = "cvitek,wiegand"; + reg-names = "wiegand"; + reg = <0x0 0x03031000 0x0 0x1000>; + clocks = <&clk CV181X_CLK_WGN>, <&clk CV181X_CLK_WGN1>; + clock-names = "clk_wgn", "clk_wgn1"; + resets = <&rst RST_WGN1>; + reset-names = "res_wgn"; + }; + + wiegand2 { + compatible = "cvitek,wiegand"; + reg-names = "wiegand"; + reg = <0x0 0x03032000 0x0 0x1000>; + clocks = <&clk CV181X_CLK_WGN>, <&clk CV181X_CLK_WGN2>; + clock-names = "clk_wgn", "clk_wgn1"; + resets = <&rst RST_WGN2>; + reset-names = "res_wgn"; + }; + + saradc { + compatible = "cvitek,saradc"; + reg-names = "top_domain_saradc", "rtc_domain_saradc"; + reg = <0x0 0x030F0000 0x0 0x1000>, <0x0 0x0502c000 0x0 0x1000>; + clocks = <&clk CV181X_CLK_SARADC>; + clock-names = "clk_saradc"; + resets = <&rst RST_SARADC>; + reset-names = "res_saradc"; + }; + + rtc { + compatible = "cvitek,rtc"; + reg = <0x0 0x05026000 0x0 0x1000>,<0x0 0x05025000 0x0 0x1000>; + clocks = <&clk CV181X_CLK_RTC_25M>; + clock-names = "clk_rtc"; + }; + + cvitek-ion { + compatible = "cvitek,cvitek-ion"; + + heap_carveout@0 { + compatible = "cvitek,carveout"; + memory-region = <&ion_reserved>; + }; + }; + + sysdma_remap { + compatible = "cvitek,sysdma_remap"; + reg = <0x0 0x03000154 0x0 0x10>; + ch-remap = <CVI_I2S0_RX CVI_I2S2_TX CVI_I2S1_RX CVI_I2S1_TX + CVI_SPI_NAND CVI_SPI_NAND CVI_I2S2_RX CVI_I2S3_TX>; + int_mux_base = <0x03000298>; + }; + + dmac: dma@0x4330000 { + compatible = "snps,dmac-bm"; + reg = <0x0 0x04330000 0x0 0x1000>; + clock-names = "clk_sdma_axi"; + clocks = <&clk CV181X_CLK_SDMA_AXI>; + + dma-channels = /bits/ 8 <8>; + #dma-cells = <3>; + dma-requests = /bits/ 8 <16>; + chan_allocation_order = /bits/ 8 <0>; + chan_priority = /bits/ 8 <1>; + block_size = <1024>; + dma-masters = /bits/ 8 <2>; + data-width = <4 4>; /* bytes */ + axi_tr_width = <4>; /* bytes */ + block-ts = <15>; + }; + + + watchdog0: cv-wd@0x3010000 { + compatible = "snps,dw-wdt"; + reg = <0x0 0x03010000 0x0 0x1000>; + resets = <&rst RST_WDT>; + clocks = <&pclk>; + }; + + pwm0: pwm@3060000 { + compatible = "cvitek,cvi-pwm"; + reg = <0x0 0x3060000 0x0 0x1000>; + clocks = <&clk CV181X_CLK_PWM>; + #pwm-cells = <1>; + }; + + pwm1: pwm@3061000 { + compatible = "cvitek,cvi-pwm"; + reg = <0x0 0x3061000 0x0 0x1000>; + clocks = <&clk CV181X_CLK_PWM>; + #pwm-cells = <2>; + }; + + pwm2: pwm@3062000 { + compatible = "cvitek,cvi-pwm"; + reg = <0x0 0x3062000 0x0 0x1000>; + clocks = <&clk CV181X_CLK_PWM>; + #pwm-cells = <3>; + }; + + pwm3: pwm@3063000 { + compatible = "cvitek,cvi-pwm"; + reg = <0x0 0x3063000 0x0 0x1000>; + clocks = <&clk CV181X_CLK_PWM>; + #pwm-cells = <4>; + }; + + pclk: pclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + }; + + spinand:cv-spinf@4060000 { + compatible = "cvitek,cv1835-spinf"; + reg = <0x0 0x4060000 0x0 0x1000>; + reg-names = "core_mem"; + bus-width = <4>; + dmas = <&dmac 4 1 1 + &dmac 5 1 1>; + dma-names = "rx","tx"; + }; + + spif:cvi-spif@10000000 { + compatible = "cvitek,cvi-spif"; + bus-num = <0>; + reg = <0x0 0x10000000 0x0 0x10000000>; + reg-names = "spif"; + sck-div = <3>; + sck_mhz = <300>; + spi-max-frequency = <75000000>; + spiflash { + compatible = "jedec,spi-nor"; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + }; + }; + + spi0:spi0@04180000 { + compatible = "snps,dw-apb-ssi"; + reg = <0x0 0x04180000 0x0 0x10000>; + clocks = <&clk CV181X_CLK_SPI>; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi1:spi1@04190000 { + compatible = "snps,dw-apb-ssi"; + reg = <0x0 0x04190000 0x0 0x10000>; + clocks = <&clk CV181X_CLK_SPI>; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi2:spi2@041A0000 { + compatible = "snps,dw-apb-ssi"; + reg = <0x0 0x041A0000 0x0 0x10000>; + clocks = <&clk CV181X_CLK_SPI>; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi3:spi3@041B0000 { + compatible = "snps,dw-apb-ssi"; + reg = <0x0 0x041B0000 0x0 0x10000>; + clocks = <&clk CV181X_CLK_SPI>; + #address-cells = <1>; + #size-cells = <0>; +#if 0 + dmas = <&dmac 2 1 1 + &dmac 3 1 1>; + dma-names = "rx", "tx"; + capability = "txrx"; +#endif + }; + + uart0: serial@04140000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x04140000 0x0 0x1000>; + clock-frequency = <25000000>; + reg-shift = <2>; + reg-io-width = <4>; + status = "okay"; + }; + + uart1: serial@04150000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x04150000 0x0 0x1000>; + clock-frequency = <25000000>; + reg-shift = <2>; + reg-io-width = <4>; + status = "disabled"; + }; + + uart2: serial@04160000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x04160000 0x0 0x1000>; + clock-frequency = <25000000>; + reg-shift = <2>; + reg-io-width = <4>; + status = "disabled"; + }; + + uart3: serial@04170000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x04170000 0x0 0x1000>; + clock-frequency = <25000000>; + reg-shift = <2>; + reg-io-width = <4>; + status = "disabled"; + }; + + uart4: serial@041C0000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x041C0000 0x0 0x1000>; + clock-frequency = <25000000>; + reg-shift = <2>; + reg-io-width = <4>; + status = "disabled"; + }; + + gpio0: gpio@03020000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x0 0x03020000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + porta: gpio-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + bank-name = "porta"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <32>; + reg = <0>; + }; + }; + + gpio1: gpio@03021000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x0 0x03021000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + portb: gpio-controller@1 { + compatible = "snps,dw-apb-gpio-port"; + bank-name = "portb"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <32>; + reg = <0>; + }; + }; + + gpio2: gpio@03022000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x0 0x03022000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + portc: gpio-controller@2 { + compatible = "snps,dw-apb-gpio-port"; + bank-name = "portc"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <32>; + reg = <0>; + }; + }; + + gpio3: gpio@03023000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x0 0x03023000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + portd: gpio-controller@3 { + compatible = "snps,dw-apb-gpio-port"; + bank-name = "portd"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <32>; + reg = <0>; + }; + }; + + gpio4: gpio@05021000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x0 0x05021000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + porte: gpio-controller@4 { + compatible = "snps,dw-apb-gpio-port"; + bank-name = "porte"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <32>; + reg = <0>; + }; + }; + + i2c0: i2c@04000000 { + compatible = "snps,designware-i2c"; + clocks = <&clk CV181X_CLK_I2C>; + reg = <0x0 0x04000000 0x0 0x1000>; + clock-frequency = <400000>; + + #size-cells = <0x0>; + #address-cells = <0x1>; + resets = <&rst RST_I2C0>; + reset-names = "i2c0"; + }; + + i2c1: i2c@04010000 { + compatible = "snps,designware-i2c"; + clocks = <&clk CV181X_CLK_I2C>; + reg = <0x0 0x04010000 0x0 0x1000>; + clock-frequency = <400000>; + + #size-cells = <0x0>; + #address-cells = <0x1>; + resets = <&rst RST_I2C1>; + reset-names = "i2c1"; + }; + + i2c2: i2c@04020000 { + compatible = "snps,designware-i2c"; + clocks = <&clk CV181X_CLK_I2C>; + reg = <0x0 0x04020000 0x0 0x1000>; + clock-frequency = <100000>; + resets = <&rst RST_I2C2>; + reset-names = "i2c2"; + }; + + i2c3: i2c@04030000 { + compatible = "snps,designware-i2c"; + clocks = <&clk CV181X_CLK_I2C>; + reg = <0x0 0x04030000 0x0 0x1000>; + clock-frequency = <400000>; + resets = <&rst RST_I2C3>; + reset-names = "i2c3"; + }; + + i2c4: i2c@04040000 { + compatible = "snps,designware-i2c"; + clocks = <&clk CV181X_CLK_I2C>; + reg = <0x0 0x04040000 0x0 0x1000>; + clock-frequency = <400000>; + resets = <&rst RST_I2C4>; + reset-names = "i2c4"; + }; + + eth_csrclk: eth_csrclk { + clock-output-names = "eth_csrclk"; + clock-frequency = <250000000>; + #clock-cells = <0x0>; + compatible = "fixed-clock"; + }; + + eth_ptpclk: eth_ptpclk { + clock-output-names = "eth_ptpclk"; + clock-frequency = <50000000>; + #clock-cells = <0x0>; + compatible = "fixed-clock"; + }; + + stmmac_axi_setup: stmmac-axi-config { + snps,wr_osr_lmt = <1>; + snps,rd_osr_lmt = <2>; + snps,blen = <4 8 16 0 0 0 0>; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <1>; + queue0 {}; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <1>; + queue0 {}; + }; + + ethernet0: ethernet@4070000 { + compatible = "cvitek,ethernet"; + reg = <0x0 0x04070000 0x0 0x10000>; + clock-names = "stmmaceth", "ptp_ref"; + clocks = <ð_csrclk>, <ð_ptpclk>; + //phy-reset-gpios = <&porta 26 0>; + + tx-fifo-depth = <8192>; + rx-fifo-depth = <8192>; + /* no hash filter and perfect filter support */ + snps,multicast-filter-bins = <0>; + snps,perfect-filter-entries = <1>; + + snps,txpbl = <8>; + snps,rxpbl = <8>; + snps,aal; + + snps,axi-config = <&stmmac_axi_setup>; + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + + phy-mode = "rmii"; + }; + + emmc:cv-emmc@4300000 { + compatible = "cvitek,cv181x-emmc"; + reg = <0x0 0x4300000 0x0 0x1000>; + reg-names = "core_mem"; + bus-width = <4>; + non-removable; + no-sdio; + no-sd; + src-frequency = <375000000>; + min-frequency = <400000>; + max-frequency = <200000000>; + 64_addressing; + reset_tx_rx_phy; + pll_index = <0x5>; + pll_reg = <0x3002064>; + }; + + sd:cv-sd@4310000 { + compatible = "cvitek,cv181x-sd"; + reg = <0x0 0x4310000 0x0 0x1000>; + reg-names = "core_mem"; + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + no-sdio; + no-mmc; + /*no-1-8-v;*/ + src-frequency = <375000000>; + min-frequency = <400000>; + max-frequency = <200000000>; + 64_addressing; + reset_tx_rx_phy; + reset-names = "sdhci"; + pll_index = <0x6>; + pll_reg = <0x3002070>; + cvi-cd-gpios = <&porta 13 GPIO_ACTIVE_LOW>; + }; + + wifisd:wifi-sd@4320000 { + compatible = "cvitek,cv181x-sdio"; + bus-width = <4>; + reg = <0x0 0x4320000 0x0 0x1000>; + reg_names = "core_mem"; + src-frequency = <375000000>; + min-frequency = <400000>; + max-frequency = <50000000>; + 64_addressing; + reset_tx_rx_phy; + non-removable; + pll_index = <0x7>; + pll_reg = <0x300207C>; + no-mmc; + no-sd; + status = "disabled"; + }; + + i2s_mclk: i2s_mclk { + clock-output-names = "i2s_mclk"; + clock-frequency = <24576000>; + #clock-cells = <0x0>; + compatible = "fixed-clock"; + }; + + i2s_subsys { + compatible = "cvitek,i2s_tdm_subsys"; + reg = <0x0 0x04108000 0x0 0x100>; + clocks = <&i2s_mclk>, <&clk CV181X_CLK_A0PLL>, + <&clk CV181X_CLK_SDMA_AUD0>, <&clk CV181X_CLK_SDMA_AUD1>, + <&clk CV181X_CLK_SDMA_AUD2>, <&clk CV181X_CLK_SDMA_AUD3>; + clock-names = "i2sclk", "clk_a0pll", + "clk_sdma_aud0", "clk_sdma_aud1", + "clk_sdma_aud2", "clk_sdma_aud3"; + master_base = <0x04110000>; /* I2S1 is master, only useful while using multi I2S IPs work on same IO */ + }; + + i2s0: i2s@04100000 { + compatible = "cvitek,cv1835-i2s"; + reg = <0x0 0x04100000 0x0 0x2000>; + clocks = <&i2s_mclk 0>; + clock-names = "i2sclk"; + dev-id = <0>; + #sound-dai-cells = <0>; + dmas = <&dmac 0 1 1>; /* read channel */ + dma-names = "rx"; + capability = "rx"; /* I2S0 connect to internal ADC as RX */ + mclk_out = "false"; + }; + + i2s1: i2s@04110000 { + compatible = "cvitek,cv1835-i2s"; + reg = <0x0 0x04110000 0x0 0x2000>; + clocks = <&i2s_mclk 0>; + clock-names = "i2sclk"; + dev-id = <1>; + #sound-dai-cells = <0>; + dmas = <&dmac 2 1 1 /* read channel */ + &dmac 3 1 1>; /* write channel */ + dma-names = "rx", "tx"; + capability = "txrx"; + mclk_out = "false"; + }; + + i2s2: i2s@04120000 { + compatible = "cvitek,cv1835-i2s"; + reg = <0x0 0x04120000 0x0 0x2000>; + clocks = <&i2s_mclk 0>; + clock-names = "i2sclk"; + dev-id = <2>; + #sound-dai-cells = <0>; + dmas = <&dmac 6 1 1 /* read channel */ + &dmac 1 1 1>; /* write channel */ + dma-names = "rx", "tx"; + capability = "txrx"; + mclk_out = "false"; + + }; + + i2s3: i2s@04130000 { + compatible = "cvitek,cv1835-i2s"; + reg = <0x0 0x04130000 0x0 0x2000>; + clocks = <&i2s_mclk 0>; + clock-names = "i2sclk"; + dev-id = <3>; + #sound-dai-cells = <0>; + dmas = <&dmac 7 1 1>; /* write channel */ + dma-names = "tx"; + capability = "tx"; /* I2S3 connect to internal DAC as TX */ + mclk_out = "true"; + }; + + adc: adc@0300A100 { + compatible = "cvitek,cv182xaadc"; + reg = <0x0 0x0300A100 0x0 0x100>; + clocks = <&i2s_mclk 0>; + clock-names = "i2sclk"; + clk_source = <0x04130000>; /* MCLK source is I2S3 */ + }; + + dac: dac@0300A000 { + compatible = "cvitek,cv182xadac"; + reg = <0x0 0x0300A000 0x0 0x100>; + clocks = <&i2s_mclk 0>; + clock-names = "i2sclk"; + }; + + pdm: pdm@0x041D0C00 { + compatible = "cvitek,cv1835pdm"; + reg = <0x0 0x041D0C00 0x0 0x100>; + clocks = <&i2s_mclk 0>; + clock-names = "i2sclk"; + }; + + sound_adc { + compatible = "cvitek,cv182xa-adc"; + cvi,model = "CV182XA"; + cvi,card_name = "cv182xa_adc"; + }; + + sound_dac { + compatible = "cvitek,cv182xa-dac"; + cvi,model = "CV182XA"; + cvi,card_name = "cv182xa_dac"; + }; + + sound_PDM { + compatible = "cvitek,cv182x-pdm"; + cvi,model = "CV182X"; + cvi,card_name = "cv182x_internal_PDM"; + }; + + wifi_pin { + compatible = "cvitek,wifi-pin"; + poweron-gpio = <&porta 18 GPIO_ACTIVE_HIGH>; + wakeup-gpio = <&porte 7 GPIO_ACTIVE_HIGH>; + }; + + bt_pin { + compatible = "cvitek,bt-pin"; + poweron-gpio = <&porte 9 GPIO_ACTIVE_HIGH>; + }; + + mipi_rx: cif { + compatible = "cvitek,cif"; + reg = <0x0 0x0a0c2000 0x0 0x2000>, <0x0 0x0a0d0000 0x0 0x1000>, + <0x0 0x0a0c4000 0x0 0x2000>, <0x0 0x0a0c6000 0x0 0x2000>, + <0x0 0x03001c30 0x0 0x30>; + reg-names = "csi_mac0", "csi_wrap0", "csi_mac1", "csi_mac2", "pad_ctrl"; + snsr-reset = <&porta 2 GPIO_ACTIVE_LOW>, <&porta 2 GPIO_ACTIVE_LOW>, <&porta 2 GPIO_ACTIVE_LOW>; + resets = <&rst RST_CSIPHY0>, <&rst RST_CSIPHY1>, + <&rst RST_CSIPHY0RST_APB>, <&rst RST_CSIPHY1RST_APB>; + reset-names = "phy0", "phy1", "phy-apb0", "phy-apb1"; + clocks = <&clk CV181X_CLK_CAM0>, <&clk CV181X_CLK_CAM1>, <&clk CV181X_CLK_SRC_VIP_SYS_2>, + <&clk CV181X_CLK_MIPIMPLL>, <&clk CV181X_CLK_DISPPLL>, <&clk CV181X_CLK_FPLL>; + clock-names = "clk_cam0", "clk_cam1", "clk_sys_2", + "clk_mipimpll", "clk_disppll", "clk_fpll"; + }; + + mipi_tx: mipi_tx { + compatible = "cvitek,mipi_tx"; + reset-gpio = <&porte 2 GPIO_ACTIVE_LOW>; + pwm-gpio = <&porte 0 GPIO_ACTIVE_HIGH>; + power-ct-gpio = <&porte 1 GPIO_ACTIVE_HIGH>; + clocks = <&clk CV181X_CLK_DISP_VIP>, <&clk CV181X_CLK_DSI_MAC_VIP>; + clock-names = "clk_disp", "clk_dsi"; + }; + + sys { + compatible = "cvitek,sys"; + }; + + base { + compatible = "cvitek,base"; + reg = <0x0 0x0a0c8000 0x0 0x20>; + reg-names = "vip_sys"; + }; + + vi { + compatible = "cvitek,vi"; + reg = <0x0 0x0a000000 0x0 0x80000>; + clocks = <&clk CV181X_CLK_SRC_VIP_SYS_0>, <&clk CV181X_CLK_SRC_VIP_SYS_1>, + <&clk CV181X_CLK_SRC_VIP_SYS_2>, <&clk CV181X_CLK_SRC_VIP_SYS_3>, + <&clk CV181X_CLK_AXI_VIP>, <&clk CV181X_CLK_CSI_BE_VIP>, + <&clk CV181X_CLK_RAW_VIP>, <&clk CV181X_CLK_ISP_TOP_VIP>, + <&clk CV181X_CLK_CSI_MAC0_VIP>, <&clk CV181X_CLK_CSI_MAC1_VIP>, + <&clk CV181X_CLK_CSI_MAC2_VIP>; + clock-names = "clk_sys_0", "clk_sys_1", "clk_sys_2", "clk_sys_3", + "clk_axi", "clk_csi_be", "clk_raw", "clk_isp_top", + "clk_csi_mac0", "clk_csi_mac1", "clk_csi_mac2"; + clock-freq-vip-sys1 = <300000000>; + }; + + vpss { + compatible = "cvitek,vpss"; + reg = <0x0 0x0a080000 0x0 0x10000>, <0x0 0x0a0d1000 0x0 0x100>; + reg-names = "sc"; + clocks = <&clk CV181X_CLK_SRC_VIP_SYS_0>, <&clk CV181X_CLK_SRC_VIP_SYS_1>, + <&clk CV181X_CLK_SRC_VIP_SYS_2>, <&clk CV181X_CLK_IMG_D_VIP>, + <&clk CV181X_CLK_IMG_V_VIP>, <&clk CV181X_CLK_SC_TOP_VIP>, + <&clk CV181X_CLK_SC_D_VIP>, <&clk CV181X_CLK_SC_V1_VIP>, + <&clk CV181X_CLK_SC_V2_VIP>, <&clk CV181X_CLK_SC_V3_VIP>; + clock-names = "clk_sys_0", "clk_sys_1", + "clk_sys_2", "clk_img_d", + "clk_img_v", "clk_sc_top", + "clk_sc_d", "clk_sc_v1", + "clk_sc_v2", "clk_sc_v3"; + clock-freq-vip-sys1 = <300000000>; + }; + + ive { + compatible = "cvitek,ive"; + reg = <0x0 0x0A0A0000 0x0 0x3100>; + reg-names = "ive_base"; + }; + + vo:vo { + compatible = "cvitek,vo"; + reg = <0x0 0x0a080000 0x0 0x10000>, <0x0 0x0a0c8000 0x0 0xa0>, <0x0 0x0a0d1000 0x0 0x100>; + reg-names = "sc", "vip_sys", "dphy"; + clocks = <&clk CV181X_CLK_DISP_VIP>, <&clk CV181X_CLK_DSI_MAC_VIP>, <&clk CV181X_CLK_BT_VIP>; + reset-gpio = <&porte 2 GPIO_ACTIVE_LOW>; + pwm-gpio = <&porte 0 GPIO_ACTIVE_HIGH>; + power-ct-gpio = <&porte 1 GPIO_ACTIVE_HIGH>; + clock-names = "clk_disp", "clk_dsi", "clk_bt"; + }; + +#if (CVIMMAP_FRAMEBUFFER_SIZE > 0) + reserved-memory { + #size-cells = <0x2>; + #address-cells = <0x2>; + ranges; + + fb_reserved: cvifb { + alloc-ranges = <0x0 CVIMMAP_FRAMEBUFFER_ADDR 0 CVIMMAP_FRAMEBUFFER_SIZE>; + size = <0x0 CVIMMAP_FRAMEBUFFER_SIZE>; + }; + }; + + cvifb { + compatible = "cvitek,fb"; + memory-region = <&fb_reserved>; + reg = <0x0 0x0a088000 0x0 0x1000>; + reg-names = "disp"; + }; +#endif + dwa { + compatible = "cvitek,dwa"; + reg = <0x0 0x0a0c0000 0x0 0x1000>; + reg-names = "dwa"; + clocks = <&clk CV181X_CLK_SRC_VIP_SYS_0>, <&clk CV181X_CLK_SRC_VIP_SYS_1>, + <&clk CV181X_CLK_SRC_VIP_SYS_2>, <&clk CV181X_CLK_SRC_VIP_SYS_3>, + <&clk CV181X_CLK_SRC_VIP_SYS_4>, <&clk CV181X_CLK_DWA_VIP>; + clock-names = "clk_sys_0", "clk_sys_1", + "clk_sys_2", "clk_sys_3", + "clk_sys_4", "clk_dwa"; + clock-freq-vip-sys1 = <300000000>; + }; + + rgn { + compatible = "cvitek,rgn"; + }; + + vcodec { + compatible = "cvitek,asic-vcodec"; + reg = <0x0 0x0B020000 0x0 0x10000>,<0x0 0x0B010000 0x0 0x10000>,<0x0 0x0B030000 0x0 0x100>, + <0x0 0x0B058000 0x0 0x100>,<0x0 0x0B050000 0x0 0x400>; + reg-names = "h265","h264","vc_ctrl","vc_sbm","vc_addr_remap"; + clocks = <&clk CV181X_CLK_AXI_VIDEO_CODEC>, + <&clk CV181X_CLK_H264C>, <&clk CV181X_CLK_APB_H264C>, + <&clk CV181X_CLK_H265C>, <&clk CV181X_CLK_APB_H265C>, + <&clk CV181X_CLK_VC_SRC0>, <&clk CV181X_CLK_VC_SRC1>, + <&clk CV181X_CLK_VC_SRC2>, <&clk CV181X_CLK_CFG_REG_VC>; + clock-names = "clk_axi_video_codec", + "clk_h264c", "clk_apb_h264c", + "clk_h265c", "clk_apb_h265c", + "clk_vc_src0", "clk_vc_src1", + "clk_vc_src2", "clk_cfg_reg_vc"; + }; + + jpu { + compatible = "cvitek,asic-jpeg"; + reg = <0x0 0x0B000000 0x0 0x300>,<0x0 0x0B030000 0x0 0x100>,<0x0 0x0B058000 0x0 0x100>; + reg-names = "jpeg","vc_ctrl","vc_sbm"; + clocks = <&clk CV181X_CLK_AXI_VIDEO_CODEC>, + <&clk CV181X_CLK_JPEG>, <&clk CV181X_CLK_APB_JPEG>, + <&clk CV181X_CLK_VC_SRC0>, <&clk CV181X_CLK_VC_SRC1>, + <&clk CV181X_CLK_VC_SRC2>, <&clk CV181X_CLK_CFG_REG_VC>; + clock-names = "clk_axi_video_codec", + "clk_jpeg", "clk_apb_jpeg", + "clk_vc_src0", "clk_vc_src1", + "clk_vc_src2", "clk_cfg_reg_vc"; + resets = <&rst RST_JPEG>; + reset-names = "jpeg"; + }; + + cvi_vc_drv { + compatible = "cvitek,cvi_vc_drv"; + reg = <0x0 0x0B030000 0x0 0x100>,<0x0 0x0B058000 0x0 0x100>,<0x0 0x0B050000 0x0 0x400>; + reg-names = "vc_ctrl","vc_sbm","vc_addr_remap"; + }; + + rtos_cmdqu { + compatible = "cvitek,rtos_cmdqu"; + reg = <0x0 0x01900000 0x0 0x1000>; + reg-names = "mailbox"; + }; + + usb: usb@04340000 { + compatible = "cvitek,cv182x-usb"; + reg = <0x0 0x04340000 0x0 0x10000>, + <0x0 0x03006000 0x0 0x58>; //USB 2.0 PHY + dr_mode = "otg"; + g-use-dma; + g-rx-fifo-size = <536>; + g-np-tx-fifo-size = <32>; + g-tx-fifo-size = <768 512 512 384 128 128>; + clocks = <&clk CV181X_CLK_AXI4_USB>, + <&clk CV181X_CLK_APB_USB>, + <&clk CV181X_CLK_125M_USB>, + <&clk CV181X_CLK_33K_USB>, + <&clk CV181X_CLK_12M_USB>; + clock-names = "clk_axi", "clk_apb", "clk_125m", "clk_33k", "clk_12m"; + vbus-gpio = <&portb 6 0>; + status = "okay"; + }; + + thermal:thermal@030E0000 { + compatible = "cvitek,cv181x-thermal"; + reg = <0x0 0x030E0000 0x0 0x10000>; + clocks = <&clk CV181X_CLK_TEMPSEN>; + clock-names = "clk_tempsen"; + reset-names = "tempsen"; + #thermal-sensor-cells = <1>; + }; + + thermal-zones { + soc_thermal_0: soc_thermal_0 { + polling-delay-passive = <1000>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + thermal-sensors = <&thermal 0>; + + trips { + soc_thermal_trip_0: soc_thermal_trip_0 { + temperature = <100000>; /* millicelsius */ + hysteresis = <5000>; /* millicelsius */ + type = "passive"; + }; + + soc_thermal_trip_1: soc_thermal_trip_1 { + temperature = <110000>; /* millicelsius */ + hysteresis = <5000>; /* millicelsius */ + type = "passive"; + }; + + soc_thermal_crtical_0: soc_thermal_crtical_0 { + temperature = <130000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + }; + }; + }; + }; + +#if 0 + cvipctrl: pinctrl@3001000 { + compatible = "cvitek,pinctrl-cv182x"; + reg = <0 0x03001000 0 0x1000>; + }; +#endif + + cviaudio_core { + compatible = "cvitek,audio"; + }; + + audio_clock: audio_clock { + compatible = "fixed-clock"; + #clock-cells = <0>; +#if 0 + clock-frequency = <12288000>; +#else + clock-frequency = <24576000>; +#endif + }; + + + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + //spi0 = &spi0; + //spi1 = &spi1; + //spi2 = &spi2; + //spi3 = &spi3; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + ethernet0 = ðernet0; + }; + + chosen { + stdout-path = "serial0"; + }; +}; + diff --git a/sys/contrib/device-tree/src/riscv/sophgo/cv181x_base_arm.dtsi b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_base_arm.dtsi new file mode 100644 index 000000000000..2993b9da32b2 --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_base_arm.dtsi @@ -0,0 +1,320 @@ +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/reset/cv181x-resets.h> +#include <dt-bindings/clock/cv181x-clock.h> +#include <dt-bindings/thermal/thermal.h> +#include <dt-bindings/dma/cv181x-dmamap.h> +#include "cv181x_base.dtsi" + +/ { + model = "Cvitek. CV181X ASIC. ARM."; + interrupt-parent = <&gic>; + + #size-cells = <0x2>; + #address-cells = <0x2>; + + gic: interrupt-controller { + compatible = "arm,cortex-a15-gic"; + ranges; + #size-cells = <0x2>; + #address-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x3>; + reg = <0x0 0x01F01000 0x0 0x1000>, + <0x0 0x01F02000 0x0 0x2000>; + }; + + pmu_a53 { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&A53_0>; + }; + + psci { + migrate = <0xc4000005>; + cpu_on = <0xc4000003>; + cpu_off = <0x84000002>; + cpu_suspend = <0xc4000001>; + sys_poweroff = <0x84000008>; + sys_reset = <0x84000009>; + method = "smc"; + compatible = "arm,psci-0.2", "arm,psci"; + }; + + cpus { + #size-cells = <0x0>; + #address-cells = <0x1>; + + A53_0: cpu@0 { + reg = <0x0>; + enable-method = "psci"; + compatible = "arm,cortex-a53"; + device_type = "cpu"; + next-level-cache = <&CA53_L2>; + }; + + CA53_L2: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + always-on; + clock-frequency = <25000000>; + compatible = "arm,armv8-timer"; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + + cv181x_cooling:cv181x_cooling { + clocks = <&clk CV181X_CLK_A53>, <&clk CV181X_CLK_TPU>; + clock-names = "clk_cpu", "clk_tpu_axi"; + dev-freqs = <800000000 500000000>, + <400000000 375000000>, + <400000000 300000000>; + compatible = "cvitek,cv181x-cooling"; + #cooling-cells = <2>; + }; + + tpu { + interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 60 IRQ_TYPE_EDGE_RISING>; + }; + + mon { + interrupts = <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>; + }; + + wiegand0 { + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + }; + + wiegand1 { + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + }; + + wiegand2 { + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + }; + + saradc { + interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>; + }; + + rtc { + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; + }; + + sysdma_remap { + int_mux = <0x1FF>; /* enable bit [0..8] for CPU0(CA53) */ + }; + + dmac: dma@0x4330000 { + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + }; + +#if 0 + watchdog0: cv-wd@0x3010000 { + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + }; +#endif + trng: dw_trng@0x02070000 { + reg = <0x0 0x02070000 0x0 0x1000>; + compatible = "snps,dw-trng"; + }; + + spinand:cv-spinf@4060000 { + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; + }; + + spif:cvi-spif@10000000 { + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + }; + + spi0:spi0@04180000 { + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + }; + + spi1:spi1@04190000 { + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + }; + + spi2:spi2@041A0000 { + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + }; + + spi3:spi3@041B0000 { + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + }; + + uart0: serial@04140000 { + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; + }; + + uart1: serial@04150000 { + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + }; + + uart2: serial@04160000 { + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + }; + + uart3: serial@04170000 { + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + }; + + uart4: serial@041C0000 { + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpio0: gpio@03020000 { + porta: gpio-controller@0 { + interrupt-controller; + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + gpio1: gpio@03021000 { + portb: gpio-controller@1 { + interrupt-controller; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + gpio2: gpio@03022000 { + portc: gpio-controller@2 { + interrupt-controller; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + gpio3: gpio@03023000 { + portd: gpio-controller@3 { + interrupt-controller; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + gpio4: gpio@05021000 { + porte: gpio-controller@4 { + interrupt-controller; + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + i2c0: i2c@04000000 { + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + }; + + i2c1: i2c@04010000 { + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + }; + + i2c2: i2c@04020000 { + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + }; + + i2c3: i2c@04030000 { + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + }; + + i2c4: i2c@04040000 { + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + }; + + ethernet0: ethernet@4070000 { + interrupt-names = "macirq"; + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + }; + + emmc:cv-emmc@4300000 { + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; + }; + + sd:cv-sd@4310000 { + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + }; + + i2s0: i2s@04100000 { + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + }; + + i2s1: i2s@04110000 { + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + }; + + i2s2: i2s@04120000 { + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; + }; + + i2s3: i2s@04130000 { + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; + }; + + wifisd:wifi-sd@4320000 { + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; + }; + + mipi_rx: cif { + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "csi0", "csi1"; + }; + + vi { + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "isp"; + }; + + ive { + interrupt-names = "ive_irq"; + interrupts = <GIC_SPI 81 IRQ_TYPE_EDGE_RISING>; + }; + + vpss { + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "sc"; + }; + + dwa { + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwa"; + }; + + vcodec { + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "h265","h264","sbm"; + }; + + jpu { + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "jpeg"; + }; + + rtos_cmdqu { + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mailbox"; + }; + + usb: usb@04340000 { + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + }; + + thermal:thermal@030E0000 { + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tempsen"; + }; + +}; diff --git a/sys/contrib/device-tree/src/riscv/sophgo/cv181x_base_riscv.dtsi b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_base_riscv.dtsi new file mode 100644 index 000000000000..f21444c72b1a --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_base_riscv.dtsi @@ -0,0 +1,378 @@ +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/reset/cv181x-resets.h> +#include <dt-bindings/clock/cv181x-clock.h> +#include <dt-bindings/thermal/thermal.h> +#include <dt-bindings/dma/cv181x-dmamap.h> +#include "cv181x_base.dtsi" + +/ { + model = "Cvitek. CV181X ASIC. C906."; + + #size-cells = <0x2>; + #address-cells = <0x2>; + + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; + timebase-frequency = <25000000>; + u-boot,dm-spl; + cpu-map { + u-boot,dm-spl; + cluster0 { + + core0 { + cpu = <0x01>; + }; + }; + }; + + cpu0: cpu@0 { + u-boot,dm-spl; + device_type = "cpu"; + reg = <0x00>; + status = "okay"; + compatible = "riscv"; + riscv,isa = "rv64imafdvcsu"; + mmu-type = "riscv,sv39"; + clock-frequency = <25000000>; + + cpu0_intc: interrupt-controller { + #interrupt-cells = <0x01>; + interrupt-controller; + compatible = "riscv,cpu-intc"; + }; + }; + }; + + soc { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "simple-bus"; + ranges; + + plic0: interrupt-controller@70000000 { + riscv,ndev = <101>; + riscv,max-priority = <0x07>; + reg-names = "control"; + reg = <0x00 0x70000000 0x00 0x4000000>; + interrupts-extended = <&cpu0_intc 0xffffffff &cpu0_intc 0x09>; + interrupt-controller; + compatible = "riscv,plic0"; + #interrupt-cells = <0x02>; + #address-cells = <0x00>; + }; + + clint@74000000 { + interrupts-extended = <&cpu0_intc 0x03 &cpu0_intc 0x07>; + reg = <0x00 0x74000000 0x00 0x10000>; + compatible = "riscv,clint0"; + clint,has-no-64bit-mmio; + }; + + }; + + cv181x_cooling:cv181x_cooling { + clocks = <&clk CV181X_CLK_C906_0>, <&clk CV181X_CLK_TPU>; + clock-names = "clk_cpu", "clk_tpu_axi"; + dev-freqs = <850000000 500000000>, + <425000000 375000000>, + <425000000 300000000>; + compatible = "cvitek,cv181x-cooling"; + #cooling-cells = <2>; + }; + + tpu { + interrupts = <75 IRQ_TYPE_LEVEL_HIGH>, + <76 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tiu_irq", "tdma_irq"; + interrupt-parent = <&plic0>; + }; + + mon { + interrupts = <93 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mon_irq"; + interrupt-parent = <&plic0>; + }; + + wiegand0 { + interrupts = <64 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + wiegand1 { + interrupts = <65 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + wiegand2 { + interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + saradc { + interrupts = <100 IRQ_TYPE_EDGE_RISING>; + interrupt-parent = <&plic0>; + }; + + rtc { + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + sysdma_remap { + int_mux = <0x7FC00>; /* enable bit [10..18] for CPU1(906B) */ + }; + + dmac: dma@0x4330000 { + interrupts = <29 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + watchdog0: cv-wd@0x3010000 { + interrupts = <58 IRQ_TYPE_LEVEL_HIGH>; + }; + trng: dw_trng@0x02070000 { + reg = <0x0 0x02070000 0x0 0x1000>; + compatible = "snps,dw-trng"; + }; + spacc: cvi_spacc@02060000 { + interrupts = <91 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + spinand:cv-spinf@4060000 { + interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + spif:cvi-spif@10000000 { + interrupts = <95 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + spi0:spi0@04180000 { + interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + spi1:spi1@04190000 { + interrupts = <55 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + spi2:spi2@041A0000 { + interrupts = <56 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + spi3:spi3@041B0000 { + interrupts = <57 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + uart0: serial@04140000 { + interrupts = <44 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + uart1: serial@04150000 { + interrupts = <45 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + uart2: serial@04160000 { + interrupts = <46 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + uart3: serial@04170000 { + interrupts = <47 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + uart4: serial@041C0000 { + interrupts = <48 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + gpio0: gpio@03020000 { + porta: gpio-controller@0 { + interrupt-controller; + interrupts = <60 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + }; + + gpio1: gpio@03021000 { + portb: gpio-controller@1 { + interrupt-controller; + interrupts = <61 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + }; + + gpio2: gpio@03022000 { + portc: gpio-controller@2 { + interrupt-controller; + interrupts = <62 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + }; + + gpio3: gpio@03023000 { + portd: gpio-controller@3 { + interrupt-controller; + interrupts = <63 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + }; + + gpio4: gpio@05021000 { + porte: gpio-controller@4 { + interrupt-controller; + interrupts = <70 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + }; + + i2c0: i2c@04000000 { + interrupts = <49 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + i2c1: i2c@04010000 { + interrupts = <50 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + i2c2: i2c@04020000 { + interrupts = <51 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + i2c3: i2c@04030000 { + interrupts = <52 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + i2c4: i2c@04040000 { + interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + ethernet0: ethernet@4070000 { + interrupt-names = "macirq"; + interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + emmc:cv-emmc@4300000 { + interrupts = <34 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + sd:cv-sd@4310000 { + interrupts = <36 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + i2s0: i2s@04100000 { + interrupts = <40 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + i2s1: i2s@04110000 { + interrupts = <41 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + i2s2: i2s@04120000 { + interrupts = <42 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + i2s3: i2s@04130000 { + interrupts = <43 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + vi { + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + interrupt-names = "isp"; + }; + + vcodec { + interrupts = <22 IRQ_TYPE_LEVEL_HIGH>, + <21 IRQ_TYPE_LEVEL_HIGH>, + <23 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "h265","h264","sbm"; + interrupt-parent = <&plic0>; + }; + + jpu { + interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "jpeg"; + interrupt-parent = <&plic0>; + }; + + rtos_cmdqu { + interrupts = <101 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mailbox"; + interrupt-parent = <&plic0>; + }; + + wifisd:wifi-sd@4320000 { + interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + mipi_rx: cif { + interrupts = <26 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "csi0", "csi1"; + interrupt-parent = <&plic0>; + }; + + ive { + interrupt-names = "ive_irq"; + interrupt-parent = <&plic0>; + interrupts = <97 IRQ_TYPE_LEVEL_HIGH>; + }; + + vpss { + interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "sc"; + interrupt-parent = <&plic0>; + }; + + dwa { + interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwa"; + interrupt-parent = <&plic0>; + }; + + usb: usb@04340000 { + interrupts = <30 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic0>; + }; + + thermal:thermal@030E0000 { + interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tempsen"; + }; + + chosen { + opensbi-domain{ + compatible = "opensbi,dimain,config"; + + tdomain: trusted-domain { + compatible = "opensbi,domain,instance"; + possible-harts = <&cpu0>; + system-suspend-allowed; + }; + }; + }; + +}; diff --git a/sys/contrib/device-tree/src/riscv/sophgo/cv181x_default_memmap.dtsi b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_default_memmap.dtsi new file mode 100644 index 000000000000..bb362511c57b --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/cv181x_default_memmap.dtsi @@ -0,0 +1,25 @@ +/ { + memory@80000000 { + device_type = "memory"; + reg = <0x00 CVIMMAP_KERNEL_MEMORY_ADDR 0x00 CVIMMAP_KERNEL_MEMORY_SIZE>; + }; + + + fast_image { + compatible = "cvitek,rtos_image"; + reg-names = "rtos_region"; + reg = <0x0 CVIMMAP_FREERTOS_ADDR 0x0 CVIMMAP_FREERTOS_SIZE>; + ion-size = <CVIMMAP_FREERTOS_RESERVED_ION_SIZE>; //reserved ion size for freertos + }; + + reserved-memory { + #size-cells = <0x2>; + #address-cells = <0x2>; + ranges; + + ion_reserved: ion { + compatible = "ion-region"; + size = <0x0 CVIMMAP_ION_SIZE>; + }; + }; +}; diff --git a/sys/contrib/device-tree/src/riscv/sophgo/sg2000_milkv_duos_glibc_arm64_emmc.dts b/sys/contrib/device-tree/src/riscv/sophgo/sg2000_milkv_duos_glibc_arm64_emmc.dts new file mode 100644 index 000000000000..f06a08c43da6 --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/sg2000_milkv_duos_glibc_arm64_emmc.dts @@ -0,0 +1,108 @@ +/dts-v1/; +#include "cv181x_base_arm.dtsi" +#include "cv181x_asic_bga.dtsi" +#include "cv181x_asic_emmc.dtsi" + +/ { + model = "Milk-V DuoS"; +}; + +&mipi_rx { + snsr-reset = <&porta 2 GPIO_ACTIVE_LOW>, <&porta 2 GPIO_ACTIVE_LOW>, <&porta 2 GPIO_ACTIVE_LOW>; +}; + +&i2c0 { + status = "disabled"; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; + + gt9xx: gt9xx@14 { + compatible = "goodix,gt9xx"; + reg = <0x14>; + goodix,irq-gpio = <&porta 18 0>; + goodix,rst-gpio = <&porta 19 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; +}; + +&spi3 { + status = "okay"; + + spidev@0 { + status = "okay"; + }; +}; + +&dac { + /delete-property/ mute-gpio-l; + /delete-property/ mute-gpio-r; +}; + +/* mipi dsi for u-boot */ +&vo { + compatible = "cvitek,vo"; + reset-gpio = <&porte 2 GPIO_ACTIVE_LOW>; + pwm-gpio = <&porte 0 GPIO_ACTIVE_HIGH>; + power-ct-gpio = <&porte 1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +/* mipi dsi for kernel */ +&mipi_tx { + compatible = "cvitek,mipi_tx"; + reset-gpio = <&porte 2 GPIO_ACTIVE_LOW>; + pwm-gpio = <&porte 0 GPIO_ACTIVE_HIGH>; + power-ct-gpio = <&porte 1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&wifisd { + status = "okay"; + cap-sd-highspeed; + sd-uhs-sdr25; + sd-uhs-ddr50; + sd-uhs-sdr104; + min-frequency = <400000>; + max-frequency = <187500000>; +}; + +&wifi_pin { + status = "okay"; + compatible = "cvitek,wifi-pin"; + poweron-gpio = <&porta 15 GPIO_ACTIVE_HIGH>; + wakeup-gpio = <&porte 7 GPIO_ACTIVE_HIGH>; +}; + +&usb { + vbus-gpio = <&portb 6 0>; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; diff --git a/sys/contrib/device-tree/src/riscv/sophgo/sg2000_milkv_duos_glibc_arm64_sd.dts b/sys/contrib/device-tree/src/riscv/sophgo/sg2000_milkv_duos_glibc_arm64_sd.dts new file mode 100644 index 000000000000..d4decec7a53e --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/sg2000_milkv_duos_glibc_arm64_sd.dts @@ -0,0 +1,112 @@ +/dts-v1/; +#include "cv181x_base_arm.dtsi" +#include "cv181x_asic_bga.dtsi" +#include "cv181x_asic_sd.dtsi" + +/ { + model = "Milk-V DuoS"; + + sd:cv-sd@4310000 { + max-frequency = <10000000>; + }; +}; + +&mipi_rx { + snsr-reset = <&porta 2 GPIO_ACTIVE_LOW>, <&porta 2 GPIO_ACTIVE_LOW>, <&porta 2 GPIO_ACTIVE_LOW>; +}; + +&i2c0 { + status = "disabled"; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; + + gt9xx: gt9xx@14 { + compatible = "goodix,gt9xx"; + reg = <0x14>; + goodix,irq-gpio = <&porta 18 0>; + goodix,rst-gpio = <&porta 19 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; +}; + +&spi3 { + status = "okay"; + + spidev@0 { + status = "okay"; + }; +}; + +&dac { + /delete-property/ mute-gpio-l; + /delete-property/ mute-gpio-r; +}; + +/* mipi dsi for u-boot */ +&vo { + compatible = "cvitek,vo"; + reset-gpio = <&porte 2 GPIO_ACTIVE_LOW>; + pwm-gpio = <&porte 0 GPIO_ACTIVE_HIGH>; + power-ct-gpio = <&porte 1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +/* mipi dsi for kernel */ +&mipi_tx { + compatible = "cvitek,mipi_tx"; + reset-gpio = <&porte 2 GPIO_ACTIVE_LOW>; + pwm-gpio = <&porte 0 GPIO_ACTIVE_HIGH>; + power-ct-gpio = <&porte 1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&wifisd { + status = "okay"; + cap-sd-highspeed; + sd-uhs-sdr25; + sd-uhs-ddr50; + sd-uhs-sdr104; + min-frequency = <400000>; + max-frequency = <187500000>; +}; + +&wifi_pin { + status = "okay"; + compatible = "cvitek,wifi-pin"; + poweron-gpio = <&porta 15 GPIO_ACTIVE_HIGH>; + wakeup-gpio = <&porte 7 GPIO_ACTIVE_HIGH>; +}; + +&usb { + vbus-gpio = <&portb 6 0>; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; diff --git a/sys/contrib/device-tree/src/riscv/sophgo/sg2000_milkv_duos_musl_riscv64_emmc.dts b/sys/contrib/device-tree/src/riscv/sophgo/sg2000_milkv_duos_musl_riscv64_emmc.dts new file mode 100644 index 000000000000..5b28bbd087c7 --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/sg2000_milkv_duos_musl_riscv64_emmc.dts @@ -0,0 +1,108 @@ +/dts-v1/; +#include "cv181x_base_riscv.dtsi" +#include "cv181x_asic_bga.dtsi" +#include "cv181x_asic_emmc.dtsi" + +/ { + model = "Milk-V DuoS"; +}; + +&mipi_rx { + snsr-reset = <&porta 2 GPIO_ACTIVE_LOW>, <&porta 2 GPIO_ACTIVE_LOW>, <&porta 2 GPIO_ACTIVE_LOW>; +}; + +&i2c0 { + status = "disabled"; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; + + gt9xx: gt9xx@14 { + compatible = "goodix,gt9xx"; + reg = <0x14>; + goodix,irq-gpio = <&porta 18 0>; + goodix,rst-gpio = <&porta 19 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; +}; + +&spi3 { + status = "okay"; + + spidev@0 { + status = "okay"; + }; +}; + +&dac { + /delete-property/ mute-gpio-l; + /delete-property/ mute-gpio-r; +}; + +/* mipi dsi for u-boot */ +&vo { + compatible = "cvitek,vo"; + reset-gpio = <&porte 2 GPIO_ACTIVE_LOW>; + pwm-gpio = <&porte 0 GPIO_ACTIVE_HIGH>; + power-ct-gpio = <&porte 1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +/* mipi dsi for kernel */ +&mipi_tx { + compatible = "cvitek,mipi_tx"; + reset-gpio = <&porte 2 GPIO_ACTIVE_LOW>; + pwm-gpio = <&porte 0 GPIO_ACTIVE_HIGH>; + power-ct-gpio = <&porte 1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&wifisd { + status = "okay"; + cap-sd-highspeed; + sd-uhs-sdr25; + sd-uhs-ddr50; + sd-uhs-sdr104; + min-frequency = <400000>; + max-frequency = <187500000>; +}; + +&wifi_pin { + status = "okay"; + compatible = "cvitek,wifi-pin"; + poweron-gpio = <&porta 15 GPIO_ACTIVE_HIGH>; + wakeup-gpio = <&porte 7 GPIO_ACTIVE_HIGH>; +}; + +&usb { + vbus-gpio = <&portb 6 0>; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; diff --git a/sys/contrib/device-tree/src/riscv/sophgo/sg2000_milkv_duos_musl_riscv64_sd.dts b/sys/contrib/device-tree/src/riscv/sophgo/sg2000_milkv_duos_musl_riscv64_sd.dts new file mode 100644 index 000000000000..af3d56ff3903 --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/sg2000_milkv_duos_musl_riscv64_sd.dts @@ -0,0 +1,108 @@ +/dts-v1/; +#include "cv181x_base_riscv.dtsi" +#include "cv181x_asic_bga.dtsi" +#include "cv181x_asic_sd.dtsi" + +/ { + model = "Milk-V DuoS"; +}; + +&mipi_rx { + snsr-reset = <&porta 2 GPIO_ACTIVE_LOW>, <&porta 2 GPIO_ACTIVE_LOW>, <&porta 2 GPIO_ACTIVE_LOW>; +}; + +&i2c0 { + status = "disabled"; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; + + gt9xx: gt9xx@14 { + compatible = "goodix,gt9xx"; + reg = <0x14>; + goodix,irq-gpio = <&porta 18 0>; + goodix,rst-gpio = <&porta 19 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; +}; + +&spi3 { + status = "okay"; + + spidev@0 { + status = "okay"; + }; +}; + +&dac { + /delete-property/ mute-gpio-l; + /delete-property/ mute-gpio-r; +}; + +/* mipi dsi for u-boot */ +&vo { + compatible = "cvitek,vo"; + reset-gpio = <&porte 2 GPIO_ACTIVE_LOW>; + pwm-gpio = <&porte 0 GPIO_ACTIVE_HIGH>; + power-ct-gpio = <&porte 1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +/* mipi dsi for kernel */ +&mipi_tx { + compatible = "cvitek,mipi_tx"; + reset-gpio = <&porte 2 GPIO_ACTIVE_LOW>; + pwm-gpio = <&porte 0 GPIO_ACTIVE_HIGH>; + power-ct-gpio = <&porte 1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&wifisd { + status = "okay"; + cap-sd-highspeed; + sd-uhs-sdr25; + sd-uhs-ddr50; + sd-uhs-sdr104; + min-frequency = <400000>; + max-frequency = <187500000>; +}; + +&wifi_pin { + status = "okay"; + compatible = "cvitek,wifi-pin"; + poweron-gpio = <&porta 15 GPIO_ACTIVE_HIGH>; + wakeup-gpio = <&porte 7 GPIO_ACTIVE_HIGH>; +}; + +&usb { + vbus-gpio = <&portb 6 0>; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; diff --git a/sys/contrib/device-tree/src/riscv/sophgo/sg2000_wevb_arm64_sd.dts b/sys/contrib/device-tree/src/riscv/sophgo/sg2000_wevb_arm64_sd.dts new file mode 100644 index 000000000000..0eac8fbd4a8a --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/sg2000_wevb_arm64_sd.dts @@ -0,0 +1,13 @@ +/dts-v1/; +#include "cv181x_base_arm.dtsi" +#include "cv181x_asic_bga.dtsi" +#include "cv181x_asic_sd.dtsi" +#include "cv181x_default_memmap.dtsi" + +/ { + + sd:cv-sd@4310000 { + max-frequency = <10000000>; + }; +}; + diff --git a/sys/contrib/device-tree/src/riscv/sophgo/sg2000_wevb_riscv64_sd.dts b/sys/contrib/device-tree/src/riscv/sophgo/sg2000_wevb_riscv64_sd.dts new file mode 100644 index 000000000000..9b649d734853 --- /dev/null +++ b/sys/contrib/device-tree/src/riscv/sophgo/sg2000_wevb_riscv64_sd.dts @@ -0,0 +1,10 @@ +/dts-v1/; +#include "cv181x_base_riscv.dtsi" +#include "cv181x_asic_bga.dtsi" +#include "cv181x_asic_sd.dtsi" +#include "cv181x_default_memmap.dtsi" + +/ { + +}; + diff --git a/sys/contrib/openzfs/include/os/freebsd/spl/sys/cmn_err.h b/sys/contrib/openzfs/include/os/freebsd/spl/sys/cmn_err.h index 93dd1196d977..fa55b3917669 100644 --- a/sys/contrib/openzfs/include/os/freebsd/spl/sys/cmn_err.h +++ b/sys/contrib/openzfs/include/os/freebsd/spl/sys/cmn_err.h @@ -52,28 +52,28 @@ extern "C" { #ifndef _ASM extern void cmn_err(int, const char *, ...) - __attribute__((format(printf, 2, 3))); + __attribute__((format(__printf__, 2, 3))); extern void vzcmn_err(zoneid_t, int, const char *, __va_list) - __attribute__((format(printf, 3, 0))); + __attribute__((format(__printf__, 3, 0))); extern void vcmn_err(int, const char *, __va_list) - __attribute__((format(printf, 2, 0))); + __attribute__((format(__printf__, 2, 0))); extern void zcmn_err(zoneid_t, int, const char *, ...) - __attribute__((format(printf, 3, 4))); + __attribute__((format(__printf__, 3, 4))); extern void vzprintf(zoneid_t, const char *, __va_list) - __attribute__((format(printf, 2, 0))); + __attribute__((format(__printf__, 2, 0))); extern void zprintf(zoneid_t, const char *, ...) - __attribute__((format(printf, 2, 3))); + __attribute__((format(__printf__, 2, 3))); extern void vuprintf(const char *, __va_list) - __attribute__((format(printf, 1, 0))); + __attribute__((format(__printf__, 1, 0))); extern void panic(const char *, ...) - __attribute__((format(printf, 1, 2), __noreturn__)); + __attribute__((format(__printf__, 1, 2), __noreturn__)); #define cmn_err_once(ce, ...) \ do { \ diff --git a/sys/contrib/openzfs/include/os/freebsd/spl/sys/kmem.h b/sys/contrib/openzfs/include/os/freebsd/spl/sys/kmem.h index a9619d7d0219..4ae96c91a5f3 100644 --- a/sys/contrib/openzfs/include/os/freebsd/spl/sys/kmem.h +++ b/sys/contrib/openzfs/include/os/freebsd/spl/sys/kmem.h @@ -55,9 +55,9 @@ MALLOC_DECLARE(M_SOLARIS); typedef struct vmem vmem_t; extern char *kmem_asprintf(const char *, ...) - __attribute__((format(printf, 1, 2))); + __attribute__((format(__printf__, 1, 2))); extern char *kmem_vasprintf(const char *fmt, va_list ap) - __attribute__((format(printf, 1, 0))); + __attribute__((format(__printf__, 1, 0))); extern int kmem_scnprintf(char *restrict str, size_t size, const char *restrict fmt, ...); diff --git a/sys/contrib/openzfs/include/sys/spa.h b/sys/contrib/openzfs/include/sys/spa.h index 2a4cc60c4aa8..db30b5a066de 100644 --- a/sys/contrib/openzfs/include/sys/spa.h +++ b/sys/contrib/openzfs/include/sys/spa.h @@ -1127,9 +1127,9 @@ extern void spa_set_allocator(spa_t *spa, const char *allocator); /* Miscellaneous support routines */ extern void spa_load_failed(spa_t *spa, const char *fmt, ...) - __attribute__((format(printf, 2, 3))); + __attribute__((format(__printf__, 2, 3))); extern void spa_load_note(spa_t *spa, const char *fmt, ...) - __attribute__((format(printf, 2, 3))); + __attribute__((format(__printf__, 2, 3))); extern void spa_activate_mos_feature(spa_t *spa, const char *feature, dmu_tx_t *tx); extern void spa_deactivate_mos_feature(spa_t *spa, const char *feature); diff --git a/sys/contrib/openzfs/include/sys/vdev.h b/sys/contrib/openzfs/include/sys/vdev.h index 510474d6c085..86f2235f03ac 100644 --- a/sys/contrib/openzfs/include/sys/vdev.h +++ b/sys/contrib/openzfs/include/sys/vdev.h @@ -54,7 +54,7 @@ extern int zfs_nocacheflush; typedef boolean_t vdev_open_children_func_t(vdev_t *vd); extern void vdev_dbgmsg(vdev_t *vd, const char *fmt, ...) - __attribute__((format(printf, 2, 3))); + __attribute__((format(__printf__, 2, 3))); extern void vdev_dbgmsg_print_tree(vdev_t *, int); extern int vdev_open(vdev_t *); extern void vdev_open_children(vdev_t *); diff --git a/sys/contrib/openzfs/include/sys/zfs_debug.h b/sys/contrib/openzfs/include/sys/zfs_debug.h index 0f021d15157b..6fe5cf062c17 100644 --- a/sys/contrib/openzfs/include/sys/zfs_debug.h +++ b/sys/contrib/openzfs/include/sys/zfs_debug.h @@ -68,7 +68,7 @@ extern int zfs_dbgmsg_enable; extern void __set_error(const char *file, const char *func, int line, int err); extern void __zfs_dbgmsg(char *buf); extern void __dprintf(boolean_t dprint, const char *file, const char *func, - int line, const char *fmt, ...) __attribute__((format(printf, 5, 6))); + int line, const char *fmt, ...) __attribute__((format(__printf__, 5, 6))); /* * Some general principles for using zfs_dbgmsg(): diff --git a/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-avx2-vaes.S b/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-avx2-vaes.S index 3d1b045127e2..76ced8ebad3d 100644 --- a/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-avx2-vaes.S +++ b/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-avx2-vaes.S @@ -1316,7 +1316,7 @@ SET_SIZE(aes_gcm_dec_update_vaes_avx2) #endif /* !_WIN32 || _KERNEL */ /* Mark the stack non-executable. */ -#if defined(__linux__) && defined(__ELF__) +#ifdef __ELF__ .section .note.GNU-stack,"",%progbits #endif diff --git a/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-x86_64.S b/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-x86_64.S index 49671f1fc46a..2e0a88ec8cef 100644 --- a/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-x86_64.S +++ b/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-x86_64.S @@ -1275,7 +1275,7 @@ SECTION_STATIC #endif /* Mark the stack non-executable. */ -#if defined(__linux__) && defined(__ELF__) +#ifdef __ELF__ .section .note.GNU-stack,"",%progbits #endif diff --git a/sys/contrib/openzfs/module/icp/asm-x86_64/modes/ghash-x86_64.S b/sys/contrib/openzfs/module/icp/asm-x86_64/modes/ghash-x86_64.S index 319caa4e190b..6c5bbf0fb272 100644 --- a/sys/contrib/openzfs/module/icp/asm-x86_64/modes/ghash-x86_64.S +++ b/sys/contrib/openzfs/module/icp/asm-x86_64/modes/ghash-x86_64.S @@ -714,7 +714,7 @@ SET_OBJ(.Lrem_8bit) .balign 64 /* Mark the stack non-executable. */ -#if defined(__linux__) && defined(__ELF__) +#ifdef __ELF__ .section .note.GNU-stack,"",%progbits #endif diff --git a/sys/crypto/chacha20/chacha.c b/sys/crypto/chacha20/chacha.c index cb06003b0ecf..0509b05cab22 100644 --- a/sys/crypto/chacha20/chacha.c +++ b/sys/crypto/chacha20/chacha.c @@ -50,8 +50,8 @@ typedef struct chacha_ctx chacha_ctx; a = PLUS(a,b); d = ROTATE(XOR(d,a), 8); \ c = PLUS(c,d); b = ROTATE(XOR(b,c), 7); -static const char sigma[16] = "expand 32-byte k"; -static const char tau[16] = "expand 16-byte k"; +static const char sigma[16] __nonstring = "expand 32-byte k"; +static const char tau[16] __nonstring = "expand 16-byte k"; LOCAL void chacha_keysetup(chacha_ctx *x,const u8 *k,u32 kbits) diff --git a/sys/dev/acpi_support/acpi_ibm.c b/sys/dev/acpi_support/acpi_ibm.c index c1302508b8a2..f895d48bb6d0 100644 --- a/sys/dev/acpi_support/acpi_ibm.c +++ b/sys/dev/acpi_support/acpi_ibm.c @@ -568,14 +568,14 @@ acpi_ibm_attach(device_t dev) SYSCTL_ADD_PROC(sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO, acpi_ibm_sysctls[i].name, - CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, + CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, i, acpi_ibm_sysctl, "I", acpi_ibm_sysctls[i].description); } else { SYSCTL_ADD_PROC(sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO, acpi_ibm_sysctls[i].name, - CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, + CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, i, acpi_ibm_sysctl, "I", acpi_ibm_sysctls[i].description); } diff --git a/sys/dev/acpica/Osd/OsdSchedule.c b/sys/dev/acpica/Osd/OsdSchedule.c index f0464709e8ad..0c5eadb87687 100644 --- a/sys/dev/acpica/Osd/OsdSchedule.c +++ b/sys/dev/acpica/Osd/OsdSchedule.c @@ -35,6 +35,7 @@ #include <sys/param.h> #include <sys/systm.h> #include <sys/bus.h> +#include <sys/cpuset.h> #include <sys/kernel.h> #include <sys/kthread.h> #include <sys/malloc.h> @@ -109,10 +110,13 @@ static void acpi_taskq_init(void *arg) { int i; + /* XXX Currently assuming BSP is CPU0. */ + cpuset_t just_bsp = CPUSET_T_INITIALIZER(0x1); acpi_taskq = taskqueue_create_fast("acpi_task", M_NOWAIT, &taskqueue_thread_enqueue, &acpi_taskq); - taskqueue_start_threads(&acpi_taskq, acpi_max_threads, PWAIT, "acpi_task"); + taskqueue_start_threads_cpuset(&acpi_taskq, acpi_max_threads, PWAIT, + &just_bsp, "acpi_task"); if (acpi_task_count > 0) { if (bootverbose) printf("AcpiOsExecute: enqueue %d pending tasks\n", diff --git a/sys/dev/aq/aq_common.h b/sys/dev/aq/aq_common.h index 5f52ce915bc5..af59ecf7af1e 100644 --- a/sys/dev/aq/aq_common.h +++ b/sys/dev/aq/aq_common.h @@ -37,14 +37,6 @@ #include <sys/types.h> -#define s8 __int8_t -#define u8 __uint8_t -#define u16 __uint16_t -#define s16 __int16_t -#define u32 __uint32_t -#define u64 __uint64_t -#define s64 __int64_t -#define s32 int #define ETIME ETIMEDOUT #define EOK 0 @@ -59,18 +51,18 @@ #endif #define AQ_HW_WAIT_FOR(_B_, _US_, _N_) \ - do { \ +do { \ unsigned int i; \ - for (i = _N_; (!(_B_)) && i; --i) { \ - usec_delay(_US_); \ - } \ - if (!i) { \ - err = -1; \ - } \ - } while (0) + for (i = _N_; (!(_B_)) && i; --i) { \ + usec_delay(_US_); \ + } \ + if (!i) { \ + err = -1; \ + } \ +} while (0) -#define LOWORD(a) ((u16)(a)) +#define LOWORD(a) ((uint16_t)(a)) #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) #define AQ_VER "0.0.5" diff --git a/sys/dev/aq/aq_dbg.c b/sys/dev/aq/aq_dbg.c index 5340fc46a223..495991fafbdc 100644 --- a/sys/dev/aq/aq_dbg.c +++ b/sys/dev/aq/aq_dbg.c @@ -46,7 +46,7 @@ __FBSDID("$FreeBSD$"); const aq_debug_level dbg_level_ = lvl_detail; -const u32 dbg_categories_ = dbg_init | dbg_config | dbg_fw; +const uint32_t dbg_categories_ = dbg_init | dbg_config | dbg_fw; @@ -55,24 +55,25 @@ const u32 dbg_categories_ = dbg_init | dbg_config | dbg_fw; (BIT(BIT_BEGIN - BIT_END + 1) -1)) #define __field(TYPE, VAR) TYPE VAR; -void trace_aq_tx_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2]) +void +trace_aq_tx_descr(int ring_idx, unsigned int pointer, volatile uint64_t descr[2]) { #if AQ_CFG_DEBUG_LVL > 2 struct __entry{ __field(unsigned int, ring_idx) __field(unsigned int, pointer) /* Tx Descriptor */ - __field(u64, data_buf_addr) - __field(u32, pay_len) - __field(u8, ct_en) - __field(u8, ct_idx) - __field(u16, rsvd2) - __field(u8, tx_cmd) - __field(u8, eop) - __field(u8, dd) - __field(u16, buf_len) - __field(u8, rsvd1) - __field(u8, des_typ) + __field(uint64_t, data_buf_addr) + __field(uint32_t, pay_len) + __field(uint8_t, ct_en) + __field(uint8_t, ct_idx) + __field(uint16_t, rsvd2) + __field(uint8_t, tx_cmd) + __field(uint8_t, eop) + __field(uint8_t, dd) + __field(uint16_t, buf_len) + __field(uint8_t, rsvd1) + __field(uint8_t, des_typ) } entry; entry.ring_idx = ring_idx; @@ -98,27 +99,28 @@ void trace_aq_tx_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2] #endif } -void trace_aq_rx_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2]) +void +trace_aq_rx_descr(int ring_idx, unsigned int pointer, volatile uint64_t descr[2]) { #if AQ_CFG_DEBUG_LVL > 2 - u8 dd; - u8 eop; - u8 rx_stat; - u8 rx_estat; - u8 rsc_cnt; - u16 pkt_len; - u16 next_desp; - u16 vlan_tag; - - u8 rss_type; - u8 pkt_type; - u8 rdm_err; - u8 avb_ts; - u8 rsvd; - u8 rx_cntl; - u8 sph; - u16 hdr_len; - u32 rss_hash; + uint8_t dd; + uint8_t eop; + uint8_t rx_stat; + uint8_t rx_estat; + uint8_t rsc_cnt; + uint16_t pkt_len; + uint16_t next_desp; + uint16_t vlan_tag; + + uint8_t rss_type; + uint8_t pkt_type; + uint8_t rdm_err; + uint8_t avb_ts; + uint8_t rsvd; + uint8_t rx_cntl; + uint8_t sph; + uint16_t hdr_len; + uint32_t rss_hash; rss_hash = DESCR_FIELD(descr[0], 63, 32); hdr_len = DESCR_FIELD(descr[0], 31, 22); @@ -149,24 +151,26 @@ void trace_aq_rx_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2] #endif } -void trace_aq_tx_context_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2]) +void +trace_aq_tx_context_descr(int ring_idx, unsigned int pointer, + volatile uint64_t descr[2]) { #if AQ_CFG_DEBUG_LVL > 2 struct __entry_s{ __field(unsigned int, ring_idx) __field(unsigned int, pointer) /* Tx Context Descriptor */ - __field(u16, out_len) - __field(u8, tun_len) - __field(u64, resvd3) - __field(u16, mss_len) - __field(u8, l4_len) - __field(u8, l3_len) - __field(u8, l2_len) - __field(u8, ct_cmd) - __field(u16, vlan_tag) - __field(u8, ct_idx) - __field(u8, des_typ) + __field(uint16_t, out_len) + __field(uint8_t, tun_len) + __field(uint64_t, resvd3) + __field(uint16_t, mss_len) + __field(uint8_t, l4_len) + __field(uint8_t, l3_len) + __field(uint8_t, l2_len) + __field(uint8_t, ct_cmd) + __field(uint16_t, vlan_tag) + __field(uint8_t, ct_idx) + __field(uint8_t, des_typ) } entry; struct __entry_s *__entry = &entry; __entry->ring_idx = ring_idx; @@ -192,7 +196,8 @@ void trace_aq_tx_context_descr(int ring_idx, unsigned int pointer, volatile u64 #endif } -void DumpHex(const void* data, size_t size) { +void +DumpHex(const void* data, size_t size) { #if AQ_CFG_DEBUG_LVL > 3 char ascii[17]; size_t i, j; @@ -234,4 +239,4 @@ void DumpHex(const void* data, size_t size) { } } #endif -}
\ No newline at end of file +} diff --git a/sys/dev/aq/aq_dbg.h b/sys/dev/aq/aq_dbg.h index 8d02f483b2f7..d90a8599e085 100644 --- a/sys/dev/aq/aq_dbg.h +++ b/sys/dev/aq/aq_dbg.h @@ -38,8 +38,8 @@ #ifndef AQ_DBG_H #define AQ_DBG_H -#include <sys/syslog.h> #include <sys/systm.h> +#include <sys/syslog.h> /* Debug levels: 0 - no debug @@ -78,10 +78,10 @@ Debug levels: #if AQ_CFG_DEBUG_LVL > 2 #define AQ_DBG_DUMP_DESC(desc) { \ - volatile u8 *raw = (volatile u8*)(desc); \ - printf( "07-00 %02X%02X%02X%02X %02X%02X%02X%02X 15-08 %02X%02X%02X%02X %02X%02X%02X%02X\n", \ - raw[7], raw[6], raw[5], raw[4], raw[3], raw[2], raw[1], raw[0], \ - raw[15], raw[14], raw[13], raw[12], raw[11], raw[10], raw[9], raw[8]); \ + volatile uint8_t *raw = (volatile uint8_t*)(desc); \ + printf( "07-00 %02X%02X%02X%02X %02X%02X%02X%02X 15-08 %02X%02X%02X%02X %02X%02X%02X%02X\n", \ + raw[7], raw[6], raw[5], raw[4], raw[3], raw[2], raw[1], raw[0], \ + raw[15], raw[14], raw[13], raw[12], raw[11], raw[10], raw[9], raw[8]); \ }\ #else @@ -90,27 +90,27 @@ Debug levels: typedef enum aq_debug_level { - lvl_error = LOG_ERR, - lvl_warn = LOG_WARNING, - lvl_trace = LOG_NOTICE, - lvl_detail = LOG_INFO, + lvl_error = LOG_ERR, + lvl_warn = LOG_WARNING, + lvl_trace = LOG_NOTICE, + lvl_detail = LOG_INFO, } aq_debug_level; typedef enum aq_debug_category { - dbg_init = 1, - dbg_config = 1 << 1, - dbg_tx = 1 << 2, - dbg_rx = 1 << 3, - dbg_intr = 1 << 4, - dbg_fw = 1 << 5, + dbg_init = 1, + dbg_config = 1 << 1, + dbg_tx = 1 << 2, + dbg_rx = 1 << 3, + dbg_intr = 1 << 4, + dbg_fw = 1 << 5, } aq_debug_category; #define __FILENAME__ (__builtin_strrchr(__FILE__, '/') ? __builtin_strrchr(__FILE__, '/') + 1 : __FILE__) extern const aq_debug_level dbg_level_; -extern const u32 dbg_categories_; +extern const uint32_t dbg_categories_; #define log_base_(_lvl, _fmt, args...) printf( "atlantic: " _fmt "\n", ##args) @@ -130,9 +130,9 @@ extern const u32 dbg_categories_; #define trace(_cat, _fmt, args...) trace_base_(lvl_trace, _cat, _fmt, ##args) #define trace_detail(_cat, _fmt, args...) trace_base_(lvl_detail, _cat, _fmt, ##args) -void trace_aq_tx_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2]); -void trace_aq_rx_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2]); -void trace_aq_tx_context_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2]); +void trace_aq_tx_descr(int ring_idx, unsigned int pointer, volatile uint64_t descr[2]); +void trace_aq_rx_descr(int ring_idx, unsigned int pointer, volatile uint64_t descr[2]); +void trace_aq_tx_context_descr(int ring_idx, unsigned int pointer, volatile uint64_t descr[2]); void DumpHex(const void* data, size_t size); #endif // AQ_DBG_H diff --git a/sys/dev/aq/aq_device.h b/sys/dev/aq/aq_device.h index 2c0d8df77cb9..2b170f710840 100644 --- a/sys/dev/aq/aq_device.h +++ b/sys/dev/aq/aq_device.h @@ -54,40 +54,40 @@ enum aq_media_type { AQ_LINK_10G ) struct aq_stats_s { - u64 prc; - u64 uprc; - u64 mprc; - u64 bprc; - u64 cprc; - u64 erpr; - u64 dpc; - u64 brc; - u64 ubrc; - u64 mbrc; - u64 bbrc; - - u64 ptc; - u64 uptc; - u64 mptc; - u64 bptc; - u64 erpt; - u64 btc; - u64 ubtc; - u64 mbtc; - u64 bbtc; + uint64_t prc; + uint64_t uprc; + uint64_t mprc; + uint64_t bprc; + uint64_t cprc; + uint64_t erpr; + uint64_t dpc; + uint64_t brc; + uint64_t ubrc; + uint64_t mbrc; + uint64_t bbrc; + + uint64_t ptc; + uint64_t uptc; + uint64_t mptc; + uint64_t bptc; + uint64_t erpt; + uint64_t btc; + uint64_t ubtc; + uint64_t mbtc; + uint64_t bbtc; }; enum aq_dev_state_e { - AQ_DEV_STATE_UNLOAD, - AQ_DEV_STATE_PCI_STOP, - AQ_DEV_STATE_DOWN, - AQ_DEV_STATE_UP, + AQ_DEV_STATE_UNLOAD, + AQ_DEV_STATE_PCI_STOP, + AQ_DEV_STATE_DOWN, + AQ_DEV_STATE_UP, }; struct aq_rx_filters { - unsigned int rule_cnt; - struct aq_rx_filter_vlan vlan_filters[AQ_HW_VLAN_MAX_FILTERS]; - struct aq_rx_filter_l2 etype_filters[AQ_HW_ETYPE_MAX_FILTERS]; + unsigned int rule_cnt; + struct aq_rx_filter_vlan vlan_filters[AQ_HW_VLAN_MAX_FILTERS]; + struct aq_rx_filter_l2 etype_filters[AQ_HW_ETYPE_MAX_FILTERS]; }; struct aq_vlan_tag { @@ -102,7 +102,7 @@ struct aq_dev { if_shared_ctx_t sctx; struct ifmedia * media; - struct aq_hw hw; + struct aq_hw hw; enum aq_media_type media_type; uint32_t link_speeds; @@ -142,7 +142,7 @@ int aq_update_hw_stats(aq_dev_t *aq_dev); void aq_initmedia(aq_dev_t *aq_dev); int aq_linkstat_isr(void *arg); int aq_isr_rx(void *arg); -void aq_mediastatus_update(aq_dev_t *aq_dev, u32 link_speed, const struct aq_hw_fc_info *fc_neg); +void aq_mediastatus_update(aq_dev_t *aq_dev, uint32_t link_speed, const struct aq_hw_fc_info *fc_neg); void aq_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr); int aq_mediachange(struct ifnet *ifp); void aq_if_update_admin_status(if_ctx_t ctx); diff --git a/sys/dev/aq/aq_fw.c b/sys/dev/aq/aq_fw.c index 3596074dbafc..fac720ba2327 100644 --- a/sys/dev/aq/aq_fw.c +++ b/sys/dev/aq/aq_fw.c @@ -55,10 +55,10 @@ __FBSDID("$FreeBSD$"); typedef enum aq_fw_bootloader_mode { - boot_mode_unknown = 0, - boot_mode_flb, - boot_mode_rbl_flash, - boot_mode_rbl_host_bootload, + boot_mode_unknown = 0, + boot_mode_flb, + boot_mode_rbl_flash, + boot_mode_rbl_host_bootload, } aq_fw_bootloader_mode; #define AQ_CFG_HOST_BOOT_DISABLE 0 @@ -67,22 +67,22 @@ typedef enum aq_fw_bootloader_mode #define MAC_FW_START_TIMEOUT_MS 10000 #define FW_LOADER_START_TIMEOUT_MS 10000 -const u32 NO_RESET_SCRATCHPAD_ADDRESS = 0; -const u32 NO_RESET_SCRATCHPAD_LEN_RES = 1; -const u32 NO_RESET_SCRATCHPAD_RBL_STATUS = 2; -const u32 NO_RESET_SCRATCHPAD_RBL_STATUS_2 = 3; -const u32 WRITE_DATA_COMPLETE = 0x55555555; -const u32 WRITE_DATA_CHUNK_DONE = 0xaaaaaaaa; -const u32 WRITE_DATA_FAIL_WRONG_ADDRESS = 0x66666666; +const uint32_t NO_RESET_SCRATCHPAD_ADDRESS = 0; +const uint32_t NO_RESET_SCRATCHPAD_LEN_RES = 1; +const uint32_t NO_RESET_SCRATCHPAD_RBL_STATUS = 2; +const uint32_t NO_RESET_SCRATCHPAD_RBL_STATUS_2 = 3; +const uint32_t WRITE_DATA_COMPLETE = 0x55555555; +const uint32_t WRITE_DATA_CHUNK_DONE = 0xaaaaaaaa; +const uint32_t WRITE_DATA_FAIL_WRONG_ADDRESS = 0x66666666; -const u32 WAIT_WRITE_TIMEOUT = 1; -const u32 WAIT_WRITE_TIMEOUT_COUNT = 1000; +const uint32_t WAIT_WRITE_TIMEOUT = 1; +const uint32_t WAIT_WRITE_TIMEOUT_COUNT = 1000; -const u32 RBL_STATUS_SUCCESS = 0xabba; -const u32 RBL_STATUS_FAILURE = 0xbad; -const u32 RBL_STATUS_HOST_BOOT = 0xf1a7; +const uint32_t RBL_STATUS_SUCCESS = 0xabba; +const uint32_t RBL_STATUS_FAILURE = 0xbad; +const uint32_t RBL_STATUS_HOST_BOOT = 0xf1a7; -const u32 SCRATCHPAD_FW_LOADER_STATUS = (0x40 / sizeof(u32)); +const uint32_t SCRATCHPAD_FW_LOADER_STATUS = (0x40 / sizeof(uint32_t)); extern struct aq_firmware_ops aq_fw1x_ops; @@ -95,258 +95,268 @@ int mac_soft_reset_rbl_(struct aq_hw* hw, aq_fw_bootloader_mode* mode); int wait_init_mac_firmware_(struct aq_hw* hw); -int aq_fw_reset(struct aq_hw* hw) +int +aq_fw_reset(struct aq_hw* hw) { - int ver = AQ_READ_REG(hw, 0x18); - u32 bootExitCode = 0; - int k; - - for (k = 0; k < 1000; ++k) { - u32 flbStatus = reg_glb_daisy_chain_status1_get(hw); - bootExitCode = AQ_READ_REG(hw, 0x388); - if (flbStatus != 0x06000000 || bootExitCode != 0) - break; - } - - if (k == 1000) { - aq_log_error("Neither RBL nor FLB started"); - return (-EBUSY); - } - - hw->rbl_enabled = bootExitCode != 0; - - trace(dbg_init, "RBL enabled = %d", hw->rbl_enabled); - - /* Having FW version 0 is an indicator that cold start - * is in progress. This means two things: - * 1) Driver have to wait for FW/HW to finish boot (500ms giveup) - * 2) Driver may skip reset sequence and save time. - */ - if (hw->fast_start_enabled && !ver) { - int err = wait_init_mac_firmware_(hw); - /* Skip reset as it just completed */ - if (!err) - return (0); - } - - aq_fw_bootloader_mode mode = boot_mode_unknown; - int err = mac_soft_reset_(hw, &mode); - if (err < 0) { - aq_log_error("MAC reset failed: %d", err); - return (err); - } - - switch (mode) { - case boot_mode_flb: - aq_log("FLB> F/W successfully loaded from flash."); - hw->flash_present = true; - return wait_init_mac_firmware_(hw); - - case boot_mode_rbl_flash: - aq_log("RBL> F/W loaded from flash. Host Bootload disabled."); - hw->flash_present = true; - return wait_init_mac_firmware_(hw); - - case boot_mode_unknown: - aq_log_error("F/W bootload error: unknown bootloader type"); - return (-ENOTSUP); - - case boot_mode_rbl_host_bootload: + int ver = AQ_READ_REG(hw, 0x18); + uint32_t bootExitCode = 0; + int k; + + for (k = 0; k < 1000; ++k) { + uint32_t flbStatus = reg_glb_daisy_chain_status1_get(hw); + bootExitCode = AQ_READ_REG(hw, 0x388); + if (flbStatus != 0x06000000 || bootExitCode != 0) + break; + } + + if (k == 1000) { + aq_log_error("Neither RBL nor FLB started"); + return (-EBUSY); + } + + hw->rbl_enabled = bootExitCode != 0; + + trace(dbg_init, "RBL enabled = %d", hw->rbl_enabled); + + /* Having FW version 0 is an indicator that cold start + * is in progress. This means two things: + * 1) Driver have to wait for FW/HW to finish boot (500ms giveup) + * 2) Driver may skip reset sequence and save time. + */ + if (hw->fast_start_enabled && !ver) { + int err = wait_init_mac_firmware_(hw); + /* Skip reset as it just completed */ + if (!err) + return (0); + } + + aq_fw_bootloader_mode mode = boot_mode_unknown; + int err = mac_soft_reset_(hw, &mode); + if (err < 0) { + aq_log_error("MAC reset failed: %d", err); + return (err); + } + + switch (mode) { + case boot_mode_flb: + aq_log("FLB> F/W successfully loaded from flash."); + hw->flash_present = true; + return wait_init_mac_firmware_(hw); + + case boot_mode_rbl_flash: + aq_log("RBL> F/W loaded from flash. Host Bootload disabled."); + hw->flash_present = true; + return wait_init_mac_firmware_(hw); + + case boot_mode_unknown: + aq_log_error("F/W bootload error: unknown bootloader type"); + return (-ENOTSUP); + + case boot_mode_rbl_host_bootload: #if AQ_CFG_HOST_BOOT_DISABLE - aq_log_error("RBL> Host Bootload mode: this driver does not support Host Boot"); - return (-ENOTSUP); + aq_log_error("RBL> Host Bootload mode: this driver does not support Host Boot"); + return (-ENOTSUP); #else - trace(dbg_init, "RBL> Host Bootload mode"); - break; + trace(dbg_init, "RBL> Host Bootload mode"); + break; #endif // HOST_BOOT_DISABLE - } + } - /* - * #todo: Host Boot - */ - aq_log_error("RBL> F/W Host Bootload not implemented"); + /* + * #todo: Host Boot + */ + aq_log_error("RBL> F/W Host Bootload not implemented"); - return (-ENOTSUP); + return (-ENOTSUP); } -int aq_fw_ops_init(struct aq_hw* hw) +int +aq_fw_ops_init(struct aq_hw* hw) { - if (hw->fw_version.raw == 0) - hw->fw_version.raw = AQ_READ_REG(hw, 0x18); - - aq_log("MAC F/W version is %d.%d.%d", - hw->fw_version.major_version, hw->fw_version.minor_version, - hw->fw_version.build_number); - - if (hw->fw_version.major_version == 1) { - trace(dbg_init, "using F/W ops v1.x"); - hw->fw_ops = &aq_fw1x_ops; - return (EOK); - } else if (hw->fw_version.major_version >= 2) { - trace(dbg_init, "using F/W ops v2.x"); - hw->fw_ops = &aq_fw2x_ops; - return (EOK); - } - - aq_log_error("aq_fw_ops_init(): invalid F/W version %#x", hw->fw_version.raw); - return (-ENOTSUP); + if (hw->fw_version.raw == 0) + hw->fw_version.raw = AQ_READ_REG(hw, 0x18); + + aq_log("MAC F/W version is %d.%d.%d", + hw->fw_version.major_version, hw->fw_version.minor_version, + hw->fw_version.build_number); + + if (hw->fw_version.major_version == 1) { + trace(dbg_init, "using F/W ops v1.x"); + hw->fw_ops = &aq_fw1x_ops; + return (EOK); + } else if (hw->fw_version.major_version >= 2) { + trace(dbg_init, "using F/W ops v2.x"); + hw->fw_ops = &aq_fw2x_ops; + return (EOK); + } + + aq_log_error("aq_fw_ops_init(): invalid F/W version %#x", + hw->fw_version.raw); + return (-ENOTSUP); } -int mac_soft_reset_(struct aq_hw* hw, aq_fw_bootloader_mode* mode /*= nullptr*/) +int +mac_soft_reset_(struct aq_hw* hw, aq_fw_bootloader_mode* mode /*= nullptr*/) { - if (hw->rbl_enabled) { - return mac_soft_reset_rbl_(hw, mode); - } else { - if (mode) - *mode = boot_mode_flb; - - return mac_soft_reset_flb_(hw); - } + if (hw->rbl_enabled) { + return mac_soft_reset_rbl_(hw, mode); + } else { + if (mode) + *mode = boot_mode_flb; + + return mac_soft_reset_flb_(hw); + } } -int mac_soft_reset_flb_(struct aq_hw* hw) +int +mac_soft_reset_flb_(struct aq_hw* hw) { - int k; - - reg_global_ctl2_set(hw, 0x40e1); - // Let Felicity hardware to complete SMBUS transaction before Global software reset. - msec_delay(50); - - /* - * If SPI burst transaction was interrupted(before running the script), global software - * reset may not clear SPI interface. Clean it up manually before global reset. - */ - reg_glb_nvr_provisioning2_set(hw, 0xa0); - reg_glb_nvr_interface1_set(hw, 0x9f); - reg_glb_nvr_interface1_set(hw, 0x809f); - msec_delay(50); - - reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk); - - // Kickstart. - reg_global_ctl2_set(hw, 0x80e0); - reg_mif_power_gating_enable_control_set(hw, 0); - if (!hw->fast_start_enabled) - reg_glb_general_provisioning9_set(hw, 1); - - /* - * For the case SPI burst transaction was interrupted (by MCP reset above), - * wait until it is completed by hardware. - */ - msec_delay(50); // Sleep for 10 ms. - - /* MAC Kickstart */ - if (!hw->fast_start_enabled) { - reg_global_ctl2_set(hw, 0x180e0); - - u32 flb_status = 0; - int k; - for (k = 0; k < 1000; ++k) { - flb_status = reg_glb_daisy_chain_status1_get(hw) & 0x10; - if (flb_status != 0) - break; - msec_delay(10); // Sleep for 10 ms. - } - - if (flb_status == 0) { - trace_error(dbg_init, "FLB> MAC kickstart failed: timed out"); - return (false); - } - - trace(dbg_init, "FLB> MAC kickstart done, %d ms", k); - /* FW reset */ - reg_global_ctl2_set(hw, 0x80e0); - // Let Felicity hardware complete SMBUS transaction before Global software reset. - msec_delay(50); - } - reg_glb_cpu_sem_set(hw, 1, 0); - - // PHY Kickstart: #undone - - // Global software reset - rx_rx_reg_res_dis_set(hw, 0); - tx_tx_reg_res_dis_set(hw, 0); - mpi_tx_reg_res_dis_set(hw, 0); - reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk); - - bool restart_completed = false; - for (k = 0; k < 1000; ++k) { - restart_completed = reg_glb_fw_image_id1_get(hw) != 0; - if (restart_completed) - break; - msec_delay(10); - } - - if (!restart_completed) { - trace_error(dbg_init, "FLB> Global Soft Reset failed"); - return (false); - } - - trace(dbg_init, "FLB> F/W restart: %d ms", k * 10); - return (true); + int k; + + reg_global_ctl2_set(hw, 0x40e1); + // Let Felicity hardware to complete SMBUS transaction before Global software reset. + msec_delay(50); + + /* + * If SPI burst transaction was interrupted(before running the script), global software + * reset may not clear SPI interface. Clean it up manually before global reset. + */ + reg_glb_nvr_provisioning2_set(hw, 0xa0); + reg_glb_nvr_interface1_set(hw, 0x9f); + reg_glb_nvr_interface1_set(hw, 0x809f); + msec_delay(50); + + reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk); + + // Kickstart. + reg_global_ctl2_set(hw, 0x80e0); + reg_mif_power_gating_enable_control_set(hw, 0); + if (!hw->fast_start_enabled) + reg_glb_general_provisioning9_set(hw, 1); + + /* + * For the case SPI burst transaction was interrupted (by MCP reset above), + * wait until it is completed by hardware. + */ + msec_delay(50); // Sleep for 10 ms. + + /* MAC Kickstart */ + if (!hw->fast_start_enabled) { + reg_global_ctl2_set(hw, 0x180e0); + + uint32_t flb_status = 0; + int k; + for (k = 0; k < 1000; ++k) { + flb_status = reg_glb_daisy_chain_status1_get(hw) & 0x10; + if (flb_status != 0) + break; + msec_delay(10); // Sleep for 10 ms. + } + + if (flb_status == 0) { + trace_error(dbg_init, + "FLB> MAC kickstart failed: timed out"); + return (false); + } + + trace(dbg_init, "FLB> MAC kickstart done, %d ms", k); + /* FW reset */ + reg_global_ctl2_set(hw, 0x80e0); + // Let Felicity hardware complete SMBUS transaction before Global software reset. + msec_delay(50); + } + reg_glb_cpu_sem_set(hw, 1, 0); + + // PHY Kickstart: #undone + + // Global software reset + rx_rx_reg_res_dis_set(hw, 0); + tx_tx_reg_res_dis_set(hw, 0); + mpi_tx_reg_res_dis_set(hw, 0); + reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk); + + bool restart_completed = false; + for (k = 0; k < 1000; ++k) { + restart_completed = reg_glb_fw_image_id1_get(hw) != 0; + if (restart_completed) + break; + msec_delay(10); + } + + if (!restart_completed) { + trace_error(dbg_init, "FLB> Global Soft Reset failed"); + return (false); + } + + trace(dbg_init, "FLB> F/W restart: %d ms", k * 10); + return (true); } -int mac_soft_reset_rbl_(struct aq_hw* hw, aq_fw_bootloader_mode* mode) +int +mac_soft_reset_rbl_(struct aq_hw* hw, aq_fw_bootloader_mode* mode) { - trace(dbg_init, "RBL> MAC reset STARTED!"); - - reg_global_ctl2_set(hw, 0x40e1); - reg_glb_cpu_sem_set(hw, 1, 0); - reg_mif_power_gating_enable_control_set(hw, 0); - - // MAC FW will reload PHY FW if 1E.1000.3 was cleaned - #undone - - reg_glb_cpu_no_reset_scratchpad_set(hw, 0xDEAD, NO_RESET_SCRATCHPAD_RBL_STATUS); - - // Global software reset - rx_rx_reg_res_dis_set(hw, 0); - tx_tx_reg_res_dis_set(hw, 0); - mpi_tx_reg_res_dis_set(hw, 0); - reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk); - - reg_global_ctl2_set(hw, 0x40e0); - - // Wait for RBL to finish boot process. - u16 rbl_status = 0; - for (int k = 0; k < RBL_TIMEOUT_MS; ++k) { - rbl_status = LOWORD(reg_glb_cpu_no_reset_scratchpad_get(hw, NO_RESET_SCRATCHPAD_RBL_STATUS)); - if (rbl_status != 0 && rbl_status != 0xDEAD) - break; - - msec_delay(1); - } - - if (rbl_status == 0 || rbl_status == 0xDEAD) { - trace_error(dbg_init, "RBL> RBL restart failed: timeout"); - return (-EBUSY); - } - - if (rbl_status == RBL_STATUS_SUCCESS) { - if (mode) - *mode = boot_mode_rbl_flash; - trace(dbg_init, "RBL> reset complete! [Flash]"); - } else if (rbl_status == RBL_STATUS_HOST_BOOT) { - if (mode) - *mode = boot_mode_rbl_host_bootload; - trace(dbg_init, "RBL> reset complete! [Host Bootload]"); - } else { - trace_error(dbg_init, "unknown RBL status 0x%x", rbl_status); - return (-EBUSY); - } - - return (EOK); + trace(dbg_init, "RBL> MAC reset STARTED!"); + + reg_global_ctl2_set(hw, 0x40e1); + reg_glb_cpu_sem_set(hw, 1, 0); + reg_mif_power_gating_enable_control_set(hw, 0); + + // MAC FW will reload PHY FW if 1E.1000.3 was cleaned - #undone + + reg_glb_cpu_no_reset_scratchpad_set(hw, 0xDEAD, + NO_RESET_SCRATCHPAD_RBL_STATUS); + + // Global software reset + rx_rx_reg_res_dis_set(hw, 0); + tx_tx_reg_res_dis_set(hw, 0); + mpi_tx_reg_res_dis_set(hw, 0); + reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk); + + reg_global_ctl2_set(hw, 0x40e0); + + // Wait for RBL to finish boot process. + uint16_t rbl_status = 0; + for (int k = 0; k < RBL_TIMEOUT_MS; ++k) { + rbl_status = LOWORD(reg_glb_cpu_no_reset_scratchpad_get(hw, NO_RESET_SCRATCHPAD_RBL_STATUS)); + if (rbl_status != 0 && rbl_status != 0xDEAD) + break; + + msec_delay(1); + } + + if (rbl_status == 0 || rbl_status == 0xDEAD) { + trace_error(dbg_init, "RBL> RBL restart failed: timeout"); + return (-EBUSY); + } + + if (rbl_status == RBL_STATUS_SUCCESS) { + if (mode) + *mode = boot_mode_rbl_flash; + trace(dbg_init, "RBL> reset complete! [Flash]"); + } else if (rbl_status == RBL_STATUS_HOST_BOOT) { + if (mode) + *mode = boot_mode_rbl_host_bootload; + trace(dbg_init, "RBL> reset complete! [Host Bootload]"); + } else { + trace_error(dbg_init, "unknown RBL status 0x%x", rbl_status); + return (-EBUSY); + } + + return (EOK); } -int wait_init_mac_firmware_(struct aq_hw* hw) +int +wait_init_mac_firmware_(struct aq_hw* hw) { - for (int i = 0; i < MAC_FW_START_TIMEOUT_MS; ++i) { - if ((hw->fw_version.raw = AQ_READ_REG(hw, 0x18)) != 0) - return (EOK); + for (int i = 0; i < MAC_FW_START_TIMEOUT_MS; ++i) { + if ((hw->fw_version.raw = AQ_READ_REG(hw, 0x18)) != 0) + return (EOK); - msec_delay(1); - } + msec_delay(1); + } - trace_error(dbg_init, "timeout waiting for reg 0x18. MAC f/w NOT READY"); - return (-EBUSY); + trace_error(dbg_init, + "timeout waiting for reg 0x18. MAC f/w NOT READY"); + return (-EBUSY); } diff --git a/sys/dev/aq/aq_fw.h b/sys/dev/aq/aq_fw.h index 7ffb60b29421..ea2c37b6c92c 100644 --- a/sys/dev/aq/aq_fw.h +++ b/sys/dev/aq/aq_fw.h @@ -38,35 +38,36 @@ struct aq_hw; typedef enum aq_fw_link_speed { - aq_fw_none = 0, - aq_fw_100M = (1 << 0), - aq_fw_1G = (1 << 1), - aq_fw_2G5 = (1 << 2), - aq_fw_5G = (1 << 3), - aq_fw_10G = (1 << 4), + aq_fw_none = 0, + aq_fw_100M = (1 << 0), + aq_fw_1G = (1 << 1), + aq_fw_2G5 = (1 << 2), + aq_fw_5G = (1 << 3), + aq_fw_10G = (1 << 4), } aq_fw_link_speed_t; typedef enum aq_fw_link_fc { - aq_fw_fc_none = 0, - aq_fw_fc_ENABLE_RX = BIT(0), - aq_fw_fc_ENABLE_TX = BIT(1), - aq_fw_fc_ENABLE_ALL = aq_fw_fc_ENABLE_RX | aq_fw_fc_ENABLE_TX, + aq_fw_fc_none = 0, + aq_fw_fc_ENABLE_RX = BIT(0), + aq_fw_fc_ENABLE_TX = BIT(1), + aq_fw_fc_ENABLE_ALL = aq_fw_fc_ENABLE_RX | aq_fw_fc_ENABLE_TX, } aq_fw_link_fc_t; -#define aq_fw_speed_auto (aq_fw_100M | aq_fw_1G | aq_fw_2G5 | aq_fw_5G | aq_fw_10G) +#define aq_fw_speed_auto \ + (aq_fw_100M | aq_fw_1G | aq_fw_2G5 | aq_fw_5G | aq_fw_10G) struct aq_firmware_ops { - int (*reset)(struct aq_hw* hal); + int (*reset)(struct aq_hw* hal); - int (*set_mode)(struct aq_hw* hal, enum aq_hw_fw_mpi_state_e mode, aq_fw_link_speed_t speed); - int (*get_mode)(struct aq_hw* hal, enum aq_hw_fw_mpi_state_e* mode, aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc); + int (*set_mode)(struct aq_hw* hal, enum aq_hw_fw_mpi_state_e mode, aq_fw_link_speed_t speed); + int (*get_mode)(struct aq_hw* hal, enum aq_hw_fw_mpi_state_e* mode, aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc); - int (*get_mac_addr)(struct aq_hw* hal, u8* mac_addr); - int (*get_stats)(struct aq_hw* hal, struct aq_hw_stats_s* stats); + int (*get_mac_addr)(struct aq_hw* hal, uint8_t* mac_addr); + int (*get_stats)(struct aq_hw* hal, struct aq_hw_stats_s* stats); - int (*led_control)(struct aq_hw* hal, u32 mode); + int (*led_control)(struct aq_hw* hal, uint32_t mode); }; diff --git a/sys/dev/aq/aq_fw1x.c b/sys/dev/aq/aq_fw1x.c index 2aec2cc6f0a5..10328fdbb01c 100644 --- a/sys/dev/aq/aq_fw1x.c +++ b/sys/dev/aq/aq_fw1x.c @@ -31,7 +31,7 @@ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - + #include <sys/cdefs.h> __FBSDID("$FreeBSD$"); @@ -50,264 +50,275 @@ __FBSDID("$FreeBSD$"); typedef enum fw1x_mode { - FW1X_MPI_DEINIT = 0, - FW1X_MPI_RESERVED = 1, - FW1X_MPI_INIT = 2, - FW1X_MPI_POWER = 4, + FW1X_MPI_DEINIT = 0, + FW1X_MPI_RESERVED = 1, + FW1X_MPI_INIT = 2, + FW1X_MPI_POWER = 4, } fw1x_mode; typedef enum aq_fw1x_rate { - FW1X_RATE_10G = 1 << 0, - FW1X_RATE_5G = 1 << 1, - FW1X_RATE_5GSR = 1 << 2, - FW1X_RATE_2G5 = 1 << 3, - FW1X_RATE_1G = 1 << 4, - FW1X_RATE_100M = 1 << 5, - FW1X_RATE_INVALID = 1 << 6, + FW1X_RATE_10G = 1 << 0, + FW1X_RATE_5G = 1 << 1, + FW1X_RATE_5GSR = 1 << 2, + FW1X_RATE_2G5 = 1 << 3, + FW1X_RATE_1G = 1 << 4, + FW1X_RATE_100M = 1 << 5, + FW1X_RATE_INVALID = 1 << 6, } aq_fw1x_rate; typedef union fw1x_state_reg { - u32 val; - struct { - u8 mode; - u8 reserved1; - u8 speed; - u8 reserved2 : 1; - u8 disableDirtyWake : 1; - u8 reserved3 : 2; - u8 downshift : 4; - }; + uint32_t val; + struct { + uint8_t mode; + uint8_t reserved1; + uint8_t speed; + uint8_t reserved2 : 1; + uint8_t disableDirtyWake : 1; + uint8_t reserved3 : 2; + uint8_t downshift : 4; + }; } fw1x_state_reg; int fw1x_reset(struct aq_hw* hw); -int fw1x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, aq_fw_link_speed_t speed); -int fw1x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc); -int fw1x_get_mac_addr(struct aq_hw* hw, u8* mac_addr); +int fw1x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, + aq_fw_link_speed_t speed); +int fw1x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, + aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc); +int fw1x_get_mac_addr(struct aq_hw* hw, uint8_t* mac_addr); int fw1x_get_stats(struct aq_hw* hw, struct aq_hw_stats_s* stats); -static -fw1x_mode mpi_mode_to_fw1x_(enum aq_hw_fw_mpi_state_e mode) +static fw1x_mode +mpi_mode_to_fw1x_(enum aq_hw_fw_mpi_state_e mode) { - switch (mode) { - case MPI_DEINIT: - return (FW1X_MPI_DEINIT); + switch (mode) { + case MPI_DEINIT: + return (FW1X_MPI_DEINIT); - case MPI_INIT: - return (FW1X_MPI_INIT); + case MPI_INIT: + return (FW1X_MPI_INIT); - case MPI_POWER: - return (FW1X_MPI_POWER); + case MPI_POWER: + return (FW1X_MPI_POWER); - case MPI_RESET: - return (FW1X_MPI_RESERVED); - } + case MPI_RESET: + return (FW1X_MPI_RESERVED); + } - /* - * We shouldn't get here. - */ + /* + * We shouldn't get here. + */ - return (FW1X_MPI_RESERVED); + return (FW1X_MPI_RESERVED); } -static -aq_fw1x_rate link_speed_mask_to_fw1x_(u32 /*aq_fw_link_speed*/ speed) +static aq_fw1x_rate +link_speed_mask_to_fw1x_(uint32_t /*aq_fw_link_speed*/ speed) { - u32 rate = 0; - if (speed & aq_fw_10G) - rate |= FW1X_RATE_10G; + uint32_t rate = 0; + if (speed & aq_fw_10G) + rate |= FW1X_RATE_10G; - if (speed & aq_fw_5G) { - rate |= FW1X_RATE_5G; - rate |= FW1X_RATE_5GSR; - } + if (speed & aq_fw_5G) { + rate |= FW1X_RATE_5G; + rate |= FW1X_RATE_5GSR; + } - if (speed & aq_fw_2G5) - rate |= FW1X_RATE_2G5; + if (speed & aq_fw_2G5) + rate |= FW1X_RATE_2G5; - if (speed & aq_fw_1G) - rate |= FW1X_RATE_1G; + if (speed & aq_fw_1G) + rate |= FW1X_RATE_1G; - if (speed & aq_fw_100M) - rate |= FW1X_RATE_100M; + if (speed & aq_fw_100M) + rate |= FW1X_RATE_100M; - return ((aq_fw1x_rate)rate); + return ((aq_fw1x_rate)rate); } -static -aq_fw_link_speed_t fw1x_rate_to_link_speed_(aq_fw1x_rate rate) +static aq_fw_link_speed_t +fw1x_rate_to_link_speed_(aq_fw1x_rate rate) { - switch (rate) { - case FW1X_RATE_10G: - return (aq_fw_10G); - case FW1X_RATE_5G: - case FW1X_RATE_5GSR: - return (aq_fw_5G); - case FW1X_RATE_2G5: - return (aq_fw_2G5); - case FW1X_RATE_1G: - return (aq_fw_1G); - case FW1X_RATE_100M: - return (aq_fw_100M); - case FW1X_RATE_INVALID: - return (aq_fw_none); - } - - /* - * We should never get here. - */ - - return (aq_fw_none); + switch (rate) { + case FW1X_RATE_10G: + return (aq_fw_10G); + case FW1X_RATE_5G: + case FW1X_RATE_5GSR: + return (aq_fw_5G); + case FW1X_RATE_2G5: + return (aq_fw_2G5); + case FW1X_RATE_1G: + return (aq_fw_1G); + case FW1X_RATE_100M: + return (aq_fw_100M); + case FW1X_RATE_INVALID: + return (aq_fw_none); + } + + /* + * We should never get here. + */ + + return (aq_fw_none); } -int fw1x_reset(struct aq_hw* hal) +int +fw1x_reset(struct aq_hw* hal) { - u32 tid0 = ~0u; /*< Initial value of MBOX transactionId. */ - struct aq_hw_fw_mbox mbox; - const int retryCount = 1000; - - for (int i = 0; i < retryCount; ++i) { - // Read the beginning of Statistics structure to capture the Transaction ID. - aq_hw_fw_downld_dwords(hal, hal->mbox_addr, (u32*)&mbox, - (u32)((char*)&mbox.stats - (char*)&mbox) / sizeof(u32)); - - // Successfully read the stats. - if (tid0 == ~0U) { - // We have read the initial value. - tid0 = mbox.transaction_id; - continue; - } else if (mbox.transaction_id != tid0) { - /* - * Compare transaction ID to initial value. - * If it's different means f/w is alive. We're done. - */ - - return (EOK); - } - - /* - * Transaction ID value haven't changed since last time. - * Try reading the stats again. - */ - usec_delay(10); - } - - trace_error(dbg_init, "F/W 1.x reset finalize timeout"); - return (-EBUSY); + uint32_t tid0 = ~0u; /*< Initial value of MBOX transactionId. */ + struct aq_hw_fw_mbox mbox; + const int retryCount = 1000; + + for (int i = 0; i < retryCount; ++i) { + // Read the beginning of Statistics structure to capture the Transaction ID. + aq_hw_fw_downld_dwords(hal, hal->mbox_addr, (uint32_t*)&mbox, + (uint32_t)((char*)&mbox.stats - (char*)&mbox) / sizeof(uint32_t)); + + // Successfully read the stats. + if (tid0 == ~0U) { + // We have read the initial value. + tid0 = mbox.transaction_id; + continue; + } else if (mbox.transaction_id != tid0) { + /* + * Compare transaction ID to initial value. + * If it's different means f/w is alive. We're done. + */ + + return (EOK); + } + + /* + * Transaction ID value haven't changed since last time. + * Try reading the stats again. + */ + usec_delay(10); + } + + trace_error(dbg_init, "F/W 1.x reset finalize timeout"); + return (-EBUSY); } -int fw1x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, aq_fw_link_speed_t speed) +int +fw1x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, + aq_fw_link_speed_t speed) { - union fw1x_state_reg state = {0}; - state.mode = mpi_mode_to_fw1x_(mode); - state.speed = link_speed_mask_to_fw1x_(speed); + union fw1x_state_reg state = {0}; + state.mode = mpi_mode_to_fw1x_(mode); + state.speed = link_speed_mask_to_fw1x_(speed); - trace(dbg_init, "fw1x> set mode %d, rate mask = %#x; raw = %#x", state.mode, state.speed, state.val); + trace(dbg_init, "fw1x> set mode %d, rate mask = %#x; raw = %#x", + state.mode, state.speed, state.val); - AQ_WRITE_REG(hw, FW1X_MPI_CONTROL_ADR, state.val); + AQ_WRITE_REG(hw, FW1X_MPI_CONTROL_ADR, state.val); - return (EOK); + return (EOK); } -int fw1x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc) +int +fw1x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, + aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc) { - union fw1x_state_reg state = { .val = AQ_READ_REG(hw, AQ_HW_MPI_STATE_ADR) }; - - trace(dbg_init, "fw1x> get_mode(): 0x36c -> %x, 0x368 -> %x", state.val, AQ_READ_REG(hw, AQ_HW_MPI_CONTROL_ADR)); - - enum aq_hw_fw_mpi_state_e md = MPI_DEINIT; - - switch (state.mode) { - case FW1X_MPI_DEINIT: - md = MPI_DEINIT; - break; - case FW1X_MPI_RESERVED: - md = MPI_RESET; - break; - case FW1X_MPI_INIT: - md = MPI_INIT; - break; - case FW1X_MPI_POWER: - md = MPI_POWER; - break; - } - - if (mode) - *mode = md; - - if (speed) - *speed = fw1x_rate_to_link_speed_(state.speed); - - *fc = aq_fw_fc_none; - - AQ_DBG_EXIT(EOK); - return (EOK); + union fw1x_state_reg state = { .val = AQ_READ_REG(hw, AQ_HW_MPI_STATE_ADR) }; + + trace(dbg_init, "fw1x> get_mode(): 0x36c -> %x, 0x368 -> %x", + state.val, AQ_READ_REG(hw, AQ_HW_MPI_CONTROL_ADR)); + + enum aq_hw_fw_mpi_state_e md = MPI_DEINIT; + + switch (state.mode) { + case FW1X_MPI_DEINIT: + md = MPI_DEINIT; + break; + case FW1X_MPI_RESERVED: + md = MPI_RESET; + break; + case FW1X_MPI_INIT: + md = MPI_INIT; + break; + case FW1X_MPI_POWER: + md = MPI_POWER; + break; + } + + if (mode) + *mode = md; + + if (speed) + *speed = fw1x_rate_to_link_speed_(state.speed); + + *fc = aq_fw_fc_none; + + AQ_DBG_EXIT(EOK); + return (EOK); } -int fw1x_get_mac_addr(struct aq_hw* hw, u8* mac) +int +fw1x_get_mac_addr(struct aq_hw* hw, uint8_t* mac) { - int err = -EFAULT; - u32 mac_addr[2]; + int err = -EFAULT; + uint32_t mac_addr[2]; - AQ_DBG_ENTER(); + AQ_DBG_ENTER(); - u32 efuse_shadow_addr = AQ_READ_REG(hw, 0x374); - if (efuse_shadow_addr == 0) { - trace_error(dbg_init, "couldn't read eFUSE Shadow Address"); - AQ_DBG_EXIT(-EFAULT); - return (-EFAULT); - } + uint32_t efuse_shadow_addr = AQ_READ_REG(hw, 0x374); + if (efuse_shadow_addr == 0) { + trace_error(dbg_init, "couldn't read eFUSE Shadow Address"); + AQ_DBG_EXIT(-EFAULT); + return (-EFAULT); + } - err = aq_hw_fw_downld_dwords(hw, efuse_shadow_addr + (40 * 4), - mac_addr, ARRAY_SIZE(mac_addr)); - if (err < 0) { - mac_addr[0] = 0; - mac_addr[1] = 0; - AQ_DBG_EXIT(err); - return (err); - } + err = aq_hw_fw_downld_dwords(hw, efuse_shadow_addr + (40 * 4), + mac_addr, ARRAY_SIZE(mac_addr)); + if (err < 0) { + mac_addr[0] = 0; + mac_addr[1] = 0; + AQ_DBG_EXIT(err); + return (err); + } - mac_addr[0] = bswap32(mac_addr[0]); - mac_addr[1] = bswap32(mac_addr[1]); + mac_addr[0] = bswap32(mac_addr[0]); + mac_addr[1] = bswap32(mac_addr[1]); - memcpy(mac, (u8*)mac_addr, ETHER_ADDR_LEN); + memcpy(mac, (uint8_t*)mac_addr, ETHER_ADDR_LEN); - trace(dbg_init, "fw1x> eFUSE MAC addr -> %02x-%02x-%02x-%02x-%02x-%02x", - mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + trace(dbg_init, "fw1x> eFUSE MAC addr -> %02x-%02x-%02x-%02x-%02x-%02x", + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); - AQ_DBG_EXIT(EOK); - return (EOK); + AQ_DBG_EXIT(EOK); + return (EOK); } -int fw1x_get_stats(struct aq_hw* hw, struct aq_hw_stats_s* stats) +int +fw1x_get_stats(struct aq_hw* hw, struct aq_hw_stats_s* stats) { - int err = 0; + int err = 0; - AQ_DBG_ENTER(); - err = aq_hw_fw_downld_dwords(hw, hw->mbox_addr, (u32*)(void*)&hw->mbox, - sizeof hw->mbox / sizeof(u32)); + AQ_DBG_ENTER(); + err = aq_hw_fw_downld_dwords(hw, hw->mbox_addr, + (uint32_t*)(void*)&hw->mbox, sizeof hw->mbox / sizeof(uint32_t)); - if (err >= 0) { - if (stats != &hw->mbox.stats) - memcpy(stats, &hw->mbox.stats, sizeof *stats); + if (err >= 0) { + if (stats != &hw->mbox.stats) + memcpy(stats, &hw->mbox.stats, sizeof *stats); - stats->dpc = reg_rx_dma_stat_counter7get(hw); - } + stats->dpc = reg_rx_dma_stat_counter7get(hw); + } - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } struct aq_firmware_ops aq_fw1x_ops = { - .reset = fw1x_reset, + .reset = fw1x_reset, - .set_mode = fw1x_set_mode, - .get_mode = fw1x_get_mode, + .set_mode = fw1x_set_mode, + .get_mode = fw1x_get_mode, - .get_mac_addr = fw1x_get_mac_addr, - .get_stats = fw1x_get_stats, + .get_mac_addr = fw1x_get_mac_addr, + .get_stats = fw1x_get_stats, }; diff --git a/sys/dev/aq/aq_fw2x.c b/sys/dev/aq/aq_fw2x.c index 19de3b7a2746..7a39a0ddc7e6 100644 --- a/sys/dev/aq/aq_fw2x.c +++ b/sys/dev/aq/aq_fw2x.c @@ -52,112 +52,112 @@ __FBSDID("$FreeBSD$"); #include "aq_dbg.h" typedef enum { - CAPS_LO_10BASET_HD = 0x00, - CAPS_LO_10BASET_FD, - CAPS_LO_100BASETX_HD, - CAPS_LO_100BASET4_HD, - CAPS_LO_100BASET2_HD, - CAPS_LO_100BASETX_FD, - CAPS_LO_100BASET2_FD, - CAPS_LO_1000BASET_HD, - CAPS_LO_1000BASET_FD, - CAPS_LO_2P5GBASET_FD, - CAPS_LO_5GBASET_FD, - CAPS_LO_10GBASET_FD, + CAPS_LO_10BASET_HD = 0x00, + CAPS_LO_10BASET_FD, + CAPS_LO_100BASETX_HD, + CAPS_LO_100BASET4_HD, + CAPS_LO_100BASET2_HD, + CAPS_LO_100BASETX_FD, + CAPS_LO_100BASET2_FD, + CAPS_LO_1000BASET_HD, + CAPS_LO_1000BASET_FD, + CAPS_LO_2P5GBASET_FD, + CAPS_LO_5GBASET_FD, + CAPS_LO_10GBASET_FD, } fw2x_caps_lo; typedef enum { - CAPS_HI_RESERVED1 = 0x00, - CAPS_HI_10BASET_EEE, - CAPS_HI_RESERVED2, - CAPS_HI_PAUSE, - CAPS_HI_ASYMMETRIC_PAUSE, - CAPS_HI_100BASETX_EEE, - CAPS_HI_RESERVED3, - CAPS_HI_RESERVED4, - CAPS_HI_1000BASET_FD_EEE, - CAPS_HI_2P5GBASET_FD_EEE, - CAPS_HI_5GBASET_FD_EEE, - CAPS_HI_10GBASET_FD_EEE, - CAPS_HI_RESERVED5, - CAPS_HI_RESERVED6, - CAPS_HI_RESERVED7, - CAPS_HI_RESERVED8, - CAPS_HI_RESERVED9, - CAPS_HI_CABLE_DIAG, - CAPS_HI_TEMPERATURE, - CAPS_HI_DOWNSHIFT, - CAPS_HI_PTP_AVB_EN, - CAPS_HI_MEDIA_DETECT, - CAPS_HI_LINK_DROP, - CAPS_HI_SLEEP_PROXY, - CAPS_HI_WOL, - CAPS_HI_MAC_STOP, - CAPS_HI_EXT_LOOPBACK, - CAPS_HI_INT_LOOPBACK, - CAPS_HI_EFUSE_AGENT, - CAPS_HI_WOL_TIMER, - CAPS_HI_STATISTICS, - CAPS_HI_TRANSACTION_ID, + CAPS_HI_RESERVED1 = 0x00, + CAPS_HI_10BASET_EEE, + CAPS_HI_RESERVED2, + CAPS_HI_PAUSE, + CAPS_HI_ASYMMETRIC_PAUSE, + CAPS_HI_100BASETX_EEE, + CAPS_HI_RESERVED3, + CAPS_HI_RESERVED4, + CAPS_HI_1000BASET_FD_EEE, + CAPS_HI_2P5GBASET_FD_EEE, + CAPS_HI_5GBASET_FD_EEE, + CAPS_HI_10GBASET_FD_EEE, + CAPS_HI_RESERVED5, + CAPS_HI_RESERVED6, + CAPS_HI_RESERVED7, + CAPS_HI_RESERVED8, + CAPS_HI_RESERVED9, + CAPS_HI_CABLE_DIAG, + CAPS_HI_TEMPERATURE, + CAPS_HI_DOWNSHIFT, + CAPS_HI_PTP_AVB_EN, + CAPS_HI_MEDIA_DETECT, + CAPS_HI_LINK_DROP, + CAPS_HI_SLEEP_PROXY, + CAPS_HI_WOL, + CAPS_HI_MAC_STOP, + CAPS_HI_EXT_LOOPBACK, + CAPS_HI_INT_LOOPBACK, + CAPS_HI_EFUSE_AGENT, + CAPS_HI_WOL_TIMER, + CAPS_HI_STATISTICS, + CAPS_HI_TRANSACTION_ID, } fw2x_caps_hi; typedef enum aq_fw2x_rate { - FW2X_RATE_100M = 0x20, - FW2X_RATE_1G = 0x100, - FW2X_RATE_2G5 = 0x200, - FW2X_RATE_5G = 0x400, - FW2X_RATE_10G = 0x800, + FW2X_RATE_100M = 0x20, + FW2X_RATE_1G = 0x100, + FW2X_RATE_2G5 = 0x200, + FW2X_RATE_5G = 0x400, + FW2X_RATE_10G = 0x800, } aq_fw2x_rate; typedef struct fw2x_msm_statistics { - uint32_t uprc; - uint32_t mprc; - uint32_t bprc; - uint32_t erpt; - uint32_t uptc; - uint32_t mptc; - uint32_t bptc; - uint32_t erpr; - uint32_t mbtc; - uint32_t bbtc; - uint32_t mbrc; - uint32_t bbrc; - uint32_t ubrc; - uint32_t ubtc; - uint32_t ptc; - uint32_t prc; + uint32_t uprc; + uint32_t mprc; + uint32_t bprc; + uint32_t erpt; + uint32_t uptc; + uint32_t mptc; + uint32_t bptc; + uint32_t erpr; + uint32_t mbtc; + uint32_t bbtc; + uint32_t mbrc; + uint32_t bbrc; + uint32_t ubrc; + uint32_t ubtc; + uint32_t ptc; + uint32_t prc; } fw2x_msm_statistics; typedef struct fw2x_phy_cable_diag_data { - u32 lane_data[4]; + uint32_t lane_data[4]; } fw2x_phy_cable_diag_data; typedef struct fw2x_capabilities { - u32 caps_lo; - u32 caps_hi; + uint32_t caps_lo; + uint32_t caps_hi; } fw2x_capabilities; typedef struct fw2x_mailbox // struct fwHostInterface { - u32 version; - u32 transaction_id; - s32 error; - fw2x_msm_statistics msm; // msmStatistics_t msm; - u16 phy_h_bit; - u16 phy_fault_code; - s16 phy_temperature; - u8 cable_len; - u8 reserved1; - fw2x_phy_cable_diag_data diag_data; - u32 reserved[8]; - - fw2x_capabilities caps; - - /* ... */ + uint32_t version; + uint32_t transaction_id; + int32_t error; + fw2x_msm_statistics msm; // msmStatistics_t msm; + uint16_t phy_h_bit; + uint16_t phy_fault_code; + int16_t phy_temperature; + uint8_t cable_len; + uint8_t reserved1; + fw2x_phy_cable_diag_data diag_data; + uint32_t reserved[8]; + + fw2x_capabilities caps; + + /* ... */ } fw2x_mailbox; @@ -196,303 +196,331 @@ typedef struct fw2x_mailbox // struct fwHostInterface //@{ int fw2x_reset(struct aq_hw* hw); -int fw2x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, aq_fw_link_speed_t speed); -int fw2x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc); +int fw2x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, + aq_fw_link_speed_t speed); +int fw2x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, + aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc); -int fw2x_get_mac_addr(struct aq_hw* hw, u8* mac); +int fw2x_get_mac_addr(struct aq_hw* hw, uint8_t* mac); int fw2x_get_stats(struct aq_hw* hw, struct aq_hw_stats_s* stats); //@} -static u64 read64_(struct aq_hw* hw, u32 addr) +static uint64_t +read64_(struct aq_hw* hw, uint32_t addr) { - u64 lo = AQ_READ_REG(hw, addr); - u64 hi = AQ_READ_REG(hw, addr + 4); - return (lo | (hi << 32)); + uint64_t lo = AQ_READ_REG(hw, addr); + uint64_t hi = AQ_READ_REG(hw, addr + 4); + return (lo | (hi << 32)); } -static uint64_t get_mpi_ctrl_(struct aq_hw* hw) +static uint64_t +get_mpi_ctrl_(struct aq_hw* hw) { - return read64_(hw, FW2X_MPI_CONTROL_ADDR); + return read64_(hw, FW2X_MPI_CONTROL_ADDR); } -static uint64_t get_mpi_state_(struct aq_hw* hw) +static uint64_t +get_mpi_state_(struct aq_hw* hw) { - return read64_(hw, FW2X_MPI_STATE_ADDR); + return read64_(hw, FW2X_MPI_STATE_ADDR); } -static void set_mpi_ctrl_(struct aq_hw* hw, u64 value) +static void +set_mpi_ctrl_(struct aq_hw* hw, uint64_t value) { - AQ_WRITE_REG(hw, FW2X_MPI_CONTROL_ADDR, (u32)value); - AQ_WRITE_REG(hw, FW2X_MPI_CONTROL_ADDR + 4, (u32)(value >> 32)); + AQ_WRITE_REG(hw, FW2X_MPI_CONTROL_ADDR, (uint32_t)value); + AQ_WRITE_REG(hw, FW2X_MPI_CONTROL_ADDR + 4, (uint32_t)(value >> 32)); } -int fw2x_reset(struct aq_hw* hw) +int +fw2x_reset(struct aq_hw* hw) { - fw2x_capabilities caps = {0}; - AQ_DBG_ENTER(); - int err = aq_hw_fw_downld_dwords(hw, hw->mbox_addr + offsetof(fw2x_mailbox, caps), (u32*)&caps, sizeof caps/sizeof(u32)); - if (err == EOK) { - hw->fw_caps = caps.caps_lo | ((u64)caps.caps_hi << 32); - trace(dbg_init, "fw2x> F/W capabilities mask = %llx", (unsigned long long)hw->fw_caps); - } else { - trace_error(dbg_init, "fw2x> can't get F/W capabilities mask, error %d", err); - } + fw2x_capabilities caps = {0}; + AQ_DBG_ENTER(); + int err = aq_hw_fw_downld_dwords(hw, + hw->mbox_addr + offsetof(fw2x_mailbox, caps), + (uint32_t*)&caps, sizeof caps/sizeof(uint32_t)); + if (err == EOK) { + hw->fw_caps = caps.caps_lo | ((uint64_t)caps.caps_hi << 32); + trace(dbg_init, + "fw2x> F/W capabilities mask = %llx", + (unsigned long long)hw->fw_caps); + } else { + trace_error(dbg_init, + "fw2x> can't get F/W capabilities mask, error %d", err); + } AQ_DBG_EXIT(EOK); return (EOK); } -static -aq_fw2x_rate link_speed_mask_to_fw2x_(u32 speed) +static aq_fw2x_rate +link_speed_mask_to_fw2x_(uint32_t speed) { - u32 rate = 0; + uint32_t rate = 0; - AQ_DBG_ENTER(); - if (speed & aq_fw_10G) - rate |= FW2X_RATE_10G; + AQ_DBG_ENTER(); + if (speed & aq_fw_10G) + rate |= FW2X_RATE_10G; - if (speed & aq_fw_5G) - rate |= FW2X_RATE_5G; + if (speed & aq_fw_5G) + rate |= FW2X_RATE_5G; - if (speed & aq_fw_2G5) - rate |= FW2X_RATE_2G5; + if (speed & aq_fw_2G5) + rate |= FW2X_RATE_2G5; - if (speed & aq_fw_1G) - rate |= FW2X_RATE_1G; + if (speed & aq_fw_1G) + rate |= FW2X_RATE_1G; - if (speed & aq_fw_100M) - rate |= FW2X_RATE_100M; + if (speed & aq_fw_100M) + rate |= FW2X_RATE_100M; - AQ_DBG_EXIT(rate); - return ((aq_fw2x_rate)rate); + AQ_DBG_EXIT(rate); + return ((aq_fw2x_rate)rate); } -int fw2x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, aq_fw_link_speed_t speed) +int +fw2x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, + aq_fw_link_speed_t speed) { - u64 mpi_ctrl = get_mpi_ctrl_(hw); - - AQ_DBG_ENTERA("speed=%d", speed); - switch (mode) { - case MPI_INIT: - mpi_ctrl &= ~FW2X_RATE_MASK; - mpi_ctrl |= link_speed_mask_to_fw2x_(speed); - mpi_ctrl &= ~FW2X_CAP_LINK_DROP; + uint64_t mpi_ctrl = get_mpi_ctrl_(hw); + + AQ_DBG_ENTERA("speed=%d", speed); + switch (mode) { + case MPI_INIT: + mpi_ctrl &= ~FW2X_RATE_MASK; + mpi_ctrl |= link_speed_mask_to_fw2x_(speed); + mpi_ctrl &= ~FW2X_CAP_LINK_DROP; #if 0 // #todo #flowcontrol #pause #eee - if (pHal->pCfg->eee) - mpi_ctrl |= FW2X_EEE_MASK; + if (pHal->pCfg->eee) + mpi_ctrl |= FW2X_EEE_MASK; #endif - if (hw->fc.fc_rx) - mpi_ctrl |= FW2X_FW_CAP_PAUSE; - if (hw->fc.fc_tx) - mpi_ctrl |= FW2X_FW_CAP_ASYM_PAUSE; - break; - - case MPI_DEINIT: - mpi_ctrl &= ~(FW2X_RATE_MASK | FW2X_EEE_MASK); - mpi_ctrl &= ~(FW2X_FW_CAP_PAUSE | FW2X_FW_CAP_ASYM_PAUSE); - break; - - default: - trace_error(dbg_init, "fw2x> unknown MPI state %d", mode); - return (-EINVAL); - } - - set_mpi_ctrl_(hw, mpi_ctrl); - AQ_DBG_EXIT(EOK); - return (EOK); + if (hw->fc.fc_rx) + mpi_ctrl |= FW2X_FW_CAP_PAUSE; + if (hw->fc.fc_tx) + mpi_ctrl |= FW2X_FW_CAP_ASYM_PAUSE; + break; + + case MPI_DEINIT: + mpi_ctrl &= ~(FW2X_RATE_MASK | FW2X_EEE_MASK); + mpi_ctrl &= ~(FW2X_FW_CAP_PAUSE | FW2X_FW_CAP_ASYM_PAUSE); + break; + + default: + trace_error(dbg_init, "fw2x> unknown MPI state %d", mode); + return (-EINVAL); + } + + set_mpi_ctrl_(hw, mpi_ctrl); + AQ_DBG_EXIT(EOK); + return (EOK); } -int fw2x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, aq_fw_link_speed_t* link_speed, aq_fw_link_fc_t* fc) +int +fw2x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, + aq_fw_link_speed_t* link_speed, aq_fw_link_fc_t* fc) { - u64 mpi_state = get_mpi_state_(hw); - u32 rates = mpi_state & FW2X_RATE_MASK; + uint64_t mpi_state = get_mpi_state_(hw); + uint32_t rates = mpi_state & FW2X_RATE_MASK; // AQ_DBG_ENTER(); - if (mode) { - u64 mpi_ctrl = get_mpi_ctrl_(hw); - if (mpi_ctrl & FW2X_RATE_MASK) - *mode = MPI_INIT; - else - *mode = MPI_DEINIT; - } - - aq_fw_link_speed_t speed = aq_fw_none; - - if (rates & FW2X_RATE_10G) - speed = aq_fw_10G; - else if (rates & FW2X_RATE_5G) - speed = aq_fw_5G; - else if (rates & FW2X_RATE_2G5) - speed = aq_fw_2G5; - else if (rates & FW2X_RATE_1G) - speed = aq_fw_1G; - else if (rates & FW2X_RATE_100M) - speed = aq_fw_100M; - - if (link_speed) - *link_speed = speed; - - *fc = (mpi_state & (FW2X_FW_CAP_PAUSE | FW2X_FW_CAP_ASYM_PAUSE)) >> (32 + CAPS_HI_PAUSE); - + if (mode) { + uint64_t mpi_ctrl = get_mpi_ctrl_(hw); + if (mpi_ctrl & FW2X_RATE_MASK) + *mode = MPI_INIT; + else + *mode = MPI_DEINIT; + } + + aq_fw_link_speed_t speed = aq_fw_none; + + if (rates & FW2X_RATE_10G) + speed = aq_fw_10G; + else if (rates & FW2X_RATE_5G) + speed = aq_fw_5G; + else if (rates & FW2X_RATE_2G5) + speed = aq_fw_2G5; + else if (rates & FW2X_RATE_1G) + speed = aq_fw_1G; + else if (rates & FW2X_RATE_100M) + speed = aq_fw_100M; + + if (link_speed) + *link_speed = speed; + + *fc = (mpi_state & (FW2X_FW_CAP_PAUSE | FW2X_FW_CAP_ASYM_PAUSE)) >> + (32 + CAPS_HI_PAUSE); // AQ_DBG_EXIT(0); - return (EOK); + return (EOK); } -int fw2x_get_mac_addr(struct aq_hw* hw, u8* mac) +int +fw2x_get_mac_addr(struct aq_hw* hw, uint8_t* mac) { - int err = -EFAULT; - u32 mac_addr[2]; - - AQ_DBG_ENTER(); - - u32 efuse_shadow_addr = AQ_READ_REG(hw, 0x364); - if (efuse_shadow_addr == 0) { - trace_error(dbg_init, "couldn't read eFUSE Shadow Address"); - AQ_DBG_EXIT(-EFAULT); - return (-EFAULT); - } - - err = aq_hw_fw_downld_dwords(hw, efuse_shadow_addr + (40 * 4), - mac_addr, ARRAY_SIZE(mac_addr)); - if (err < 0) { - mac_addr[0] = 0; - mac_addr[1] = 0; - AQ_DBG_EXIT(err); - return (err); - } - - mac_addr[0] = bswap32(mac_addr[0]); - mac_addr[1] = bswap32(mac_addr[1]); - - memcpy(mac, (u8*)mac_addr, ETHER_ADDR_LEN); - - AQ_DBG_EXIT(EOK); - return (EOK); + int err = -EFAULT; + uint32_t mac_addr[2]; + + AQ_DBG_ENTER(); + + uint32_t efuse_shadow_addr = AQ_READ_REG(hw, 0x364); + if (efuse_shadow_addr == 0) { + trace_error(dbg_init, "couldn't read eFUSE Shadow Address"); + AQ_DBG_EXIT(-EFAULT); + return (-EFAULT); + } + + err = aq_hw_fw_downld_dwords(hw, efuse_shadow_addr + (40 * 4), mac_addr, + ARRAY_SIZE(mac_addr)); + if (err < 0) { + mac_addr[0] = 0; + mac_addr[1] = 0; + AQ_DBG_EXIT(err); + return (err); + } + + mac_addr[0] = bswap32(mac_addr[0]); + mac_addr[1] = bswap32(mac_addr[1]); + + memcpy(mac, (uint8_t*)mac_addr, ETHER_ADDR_LEN); + + AQ_DBG_EXIT(EOK); + return (EOK); } -static inline -void fw2x_stats_to_fw_stats_(struct aq_hw_stats_s* dst, const fw2x_msm_statistics* src) +static inline void +fw2x_stats_to_fw_stats_(struct aq_hw_stats_s* dst, + const fw2x_msm_statistics* src) { - dst->uprc = src->uprc; - dst->mprc = src->mprc; - dst->bprc = src->bprc; - dst->erpt = src->erpt; - dst->uptc = src->uptc; - dst->mptc = src->mptc; - dst->bptc = src->bptc; - dst->erpr = src->erpr; - dst->mbtc = src->mbtc; - dst->bbtc = src->bbtc; - dst->mbrc = src->mbrc; - dst->bbrc = src->bbrc; - dst->ubrc = src->ubrc; - dst->ubtc = src->ubtc; - dst->ptc = src->ptc; - dst->prc = src->prc; + dst->uprc = src->uprc; + dst->mprc = src->mprc; + dst->bprc = src->bprc; + dst->erpt = src->erpt; + dst->uptc = src->uptc; + dst->mptc = src->mptc; + dst->bptc = src->bptc; + dst->erpr = src->erpr; + dst->mbtc = src->mbtc; + dst->bbtc = src->bbtc; + dst->mbrc = src->mbrc; + dst->bbrc = src->bbrc; + dst->ubrc = src->ubrc; + dst->ubtc = src->ubtc; + dst->ptc = src->ptc; + dst->prc = src->prc; } -static bool toggle_mpi_ctrl_and_wait_(struct aq_hw* hw, u64 mask, u32 timeout_ms, u32 try_count) +static bool +toggle_mpi_ctrl_and_wait_(struct aq_hw* hw, uint64_t mask, uint32_t timeout_ms, + uint32_t try_count) { - u64 ctrl = get_mpi_ctrl_(hw); - u64 state = get_mpi_state_(hw); + uint64_t ctrl = get_mpi_ctrl_(hw); + uint64_t state = get_mpi_state_(hw); // AQ_DBG_ENTER(); - // First, check that control and state values are consistent - if ((ctrl & mask) != (state & mask)) { - trace_warn(dbg_fw, "fw2x> MPI control (%#llx) and state (%#llx) are not consistent for mask %#llx!", - (unsigned long long)ctrl, (unsigned long long)state, (unsigned long long)mask); + // First, check that control and state values are consistent + if ((ctrl & mask) != (state & mask)) { + trace_warn(dbg_fw, + "fw2x> MPI control (%#llx) and state (%#llx) are not consistent for mask %#llx!", + (unsigned long long)ctrl, (unsigned long long)state, + (unsigned long long)mask); AQ_DBG_EXIT(false); - return (false); - } + return (false); + } - // Invert bits (toggle) in control register - ctrl ^= mask; - set_mpi_ctrl_(hw, ctrl); + // Invert bits (toggle) in control register + ctrl ^= mask; + set_mpi_ctrl_(hw, ctrl); - // Clear all bits except masked - ctrl &= mask; + // Clear all bits except masked + ctrl &= mask; - // Wait for FW reflecting change in state register - while (try_count-- != 0) { - if ((get_mpi_state_(hw) & mask) == ctrl) + // Wait for FW reflecting change in state register + while (try_count-- != 0) { + if ((get_mpi_state_(hw) & mask) == ctrl) { // AQ_DBG_EXIT(true); - return (true); + return (true); } - msec_delay(timeout_ms); - } + msec_delay(timeout_ms); + } - trace_detail(dbg_fw, "f/w2x> timeout while waiting for response in state register for bit %#llx!", (unsigned long long)mask); + trace_detail(dbg_fw, + "f/w2x> timeout while waiting for response in state register for bit %#llx!", + (unsigned long long)mask); // AQ_DBG_EXIT(false); - return (false); + return (false); } -int fw2x_get_stats(struct aq_hw* hw, struct aq_hw_stats_s* stats) +int +fw2x_get_stats(struct aq_hw* hw, struct aq_hw_stats_s* stats) { - int err = 0; - fw2x_msm_statistics fw2x_stats = {0}; + int err = 0; + fw2x_msm_statistics fw2x_stats = {0}; // AQ_DBG_ENTER(); - if ((hw->fw_caps & FW2X_CAP_STATISTICS) == 0) { - trace_warn(dbg_fw, "fw2x> statistics not supported by F/W"); - return (-ENOTSUP); - } + if ((hw->fw_caps & FW2X_CAP_STATISTICS) == 0) { + trace_warn(dbg_fw, "fw2x> statistics not supported by F/W"); + return (-ENOTSUP); + } - // Say to F/W to update the statistics - if (!toggle_mpi_ctrl_and_wait_(hw, FW2X_CAP_STATISTICS, 1, 25)) { - trace_error(dbg_fw, "fw2x> statistics update timeout"); + // Say to F/W to update the statistics + if (!toggle_mpi_ctrl_and_wait_(hw, FW2X_CAP_STATISTICS, 1, 25)) { + trace_error(dbg_fw, "fw2x> statistics update timeout"); AQ_DBG_EXIT(-ETIME); - return (-ETIME); - } + return (-ETIME); + } - err = aq_hw_fw_downld_dwords(hw, hw->mbox_addr + offsetof(fw2x_mailbox, msm), - (u32*)&fw2x_stats, sizeof fw2x_stats/sizeof(u32)); + err = aq_hw_fw_downld_dwords(hw, + hw->mbox_addr + offsetof(fw2x_mailbox, msm), + (uint32_t*)&fw2x_stats, sizeof fw2x_stats/sizeof(uint32_t)); - fw2x_stats_to_fw_stats_(stats, &fw2x_stats); + fw2x_stats_to_fw_stats_(stats, &fw2x_stats); - if (err != EOK) - trace_error(dbg_fw, "fw2x> download statistics data FAILED, error %d", err); + if (err != EOK) + trace_error(dbg_fw, + "fw2x> download statistics data FAILED, error %d", err); // AQ_DBG_EXIT(err); - return (err); + return (err); } -static int fw2x_led_control(struct aq_hw* hw, u32 onoff) +static int +fw2x_led_control(struct aq_hw* hw, uint32_t onoff) { - int err = 0; + int err = 0; - AQ_DBG_ENTER(); + AQ_DBG_ENTER(); - aq_hw_fw_version ver_expected = { .raw = FW2X_FW_MIN_VER_LED}; - if (aq_hw_ver_match(&ver_expected, &hw->fw_version)) - AQ_WRITE_REG(hw, FW2X_MPI_LED_ADDR, (onoff)? - ((FW2X_LED_BLINK) | (FW2X_LED_BLINK << 2) | (FW2X_LED_BLINK << 4)): - (FW2X_LED_DEFAULT)); + aq_hw_fw_version ver_expected = { .raw = FW2X_FW_MIN_VER_LED}; + if (aq_hw_ver_match(&ver_expected, &hw->fw_version)) + AQ_WRITE_REG(hw, FW2X_MPI_LED_ADDR, + (onoff) ? ((FW2X_LED_BLINK) | (FW2X_LED_BLINK << 2) | (FW2X_LED_BLINK << 4)): + (FW2X_LED_DEFAULT)); - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } struct aq_firmware_ops aq_fw2x_ops = { - .reset = fw2x_reset, + .reset = fw2x_reset, - .set_mode = fw2x_set_mode, - .get_mode = fw2x_get_mode, + .set_mode = fw2x_set_mode, + .get_mode = fw2x_get_mode, - .get_mac_addr = fw2x_get_mac_addr, - .get_stats = fw2x_get_stats, + .get_mac_addr = fw2x_get_mac_addr, + .get_stats = fw2x_get_stats, - .led_control = fw2x_led_control, + .led_control = fw2x_led_control, }; diff --git a/sys/dev/aq/aq_hw.c b/sys/dev/aq/aq_hw.c index f5f84203588c..fe48e255254a 100644 --- a/sys/dev/aq/aq_hw.c +++ b/sys/dev/aq/aq_hw.c @@ -32,11 +32,11 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include <sys/endian.h> #include <sys/param.h> #include <sys/systm.h> -#include <machine/cpu.h> +#include <sys/endian.h> #include <sys/socket.h> +#include <machine/cpu.h> #include <net/if.h> #include "aq_hw.h" @@ -48,700 +48,707 @@ #define AQ_CFG_FW_MIN_VER_EXPECTED 0x01050006U -int aq_hw_err_from_flags(struct aq_hw *hw) +int +aq_hw_err_from_flags(struct aq_hw *hw) { - return (0); + return (0); } -static void aq_hw_chip_features_init(struct aq_hw *hw, u32 *p) +static void +aq_hw_chip_features_init(struct aq_hw *hw, uint32_t *p) { - u32 chip_features = 0U; - u32 val = reg_glb_mif_id_get(hw); - u32 mif_rev = val & 0xFFU; - - if ((0xFU & mif_rev) == 1U) { - chip_features |= AQ_HW_CHIP_REVISION_A0 | - AQ_HW_CHIP_MPI_AQ | - AQ_HW_CHIP_MIPS; - } else if ((0xFU & mif_rev) == 2U) { - chip_features |= AQ_HW_CHIP_REVISION_B0 | - AQ_HW_CHIP_MPI_AQ | - AQ_HW_CHIP_MIPS | - AQ_HW_CHIP_TPO2 | - AQ_HW_CHIP_RPF2; - } else if ((0xFU & mif_rev) == 0xAU) { - chip_features |= AQ_HW_CHIP_REVISION_B1 | - AQ_HW_CHIP_MPI_AQ | - AQ_HW_CHIP_MIPS | - AQ_HW_CHIP_TPO2 | - AQ_HW_CHIP_RPF2; - } - - *p = chip_features; + uint32_t chip_features = 0U; + uint32_t val = reg_glb_mif_id_get(hw); + uint32_t mif_rev = val & 0xFFU; + + if ((0xFU & mif_rev) == 1U) { + chip_features |= AQ_HW_CHIP_REVISION_A0 | AQ_HW_CHIP_MPI_AQ | + AQ_HW_CHIP_MIPS; + } else if ((0xFU & mif_rev) == 2U) { + chip_features |= AQ_HW_CHIP_REVISION_B0 | AQ_HW_CHIP_MPI_AQ | + AQ_HW_CHIP_MIPS | AQ_HW_CHIP_TPO2 | AQ_HW_CHIP_RPF2; + } else if ((0xFU & mif_rev) == 0xAU) { + chip_features |= AQ_HW_CHIP_REVISION_B1 | AQ_HW_CHIP_MPI_AQ | + AQ_HW_CHIP_MIPS | AQ_HW_CHIP_TPO2 | AQ_HW_CHIP_RPF2; + } + + *p = chip_features; } -int aq_hw_fw_downld_dwords(struct aq_hw *hw, u32 a, u32 *p, u32 cnt) +int +aq_hw_fw_downld_dwords(struct aq_hw *hw, uint32_t a, uint32_t *p, uint32_t cnt) { - int err = 0; + int err = 0; // AQ_DBG_ENTER(); - AQ_HW_WAIT_FOR(reg_glb_cpu_sem_get(hw, - AQ_HW_FW_SM_RAM) == 1U, - 1U, 10000U); + AQ_HW_WAIT_FOR(reg_glb_cpu_sem_get(hw, AQ_HW_FW_SM_RAM) == 1U, 1U, + 10000U); - if (err < 0) { - bool is_locked; + if (err < 0) { + bool is_locked; - reg_glb_cpu_sem_set(hw, 1U, AQ_HW_FW_SM_RAM); - is_locked = reg_glb_cpu_sem_get(hw, AQ_HW_FW_SM_RAM); - if (!is_locked) { - err = -ETIME; - goto err_exit; - } - } + reg_glb_cpu_sem_set(hw, 1U, AQ_HW_FW_SM_RAM); + is_locked = reg_glb_cpu_sem_get(hw, AQ_HW_FW_SM_RAM); + if (!is_locked) { + err = -ETIME; + goto err_exit; + } + } - mif_mcp_up_mailbox_addr_set(hw, a); + mif_mcp_up_mailbox_addr_set(hw, a); - for (++cnt; --cnt && !err;) { - mif_mcp_up_mailbox_execute_operation_set(hw, 1); + for (++cnt; --cnt && !err;) { + mif_mcp_up_mailbox_execute_operation_set(hw, 1); - if (IS_CHIP_FEATURE(hw, REVISION_B1)) - AQ_HW_WAIT_FOR(a != mif_mcp_up_mailbox_addr_get(hw), 1U, 1000U); - else - AQ_HW_WAIT_FOR(!mif_mcp_up_mailbox_busy_get(hw), 1, 1000U); + if (IS_CHIP_FEATURE(hw, REVISION_B1)) + AQ_HW_WAIT_FOR(a != mif_mcp_up_mailbox_addr_get(hw), + 1U, 1000U); + else + AQ_HW_WAIT_FOR(!mif_mcp_up_mailbox_busy_get(hw), 1, + 1000U); - *(p++) = mif_mcp_up_mailbox_data_get(hw); - } + *(p++) = mif_mcp_up_mailbox_data_get(hw); + } - reg_glb_cpu_sem_set(hw, 1U, AQ_HW_FW_SM_RAM); + reg_glb_cpu_sem_set(hw, 1U, AQ_HW_FW_SM_RAM); err_exit: // AQ_DBG_EXIT(err); - return (err); + return (err); } -int aq_hw_ver_match(const aq_hw_fw_version* ver_expected, const aq_hw_fw_version* ver_actual) +int +aq_hw_ver_match(const aq_hw_fw_version* ver_expected, + const aq_hw_fw_version* ver_actual) { - AQ_DBG_ENTER(); + AQ_DBG_ENTER(); - if (ver_actual->major_version >= ver_expected->major_version) - return (true); - if (ver_actual->minor_version >= ver_expected->minor_version) - return (true); - if (ver_actual->build_number >= ver_expected->build_number) - return (true); + if (ver_actual->major_version >= ver_expected->major_version) + return (true); + if (ver_actual->minor_version >= ver_expected->minor_version) + return (true); + if (ver_actual->build_number >= ver_expected->build_number) + return (true); - return (false); + return (false); } -static int aq_hw_init_ucp(struct aq_hw *hw) +static int +aq_hw_init_ucp(struct aq_hw *hw) { - int err = 0; - AQ_DBG_ENTER(); + int err = 0; + AQ_DBG_ENTER(); - hw->fw_version.raw = 0; + hw->fw_version.raw = 0; - err = aq_fw_reset(hw); - if (err != EOK) { - aq_log_error("aq_hw_init_ucp(): F/W reset failed, err %d", err); - return (err); - } + err = aq_fw_reset(hw); + if (err != EOK) { + aq_log_error("aq_hw_init_ucp(): F/W reset failed, err %d", err); + return (err); + } - aq_hw_chip_features_init(hw, &hw->chip_features); - err = aq_fw_ops_init(hw); - if (err < 0) { - aq_log_error("could not initialize F/W ops, err %d", err); - return (-1); - } + aq_hw_chip_features_init(hw, &hw->chip_features); + err = aq_fw_ops_init(hw); + if (err < 0) { + aq_log_error("could not initialize F/W ops, err %d", err); + return (-1); + } - if (hw->fw_version.major_version == 1) { - if (!AQ_READ_REG(hw, 0x370)) { - unsigned int rnd = 0; - unsigned int ucp_0x370 = 0; + if (hw->fw_version.major_version == 1) { + if (!AQ_READ_REG(hw, 0x370)) { + unsigned int rnd = 0; + unsigned int ucp_0x370 = 0; - rnd = arc4random(); + rnd = arc4random(); - ucp_0x370 = 0x02020202 | (0xFEFEFEFE & rnd); - AQ_WRITE_REG(hw, AQ_HW_UCP_0X370_REG, ucp_0x370); - } + ucp_0x370 = 0x02020202 | (0xFEFEFEFE & rnd); + AQ_WRITE_REG(hw, AQ_HW_UCP_0X370_REG, ucp_0x370); + } - reg_glb_cpu_scratch_scp_set(hw, 0, 25); - } + reg_glb_cpu_scratch_scp_set(hw, 0, 25); + } - /* check 10 times by 1ms */ - AQ_HW_WAIT_FOR((hw->mbox_addr = AQ_READ_REG(hw, 0x360)) != 0, 400U, 20); + /* check 10 times by 1ms */ + AQ_HW_WAIT_FOR((hw->mbox_addr = AQ_READ_REG(hw, 0x360)) != 0, 400U, 20); - aq_hw_fw_version ver_expected = { .raw = AQ_CFG_FW_MIN_VER_EXPECTED }; - if (!aq_hw_ver_match(&ver_expected, &hw->fw_version)) - aq_log_error("atlantic: aq_hw_init_ucp(), wrong FW version: expected:%x actual:%x", - AQ_CFG_FW_MIN_VER_EXPECTED, hw->fw_version.raw); + aq_hw_fw_version ver_expected = { .raw = AQ_CFG_FW_MIN_VER_EXPECTED }; + if (!aq_hw_ver_match(&ver_expected, &hw->fw_version)) + aq_log_error("atlantic: aq_hw_init_ucp(), wrong FW version: expected:%x actual:%x", + AQ_CFG_FW_MIN_VER_EXPECTED, hw->fw_version.raw); - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_mpi_create(struct aq_hw *hw) +int +aq_hw_mpi_create(struct aq_hw *hw) { - int err = 0; + int err = 0; - AQ_DBG_ENTER(); - err = aq_hw_init_ucp(hw); - if (err < 0) - goto err_exit; + AQ_DBG_ENTER(); + err = aq_hw_init_ucp(hw); + if (err < 0) + goto err_exit; err_exit: - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_mpi_read_stats(struct aq_hw *hw, struct aq_hw_fw_mbox *pmbox) +int +aq_hw_mpi_read_stats(struct aq_hw *hw, struct aq_hw_fw_mbox *pmbox) { - int err = 0; + int err = 0; // AQ_DBG_ENTER(); - if (hw->fw_ops && hw->fw_ops->get_stats) { - err = hw->fw_ops->get_stats(hw, &pmbox->stats); - } else { - err = -ENOTSUP; - aq_log_error("get_stats() not supported by F/W"); - } + if (hw->fw_ops && hw->fw_ops->get_stats) { + err = hw->fw_ops->get_stats(hw, &pmbox->stats); + } else { + err = -ENOTSUP; + aq_log_error("get_stats() not supported by F/W"); + } - if (err == EOK) { - pmbox->stats.dpc = reg_rx_dma_stat_counter7get(hw); - pmbox->stats.cprc = stats_rx_lro_coalesced_pkt_count0_get(hw); - } + if (err == EOK) { + pmbox->stats.dpc = reg_rx_dma_stat_counter7get(hw); + pmbox->stats.cprc = stats_rx_lro_coalesced_pkt_count0_get(hw); + } // AQ_DBG_EXIT(err); - return (err); + return (err); } -static int aq_hw_mpi_set(struct aq_hw *hw, - enum aq_hw_fw_mpi_state_e state, u32 speed) +static int +aq_hw_mpi_set(struct aq_hw *hw, enum aq_hw_fw_mpi_state_e state, uint32_t speed) { - int err = -ENOTSUP; - AQ_DBG_ENTERA("speed %d", speed); + int err = -ENOTSUP; + AQ_DBG_ENTERA("speed %d", speed); - if (hw->fw_ops && hw->fw_ops->set_mode) { - err = hw->fw_ops->set_mode(hw, state, speed); - } else { - aq_log_error("set_mode() not supported by F/W"); - } + if (hw->fw_ops && hw->fw_ops->set_mode) { + err = hw->fw_ops->set_mode(hw, state, speed); + } else { + aq_log_error("set_mode() not supported by F/W"); + } - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_set_link_speed(struct aq_hw *hw, u32 speed) +int +aq_hw_set_link_speed(struct aq_hw *hw, uint32_t speed) { - return aq_hw_mpi_set(hw, MPI_INIT, speed); + return aq_hw_mpi_set(hw, MPI_INIT, speed); } -int aq_hw_get_link_state(struct aq_hw *hw, u32 *link_speed, struct aq_hw_fc_info *fc_neg) +int +aq_hw_get_link_state(struct aq_hw *hw, uint32_t *link_speed, struct aq_hw_fc_info *fc_neg) { - int err = EOK; + int err = EOK; // AQ_DBG_ENTER(); - enum aq_hw_fw_mpi_state_e mode; - aq_fw_link_speed_t speed = aq_fw_none; - aq_fw_link_fc_t fc; + enum aq_hw_fw_mpi_state_e mode; + aq_fw_link_speed_t speed = aq_fw_none; + aq_fw_link_fc_t fc; - if (hw->fw_ops && hw->fw_ops->get_mode) { - err = hw->fw_ops->get_mode(hw, &mode, &speed, &fc); - } else { - aq_log_error("get_mode() not supported by F/W"); + if (hw->fw_ops && hw->fw_ops->get_mode) { + err = hw->fw_ops->get_mode(hw, &mode, &speed, &fc); + } else { + aq_log_error("get_mode() not supported by F/W"); AQ_DBG_EXIT(-ENOTSUP); - return (-ENOTSUP); - } + return (-ENOTSUP); + } - if (err < 0) { - aq_log_error("get_mode() failed, err %d", err); + if (err < 0) { + aq_log_error("get_mode() failed, err %d", err); AQ_DBG_EXIT(err); - return (err); - } + return (err); + } *link_speed = 0; - if (mode != MPI_INIT) - return (0); + if (mode != MPI_INIT) + return (0); + + switch (speed) { + case aq_fw_10G: + *link_speed = 10000U; + break; + case aq_fw_5G: + *link_speed = 5000U; + break; + case aq_fw_2G5: + *link_speed = 2500U; + break; + case aq_fw_1G: + *link_speed = 1000U; + break; + case aq_fw_100M: + *link_speed = 100U; + break; + default: + *link_speed = 0U; + break; + } - switch (speed) { - case aq_fw_10G: - *link_speed = 10000U; - break; + fc_neg->fc_rx = !!(fc & aq_fw_fc_ENABLE_RX); + fc_neg->fc_tx = !!(fc & aq_fw_fc_ENABLE_TX); - case aq_fw_5G: - *link_speed = 5000U; - break; + // AQ_DBG_EXIT(0); + return (0); +} - case aq_fw_2G5: - *link_speed = 2500U; - break; +int +aq_hw_get_mac_permanent(struct aq_hw *hw, uint8_t *mac) +{ + int err = -ENOTSUP; + AQ_DBG_ENTER(); - case aq_fw_1G: - *link_speed = 1000U; - break; + if (hw->fw_ops && hw->fw_ops->get_mac_addr) + err = hw->fw_ops->get_mac_addr(hw, mac); - case aq_fw_100M: - *link_speed = 100U; - break; + /* Couldn't get MAC address from HW. Use auto-generated one. */ + if ((mac[0] & 1) || ((mac[0] | mac[1] | mac[2]) == 0)) { + uint16_t rnd; + uint32_t h = 0; + uint32_t l = 0; - default: - *link_speed = 0U; - break; - } + printf("atlantic: HW MAC address %x:%x:%x:%x:%x:%x is multicast or empty MAC", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + printf("atlantic: Use random MAC address"); - fc_neg->fc_rx = !!(fc & aq_fw_fc_ENABLE_RX); - fc_neg->fc_tx = !!(fc & aq_fw_fc_ENABLE_TX); + rnd = arc4random(); - // AQ_DBG_EXIT(0); - return (0); -} + /* chip revision */ + l = 0xE3000000U | (0xFFFFU & rnd) | (0x00 << 16); + h = 0x8001300EU; -int aq_hw_get_mac_permanent(struct aq_hw *hw, u8 *mac) -{ - int err = -ENOTSUP; - AQ_DBG_ENTER(); - - if (hw->fw_ops && hw->fw_ops->get_mac_addr) - err = hw->fw_ops->get_mac_addr(hw, mac); - - /* Couldn't get MAC address from HW. Use auto-generated one. */ - if ((mac[0] & 1) || ((mac[0] | mac[1] | mac[2]) == 0)) { - u16 rnd; - u32 h = 0; - u32 l = 0; - - printf("atlantic: HW MAC address %x:%x:%x:%x:%x:%x is multicast or empty MAC", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); - printf("atlantic: Use random MAC address"); - - rnd = arc4random(); - - /* chip revision */ - l = 0xE3000000U - | (0xFFFFU & rnd) - | (0x00 << 16); - h = 0x8001300EU; - - mac[5] = (u8)(0xFFU & l); - l >>= 8; - mac[4] = (u8)(0xFFU & l); - l >>= 8; - mac[3] = (u8)(0xFFU & l); - l >>= 8; - mac[2] = (u8)(0xFFU & l); - mac[1] = (u8)(0xFFU & h); - h >>= 8; - mac[0] = (u8)(0xFFU & h); - - err = EOK; - } - - AQ_DBG_EXIT(err); - return (err); + mac[5] = (uint8_t)(0xFFU & l); + l >>= 8; + mac[4] = (uint8_t)(0xFFU & l); + l >>= 8; + mac[3] = (uint8_t)(0xFFU & l); + l >>= 8; + mac[2] = (uint8_t)(0xFFU & l); + mac[1] = (uint8_t)(0xFFU & h); + h >>= 8; + mac[0] = (uint8_t)(0xFFU & h); + + err = EOK; + } + + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_deinit(struct aq_hw *hw) +int +aq_hw_deinit(struct aq_hw *hw) { - AQ_DBG_ENTER(); - aq_hw_mpi_set(hw, MPI_DEINIT, 0); - AQ_DBG_EXIT(0); - return (0); + AQ_DBG_ENTER(); + aq_hw_mpi_set(hw, MPI_DEINIT, 0); + AQ_DBG_EXIT(0); + return (0); } -int aq_hw_set_power(struct aq_hw *hw, unsigned int power_state) +int +aq_hw_set_power(struct aq_hw *hw, unsigned int power_state) { - AQ_DBG_ENTER(); - aq_hw_mpi_set(hw, MPI_POWER, 0); - AQ_DBG_EXIT(0); - return (0); + AQ_DBG_ENTER(); + aq_hw_mpi_set(hw, MPI_POWER, 0); + AQ_DBG_EXIT(0); + return (0); } /* HW NIC functions */ -int aq_hw_reset(struct aq_hw *hw) +int +aq_hw_reset(struct aq_hw *hw) { - int err = 0; + int err = 0; - AQ_DBG_ENTER(); + AQ_DBG_ENTER(); - err = aq_fw_reset(hw); - if (err < 0) - goto err_exit; + err = aq_fw_reset(hw); + if (err < 0) + goto err_exit; - itr_irq_reg_res_dis_set(hw, 0); - itr_res_irq_set(hw, 1); + itr_irq_reg_res_dis_set(hw, 0); + itr_res_irq_set(hw, 1); - /* check 10 times by 1ms */ - AQ_HW_WAIT_FOR(itr_res_irq_get(hw) == 0, 1000, 10); - if (err < 0) { - printf("atlantic: IRQ reset failed: %d", err); - goto err_exit; - } + /* check 10 times by 1ms */ + AQ_HW_WAIT_FOR(itr_res_irq_get(hw) == 0, 1000, 10); + if (err < 0) { + printf("atlantic: IRQ reset failed: %d", err); + goto err_exit; + } - if (hw->fw_ops && hw->fw_ops->reset) - hw->fw_ops->reset(hw); + if (hw->fw_ops && hw->fw_ops->reset) + hw->fw_ops->reset(hw); - err = aq_hw_err_from_flags(hw); + err = aq_hw_err_from_flags(hw); err_exit: - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } -static int aq_hw_qos_set(struct aq_hw *hw) +static int +aq_hw_qos_set(struct aq_hw *hw) { - u32 tc = 0U; - u32 buff_size = 0U; - unsigned int i_priority = 0U; - int err = 0; - - AQ_DBG_ENTER(); - /* TPS Descriptor rate init */ - tps_tx_pkt_shed_desc_rate_curr_time_res_set(hw, 0x0U); - tps_tx_pkt_shed_desc_rate_lim_set(hw, 0xA); - - /* TPS VM init */ - tps_tx_pkt_shed_desc_vm_arb_mode_set(hw, 0U); - - /* TPS TC credits init */ - tps_tx_pkt_shed_desc_tc_arb_mode_set(hw, 0U); - tps_tx_pkt_shed_data_arb_mode_set(hw, 0U); - - tps_tx_pkt_shed_tc_data_max_credit_set(hw, 0xFFF, 0U); - tps_tx_pkt_shed_tc_data_weight_set(hw, 0x64, 0U); - tps_tx_pkt_shed_desc_tc_max_credit_set(hw, 0x50, 0U); - tps_tx_pkt_shed_desc_tc_weight_set(hw, 0x1E, 0U); - - /* Tx buf size */ - buff_size = AQ_HW_TXBUF_MAX; - - tpb_tx_pkt_buff_size_per_tc_set(hw, buff_size, tc); - tpb_tx_buff_hi_threshold_per_tc_set(hw, - (buff_size * (1024 / 32U) * 66U) / - 100U, tc); - tpb_tx_buff_lo_threshold_per_tc_set(hw, - (buff_size * (1024 / 32U) * 50U) / - 100U, tc); - - /* QoS Rx buf size per TC */ - tc = 0; - buff_size = AQ_HW_RXBUF_MAX; - - rpb_rx_pkt_buff_size_per_tc_set(hw, buff_size, tc); - rpb_rx_buff_hi_threshold_per_tc_set(hw, - (buff_size * - (1024U / 32U) * 66U) / - 100U, tc); - rpb_rx_buff_lo_threshold_per_tc_set(hw, - (buff_size * - (1024U / 32U) * 50U) / - 100U, tc); - - /* QoS 802.1p priority -> TC mapping */ - for (i_priority = 8U; i_priority--;) - rpf_rpb_user_priority_tc_map_set(hw, i_priority, 0U); - - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + uint32_t tc = 0U; + uint32_t buff_size = 0U; + unsigned int i_priority = 0U; + int err = 0; + + AQ_DBG_ENTER(); + /* TPS Descriptor rate init */ + tps_tx_pkt_shed_desc_rate_curr_time_res_set(hw, 0x0U); + tps_tx_pkt_shed_desc_rate_lim_set(hw, 0xA); + + /* TPS VM init */ + tps_tx_pkt_shed_desc_vm_arb_mode_set(hw, 0U); + + /* TPS TC credits init */ + tps_tx_pkt_shed_desc_tc_arb_mode_set(hw, 0U); + tps_tx_pkt_shed_data_arb_mode_set(hw, 0U); + + tps_tx_pkt_shed_tc_data_max_credit_set(hw, 0xFFF, 0U); + tps_tx_pkt_shed_tc_data_weight_set(hw, 0x64, 0U); + tps_tx_pkt_shed_desc_tc_max_credit_set(hw, 0x50, 0U); + tps_tx_pkt_shed_desc_tc_weight_set(hw, 0x1E, 0U); + + /* Tx buf size */ + buff_size = AQ_HW_TXBUF_MAX; + + tpb_tx_pkt_buff_size_per_tc_set(hw, buff_size, tc); + tpb_tx_buff_hi_threshold_per_tc_set(hw, + (buff_size * (1024 / 32U) * 66U) / 100U, tc); + tpb_tx_buff_lo_threshold_per_tc_set(hw, + (buff_size * (1024 / 32U) * 50U) / 100U, tc); + + /* QoS Rx buf size per TC */ + tc = 0; + buff_size = AQ_HW_RXBUF_MAX; + + rpb_rx_pkt_buff_size_per_tc_set(hw, buff_size, tc); + rpb_rx_buff_hi_threshold_per_tc_set(hw, + (buff_size * (1024U / 32U) * 66U) / 100U, tc); + rpb_rx_buff_lo_threshold_per_tc_set(hw, + (buff_size * (1024U / 32U) * 50U) / 100U, tc); + + /* QoS 802.1p priority -> TC mapping */ + for (i_priority = 8U; i_priority--;) + rpf_rpb_user_priority_tc_map_set(hw, i_priority, 0U); + + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -static int aq_hw_offload_set(struct aq_hw *hw) +static int +aq_hw_offload_set(struct aq_hw *hw) { - int err = 0; - - AQ_DBG_ENTER(); - /* TX checksums offloads*/ - tpo_ipv4header_crc_offload_en_set(hw, 1); - tpo_tcp_udp_crc_offload_en_set(hw, 1); - if (err < 0) - goto err_exit; - - /* RX checksums offloads*/ - rpo_ipv4header_crc_offload_en_set(hw, 1); - rpo_tcp_udp_crc_offload_en_set(hw, 1); - if (err < 0) - goto err_exit; - - /* LSO offloads*/ - tdm_large_send_offload_en_set(hw, 0xFFFFFFFFU); - if (err < 0) - goto err_exit; - -/* LRO offloads */ - { - u32 i = 0; - u32 val = (8U < HW_ATL_B0_LRO_RXD_MAX) ? 0x3U : - ((4U < HW_ATL_B0_LRO_RXD_MAX) ? 0x2U : - ((2U < HW_ATL_B0_LRO_RXD_MAX) ? 0x1U : 0x0)); + int err = 0; - for (i = 0; i < HW_ATL_B0_RINGS_MAX; i++) - rpo_lro_max_num_of_descriptors_set(hw, val, i); + AQ_DBG_ENTER(); + /* TX checksums offloads*/ + tpo_ipv4header_crc_offload_en_set(hw, 1); + tpo_tcp_udp_crc_offload_en_set(hw, 1); + if (err < 0) + goto err_exit; + + /* RX checksums offloads*/ + rpo_ipv4header_crc_offload_en_set(hw, 1); + rpo_tcp_udp_crc_offload_en_set(hw, 1); + if (err < 0) + goto err_exit; + + /* LSO offloads*/ + tdm_large_send_offload_en_set(hw, 0xFFFFFFFFU); + if (err < 0) + goto err_exit; - rpo_lro_time_base_divider_set(hw, 0x61AU); - rpo_lro_inactive_interval_set(hw, 0); - /* the LRO timebase divider is 5 uS (0x61a), - * to get a maximum coalescing interval of 250 uS, - * we need to multiply by 50(0x32) to get - * the default value 250 uS - */ - rpo_lro_max_coalescing_interval_set(hw, 50); +/* LRO offloads */ + { + uint32_t i = 0; + uint32_t val = (8U < HW_ATL_B0_LRO_RXD_MAX) ? 0x3U : + ((4U < HW_ATL_B0_LRO_RXD_MAX) ? 0x2U : + ((2U < HW_ATL_B0_LRO_RXD_MAX) ? 0x1U : 0x0)); + + for (i = 0; i < HW_ATL_B0_RINGS_MAX; i++) + rpo_lro_max_num_of_descriptors_set(hw, val, i); + + rpo_lro_time_base_divider_set(hw, 0x61AU); + rpo_lro_inactive_interval_set(hw, 0); + /* the LRO timebase divider is 5 uS (0x61a), + * to get a maximum coalescing interval of 250 uS, + * we need to multiply by 50(0x32) to get + * the default value 250 uS + */ + rpo_lro_max_coalescing_interval_set(hw, 50); - rpo_lro_qsessions_lim_set(hw, 1U); + rpo_lro_qsessions_lim_set(hw, 1U); - rpo_lro_total_desc_lim_set(hw, 2U); + rpo_lro_total_desc_lim_set(hw, 2U); - rpo_lro_patch_optimization_en_set(hw, 0U); + rpo_lro_patch_optimization_en_set(hw, 0U); - rpo_lro_min_pay_of_first_pkt_set(hw, 10U); + rpo_lro_min_pay_of_first_pkt_set(hw, 10U); - rpo_lro_pkt_lim_set(hw, 1U); + rpo_lro_pkt_lim_set(hw, 1U); - rpo_lro_en_set(hw, (hw->lro_enabled ? 0xFFFFFFFFU : 0U)); - } + rpo_lro_en_set(hw, (hw->lro_enabled ? 0xFFFFFFFFU : 0U)); + } - err = aq_hw_err_from_flags(hw); + err = aq_hw_err_from_flags(hw); err_exit: - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } -static int aq_hw_init_tx_path(struct aq_hw *hw) +static int +aq_hw_init_tx_path(struct aq_hw *hw) { - int err = 0; + int err = 0; - AQ_DBG_ENTER(); + AQ_DBG_ENTER(); - /* Tx TC/RSS number config */ - tpb_tx_tc_mode_set(hw, 1U); + /* Tx TC/RSS number config */ + tpb_tx_tc_mode_set(hw, 1U); - thm_lso_tcp_flag_of_first_pkt_set(hw, 0x0FF6U); - thm_lso_tcp_flag_of_middle_pkt_set(hw, 0x0FF6U); - thm_lso_tcp_flag_of_last_pkt_set(hw, 0x0F7FU); + thm_lso_tcp_flag_of_first_pkt_set(hw, 0x0FF6U); + thm_lso_tcp_flag_of_middle_pkt_set(hw, 0x0FF6U); + thm_lso_tcp_flag_of_last_pkt_set(hw, 0x0F7FU); - /* Tx interrupts */ - tdm_tx_desc_wr_wb_irq_en_set(hw, 1U); + /* Tx interrupts */ + tdm_tx_desc_wr_wb_irq_en_set(hw, 1U); - /* misc */ - AQ_WRITE_REG(hw, 0x00007040U, 0x00010000U);//IS_CHIP_FEATURE(TPO2) ? 0x00010000U : 0x00000000U); - tdm_tx_dca_en_set(hw, 0U); - tdm_tx_dca_mode_set(hw, 0U); + /* misc */ + AQ_WRITE_REG(hw, 0x00007040U, 0x00010000U);//IS_CHIP_FEATURE(TPO2) ? 0x00010000U : 0x00000000U); + tdm_tx_dca_en_set(hw, 0U); + tdm_tx_dca_mode_set(hw, 0U); - tpb_tx_path_scp_ins_en_set(hw, 1U); + tpb_tx_path_scp_ins_en_set(hw, 1U); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -static int aq_hw_init_rx_path(struct aq_hw *hw) +static int +aq_hw_init_rx_path(struct aq_hw *hw) { - //struct aq_nic_cfg_s *cfg = hw->aq_nic_cfg; - unsigned int control_reg_val = 0U; - int i; - int err; + //struct aq_nic_cfg_s *cfg = hw->aq_nic_cfg; + unsigned int control_reg_val = 0U; + int i; + int err; - AQ_DBG_ENTER(); - /* Rx TC/RSS number config */ - rpb_rpf_rx_traf_class_mode_set(hw, 1U); + AQ_DBG_ENTER(); + /* Rx TC/RSS number config */ + rpb_rpf_rx_traf_class_mode_set(hw, 1U); - /* Rx flow control */ - rpb_rx_flow_ctl_mode_set(hw, 1U); + /* Rx flow control */ + rpb_rx_flow_ctl_mode_set(hw, 1U); - /* RSS Ring selection */ - reg_rx_flr_rss_control1set(hw, 0xB3333333U); + /* RSS Ring selection */ + reg_rx_flr_rss_control1set(hw, 0xB3333333U); - /* Multicast filters */ - for (i = AQ_HW_MAC_MAX; i--;) { - rpfl2_uc_flr_en_set(hw, (i == 0U) ? 1U : 0U, i); - rpfl2unicast_flr_act_set(hw, 1U, i); - } + /* Multicast filters */ + for (i = AQ_HW_MAC_MAX; i--;) { + rpfl2_uc_flr_en_set(hw, (i == 0U) ? 1U : 0U, i); + rpfl2unicast_flr_act_set(hw, 1U, i); + } - reg_rx_flr_mcst_flr_msk_set(hw, 0x00000000U); - reg_rx_flr_mcst_flr_set(hw, 0x00010FFFU, 0U); + reg_rx_flr_mcst_flr_msk_set(hw, 0x00000000U); + reg_rx_flr_mcst_flr_set(hw, 0x00010FFFU, 0U); - /* Vlan filters */ - rpf_vlan_outer_etht_set(hw, 0x88A8U); - rpf_vlan_inner_etht_set(hw, 0x8100U); + /* Vlan filters */ + rpf_vlan_outer_etht_set(hw, 0x88A8U); + rpf_vlan_inner_etht_set(hw, 0x8100U); rpf_vlan_accept_untagged_packets_set(hw, true); rpf_vlan_untagged_act_set(hw, HW_ATL_RX_HOST); - rpf_vlan_prom_mode_en_set(hw, 1); - - /* Rx Interrupts */ - rdm_rx_desc_wr_wb_irq_en_set(hw, 1U); + rpf_vlan_prom_mode_en_set(hw, 1); + + /* Rx Interrupts */ + rdm_rx_desc_wr_wb_irq_en_set(hw, 1U); - /* misc */ - control_reg_val = 0x000F0000U; //RPF2 + /* misc */ + control_reg_val = 0x000F0000U; //RPF2 - /* RSS hash type set for IP/TCP */ - control_reg_val |= 0x1EU; + /* RSS hash type set for IP/TCP */ + control_reg_val |= 0x1EU; - AQ_WRITE_REG(hw, 0x00005040U, control_reg_val); + AQ_WRITE_REG(hw, 0x00005040U, control_reg_val); - rpfl2broadcast_en_set(hw, 1U); - rpfl2broadcast_flr_act_set(hw, 1U); - rpfl2broadcast_count_threshold_set(hw, 0xFFFFU & (~0U / 256U)); + rpfl2broadcast_en_set(hw, 1U); + rpfl2broadcast_flr_act_set(hw, 1U); + rpfl2broadcast_count_threshold_set(hw, 0xFFFFU & (~0U / 256U)); - rdm_rx_dca_en_set(hw, 0U); - rdm_rx_dca_mode_set(hw, 0U); + rdm_rx_dca_en_set(hw, 0U); + rdm_rx_dca_mode_set(hw, 0U); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_mac_addr_set(struct aq_hw *hw, u8 *mac_addr, u8 index) +int +aq_hw_mac_addr_set(struct aq_hw *hw, uint8_t *mac_addr, uint8_t index) { - int err = 0; - unsigned int h = 0U; - unsigned int l = 0U; - - AQ_DBG_ENTER(); - if (!mac_addr) { - err = -EINVAL; - goto err_exit; - } - h = (mac_addr[0] << 8) | (mac_addr[1]); - l = (mac_addr[2] << 24) | (mac_addr[3] << 16) | - (mac_addr[4] << 8) | mac_addr[5]; - - rpfl2_uc_flr_en_set(hw, 0U, index); - rpfl2unicast_dest_addresslsw_set(hw, l, index); - rpfl2unicast_dest_addressmsw_set(hw, h, index); - rpfl2_uc_flr_en_set(hw, 1U, index); - - err = aq_hw_err_from_flags(hw); + int err = 0; + unsigned int h = 0U; + unsigned int l = 0U; + + AQ_DBG_ENTER(); + if (!mac_addr) { + err = -EINVAL; + goto err_exit; + } + h = (mac_addr[0] << 8) | (mac_addr[1]); + l = (mac_addr[2] << 24) | (mac_addr[3] << 16) | (mac_addr[4] << 8) | + mac_addr[5]; + + rpfl2_uc_flr_en_set(hw, 0U, index); + rpfl2unicast_dest_addresslsw_set(hw, l, index); + rpfl2unicast_dest_addressmsw_set(hw, h, index); + rpfl2_uc_flr_en_set(hw, 1U, index); + + err = aq_hw_err_from_flags(hw); err_exit: - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_init(struct aq_hw *hw, u8 *mac_addr, u8 adm_irq, bool msix) +int +aq_hw_init(struct aq_hw *hw, uint8_t *mac_addr, uint8_t adm_irq, bool msix) { - int err = 0; - u32 val = 0; + int err = 0; + uint32_t val = 0; - AQ_DBG_ENTER(); + AQ_DBG_ENTER(); - /* Force limit MRRS on RDM/TDM to 2K */ - val = AQ_READ_REG(hw, AQ_HW_PCI_REG_CONTROL_6_ADR); - AQ_WRITE_REG(hw, AQ_HW_PCI_REG_CONTROL_6_ADR, (val & ~0x707) | 0x404); + /* Force limit MRRS on RDM/TDM to 2K */ + val = AQ_READ_REG(hw, AQ_HW_PCI_REG_CONTROL_6_ADR); + AQ_WRITE_REG(hw, AQ_HW_PCI_REG_CONTROL_6_ADR, (val & ~0x707) | 0x404); - /* TX DMA total request limit. B0 hardware is not capable to - * handle more than (8K-MRRS) incoming DMA data. - * Value 24 in 256byte units - */ - AQ_WRITE_REG(hw, AQ_HW_TX_DMA_TOTAL_REQ_LIMIT_ADR, 24); + /* TX DMA total request limit. B0 hardware is not capable to + * handle more than (8K-MRRS) incoming DMA data. + * Value 24 in 256byte units + */ + AQ_WRITE_REG(hw, AQ_HW_TX_DMA_TOTAL_REQ_LIMIT_ADR, 24); - aq_hw_init_tx_path(hw); - aq_hw_init_rx_path(hw); + aq_hw_init_tx_path(hw); + aq_hw_init_rx_path(hw); - aq_hw_mac_addr_set(hw, mac_addr, AQ_HW_MAC); + aq_hw_mac_addr_set(hw, mac_addr, AQ_HW_MAC); - aq_hw_mpi_set(hw, MPI_INIT, hw->link_rate); + aq_hw_mpi_set(hw, MPI_INIT, hw->link_rate); - aq_hw_qos_set(hw); + aq_hw_qos_set(hw); - err = aq_hw_err_from_flags(hw); - if (err < 0) - goto err_exit; + err = aq_hw_err_from_flags(hw); + if (err < 0) + goto err_exit; - /* Interrupts */ - //Enable interrupt - itr_irq_status_cor_en_set(hw, 0); //Disable clear-on-read for status - itr_irq_auto_mask_clr_en_set(hw, 1); // Enable auto-mask clear. + /* Interrupts */ + //Enable interrupt + itr_irq_status_cor_en_set(hw, 0); //Disable clear-on-read for status + itr_irq_auto_mask_clr_en_set(hw, 1); // Enable auto-mask clear. if (msix) itr_irq_mode_set(hw, 0x6); //MSIX + multi vector else itr_irq_mode_set(hw, 0x5); //MSI + multi vector - reg_gen_irq_map_set(hw, 0x80 | adm_irq, 3); + reg_gen_irq_map_set(hw, 0x80 | adm_irq, 3); - aq_hw_offload_set(hw); + aq_hw_offload_set(hw); err_exit: - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_start(struct aq_hw *hw) +int +aq_hw_start(struct aq_hw *hw) { - int err; - - AQ_DBG_ENTER(); - tpb_tx_buff_en_set(hw, 1U); - rpb_rx_buff_en_set(hw, 1U); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + int err; + + AQ_DBG_ENTER(); + tpb_tx_buff_en_set(hw, 1U); + rpb_rx_buff_en_set(hw, 1U); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_interrupt_moderation_set(struct aq_hw *hw) +int +aq_hw_interrupt_moderation_set(struct aq_hw *hw) { - static unsigned int AQ_HW_NIC_timers_table_rx_[][2] = { - {80, 120},//{0x6U, 0x38U},/* 10Gbit */ - {0xCU, 0x70U},/* 5Gbit */ - {0xCU, 0x70U},/* 5Gbit 5GS */ - {0x18U, 0xE0U},/* 2.5Gbit */ - {0x30U, 0x80U},/* 1Gbit */ - {0x4U, 0x50U},/* 100Mbit */ - }; - static unsigned int AQ_HW_NIC_timers_table_tx_[][2] = { - {0x4fU, 0x1ff},//{0xffU, 0xffU}, /* 10Gbit */ - {0x4fU, 0xffU}, /* 5Gbit */ - {0x4fU, 0xffU}, /* 5Gbit 5GS */ - {0x4fU, 0xffU}, /* 2.5Gbit */ - {0x4fU, 0xffU}, /* 1Gbit */ - {0x4fU, 0xffU}, /* 100Mbit */ - }; - - u32 speed_index = 0U; //itr settings for 10 g - u32 itr_rx = 2U; - u32 itr_tx = 2U; - int custom_itr = hw->itr; - int active = custom_itr != 0; - int err; - - - AQ_DBG_ENTER(); - - if (custom_itr == -1) { - itr_rx |= AQ_HW_NIC_timers_table_rx_[speed_index][0] << 0x8U; /* set min timer value */ - itr_rx |= AQ_HW_NIC_timers_table_rx_[speed_index][1] << 0x10U; /* set max timer value */ - - itr_tx |= AQ_HW_NIC_timers_table_tx_[speed_index][0] << 0x8U; /* set min timer value */ - itr_tx |= AQ_HW_NIC_timers_table_tx_[speed_index][1] << 0x10U; /* set max timer value */ - }else{ - if (custom_itr > 0x1FF) - custom_itr = 0x1FF; - - itr_rx |= (custom_itr/2) << 0x8U; /* set min timer value */ - itr_rx |= custom_itr << 0x10U; /* set max timer value */ - - itr_tx |= (custom_itr/2) << 0x8U; /* set min timer value */ - itr_tx |= custom_itr << 0x10U; /* set max timer value */ - } - - tdm_tx_desc_wr_wb_irq_en_set(hw, !active); - tdm_tdm_intr_moder_en_set(hw, active); - rdm_rx_desc_wr_wb_irq_en_set(hw, !active); - rdm_rdm_intr_moder_en_set(hw, active); - - for (int i = HW_ATL_B0_RINGS_MAX; i--;) { - reg_tx_intr_moder_ctrl_set(hw, itr_tx, i); - reg_rx_intr_moder_ctrl_set(hw, itr_rx, i); - } - - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + static unsigned int AQ_HW_NIC_timers_table_rx_[][2] = { + {80, 120},//{0x6U, 0x38U},/* 10Gbit */ + {0xCU, 0x70U},/* 5Gbit */ + {0xCU, 0x70U},/* 5Gbit 5GS */ + {0x18U, 0xE0U},/* 2.5Gbit */ + {0x30U, 0x80U},/* 1Gbit */ + {0x4U, 0x50U},/* 100Mbit */ + }; + static unsigned int AQ_HW_NIC_timers_table_tx_[][2] = { + {0x4fU, 0x1ff},//{0xffU, 0xffU}, /* 10Gbit */ + {0x4fU, 0xffU}, /* 5Gbit */ + {0x4fU, 0xffU}, /* 5Gbit 5GS */ + {0x4fU, 0xffU}, /* 2.5Gbit */ + {0x4fU, 0xffU}, /* 1Gbit */ + {0x4fU, 0xffU}, /* 100Mbit */ + }; + + uint32_t speed_index = 0U; //itr settings for 10 g + uint32_t itr_rx = 2U; + uint32_t itr_tx = 2U; + int custom_itr = hw->itr; + int active = custom_itr != 0; + int err; + + + AQ_DBG_ENTER(); + + if (custom_itr == -1) { + /* set min timer value */ + itr_rx |= AQ_HW_NIC_timers_table_rx_[speed_index][0] << 0x8U; + /* set max timer value */ + itr_rx |= AQ_HW_NIC_timers_table_rx_[speed_index][1] << 0x10U; + + /* set min timer value */ + itr_tx |= AQ_HW_NIC_timers_table_tx_[speed_index][0] << 0x8U; + /* set max timer value */ + itr_tx |= AQ_HW_NIC_timers_table_tx_[speed_index][1] << 0x10U; + } else { + if (custom_itr > 0x1FF) + custom_itr = 0x1FF; + + itr_rx |= (custom_itr/2) << 0x8U; /* set min timer value */ + itr_rx |= custom_itr << 0x10U; /* set max timer value */ + + itr_tx |= (custom_itr/2) << 0x8U; /* set min timer value */ + itr_tx |= custom_itr << 0x10U; /* set max timer value */ + } + + tdm_tx_desc_wr_wb_irq_en_set(hw, !active); + tdm_tdm_intr_moder_en_set(hw, active); + rdm_rx_desc_wr_wb_irq_en_set(hw, !active); + rdm_rdm_intr_moder_en_set(hw, active); + + for (int i = HW_ATL_B0_RINGS_MAX; i--;) { + reg_tx_intr_moder_ctrl_set(hw, itr_tx, i); + reg_rx_intr_moder_ctrl_set(hw, itr_rx, i); + } + + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } /** @@ -754,8 +761,8 @@ int aq_hw_interrupt_moderation_set(struct aq_hw *hw) * @param aq_rx_filter_vlan VLAN filter configuration * @return 0 - OK, <0 - error */ -int hw_atl_b0_hw_vlan_set(struct aq_hw_s *self, - struct aq_rx_filter_vlan *aq_vlans) +int +hw_atl_b0_hw_vlan_set(struct aq_hw_s *self, struct aq_rx_filter_vlan *aq_vlans) { int i; @@ -780,14 +787,16 @@ int hw_atl_b0_hw_vlan_set(struct aq_hw_s *self, return aq_hw_err_from_flags(self); } -int hw_atl_b0_hw_vlan_promisc_set(struct aq_hw_s *self, bool promisc) +int +hw_atl_b0_hw_vlan_promisc_set(struct aq_hw_s *self, bool promisc) { hw_atl_rpf_vlan_prom_mode_en_set(self, promisc); return aq_hw_err_from_flags(self); } -void aq_hw_set_promisc(struct aq_hw_s *self, bool l2_promisc, bool vlan_promisc, bool mc_promisc) +void +aq_hw_set_promisc(struct aq_hw_s *self, bool l2_promisc, bool vlan_promisc, bool mc_promisc) { AQ_DBG_ENTERA("promisc %d, vlan_promisc %d, allmulti %d", l2_promisc, vlan_promisc, mc_promisc); @@ -801,11 +810,12 @@ void aq_hw_set_promisc(struct aq_hw_s *self, bool l2_promisc, bool vlan_promisc, AQ_DBG_EXIT(0); } -int aq_hw_rss_hash_set(struct aq_hw_s *self, u8 rss_key[HW_ATL_RSS_HASHKEY_SIZE]) +int +aq_hw_rss_hash_set(struct aq_hw_s *self, uint8_t rss_key[HW_ATL_RSS_HASHKEY_SIZE]) { - u32 rss_key_dw[HW_ATL_RSS_HASHKEY_SIZE / 4]; - u32 addr = 0U; - u32 i = 0U; + uint32_t rss_key_dw[HW_ATL_RSS_HASHKEY_SIZE / 4]; + uint32_t addr = 0U; + uint32_t i = 0U; int err = 0; AQ_DBG_ENTER(); @@ -813,7 +823,7 @@ int aq_hw_rss_hash_set(struct aq_hw_s *self, u8 rss_key[HW_ATL_RSS_HASHKEY_SIZE] memcpy(rss_key_dw, rss_key, HW_ATL_RSS_HASHKEY_SIZE); for (i = 10, addr = 0U; i--; ++addr) { - u32 key_data = bswap32(rss_key_dw[i]); + uint32_t key_data = bswap32(rss_key_dw[i]); rpf_rss_key_wr_data_set(self, key_data); rpf_rss_key_addr_set(self, addr); rpf_rss_key_wr_en_set(self, 1U); @@ -830,11 +840,12 @@ err_exit: return (err); } -int aq_hw_rss_hash_get(struct aq_hw_s *self, u8 rss_key[HW_ATL_RSS_HASHKEY_SIZE]) +int +aq_hw_rss_hash_get(struct aq_hw_s *self, uint8_t rss_key[HW_ATL_RSS_HASHKEY_SIZE]) { - u32 rss_key_dw[HW_ATL_RSS_HASHKEY_SIZE / 4]; - u32 addr = 0U; - u32 i = 0U; + uint32_t rss_key_dw[HW_ATL_RSS_HASHKEY_SIZE / 4]; + uint32_t addr = 0U; + uint32_t i = 0U; int err = 0; AQ_DBG_ENTER(); @@ -851,17 +862,18 @@ int aq_hw_rss_hash_get(struct aq_hw_s *self, u8 rss_key[HW_ATL_RSS_HASHKEY_SIZE] return (err); } -int aq_hw_rss_set(struct aq_hw_s *self, u8 rss_table[HW_ATL_RSS_INDIRECTION_TABLE_MAX]) +int +aq_hw_rss_set(struct aq_hw_s *self, uint8_t rss_table[HW_ATL_RSS_INDIRECTION_TABLE_MAX]) { - u16 bitary[(HW_ATL_RSS_INDIRECTION_TABLE_MAX * + uint16_t bitary[(HW_ATL_RSS_INDIRECTION_TABLE_MAX * 3 / 16U)]; int err = 0; - u32 i = 0U; + uint32_t i = 0U; memset(bitary, 0, sizeof(bitary)); for (i = HW_ATL_RSS_INDIRECTION_TABLE_MAX; i--;) { - (*(u32 *)(bitary + ((i * 3U) / 16U))) |= + (*(uint32_t *)(bitary + ((i * 3U) / 16U))) |= ((rss_table[i]) << ((i * 3U) & 0xFU)); } @@ -881,10 +893,11 @@ err_exit: return (err); } -int aq_hw_udp_rss_enable(struct aq_hw_s *self, bool enable) +int +aq_hw_udp_rss_enable(struct aq_hw_s *self, bool enable) { int err = 0; - if(!enable) { + if (!enable) { /* HW bug workaround: * Disable RSS for UDP using rx flow filter 0. * HW does not track RSS stream for fragmenged UDP, diff --git a/sys/dev/aq/aq_hw.h b/sys/dev/aq/aq_hw.h index 86689fce832e..fb07f7c8b838 100644 --- a/sys/dev/aq/aq_hw.h +++ b/sys/dev/aq/aq_hw.h @@ -43,24 +43,25 @@ #include "aq_common.h" #define AQ_WRITE_REG(hw, reg, value) writel(((hw)->hw_addr + (reg)), htole32(value)) - + #define AQ_READ_REG(hw, reg) le32toh(readl((hw)->hw_addr + reg)) #define AQ_WRITE_REG_BIT(hw, reg, msk, shift, value) do { \ - if (msk ^ ~0) { \ - u32 reg_old, reg_new = 0U; \ - reg_old = AQ_READ_REG(hw, reg); \ - reg_new = (reg_old & (~msk)) | (value << shift); \ - if (reg_old != reg_new) \ - AQ_WRITE_REG(hw, reg, reg_new); \ - } else { \ - AQ_WRITE_REG(hw, reg, value); \ - } } while(0) + if (msk ^ ~0) { \ + uint32_t reg_old, reg_new = 0U; \ + reg_old = AQ_READ_REG(hw, reg); \ + reg_new = (reg_old & (~msk)) | (value << shift); \ + if (reg_old != reg_new) \ + AQ_WRITE_REG(hw, reg, reg_new); \ + } else { \ + AQ_WRITE_REG(hw, reg, value); \ + } \ +} while(0) #define AQ_READ_REG_BIT(a, reg, msk, shift) ( \ - ((AQ_READ_REG(a, reg) & msk) >> shift)) + ((AQ_READ_REG(a, reg) & msk) >> shift)) #define AQ_HW_FLUSH() { (void)AQ_READ_REG(hw, 0x10); } @@ -70,104 +71,104 @@ /* Statistics */ struct aq_hw_stats { - u64 crcerrs; + uint64_t crcerrs; }; struct aq_hw_stats_s { - u32 uprc; - u32 mprc; - u32 bprc; - u32 erpt; - u32 uptc; - u32 mptc; - u32 bptc; - u32 erpr; - u32 mbtc; - u32 bbtc; - u32 mbrc; - u32 bbrc; - u32 ubrc; - u32 ubtc; - u32 ptc; - u32 prc; - u32 dpc; - u32 cprc; + uint32_t uprc; + uint32_t mprc; + uint32_t bprc; + uint32_t erpt; + uint32_t uptc; + uint32_t mptc; + uint32_t bptc; + uint32_t erpr; + uint32_t mbtc; + uint32_t bbtc; + uint32_t mbrc; + uint32_t bbrc; + uint32_t ubrc; + uint32_t ubtc; + uint32_t ptc; + uint32_t prc; + uint32_t dpc; + uint32_t cprc; } __attribute__((__packed__)); union ip_addr { - struct { - u8 addr[16]; - } v6; - struct { - u8 padding[12]; - u8 addr[4]; - } v4; + struct { + uint8_t addr[16]; + } v6; + struct { + uint8_t padding[12]; + uint8_t addr[4]; + } v4; } __attribute__((__packed__)); struct aq_hw_fw_mbox { - u32 version; - u32 transaction_id; - int error; - struct aq_hw_stats_s stats; + uint32_t version; + uint32_t transaction_id; + int error; + struct aq_hw_stats_s stats; } __attribute__((__packed__)); typedef struct aq_hw_fw_version { - union { - struct { - u16 build_number; - u8 minor_version; - u8 major_version; - }; - u32 raw; - }; + union { + struct { + uint16_t build_number; + uint8_t minor_version; + uint8_t major_version; + }; + uint32_t raw; + }; } aq_hw_fw_version; enum aq_hw_irq_type { - aq_irq_invalid = 0, - aq_irq_legacy = 1, - aq_irq_msi = 2, - aq_irq_msix = 3, + aq_irq_invalid = 0, + aq_irq_legacy = 1, + aq_irq_msi = 2, + aq_irq_msix = 3, }; struct aq_hw_fc_info { - bool fc_rx; - bool fc_tx; + bool fc_rx; + bool fc_tx; }; struct aq_hw { - void *aq_dev; - u8 *hw_addr; - u32 regs_size; - - u8 mac_addr[ETHER_ADDR_LEN]; - - enum aq_hw_irq_type irq_type; - - struct aq_hw_fc_info fc; - u16 link_rate; - - u16 device_id; - u16 subsystem_vendor_id; - u16 subsystem_device_id; - u16 vendor_id; - u8 revision_id; - - /* Interrupt Moderation value. */ - int itr; - - /* Firmware-related stuff. */ - aq_hw_fw_version fw_version; - const struct aq_firmware_ops* fw_ops; - bool rbl_enabled; - bool fast_start_enabled; - bool flash_present; - u32 chip_features; - u64 fw_caps; + void *aq_dev; + uint8_t *hw_addr; + uint32_t regs_size; + + uint8_t mac_addr[ETHER_ADDR_LEN]; + + enum aq_hw_irq_type irq_type; + + struct aq_hw_fc_info fc; + uint16_t link_rate; + + uint16_t device_id; + uint16_t subsystem_vendor_id; + uint16_t subsystem_device_id; + uint16_t vendor_id; + uint8_t revision_id; + + /* Interrupt Moderation value. */ + int itr; + + /* Firmware-related stuff. */ + aq_hw_fw_version fw_version; + const struct aq_firmware_ops* fw_ops; + bool rbl_enabled; + bool fast_start_enabled; + bool flash_present; + uint32_t chip_features; + uint64_t fw_caps; bool lro_enabled; - u32 mbox_addr; - struct aq_hw_fw_mbox mbox; + uint32_t mbox_addr; + struct aq_hw_fw_mbox mbox; }; #define aq_hw_s aq_hw @@ -217,7 +218,7 @@ struct aq_hw { #define AQ_HW_CHIP_REVISION_B0 0x02000000U #define AQ_HW_CHIP_REVISION_B1 0x04000000U #define IS_CHIP_FEATURE(HW, _F_) (AQ_HW_CHIP_##_F_ & \ - (HW)->chip_features) + (HW)->chip_features) #define AQ_HW_FW_VER_EXPECTED 0x01050006U @@ -238,22 +239,22 @@ enum hw_atl_rx_action_with_traffic { }; struct aq_rx_filter_vlan { - u8 enable; - u8 location; - u16 vlan_id; - u8 queue; + uint8_t enable; + uint8_t location; + uint16_t vlan_id; + uint8_t queue; }; #define AQ_HW_VLAN_MAX_FILTERS 16U #define AQ_HW_ETYPE_MAX_FILTERS 16U struct aq_rx_filter_l2 { - u8 enable; - s8 queue; - u8 location; - u8 user_priority_en; - u8 user_priority; - u16 ethertype; + uint8_t enable; + int8_t queue; + uint8_t location; + uint8_t user_priority_en; + uint8_t user_priority; + uint16_t ethertype; }; enum hw_atl_rx_ctrl_registers_l2 { @@ -262,12 +263,12 @@ enum hw_atl_rx_ctrl_registers_l2 { }; struct aq_rx_filter_l3l4 { - u32 cmd; - u8 location; - u32 ip_dst[4]; - u32 ip_src[4]; - u16 p_dst; - u16 p_src; + uint32_t cmd; + uint8_t location; + uint32_t ip_dst[4]; + uint32_t ip_src[4]; + uint16_t p_dst; + uint16_t p_src; bool is_ipv6; }; @@ -301,22 +302,23 @@ enum hw_atl_rx_ctrl_registers_l3l4 { ((location) - AQ_RX_FIRST_LOC_FL3L4) enum aq_hw_fw_mpi_state_e { - MPI_DEINIT = 0, - MPI_RESET = 1, - MPI_INIT = 2, - MPI_POWER = 4, + MPI_DEINIT = 0, + MPI_RESET = 1, + MPI_INIT = 2, + MPI_POWER = 4, }; -int aq_hw_get_mac_permanent(struct aq_hw *hw, u8 *mac); +int aq_hw_get_mac_permanent(struct aq_hw *hw, uint8_t *mac); -int aq_hw_mac_addr_set(struct aq_hw *hw, u8 *mac_addr, u8 index); +int aq_hw_mac_addr_set(struct aq_hw *hw, uint8_t *mac_addr, uint8_t index); /* link speed in mbps. "0" - no link detected */ -int aq_hw_get_link_state(struct aq_hw *hw, u32 *link_speed, struct aq_hw_fc_info *fc_neg); +int aq_hw_get_link_state(struct aq_hw *hw, uint32_t *link_speed, + struct aq_hw_fc_info *fc_neg); -int aq_hw_set_link_speed(struct aq_hw *hw, u32 speed); +int aq_hw_set_link_speed(struct aq_hw *hw, uint32_t speed); -int aq_hw_fw_downld_dwords(struct aq_hw *hw, u32 a, u32 *p, u32 cnt); +int aq_hw_fw_downld_dwords(struct aq_hw *hw, uint32_t a, uint32_t *p, uint32_t cnt); int aq_hw_reset(struct aq_hw *hw); @@ -324,19 +326,21 @@ int aq_hw_mpi_create(struct aq_hw *hw); int aq_hw_mpi_read_stats(struct aq_hw *hw, struct aq_hw_fw_mbox *pmbox); -int aq_hw_init(struct aq_hw *hw, u8 *mac_addr, u8 adm_irq, bool msix); +int aq_hw_init(struct aq_hw *hw, uint8_t *mac_addr, uint8_t adm_irq, bool msix); int aq_hw_start(struct aq_hw *hw); int aq_hw_interrupt_moderation_set(struct aq_hw *hw); -int aq_hw_get_fw_version(struct aq_hw *hw, u32 *fw_version); +int aq_hw_get_fw_version(struct aq_hw *hw, uint32_t *fw_version); int aq_hw_deinit(struct aq_hw *hw); -int aq_hw_ver_match(const aq_hw_fw_version* ver_expected, const aq_hw_fw_version* ver_actual); +int aq_hw_ver_match(const aq_hw_fw_version* ver_expected, + const aq_hw_fw_version* ver_actual); -void aq_hw_set_promisc(struct aq_hw_s *self, bool l2_promisc, bool vlan_promisc, bool mc_promisc); +void aq_hw_set_promisc(struct aq_hw_s *self, bool l2_promisc, bool vlan_promisc, + bool mc_promisc); int aq_hw_set_power(struct aq_hw *hw, unsigned int power_state); @@ -345,11 +349,11 @@ int aq_hw_err_from_flags(struct aq_hw *hw); int hw_atl_b0_hw_vlan_promisc_set(struct aq_hw_s *self, bool promisc); int hw_atl_b0_hw_vlan_set(struct aq_hw_s *self, - struct aq_rx_filter_vlan *aq_vlans); + struct aq_rx_filter_vlan *aq_vlans); -int aq_hw_rss_hash_set(struct aq_hw_s *self, u8 rss_key[HW_ATL_RSS_HASHKEY_SIZE]); -int aq_hw_rss_hash_get(struct aq_hw_s *self, u8 rss_key[HW_ATL_RSS_HASHKEY_SIZE]); -int aq_hw_rss_set(struct aq_hw_s *self, u8 rss_table[HW_ATL_RSS_INDIRECTION_TABLE_MAX]); +int aq_hw_rss_hash_set(struct aq_hw_s *self, uint8_t rss_key[HW_ATL_RSS_HASHKEY_SIZE]); +int aq_hw_rss_hash_get(struct aq_hw_s *self, uint8_t rss_key[HW_ATL_RSS_HASHKEY_SIZE]); +int aq_hw_rss_set(struct aq_hw_s *self, uint8_t rss_table[HW_ATL_RSS_INDIRECTION_TABLE_MAX]); int aq_hw_udp_rss_enable(struct aq_hw_s *self, bool enable); #endif //_AQ_HW_H_ diff --git a/sys/dev/aq/aq_hw_llh.c b/sys/dev/aq/aq_hw_llh.c index b5e91829c3be..87384ad46618 100644 --- a/sys/dev/aq/aq_hw_llh.c +++ b/sys/dev/aq/aq_hw_llh.c @@ -43,896 +43,956 @@ /* global */ -void reg_glb_fw_image_id1_set(struct aq_hw* hw, u32 value) +void +reg_glb_fw_image_id1_set(struct aq_hw* hw, uint32_t value) { - AQ_WRITE_REG(hw, glb_fw_image_id1_adr, value); + AQ_WRITE_REG(hw, glb_fw_image_id1_adr, value); } -u32 reg_glb_fw_image_id1_get(struct aq_hw* hw) +uint32_t +reg_glb_fw_image_id1_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, glb_fw_image_id1_adr); + return AQ_READ_REG(hw, glb_fw_image_id1_adr); } -void reg_glb_cpu_sem_set(struct aq_hw *aq_hw, u32 sem_value, u32 sem_index) +void +reg_glb_cpu_sem_set(struct aq_hw *aq_hw, uint32_t sem_value, uint32_t sem_index) { - AQ_WRITE_REG(aq_hw, glb_cpu_sem_adr(sem_index), sem_value); + AQ_WRITE_REG(aq_hw, glb_cpu_sem_adr(sem_index), sem_value); } -u32 reg_glb_cpu_sem_get(struct aq_hw *aq_hw, u32 sem_index) +uint32_t +reg_glb_cpu_sem_get(struct aq_hw *aq_hw, uint32_t sem_index) { - return AQ_READ_REG(aq_hw, glb_cpu_sem_adr(sem_index)); + return AQ_READ_REG(aq_hw, glb_cpu_sem_adr(sem_index)); } -u32 reg_glb_standard_ctl1_get(struct aq_hw* hw) +uint32_t +reg_glb_standard_ctl1_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, glb_standard_ctl1_adr); + return AQ_READ_REG(hw, glb_standard_ctl1_adr); } -void reg_glb_standard_ctl1_set(struct aq_hw* hw, u32 glb_standard_ctl1) +void +reg_glb_standard_ctl1_set(struct aq_hw* hw, uint32_t glb_standard_ctl1) { - AQ_WRITE_REG(hw, glb_standard_ctl1_adr, glb_standard_ctl1); + AQ_WRITE_REG(hw, glb_standard_ctl1_adr, glb_standard_ctl1); } -void reg_global_ctl2_set(struct aq_hw* hw, u32 global_ctl2) +void +reg_global_ctl2_set(struct aq_hw* hw, uint32_t global_ctl2) { - AQ_WRITE_REG(hw, glb_ctl2_adr, global_ctl2); + AQ_WRITE_REG(hw, glb_ctl2_adr, global_ctl2); } -u32 reg_global_ctl2_get(struct aq_hw* hw) +uint32_t +reg_global_ctl2_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, glb_ctl2_adr); + return AQ_READ_REG(hw, glb_ctl2_adr); } -void reg_glb_daisy_chain_status1_set(struct aq_hw* hw, u32 glb_daisy_chain_status1) +void +reg_glb_daisy_chain_status1_set(struct aq_hw* hw, uint32_t glb_daisy_chain_status1) { - AQ_WRITE_REG(hw, glb_daisy_chain_status1_adr, glb_daisy_chain_status1); + AQ_WRITE_REG(hw, glb_daisy_chain_status1_adr, glb_daisy_chain_status1); } -u32 reg_glb_daisy_chain_status1_get(struct aq_hw* hw) +uint32_t +reg_glb_daisy_chain_status1_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, glb_daisy_chain_status1_adr); + return AQ_READ_REG(hw, glb_daisy_chain_status1_adr); } -void glb_glb_reg_res_dis_set(struct aq_hw *aq_hw, u32 glb_reg_res_dis) +void +glb_glb_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t glb_reg_res_dis) { - AQ_WRITE_REG_BIT(aq_hw, glb_reg_res_dis_adr, - glb_reg_res_dis_msk, - glb_reg_res_dis_shift, - glb_reg_res_dis); + AQ_WRITE_REG_BIT(aq_hw, glb_reg_res_dis_adr, glb_reg_res_dis_msk, + glb_reg_res_dis_shift, glb_reg_res_dis); } -void glb_soft_res_set(struct aq_hw *aq_hw, u32 soft_res) +void +glb_soft_res_set(struct aq_hw *aq_hw, uint32_t soft_res) { - AQ_WRITE_REG_BIT(aq_hw, glb_soft_res_adr, glb_soft_res_msk, - glb_soft_res_shift, soft_res); + AQ_WRITE_REG_BIT(aq_hw, glb_soft_res_adr, glb_soft_res_msk, + glb_soft_res_shift, soft_res); } -u32 glb_soft_res_get(struct aq_hw *aq_hw) +uint32_t +glb_soft_res_get(struct aq_hw *aq_hw) { - return AQ_READ_REG_BIT(aq_hw, glb_soft_res_adr, - glb_soft_res_msk, - glb_soft_res_shift); + return AQ_READ_REG_BIT(aq_hw, glb_soft_res_adr, glb_soft_res_msk, + glb_soft_res_shift); } -u32 reg_rx_dma_stat_counter7get(struct aq_hw *aq_hw) +uint32_t +reg_rx_dma_stat_counter7get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, rx_dma_stat_counter7_adr); + return AQ_READ_REG(aq_hw, rx_dma_stat_counter7_adr); } -u32 reg_glb_mif_id_get(struct aq_hw *aq_hw) +uint32_t +reg_glb_mif_id_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, glb_mif_id_adr); + return AQ_READ_REG(aq_hw, glb_mif_id_adr); } -void mpi_tx_reg_res_dis_set(struct aq_hw* hw, u32 mpi_tx_reg_res_dis) +void +mpi_tx_reg_res_dis_set(struct aq_hw* hw, uint32_t mpi_tx_reg_res_dis) { - AQ_WRITE_REG_BIT(hw, mpi_tx_reg_res_dis_adr, - mpi_tx_reg_res_dis_msk, mpi_tx_reg_res_dis_shift, mpi_tx_reg_res_dis); + AQ_WRITE_REG_BIT(hw, mpi_tx_reg_res_dis_adr, mpi_tx_reg_res_dis_msk, + mpi_tx_reg_res_dis_shift, mpi_tx_reg_res_dis); } -u32 mpi_tx_reg_res_dis_get(struct aq_hw* hw) +uint32_t +mpi_tx_reg_res_dis_get(struct aq_hw* hw) { - return AQ_READ_REG_BIT(hw, mpi_tx_reg_res_dis_adr, - mpi_tx_reg_res_dis_msk, mpi_tx_reg_res_dis_shift); + return AQ_READ_REG_BIT(hw, mpi_tx_reg_res_dis_adr, + mpi_tx_reg_res_dis_msk, mpi_tx_reg_res_dis_shift); } /* stats */ -u32 rpb_rx_dma_drop_pkt_cnt_get(struct aq_hw *aq_hw) +uint32_t +rpb_rx_dma_drop_pkt_cnt_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, rpb_rx_dma_drop_pkt_cnt_adr); + return AQ_READ_REG(aq_hw, rpb_rx_dma_drop_pkt_cnt_adr); } -u32 stats_rx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw) +uint32_t +stats_rx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_rx_dma_good_octet_counterlsw__adr); + return AQ_READ_REG(aq_hw, stats_rx_dma_good_octet_counterlsw__adr); } -u32 stats_rx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw) +uint32_t +stats_rx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_rx_dma_good_pkt_counterlsw__adr); + return AQ_READ_REG(aq_hw, stats_rx_dma_good_pkt_counterlsw__adr); } -u32 stats_tx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw) +uint32_t +stats_tx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_tx_dma_good_octet_counterlsw__adr); + return AQ_READ_REG(aq_hw, stats_tx_dma_good_octet_counterlsw__adr); } -u32 stats_tx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw) +uint32_t +stats_tx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_tx_dma_good_pkt_counterlsw__adr); + return AQ_READ_REG(aq_hw, stats_tx_dma_good_pkt_counterlsw__adr); } -u32 stats_rx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw) +uint32_t +stats_rx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_rx_dma_good_octet_countermsw__adr); + return AQ_READ_REG(aq_hw, stats_rx_dma_good_octet_countermsw__adr); } -u32 stats_rx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw) +uint32_t +stats_rx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_rx_dma_good_pkt_countermsw__adr); + return AQ_READ_REG(aq_hw, stats_rx_dma_good_pkt_countermsw__adr); } -u32 stats_tx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw) +uint32_t +stats_tx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_tx_dma_good_octet_countermsw__adr); + return AQ_READ_REG(aq_hw, stats_tx_dma_good_octet_countermsw__adr); } -u32 stats_tx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw) +uint32_t +stats_tx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_tx_dma_good_pkt_countermsw__adr); + return AQ_READ_REG(aq_hw, stats_tx_dma_good_pkt_countermsw__adr); } -u32 stats_rx_lro_coalesced_pkt_count0_get(struct aq_hw *aq_hw) +uint32_t +stats_rx_lro_coalesced_pkt_count0_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_rx_lo_coalesced_pkt_count0__addr); + return AQ_READ_REG(aq_hw, stats_rx_lo_coalesced_pkt_count0__addr); } /* interrupt */ -void itr_irq_auto_masklsw_set(struct aq_hw *aq_hw, u32 irq_auto_masklsw) +void +itr_irq_auto_masklsw_set(struct aq_hw *aq_hw, uint32_t irq_auto_masklsw) { - AQ_WRITE_REG(aq_hw, itr_iamrlsw_adr, irq_auto_masklsw); + AQ_WRITE_REG(aq_hw, itr_iamrlsw_adr, irq_auto_masklsw); } -void itr_irq_map_en_rx_set(struct aq_hw *aq_hw, u32 irq_map_en_rx, u32 rx) +void +itr_irq_map_en_rx_set(struct aq_hw *aq_hw, uint32_t irq_map_en_rx, uint32_t rx) { /* register address for bitfield imr_rx{r}_en */ - static u32 itr_imr_rxren_adr[32] = { - 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, - 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, - 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, - 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, - 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, - 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, - 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, - 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU - }; + static uint32_t itr_imr_rxren_adr[32] = { + 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, + 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, + 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, + 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, + 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, + 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, + 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, + 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU + }; /* bitmask for bitfield imr_rx{r}_en */ - static u32 itr_imr_rxren_msk[32] = { - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U - }; + static uint32_t itr_imr_rxren_msk[32] = { + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U + }; /* lower bit position of bitfield imr_rx{r}_en */ - static u32 itr_imr_rxren_shift[32] = { - 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U, - 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U, - 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U, - 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U - }; + static uint32_t itr_imr_rxren_shift[32] = { + 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U, + 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U, + 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U, + 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U + }; - AQ_WRITE_REG_BIT(aq_hw, itr_imr_rxren_adr[rx], - itr_imr_rxren_msk[rx], - itr_imr_rxren_shift[rx], - irq_map_en_rx); + AQ_WRITE_REG_BIT(aq_hw, itr_imr_rxren_adr[rx], itr_imr_rxren_msk[rx], + itr_imr_rxren_shift[rx], irq_map_en_rx); } -void itr_irq_map_en_tx_set(struct aq_hw *aq_hw, u32 irq_map_en_tx, u32 tx) +void +itr_irq_map_en_tx_set(struct aq_hw *aq_hw, uint32_t irq_map_en_tx, uint32_t tx) { /* register address for bitfield imr_tx{t}_en */ - static u32 itr_imr_txten_adr[32] = { - 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, - 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, - 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, - 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, - 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, - 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, - 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, - 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU - }; + static uint32_t itr_imr_txten_adr[32] = { + 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, + 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, + 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, + 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, + 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, + 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, + 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, + 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU + }; /* bitmask for bitfield imr_tx{t}_en */ - static u32 itr_imr_txten_msk[32] = { - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U - }; + static uint32_t itr_imr_txten_msk[32] = { + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U + }; /* lower bit position of bitfield imr_tx{t}_en */ - static u32 itr_imr_txten_shift[32] = { - 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U, - 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U, - 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U, - 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U - }; + static uint32_t itr_imr_txten_shift[32] = { + 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U, + 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U, + 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U, + 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U + }; - AQ_WRITE_REG_BIT(aq_hw, itr_imr_txten_adr[tx], - itr_imr_txten_msk[tx], - itr_imr_txten_shift[tx], - irq_map_en_tx); + AQ_WRITE_REG_BIT(aq_hw, itr_imr_txten_adr[tx], itr_imr_txten_msk[tx], + itr_imr_txten_shift[tx], irq_map_en_tx); } -void itr_irq_map_rx_set(struct aq_hw *aq_hw, u32 irq_map_rx, u32 rx) +void +itr_irq_map_rx_set(struct aq_hw *aq_hw, uint32_t irq_map_rx, uint32_t rx) { /* register address for bitfield imr_rx{r}[4:0] */ - static u32 itr_imr_rxr_adr[32] = { - 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, - 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, - 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, - 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, - 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, - 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, - 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, - 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU - }; + static uint32_t itr_imr_rxr_adr[32] = { + 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, + 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, + 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, + 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, + 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, + 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, + 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, + 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU + }; /* bitmask for bitfield imr_rx{r}[4:0] */ - static u32 itr_imr_rxr_msk[32] = { - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU - }; + static uint32_t itr_imr_rxr_msk[32] = { + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU + }; /* lower bit position of bitfield imr_rx{r}[4:0] */ - static u32 itr_imr_rxr_shift[32] = { - 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, - 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, - 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, - 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U - }; + static uint32_t itr_imr_rxr_shift[32] = { + 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, + 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, + 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, + 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U + }; - AQ_WRITE_REG_BIT(aq_hw, itr_imr_rxr_adr[rx], - itr_imr_rxr_msk[rx], - itr_imr_rxr_shift[rx], - irq_map_rx); + AQ_WRITE_REG_BIT(aq_hw, itr_imr_rxr_adr[rx], itr_imr_rxr_msk[rx], + itr_imr_rxr_shift[rx], irq_map_rx); } -void itr_irq_map_tx_set(struct aq_hw *aq_hw, u32 irq_map_tx, u32 tx) +void +itr_irq_map_tx_set(struct aq_hw *aq_hw, uint32_t irq_map_tx, uint32_t tx) { /* register address for bitfield imr_tx{t}[4:0] */ - static u32 itr_imr_txt_adr[32] = { - 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, - 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, - 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, - 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, - 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, - 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, - 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, - 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU - }; + static uint32_t itr_imr_txt_adr[32] = { + 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, + 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, + 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, + 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, + 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, + 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, + 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, + 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU + }; /* bitmask for bitfield imr_tx{t}[4:0] */ - static u32 itr_imr_txt_msk[32] = { - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U - }; + static uint32_t itr_imr_txt_msk[32] = { + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U + }; /* lower bit position of bitfield imr_tx{t}[4:0] */ - static u32 itr_imr_txt_shift[32] = { - 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U, - 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U, - 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U, - 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U - }; + static uint32_t itr_imr_txt_shift[32] = { + 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U, + 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U, + 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U, + 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U + }; - AQ_WRITE_REG_BIT(aq_hw, itr_imr_txt_adr[tx], - itr_imr_txt_msk[tx], - itr_imr_txt_shift[tx], - irq_map_tx); + AQ_WRITE_REG_BIT(aq_hw, itr_imr_txt_adr[tx], itr_imr_txt_msk[tx], + itr_imr_txt_shift[tx], irq_map_tx); } -void itr_irq_msk_clearlsw_set(struct aq_hw *aq_hw, u32 irq_msk_clearlsw) +void +itr_irq_msk_clearlsw_set(struct aq_hw *aq_hw, uint32_t irq_msk_clearlsw) { - AQ_WRITE_REG(aq_hw, itr_imcrlsw_adr, irq_msk_clearlsw); + AQ_WRITE_REG(aq_hw, itr_imcrlsw_adr, irq_msk_clearlsw); } -void itr_irq_msk_setlsw_set(struct aq_hw *aq_hw, u32 irq_msk_setlsw) +void +itr_irq_msk_setlsw_set(struct aq_hw *aq_hw, uint32_t irq_msk_setlsw) { - AQ_WRITE_REG(aq_hw, itr_imsrlsw_adr, irq_msk_setlsw); + AQ_WRITE_REG(aq_hw, itr_imsrlsw_adr, irq_msk_setlsw); } -void itr_irq_reg_res_dis_set(struct aq_hw *aq_hw, u32 irq_reg_res_dis) +void +itr_irq_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t irq_reg_res_dis) { - AQ_WRITE_REG_BIT(aq_hw, itr_reg_res_dsbl_adr, - itr_reg_res_dsbl_msk, - itr_reg_res_dsbl_shift, irq_reg_res_dis); + AQ_WRITE_REG_BIT(aq_hw, itr_reg_res_dsbl_adr, itr_reg_res_dsbl_msk, + itr_reg_res_dsbl_shift, irq_reg_res_dis); } -void itr_irq_status_clearlsw_set(struct aq_hw *aq_hw, - u32 irq_status_clearlsw) +void +itr_irq_status_clearlsw_set(struct aq_hw *aq_hw, uint32_t irq_status_clearlsw) { - AQ_WRITE_REG(aq_hw, itr_iscrlsw_adr, irq_status_clearlsw); + AQ_WRITE_REG(aq_hw, itr_iscrlsw_adr, irq_status_clearlsw); } -u32 itr_irq_statuslsw_get(struct aq_hw *aq_hw) +uint32_t +itr_irq_statuslsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, itr_isrlsw_adr); + return AQ_READ_REG(aq_hw, itr_isrlsw_adr); } -u32 itr_res_irq_get(struct aq_hw *aq_hw) +uint32_t +itr_res_irq_get(struct aq_hw *aq_hw) { - return AQ_READ_REG_BIT(aq_hw, itr_res_adr, itr_res_msk, - itr_res_shift); + return AQ_READ_REG_BIT(aq_hw, itr_res_adr, itr_res_msk, itr_res_shift); } -void itr_res_irq_set(struct aq_hw *aq_hw, u32 res_irq) +void +itr_res_irq_set(struct aq_hw *aq_hw, uint32_t res_irq) { - AQ_WRITE_REG_BIT(aq_hw, itr_res_adr, itr_res_msk, - itr_res_shift, res_irq); + AQ_WRITE_REG_BIT(aq_hw, itr_res_adr, itr_res_msk, itr_res_shift, + res_irq); } -void itr_link_int_map_en_set(struct aq_hw *aq_hw, u32 link_int_en_map_en) +void +itr_link_int_map_en_set(struct aq_hw *aq_hw, uint32_t link_int_en_map_en) { - AQ_WRITE_REG_BIT(aq_hw, itrImrLinkEn_ADR, itrImrLinkEn_MSK, itrImrLinkEn_SHIFT, link_int_en_map_en); + AQ_WRITE_REG_BIT(aq_hw, itrImrLinkEn_ADR, itrImrLinkEn_MSK, + itrImrLinkEn_SHIFT, link_int_en_map_en); } -u32 itr_link_int_map_en_get(struct aq_hw *aq_hw) +uint32_t +itr_link_int_map_en_get(struct aq_hw *aq_hw) { - return AQ_READ_REG_BIT(aq_hw, itrImrLinkEn_ADR, itrImrLinkEn_MSK, itrImrLinkEn_SHIFT); + return AQ_READ_REG_BIT(aq_hw, itrImrLinkEn_ADR, itrImrLinkEn_MSK, + itrImrLinkEn_SHIFT); } -void itr_link_int_map_set(struct aq_hw *aq_hw, u32 link_int_map) +void +itr_link_int_map_set(struct aq_hw *aq_hw, uint32_t link_int_map) { - AQ_WRITE_REG_BIT(aq_hw, itrImrLink_ADR, itrImrLink_MSK, itrImrLink_SHIFT, link_int_map); + AQ_WRITE_REG_BIT(aq_hw, itrImrLink_ADR, itrImrLink_MSK, + itrImrLink_SHIFT, link_int_map); } -u32 itr_link_int_map_get(struct aq_hw *aq_hw) +uint32_t +itr_link_int_map_get(struct aq_hw *aq_hw) { - return AQ_READ_REG_BIT(aq_hw, itrImrLink_ADR, itrImrLink_MSK, itrImrLink_SHIFT); + return AQ_READ_REG_BIT(aq_hw, itrImrLink_ADR, itrImrLink_MSK, + itrImrLink_SHIFT); } -void itr_mif_int_map_en_set(struct aq_hw *aq_hw, u32 mifInterruptMappingEnable, u32 mif) +void +itr_mif_int_map_en_set(struct aq_hw *aq_hw, uint32_t mifInterruptMappingEnable, + uint32_t mif) { - AQ_WRITE_REG_BIT(aq_hw, itrImrMifMEn_ADR(mif), itrImrMifMEn_MSK(mif), itrImrMifMEn_SHIFT(mif), mifInterruptMappingEnable); + AQ_WRITE_REG_BIT(aq_hw, itrImrMifMEn_ADR(mif), itrImrMifMEn_MSK(mif), + itrImrMifMEn_SHIFT(mif), mifInterruptMappingEnable); } -u32 itr_mif_int_map_en_get(struct aq_hw *aq_hw, u32 mif) +uint32_t +itr_mif_int_map_en_get(struct aq_hw *aq_hw, uint32_t mif) { - return AQ_READ_REG_BIT(aq_hw, itrImrMifMEn_ADR(mif), itrImrMifMEn_MSK(mif), itrImrMifMEn_SHIFT(mif)); + return AQ_READ_REG_BIT(aq_hw, itrImrMifMEn_ADR(mif), + itrImrMifMEn_MSK(mif), itrImrMifMEn_SHIFT(mif)); } -void itr_mif_int_map_set(struct aq_hw *aq_hw, u32 mifInterruptMapping, u32 mif) +void +itr_mif_int_map_set(struct aq_hw *aq_hw, uint32_t mifInterruptMapping, uint32_t mif) { - AQ_WRITE_REG_BIT(aq_hw, itrImrMifM_ADR(mif), itrImrMifM_MSK(mif), itrImrMifM_SHIFT(mif), mifInterruptMapping); + AQ_WRITE_REG_BIT(aq_hw, itrImrMifM_ADR(mif), itrImrMifM_MSK(mif), + itrImrMifM_SHIFT(mif), mifInterruptMapping); } -u32 itr_mif_int_map_get(struct aq_hw *aq_hw, u32 mif) +uint32_t +itr_mif_int_map_get(struct aq_hw *aq_hw, uint32_t mif) { - return AQ_READ_REG_BIT(aq_hw, itrImrMifM_ADR(mif), itrImrMifM_MSK(mif), itrImrMifM_SHIFT(mif)); -} + return AQ_READ_REG_BIT(aq_hw, itrImrMifM_ADR(mif), itrImrMifM_MSK(mif), + itrImrMifM_SHIFT(mif)); +} -void itr_irq_mode_set(struct aq_hw *aq_hw, u32 irq_mode) +void +itr_irq_mode_set(struct aq_hw *aq_hw, uint32_t irq_mode) { - AQ_WRITE_REG_BIT(aq_hw, itrIntMode_ADR, itrIntMode_MSK, itrIntMode_SHIFT, irq_mode); + AQ_WRITE_REG_BIT(aq_hw, itrIntMode_ADR, itrIntMode_MSK, + itrIntMode_SHIFT, irq_mode); } -void itr_irq_status_cor_en_set(struct aq_hw *aq_hw, u32 irq_status_cor_en) +void +itr_irq_status_cor_en_set(struct aq_hw *aq_hw, uint32_t irq_status_cor_en) { - AQ_WRITE_REG_BIT(aq_hw, itrIsrCorEn_ADR, itrIsrCorEn_MSK, itrIsrCorEn_SHIFT, irq_status_cor_en); + AQ_WRITE_REG_BIT(aq_hw, itrIsrCorEn_ADR, itrIsrCorEn_MSK, + itrIsrCorEn_SHIFT, irq_status_cor_en); } -void itr_irq_auto_mask_clr_en_set(struct aq_hw *aq_hw, u32 irq_auto_mask_clr_en) +void +itr_irq_auto_mask_clr_en_set(struct aq_hw *aq_hw, uint32_t irq_auto_mask_clr_en) { - AQ_WRITE_REG_BIT(aq_hw, itrIamrClrEn_ADR, itrIamrClrEn_MSK, itrIamrClrEn_SHIFT, irq_auto_mask_clr_en); + AQ_WRITE_REG_BIT(aq_hw, itrIamrClrEn_ADR, itrIamrClrEn_MSK, + itrIamrClrEn_SHIFT, irq_auto_mask_clr_en); } /* rdm */ -void rdm_cpu_id_set(struct aq_hw *aq_hw, u32 cpuid, u32 dca) +void +rdm_cpu_id_set(struct aq_hw *aq_hw, uint32_t cpuid, uint32_t dca) { - AQ_WRITE_REG_BIT(aq_hw, rdm_dcadcpuid_adr(dca), - rdm_dcadcpuid_msk, - rdm_dcadcpuid_shift, cpuid); + AQ_WRITE_REG_BIT(aq_hw, rdm_dcadcpuid_adr(dca), rdm_dcadcpuid_msk, + rdm_dcadcpuid_shift, cpuid); } -void rdm_rx_dca_en_set(struct aq_hw *aq_hw, u32 rx_dca_en) +void +rdm_rx_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_dca_en) { - AQ_WRITE_REG_BIT(aq_hw, rdm_dca_en_adr, rdm_dca_en_msk, - rdm_dca_en_shift, rx_dca_en); + AQ_WRITE_REG_BIT(aq_hw, rdm_dca_en_adr, rdm_dca_en_msk, + rdm_dca_en_shift, rx_dca_en); } -void rdm_rx_dca_mode_set(struct aq_hw *aq_hw, u32 rx_dca_mode) +void +rdm_rx_dca_mode_set(struct aq_hw *aq_hw, uint32_t rx_dca_mode) { - AQ_WRITE_REG_BIT(aq_hw, rdm_dca_mode_adr, rdm_dca_mode_msk, - rdm_dca_mode_shift, rx_dca_mode); + AQ_WRITE_REG_BIT(aq_hw, rdm_dca_mode_adr, rdm_dca_mode_msk, + rdm_dca_mode_shift, rx_dca_mode); } -void rdm_rx_desc_data_buff_size_set(struct aq_hw *aq_hw, - u32 rx_desc_data_buff_size, u32 descriptor) +void +rdm_rx_desc_data_buff_size_set(struct aq_hw *aq_hw, uint32_t rx_desc_data_buff_size, + uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, rdm_descddata_size_adr(descriptor), - rdm_descddata_size_msk, - rdm_descddata_size_shift, - rx_desc_data_buff_size); + AQ_WRITE_REG_BIT(aq_hw, rdm_descddata_size_adr(descriptor), + rdm_descddata_size_msk, rdm_descddata_size_shift, + rx_desc_data_buff_size); } -void rdm_rx_desc_dca_en_set(struct aq_hw *aq_hw, u32 rx_desc_dca_en, u32 dca) +void +rdm_rx_desc_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_desc_dca_en, uint32_t dca) { - AQ_WRITE_REG_BIT(aq_hw, rdm_dcaddesc_en_adr(dca), - rdm_dcaddesc_en_msk, - rdm_dcaddesc_en_shift, - rx_desc_dca_en); + AQ_WRITE_REG_BIT(aq_hw, rdm_dcaddesc_en_adr(dca), rdm_dcaddesc_en_msk, + rdm_dcaddesc_en_shift, rx_desc_dca_en); } -void rdm_rx_desc_en_set(struct aq_hw *aq_hw, u32 rx_desc_en, u32 descriptor) +void +rdm_rx_desc_en_set(struct aq_hw *aq_hw, uint32_t rx_desc_en, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, rdm_descden_adr(descriptor), - rdm_descden_msk, - rdm_descden_shift, - rx_desc_en); + AQ_WRITE_REG_BIT(aq_hw, rdm_descden_adr(descriptor), rdm_descden_msk, + rdm_descden_shift, rx_desc_en); } -void rdm_rx_desc_head_buff_size_set(struct aq_hw *aq_hw, - u32 rx_desc_head_buff_size, u32 descriptor) +void +rdm_rx_desc_head_buff_size_set(struct aq_hw *aq_hw, + uint32_t rx_desc_head_buff_size, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, rdm_descdhdr_size_adr(descriptor), - rdm_descdhdr_size_msk, - rdm_descdhdr_size_shift, - rx_desc_head_buff_size); + AQ_WRITE_REG_BIT(aq_hw, rdm_descdhdr_size_adr(descriptor), + rdm_descdhdr_size_msk, rdm_descdhdr_size_shift, + rx_desc_head_buff_size); } -void rdm_rx_desc_head_splitting_set(struct aq_hw *aq_hw, - u32 rx_desc_head_splitting, u32 descriptor) +void +rdm_rx_desc_head_splitting_set(struct aq_hw *aq_hw, + uint32_t rx_desc_head_splitting, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, rdm_descdhdr_split_adr(descriptor), - rdm_descdhdr_split_msk, - rdm_descdhdr_split_shift, - rx_desc_head_splitting); + AQ_WRITE_REG_BIT(aq_hw, rdm_descdhdr_split_adr(descriptor), + rdm_descdhdr_split_msk, rdm_descdhdr_split_shift, + rx_desc_head_splitting); } -u32 rdm_rx_desc_head_ptr_get(struct aq_hw *aq_hw, u32 descriptor) +uint32_t +rdm_rx_desc_head_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor) { - return AQ_READ_REG_BIT(aq_hw, rdm_descdhd_adr(descriptor), - rdm_descdhd_msk, rdm_descdhd_shift); + return AQ_READ_REG_BIT(aq_hw, rdm_descdhd_adr(descriptor), + rdm_descdhd_msk, rdm_descdhd_shift); } -void rdm_rx_desc_len_set(struct aq_hw *aq_hw, u32 rx_desc_len, u32 descriptor) +void +rdm_rx_desc_len_set(struct aq_hw *aq_hw, uint32_t rx_desc_len, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, rdm_descdlen_adr(descriptor), - rdm_descdlen_msk, rdm_descdlen_shift, - rx_desc_len); + AQ_WRITE_REG_BIT(aq_hw, rdm_descdlen_adr(descriptor), rdm_descdlen_msk, + rdm_descdlen_shift, rx_desc_len); } -void rdm_rx_desc_res_set(struct aq_hw *aq_hw, u32 rx_desc_res, u32 descriptor) +void +rdm_rx_desc_res_set(struct aq_hw *aq_hw, uint32_t rx_desc_res, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, rdm_descdreset_adr(descriptor), - rdm_descdreset_msk, rdm_descdreset_shift, - rx_desc_res); + AQ_WRITE_REG_BIT(aq_hw, rdm_descdreset_adr(descriptor), + rdm_descdreset_msk, rdm_descdreset_shift, rx_desc_res); } -void rdm_rx_desc_wr_wb_irq_en_set(struct aq_hw *aq_hw, - u32 rx_desc_wr_wb_irq_en) +void +rdm_rx_desc_wr_wb_irq_en_set(struct aq_hw *aq_hw, + uint32_t rx_desc_wr_wb_irq_en) { - AQ_WRITE_REG_BIT(aq_hw, rdm_int_desc_wrb_en_adr, - rdm_int_desc_wrb_en_msk, - rdm_int_desc_wrb_en_shift, - rx_desc_wr_wb_irq_en); + AQ_WRITE_REG_BIT(aq_hw, rdm_int_desc_wrb_en_adr, + rdm_int_desc_wrb_en_msk, rdm_int_desc_wrb_en_shift, + rx_desc_wr_wb_irq_en); } -void rdm_rx_head_dca_en_set(struct aq_hw *aq_hw, u32 rx_head_dca_en, u32 dca) +void +rdm_rx_head_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_head_dca_en, uint32_t dca) { - AQ_WRITE_REG_BIT(aq_hw, rdm_dcadhdr_en_adr(dca), - rdm_dcadhdr_en_msk, - rdm_dcadhdr_en_shift, - rx_head_dca_en); + AQ_WRITE_REG_BIT(aq_hw, rdm_dcadhdr_en_adr(dca), rdm_dcadhdr_en_msk, + rdm_dcadhdr_en_shift, rx_head_dca_en); } -void rdm_rx_pld_dca_en_set(struct aq_hw *aq_hw, u32 rx_pld_dca_en, u32 dca) +void +rdm_rx_pld_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_pld_dca_en, uint32_t dca) { - AQ_WRITE_REG_BIT(aq_hw, rdm_dcadpay_en_adr(dca), - rdm_dcadpay_en_msk, rdm_dcadpay_en_shift, - rx_pld_dca_en); + AQ_WRITE_REG_BIT(aq_hw, rdm_dcadpay_en_adr(dca), rdm_dcadpay_en_msk, + rdm_dcadpay_en_shift, rx_pld_dca_en); } -void rdm_rdm_intr_moder_en_set(struct aq_hw *aq_hw, u32 rdm_intr_moder_en) +void +rdm_rdm_intr_moder_en_set(struct aq_hw *aq_hw, uint32_t rdm_intr_moder_en) { - AQ_WRITE_REG_BIT(aq_hw, rdm_int_rim_en_adr, - rdm_int_rim_en_msk, - rdm_int_rim_en_shift, - rdm_intr_moder_en); + AQ_WRITE_REG_BIT(aq_hw, rdm_int_rim_en_adr, rdm_int_rim_en_msk, + rdm_int_rim_en_shift, rdm_intr_moder_en); } /* reg */ -void reg_gen_irq_map_set(struct aq_hw *aq_hw, u32 gen_intr_map, u32 regidx) +void +reg_gen_irq_map_set(struct aq_hw *aq_hw, uint32_t gen_intr_map, uint32_t regidx) { - AQ_WRITE_REG(aq_hw, gen_intr_map_adr(regidx), gen_intr_map); + AQ_WRITE_REG(aq_hw, gen_intr_map_adr(regidx), gen_intr_map); } -u32 reg_gen_irq_status_get(struct aq_hw *aq_hw) +uint32_t +reg_gen_irq_status_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, gen_intr_stat_adr); + return AQ_READ_REG(aq_hw, gen_intr_stat_adr); } -void reg_irq_glb_ctl_set(struct aq_hw *aq_hw, u32 intr_glb_ctl) +void +reg_irq_glb_ctl_set(struct aq_hw *aq_hw, uint32_t intr_glb_ctl) { - AQ_WRITE_REG(aq_hw, intr_glb_ctl_adr, intr_glb_ctl); + AQ_WRITE_REG(aq_hw, intr_glb_ctl_adr, intr_glb_ctl); } -void reg_irq_thr_set(struct aq_hw *aq_hw, u32 intr_thr, u32 throttle) +void +reg_irq_thr_set(struct aq_hw *aq_hw, uint32_t intr_thr, uint32_t throttle) { - AQ_WRITE_REG(aq_hw, intr_thr_adr(throttle), intr_thr); + AQ_WRITE_REG(aq_hw, intr_thr_adr(throttle), intr_thr); } -void reg_rx_dma_desc_base_addresslswset(struct aq_hw *aq_hw, - u32 rx_dma_desc_base_addrlsw, - u32 descriptor) +void +reg_rx_dma_desc_base_addresslswset(struct aq_hw *aq_hw, + uint32_t rx_dma_desc_base_addrlsw, uint32_t descriptor) { - AQ_WRITE_REG(aq_hw, rx_dma_desc_base_addrlsw_adr(descriptor), - rx_dma_desc_base_addrlsw); + AQ_WRITE_REG(aq_hw, rx_dma_desc_base_addrlsw_adr(descriptor), + rx_dma_desc_base_addrlsw); } -void reg_rx_dma_desc_base_addressmswset(struct aq_hw *aq_hw, - u32 rx_dma_desc_base_addrmsw, - u32 descriptor) +void +reg_rx_dma_desc_base_addressmswset(struct aq_hw *aq_hw, + uint32_t rx_dma_desc_base_addrmsw, uint32_t descriptor) { - AQ_WRITE_REG(aq_hw, rx_dma_desc_base_addrmsw_adr(descriptor), - rx_dma_desc_base_addrmsw); + AQ_WRITE_REG(aq_hw, rx_dma_desc_base_addrmsw_adr(descriptor), + rx_dma_desc_base_addrmsw); } -u32 reg_rx_dma_desc_status_get(struct aq_hw *aq_hw, u32 descriptor) +uint32_t +reg_rx_dma_desc_status_get(struct aq_hw *aq_hw, uint32_t descriptor) { - return AQ_READ_REG(aq_hw, rx_dma_desc_stat_adr(descriptor)); + return AQ_READ_REG(aq_hw, rx_dma_desc_stat_adr(descriptor)); } -void reg_rx_dma_desc_tail_ptr_set(struct aq_hw *aq_hw, - u32 rx_dma_desc_tail_ptr, u32 descriptor) +void +reg_rx_dma_desc_tail_ptr_set(struct aq_hw *aq_hw, + uint32_t rx_dma_desc_tail_ptr, uint32_t descriptor) { - AQ_WRITE_REG(aq_hw, rx_dma_desc_tail_ptr_adr(descriptor), - rx_dma_desc_tail_ptr); + AQ_WRITE_REG(aq_hw, rx_dma_desc_tail_ptr_adr(descriptor), + rx_dma_desc_tail_ptr); } -u32 reg_rx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, u32 descriptor) +uint32_t +reg_rx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor) { - return AQ_READ_REG(aq_hw, rx_dma_desc_tail_ptr_adr(descriptor)); + return AQ_READ_REG(aq_hw, rx_dma_desc_tail_ptr_adr(descriptor)); } -void reg_rx_flr_mcst_flr_msk_set(struct aq_hw *aq_hw, u32 rx_flr_mcst_flr_msk) +void +reg_rx_flr_mcst_flr_msk_set(struct aq_hw *aq_hw, uint32_t rx_flr_mcst_flr_msk) { - AQ_WRITE_REG(aq_hw, rx_flr_mcst_flr_msk_adr, rx_flr_mcst_flr_msk); + AQ_WRITE_REG(aq_hw, rx_flr_mcst_flr_msk_adr, rx_flr_mcst_flr_msk); } -void reg_rx_flr_mcst_flr_set(struct aq_hw *aq_hw, u32 rx_flr_mcst_flr, - u32 filter) +void +reg_rx_flr_mcst_flr_set(struct aq_hw *aq_hw, uint32_t rx_flr_mcst_flr, + uint32_t filter) { - AQ_WRITE_REG(aq_hw, rx_flr_mcst_flr_adr(filter), rx_flr_mcst_flr); + AQ_WRITE_REG(aq_hw, rx_flr_mcst_flr_adr(filter), rx_flr_mcst_flr); } -void reg_rx_flr_rss_control1set(struct aq_hw *aq_hw, u32 rx_flr_rss_control1) +void +reg_rx_flr_rss_control1set(struct aq_hw *aq_hw, uint32_t rx_flr_rss_control1) { - AQ_WRITE_REG(aq_hw, rx_flr_rss_control1_adr, rx_flr_rss_control1); + AQ_WRITE_REG(aq_hw, rx_flr_rss_control1_adr, rx_flr_rss_control1); } -void reg_rx_flr_control2_set(struct aq_hw *aq_hw, u32 rx_filter_control2) +void +reg_rx_flr_control2_set(struct aq_hw *aq_hw, uint32_t rx_filter_control2) { - AQ_WRITE_REG(aq_hw, rx_flr_control2_adr, rx_filter_control2); + AQ_WRITE_REG(aq_hw, rx_flr_control2_adr, rx_filter_control2); } -void reg_rx_intr_moder_ctrl_set(struct aq_hw *aq_hw, - u32 rx_intr_moderation_ctl, - u32 queue) +void +reg_rx_intr_moder_ctrl_set(struct aq_hw *aq_hw, + uint32_t rx_intr_moderation_ctl, uint32_t queue) { - AQ_WRITE_REG(aq_hw, rx_intr_moderation_ctl_adr(queue), - rx_intr_moderation_ctl); + AQ_WRITE_REG(aq_hw, rx_intr_moderation_ctl_adr(queue), + rx_intr_moderation_ctl); } -void reg_tx_dma_debug_ctl_set(struct aq_hw *aq_hw, u32 tx_dma_debug_ctl) +void +reg_tx_dma_debug_ctl_set(struct aq_hw *aq_hw, uint32_t tx_dma_debug_ctl) { - AQ_WRITE_REG(aq_hw, tx_dma_debug_ctl_adr, tx_dma_debug_ctl); + AQ_WRITE_REG(aq_hw, tx_dma_debug_ctl_adr, tx_dma_debug_ctl); } -void reg_tx_dma_desc_base_addresslswset(struct aq_hw *aq_hw, - u32 tx_dma_desc_base_addrlsw, - u32 descriptor) +void +reg_tx_dma_desc_base_addresslswset(struct aq_hw *aq_hw, + uint32_t tx_dma_desc_base_addrlsw, uint32_t descriptor) { - AQ_WRITE_REG(aq_hw, tx_dma_desc_base_addrlsw_adr(descriptor), - tx_dma_desc_base_addrlsw); + AQ_WRITE_REG(aq_hw, tx_dma_desc_base_addrlsw_adr(descriptor), + tx_dma_desc_base_addrlsw); } -void reg_tx_dma_desc_base_addressmswset(struct aq_hw *aq_hw, - u32 tx_dma_desc_base_addrmsw, - u32 descriptor) +void +reg_tx_dma_desc_base_addressmswset(struct aq_hw *aq_hw, + uint32_t tx_dma_desc_base_addrmsw, uint32_t descriptor) { - AQ_WRITE_REG(aq_hw, tx_dma_desc_base_addrmsw_adr(descriptor), - tx_dma_desc_base_addrmsw); + AQ_WRITE_REG(aq_hw, tx_dma_desc_base_addrmsw_adr(descriptor), + tx_dma_desc_base_addrmsw); } -void reg_tx_dma_desc_tail_ptr_set(struct aq_hw *aq_hw, - u32 tx_dma_desc_tail_ptr, u32 descriptor) +void +reg_tx_dma_desc_tail_ptr_set(struct aq_hw *aq_hw, + uint32_t tx_dma_desc_tail_ptr, uint32_t descriptor) { - //wmb(); + //wmb(); - AQ_WRITE_REG(aq_hw, tx_dma_desc_tail_ptr_adr(descriptor), - tx_dma_desc_tail_ptr); + AQ_WRITE_REG(aq_hw, tx_dma_desc_tail_ptr_adr(descriptor), + tx_dma_desc_tail_ptr); } -u32 reg_tx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, u32 descriptor) +uint32_t +reg_tx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor) { - return AQ_READ_REG(aq_hw, tx_dma_desc_tail_ptr_adr(descriptor)); + return AQ_READ_REG(aq_hw, tx_dma_desc_tail_ptr_adr(descriptor)); } -void reg_tx_intr_moder_ctrl_set(struct aq_hw *aq_hw, - u32 tx_intr_moderation_ctl, - u32 queue) +void +reg_tx_intr_moder_ctrl_set(struct aq_hw *aq_hw, + uint32_t tx_intr_moderation_ctl, uint32_t queue) { - AQ_WRITE_REG(aq_hw, tx_intr_moderation_ctl_adr(queue), - tx_intr_moderation_ctl); + AQ_WRITE_REG(aq_hw, tx_intr_moderation_ctl_adr(queue), + tx_intr_moderation_ctl); } /* RPB: rx packet buffer */ -void rpb_dma_sys_lbk_set(struct aq_hw *aq_hw, u32 dma_sys_lbk) +void +rpb_dma_sys_lbk_set(struct aq_hw *aq_hw, uint32_t dma_sys_lbk) { - AQ_WRITE_REG_BIT(aq_hw, rpb_dma_sys_lbk_adr, - rpb_dma_sys_lbk_msk, - rpb_dma_sys_lbk_shift, dma_sys_lbk); + AQ_WRITE_REG_BIT(aq_hw, rpb_dma_sys_lbk_adr, rpb_dma_sys_lbk_msk, + rpb_dma_sys_lbk_shift, dma_sys_lbk); } -void rpb_rpf_rx_traf_class_mode_set(struct aq_hw *aq_hw, - u32 rx_traf_class_mode) +void +rpb_rpf_rx_traf_class_mode_set(struct aq_hw *aq_hw, + uint32_t rx_traf_class_mode) { - AQ_WRITE_REG_BIT(aq_hw, rpb_rpf_rx_tc_mode_adr, - rpb_rpf_rx_tc_mode_msk, - rpb_rpf_rx_tc_mode_shift, - rx_traf_class_mode); + AQ_WRITE_REG_BIT(aq_hw, rpb_rpf_rx_tc_mode_adr, rpb_rpf_rx_tc_mode_msk, + rpb_rpf_rx_tc_mode_shift, rx_traf_class_mode); } -void rpb_rx_buff_en_set(struct aq_hw *aq_hw, u32 rx_buff_en) +void +rpb_rx_buff_en_set(struct aq_hw *aq_hw, uint32_t rx_buff_en) { - AQ_WRITE_REG_BIT(aq_hw, rpb_rx_buf_en_adr, rpb_rx_buf_en_msk, - rpb_rx_buf_en_shift, rx_buff_en); + AQ_WRITE_REG_BIT(aq_hw, rpb_rx_buf_en_adr, rpb_rx_buf_en_msk, + rpb_rx_buf_en_shift, rx_buff_en); } -void rpb_rx_buff_hi_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 rx_buff_hi_threshold_per_tc, - u32 buffer) +void +rpb_rx_buff_hi_threshold_per_tc_set(struct aq_hw *aq_hw, + uint32_t rx_buff_hi_threshold_per_tc, uint32_t buffer) { - AQ_WRITE_REG_BIT(aq_hw, rpb_rxbhi_thresh_adr(buffer), - rpb_rxbhi_thresh_msk, rpb_rxbhi_thresh_shift, - rx_buff_hi_threshold_per_tc); + AQ_WRITE_REG_BIT(aq_hw, rpb_rxbhi_thresh_adr(buffer), + rpb_rxbhi_thresh_msk, rpb_rxbhi_thresh_shift, + rx_buff_hi_threshold_per_tc); } -void rpb_rx_buff_lo_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 rx_buff_lo_threshold_per_tc, - u32 buffer) +void +rpb_rx_buff_lo_threshold_per_tc_set(struct aq_hw *aq_hw, + uint32_t rx_buff_lo_threshold_per_tc, uint32_t buffer) { - AQ_WRITE_REG_BIT(aq_hw, rpb_rxblo_thresh_adr(buffer), - rpb_rxblo_thresh_msk, - rpb_rxblo_thresh_shift, - rx_buff_lo_threshold_per_tc); + AQ_WRITE_REG_BIT(aq_hw, rpb_rxblo_thresh_adr(buffer), + rpb_rxblo_thresh_msk, rpb_rxblo_thresh_shift, + rx_buff_lo_threshold_per_tc); } -void rpb_rx_flow_ctl_mode_set(struct aq_hw *aq_hw, u32 rx_flow_ctl_mode) +void +rpb_rx_flow_ctl_mode_set(struct aq_hw *aq_hw, uint32_t rx_flow_ctl_mode) { - AQ_WRITE_REG_BIT(aq_hw, rpb_rx_fc_mode_adr, - rpb_rx_fc_mode_msk, - rpb_rx_fc_mode_shift, rx_flow_ctl_mode); + AQ_WRITE_REG_BIT(aq_hw, rpb_rx_fc_mode_adr, rpb_rx_fc_mode_msk, + rpb_rx_fc_mode_shift, rx_flow_ctl_mode); } -void rpb_rx_pkt_buff_size_per_tc_set(struct aq_hw *aq_hw, - u32 rx_pkt_buff_size_per_tc, u32 buffer) +void +rpb_rx_pkt_buff_size_per_tc_set(struct aq_hw *aq_hw, + uint32_t rx_pkt_buff_size_per_tc, uint32_t buffer) { - AQ_WRITE_REG_BIT(aq_hw, rpb_rxbbuf_size_adr(buffer), - rpb_rxbbuf_size_msk, rpb_rxbbuf_size_shift, - rx_pkt_buff_size_per_tc); + AQ_WRITE_REG_BIT(aq_hw, rpb_rxbbuf_size_adr(buffer), + rpb_rxbbuf_size_msk, rpb_rxbbuf_size_shift, + rx_pkt_buff_size_per_tc); } -void rpb_rx_xoff_en_per_tc_set(struct aq_hw *aq_hw, u32 rx_xoff_en_per_tc, - u32 buffer) +void +rpb_rx_xoff_en_per_tc_set(struct aq_hw *aq_hw, uint32_t rx_xoff_en_per_tc, + uint32_t buffer) { - AQ_WRITE_REG_BIT(aq_hw, rpb_rxbxoff_en_adr(buffer), - rpb_rxbxoff_en_msk, rpb_rxbxoff_en_shift, - rx_xoff_en_per_tc); + AQ_WRITE_REG_BIT(aq_hw, rpb_rxbxoff_en_adr(buffer), + rpb_rxbxoff_en_msk, rpb_rxbxoff_en_shift, rx_xoff_en_per_tc); } /* rpf */ -void rpfl2broadcast_count_threshold_set(struct aq_hw *aq_hw, - u32 l2broadcast_count_threshold) +void +rpfl2broadcast_count_threshold_set(struct aq_hw *aq_hw, + uint32_t l2broadcast_count_threshold) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2bc_thresh_adr, - rpfl2bc_thresh_msk, - rpfl2bc_thresh_shift, - l2broadcast_count_threshold); + AQ_WRITE_REG_BIT(aq_hw, rpfl2bc_thresh_adr, rpfl2bc_thresh_msk, + rpfl2bc_thresh_shift, l2broadcast_count_threshold); } -void rpfl2broadcast_en_set(struct aq_hw *aq_hw, u32 l2broadcast_en) +void +rpfl2broadcast_en_set(struct aq_hw *aq_hw, uint32_t l2broadcast_en) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2bc_en_adr, rpfl2bc_en_msk, - rpfl2bc_en_shift, l2broadcast_en); + AQ_WRITE_REG_BIT(aq_hw, rpfl2bc_en_adr, rpfl2bc_en_msk, + rpfl2bc_en_shift, l2broadcast_en); } -void rpfl2broadcast_flr_act_set(struct aq_hw *aq_hw, u32 l2broadcast_flr_act) +void +rpfl2broadcast_flr_act_set(struct aq_hw *aq_hw, uint32_t l2broadcast_flr_act) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2bc_act_adr, rpfl2bc_act_msk, - rpfl2bc_act_shift, l2broadcast_flr_act); + AQ_WRITE_REG_BIT(aq_hw, rpfl2bc_act_adr, rpfl2bc_act_msk, + rpfl2bc_act_shift, l2broadcast_flr_act); } -void rpfl2multicast_flr_en_set(struct aq_hw *aq_hw, u32 l2multicast_flr_en, - u32 filter) +void +rpfl2multicast_flr_en_set(struct aq_hw *aq_hw, uint32_t l2multicast_flr_en, + uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2mc_enf_adr(filter), - rpfl2mc_enf_msk, - rpfl2mc_enf_shift, l2multicast_flr_en); + AQ_WRITE_REG_BIT(aq_hw, rpfl2mc_enf_adr(filter), rpfl2mc_enf_msk, + rpfl2mc_enf_shift, l2multicast_flr_en); } -void rpfl2promiscuous_mode_en_set(struct aq_hw *aq_hw, - u32 l2promiscuous_mode_en) +void +rpfl2promiscuous_mode_en_set(struct aq_hw *aq_hw, + uint32_t l2promiscuous_mode_en) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2promis_mode_adr, - rpfl2promis_mode_msk, - rpfl2promis_mode_shift, - l2promiscuous_mode_en); + AQ_WRITE_REG_BIT(aq_hw, rpfl2promis_mode_adr, rpfl2promis_mode_msk, + rpfl2promis_mode_shift, l2promiscuous_mode_en); } -void rpfl2unicast_flr_act_set(struct aq_hw *aq_hw, u32 l2unicast_flr_act, - u32 filter) +void +rpfl2unicast_flr_act_set(struct aq_hw *aq_hw, uint32_t l2unicast_flr_act, + uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2uc_actf_adr(filter), - rpfl2uc_actf_msk, rpfl2uc_actf_shift, - l2unicast_flr_act); + AQ_WRITE_REG_BIT(aq_hw, rpfl2uc_actf_adr(filter), rpfl2uc_actf_msk, + rpfl2uc_actf_shift, l2unicast_flr_act); } -void rpfl2_uc_flr_en_set(struct aq_hw *aq_hw, u32 l2unicast_flr_en, - u32 filter) +void +rpfl2_uc_flr_en_set(struct aq_hw *aq_hw, uint32_t l2unicast_flr_en, + uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2uc_enf_adr(filter), - rpfl2uc_enf_msk, - rpfl2uc_enf_shift, l2unicast_flr_en); + AQ_WRITE_REG_BIT(aq_hw, rpfl2uc_enf_adr(filter), rpfl2uc_enf_msk, + rpfl2uc_enf_shift, l2unicast_flr_en); } -void rpfl2unicast_dest_addresslsw_set(struct aq_hw *aq_hw, - u32 l2unicast_dest_addresslsw, - u32 filter) +void +rpfl2unicast_dest_addresslsw_set(struct aq_hw *aq_hw, + uint32_t l2unicast_dest_addresslsw, uint32_t filter) { - AQ_WRITE_REG(aq_hw, rpfl2uc_daflsw_adr(filter), - l2unicast_dest_addresslsw); + AQ_WRITE_REG(aq_hw, rpfl2uc_daflsw_adr(filter), + l2unicast_dest_addresslsw); } -void rpfl2unicast_dest_addressmsw_set(struct aq_hw *aq_hw, - u32 l2unicast_dest_addressmsw, - u32 filter) +void +rpfl2unicast_dest_addressmsw_set(struct aq_hw *aq_hw, + uint32_t l2unicast_dest_addressmsw, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2uc_dafmsw_adr(filter), - rpfl2uc_dafmsw_msk, rpfl2uc_dafmsw_shift, - l2unicast_dest_addressmsw); + AQ_WRITE_REG_BIT(aq_hw, rpfl2uc_dafmsw_adr(filter), rpfl2uc_dafmsw_msk, + rpfl2uc_dafmsw_shift, l2unicast_dest_addressmsw); } -void rpfl2_accept_all_mc_packets_set(struct aq_hw *aq_hw, - u32 l2_accept_all_mc_packets) +void +rpfl2_accept_all_mc_packets_set(struct aq_hw *aq_hw, + uint32_t l2_accept_all_mc_packets) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2mc_accept_all_adr, - rpfl2mc_accept_all_msk, - rpfl2mc_accept_all_shift, - l2_accept_all_mc_packets); + AQ_WRITE_REG_BIT(aq_hw, rpfl2mc_accept_all_adr, rpfl2mc_accept_all_msk, + rpfl2mc_accept_all_shift, l2_accept_all_mc_packets); } -void rpf_rpb_user_priority_tc_map_set(struct aq_hw *aq_hw, - u32 user_priority_tc_map, u32 tc) +void +rpf_rpb_user_priority_tc_map_set(struct aq_hw *aq_hw, + uint32_t user_priority_tc_map, uint32_t tc) { /* register address for bitfield rx_tc_up{t}[2:0] */ - static u32 rpf_rpb_rx_tc_upt_adr[8] = { - 0x000054c4U, 0x000054c4U, 0x000054c4U, 0x000054c4U, - 0x000054c4U, 0x000054c4U, 0x000054c4U, 0x000054c4U - }; + static uint32_t rpf_rpb_rx_tc_upt_adr[8] = { + 0x000054c4U, 0x000054c4U, 0x000054c4U, 0x000054c4U, + 0x000054c4U, 0x000054c4U, 0x000054c4U, 0x000054c4U + }; /* bitmask for bitfield rx_tc_up{t}[2:0] */ - static u32 rpf_rpb_rx_tc_upt_msk[8] = { - 0x00000007U, 0x00000070U, 0x00000700U, 0x00007000U, - 0x00070000U, 0x00700000U, 0x07000000U, 0x70000000U - }; + static uint32_t rpf_rpb_rx_tc_upt_msk[8] = { + 0x00000007U, 0x00000070U, 0x00000700U, 0x00007000U, + 0x00070000U, 0x00700000U, 0x07000000U, 0x70000000U + }; /* lower bit position of bitfield rx_tc_up{t}[2:0] */ - static u32 rpf_rpb_rx_tc_upt_shft[8] = { - 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U - }; + static uint32_t rpf_rpb_rx_tc_upt_shft[8] = { + 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U + }; - AQ_WRITE_REG_BIT(aq_hw, rpf_rpb_rx_tc_upt_adr[tc], - rpf_rpb_rx_tc_upt_msk[tc], - rpf_rpb_rx_tc_upt_shft[tc], - user_priority_tc_map); + AQ_WRITE_REG_BIT(aq_hw, rpf_rpb_rx_tc_upt_adr[tc], + rpf_rpb_rx_tc_upt_msk[tc], rpf_rpb_rx_tc_upt_shft[tc], + user_priority_tc_map); } -void rpf_rss_key_addr_set(struct aq_hw *aq_hw, u32 rss_key_addr) +void +rpf_rss_key_addr_set(struct aq_hw *aq_hw, uint32_t rss_key_addr) { - AQ_WRITE_REG_BIT(aq_hw, rpf_rss_key_addr_adr, - rpf_rss_key_addr_msk, - rpf_rss_key_addr_shift, - rss_key_addr); + AQ_WRITE_REG_BIT(aq_hw, rpf_rss_key_addr_adr, rpf_rss_key_addr_msk, + rpf_rss_key_addr_shift, rss_key_addr); } -void rpf_rss_key_wr_data_set(struct aq_hw *aq_hw, u32 rss_key_wr_data) +void +rpf_rss_key_wr_data_set(struct aq_hw *aq_hw, uint32_t rss_key_wr_data) { - AQ_WRITE_REG(aq_hw, rpf_rss_key_wr_data_adr, - rss_key_wr_data); + AQ_WRITE_REG(aq_hw, rpf_rss_key_wr_data_adr, rss_key_wr_data); } -u32 rpf_rss_key_rd_data_get(struct aq_hw *aq_hw) +uint32_t +rpf_rss_key_rd_data_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, rpf_rss_key_rd_data_adr); + return AQ_READ_REG(aq_hw, rpf_rss_key_rd_data_adr); } -u32 rpf_rss_key_wr_en_get(struct aq_hw *aq_hw) +uint32_t +rpf_rss_key_wr_en_get(struct aq_hw *aq_hw) { - return AQ_READ_REG_BIT(aq_hw, rpf_rss_key_wr_eni_adr, - rpf_rss_key_wr_eni_msk, - rpf_rss_key_wr_eni_shift); + return AQ_READ_REG_BIT(aq_hw, rpf_rss_key_wr_eni_adr, + rpf_rss_key_wr_eni_msk, rpf_rss_key_wr_eni_shift); } -void rpf_rss_key_wr_en_set(struct aq_hw *aq_hw, u32 rss_key_wr_en) +void +rpf_rss_key_wr_en_set(struct aq_hw *aq_hw, uint32_t rss_key_wr_en) { - AQ_WRITE_REG_BIT(aq_hw, rpf_rss_key_wr_eni_adr, - rpf_rss_key_wr_eni_msk, - rpf_rss_key_wr_eni_shift, - rss_key_wr_en); + AQ_WRITE_REG_BIT(aq_hw, rpf_rss_key_wr_eni_adr, + rpf_rss_key_wr_eni_msk, rpf_rss_key_wr_eni_shift, + rss_key_wr_en); } -void rpf_rss_redir_tbl_addr_set(struct aq_hw *aq_hw, u32 rss_redir_tbl_addr) +void +rpf_rss_redir_tbl_addr_set(struct aq_hw *aq_hw, uint32_t rss_redir_tbl_addr) { - AQ_WRITE_REG_BIT(aq_hw, rpf_rss_redir_addr_adr, - rpf_rss_redir_addr_msk, - rpf_rss_redir_addr_shift, rss_redir_tbl_addr); + AQ_WRITE_REG_BIT(aq_hw, rpf_rss_redir_addr_adr, rpf_rss_redir_addr_msk, + rpf_rss_redir_addr_shift, rss_redir_tbl_addr); } -void rpf_rss_redir_tbl_wr_data_set(struct aq_hw *aq_hw, - u32 rss_redir_tbl_wr_data) +void +rpf_rss_redir_tbl_wr_data_set(struct aq_hw *aq_hw, uint32_t rss_redir_tbl_wr_data) { - AQ_WRITE_REG_BIT(aq_hw, rpf_rss_redir_wr_data_adr, - rpf_rss_redir_wr_data_msk, - rpf_rss_redir_wr_data_shift, - rss_redir_tbl_wr_data); + AQ_WRITE_REG_BIT(aq_hw, rpf_rss_redir_wr_data_adr, + rpf_rss_redir_wr_data_msk, rpf_rss_redir_wr_data_shift, + rss_redir_tbl_wr_data); } -u32 rpf_rss_redir_wr_en_get(struct aq_hw *aq_hw) +uint32_t +rpf_rss_redir_wr_en_get(struct aq_hw *aq_hw) { - return AQ_READ_REG_BIT(aq_hw, rpf_rss_redir_wr_eni_adr, - rpf_rss_redir_wr_eni_msk, - rpf_rss_redir_wr_eni_shift); + return AQ_READ_REG_BIT(aq_hw, rpf_rss_redir_wr_eni_adr, + rpf_rss_redir_wr_eni_msk, rpf_rss_redir_wr_eni_shift); } -void rpf_rss_redir_wr_en_set(struct aq_hw *aq_hw, u32 rss_redir_wr_en) +void +rpf_rss_redir_wr_en_set(struct aq_hw *aq_hw, uint32_t rss_redir_wr_en) { - AQ_WRITE_REG_BIT(aq_hw, rpf_rss_redir_wr_eni_adr, - rpf_rss_redir_wr_eni_msk, - rpf_rss_redir_wr_eni_shift, rss_redir_wr_en); + AQ_WRITE_REG_BIT(aq_hw, rpf_rss_redir_wr_eni_adr, + rpf_rss_redir_wr_eni_msk, rpf_rss_redir_wr_eni_shift, + rss_redir_wr_en); } -void rpf_tpo_to_rpf_sys_lbk_set(struct aq_hw *aq_hw, u32 tpo_to_rpf_sys_lbk) +void +rpf_tpo_to_rpf_sys_lbk_set(struct aq_hw *aq_hw, uint32_t tpo_to_rpf_sys_lbk) { - AQ_WRITE_REG_BIT(aq_hw, rpf_tpo_rpf_sys_lbk_adr, - rpf_tpo_rpf_sys_lbk_msk, - rpf_tpo_rpf_sys_lbk_shift, - tpo_to_rpf_sys_lbk); + AQ_WRITE_REG_BIT(aq_hw, rpf_tpo_rpf_sys_lbk_adr, + rpf_tpo_rpf_sys_lbk_msk, rpf_tpo_rpf_sys_lbk_shift, + tpo_to_rpf_sys_lbk); } -void hw_atl_rpf_vlan_inner_etht_set(struct aq_hw_s *aq_hw, u32 vlan_inner_etht) +void +hw_atl_rpf_vlan_inner_etht_set(struct aq_hw_s *aq_hw, uint32_t vlan_inner_etht) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_INNER_TPID_ADR, HW_ATL_RPF_VL_INNER_TPID_MSK, @@ -940,7 +1000,8 @@ void hw_atl_rpf_vlan_inner_etht_set(struct aq_hw_s *aq_hw, u32 vlan_inner_etht) vlan_inner_etht); } -void hw_atl_rpf_vlan_outer_etht_set(struct aq_hw_s *aq_hw, u32 vlan_outer_etht) +void +hw_atl_rpf_vlan_outer_etht_set(struct aq_hw_s *aq_hw, uint32_t vlan_outer_etht) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_OUTER_TPID_ADR, HW_ATL_RPF_VL_OUTER_TPID_MSK, @@ -948,8 +1009,8 @@ void hw_atl_rpf_vlan_outer_etht_set(struct aq_hw_s *aq_hw, u32 vlan_outer_etht) vlan_outer_etht); } -void hw_atl_rpf_vlan_prom_mode_en_set(struct aq_hw_s *aq_hw, - u32 vlan_prom_mode_en) +void +hw_atl_rpf_vlan_prom_mode_en_set(struct aq_hw_s *aq_hw, uint32_t vlan_prom_mode_en) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_PROMIS_MODE_ADR, HW_ATL_RPF_VL_PROMIS_MODE_MSK, @@ -957,8 +1018,9 @@ void hw_atl_rpf_vlan_prom_mode_en_set(struct aq_hw_s *aq_hw, vlan_prom_mode_en); } -void hw_atl_rpf_vlan_accept_untagged_packets_set(struct aq_hw_s *aq_hw, - u32 vlan_acc_untagged_packets) +void +hw_atl_rpf_vlan_accept_untagged_packets_set(struct aq_hw_s *aq_hw, + uint32_t vlan_acc_untagged_packets) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_ADR, HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_MSK, @@ -966,8 +1028,8 @@ void hw_atl_rpf_vlan_accept_untagged_packets_set(struct aq_hw_s *aq_hw, vlan_acc_untagged_packets); } -void hw_atl_rpf_vlan_untagged_act_set(struct aq_hw_s *aq_hw, - u32 vlan_untagged_act) +void +hw_atl_rpf_vlan_untagged_act_set(struct aq_hw_s *aq_hw, uint32_t vlan_untagged_act) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_UNTAGGED_ACT_ADR, HW_ATL_RPF_VL_UNTAGGED_ACT_MSK, @@ -975,8 +1037,8 @@ void hw_atl_rpf_vlan_untagged_act_set(struct aq_hw_s *aq_hw, vlan_untagged_act); } -void hw_atl_rpf_vlan_flr_en_set(struct aq_hw_s *aq_hw, u32 vlan_flr_en, - u32 filter) +void +hw_atl_rpf_vlan_flr_en_set(struct aq_hw_s *aq_hw, uint32_t vlan_flr_en, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_EN_F_ADR(filter), HW_ATL_RPF_VL_EN_F_MSK, @@ -984,8 +1046,8 @@ void hw_atl_rpf_vlan_flr_en_set(struct aq_hw_s *aq_hw, u32 vlan_flr_en, vlan_flr_en); } -void hw_atl_rpf_vlan_flr_act_set(struct aq_hw_s *aq_hw, u32 vlan_flr_act, - u32 filter) +void +hw_atl_rpf_vlan_flr_act_set(struct aq_hw_s *aq_hw, uint32_t vlan_flr_act, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_ACT_F_ADR(filter), HW_ATL_RPF_VL_ACT_F_MSK, @@ -993,8 +1055,8 @@ void hw_atl_rpf_vlan_flr_act_set(struct aq_hw_s *aq_hw, u32 vlan_flr_act, vlan_flr_act); } -void hw_atl_rpf_vlan_id_flr_set(struct aq_hw_s *aq_hw, u32 vlan_id_flr, - u32 filter) +void +hw_atl_rpf_vlan_id_flr_set(struct aq_hw_s *aq_hw, uint32_t vlan_id_flr, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_ID_F_ADR(filter), HW_ATL_RPF_VL_ID_F_MSK, @@ -1002,8 +1064,9 @@ void hw_atl_rpf_vlan_id_flr_set(struct aq_hw_s *aq_hw, u32 vlan_id_flr, vlan_id_flr); } -void hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw_s *aq_hw, u32 vlan_rxq_en, - u32 filter) +void +hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw_s *aq_hw, uint32_t vlan_rxq_en, + uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_RXQ_EN_F_ADR(filter), HW_ATL_RPF_VL_RXQ_EN_F_MSK, @@ -1011,8 +1074,8 @@ void hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw_s *aq_hw, u32 vlan_rxq_en, vlan_rxq_en); } -void hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw_s *aq_hw, u32 vlan_rxq, - u32 filter) +void +hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw_s *aq_hw, uint32_t vlan_rxq, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_RXQ_F_ADR(filter), HW_ATL_RPF_VL_RXQ_F_MSK, @@ -1020,25 +1083,26 @@ void hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw_s *aq_hw, u32 vlan_rxq, vlan_rxq); }; -void hw_atl_rpf_etht_flr_en_set(struct aq_hw_s *aq_hw, u32 etht_flr_en, - u32 filter) +void +hw_atl_rpf_etht_flr_en_set(struct aq_hw_s *aq_hw, uint32_t etht_flr_en, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_ENF_ADR(filter), HW_ATL_RPF_ET_ENF_MSK, HW_ATL_RPF_ET_ENF_SHIFT, etht_flr_en); } -void hw_atl_rpf_etht_user_priority_en_set(struct aq_hw_s *aq_hw, - u32 etht_user_priority_en, u32 filter) +void +hw_atl_rpf_etht_user_priority_en_set(struct aq_hw_s *aq_hw, + uint32_t etht_user_priority_en, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_UPFEN_ADR(filter), HW_ATL_RPF_ET_UPFEN_MSK, HW_ATL_RPF_ET_UPFEN_SHIFT, etht_user_priority_en); } -void hw_atl_rpf_etht_rx_queue_en_set(struct aq_hw_s *aq_hw, - u32 etht_rx_queue_en, - u32 filter) +void +hw_atl_rpf_etht_rx_queue_en_set(struct aq_hw_s *aq_hw, uint32_t etht_rx_queue_en, + uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_RXQFEN_ADR(filter), HW_ATL_RPF_ET_RXQFEN_MSK, @@ -1046,25 +1110,27 @@ void hw_atl_rpf_etht_rx_queue_en_set(struct aq_hw_s *aq_hw, etht_rx_queue_en); } -void hw_atl_rpf_etht_user_priority_set(struct aq_hw_s *aq_hw, - u32 etht_user_priority, - u32 filter) +void +hw_atl_rpf_etht_user_priority_set(struct aq_hw_s *aq_hw, uint32_t etht_user_priority, + uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_UPF_ADR(filter), HW_ATL_RPF_ET_UPF_MSK, HW_ATL_RPF_ET_UPF_SHIFT, etht_user_priority); } -void hw_atl_rpf_etht_rx_queue_set(struct aq_hw_s *aq_hw, u32 etht_rx_queue, - u32 filter) +void +hw_atl_rpf_etht_rx_queue_set(struct aq_hw_s *aq_hw, uint32_t etht_rx_queue, + uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_RXQF_ADR(filter), HW_ATL_RPF_ET_RXQF_MSK, HW_ATL_RPF_ET_RXQF_SHIFT, etht_rx_queue); } -void hw_atl_rpf_etht_mgt_queue_set(struct aq_hw_s *aq_hw, u32 etht_mgt_queue, - u32 filter) +void +hw_atl_rpf_etht_mgt_queue_set(struct aq_hw_s *aq_hw, uint32_t etht_mgt_queue, + uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_MNG_RXQF_ADR(filter), HW_ATL_RPF_ET_MNG_RXQF_MSK, @@ -1072,915 +1138,925 @@ void hw_atl_rpf_etht_mgt_queue_set(struct aq_hw_s *aq_hw, u32 etht_mgt_queue, etht_mgt_queue); } -void hw_atl_rpf_etht_flr_act_set(struct aq_hw_s *aq_hw, u32 etht_flr_act, - u32 filter) +void +hw_atl_rpf_etht_flr_act_set(struct aq_hw_s *aq_hw, uint32_t etht_flr_act, + uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_ACTF_ADR(filter), HW_ATL_RPF_ET_ACTF_MSK, HW_ATL_RPF_ET_ACTF_SHIFT, etht_flr_act); } -void hw_atl_rpf_etht_flr_set(struct aq_hw_s *aq_hw, u32 etht_flr, u32 filter) +void +hw_atl_rpf_etht_flr_set(struct aq_hw_s *aq_hw, uint32_t etht_flr, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_VALF_ADR(filter), HW_ATL_RPF_ET_VALF_MSK, HW_ATL_RPF_ET_VALF_SHIFT, etht_flr); } -void hw_atl_rpf_l3_l4_enf_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_l4_enf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_ENF_ADR(filter), HW_ATL_RPF_L3_L4_ENF_MSK, HW_ATL_RPF_L3_L4_ENF_SHIFT, val); } -void hw_atl_rpf_l3_v6_enf_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_v6_enf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_V6_ENF_ADR(filter), HW_ATL_RPF_L3_V6_ENF_MSK, HW_ATL_RPF_L3_V6_ENF_SHIFT, val); } -void hw_atl_rpf_l3_saf_en_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_saf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_SAF_EN_ADR(filter), HW_ATL_RPF_L3_SAF_EN_MSK, HW_ATL_RPF_L3_SAF_EN_SHIFT, val); } -void hw_atl_rpf_l3_daf_en_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_daf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_DAF_EN_ADR(filter), HW_ATL_RPF_L3_DAF_EN_MSK, HW_ATL_RPF_L3_DAF_EN_SHIFT, val); } -void hw_atl_rpf_l4_spf_en_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l4_spf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_SPF_EN_ADR(filter), HW_ATL_RPF_L4_SPF_EN_MSK, HW_ATL_RPF_L4_SPF_EN_SHIFT, val); } -void hw_atl_rpf_l4_dpf_en_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l4_dpf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_DPF_EN_ADR(filter), HW_ATL_RPF_L4_DPF_EN_MSK, HW_ATL_RPF_L4_DPF_EN_SHIFT, val); } -void hw_atl_rpf_l4_protf_en_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l4_protf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_PROTF_EN_ADR(filter), HW_ATL_RPF_L4_PROTF_EN_MSK, HW_ATL_RPF_L4_PROTF_EN_SHIFT, val); } -void hw_atl_rpf_l3_arpf_en_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_arpf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_ARPF_EN_ADR(filter), HW_ATL_RPF_L3_ARPF_EN_MSK, HW_ATL_RPF_L3_ARPF_EN_SHIFT, val); } -void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_RXQF_EN_ADR(filter), HW_ATL_RPF_L3_L4_RXQF_EN_MSK, HW_ATL_RPF_L3_L4_RXQF_EN_SHIFT, val); } -void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_MNG_RXQF_ADR(filter), HW_ATL_RPF_L3_L4_MNG_RXQF_MSK, HW_ATL_RPF_L3_L4_MNG_RXQF_SHIFT, val); } -void hw_atl_rpf_l3_l4_actf_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_l4_actf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_ACTF_ADR(filter), HW_ATL_RPF_L3_L4_ACTF_MSK, HW_ATL_RPF_L3_L4_ACTF_SHIFT, val); } -void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_RXQF_ADR(filter), HW_ATL_RPF_L3_L4_RXQF_MSK, HW_ATL_RPF_L3_L4_RXQF_SHIFT, val); } -void hw_atl_rpf_l4_protf_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l4_protf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_PROTF_ADR(filter), HW_ATL_RPF_L4_PROTF_MSK, HW_ATL_RPF_L4_PROTF_SHIFT, val); } -void hw_atl_rpf_l4_spd_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l4_spd_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_SPD_ADR(filter), HW_ATL_RPF_L4_SPD_MSK, HW_ATL_RPF_L4_SPD_SHIFT, val); } -void hw_atl_rpf_l4_dpd_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l4_dpd_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_DPD_ADR(filter), HW_ATL_RPF_L4_DPD_MSK, HW_ATL_RPF_L4_DPD_SHIFT, val); } -void rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, u32 vlan_inner_etht) +void +rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, uint32_t vlan_inner_etht) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_inner_tpid_adr, - rpf_vl_inner_tpid_msk, - rpf_vl_inner_tpid_shift, - vlan_inner_etht); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_inner_tpid_adr, rpf_vl_inner_tpid_msk, + rpf_vl_inner_tpid_shift, vlan_inner_etht); } -void rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, u32 vlan_outer_etht) +void +rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, uint32_t vlan_outer_etht) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_outer_tpid_adr, - rpf_vl_outer_tpid_msk, - rpf_vl_outer_tpid_shift, - vlan_outer_etht); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_outer_tpid_adr, rpf_vl_outer_tpid_msk, + rpf_vl_outer_tpid_shift, vlan_outer_etht); } -void rpf_vlan_prom_mode_en_set(struct aq_hw *aq_hw, u32 vlan_prom_mode_en) +void +rpf_vlan_prom_mode_en_set(struct aq_hw *aq_hw, uint32_t vlan_prom_mode_en) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_promis_mode_adr, - rpf_vl_promis_mode_msk, - rpf_vl_promis_mode_shift, - vlan_prom_mode_en); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_promis_mode_adr, rpf_vl_promis_mode_msk, + rpf_vl_promis_mode_shift, vlan_prom_mode_en); } -void rpf_vlan_accept_untagged_packets_set(struct aq_hw *aq_hw, - u32 vlan_accept_untagged_packets) +void +rpf_vlan_accept_untagged_packets_set(struct aq_hw *aq_hw, + uint32_t vlan_accept_untagged_packets) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_accept_untagged_mode_adr, - rpf_vl_accept_untagged_mode_msk, - rpf_vl_accept_untagged_mode_shift, - vlan_accept_untagged_packets); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_accept_untagged_mode_adr, + rpf_vl_accept_untagged_mode_msk, rpf_vl_accept_untagged_mode_shift, + vlan_accept_untagged_packets); } -void rpf_vlan_untagged_act_set(struct aq_hw *aq_hw, u32 vlan_untagged_act) +void +rpf_vlan_untagged_act_set(struct aq_hw *aq_hw, uint32_t vlan_untagged_act) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_untagged_act_adr, - rpf_vl_untagged_act_msk, - rpf_vl_untagged_act_shift, - vlan_untagged_act); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_untagged_act_adr, + rpf_vl_untagged_act_msk, rpf_vl_untagged_act_shift, + vlan_untagged_act); } -void rpf_vlan_flr_en_set(struct aq_hw *aq_hw, u32 vlan_flr_en, u32 filter) +void +rpf_vlan_flr_en_set(struct aq_hw *aq_hw, uint32_t vlan_flr_en, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_en_f_adr(filter), - rpf_vl_en_f_msk, - rpf_vl_en_f_shift, - vlan_flr_en); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_en_f_adr(filter), rpf_vl_en_f_msk, + rpf_vl_en_f_shift, vlan_flr_en); } -void rpf_vlan_flr_act_set(struct aq_hw *aq_hw, u32 vlan_flr_act, u32 filter) +void +rpf_vlan_flr_act_set(struct aq_hw *aq_hw, uint32_t vlan_flr_act, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_act_f_adr(filter), - rpf_vl_act_f_msk, - rpf_vl_act_f_shift, - vlan_flr_act); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_act_f_adr(filter), rpf_vl_act_f_msk, + rpf_vl_act_f_shift, vlan_flr_act); } -void rpf_vlan_id_flr_set(struct aq_hw *aq_hw, u32 vlan_id_flr, u32 filter) +void +rpf_vlan_id_flr_set(struct aq_hw *aq_hw, uint32_t vlan_id_flr, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_id_f_adr(filter), - rpf_vl_id_f_msk, - rpf_vl_id_f_shift, - vlan_id_flr); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_id_f_adr(filter), rpf_vl_id_f_msk, + rpf_vl_id_f_shift, vlan_id_flr); } -void rpf_etht_flr_en_set(struct aq_hw *aq_hw, u32 etht_flr_en, u32 filter) +void +rpf_etht_flr_en_set(struct aq_hw *aq_hw, uint32_t etht_flr_en, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_enf_adr(filter), - rpf_et_enf_msk, - rpf_et_enf_shift, etht_flr_en); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_enf_adr(filter), rpf_et_enf_msk, + rpf_et_enf_shift, etht_flr_en); } -void rpf_etht_user_priority_en_set(struct aq_hw *aq_hw, - u32 etht_user_priority_en, u32 filter) +void +rpf_etht_user_priority_en_set(struct aq_hw *aq_hw, + uint32_t etht_user_priority_en, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_upfen_adr(filter), - rpf_et_upfen_msk, rpf_et_upfen_shift, - etht_user_priority_en); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_upfen_adr(filter), rpf_et_upfen_msk, + rpf_et_upfen_shift, etht_user_priority_en); } -void rpf_etht_rx_queue_en_set(struct aq_hw *aq_hw, u32 etht_rx_queue_en, - u32 filter) +void +rpf_etht_rx_queue_en_set(struct aq_hw *aq_hw, uint32_t etht_rx_queue_en, + uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_rxqfen_adr(filter), - rpf_et_rxqfen_msk, rpf_et_rxqfen_shift, - etht_rx_queue_en); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_rxqfen_adr(filter), rpf_et_rxqfen_msk, + rpf_et_rxqfen_shift, etht_rx_queue_en); } -void rpf_etht_user_priority_set(struct aq_hw *aq_hw, u32 etht_user_priority, - u32 filter) +void +rpf_etht_user_priority_set(struct aq_hw *aq_hw, uint32_t etht_user_priority, + uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_upf_adr(filter), - rpf_et_upf_msk, - rpf_et_upf_shift, etht_user_priority); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_upf_adr(filter), rpf_et_upf_msk, + rpf_et_upf_shift, etht_user_priority); } -void rpf_etht_rx_queue_set(struct aq_hw *aq_hw, u32 etht_rx_queue, - u32 filter) +void +rpf_etht_rx_queue_set(struct aq_hw *aq_hw, uint32_t etht_rx_queue, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_rxqf_adr(filter), - rpf_et_rxqf_msk, - rpf_et_rxqf_shift, etht_rx_queue); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_rxqf_adr(filter), rpf_et_rxqf_msk, + rpf_et_rxqf_shift, etht_rx_queue); } -void rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, u32 etht_mgt_queue, - u32 filter) +void +rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, uint32_t etht_mgt_queue, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_mng_rxqf_adr(filter), - rpf_et_mng_rxqf_msk, rpf_et_mng_rxqf_shift, - etht_mgt_queue); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_mng_rxqf_adr(filter), + rpf_et_mng_rxqf_msk, rpf_et_mng_rxqf_shift, etht_mgt_queue); } -void rpf_etht_flr_act_set(struct aq_hw *aq_hw, u32 etht_flr_act, u32 filter) +void +rpf_etht_flr_act_set(struct aq_hw *aq_hw, uint32_t etht_flr_act, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_actf_adr(filter), - rpf_et_actf_msk, - rpf_et_actf_shift, etht_flr_act); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_actf_adr(filter), rpf_et_actf_msk, + rpf_et_actf_shift, etht_flr_act); } -void rpf_etht_flr_set(struct aq_hw *aq_hw, u32 etht_flr, u32 filter) +void +rpf_etht_flr_set(struct aq_hw *aq_hw, uint32_t etht_flr, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_valf_adr(filter), - rpf_et_valf_msk, - rpf_et_valf_shift, etht_flr); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_valf_adr(filter), rpf_et_valf_msk, + rpf_et_valf_shift, etht_flr); } /* RPO: rx packet offload */ -void rpo_ipv4header_crc_offload_en_set(struct aq_hw *aq_hw, - u32 ipv4header_crc_offload_en) +void +rpo_ipv4header_crc_offload_en_set(struct aq_hw *aq_hw, + uint32_t ipv4header_crc_offload_en) { - AQ_WRITE_REG_BIT(aq_hw, rpo_ipv4chk_en_adr, - rpo_ipv4chk_en_msk, - rpo_ipv4chk_en_shift, - ipv4header_crc_offload_en); + AQ_WRITE_REG_BIT(aq_hw, rpo_ipv4chk_en_adr, rpo_ipv4chk_en_msk, + rpo_ipv4chk_en_shift, ipv4header_crc_offload_en); } -void rpo_rx_desc_vlan_stripping_set(struct aq_hw *aq_hw, - u32 rx_desc_vlan_stripping, u32 descriptor) +void +rpo_rx_desc_vlan_stripping_set(struct aq_hw *aq_hw, + uint32_t rx_desc_vlan_stripping, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, rpo_descdvl_strip_adr(descriptor), - rpo_descdvl_strip_msk, - rpo_descdvl_strip_shift, - rx_desc_vlan_stripping); + AQ_WRITE_REG_BIT(aq_hw, rpo_descdvl_strip_adr(descriptor), + rpo_descdvl_strip_msk, rpo_descdvl_strip_shift, + rx_desc_vlan_stripping); } -void rpo_tcp_udp_crc_offload_en_set(struct aq_hw *aq_hw, - u32 tcp_udp_crc_offload_en) +void +rpo_tcp_udp_crc_offload_en_set(struct aq_hw *aq_hw, + uint32_t tcp_udp_crc_offload_en) { - AQ_WRITE_REG_BIT(aq_hw, rpol4chk_en_adr, rpol4chk_en_msk, - rpol4chk_en_shift, tcp_udp_crc_offload_en); + AQ_WRITE_REG_BIT(aq_hw, rpol4chk_en_adr, rpol4chk_en_msk, + rpol4chk_en_shift, tcp_udp_crc_offload_en); } -void rpo_lro_en_set(struct aq_hw *aq_hw, u32 lro_en) +void +rpo_lro_en_set(struct aq_hw *aq_hw, uint32_t lro_en) { - AQ_WRITE_REG(aq_hw, rpo_lro_en_adr, lro_en); + AQ_WRITE_REG(aq_hw, rpo_lro_en_adr, lro_en); } -void rpo_lro_patch_optimization_en_set(struct aq_hw *aq_hw, - u32 lro_patch_optimization_en) +void +rpo_lro_patch_optimization_en_set(struct aq_hw *aq_hw, + uint32_t lro_patch_optimization_en) { - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_ptopt_en_adr, - rpo_lro_ptopt_en_msk, - rpo_lro_ptopt_en_shift, - lro_patch_optimization_en); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_ptopt_en_adr, rpo_lro_ptopt_en_msk, + rpo_lro_ptopt_en_shift, lro_patch_optimization_en); } -void rpo_lro_qsessions_lim_set(struct aq_hw *aq_hw, - u32 lro_qsessions_lim) +void +rpo_lro_qsessions_lim_set(struct aq_hw *aq_hw, uint32_t lro_qsessions_lim) { - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_qses_lmt_adr, - rpo_lro_qses_lmt_msk, - rpo_lro_qses_lmt_shift, - lro_qsessions_lim); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_qses_lmt_adr, rpo_lro_qses_lmt_msk, + rpo_lro_qses_lmt_shift, lro_qsessions_lim); } -void rpo_lro_total_desc_lim_set(struct aq_hw *aq_hw, u32 lro_total_desc_lim) +void +rpo_lro_total_desc_lim_set(struct aq_hw *aq_hw, uint32_t lro_total_desc_lim) { - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_tot_dsc_lmt_adr, - rpo_lro_tot_dsc_lmt_msk, - rpo_lro_tot_dsc_lmt_shift, - lro_total_desc_lim); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_tot_dsc_lmt_adr, + rpo_lro_tot_dsc_lmt_msk, rpo_lro_tot_dsc_lmt_shift, + lro_total_desc_lim); } -void rpo_lro_min_pay_of_first_pkt_set(struct aq_hw *aq_hw, - u32 lro_min_pld_of_first_pkt) +void +rpo_lro_min_pay_of_first_pkt_set(struct aq_hw *aq_hw, + uint32_t lro_min_pld_of_first_pkt) { - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_pkt_min_adr, - rpo_lro_pkt_min_msk, - rpo_lro_pkt_min_shift, - lro_min_pld_of_first_pkt); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_pkt_min_adr, rpo_lro_pkt_min_msk, + rpo_lro_pkt_min_shift, lro_min_pld_of_first_pkt); } -void rpo_lro_pkt_lim_set(struct aq_hw *aq_hw, u32 lro_pkt_lim) +void +rpo_lro_pkt_lim_set(struct aq_hw *aq_hw, uint32_t lro_pkt_lim) { - AQ_WRITE_REG(aq_hw, rpo_lro_rsc_max_adr, lro_pkt_lim); + AQ_WRITE_REG(aq_hw, rpo_lro_rsc_max_adr, lro_pkt_lim); } -void rpo_lro_max_num_of_descriptors_set(struct aq_hw *aq_hw, - u32 lro_max_number_of_descriptors, - u32 lro) +void +rpo_lro_max_num_of_descriptors_set(struct aq_hw *aq_hw, + uint32_t lro_max_number_of_descriptors, uint32_t lro) { /* Register address for bitfield lro{L}_des_max[1:0] */ - static u32 rpo_lro_ldes_max_adr[32] = { - 0x000055A0U, 0x000055A0U, 0x000055A0U, 0x000055A0U, - 0x000055A0U, 0x000055A0U, 0x000055A0U, 0x000055A0U, - 0x000055A4U, 0x000055A4U, 0x000055A4U, 0x000055A4U, - 0x000055A4U, 0x000055A4U, 0x000055A4U, 0x000055A4U, - 0x000055A8U, 0x000055A8U, 0x000055A8U, 0x000055A8U, - 0x000055A8U, 0x000055A8U, 0x000055A8U, 0x000055A8U, - 0x000055ACU, 0x000055ACU, 0x000055ACU, 0x000055ACU, - 0x000055ACU, 0x000055ACU, 0x000055ACU, 0x000055ACU - }; + static uint32_t rpo_lro_ldes_max_adr[32] = { + 0x000055A0U, 0x000055A0U, 0x000055A0U, 0x000055A0U, + 0x000055A0U, 0x000055A0U, 0x000055A0U, 0x000055A0U, + 0x000055A4U, 0x000055A4U, 0x000055A4U, 0x000055A4U, + 0x000055A4U, 0x000055A4U, 0x000055A4U, 0x000055A4U, + 0x000055A8U, 0x000055A8U, 0x000055A8U, 0x000055A8U, + 0x000055A8U, 0x000055A8U, 0x000055A8U, 0x000055A8U, + 0x000055ACU, 0x000055ACU, 0x000055ACU, 0x000055ACU, + 0x000055ACU, 0x000055ACU, 0x000055ACU, 0x000055ACU + }; /* Bitmask for bitfield lro{L}_des_max[1:0] */ - static u32 rpo_lro_ldes_max_msk[32] = { - 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, - 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U, - 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, - 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U, - 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, - 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U, - 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, - 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U - }; + static uint32_t rpo_lro_ldes_max_msk[32] = { + 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, + 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U, + 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, + 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U, + 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, + 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U, + 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, + 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U + }; /* Lower bit position of bitfield lro{L}_des_max[1:0] */ - static u32 rpo_lro_ldes_max_shift[32] = { - 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, - 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, - 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, - 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U - }; + static uint32_t rpo_lro_ldes_max_shift[32] = { + 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, + 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, + 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, + 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U + }; - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_ldes_max_adr[lro], - rpo_lro_ldes_max_msk[lro], - rpo_lro_ldes_max_shift[lro], - lro_max_number_of_descriptors); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_ldes_max_adr[lro], + rpo_lro_ldes_max_msk[lro], rpo_lro_ldes_max_shift[lro], + lro_max_number_of_descriptors); } -void rpo_lro_time_base_divider_set(struct aq_hw *aq_hw, - u32 lro_time_base_divider) +void +rpo_lro_time_base_divider_set(struct aq_hw *aq_hw, + uint32_t lro_time_base_divider) { - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_tb_div_adr, - rpo_lro_tb_div_msk, - rpo_lro_tb_div_shift, - lro_time_base_divider); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_tb_div_adr, rpo_lro_tb_div_msk, + rpo_lro_tb_div_shift, lro_time_base_divider); } -void rpo_lro_inactive_interval_set(struct aq_hw *aq_hw, - u32 lro_inactive_interval) +void +rpo_lro_inactive_interval_set(struct aq_hw *aq_hw, + uint32_t lro_inactive_interval) { - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_ina_ival_adr, - rpo_lro_ina_ival_msk, - rpo_lro_ina_ival_shift, - lro_inactive_interval); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_ina_ival_adr, rpo_lro_ina_ival_msk, + rpo_lro_ina_ival_shift, lro_inactive_interval); } -void rpo_lro_max_coalescing_interval_set(struct aq_hw *aq_hw, - u32 lro_max_coalescing_interval) +void +rpo_lro_max_coalescing_interval_set(struct aq_hw *aq_hw, + uint32_t lro_max_coalescing_interval) { - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_max_ival_adr, - rpo_lro_max_ival_msk, - rpo_lro_max_ival_shift, - lro_max_coalescing_interval); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_max_ival_adr, rpo_lro_max_ival_msk, + rpo_lro_max_ival_shift, lro_max_coalescing_interval); } /* rx */ -void rx_rx_reg_res_dis_set(struct aq_hw *aq_hw, u32 rx_reg_res_dis) +void +rx_rx_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t rx_reg_res_dis) { - AQ_WRITE_REG_BIT(aq_hw, rx_reg_res_dsbl_adr, - rx_reg_res_dsbl_msk, - rx_reg_res_dsbl_shift, - rx_reg_res_dis); + AQ_WRITE_REG_BIT(aq_hw, rx_reg_res_dsbl_adr, rx_reg_res_dsbl_msk, + rx_reg_res_dsbl_shift, rx_reg_res_dis); } /* tdm */ -void tdm_cpu_id_set(struct aq_hw *aq_hw, u32 cpuid, u32 dca) +void +tdm_cpu_id_set(struct aq_hw *aq_hw, uint32_t cpuid, uint32_t dca) { - AQ_WRITE_REG_BIT(aq_hw, tdm_dcadcpuid_adr(dca), - tdm_dcadcpuid_msk, - tdm_dcadcpuid_shift, cpuid); + AQ_WRITE_REG_BIT(aq_hw, tdm_dcadcpuid_adr(dca), tdm_dcadcpuid_msk, + tdm_dcadcpuid_shift, cpuid); } -void tdm_large_send_offload_en_set(struct aq_hw *aq_hw, - u32 large_send_offload_en) +void +tdm_large_send_offload_en_set(struct aq_hw *aq_hw, + uint32_t large_send_offload_en) { - AQ_WRITE_REG(aq_hw, tdm_lso_en_adr, large_send_offload_en); + AQ_WRITE_REG(aq_hw, tdm_lso_en_adr, large_send_offload_en); } -void tdm_tx_dca_en_set(struct aq_hw *aq_hw, u32 tx_dca_en) +void +tdm_tx_dca_en_set(struct aq_hw *aq_hw, uint32_t tx_dca_en) { - AQ_WRITE_REG_BIT(aq_hw, tdm_dca_en_adr, tdm_dca_en_msk, - tdm_dca_en_shift, tx_dca_en); + AQ_WRITE_REG_BIT(aq_hw, tdm_dca_en_adr, tdm_dca_en_msk, + tdm_dca_en_shift, tx_dca_en); } -void tdm_tx_dca_mode_set(struct aq_hw *aq_hw, u32 tx_dca_mode) +void +tdm_tx_dca_mode_set(struct aq_hw *aq_hw, uint32_t tx_dca_mode) { - AQ_WRITE_REG_BIT(aq_hw, tdm_dca_mode_adr, tdm_dca_mode_msk, - tdm_dca_mode_shift, tx_dca_mode); + AQ_WRITE_REG_BIT(aq_hw, tdm_dca_mode_adr, tdm_dca_mode_msk, + tdm_dca_mode_shift, tx_dca_mode); } -void tdm_tx_desc_dca_en_set(struct aq_hw *aq_hw, u32 tx_desc_dca_en, u32 dca) +void +tdm_tx_desc_dca_en_set(struct aq_hw *aq_hw, uint32_t tx_desc_dca_en, uint32_t dca) { - AQ_WRITE_REG_BIT(aq_hw, tdm_dcaddesc_en_adr(dca), - tdm_dcaddesc_en_msk, tdm_dcaddesc_en_shift, - tx_desc_dca_en); + AQ_WRITE_REG_BIT(aq_hw, tdm_dcaddesc_en_adr(dca), tdm_dcaddesc_en_msk, + tdm_dcaddesc_en_shift, tx_desc_dca_en); } -void tdm_tx_desc_en_set(struct aq_hw *aq_hw, u32 tx_desc_en, u32 descriptor) +void +tdm_tx_desc_en_set(struct aq_hw *aq_hw, uint32_t tx_desc_en, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, tdm_descden_adr(descriptor), - tdm_descden_msk, - tdm_descden_shift, - tx_desc_en); + AQ_WRITE_REG_BIT(aq_hw, tdm_descden_adr(descriptor), tdm_descden_msk, + tdm_descden_shift, tx_desc_en); } -u32 tdm_tx_desc_head_ptr_get(struct aq_hw *aq_hw, u32 descriptor) +uint32_t +tdm_tx_desc_head_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor) { - return AQ_READ_REG_BIT(aq_hw, tdm_descdhd_adr(descriptor), - tdm_descdhd_msk, tdm_descdhd_shift); + return AQ_READ_REG_BIT(aq_hw, tdm_descdhd_adr(descriptor), + tdm_descdhd_msk, tdm_descdhd_shift); } -void tdm_tx_desc_len_set(struct aq_hw *aq_hw, u32 tx_desc_len, - u32 descriptor) +void +tdm_tx_desc_len_set(struct aq_hw *aq_hw, uint32_t tx_desc_len, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, tdm_descdlen_adr(descriptor), - tdm_descdlen_msk, - tdm_descdlen_shift, - tx_desc_len); + AQ_WRITE_REG_BIT(aq_hw, tdm_descdlen_adr(descriptor), tdm_descdlen_msk, + tdm_descdlen_shift, tx_desc_len); } -void tdm_tx_desc_wr_wb_irq_en_set(struct aq_hw *aq_hw, - u32 tx_desc_wr_wb_irq_en) +void +tdm_tx_desc_wr_wb_irq_en_set(struct aq_hw *aq_hw, uint32_t tx_desc_wr_wb_irq_en) { - AQ_WRITE_REG_BIT(aq_hw, tdm_int_desc_wrb_en_adr, - tdm_int_desc_wrb_en_msk, - tdm_int_desc_wrb_en_shift, - tx_desc_wr_wb_irq_en); + AQ_WRITE_REG_BIT(aq_hw, tdm_int_desc_wrb_en_adr, + tdm_int_desc_wrb_en_msk, tdm_int_desc_wrb_en_shift, + tx_desc_wr_wb_irq_en); } -void tdm_tx_desc_wr_wb_threshold_set(struct aq_hw *aq_hw, - u32 tx_desc_wr_wb_threshold, - u32 descriptor) +void +tdm_tx_desc_wr_wb_threshold_set(struct aq_hw *aq_hw, + uint32_t tx_desc_wr_wb_threshold, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, tdm_descdwrb_thresh_adr(descriptor), - tdm_descdwrb_thresh_msk, - tdm_descdwrb_thresh_shift, - tx_desc_wr_wb_threshold); + AQ_WRITE_REG_BIT(aq_hw, tdm_descdwrb_thresh_adr(descriptor), + tdm_descdwrb_thresh_msk, tdm_descdwrb_thresh_shift, + tx_desc_wr_wb_threshold); } -void tdm_tdm_intr_moder_en_set(struct aq_hw *aq_hw, - u32 tdm_irq_moderation_en) +void +tdm_tdm_intr_moder_en_set(struct aq_hw *aq_hw, uint32_t tdm_irq_moderation_en) { - AQ_WRITE_REG_BIT(aq_hw, tdm_int_mod_en_adr, - tdm_int_mod_en_msk, - tdm_int_mod_en_shift, - tdm_irq_moderation_en); + AQ_WRITE_REG_BIT(aq_hw, tdm_int_mod_en_adr, tdm_int_mod_en_msk, + tdm_int_mod_en_shift, tdm_irq_moderation_en); } /* thm */ -void thm_lso_tcp_flag_of_first_pkt_set(struct aq_hw *aq_hw, - u32 lso_tcp_flag_of_first_pkt) +void +thm_lso_tcp_flag_of_first_pkt_set(struct aq_hw *aq_hw, + uint32_t lso_tcp_flag_of_first_pkt) { - AQ_WRITE_REG_BIT(aq_hw, thm_lso_tcp_flag_first_adr, - thm_lso_tcp_flag_first_msk, - thm_lso_tcp_flag_first_shift, - lso_tcp_flag_of_first_pkt); + AQ_WRITE_REG_BIT(aq_hw, thm_lso_tcp_flag_first_adr, + thm_lso_tcp_flag_first_msk, thm_lso_tcp_flag_first_shift, + lso_tcp_flag_of_first_pkt); } -void thm_lso_tcp_flag_of_last_pkt_set(struct aq_hw *aq_hw, - u32 lso_tcp_flag_of_last_pkt) +void +thm_lso_tcp_flag_of_last_pkt_set(struct aq_hw *aq_hw, + uint32_t lso_tcp_flag_of_last_pkt) { - AQ_WRITE_REG_BIT(aq_hw, thm_lso_tcp_flag_last_adr, - thm_lso_tcp_flag_last_msk, - thm_lso_tcp_flag_last_shift, - lso_tcp_flag_of_last_pkt); + AQ_WRITE_REG_BIT(aq_hw, thm_lso_tcp_flag_last_adr, + thm_lso_tcp_flag_last_msk, thm_lso_tcp_flag_last_shift, + lso_tcp_flag_of_last_pkt); } -void thm_lso_tcp_flag_of_middle_pkt_set(struct aq_hw *aq_hw, - u32 lso_tcp_flag_of_middle_pkt) +void +thm_lso_tcp_flag_of_middle_pkt_set(struct aq_hw *aq_hw, + uint32_t lso_tcp_flag_of_middle_pkt) { - AQ_WRITE_REG_BIT(aq_hw, thm_lso_tcp_flag_mid_adr, - thm_lso_tcp_flag_mid_msk, - thm_lso_tcp_flag_mid_shift, - lso_tcp_flag_of_middle_pkt); + AQ_WRITE_REG_BIT(aq_hw, thm_lso_tcp_flag_mid_adr, + thm_lso_tcp_flag_mid_msk, thm_lso_tcp_flag_mid_shift, + lso_tcp_flag_of_middle_pkt); } /* TPB: tx packet buffer */ -void tpb_tx_buff_en_set(struct aq_hw *aq_hw, u32 tx_buff_en) +void +tpb_tx_buff_en_set(struct aq_hw *aq_hw, uint32_t tx_buff_en) { - AQ_WRITE_REG_BIT(aq_hw, tpb_tx_buf_en_adr, tpb_tx_buf_en_msk, - tpb_tx_buf_en_shift, tx_buff_en); + AQ_WRITE_REG_BIT(aq_hw, tpb_tx_buf_en_adr, tpb_tx_buf_en_msk, + tpb_tx_buf_en_shift, tx_buff_en); } -void tpb_tx_tc_mode_set(struct aq_hw *aq_hw, u32 tc_mode) +void +tpb_tx_tc_mode_set(struct aq_hw *aq_hw, uint32_t tc_mode) { - AQ_WRITE_REG_BIT(aq_hw, tpb_tx_tc_mode_adr, tpb_tx_tc_mode_msk, - tpb_tx_tc_mode_shift, tc_mode); + AQ_WRITE_REG_BIT(aq_hw, tpb_tx_tc_mode_adr, tpb_tx_tc_mode_msk, + tpb_tx_tc_mode_shift, tc_mode); } -void tpb_tx_buff_hi_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 tx_buff_hi_threshold_per_tc, - u32 buffer) +void +tpb_tx_buff_hi_threshold_per_tc_set(struct aq_hw *aq_hw, + uint32_t tx_buff_hi_threshold_per_tc, uint32_t buffer) { - AQ_WRITE_REG_BIT(aq_hw, tpb_txbhi_thresh_adr(buffer), - tpb_txbhi_thresh_msk, tpb_txbhi_thresh_shift, - tx_buff_hi_threshold_per_tc); + AQ_WRITE_REG_BIT(aq_hw, tpb_txbhi_thresh_adr(buffer), + tpb_txbhi_thresh_msk, tpb_txbhi_thresh_shift, + tx_buff_hi_threshold_per_tc); } -void tpb_tx_buff_lo_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 tx_buff_lo_threshold_per_tc, - u32 buffer) +void +tpb_tx_buff_lo_threshold_per_tc_set(struct aq_hw *aq_hw, + uint32_t tx_buff_lo_threshold_per_tc, uint32_t buffer) { - AQ_WRITE_REG_BIT(aq_hw, tpb_txblo_thresh_adr(buffer), - tpb_txblo_thresh_msk, tpb_txblo_thresh_shift, - tx_buff_lo_threshold_per_tc); + AQ_WRITE_REG_BIT(aq_hw, tpb_txblo_thresh_adr(buffer), + tpb_txblo_thresh_msk, tpb_txblo_thresh_shift, + tx_buff_lo_threshold_per_tc); } -void tpb_tx_dma_sys_lbk_en_set(struct aq_hw *aq_hw, u32 tx_dma_sys_lbk_en) +void +tpb_tx_dma_sys_lbk_en_set(struct aq_hw *aq_hw, uint32_t tx_dma_sys_lbk_en) { - AQ_WRITE_REG_BIT(aq_hw, tpb_dma_sys_lbk_adr, - tpb_dma_sys_lbk_msk, - tpb_dma_sys_lbk_shift, - tx_dma_sys_lbk_en); + AQ_WRITE_REG_BIT(aq_hw, tpb_dma_sys_lbk_adr, tpb_dma_sys_lbk_msk, + tpb_dma_sys_lbk_shift, tx_dma_sys_lbk_en); } -void rdm_rx_dma_desc_cache_init_tgl(struct aq_hw *aq_hw) +void +rdm_rx_dma_desc_cache_init_tgl(struct aq_hw *aq_hw) { - AQ_WRITE_REG_BIT(aq_hw, rdm_rx_dma_desc_cache_init_adr, - rdm_rx_dma_desc_cache_init_msk, - rdm_rx_dma_desc_cache_init_shift, - AQ_READ_REG_BIT(aq_hw, rdm_rx_dma_desc_cache_init_adr, - rdm_rx_dma_desc_cache_init_msk, - rdm_rx_dma_desc_cache_init_shift) ^ 1 - ); + AQ_WRITE_REG_BIT(aq_hw, rdm_rx_dma_desc_cache_init_adr, + rdm_rx_dma_desc_cache_init_msk, rdm_rx_dma_desc_cache_init_shift, + AQ_READ_REG_BIT(aq_hw, rdm_rx_dma_desc_cache_init_adr, + rdm_rx_dma_desc_cache_init_msk, + rdm_rx_dma_desc_cache_init_shift) ^ 1 + ); } -void tpb_tx_pkt_buff_size_per_tc_set(struct aq_hw *aq_hw, - u32 tx_pkt_buff_size_per_tc, u32 buffer) +void +tpb_tx_pkt_buff_size_per_tc_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_buff_size_per_tc, uint32_t buffer) { - AQ_WRITE_REG_BIT(aq_hw, tpb_txbbuf_size_adr(buffer), - tpb_txbbuf_size_msk, - tpb_txbbuf_size_shift, - tx_pkt_buff_size_per_tc); + AQ_WRITE_REG_BIT(aq_hw, tpb_txbbuf_size_adr(buffer), + tpb_txbbuf_size_msk, tpb_txbbuf_size_shift, + tx_pkt_buff_size_per_tc); } -void tpb_tx_path_scp_ins_en_set(struct aq_hw *aq_hw, u32 tx_path_scp_ins_en) +void +tpb_tx_path_scp_ins_en_set(struct aq_hw *aq_hw, uint32_t tx_path_scp_ins_en) { - AQ_WRITE_REG_BIT(aq_hw, tpb_tx_scp_ins_en_adr, - tpb_tx_scp_ins_en_msk, - tpb_tx_scp_ins_en_shift, - tx_path_scp_ins_en); + AQ_WRITE_REG_BIT(aq_hw, tpb_tx_scp_ins_en_adr, tpb_tx_scp_ins_en_msk, + tpb_tx_scp_ins_en_shift, tx_path_scp_ins_en); } /* TPO: tx packet offload */ -void tpo_ipv4header_crc_offload_en_set(struct aq_hw *aq_hw, - u32 ipv4header_crc_offload_en) +void +tpo_ipv4header_crc_offload_en_set(struct aq_hw *aq_hw, + uint32_t ipv4header_crc_offload_en) { - AQ_WRITE_REG_BIT(aq_hw, tpo_ipv4chk_en_adr, - tpo_ipv4chk_en_msk, - tpo_ipv4chk_en_shift, - ipv4header_crc_offload_en); + AQ_WRITE_REG_BIT(aq_hw, tpo_ipv4chk_en_adr, tpo_ipv4chk_en_msk, + tpo_ipv4chk_en_shift, ipv4header_crc_offload_en); } -void tpo_tcp_udp_crc_offload_en_set(struct aq_hw *aq_hw, - u32 tcp_udp_crc_offload_en) +void +tpo_tcp_udp_crc_offload_en_set(struct aq_hw *aq_hw, uint32_t tcp_udp_crc_offload_en) { - AQ_WRITE_REG_BIT(aq_hw, tpol4chk_en_adr, - tpol4chk_en_msk, - tpol4chk_en_shift, - tcp_udp_crc_offload_en); + AQ_WRITE_REG_BIT(aq_hw, tpol4chk_en_adr, tpol4chk_en_msk, + tpol4chk_en_shift, tcp_udp_crc_offload_en); } -void tpo_tx_pkt_sys_lbk_en_set(struct aq_hw *aq_hw, u32 tx_pkt_sys_lbk_en) +void +tpo_tx_pkt_sys_lbk_en_set(struct aq_hw *aq_hw, uint32_t tx_pkt_sys_lbk_en) { - AQ_WRITE_REG_BIT(aq_hw, tpo_pkt_sys_lbk_adr, - tpo_pkt_sys_lbk_msk, - tpo_pkt_sys_lbk_shift, - tx_pkt_sys_lbk_en); + AQ_WRITE_REG_BIT(aq_hw, tpo_pkt_sys_lbk_adr, tpo_pkt_sys_lbk_msk, + tpo_pkt_sys_lbk_shift, tx_pkt_sys_lbk_en); } /* TPS: tx packet scheduler */ -void tps_tx_pkt_shed_data_arb_mode_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_data_arb_mode) +void +tps_tx_pkt_shed_data_arb_mode_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_data_arb_mode) { - AQ_WRITE_REG_BIT(aq_hw, tps_data_tc_arb_mode_adr, - tps_data_tc_arb_mode_msk, - tps_data_tc_arb_mode_shift, - tx_pkt_shed_data_arb_mode); + AQ_WRITE_REG_BIT(aq_hw, tps_data_tc_arb_mode_adr, + tps_data_tc_arb_mode_msk, tps_data_tc_arb_mode_shift, + tx_pkt_shed_data_arb_mode); } -void tps_tx_pkt_shed_desc_rate_curr_time_res_set(struct aq_hw *aq_hw, - u32 curr_time_res) +void +tps_tx_pkt_shed_desc_rate_curr_time_res_set(struct aq_hw *aq_hw, + uint32_t curr_time_res) { - AQ_WRITE_REG_BIT(aq_hw, tps_desc_rate_ta_rst_adr, - tps_desc_rate_ta_rst_msk, - tps_desc_rate_ta_rst_shift, - curr_time_res); + AQ_WRITE_REG_BIT(aq_hw, tps_desc_rate_ta_rst_adr, + tps_desc_rate_ta_rst_msk, tps_desc_rate_ta_rst_shift, + curr_time_res); } -void tps_tx_pkt_shed_desc_rate_lim_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_rate_lim) +void +tps_tx_pkt_shed_desc_rate_lim_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_desc_rate_lim) { - AQ_WRITE_REG_BIT(aq_hw, tps_desc_rate_lim_adr, - tps_desc_rate_lim_msk, - tps_desc_rate_lim_shift, - tx_pkt_shed_desc_rate_lim); + AQ_WRITE_REG_BIT(aq_hw, tps_desc_rate_lim_adr, tps_desc_rate_lim_msk, + tps_desc_rate_lim_shift, tx_pkt_shed_desc_rate_lim); } -void tps_tx_pkt_shed_desc_tc_arb_mode_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_tc_arb_mode) +void +tps_tx_pkt_shed_desc_tc_arb_mode_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_desc_tc_arb_mode) { - AQ_WRITE_REG_BIT(aq_hw, tps_desc_tc_arb_mode_adr, - tps_desc_tc_arb_mode_msk, - tps_desc_tc_arb_mode_shift, - tx_pkt_shed_desc_tc_arb_mode); + AQ_WRITE_REG_BIT(aq_hw, tps_desc_tc_arb_mode_adr, + tps_desc_tc_arb_mode_msk, tps_desc_tc_arb_mode_shift, + tx_pkt_shed_desc_tc_arb_mode); } -void tps_tx_pkt_shed_desc_tc_max_credit_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_tc_max_credit, - u32 tc) +void +tps_tx_pkt_shed_desc_tc_max_credit_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_desc_tc_max_credit, uint32_t tc) { - AQ_WRITE_REG_BIT(aq_hw, tps_desc_tctcredit_max_adr(tc), - tps_desc_tctcredit_max_msk, - tps_desc_tctcredit_max_shift, - tx_pkt_shed_desc_tc_max_credit); + AQ_WRITE_REG_BIT(aq_hw, tps_desc_tctcredit_max_adr(tc), + tps_desc_tctcredit_max_msk, tps_desc_tctcredit_max_shift, + tx_pkt_shed_desc_tc_max_credit); } -void tps_tx_pkt_shed_desc_tc_weight_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_tc_weight, u32 tc) +void +tps_tx_pkt_shed_desc_tc_weight_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_desc_tc_weight, uint32_t tc) { - AQ_WRITE_REG_BIT(aq_hw, tps_desc_tctweight_adr(tc), - tps_desc_tctweight_msk, - tps_desc_tctweight_shift, - tx_pkt_shed_desc_tc_weight); + AQ_WRITE_REG_BIT(aq_hw, tps_desc_tctweight_adr(tc), + tps_desc_tctweight_msk, tps_desc_tctweight_shift, + tx_pkt_shed_desc_tc_weight); } -void tps_tx_pkt_shed_desc_vm_arb_mode_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_vm_arb_mode) +void +tps_tx_pkt_shed_desc_vm_arb_mode_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_desc_vm_arb_mode) { - AQ_WRITE_REG_BIT(aq_hw, tps_desc_vm_arb_mode_adr, - tps_desc_vm_arb_mode_msk, - tps_desc_vm_arb_mode_shift, - tx_pkt_shed_desc_vm_arb_mode); + AQ_WRITE_REG_BIT(aq_hw, tps_desc_vm_arb_mode_adr, + tps_desc_vm_arb_mode_msk, tps_desc_vm_arb_mode_shift, + tx_pkt_shed_desc_vm_arb_mode); } -void tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_tc_data_max_credit, - u32 tc) +void +tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_tc_data_max_credit, uint32_t tc) { - AQ_WRITE_REG_BIT(aq_hw, tps_data_tctcredit_max_adr(tc), - tps_data_tctcredit_max_msk, - tps_data_tctcredit_max_shift, - tx_pkt_shed_tc_data_max_credit); + AQ_WRITE_REG_BIT(aq_hw, tps_data_tctcredit_max_adr(tc), + tps_data_tctcredit_max_msk, tps_data_tctcredit_max_shift, + tx_pkt_shed_tc_data_max_credit); } -void tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_tc_data_weight, u32 tc) +void +tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_tc_data_weight, uint32_t tc) { - AQ_WRITE_REG_BIT(aq_hw, tps_data_tctweight_adr(tc), - tps_data_tctweight_msk, - tps_data_tctweight_shift, - tx_pkt_shed_tc_data_weight); + AQ_WRITE_REG_BIT(aq_hw, tps_data_tctweight_adr(tc), + tps_data_tctweight_msk, tps_data_tctweight_shift, + tx_pkt_shed_tc_data_weight); } /* tx */ -void tx_tx_reg_res_dis_set(struct aq_hw *aq_hw, u32 tx_reg_res_dis) +void +tx_tx_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t tx_reg_res_dis) { - AQ_WRITE_REG_BIT(aq_hw, tx_reg_res_dsbl_adr, - tx_reg_res_dsbl_msk, - tx_reg_res_dsbl_shift, tx_reg_res_dis); + AQ_WRITE_REG_BIT(aq_hw, tx_reg_res_dsbl_adr, tx_reg_res_dsbl_msk, + tx_reg_res_dsbl_shift, tx_reg_res_dis); } /* msm */ -u32 msm_reg_access_status_get(struct aq_hw *aq_hw) +uint32_t +msm_reg_access_status_get(struct aq_hw *aq_hw) { - return AQ_READ_REG_BIT(aq_hw, msm_reg_access_busy_adr, - msm_reg_access_busy_msk, - msm_reg_access_busy_shift); + return AQ_READ_REG_BIT(aq_hw, msm_reg_access_busy_adr, + msm_reg_access_busy_msk, msm_reg_access_busy_shift); } -void msm_reg_addr_for_indirect_addr_set(struct aq_hw *aq_hw, - u32 reg_addr_for_indirect_addr) +void +msm_reg_addr_for_indirect_addr_set(struct aq_hw *aq_hw, + uint32_t reg_addr_for_indirect_addr) { - AQ_WRITE_REG_BIT(aq_hw, msm_reg_addr_adr, - msm_reg_addr_msk, - msm_reg_addr_shift, - reg_addr_for_indirect_addr); + AQ_WRITE_REG_BIT(aq_hw, msm_reg_addr_adr, msm_reg_addr_msk, + msm_reg_addr_shift, reg_addr_for_indirect_addr); } -void msm_reg_rd_strobe_set(struct aq_hw *aq_hw, u32 reg_rd_strobe) +void +msm_reg_rd_strobe_set(struct aq_hw *aq_hw, uint32_t reg_rd_strobe) { - AQ_WRITE_REG_BIT(aq_hw, msm_reg_rd_strobe_adr, - msm_reg_rd_strobe_msk, - msm_reg_rd_strobe_shift, - reg_rd_strobe); + AQ_WRITE_REG_BIT(aq_hw, msm_reg_rd_strobe_adr, msm_reg_rd_strobe_msk, + msm_reg_rd_strobe_shift, reg_rd_strobe); } -u32 msm_reg_rd_data_get(struct aq_hw *aq_hw) +uint32_t +msm_reg_rd_data_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, msm_reg_rd_data_adr); + return AQ_READ_REG(aq_hw, msm_reg_rd_data_adr); } -void msm_reg_wr_data_set(struct aq_hw *aq_hw, u32 reg_wr_data) +void +msm_reg_wr_data_set(struct aq_hw *aq_hw, uint32_t reg_wr_data) { - AQ_WRITE_REG(aq_hw, msm_reg_wr_data_adr, reg_wr_data); + AQ_WRITE_REG(aq_hw, msm_reg_wr_data_adr, reg_wr_data); } -void msm_reg_wr_strobe_set(struct aq_hw *aq_hw, u32 reg_wr_strobe) +void +msm_reg_wr_strobe_set(struct aq_hw *aq_hw, uint32_t reg_wr_strobe) { - AQ_WRITE_REG_BIT(aq_hw, msm_reg_wr_strobe_adr, - msm_reg_wr_strobe_msk, - msm_reg_wr_strobe_shift, - reg_wr_strobe); + AQ_WRITE_REG_BIT(aq_hw, msm_reg_wr_strobe_adr, msm_reg_wr_strobe_msk, + msm_reg_wr_strobe_shift, reg_wr_strobe); } /* pci */ -void pci_pci_reg_res_dis_set(struct aq_hw *aq_hw, u32 pci_reg_res_dis) +void +pci_pci_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t pci_reg_res_dis) { - AQ_WRITE_REG_BIT(aq_hw, pci_reg_res_dsbl_adr, - pci_reg_res_dsbl_msk, - pci_reg_res_dsbl_shift, - pci_reg_res_dis); + AQ_WRITE_REG_BIT(aq_hw, pci_reg_res_dsbl_adr, pci_reg_res_dsbl_msk, + pci_reg_res_dsbl_shift, pci_reg_res_dis); } -u32 reg_glb_cpu_scratch_scp_get(struct aq_hw *hw, u32 glb_cpu_scratch_scp_idx) +uint32_t +reg_glb_cpu_scratch_scp_get(struct aq_hw *hw, uint32_t glb_cpu_scratch_scp_idx) { - return AQ_READ_REG(hw, glb_cpu_scratch_scp_adr(glb_cpu_scratch_scp_idx)); + return AQ_READ_REG(hw, glb_cpu_scratch_scp_adr(glb_cpu_scratch_scp_idx)); } -void reg_glb_cpu_scratch_scp_set(struct aq_hw *aq_hw, u32 glb_cpu_scratch_scp, - u32 scratch_scp) +void +reg_glb_cpu_scratch_scp_set(struct aq_hw *aq_hw, uint32_t glb_cpu_scratch_scp, + uint32_t scratch_scp) { - AQ_WRITE_REG(aq_hw, glb_cpu_scratch_scp_adr(scratch_scp), - glb_cpu_scratch_scp); + AQ_WRITE_REG(aq_hw, glb_cpu_scratch_scp_adr(scratch_scp), + glb_cpu_scratch_scp); } -u32 reg_glb_cpu_no_reset_scratchpad_get(struct aq_hw *hw, u32 index) +uint32_t +reg_glb_cpu_no_reset_scratchpad_get(struct aq_hw *hw, uint32_t index) { - return AQ_READ_REG(hw, glb_cpu_no_reset_scratchpad_adr(index)); + return AQ_READ_REG(hw, glb_cpu_no_reset_scratchpad_adr(index)); } -void reg_glb_cpu_no_reset_scratchpad_set(struct aq_hw* hw, u32 value, u32 index) +void +reg_glb_cpu_no_reset_scratchpad_set(struct aq_hw* hw, uint32_t value, uint32_t index) { - AQ_WRITE_REG(hw, glb_cpu_no_reset_scratchpad_adr(index), value); + AQ_WRITE_REG(hw, glb_cpu_no_reset_scratchpad_adr(index), value); } -void reg_mif_power_gating_enable_control_set(struct aq_hw* hw, u32 value) +void +reg_mif_power_gating_enable_control_set(struct aq_hw* hw, uint32_t value) { - AQ_WRITE_REG(hw, mif_power_gating_enable_control_adr, value); + AQ_WRITE_REG(hw, mif_power_gating_enable_control_adr, value); } -u32 reg_mif_power_gating_enable_control_get(struct aq_hw* hw) +uint32_t +reg_mif_power_gating_enable_control_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, mif_power_gating_enable_control_adr); + return AQ_READ_REG(hw, mif_power_gating_enable_control_adr); } -void reg_glb_general_provisioning9_set(struct aq_hw* hw, u32 value) +void +reg_glb_general_provisioning9_set(struct aq_hw* hw, uint32_t value) { - AQ_WRITE_REG(hw, glb_general_provisioning9_adr, value); + AQ_WRITE_REG(hw, glb_general_provisioning9_adr, value); } -u32 reg_glb_general_provisioning9_get(struct aq_hw* hw) +uint32_t +reg_glb_general_provisioning9_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, glb_general_provisioning9_adr); + return AQ_READ_REG(hw, glb_general_provisioning9_adr); } -void reg_glb_nvr_provisioning2_set(struct aq_hw* hw, u32 value) +void +reg_glb_nvr_provisioning2_set(struct aq_hw* hw, uint32_t value) { - AQ_WRITE_REG(hw, glb_nvr_provisioning2_adr, value); + AQ_WRITE_REG(hw, glb_nvr_provisioning2_adr, value); } -u32 reg_glb_nvr_provisioning2_get(struct aq_hw* hw) +uint32_t +reg_glb_nvr_provisioning2_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, glb_nvr_provisioning2_adr); + return AQ_READ_REG(hw, glb_nvr_provisioning2_adr); } -void reg_glb_nvr_interface1_set(struct aq_hw* hw, u32 value) +void +reg_glb_nvr_interface1_set(struct aq_hw* hw, uint32_t value) { - AQ_WRITE_REG(hw, glb_nvr_interface1_adr, value); + AQ_WRITE_REG(hw, glb_nvr_interface1_adr, value); } -u32 reg_glb_nvr_interface1_get(struct aq_hw* hw) +uint32_t +reg_glb_nvr_interface1_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, glb_nvr_interface1_adr); + return AQ_READ_REG(hw, glb_nvr_interface1_adr); } /* get mif up mailbox busy */ -u32 mif_mcp_up_mailbox_busy_get(struct aq_hw *hw) +uint32_t +mif_mcp_up_mailbox_busy_get(struct aq_hw *hw) { - return AQ_READ_REG_BIT(hw, mif_mcp_up_mailbox_busy_adr, - mif_mcp_up_mailbox_busy_msk, - mif_mcp_up_mailbox_busy_shift); + return AQ_READ_REG_BIT(hw, mif_mcp_up_mailbox_busy_adr, + mif_mcp_up_mailbox_busy_msk, mif_mcp_up_mailbox_busy_shift); } /* set mif up mailbox execute operation */ -void mif_mcp_up_mailbox_execute_operation_set(struct aq_hw* hw, u32 value) +void +mif_mcp_up_mailbox_execute_operation_set(struct aq_hw* hw, uint32_t value) { - AQ_WRITE_REG_BIT(hw, mif_mcp_up_mailbox_execute_operation_adr, - mif_mcp_up_mailbox_execute_operation_msk, - mif_mcp_up_mailbox_execute_operation_shift, - value); + AQ_WRITE_REG_BIT(hw, mif_mcp_up_mailbox_execute_operation_adr, + mif_mcp_up_mailbox_execute_operation_msk, + mif_mcp_up_mailbox_execute_operation_shift, value); } /* get mif uP mailbox address */ -u32 mif_mcp_up_mailbox_addr_get(struct aq_hw *hw) +uint32_t +mif_mcp_up_mailbox_addr_get(struct aq_hw *hw) { - return AQ_READ_REG(hw, mif_mcp_up_mailbox_addr_adr); + return AQ_READ_REG(hw, mif_mcp_up_mailbox_addr_adr); } /* set mif uP mailbox address */ -void mif_mcp_up_mailbox_addr_set(struct aq_hw *hw, u32 value) +void +mif_mcp_up_mailbox_addr_set(struct aq_hw *hw, uint32_t value) { - AQ_WRITE_REG(hw, mif_mcp_up_mailbox_addr_adr, value); + AQ_WRITE_REG(hw, mif_mcp_up_mailbox_addr_adr, value); } /* get mif uP mailbox data */ -u32 mif_mcp_up_mailbox_data_get(struct aq_hw *hw) +uint32_t +mif_mcp_up_mailbox_data_get(struct aq_hw *hw) { - return AQ_READ_REG(hw, mif_mcp_up_mailbox_data_adr); + return AQ_READ_REG(hw, mif_mcp_up_mailbox_data_adr); } -void hw_atl_rpfl3l4_ipv4_dest_addr_clear(struct aq_hw_s *aq_hw, u8 location) +void +hw_atl_rpfl3l4_ipv4_dest_addr_clear(struct aq_hw_s *aq_hw, uint8_t location) { aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location), 0U); } -void hw_atl_rpfl3l4_ipv4_src_addr_clear(struct aq_hw_s *aq_hw, u8 location) +void +hw_atl_rpfl3l4_ipv4_src_addr_clear(struct aq_hw_s *aq_hw, uint8_t location) { aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location), 0U); } -void hw_atl_rpfl3l4_cmd_clear(struct aq_hw_s *aq_hw, u8 location) +void +hw_atl_rpfl3l4_cmd_clear(struct aq_hw_s *aq_hw, uint8_t location) { aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_CTRL_FL3L4(location), 0U); } -void hw_atl_rpfl3l4_ipv6_dest_addr_clear(struct aq_hw_s *aq_hw, u8 location) +void +hw_atl_rpfl3l4_ipv6_dest_addr_clear(struct aq_hw_s *aq_hw, uint8_t location) { int i; for (i = 0; i < 4; ++i) aq_hw_write_reg(aq_hw, - HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location + i), - 0U); + HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location + i), 0U); } -void hw_atl_rpfl3l4_ipv6_src_addr_clear(struct aq_hw_s *aq_hw, u8 location) +void +hw_atl_rpfl3l4_ipv6_src_addr_clear(struct aq_hw_s *aq_hw, uint8_t location) { int i; for (i = 0; i < 4; ++i) aq_hw_write_reg(aq_hw, - HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location + i), - 0U); + HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location + i), 0U); } -void hw_atl_rpfl3l4_ipv4_dest_addr_set(struct aq_hw_s *aq_hw, u8 location, - u32 ipv4_dest) +void +hw_atl_rpfl3l4_ipv4_dest_addr_set(struct aq_hw_s *aq_hw, uint8_t location, + uint32_t ipv4_dest) { aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location), - ipv4_dest); + ipv4_dest); } -void hw_atl_rpfl3l4_ipv4_src_addr_set(struct aq_hw_s *aq_hw, u8 location, - u32 ipv4_src) +void +hw_atl_rpfl3l4_ipv4_src_addr_set(struct aq_hw_s *aq_hw, uint8_t location, + uint32_t ipv4_src) { - aq_hw_write_reg(aq_hw, - HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location), - ipv4_src); + aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location), + ipv4_src); } -void hw_atl_rpfl3l4_cmd_set(struct aq_hw_s *aq_hw, u8 location, u32 cmd) +void +hw_atl_rpfl3l4_cmd_set(struct aq_hw_s *aq_hw, uint8_t location, uint32_t cmd) { aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_CTRL_FL3L4(location), cmd); } -void hw_atl_rpfl3l4_ipv6_src_addr_set(struct aq_hw_s *aq_hw, u8 location, - u32 *ipv6_src) +void +hw_atl_rpfl3l4_ipv6_src_addr_set(struct aq_hw_s *aq_hw, uint8_t location, + uint32_t *ipv6_src) { int i; for (i = 0; i < 4; ++i) aq_hw_write_reg(aq_hw, - HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location + i), - ipv6_src[i]); + HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location + i), ipv6_src[i]); } -void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw_s *aq_hw, u8 location, - u32 *ipv6_dest) +void +hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw_s *aq_hw, uint8_t location, + uint32_t *ipv6_dest) { int i; for (i = 0; i < 4; ++i) aq_hw_write_reg(aq_hw, - HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location + i), - ipv6_dest[i]); + HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location + i), ipv6_dest[i]); } diff --git a/sys/dev/aq/aq_hw_llh.h b/sys/dev/aq/aq_hw_llh.h index 8d014481cca4..68cc666be1a3 100644 --- a/sys/dev/aq/aq_hw_llh.h +++ b/sys/dev/aq/aq_hw_llh.h @@ -46,1131 +46,1164 @@ struct aq_hw; /* global */ -void reg_glb_fw_image_id1_set(struct aq_hw* hw, u32 value); -u32 reg_glb_fw_image_id1_get(struct aq_hw* hw); +void reg_glb_fw_image_id1_set(struct aq_hw* hw, uint32_t value); +uint32_t reg_glb_fw_image_id1_get(struct aq_hw* hw); /* set global microprocessor semaphore */ -void reg_glb_cpu_sem_set(struct aq_hw *aq_hw, u32 sem_value, u32 sem_index); +void reg_glb_cpu_sem_set(struct aq_hw *aq_hw, uint32_t sem_value, + uint32_t sem_index); /* get global microprocessor semaphore */ -u32 reg_glb_cpu_sem_get(struct aq_hw *aq_hw, u32 sem_index); +uint32_t reg_glb_cpu_sem_get(struct aq_hw *aq_hw, uint32_t sem_index); /* -* \brief Get Global Standard Control 1 -* \return GlobalStandardControl1 -*/ -u32 reg_glb_standard_ctl1_get(struct aq_hw* hw); + * \brief Get Global Standard Control 1 + * \return GlobalStandardControl1 + */ +uint32_t reg_glb_standard_ctl1_get(struct aq_hw* hw); /* -* \brief Set Global Standard Control 1 -*/ -void reg_glb_standard_ctl1_set(struct aq_hw* hw, u32 glb_standard_ctl1); + * \brief Set Global Standard Control 1 + */ +void reg_glb_standard_ctl1_set(struct aq_hw* hw, uint32_t glb_standard_ctl1); /* -* \brief Set Global Control 2 -*/ -void reg_global_ctl2_set(struct aq_hw* hw, u32 global_ctl2); + * \brief Set Global Control 2 + */ +void reg_global_ctl2_set(struct aq_hw* hw, uint32_t global_ctl2); /* -* \brief Get Global Control 2 -* \return GlobalControl2 -*/ -u32 reg_global_ctl2_get(struct aq_hw* hw); + * \brief Get Global Control 2 + * \return GlobalControl2 + */ +uint32_t reg_global_ctl2_get(struct aq_hw* hw); /* -* \brief Set Global Daisy Chain Status 1 -*/ -void reg_glb_daisy_chain_status1_set(struct aq_hw* hw, u32 glb_daisy_chain_status1); + * \brief Set Global Daisy Chain Status 1 + */ +void reg_glb_daisy_chain_status1_set(struct aq_hw* hw, + uint32_t glb_daisy_chain_status1); /* -* \brief Get Global Daisy Chain Status 1 -* \return glb_daisy_chain_status1 -*/ -u32 reg_glb_daisy_chain_status1_get(struct aq_hw* hw); + * \brief Get Global Daisy Chain Status 1 + * \return glb_daisy_chain_status1 + */ +uint32_t reg_glb_daisy_chain_status1_get(struct aq_hw* hw); /* -* \brief Set Global General Provisioning 9 -*/ -void reg_glb_general_provisioning9_set(struct aq_hw* hw, u32 value); + * \brief Set Global General Provisioning 9 + */ +void reg_glb_general_provisioning9_set(struct aq_hw* hw, uint32_t value); /* -* \brief Get Global General Provisioning 9 -* \return GlobalGeneralProvisioning9 -*/ -u32 reg_glb_general_provisioning9_get(struct aq_hw* hw); + * \brief Get Global General Provisioning 9 + * \return GlobalGeneralProvisioning9 + */ +uint32_t reg_glb_general_provisioning9_get(struct aq_hw* hw); /* -* \brief Set Global NVR Provisioning 2 -*/ -void reg_glb_nvr_provisioning2_set(struct aq_hw* hw, u32 value); + * \brief Set Global NVR Provisioning 2 + */ +void reg_glb_nvr_provisioning2_set(struct aq_hw* hw, uint32_t value); /* -* \brief Get Global NVR Provisioning 2 -* \return GlobalNvrProvisioning2 -*/ -u32 reg_glb_nvr_provisioning2_get(struct aq_hw* hw); + * \brief Get Global NVR Provisioning 2 + * \return GlobalNvrProvisioning2 + */ +uint32_t reg_glb_nvr_provisioning2_get(struct aq_hw* hw); /* -* \brief Set Global NVR Interface 1 -*/ -void reg_glb_nvr_interface1_set(struct aq_hw* hw, u32 value); + * \brief Set Global NVR Interface 1 + */ +void reg_glb_nvr_interface1_set(struct aq_hw* hw, uint32_t value); /* -* \brief Get Global NVR Interface 1 -* \return GlobalNvrInterface1 -*/ -u32 reg_glb_nvr_interface1_get(struct aq_hw* hw); + * \brief Get Global NVR Interface 1 + * \return GlobalNvrInterface1 + */ +uint32_t reg_glb_nvr_interface1_get(struct aq_hw* hw); /* set global register reset disable */ -void glb_glb_reg_res_dis_set(struct aq_hw *aq_hw, u32 glb_reg_res_dis); +void glb_glb_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t glb_reg_res_dis); /* set soft reset */ -void glb_soft_res_set(struct aq_hw *aq_hw, u32 soft_res); +void glb_soft_res_set(struct aq_hw *aq_hw, uint32_t soft_res); /* get soft reset */ -u32 glb_soft_res_get(struct aq_hw *aq_hw); +uint32_t glb_soft_res_get(struct aq_hw *aq_hw); /* stats */ -u32 rpb_rx_dma_drop_pkt_cnt_get(struct aq_hw *aq_hw); +uint32_t rpb_rx_dma_drop_pkt_cnt_get(struct aq_hw *aq_hw); /* get rx dma good octet counter lsw */ -u32 stats_rx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw); +uint32_t stats_rx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw); /* get rx dma good packet counter lsw */ -u32 stats_rx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw); +uint32_t stats_rx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw); /* get tx dma good octet counter lsw */ -u32 stats_tx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw); +uint32_t stats_tx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw); /* get tx dma good packet counter lsw */ -u32 stats_tx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw); +uint32_t stats_tx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw); /* get rx dma good octet counter msw */ -u32 stats_rx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw); +uint32_t stats_rx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw); /* get rx dma good packet counter msw */ -u32 stats_rx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw); +uint32_t stats_rx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw); /* get tx dma good octet counter msw */ -u32 stats_tx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw); +uint32_t stats_tx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw); /* get tx dma good packet counter msw */ -u32 stats_tx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw); +uint32_t stats_tx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw); /* get rx lro coalesced packet count lsw */ -u32 stats_rx_lro_coalesced_pkt_count0_get(struct aq_hw *aq_hw); +uint32_t stats_rx_lro_coalesced_pkt_count0_get(struct aq_hw *aq_hw); /* get msm rx errors counter register */ -u32 reg_mac_msm_rx_errs_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_rx_errs_cnt_get(struct aq_hw *aq_hw); /* get msm rx unicast frames counter register */ -u32 reg_mac_msm_rx_ucst_frm_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_rx_ucst_frm_cnt_get(struct aq_hw *aq_hw); /* get msm rx multicast frames counter register */ -u32 reg_mac_msm_rx_mcst_frm_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_rx_mcst_frm_cnt_get(struct aq_hw *aq_hw); /* get msm rx broadcast frames counter register */ -u32 reg_mac_msm_rx_bcst_frm_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_rx_bcst_frm_cnt_get(struct aq_hw *aq_hw); /* get msm rx broadcast octets counter register 1 */ -u32 reg_mac_msm_rx_bcst_octets_counter1get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_rx_bcst_octets_counter1get(struct aq_hw *aq_hw); /* get msm rx unicast octets counter register 0 */ -u32 reg_mac_msm_rx_ucst_octets_counter0get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_rx_ucst_octets_counter0get(struct aq_hw *aq_hw); /* get rx dma statistics counter 7 */ -u32 reg_rx_dma_stat_counter7get(struct aq_hw *aq_hw); +uint32_t reg_rx_dma_stat_counter7get(struct aq_hw *aq_hw); /* get msm tx errors counter register */ -u32 reg_mac_msm_tx_errs_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_tx_errs_cnt_get(struct aq_hw *aq_hw); /* get msm tx unicast frames counter register */ -u32 reg_mac_msm_tx_ucst_frm_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_tx_ucst_frm_cnt_get(struct aq_hw *aq_hw); /* get msm tx multicast frames counter register */ -u32 reg_mac_msm_tx_mcst_frm_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_tx_mcst_frm_cnt_get(struct aq_hw *aq_hw); /* get msm tx broadcast frames counter register */ -u32 reg_mac_msm_tx_bcst_frm_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_tx_bcst_frm_cnt_get(struct aq_hw *aq_hw); /* get msm tx multicast octets counter register 1 */ -u32 reg_mac_msm_tx_mcst_octets_counter1get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_tx_mcst_octets_counter1get(struct aq_hw *aq_hw); /* get msm tx broadcast octets counter register 1 */ -u32 reg_mac_msm_tx_bcst_octets_counter1get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_tx_bcst_octets_counter1get(struct aq_hw *aq_hw); /* get msm tx unicast octets counter register 0 */ -u32 reg_mac_msm_tx_ucst_octets_counter0get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_tx_ucst_octets_counter0get(struct aq_hw *aq_hw); /* get global mif identification */ -u32 reg_glb_mif_id_get(struct aq_hw *aq_hw); +uint32_t reg_glb_mif_id_get(struct aq_hw *aq_hw); /** \brief Set Tx Register Reset Disable -* \param txRegisterResetDisable 1 = Disable the S/W reset to MAC-PHY registers, 0 = Enable the S/W reset to MAC-PHY registers -* \note Default value: 0x1 -* \note PORT="pif_mpi_reg_reset_dsbl_i" -*/ -void mpi_tx_reg_res_dis_set(struct aq_hw* hw, u32 mpi_tx_reg_res_dis); + * \param txRegisterResetDisable 1 = Disable the S/W reset to MAC-PHY registers, 0 = Enable the S/W reset to MAC-PHY registers + * \note Default value: 0x1 + * \note PORT="pif_mpi_reg_reset_dsbl_i" + */ +void mpi_tx_reg_res_dis_set(struct aq_hw* hw, uint32_t mpi_tx_reg_res_dis); /** \brief Get Tx Register Reset Disable -* \return 1 = Disable the S/W reset to MAC-PHY registers, 0 = Enable the S/W reset to MAC-PHY registers -* \note Default value: 0x1 -* \note PORT="pif_mpi_reg_reset_dsbl_i" -*/ -u32 mpi_tx_reg_res_dis_get(struct aq_hw* hw); + * \return 1 = Disable the S/W reset to MAC-PHY registers, 0 = Enable the S/W reset to MAC-PHY registers + * \note Default value: 0x1 + * \note PORT="pif_mpi_reg_reset_dsbl_i" + */ +uint32_t mpi_tx_reg_res_dis_get(struct aq_hw* hw); /* interrupt */ /* set interrupt auto mask lsw */ -void itr_irq_auto_masklsw_set(struct aq_hw *aq_hw, u32 irq_auto_masklsw); +void itr_irq_auto_masklsw_set(struct aq_hw *aq_hw, uint32_t irq_auto_masklsw); /* set interrupt mapping enable rx */ -void itr_irq_map_en_rx_set(struct aq_hw *aq_hw, u32 irq_map_en_rx, u32 rx); +void itr_irq_map_en_rx_set(struct aq_hw *aq_hw, uint32_t irq_map_en_rx, + uint32_t rx); /* set interrupt mapping enable tx */ -void itr_irq_map_en_tx_set(struct aq_hw *aq_hw, u32 irq_map_en_tx, u32 tx); +void itr_irq_map_en_tx_set(struct aq_hw *aq_hw, uint32_t irq_map_en_tx, + uint32_t tx); /* set interrupt mapping rx */ -void itr_irq_map_rx_set(struct aq_hw *aq_hw, u32 irq_map_rx, u32 rx); +void itr_irq_map_rx_set(struct aq_hw *aq_hw, uint32_t irq_map_rx, uint32_t rx); /* set interrupt mapping tx */ -void itr_irq_map_tx_set(struct aq_hw *aq_hw, u32 irq_map_tx, u32 tx); +void itr_irq_map_tx_set(struct aq_hw *aq_hw, uint32_t irq_map_tx, uint32_t tx); /* set interrupt mask clear lsw */ -void itr_irq_msk_clearlsw_set(struct aq_hw *aq_hw, u32 irq_msk_clearlsw); +void itr_irq_msk_clearlsw_set(struct aq_hw *aq_hw, uint32_t irq_msk_clearlsw); /* set interrupt mask set lsw */ -void itr_irq_msk_setlsw_set(struct aq_hw *aq_hw, u32 irq_msk_setlsw); +void itr_irq_msk_setlsw_set(struct aq_hw *aq_hw, uint32_t irq_msk_setlsw); /* set interrupt register reset disable */ -void itr_irq_reg_res_dis_set(struct aq_hw *aq_hw, u32 irq_reg_res_dis); +void itr_irq_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t irq_reg_res_dis); /* set interrupt status clear lsw */ void itr_irq_status_clearlsw_set(struct aq_hw *aq_hw, - u32 irq_status_clearlsw); + uint32_t irq_status_clearlsw); /* get interrupt status lsw */ -u32 itr_irq_statuslsw_get(struct aq_hw *aq_hw); +uint32_t itr_irq_statuslsw_get(struct aq_hw *aq_hw); /* get reset interrupt */ -u32 itr_res_irq_get(struct aq_hw *aq_hw); +uint32_t itr_res_irq_get(struct aq_hw *aq_hw); /* set reset interrupt */ -void itr_res_irq_set(struct aq_hw *aq_hw, u32 res_irq); +void itr_res_irq_set(struct aq_hw *aq_hw, uint32_t res_irq); -void itr_irq_mode_set(struct aq_hw *aq_hw, u32 irq_mode); +void itr_irq_mode_set(struct aq_hw *aq_hw, uint32_t irq_mode); /* Set Link Interrupt Mapping Enable */ -void itr_link_int_map_en_set(struct aq_hw *aq_hw, u32 link_int_en_map_en); +void itr_link_int_map_en_set(struct aq_hw *aq_hw, uint32_t link_int_en_map_en); /* Get Link Interrupt Mapping Enable */ -u32 itr_link_int_map_en_get(struct aq_hw *aq_hw); +uint32_t itr_link_int_map_en_get(struct aq_hw *aq_hw); /* Set Link Interrupt Mapping */ -void itr_link_int_map_set(struct aq_hw *aq_hw, u32 link_int_map); +void itr_link_int_map_set(struct aq_hw *aq_hw, uint32_t link_int_map); /* Get Link Interrupt Mapping */ -u32 itr_link_int_map_get(struct aq_hw *aq_hw); +uint32_t itr_link_int_map_get(struct aq_hw *aq_hw); /* Set MIF Interrupt Mapping Enable */ -void itr_mif_int_map_en_set(struct aq_hw *aq_hw, u32 mif_int_map_en, u32 mif); +void itr_mif_int_map_en_set(struct aq_hw *aq_hw, uint32_t mif_int_map_en, + uint32_t mif); /* Get MIF Interrupt Mapping Enable */ -u32 itr_mif_int_map_en_get(struct aq_hw *aq_hw, u32 mif); +uint32_t itr_mif_int_map_en_get(struct aq_hw *aq_hw, uint32_t mif); /* Set MIF Interrupt Mapping */ -void itr_mif_int_map_set(struct aq_hw *aq_hw, u32 mif_int_map, u32 mif); +void itr_mif_int_map_set(struct aq_hw *aq_hw, uint32_t mif_int_map, + uint32_t mif); /* Get MIF Interrupt Mapping */ -u32 itr_mif_int_map_get(struct aq_hw *aq_hw, u32 mif); +uint32_t itr_mif_int_map_get(struct aq_hw *aq_hw, uint32_t mif); -void itr_irq_status_cor_en_set(struct aq_hw *aq_hw, u32 irq_status_cor_enable); +void itr_irq_status_cor_en_set(struct aq_hw *aq_hw, + uint32_t irq_status_cor_enable); -void itr_irq_auto_mask_clr_en_set(struct aq_hw *aq_hw, u32 irq_auto_mask_clr_en); +void itr_irq_auto_mask_clr_en_set(struct aq_hw *aq_hw, + uint32_t irq_auto_mask_clr_en); /* rdm */ /* set cpu id */ -void rdm_cpu_id_set(struct aq_hw *aq_hw, u32 cpuid, u32 dca); +void rdm_cpu_id_set(struct aq_hw *aq_hw, uint32_t cpuid, uint32_t dca); /* set rx dca enable */ -void rdm_rx_dca_en_set(struct aq_hw *aq_hw, u32 rx_dca_en); +void rdm_rx_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_dca_en); /* set rx dca mode */ -void rdm_rx_dca_mode_set(struct aq_hw *aq_hw, u32 rx_dca_mode); +void rdm_rx_dca_mode_set(struct aq_hw *aq_hw, uint32_t rx_dca_mode); /* set rx descriptor data buffer size */ void rdm_rx_desc_data_buff_size_set(struct aq_hw *aq_hw, - u32 rx_desc_data_buff_size, - u32 descriptor); + uint32_t rx_desc_data_buff_size, uint32_t descriptor); /* set rx descriptor dca enable */ -void rdm_rx_desc_dca_en_set(struct aq_hw *aq_hw, u32 rx_desc_dca_en, - u32 dca); +void rdm_rx_desc_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_desc_dca_en, + uint32_t dca); /* set rx descriptor enable */ -void rdm_rx_desc_en_set(struct aq_hw *aq_hw, u32 rx_desc_en, - u32 descriptor); +void rdm_rx_desc_en_set(struct aq_hw *aq_hw, uint32_t rx_desc_en, + uint32_t descriptor); /* set rx descriptor header splitting */ void rdm_rx_desc_head_splitting_set(struct aq_hw *aq_hw, - u32 rx_desc_head_splitting, - u32 descriptor); + uint32_t rx_desc_head_splitting, uint32_t descriptor); /* get rx descriptor head pointer */ -u32 rdm_rx_desc_head_ptr_get(struct aq_hw *aq_hw, u32 descriptor); +uint32_t rdm_rx_desc_head_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor); /* set rx descriptor length */ -void rdm_rx_desc_len_set(struct aq_hw *aq_hw, u32 rx_desc_len, - u32 descriptor); +void rdm_rx_desc_len_set(struct aq_hw *aq_hw, uint32_t rx_desc_len, + uint32_t descriptor); /* set rx descriptor write-back interrupt enable */ void rdm_rx_desc_wr_wb_irq_en_set(struct aq_hw *aq_hw, - u32 rx_desc_wr_wb_irq_en); + uint32_t rx_desc_wr_wb_irq_en); /* set rx header dca enable */ -void rdm_rx_head_dca_en_set(struct aq_hw *aq_hw, u32 rx_head_dca_en, - u32 dca); +void rdm_rx_head_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_head_dca_en, + uint32_t dca); /* set rx payload dca enable */ -void rdm_rx_pld_dca_en_set(struct aq_hw *aq_hw, u32 rx_pld_dca_en, u32 dca); +void rdm_rx_pld_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_pld_dca_en, + uint32_t dca); /* set rx descriptor header buffer size */ void rdm_rx_desc_head_buff_size_set(struct aq_hw *aq_hw, - u32 rx_desc_head_buff_size, - u32 descriptor); + uint32_t rx_desc_head_buff_size, uint32_t descriptor); /* set rx descriptor reset */ -void rdm_rx_desc_res_set(struct aq_hw *aq_hw, u32 rx_desc_res, - u32 descriptor); +void rdm_rx_desc_res_set(struct aq_hw *aq_hw, uint32_t rx_desc_res, + uint32_t descriptor); /* Set RDM Interrupt Moderation Enable */ -void rdm_rdm_intr_moder_en_set(struct aq_hw *aq_hw, u32 rdm_intr_moder_en); +void rdm_rdm_intr_moder_en_set(struct aq_hw *aq_hw, uint32_t rdm_intr_moder_en); /* reg */ /* set general interrupt mapping register */ -void reg_gen_irq_map_set(struct aq_hw *aq_hw, u32 gen_intr_map, u32 regidx); +void reg_gen_irq_map_set(struct aq_hw *aq_hw, uint32_t gen_intr_map, + uint32_t regidx); /* get general interrupt status register */ -u32 reg_gen_irq_status_get(struct aq_hw *aq_hw); +uint32_t reg_gen_irq_status_get(struct aq_hw *aq_hw); /* set interrupt global control register */ -void reg_irq_glb_ctl_set(struct aq_hw *aq_hw, u32 intr_glb_ctl); +void reg_irq_glb_ctl_set(struct aq_hw *aq_hw, uint32_t intr_glb_ctl); /* set interrupt throttle register */ -void reg_irq_thr_set(struct aq_hw *aq_hw, u32 intr_thr, u32 throttle); +void reg_irq_thr_set(struct aq_hw *aq_hw, uint32_t intr_thr, uint32_t throttle); /* set rx dma descriptor base address lsw */ void reg_rx_dma_desc_base_addresslswset(struct aq_hw *aq_hw, - u32 rx_dma_desc_base_addrlsw, - u32 descriptor); + uint32_t rx_dma_desc_base_addrlsw, uint32_t descriptor); /* set rx dma descriptor base address msw */ void reg_rx_dma_desc_base_addressmswset(struct aq_hw *aq_hw, - u32 rx_dma_desc_base_addrmsw, - u32 descriptor); + uint32_t rx_dma_desc_base_addrmsw, uint32_t descriptor); /* get rx dma descriptor status register */ -u32 reg_rx_dma_desc_status_get(struct aq_hw *aq_hw, u32 descriptor); +uint32_t reg_rx_dma_desc_status_get(struct aq_hw *aq_hw, uint32_t descriptor); /* set rx dma descriptor tail pointer register */ void reg_rx_dma_desc_tail_ptr_set(struct aq_hw *aq_hw, - u32 rx_dma_desc_tail_ptr, - u32 descriptor); + uint32_t rx_dma_desc_tail_ptr, uint32_t descriptor); /* get rx dma descriptor tail pointer register */ -u32 reg_rx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, u32 descriptor); +uint32_t reg_rx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor); /* set rx filter multicast filter mask register */ void reg_rx_flr_mcst_flr_msk_set(struct aq_hw *aq_hw, - u32 rx_flr_mcst_flr_msk); + uint32_t rx_flr_mcst_flr_msk); /* set rx filter multicast filter register */ -void reg_rx_flr_mcst_flr_set(struct aq_hw *aq_hw, u32 rx_flr_mcst_flr, - u32 filter); +void reg_rx_flr_mcst_flr_set(struct aq_hw *aq_hw, uint32_t rx_flr_mcst_flr, + uint32_t filter); /* set rx filter rss control register 1 */ void reg_rx_flr_rss_control1set(struct aq_hw *aq_hw, - u32 rx_flr_rss_control1); + uint32_t rx_flr_rss_control1); /* Set RX Filter Control Register 2 */ -void reg_rx_flr_control2_set(struct aq_hw *aq_hw, u32 rx_flr_control2); +void reg_rx_flr_control2_set(struct aq_hw *aq_hw, uint32_t rx_flr_control2); /* Set RX Interrupt Moderation Control Register */ void reg_rx_intr_moder_ctrl_set(struct aq_hw *aq_hw, - u32 rx_intr_moderation_ctl, - u32 queue); + uint32_t rx_intr_moderation_ctl, uint32_t queue); /* set tx dma debug control */ -void reg_tx_dma_debug_ctl_set(struct aq_hw *aq_hw, u32 tx_dma_debug_ctl); +void reg_tx_dma_debug_ctl_set(struct aq_hw *aq_hw, uint32_t tx_dma_debug_ctl); /* set tx dma descriptor base address lsw */ void reg_tx_dma_desc_base_addresslswset(struct aq_hw *aq_hw, - u32 tx_dma_desc_base_addrlsw, - u32 descriptor); + uint32_t tx_dma_desc_base_addrlsw, uint32_t descriptor); /* set tx dma descriptor base address msw */ void reg_tx_dma_desc_base_addressmswset(struct aq_hw *aq_hw, - u32 tx_dma_desc_base_addrmsw, - u32 descriptor); + uint32_t tx_dma_desc_base_addrmsw, uint32_t descriptor); /* set tx dma descriptor tail pointer register */ void reg_tx_dma_desc_tail_ptr_set(struct aq_hw *aq_hw, - u32 tx_dma_desc_tail_ptr, - u32 descriptor); + uint32_t tx_dma_desc_tail_ptr, uint32_t descriptor); /* get tx dma descriptor tail pointer register */ -u32 reg_tx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, u32 descriptor); +uint32_t reg_tx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor); /* Set TX Interrupt Moderation Control Register */ void reg_tx_intr_moder_ctrl_set(struct aq_hw *aq_hw, - u32 tx_intr_moderation_ctl, - u32 queue); + uint32_t tx_intr_moderation_ctl, uint32_t queue); /* get global microprocessor scratch pad */ -u32 reg_glb_cpu_scratch_scp_get(struct aq_hw *hw, u32 glb_cpu_scratch_scp_idx); +uint32_t reg_glb_cpu_scratch_scp_get(struct aq_hw *hw, + uint32_t glb_cpu_scratch_scp_idx); /* set global microprocessor scratch pad */ void reg_glb_cpu_scratch_scp_set(struct aq_hw *aq_hw, - u32 glb_cpu_scratch_scp, u32 scratch_scp); + uint32_t glb_cpu_scratch_scp, uint32_t scratch_scp); /* get global microprocessor no reset scratch pad */ -u32 reg_glb_cpu_no_reset_scratchpad_get(struct aq_hw* hw, u32 index); +uint32_t reg_glb_cpu_no_reset_scratchpad_get(struct aq_hw* hw, uint32_t index); /* set global microprocessor no reset scratch pad */ -void reg_glb_cpu_no_reset_scratchpad_set(struct aq_hw* aq_hw, u32 value, - u32 index); +void reg_glb_cpu_no_reset_scratchpad_set(struct aq_hw* aq_hw, uint32_t value, + uint32_t index); /* rpb */ /* set dma system loopback */ -void rpb_dma_sys_lbk_set(struct aq_hw *aq_hw, u32 dma_sys_lbk); +void rpb_dma_sys_lbk_set(struct aq_hw *aq_hw, uint32_t dma_sys_lbk); /* set rx traffic class mode */ void rpb_rpf_rx_traf_class_mode_set(struct aq_hw *aq_hw, - u32 rx_traf_class_mode); + uint32_t rx_traf_class_mode); /* set rx buffer enable */ -void rpb_rx_buff_en_set(struct aq_hw *aq_hw, u32 rx_buff_en); +void rpb_rx_buff_en_set(struct aq_hw *aq_hw, uint32_t rx_buff_en); /* set rx buffer high threshold (per tc) */ void rpb_rx_buff_hi_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 rx_buff_hi_threshold_per_tc, - u32 buffer); + uint32_t rx_buff_hi_threshold_per_tc, uint32_t buffer); /* set rx buffer low threshold (per tc) */ void rpb_rx_buff_lo_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 rx_buff_lo_threshold_per_tc, - u32 buffer); + uint32_t rx_buff_lo_threshold_per_tc, uint32_t buffer); /* set rx flow control mode */ -void rpb_rx_flow_ctl_mode_set(struct aq_hw *aq_hw, u32 rx_flow_ctl_mode); +void rpb_rx_flow_ctl_mode_set(struct aq_hw *aq_hw, uint32_t rx_flow_ctl_mode); /* set rx packet buffer size (per tc) */ void rpb_rx_pkt_buff_size_per_tc_set(struct aq_hw *aq_hw, - u32 rx_pkt_buff_size_per_tc, - u32 buffer); + uint32_t rx_pkt_buff_size_per_tc, uint32_t buffer); /* set rx xoff enable (per tc) */ -void rpb_rx_xoff_en_per_tc_set(struct aq_hw *aq_hw, u32 rx_xoff_en_per_tc, - u32 buffer); +void rpb_rx_xoff_en_per_tc_set(struct aq_hw *aq_hw, uint32_t rx_xoff_en_per_tc, + uint32_t buffer); /* rpf */ /* set l2 broadcast count threshold */ void rpfl2broadcast_count_threshold_set(struct aq_hw *aq_hw, - u32 l2broadcast_count_threshold); + uint32_t l2broadcast_count_threshold); /* set l2 broadcast enable */ -void rpfl2broadcast_en_set(struct aq_hw *aq_hw, u32 l2broadcast_en); +void rpfl2broadcast_en_set(struct aq_hw *aq_hw, uint32_t l2broadcast_en); /* set l2 broadcast filter action */ void rpfl2broadcast_flr_act_set(struct aq_hw *aq_hw, - u32 l2broadcast_flr_act); + uint32_t l2broadcast_flr_act); /* set l2 multicast filter enable */ -void rpfl2multicast_flr_en_set(struct aq_hw *aq_hw, u32 l2multicast_flr_en, - u32 filter); +void rpfl2multicast_flr_en_set(struct aq_hw *aq_hw, uint32_t l2multicast_flr_en, + uint32_t filter); /* set l2 promiscuous mode enable */ void rpfl2promiscuous_mode_en_set(struct aq_hw *aq_hw, - u32 l2promiscuous_mode_en); + uint32_t l2promiscuous_mode_en); /* set l2 unicast filter action */ -void rpfl2unicast_flr_act_set(struct aq_hw *aq_hw, u32 l2unicast_flr_act, - u32 filter); +void rpfl2unicast_flr_act_set(struct aq_hw *aq_hw, uint32_t l2unicast_flr_act, + uint32_t filter); /* set l2 unicast filter enable */ -void rpfl2_uc_flr_en_set(struct aq_hw *aq_hw, u32 l2unicast_flr_en, - u32 filter); +void rpfl2_uc_flr_en_set(struct aq_hw *aq_hw, uint32_t l2unicast_flr_en, + uint32_t filter); /* set l2 unicast destination address lsw */ void rpfl2unicast_dest_addresslsw_set(struct aq_hw *aq_hw, - u32 l2unicast_dest_addresslsw, - u32 filter); + uint32_t l2unicast_dest_addresslsw, uint32_t filter); /* set l2 unicast destination address msw */ void rpfl2unicast_dest_addressmsw_set(struct aq_hw *aq_hw, - u32 l2unicast_dest_addressmsw, - u32 filter); + uint32_t l2unicast_dest_addressmsw, uint32_t filter); /* Set L2 Accept all Multicast packets */ void rpfl2_accept_all_mc_packets_set(struct aq_hw *aq_hw, - u32 l2_accept_all_mc_packets); + uint32_t l2_accept_all_mc_packets); /* set user-priority tc mapping */ void rpf_rpb_user_priority_tc_map_set(struct aq_hw *aq_hw, - u32 user_priority_tc_map, u32 tc); + uint32_t user_priority_tc_map, uint32_t tc); /* set rss key address */ -void rpf_rss_key_addr_set(struct aq_hw *aq_hw, u32 rss_key_addr); +void rpf_rss_key_addr_set(struct aq_hw *aq_hw, uint32_t rss_key_addr); /* set rss key write data */ -void rpf_rss_key_wr_data_set(struct aq_hw *aq_hw, u32 rss_key_wr_data); +void rpf_rss_key_wr_data_set(struct aq_hw *aq_hw, uint32_t rss_key_wr_data); /* get rss key read data */ -u32 rpf_rss_key_rd_data_get(struct aq_hw *aq_hw); +uint32_t rpf_rss_key_rd_data_get(struct aq_hw *aq_hw); /* get rss key write enable */ -u32 rpf_rss_key_wr_en_get(struct aq_hw *aq_hw); +uint32_t rpf_rss_key_wr_en_get(struct aq_hw *aq_hw); /* set rss key write enable */ -void rpf_rss_key_wr_en_set(struct aq_hw *aq_hw, u32 rss_key_wr_en); +void rpf_rss_key_wr_en_set(struct aq_hw *aq_hw, uint32_t rss_key_wr_en); /* set rss redirection table address */ void rpf_rss_redir_tbl_addr_set(struct aq_hw *aq_hw, - u32 rss_redir_tbl_addr); + uint32_t rss_redir_tbl_addr); /* set rss redirection table write data */ void rpf_rss_redir_tbl_wr_data_set(struct aq_hw *aq_hw, - u32 rss_redir_tbl_wr_data); + uint32_t rss_redir_tbl_wr_data); /* get rss redirection write enable */ -u32 rpf_rss_redir_wr_en_get(struct aq_hw *aq_hw); +uint32_t rpf_rss_redir_wr_en_get(struct aq_hw *aq_hw); /* set rss redirection write enable */ -void rpf_rss_redir_wr_en_set(struct aq_hw *aq_hw, u32 rss_redir_wr_en); +void rpf_rss_redir_wr_en_set(struct aq_hw *aq_hw, uint32_t rss_redir_wr_en); /* set tpo to rpf system loopback */ void rpf_tpo_to_rpf_sys_lbk_set(struct aq_hw *aq_hw, - u32 tpo_to_rpf_sys_lbk); + uint32_t tpo_to_rpf_sys_lbk); /* set vlan inner ethertype */ -void hw_atl_rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, u32 vlan_inner_etht); +void hw_atl_rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, + uint32_t vlan_inner_etht); /* set vlan outer ethertype */ -void hw_atl_rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, u32 vlan_outer_etht); +void hw_atl_rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, + uint32_t vlan_outer_etht); /* set vlan promiscuous mode enable */ void hw_atl_rpf_vlan_prom_mode_en_set(struct aq_hw *aq_hw, - u32 vlan_prom_mode_en); + uint32_t vlan_prom_mode_en); /* Set VLAN untagged action */ void hw_atl_rpf_vlan_untagged_act_set(struct aq_hw *aq_hw, - u32 vlan_untagged_act); + uint32_t vlan_untagged_act); /* Set VLAN accept untagged packets */ void hw_atl_rpf_vlan_accept_untagged_packets_set(struct aq_hw *aq_hw, - u32 vlan_acc_untagged_packets); + uint32_t vlan_acc_untagged_packets); /* Set VLAN filter enable */ -void hw_atl_rpf_vlan_flr_en_set(struct aq_hw *aq_hw, u32 vlan_flr_en, - u32 filter); +void hw_atl_rpf_vlan_flr_en_set(struct aq_hw *aq_hw, uint32_t vlan_flr_en, + uint32_t filter); /* Set VLAN Filter Action */ -void hw_atl_rpf_vlan_flr_act_set(struct aq_hw *aq_hw, u32 vlan_filter_act, - u32 filter); +void hw_atl_rpf_vlan_flr_act_set(struct aq_hw *aq_hw, uint32_t vlan_filter_act, + uint32_t filter); /* Set VLAN ID Filter */ -void hw_atl_rpf_vlan_id_flr_set(struct aq_hw *aq_hw, u32 vlan_id_flr, - u32 filter); +void hw_atl_rpf_vlan_id_flr_set(struct aq_hw *aq_hw, uint32_t vlan_id_flr, + uint32_t filter); /* Set VLAN RX queue assignment enable */ -void hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw *aq_hw, u32 vlan_rxq_en, - u32 filter); +void hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw *aq_hw, uint32_t vlan_rxq_en, + uint32_t filter); /* Set VLAN RX queue */ -void hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw *aq_hw, u32 vlan_rxq, - u32 filter); +void hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw *aq_hw, uint32_t vlan_rxq, + uint32_t filter); /* set ethertype filter enable */ -void hw_atl_rpf_etht_flr_en_set(struct aq_hw *aq_hw, u32 etht_flr_en, - u32 filter); +void hw_atl_rpf_etht_flr_en_set(struct aq_hw *aq_hw, uint32_t etht_flr_en, + uint32_t filter); /* set ethertype user-priority enable */ void hw_atl_rpf_etht_user_priority_en_set(struct aq_hw *aq_hw, - u32 etht_user_priority_en, - u32 filter); + uint32_t etht_user_priority_en, uint32_t filter); /* set ethertype rx queue enable */ void hw_atl_rpf_etht_rx_queue_en_set(struct aq_hw *aq_hw, - u32 etht_rx_queue_en, - u32 filter); + uint32_t etht_rx_queue_en, uint32_t filter); /* set ethertype rx queue */ -void hw_atl_rpf_etht_rx_queue_set(struct aq_hw *aq_hw, u32 etht_rx_queue, - u32 filter); +void hw_atl_rpf_etht_rx_queue_set(struct aq_hw *aq_hw, uint32_t etht_rx_queue, + uint32_t filter); /* set ethertype user-priority */ void hw_atl_rpf_etht_user_priority_set(struct aq_hw *aq_hw, - u32 etht_user_priority, - u32 filter); + uint32_t etht_user_priority, uint32_t filter); /* set ethertype management queue */ -void hw_atl_rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, u32 etht_mgt_queue, - u32 filter); +void hw_atl_rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, uint32_t etht_mgt_queue, + uint32_t filter); /* set ethertype filter action */ -void hw_atl_rpf_etht_flr_act_set(struct aq_hw *aq_hw, u32 etht_flr_act, - u32 filter); +void hw_atl_rpf_etht_flr_act_set(struct aq_hw *aq_hw, uint32_t etht_flr_act, + uint32_t filter); /* set ethertype filter */ -void hw_atl_rpf_etht_flr_set(struct aq_hw *aq_hw, u32 etht_flr, u32 filter); +void hw_atl_rpf_etht_flr_set(struct aq_hw *aq_hw, uint32_t etht_flr, + uint32_t filter); /* set L3/L4 filter enable */ -void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 IPv6 enable */ -void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 source address enable */ -void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 destination address enable */ -void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 source port enable */ -void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 destination port enable */ -void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 protocol enable */ -void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 ARP filter enable */ -void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 rx queue enable */ -void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 management queue */ -void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 filter action */ -void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 rx queue */ -void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 protocol value */ -void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 source port */ -void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter); /* set L4 destination port */ -void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter); /* set vlan inner ethertype */ -void rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, u32 vlan_inner_etht); +void rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, uint32_t vlan_inner_etht); /* set vlan outer ethertype */ -void rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, u32 vlan_outer_etht); +void rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, uint32_t vlan_outer_etht); /* set vlan promiscuous mode enable */ -void rpf_vlan_prom_mode_en_set(struct aq_hw *aq_hw, u32 vlan_prom_mode_en); +void rpf_vlan_prom_mode_en_set(struct aq_hw *aq_hw, uint32_t vlan_prom_mode_en); /* Set VLAN untagged action */ -void rpf_vlan_untagged_act_set(struct aq_hw *aq_hw, u32 vlan_untagged_act); +void rpf_vlan_untagged_act_set(struct aq_hw *aq_hw, uint32_t vlan_untagged_act); /* Set VLAN accept untagged packets */ void rpf_vlan_accept_untagged_packets_set(struct aq_hw *aq_hw, - u32 vlan_accept_untagged_packets); + uint32_t vlan_accept_untagged_packets); /* Set VLAN filter enable */ -void rpf_vlan_flr_en_set(struct aq_hw *aq_hw, u32 vlan_flr_en, u32 filter); +void rpf_vlan_flr_en_set(struct aq_hw *aq_hw, uint32_t vlan_flr_en, + uint32_t filter); /* Set VLAN Filter Action */ -void rpf_vlan_flr_act_set(struct aq_hw *aq_hw, u32 vlan_filter_act, - u32 filter); +void rpf_vlan_flr_act_set(struct aq_hw *aq_hw, uint32_t vlan_filter_act, + uint32_t filter); /* Set VLAN ID Filter */ -void rpf_vlan_id_flr_set(struct aq_hw *aq_hw, u32 vlan_id_flr, u32 filter); +void rpf_vlan_id_flr_set(struct aq_hw *aq_hw, uint32_t vlan_id_flr, + uint32_t filter); /* set ethertype filter enable */ -void rpf_etht_flr_en_set(struct aq_hw *aq_hw, u32 etht_flr_en, u32 filter); +void rpf_etht_flr_en_set(struct aq_hw *aq_hw, uint32_t etht_flr_en, + uint32_t filter); /* set ethertype user-priority enable */ void rpf_etht_user_priority_en_set(struct aq_hw *aq_hw, - u32 etht_user_priority_en, u32 filter); + uint32_t etht_user_priority_en, uint32_t filter); /* set ethertype rx queue enable */ -void rpf_etht_rx_queue_en_set(struct aq_hw *aq_hw, u32 etht_rx_queue_en, - u32 filter); +void rpf_etht_rx_queue_en_set(struct aq_hw *aq_hw, uint32_t etht_rx_queue_en, + uint32_t filter); /* set ethertype rx queue */ -void rpf_etht_rx_queue_set(struct aq_hw *aq_hw, u32 etht_rx_queue, - u32 filter); +void rpf_etht_rx_queue_set(struct aq_hw *aq_hw, uint32_t etht_rx_queue, + uint32_t filter); /* set ethertype user-priority */ -void rpf_etht_user_priority_set(struct aq_hw *aq_hw, u32 etht_user_priority, - u32 filter); +void rpf_etht_user_priority_set(struct aq_hw *aq_hw, + uint32_t etht_user_priority, uint32_t filter); /* set ethertype management queue */ -void rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, u32 etht_mgt_queue, - u32 filter); +void rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, uint32_t etht_mgt_queue, + uint32_t filter); /* set ethertype filter action */ -void rpf_etht_flr_act_set(struct aq_hw *aq_hw, u32 etht_flr_act, - u32 filter); +void rpf_etht_flr_act_set(struct aq_hw *aq_hw, uint32_t etht_flr_act, + uint32_t filter); /* set ethertype filter */ -void rpf_etht_flr_set(struct aq_hw *aq_hw, u32 etht_flr, u32 filter); +void rpf_etht_flr_set(struct aq_hw *aq_hw, uint32_t etht_flr, uint32_t filter); /* set L3/L4 filter enable */ -void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 IPv6 enable */ -void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 source address enable */ -void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 destination address enable */ -void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 source port enable */ -void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 destination port enable */ -void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 protocol enable */ -void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 ARP filter enable */ -void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 rx queue enable */ -void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 management queue */ -void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 filter action */ -void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 rx queue */ -void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 protocol value */ -void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 source port */ -void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter); /* set L4 destination port */ -void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter); /* rpo */ /* set ipv4 header checksum offload enable */ void rpo_ipv4header_crc_offload_en_set(struct aq_hw *aq_hw, - u32 ipv4header_crc_offload_en); + uint32_t ipv4header_crc_offload_en); /* set rx descriptor vlan stripping */ void rpo_rx_desc_vlan_stripping_set(struct aq_hw *aq_hw, - u32 rx_desc_vlan_stripping, - u32 descriptor); + uint32_t rx_desc_vlan_stripping, uint32_t descriptor); /* set tcp/udp checksum offload enable */ void rpo_tcp_udp_crc_offload_en_set(struct aq_hw *aq_hw, - u32 tcp_udp_crc_offload_en); + uint32_t tcp_udp_crc_offload_en); /* Set LRO Patch Optimization Enable. */ void rpo_lro_patch_optimization_en_set(struct aq_hw *aq_hw, - u32 lro_patch_optimization_en); + uint32_t lro_patch_optimization_en); /* Set Large Receive Offload Enable */ -void rpo_lro_en_set(struct aq_hw *aq_hw, u32 lro_en); +void rpo_lro_en_set(struct aq_hw *aq_hw, uint32_t lro_en); /* Set LRO Q Sessions Limit */ -void rpo_lro_qsessions_lim_set(struct aq_hw *aq_hw, u32 lro_qsessions_lim); +void rpo_lro_qsessions_lim_set(struct aq_hw *aq_hw, uint32_t lro_qsessions_lim); /* Set LRO Total Descriptor Limit */ -void rpo_lro_total_desc_lim_set(struct aq_hw *aq_hw, u32 lro_total_desc_lim); +void rpo_lro_total_desc_lim_set(struct aq_hw *aq_hw, + uint32_t lro_total_desc_lim); /* Set LRO Min Payload of First Packet */ void rpo_lro_min_pay_of_first_pkt_set(struct aq_hw *aq_hw, - u32 lro_min_pld_of_first_pkt); + uint32_t lro_min_pld_of_first_pkt); /* Set LRO Packet Limit */ -void rpo_lro_pkt_lim_set(struct aq_hw *aq_hw, u32 lro_packet_lim); +void rpo_lro_pkt_lim_set(struct aq_hw *aq_hw, uint32_t lro_packet_lim); /* Set LRO Max Number of Descriptors */ void rpo_lro_max_num_of_descriptors_set(struct aq_hw *aq_hw, - u32 lro_max_desc_num, u32 lro); + uint32_t lro_max_desc_num, uint32_t lro); /* Set LRO Time Base Divider */ void rpo_lro_time_base_divider_set(struct aq_hw *aq_hw, - u32 lro_time_base_divider); - + uint32_t lro_time_base_divider); /*Set LRO Inactive Interval */ void rpo_lro_inactive_interval_set(struct aq_hw *aq_hw, - u32 lro_inactive_interval); + uint32_t lro_inactive_interval); /*Set LRO Max Coalescing Interval */ void rpo_lro_max_coalescing_interval_set(struct aq_hw *aq_hw, - u32 lro_max_coalescing_interval); + uint32_t lro_max_coalescing_interval); /* rx */ /* set rx register reset disable */ -void rx_rx_reg_res_dis_set(struct aq_hw *aq_hw, u32 rx_reg_res_dis); +void rx_rx_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t rx_reg_res_dis); /* tdm */ /* set cpu id */ -void tdm_cpu_id_set(struct aq_hw *aq_hw, u32 cpuid, u32 dca); +void tdm_cpu_id_set(struct aq_hw *aq_hw, uint32_t cpuid, uint32_t dca); /* set large send offload enable */ void tdm_large_send_offload_en_set(struct aq_hw *aq_hw, - u32 large_send_offload_en); + uint32_t large_send_offload_en); /* set tx descriptor enable */ -void tdm_tx_desc_en_set(struct aq_hw *aq_hw, u32 tx_desc_en, u32 descriptor); +void tdm_tx_desc_en_set(struct aq_hw *aq_hw, uint32_t tx_desc_en, + uint32_t descriptor); /* set tx dca enable */ -void tdm_tx_dca_en_set(struct aq_hw *aq_hw, u32 tx_dca_en); +void tdm_tx_dca_en_set(struct aq_hw *aq_hw, uint32_t tx_dca_en); /* set tx dca mode */ -void tdm_tx_dca_mode_set(struct aq_hw *aq_hw, u32 tx_dca_mode); +void tdm_tx_dca_mode_set(struct aq_hw *aq_hw, uint32_t tx_dca_mode); /* set tx descriptor dca enable */ -void tdm_tx_desc_dca_en_set(struct aq_hw *aq_hw, u32 tx_desc_dca_en, u32 dca); +void tdm_tx_desc_dca_en_set(struct aq_hw *aq_hw, uint32_t tx_desc_dca_en, + uint32_t dca); /* get tx descriptor head pointer */ -u32 tdm_tx_desc_head_ptr_get(struct aq_hw *aq_hw, u32 descriptor); +uint32_t tdm_tx_desc_head_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor); /* set tx descriptor length */ -void tdm_tx_desc_len_set(struct aq_hw *aq_hw, u32 tx_desc_len, - u32 descriptor); +void tdm_tx_desc_len_set(struct aq_hw *aq_hw, uint32_t tx_desc_len, + uint32_t descriptor); /* set tx descriptor write-back interrupt enable */ void tdm_tx_desc_wr_wb_irq_en_set(struct aq_hw *aq_hw, - u32 tx_desc_wr_wb_irq_en); + uint32_t tx_desc_wr_wb_irq_en); /* set tx descriptor write-back threshold */ void tdm_tx_desc_wr_wb_threshold_set(struct aq_hw *aq_hw, - u32 tx_desc_wr_wb_threshold, - u32 descriptor); + uint32_t tx_desc_wr_wb_threshold, uint32_t descriptor); /* Set TDM Interrupt Moderation Enable */ void tdm_tdm_intr_moder_en_set(struct aq_hw *aq_hw, - u32 tdm_irq_moderation_en); + uint32_t tdm_irq_moderation_en); /* thm */ /* set lso tcp flag of first packet */ void thm_lso_tcp_flag_of_first_pkt_set(struct aq_hw *aq_hw, - u32 lso_tcp_flag_of_first_pkt); + uint32_t lso_tcp_flag_of_first_pkt); /* set lso tcp flag of last packet */ void thm_lso_tcp_flag_of_last_pkt_set(struct aq_hw *aq_hw, - u32 lso_tcp_flag_of_last_pkt); + uint32_t lso_tcp_flag_of_last_pkt); /* set lso tcp flag of middle packet */ void thm_lso_tcp_flag_of_middle_pkt_set(struct aq_hw *aq_hw, - u32 lso_tcp_flag_of_middle_pkt); + uint32_t lso_tcp_flag_of_middle_pkt); /* tpb */ /* set tx buffer enable */ -void tpb_tx_buff_en_set(struct aq_hw *aq_hw, u32 tx_buff_en); +void tpb_tx_buff_en_set(struct aq_hw *aq_hw, uint32_t tx_buff_en); /* set tx tc mode */ -void tpb_tx_tc_mode_set(struct aq_hw *aq_hw, u32 tc_mode); +void tpb_tx_tc_mode_set(struct aq_hw *aq_hw, uint32_t tc_mode); /* set tx buffer high threshold (per tc) */ void tpb_tx_buff_hi_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 tx_buff_hi_threshold_per_tc, - u32 buffer); + uint32_t tx_buff_hi_threshold_per_tc, uint32_t buffer); /* set tx buffer low threshold (per tc) */ void tpb_tx_buff_lo_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 tx_buff_lo_threshold_per_tc, - u32 buffer); + uint32_t tx_buff_lo_threshold_per_tc, uint32_t buffer); /* set tx dma system loopback enable */ -void tpb_tx_dma_sys_lbk_en_set(struct aq_hw *aq_hw, u32 tx_dma_sys_lbk_en); +void tpb_tx_dma_sys_lbk_en_set(struct aq_hw *aq_hw, uint32_t tx_dma_sys_lbk_en); /* set tx packet buffer size (per tc) */ void tpb_tx_pkt_buff_size_per_tc_set(struct aq_hw *aq_hw, - u32 tx_pkt_buff_size_per_tc, u32 buffer); + uint32_t tx_pkt_buff_size_per_tc, uint32_t buffer); /* toggle rdm rx dma descriptor cache init */ void rdm_rx_dma_desc_cache_init_tgl(struct aq_hw *aq_hw); /* set tx path pad insert enable */ -void tpb_tx_path_scp_ins_en_set(struct aq_hw *aq_hw, u32 tx_path_scp_ins_en); +void tpb_tx_path_scp_ins_en_set(struct aq_hw *aq_hw, + uint32_t tx_path_scp_ins_en); /* tpo */ /* set ipv4 header checksum offload enable */ void tpo_ipv4header_crc_offload_en_set(struct aq_hw *aq_hw, - u32 ipv4header_crc_offload_en); + uint32_t ipv4header_crc_offload_en); /* set tcp/udp checksum offload enable */ void tpo_tcp_udp_crc_offload_en_set(struct aq_hw *aq_hw, - u32 tcp_udp_crc_offload_en); + uint32_t tcp_udp_crc_offload_en); /* set tx pkt system loopback enable */ -void tpo_tx_pkt_sys_lbk_en_set(struct aq_hw *aq_hw, u32 tx_pkt_sys_lbk_en); +void tpo_tx_pkt_sys_lbk_en_set(struct aq_hw *aq_hw, uint32_t tx_pkt_sys_lbk_en); /* tps */ /* set tx packet scheduler data arbitration mode */ void tps_tx_pkt_shed_data_arb_mode_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_data_arb_mode); + uint32_t tx_pkt_shed_data_arb_mode); /* set tx packet scheduler descriptor rate current time reset */ void tps_tx_pkt_shed_desc_rate_curr_time_res_set(struct aq_hw *aq_hw, - u32 curr_time_res); + uint32_t curr_time_res); /* set tx packet scheduler descriptor rate limit */ void tps_tx_pkt_shed_desc_rate_lim_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_rate_lim); + uint32_t tx_pkt_shed_desc_rate_lim); /* set tx packet scheduler descriptor tc arbitration mode */ void tps_tx_pkt_shed_desc_tc_arb_mode_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_tc_arb_mode); + uint32_t tx_pkt_shed_desc_tc_arb_mode); /* set tx packet scheduler descriptor tc max credit */ void tps_tx_pkt_shed_desc_tc_max_credit_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_tc_max_credit, - u32 tc); + uint32_t tx_pkt_shed_desc_tc_max_credit, uint32_t tc); /* set tx packet scheduler descriptor tc weight */ void tps_tx_pkt_shed_desc_tc_weight_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_tc_weight, - u32 tc); + uint32_t tx_pkt_shed_desc_tc_weight, uint32_t tc); /* set tx packet scheduler descriptor vm arbitration mode */ void tps_tx_pkt_shed_desc_vm_arb_mode_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_vm_arb_mode); + uint32_t tx_pkt_shed_desc_vm_arb_mode); /* set tx packet scheduler tc data max credit */ void tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_tc_data_max_credit, - u32 tc); + uint32_t tx_pkt_shed_tc_data_max_credit, uint32_t tc); /* set tx packet scheduler tc data weight */ void tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_tc_data_weight, - u32 tc); + uint32_t tx_pkt_shed_tc_data_weight, uint32_t tc); /* tx */ /* set tx register reset disable */ -void tx_tx_reg_res_dis_set(struct aq_hw *aq_hw, u32 tx_reg_res_dis); +void tx_tx_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t tx_reg_res_dis); /* msm */ /* get register access status */ -u32 msm_reg_access_status_get(struct aq_hw *aq_hw); +uint32_t msm_reg_access_status_get(struct aq_hw *aq_hw); /* set register address for indirect address */ void msm_reg_addr_for_indirect_addr_set(struct aq_hw *aq_hw, - u32 reg_addr_for_indirect_addr); + uint32_t reg_addr_for_indirect_addr); /* set register read strobe */ -void msm_reg_rd_strobe_set(struct aq_hw *aq_hw, u32 reg_rd_strobe); +void msm_reg_rd_strobe_set(struct aq_hw *aq_hw, uint32_t reg_rd_strobe); /* get register read data */ -u32 msm_reg_rd_data_get(struct aq_hw *aq_hw); +uint32_t msm_reg_rd_data_get(struct aq_hw *aq_hw); /* set register write data */ -void msm_reg_wr_data_set(struct aq_hw *aq_hw, u32 reg_wr_data); +void msm_reg_wr_data_set(struct aq_hw *aq_hw, uint32_t reg_wr_data); /* set register write strobe */ -void msm_reg_wr_strobe_set(struct aq_hw *aq_hw, u32 reg_wr_strobe); +void msm_reg_wr_strobe_set(struct aq_hw *aq_hw, uint32_t reg_wr_strobe); /* pci */ /* set pci register reset disable */ -void pci_pci_reg_res_dis_set(struct aq_hw *aq_hw, u32 pci_reg_res_dis); +void pci_pci_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t pci_reg_res_dis); /* -* \brief Set MIF Power Gating Enable Control -*/ -void reg_mif_power_gating_enable_control_set(struct aq_hw* hw, u32 value); + * \brief Set MIF Power Gating Enable Control + */ +void reg_mif_power_gating_enable_control_set(struct aq_hw* hw, uint32_t value); /* -* \brief Get MIF Power Gating Enable Control -* \return MifPowerGatingEnableControl -*/ -u32 reg_mif_power_gating_enable_control_get(struct aq_hw* hw); + * \brief Get MIF Power Gating Enable Control + * \return MifPowerGatingEnableControl + */ +uint32_t reg_mif_power_gating_enable_control_get(struct aq_hw* hw); /* get mif up mailbox busy */ -u32 mif_mcp_up_mailbox_busy_get(struct aq_hw *aq_hw); +uint32_t mif_mcp_up_mailbox_busy_get(struct aq_hw *aq_hw); /* set mif up mailbox execute operation */ -void mif_mcp_up_mailbox_execute_operation_set(struct aq_hw* hw, u32 value); +void mif_mcp_up_mailbox_execute_operation_set(struct aq_hw* hw, uint32_t value); /* get mif uP mailbox address */ -u32 mif_mcp_up_mailbox_addr_get(struct aq_hw *aq_hw); +uint32_t mif_mcp_up_mailbox_addr_get(struct aq_hw *aq_hw); /* set mif uP mailbox address */ -void mif_mcp_up_mailbox_addr_set(struct aq_hw *hw, u32 value); +void mif_mcp_up_mailbox_addr_set(struct aq_hw *hw, uint32_t value); /* get mif uP mailbox data */ -u32 mif_mcp_up_mailbox_data_get(struct aq_hw *aq_hw); +uint32_t mif_mcp_up_mailbox_data_get(struct aq_hw *aq_hw); /* clear ipv4 filter destination address */ -void hw_atl_rpfl3l4_ipv4_dest_addr_clear(struct aq_hw *aq_hw, u8 location); +void hw_atl_rpfl3l4_ipv4_dest_addr_clear(struct aq_hw *aq_hw, uint8_t location); /* clear ipv4 filter source address */ -void hw_atl_rpfl3l4_ipv4_src_addr_clear(struct aq_hw *aq_hw, u8 location); +void hw_atl_rpfl3l4_ipv4_src_addr_clear(struct aq_hw *aq_hw, uint8_t location); /* clear command for filter l3-l4 */ -void hw_atl_rpfl3l4_cmd_clear(struct aq_hw *aq_hw, u8 location); +void hw_atl_rpfl3l4_cmd_clear(struct aq_hw *aq_hw, uint8_t location); /* clear ipv6 filter destination address */ -void hw_atl_rpfl3l4_ipv6_dest_addr_clear(struct aq_hw *aq_hw, u8 location); +void hw_atl_rpfl3l4_ipv6_dest_addr_clear(struct aq_hw *aq_hw, uint8_t location); /* clear ipv6 filter source address */ -void hw_atl_rpfl3l4_ipv6_src_addr_clear(struct aq_hw *aq_hw, u8 location); +void hw_atl_rpfl3l4_ipv6_src_addr_clear(struct aq_hw *aq_hw, uint8_t location); /* set ipv4 filter destination address */ -void hw_atl_rpfl3l4_ipv4_dest_addr_set(struct aq_hw *aq_hw, u8 location, - u32 ipv4_dest); +void hw_atl_rpfl3l4_ipv4_dest_addr_set(struct aq_hw *aq_hw, uint8_t location, + uint32_t ipv4_dest); /* set ipv4 filter source address */ -void hw_atl_rpfl3l4_ipv4_src_addr_set(struct aq_hw *aq_hw, u8 location, - u32 ipv4_src); +void hw_atl_rpfl3l4_ipv4_src_addr_set(struct aq_hw *aq_hw, uint8_t location, + uint32_t ipv4_src); /* set command for filter l3-l4 */ -void hw_atl_rpfl3l4_cmd_set(struct aq_hw *aq_hw, u8 location, u32 cmd); +void hw_atl_rpfl3l4_cmd_set(struct aq_hw *aq_hw, uint8_t location, + uint32_t cmd); /* set ipv6 filter source address */ -void hw_atl_rpfl3l4_ipv6_src_addr_set(struct aq_hw *aq_hw, u8 location, - u32 *ipv6_src); +void hw_atl_rpfl3l4_ipv6_src_addr_set(struct aq_hw *aq_hw, uint8_t location, + uint32_t *ipv6_src); /* set ipv6 filter destination address */ -void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw *aq_hw, u8 location, - u32 *ipv6_dest); +void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw *aq_hw, uint8_t location, + uint32_t *ipv6_dest); /* set vlan inner ethertype */ -void hw_atl_rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, u32 vlan_inner_etht); +void hw_atl_rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, + uint32_t vlan_inner_etht); /* set vlan outer ethertype */ -void hw_atl_rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, u32 vlan_outer_etht); +void hw_atl_rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, + uint32_t vlan_outer_etht); /* set vlan promiscuous mode enable */ void hw_atl_rpf_vlan_prom_mode_en_set(struct aq_hw *aq_hw, - u32 vlan_prom_mode_en); + uint32_t vlan_prom_mode_en); /* Set VLAN untagged action */ void hw_atl_rpf_vlan_untagged_act_set(struct aq_hw *aq_hw, - u32 vlan_untagged_act); + uint32_t vlan_untagged_act); /* Set VLAN accept untagged packets */ void hw_atl_rpf_vlan_accept_untagged_packets_set(struct aq_hw *aq_hw, - u32 vlan_acc_untagged_packets); + uint32_t vlan_acc_untagged_packets); /* Set VLAN filter enable */ -void hw_atl_rpf_vlan_flr_en_set(struct aq_hw *aq_hw, u32 vlan_flr_en, - u32 filter); +void hw_atl_rpf_vlan_flr_en_set(struct aq_hw *aq_hw, uint32_t vlan_flr_en, + uint32_t filter); /* Set VLAN Filter Action */ -void hw_atl_rpf_vlan_flr_act_set(struct aq_hw *aq_hw, u32 vlan_filter_act, - u32 filter); +void hw_atl_rpf_vlan_flr_act_set(struct aq_hw *aq_hw, uint32_t vlan_filter_act, + uint32_t filter); /* Set VLAN ID Filter */ -void hw_atl_rpf_vlan_id_flr_set(struct aq_hw *aq_hw, u32 vlan_id_flr, - u32 filter); +void hw_atl_rpf_vlan_id_flr_set(struct aq_hw *aq_hw, uint32_t vlan_id_flr, + uint32_t filter); /* Set VLAN RX queue assignment enable */ -void hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw *aq_hw, u32 vlan_rxq_en, - u32 filter); +void hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw *aq_hw, uint32_t vlan_rxq_en, + uint32_t filter); /* Set VLAN RX queue */ -void hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw *aq_hw, u32 vlan_rxq, - u32 filter); +void hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw *aq_hw, uint32_t vlan_rxq, + uint32_t filter); /* set ethertype filter enable */ -void hw_atl_rpf_etht_flr_en_set(struct aq_hw *aq_hw, u32 etht_flr_en, - u32 filter); +void hw_atl_rpf_etht_flr_en_set(struct aq_hw *aq_hw, uint32_t etht_flr_en, + uint32_t filter); /* set ethertype user-priority enable */ void hw_atl_rpf_etht_user_priority_en_set(struct aq_hw *aq_hw, - u32 etht_user_priority_en, - u32 filter); + uint32_t etht_user_priority_en, uint32_t filter); /* set ethertype rx queue enable */ void hw_atl_rpf_etht_rx_queue_en_set(struct aq_hw *aq_hw, - u32 etht_rx_queue_en, - u32 filter); + uint32_t etht_rx_queue_en, uint32_t filter); /* set ethertype rx queue */ -void hw_atl_rpf_etht_rx_queue_set(struct aq_hw *aq_hw, u32 etht_rx_queue, - u32 filter); +void hw_atl_rpf_etht_rx_queue_set(struct aq_hw *aq_hw, uint32_t etht_rx_queue, + uint32_t filter); /* set ethertype user-priority */ void hw_atl_rpf_etht_user_priority_set(struct aq_hw *aq_hw, - u32 etht_user_priority, - u32 filter); + uint32_t etht_user_priority, uint32_t filter); /* set ethertype management queue */ -void hw_atl_rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, u32 etht_mgt_queue, - u32 filter); +void hw_atl_rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, uint32_t etht_mgt_queue, + uint32_t filter); /* set ethertype filter action */ -void hw_atl_rpf_etht_flr_act_set(struct aq_hw *aq_hw, u32 etht_flr_act, - u32 filter); +void hw_atl_rpf_etht_flr_act_set(struct aq_hw *aq_hw, uint32_t etht_flr_act, + uint32_t filter); /* set ethertype filter */ -void hw_atl_rpf_etht_flr_set(struct aq_hw *aq_hw, u32 etht_flr, u32 filter); +void hw_atl_rpf_etht_flr_set(struct aq_hw *aq_hw, uint32_t etht_flr, + uint32_t filter); /* set L3/L4 filter enable */ -void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 IPv6 enable */ -void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 source address enable */ -void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 destination address enable */ -void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 source port enable */ -void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 destination port enable */ -void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 protocol enable */ -void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 ARP filter enable */ -void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 rx queue enable */ -void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 management queue */ -void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 filter action */ -void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 rx queue */ -void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 protocol value */ -void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 source port */ -void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter); /* set L4 destination port */ -void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter); #endif /* HW_ATL_LLH_H */ diff --git a/sys/dev/aq/aq_hw_llh_internal.h b/sys/dev/aq/aq_hw_llh_internal.h index 4a5b234a6e91..bad3c1640cf8 100644 --- a/sys/dev/aq/aq_hw_llh_internal.h +++ b/sys/dev/aq/aq_hw_llh_internal.h @@ -3248,7 +3248,7 @@ /* tx dma descriptor base address msw definitions */ #define tx_dma_desc_base_addrmsw_adr(descriptor) \ - (0x00007c04u + (descriptor) * 0x40) + (0x00007c04u + (descriptor) * 0x40) /* tx interrupt moderation control register definitions * Preprocessor definitions for TX Interrupt Moderation Control Register diff --git a/sys/dev/aq/aq_irq.c b/sys/dev/aq/aq_irq.c index 4ffccc00ea98..6338a7777dee 100644 --- a/sys/dev/aq/aq_irq.c +++ b/sys/dev/aq/aq_irq.c @@ -37,14 +37,14 @@ __FBSDID("$FreeBSD$"); #include <sys/param.h> +#include <sys/bitstring.h> #include <sys/kernel.h> #include <sys/socket.h> -#include <sys/bitstring.h> +#include <net/ethernet.h> #include <net/if.h> +#include <net/if_dl.h> #include <net/if_media.h> #include <net/if_var.h> -#include <net/if_dl.h> -#include <net/ethernet.h> #include <net/iflib.h> #include "aq_common.h" @@ -54,60 +54,60 @@ __FBSDID("$FreeBSD$"); #include "aq_hw.h" #include "aq_hw_llh.h" -int aq_update_hw_stats(aq_dev_t *aq_dev) +int +aq_update_hw_stats(aq_dev_t *aq_dev) { - struct aq_hw *hw = &aq_dev->hw; - struct aq_hw_fw_mbox mbox; + struct aq_hw *hw = &aq_dev->hw; + struct aq_hw_fw_mbox mbox; - aq_hw_mpi_read_stats(hw, &mbox); + aq_hw_mpi_read_stats(hw, &mbox); #define AQ_SDELTA(_N_) (aq_dev->curr_stats._N_ += \ - mbox.stats._N_ - aq_dev->last_stats._N_) - if (aq_dev->linkup) { - AQ_SDELTA(uprc); - AQ_SDELTA(mprc); - AQ_SDELTA(bprc); - AQ_SDELTA(cprc); - AQ_SDELTA(erpt); - - AQ_SDELTA(uptc); - AQ_SDELTA(mptc); - AQ_SDELTA(bptc); - AQ_SDELTA(erpr); - - AQ_SDELTA(ubrc); - AQ_SDELTA(ubtc); - AQ_SDELTA(mbrc); - AQ_SDELTA(mbtc); - AQ_SDELTA(bbrc); - AQ_SDELTA(bbtc); - - AQ_SDELTA(ptc); - AQ_SDELTA(prc); - - AQ_SDELTA(dpc); - - aq_dev->curr_stats.brc = aq_dev->curr_stats.ubrc + - aq_dev->curr_stats.mbrc + - aq_dev->curr_stats.bbrc; - aq_dev->curr_stats.btc = aq_dev->curr_stats.ubtc + - aq_dev->curr_stats.mbtc + - aq_dev->curr_stats.bbtc; - - } + mbox.stats._N_ - aq_dev->last_stats._N_) + if (aq_dev->linkup) { + AQ_SDELTA(uprc); + AQ_SDELTA(mprc); + AQ_SDELTA(bprc); + AQ_SDELTA(cprc); + AQ_SDELTA(erpt); + + AQ_SDELTA(uptc); + AQ_SDELTA(mptc); + AQ_SDELTA(bptc); + AQ_SDELTA(erpr); + + AQ_SDELTA(ubrc); + AQ_SDELTA(ubtc); + AQ_SDELTA(mbrc); + AQ_SDELTA(mbtc); + AQ_SDELTA(bbrc); + AQ_SDELTA(bbtc); + + AQ_SDELTA(ptc); + AQ_SDELTA(prc); + + AQ_SDELTA(dpc); + + aq_dev->curr_stats.brc = aq_dev->curr_stats.ubrc + + aq_dev->curr_stats.mbrc + aq_dev->curr_stats.bbrc; + aq_dev->curr_stats.btc = aq_dev->curr_stats.ubtc + + aq_dev->curr_stats.mbtc + aq_dev->curr_stats.bbtc; + + } #undef AQ_SDELTA - memcpy(&aq_dev->last_stats, &mbox.stats, sizeof(mbox.stats)); + memcpy(&aq_dev->last_stats, &mbox.stats, sizeof(mbox.stats)); - return (0); + return (0); } -void aq_if_update_admin_status(if_ctx_t ctx) +void +aq_if_update_admin_status(if_ctx_t ctx) { aq_dev_t *aq_dev = iflib_get_softc(ctx); struct aq_hw *hw = &aq_dev->hw; - u32 link_speed; + uint32_t link_speed; // AQ_DBG_ENTER(); @@ -156,7 +156,8 @@ void aq_if_update_admin_status(if_ctx_t ctx) /**************************************************************************/ /* interrupt service routine (Top half) */ /**************************************************************************/ -int aq_isr_rx(void *arg) +int +aq_isr_rx(void *arg) { struct aq_ring *ring = arg; struct aq_dev *aq_dev = ring->dev; @@ -171,7 +172,8 @@ int aq_isr_rx(void *arg) /**************************************************************************/ /* interrupt service routine (Top half) */ /**************************************************************************/ -int aq_linkstat_isr(void *arg) +int +aq_linkstat_isr(void *arg) { aq_dev_t *aq_dev = arg; struct aq_hw *hw = &aq_dev->hw; diff --git a/sys/dev/aq/aq_main.c b/sys/dev/aq/aq_main.c index 48f8305fcd15..2ed9bd050780 100644 --- a/sys/dev/aq/aq_main.c +++ b/sys/dev/aq/aq_main.c @@ -32,23 +32,26 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - #include <sys/cdefs.h> __FBSDID("$FreeBSD$"); +#include "opt_inet.h" +#include "opt_inet6.h" +#include "opt_rss.h" + #include <sys/param.h> -#include <sys/malloc.h> -#include <sys/socket.h> -#include <sys/kernel.h> +#include <sys/bitstring.h> #include <sys/bus.h> +#include <sys/endian.h> +#include <sys/kernel.h> +#include <sys/malloc.h> #include <sys/module.h> +#include <sys/priv.h> #include <sys/rman.h> -#include <sys/endian.h> +#include <sys/sbuf.h> +#include <sys/socket.h> #include <sys/sockio.h> -#include <sys/priv.h> #include <sys/sysctl.h> -#include <sys/sbuf.h> -#include <sys/bitstring.h> #include <machine/bus.h> #include <machine/resource.h> @@ -56,18 +59,14 @@ __FBSDID("$FreeBSD$"); #include <dev/pci/pcireg.h> #include <dev/pci/pcivar.h> +#include <net/ethernet.h> #include <net/if.h> +#include <net/if_dl.h> #include <net/if_media.h> #include <net/if_var.h> -#include <net/if_dl.h> -#include <net/ethernet.h> #include <net/iflib.h> #include <net/rss_config.h> -#include "opt_inet.h" -#include "opt_inet6.h" -#include "opt_rss.h" - #include "ifdi_if.h" #include "aq_device.h" @@ -110,25 +109,41 @@ char aq_driver_version[] = AQ_VER; #define AQ_DEVICE_ID_AQC112S 0x92B1 static pci_vendor_info_t aq_vendor_info_array[] = { - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_0001, "Aquantia AQtion 10Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_D107, "Aquantia AQtion 10Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_D108, "Aquantia AQtion 5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_D109, "Aquantia AQtion 2.5Gbit Network Adapter"), - - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC107, "Aquantia AQtion 10Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC108, "Aquantia AQtion 5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC109, "Aquantia AQtion 2.5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC100, "Aquantia AQtion 10Gbit Network Adapter"), - - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC107S, "Aquantia AQtion 10Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC108S, "Aquantia AQtion 5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC109S, "Aquantia AQtion 2.5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC100S, "Aquantia AQtion 10Gbit Network Adapter"), - - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC111, "Aquantia AQtion 5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC112, "Aquantia AQtion 2.5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC111S, "Aquantia AQtion 5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC112S, "Aquantia AQtion 2.5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_0001, + "Aquantia AQtion 10Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_D107, + "Aquantia AQtion 10Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_D108, + "Aquantia AQtion 5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_D109, + "Aquantia AQtion 2.5Gbit Network Adapter"), + + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC107, + "Aquantia AQtion 10Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC108, + "Aquantia AQtion 5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC109, + "Aquantia AQtion 2.5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC100, + "Aquantia AQtion 10Gbit Network Adapter"), + + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC107S, + "Aquantia AQtion 10Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC108S, + "Aquantia AQtion 5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC109S, + "Aquantia AQtion 2.5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC100S, + "Aquantia AQtion 10Gbit Network Adapter"), + + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC111, + "Aquantia AQtion 5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC112, + "Aquantia AQtion 2.5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC111S, + "Aquantia AQtion 5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC112S, + "Aquantia AQtion 2.5Gbit Network Adapter"), PVID_END }; @@ -292,19 +307,21 @@ static struct if_shared_ctx aq_sctx_init = { static SYSCTL_NODE(_hw, OID_AUTO, aq, CTLFLAG_RD, 0, "Atlantic driver parameters"); /* UDP Receive-Side Scaling */ static int aq_enable_rss_udp = 1; -SYSCTL_INT(_hw_aq, OID_AUTO, enable_rss_udp, CTLFLAG_RDTUN, &aq_enable_rss_udp, 0, - "Enable Receive-Side Scaling (RSS) for UDP"); +SYSCTL_INT(_hw_aq, OID_AUTO, enable_rss_udp, CTLFLAG_RDTUN, &aq_enable_rss_udp, + 0, "Enable Receive-Side Scaling (RSS) for UDP"); /* * Device Methods */ -static void *aq_register(device_t dev) +static void * +aq_register(device_t dev) { return (&aq_sctx_init); } -static int aq_if_attach_pre(if_ctx_t ctx) +static int +aq_if_attach_pre(if_ctx_t ctx) { struct aq_dev *softc; struct aq_hw *hw; @@ -335,7 +352,7 @@ static int aq_if_attach_pre(if_ctx_t ctx) softc->mmio_tag = rman_get_bustag(softc->mmio_res); softc->mmio_handle = rman_get_bushandle(softc->mmio_res); softc->mmio_size = rman_get_size(softc->mmio_res); - softc->hw.hw_addr = (u8*) softc->mmio_handle; + softc->hw.hw_addr = (uint8_t*) softc->mmio_handle; hw = &softc->hw; hw->link_rate = aq_fw_speed_auto; hw->itr = -1; @@ -371,22 +388,21 @@ static int aq_if_attach_pre(if_ctx_t ctx) #endif scctx->isc_tx_csum_flags = CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_TSO; #if __FreeBSD__ >= 12 - scctx->isc_capabilities = IFCAP_RXCSUM | IFCAP_TXCSUM | IFCAP_HWCSUM | IFCAP_TSO | - IFCAP_JUMBO_MTU | IFCAP_VLAN_HWFILTER | - IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | - IFCAP_VLAN_HWCSUM; + scctx->isc_capabilities = IFCAP_RXCSUM | IFCAP_TXCSUM | IFCAP_HWCSUM | + IFCAP_TSO | IFCAP_JUMBO_MTU | IFCAP_VLAN_HWFILTER | IFCAP_VLAN_MTU | + IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWCSUM; scctx->isc_capenable = scctx->isc_capabilities; #else if_t ifp; ifp = iflib_get_ifp(ctx); - if_setcapenable(ifp, IFCAP_RXCSUM | IFCAP_TXCSUM | IFCAP_HWCSUM | IFCAP_TSO | - IFCAP_JUMBO_MTU | IFCAP_VLAN_HWFILTER | - IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | - IFCAP_VLAN_HWCSUM; + if_setcapenable(ifp, IFCAP_RXCSUM | IFCAP_TXCSUM | IFCAP_HWCSUM | + IFCAP_TSO | IFCAP_JUMBO_MTU | IFCAP_VLAN_HWFILTER | IFCAP_VLAN_MTU | + IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWCSUM; #endif scctx->isc_tx_nsegments = 31, scctx->isc_tx_tso_segments_max = 31; - scctx->isc_tx_tso_size_max = HW_ATL_B0_TSO_SIZE - sizeof(struct ether_vlan_header); + scctx->isc_tx_tso_size_max = + HW_ATL_B0_TSO_SIZE - sizeof(struct ether_vlan_header); scctx->isc_tx_tso_segsize_max = HW_ATL_B0_MTU_JUMBO; scctx->isc_min_frame_size = 52; scctx->isc_txrx = &aq_txrx; @@ -415,7 +431,8 @@ fail: } -static int aq_if_attach_post(if_ctx_t ctx) +static int +aq_if_attach_post(if_ctx_t ctx) { struct aq_dev *softc; int rc; @@ -434,7 +451,7 @@ static int aq_if_attach_post(if_ctx_t ctx) case IFLIB_INTR_LEGACY: rc = EOPNOTSUPP; goto exit; - goto exit; + goto exit; break; case IFLIB_INTR_MSI: break; @@ -458,7 +475,8 @@ exit: } -static int aq_if_detach(if_ctx_t ctx) +static int +aq_if_detach(if_ctx_t ctx) { struct aq_dev *softc; int i; @@ -483,7 +501,8 @@ static int aq_if_detach(if_ctx_t ctx) return (0); } -static int aq_if_shutdown(if_ctx_t ctx) +static int +aq_if_shutdown(if_ctx_t ctx) { AQ_DBG_ENTER(); @@ -494,7 +513,8 @@ static int aq_if_shutdown(if_ctx_t ctx) return (0); } -static int aq_if_suspend(if_ctx_t ctx) +static int +aq_if_suspend(if_ctx_t ctx) { AQ_DBG_ENTER(); @@ -504,7 +524,8 @@ static int aq_if_suspend(if_ctx_t ctx) return (0); } -static int aq_if_resume(if_ctx_t ctx) +static int +aq_if_resume(if_ctx_t ctx) { AQ_DBG_ENTER(); @@ -515,8 +536,9 @@ static int aq_if_resume(if_ctx_t ctx) } /* Soft queue setup and teardown */ -static int aq_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, - uint64_t *paddrs, int ntxqs, int ntxqsets) +static int +aq_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, + int ntxqs, int ntxqsets) { struct aq_dev *softc; struct aq_ring *ring; @@ -553,8 +575,9 @@ fail: return (rc); } -static int aq_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, - uint64_t *paddrs, int nrxqs, int nrxqsets) +static int +aq_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, + int nrxqs, int nrxqsets) { struct aq_dev *softc; struct aq_ring *ring; @@ -568,7 +591,8 @@ static int aq_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, M_AQ, M_NOWAIT | M_ZERO); if (!ring){ rc = ENOMEM; - device_printf(softc->dev, "atlantic: rx_ring malloc fail\n"); + device_printf(softc->dev, + "atlantic: rx_ring malloc fail\n"); goto fail; } @@ -601,7 +625,8 @@ fail: return (rc); } -static void aq_if_queues_free(if_ctx_t ctx) +static void +aq_if_queues_free(if_ctx_t ctx) { struct aq_dev *softc; int i; @@ -629,7 +654,8 @@ static void aq_if_queues_free(if_ctx_t ctx) } /* Device configuration */ -static void aq_if_init(if_ctx_t ctx) +static void +aq_if_init(if_ctx_t ctx) { struct aq_dev *softc; struct aq_hw *hw; @@ -641,7 +667,7 @@ static void aq_if_init(if_ctx_t ctx) hw = &softc->hw; err = aq_hw_init(&softc->hw, softc->hw.mac_addr, softc->msix, - softc->scctx->isc_intr == IFLIB_INTR_MSIX); + softc->scctx->isc_intr == IFLIB_INTR_MSIX); if (err != EOK) { device_printf(softc->dev, "atlantic: aq_hw_init: %d", err); } @@ -654,22 +680,26 @@ static void aq_if_init(if_ctx_t ctx) struct aq_ring *ring = softc->tx_rings[i]; err = aq_ring_tx_init(&softc->hw, ring); if (err) { - device_printf(softc->dev, "atlantic: aq_ring_tx_init: %d", err); + device_printf(softc->dev, + "atlantic: aq_ring_tx_init: %d", err); } err = aq_ring_tx_start(hw, ring); if (err != EOK) { - device_printf(softc->dev, "atlantic: aq_ring_tx_start: %d", err); + device_printf(softc->dev, + "atlantic: aq_ring_tx_start: %d", err); } } for (i = 0; i < softc->rx_rings_count; i++) { struct aq_ring *ring = softc->rx_rings[i]; err = aq_ring_rx_init(&softc->hw, ring); if (err) { - device_printf(softc->dev, "atlantic: aq_ring_rx_init: %d", err); + device_printf(softc->dev, + "atlantic: aq_ring_rx_init: %d", err); } err = aq_ring_rx_start(hw, ring); if (err != EOK) { - device_printf(softc->dev, "atlantic: aq_ring_rx_start: %d", err); + device_printf(softc->dev, + "atlantic: aq_ring_rx_start: %d", err); } aq_if_rx_queue_intr_enable(ctx, i); } @@ -685,7 +715,8 @@ static void aq_if_init(if_ctx_t ctx) } -static void aq_if_stop(if_ctx_t ctx) +static void +aq_if_stop(if_ctx_t ctx) { struct aq_dev *softc; struct aq_hw *hw; @@ -715,7 +746,8 @@ static void aq_if_stop(if_ctx_t ctx) AQ_DBG_EXIT(0); } -static uint64_t aq_if_get_counter(if_ctx_t ctx, ift_counter cnt) +static uint64_t +aq_if_get_counter(if_ctx_t ctx, ift_counter cnt) { struct aq_dev *softc = iflib_get_softc(ctx); if_t ifp = iflib_get_ifp(ctx); @@ -733,11 +765,12 @@ static uint64_t aq_if_get_counter(if_ctx_t ctx, ift_counter cnt) } #if __FreeBSD_version >= 1300054 -static u_int aq_mc_filter_apply(void *arg, struct sockaddr_dl *dl, u_int count) +static u_int +aq_mc_filter_apply(void *arg, struct sockaddr_dl *dl, u_int count) { struct aq_dev *softc = arg; struct aq_hw *hw = &softc->hw; - u8 *mac_addr = NULL; + uint8_t *mac_addr = NULL; if (count == AQ_HW_MAC_MAX) return (0); @@ -749,11 +782,12 @@ static u_int aq_mc_filter_apply(void *arg, struct sockaddr_dl *dl, u_int count) return (1); } #else -static int aq_mc_filter_apply(void *arg, struct ifmultiaddr *ifma, int count) +static int +aq_mc_filter_apply(void *arg, struct ifmultiaddr *ifma, int count) { struct aq_dev *softc = arg; struct aq_hw *hw = &softc->hw; - u8 *mac_addr = NULL; + uint8_t *mac_addr = NULL; if (ifma->ifma_addr->sa_family != AF_LINK) return (0); @@ -768,12 +802,14 @@ static int aq_mc_filter_apply(void *arg, struct ifmultiaddr *ifma, int count) } #endif -static bool aq_is_mc_promisc_required(struct aq_dev *softc) +static bool +aq_is_mc_promisc_required(struct aq_dev *softc) { return (softc->mcnt >= AQ_HW_MAC_MAX); } -static void aq_if_multi_set(if_ctx_t ctx) +static void +aq_if_multi_set(if_ctx_t ctx) { struct aq_dev *softc = iflib_get_softc(ctx); if_t ifp = iflib_get_ifp(ctx); @@ -784,12 +820,11 @@ static void aq_if_multi_set(if_ctx_t ctx) #else softc->mcnt = if_multiaddr_count(iflib_get_ifp(ctx), AQ_HW_MAC_MAX); #endif - if (softc->mcnt >= AQ_HW_MAC_MAX) - { + if (softc->mcnt >= AQ_HW_MAC_MAX) { aq_hw_set_promisc(hw, !!(if_getflags(ifp) & IFF_PROMISC), - aq_is_vlan_promisc_required(softc), - !!(if_getflags(ifp) & IFF_ALLMULTI) || aq_is_mc_promisc_required(softc)); - }else{ + aq_is_vlan_promisc_required(softc), + !!(if_getflags(ifp) & IFF_ALLMULTI) || aq_is_mc_promisc_required(softc)); + } else { #if __FreeBSD_version >= 1300054 if_foreach_llmaddr(iflib_get_ifp(ctx), &aq_mc_filter_apply, softc); #else @@ -799,7 +834,8 @@ static void aq_if_multi_set(if_ctx_t ctx) AQ_DBG_EXIT(0); } -static int aq_if_mtu_set(if_ctx_t ctx, uint32_t mtu) +static int +aq_if_mtu_set(if_ctx_t ctx, uint32_t mtu) { int err = 0; AQ_DBG_ENTER(); @@ -808,7 +844,8 @@ static int aq_if_mtu_set(if_ctx_t ctx, uint32_t mtu) return (err); } -static void aq_if_media_status(if_ctx_t ctx, struct ifmediareq *ifmr) +static void +aq_if_media_status(if_ctx_t ctx, struct ifmediareq *ifmr) { if_t ifp; @@ -821,7 +858,8 @@ static void aq_if_media_status(if_ctx_t ctx, struct ifmediareq *ifmr) AQ_DBG_EXIT(0); } -static int aq_if_media_change(if_ctx_t ctx) +static int +aq_if_media_change(if_ctx_t ctx) { struct aq_dev *softc = iflib_get_softc(ctx); if_t ifp = iflib_get_ifp(ctx); @@ -844,7 +882,8 @@ exit: return (rc); } -static int aq_if_promisc_set(if_ctx_t ctx, int flags) +static int +aq_if_promisc_set(if_ctx_t ctx, int flags) { struct aq_dev *softc; @@ -853,14 +892,15 @@ static int aq_if_promisc_set(if_ctx_t ctx, int flags) softc = iflib_get_softc(ctx); aq_hw_set_promisc(&softc->hw, !!(flags & IFF_PROMISC), - aq_is_vlan_promisc_required(softc), - !!(flags & IFF_ALLMULTI) || aq_is_mc_promisc_required(softc)); + aq_is_vlan_promisc_required(softc), + !!(flags & IFF_ALLMULTI) || aq_is_mc_promisc_required(softc)); AQ_DBG_EXIT(0); return (0); } -static void aq_if_timer(if_ctx_t ctx, uint16_t qid) +static void +aq_if_timer(if_ctx_t ctx, uint16_t qid) { struct aq_dev *softc; uint64_t ticks_now; @@ -882,7 +922,8 @@ static void aq_if_timer(if_ctx_t ctx, uint16_t qid) } /* Interrupt enable / disable */ -static void aq_if_enable_intr(if_ctx_t ctx) +static void +aq_if_enable_intr(if_ctx_t ctx) { struct aq_dev *softc = iflib_get_softc(ctx); struct aq_hw *hw = &softc->hw; @@ -895,7 +936,8 @@ static void aq_if_enable_intr(if_ctx_t ctx) AQ_DBG_EXIT(0); } -static void aq_if_disable_intr(if_ctx_t ctx) +static void +aq_if_disable_intr(if_ctx_t ctx) { struct aq_dev *softc = iflib_get_softc(ctx); struct aq_hw *hw = &softc->hw; @@ -908,7 +950,8 @@ static void aq_if_disable_intr(if_ctx_t ctx) AQ_DBG_EXIT(0); } -static int aq_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid) +static int +aq_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid) { struct aq_dev *softc = iflib_get_softc(ctx); struct aq_hw *hw = &softc->hw; @@ -921,7 +964,8 @@ static int aq_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid) return (0); } -static int aq_if_msix_intr_assign(if_ctx_t ctx, int msix) +static int +aq_if_msix_intr_assign(if_ctx_t ctx, int msix) { struct aq_dev *softc; int i, vector = 0, rc; @@ -952,22 +996,22 @@ static int aq_if_msix_intr_assign(if_ctx_t ctx, int msix) for (i = 0; i < softc->tx_rings_count; i++, vector++) { snprintf(irq_name, sizeof(irq_name), "txq%d", i); - iflib_softirq_alloc_generic(ctx, &softc->rx_rings[i]->irq, IFLIB_INTR_TX, - softc->tx_rings[i], i, irq_name); + iflib_softirq_alloc_generic(ctx, &softc->rx_rings[i]->irq, + IFLIB_INTR_TX, softc->tx_rings[i], i, irq_name); softc->tx_rings[i]->msix = (vector % softc->rx_rings_count); device_printf(softc->dev, "Assign IRQ %u to tx ring %u\n", - softc->tx_rings[i]->msix, softc->tx_rings[i]->index); + softc->tx_rings[i]->msix, softc->tx_rings[i]->index); } rc = iflib_irq_alloc_generic(ctx, &softc->irq, rx_vectors + 1, - IFLIB_INTR_ADMIN, aq_linkstat_isr, - softc, 0, "aq"); + IFLIB_INTR_ADMIN, aq_linkstat_isr, softc, 0, "aq"); softc->msix = rx_vectors; device_printf(softc->dev, "Assign IRQ %u to admin proc \n", - rx_vectors); + rx_vectors); if (rc) { - device_printf(iflib_get_dev(ctx), "Failed to register admin handler"); + device_printf(iflib_get_dev(ctx), + "Failed to register admin handler"); i = softc->rx_rings_count; goto fail; } @@ -981,7 +1025,8 @@ fail: return (rc); } -static bool aq_is_vlan_promisc_required(struct aq_dev *softc) +static bool +aq_is_vlan_promisc_required(struct aq_dev *softc) { int vlan_tag_count; @@ -994,7 +1039,8 @@ static bool aq_is_vlan_promisc_required(struct aq_dev *softc) } -static void aq_update_vlan_filters(struct aq_dev *softc) +static void +aq_update_vlan_filters(struct aq_dev *softc) { struct aq_rx_filter_vlan aq_vlans[AQ_HW_VLAN_MAX_FILTERS]; struct aq_hw *hw = &softc->hw; @@ -1021,7 +1067,8 @@ static void aq_update_vlan_filters(struct aq_dev *softc) } /* VLAN support */ -static void aq_if_vlan_register(if_ctx_t ctx, uint16_t vtag) +static void +aq_if_vlan_register(if_ctx_t ctx, uint16_t vtag) { struct aq_dev *softc = iflib_get_softc(ctx); @@ -1034,7 +1081,8 @@ static void aq_if_vlan_register(if_ctx_t ctx, uint16_t vtag) AQ_DBG_EXIT(0); } -static void aq_if_vlan_unregister(if_ctx_t ctx, uint16_t vtag) +static void +aq_if_vlan_unregister(if_ctx_t ctx, uint16_t vtag) { struct aq_dev *softc = iflib_get_softc(ctx); @@ -1047,7 +1095,8 @@ static void aq_if_vlan_unregister(if_ctx_t ctx, uint16_t vtag) AQ_DBG_EXIT(0); } -static void aq_if_led_func(if_ctx_t ctx, int onoff) +static void +aq_if_led_func(if_ctx_t ctx, int onoff) { struct aq_dev *softc = iflib_get_softc(ctx); struct aq_hw *hw = &softc->hw; @@ -1059,7 +1108,8 @@ static void aq_if_led_func(if_ctx_t ctx, int onoff) AQ_DBG_EXIT(0); } -static int aq_hw_capabilities(struct aq_dev *softc) +static int +aq_hw_capabilities(struct aq_dev *softc) { if (pci_get_vendor(softc->dev) != AQUANTIA_VENDOR_ID) @@ -1106,7 +1156,8 @@ static int aq_hw_capabilities(struct aq_dev *softc) return (0); } -static int aq_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) +static int +aq_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) { struct aq_dev *softc = (struct aq_dev *)arg1; device_t dev = softc->dev; @@ -1142,7 +1193,8 @@ static int aq_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) return (0); } -static int aq_sysctl_print_tx_head(SYSCTL_HANDLER_ARGS) +static int +aq_sysctl_print_tx_head(SYSCTL_HANDLER_ARGS) { struct aq_ring *ring = arg1; int error = 0; @@ -1160,7 +1212,8 @@ static int aq_sysctl_print_tx_head(SYSCTL_HANDLER_ARGS) return (0); } -static int aq_sysctl_print_tx_tail(SYSCTL_HANDLER_ARGS) +static int +aq_sysctl_print_tx_tail(SYSCTL_HANDLER_ARGS) { struct aq_ring *ring = arg1; int error = 0; @@ -1178,7 +1231,8 @@ static int aq_sysctl_print_tx_tail(SYSCTL_HANDLER_ARGS) return (0); } -static int aq_sysctl_print_rx_head(SYSCTL_HANDLER_ARGS) +static int +aq_sysctl_print_rx_head(SYSCTL_HANDLER_ARGS) { struct aq_ring *ring = arg1; int error = 0; @@ -1196,7 +1250,8 @@ static int aq_sysctl_print_rx_head(SYSCTL_HANDLER_ARGS) return (0); } -static int aq_sysctl_print_rx_tail(SYSCTL_HANDLER_ARGS) +static int +aq_sysctl_print_rx_tail(SYSCTL_HANDLER_ARGS) { struct aq_ring *ring = arg1; int error = 0; @@ -1214,116 +1269,117 @@ static int aq_sysctl_print_rx_tail(SYSCTL_HANDLER_ARGS) return (0); } -static void aq_add_stats_sysctls(struct aq_dev *softc) +static void +aq_add_stats_sysctls(struct aq_dev *softc) { - device_t dev = softc->dev; - struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); - struct sysctl_oid *tree = device_get_sysctl_tree(dev); - struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); - struct aq_stats_s *stats = &softc->curr_stats; - struct sysctl_oid *stat_node, *queue_node; - struct sysctl_oid_list *stat_list, *queue_list; + device_t dev = softc->dev; + struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); + struct sysctl_oid *tree = device_get_sysctl_tree(dev); + struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); + struct aq_stats_s *stats = &softc->curr_stats; + struct sysctl_oid *stat_node, *queue_node; + struct sysctl_oid_list *stat_list, *queue_list; #define QUEUE_NAME_LEN 32 - char namebuf[QUEUE_NAME_LEN]; + char namebuf[QUEUE_NAME_LEN]; /* RSS configuration */ SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "print_rss_config", - CTLTYPE_STRING | CTLFLAG_RD, softc, 0, - aq_sysctl_print_rss_config, "A", "Prints RSS Configuration"); - - /* Driver Statistics */ - for (int i = 0; i < softc->tx_rings_count; i++) { - struct aq_ring *ring = softc->tx_rings[i]; - snprintf(namebuf, QUEUE_NAME_LEN, "tx_queue%d", i); - queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, - CTLFLAG_RD, NULL, "Queue Name"); - queue_list = SYSCTL_CHILDREN(queue_node); - - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_pkts", - CTLFLAG_RD, &(ring->stats.tx_pkts), "TX Packets"); - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_bytes", - CTLFLAG_RD, &(ring->stats.tx_bytes), "TX Octets"); - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_drops", - CTLFLAG_RD, &(ring->stats.tx_drops), "TX Drops"); - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_queue_full", - CTLFLAG_RD, &(ring->stats.tx_queue_full), "TX Queue Full"); - SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "tx_head", - CTLTYPE_UINT | CTLFLAG_RD, ring, 0, - aq_sysctl_print_tx_head, "IU", "ring head pointer"); - SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "tx_tail", - CTLTYPE_UINT | CTLFLAG_RD, ring, 0, + CTLTYPE_STRING | CTLFLAG_RD, softc, 0, + aq_sysctl_print_rss_config, "A", "Prints RSS Configuration"); + + /* Driver Statistics */ + for (int i = 0; i < softc->tx_rings_count; i++) { + struct aq_ring *ring = softc->tx_rings[i]; + snprintf(namebuf, QUEUE_NAME_LEN, "tx_queue%d", i); + queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, + CTLFLAG_RD, NULL, "Queue Name"); + queue_list = SYSCTL_CHILDREN(queue_node); + + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_pkts", + CTLFLAG_RD, &(ring->stats.tx_pkts), "TX Packets"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_bytes", + CTLFLAG_RD, &(ring->stats.tx_bytes), "TX Octets"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_drops", + CTLFLAG_RD, &(ring->stats.tx_drops), "TX Drops"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_queue_full", + CTLFLAG_RD, &(ring->stats.tx_queue_full), "TX Queue Full"); + SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "tx_head", + CTLTYPE_UINT | CTLFLAG_RD, ring, 0, + aq_sysctl_print_tx_head, "IU", "ring head pointer"); + SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "tx_tail", + CTLTYPE_UINT | CTLFLAG_RD, ring, 0, aq_sysctl_print_tx_tail, "IU", "ring tail pointer"); - } - - for (int i = 0; i < softc->rx_rings_count; i++) { - struct aq_ring *ring = softc->rx_rings[i]; - snprintf(namebuf, QUEUE_NAME_LEN, "rx_queue%d", i); - queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, - CTLFLAG_RD, NULL, "Queue Name"); - queue_list = SYSCTL_CHILDREN(queue_node); - - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_pkts", - CTLFLAG_RD, &(ring->stats.rx_pkts), "RX Packets"); - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes", - CTLFLAG_RD, &(ring->stats.rx_bytes), "TX Octets"); - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "jumbo_pkts", - CTLFLAG_RD, &(ring->stats.jumbo_pkts), "Jumbo Packets"); - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_err", - CTLFLAG_RD, &(ring->stats.rx_err), "RX Errors"); - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irq", - CTLFLAG_RD, &(ring->stats.irq), "RX interrupts"); - SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rx_head", - CTLTYPE_UINT | CTLFLAG_RD, ring, 0, + } + + for (int i = 0; i < softc->rx_rings_count; i++) { + struct aq_ring *ring = softc->rx_rings[i]; + snprintf(namebuf, QUEUE_NAME_LEN, "rx_queue%d", i); + queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, + CTLFLAG_RD, NULL, "Queue Name"); + queue_list = SYSCTL_CHILDREN(queue_node); + + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_pkts", + CTLFLAG_RD, &(ring->stats.rx_pkts), "RX Packets"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes", + CTLFLAG_RD, &(ring->stats.rx_bytes), "TX Octets"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "jumbo_pkts", + CTLFLAG_RD, &(ring->stats.jumbo_pkts), "Jumbo Packets"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_err", + CTLFLAG_RD, &(ring->stats.rx_err), "RX Errors"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irq", + CTLFLAG_RD, &(ring->stats.irq), "RX interrupts"); + SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rx_head", + CTLTYPE_UINT | CTLFLAG_RD, ring, 0, aq_sysctl_print_rx_head, "IU", "ring head pointer"); - SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rx_tail", - CTLTYPE_UINT | CTLFLAG_RD, ring, 0, + SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rx_tail", + CTLTYPE_UINT | CTLFLAG_RD, ring, 0, aq_sysctl_print_rx_tail, "IU", " ring tail pointer"); - } - - stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac", - CTLFLAG_RD, NULL, "Statistics (read from HW registers)"); - stat_list = SYSCTL_CHILDREN(stat_node); - - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_rcvd", - CTLFLAG_RD, &stats->prc, "Good Packets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_pkts_rcvd", - CTLFLAG_RD, &stats->uprc, "Unicast Packets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_rcvd", - CTLFLAG_RD, &stats->mprc, "Multicast Packets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_rcvd", - CTLFLAG_RD, &stats->bprc, "Broadcast Packets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rsc_pkts_rcvd", - CTLFLAG_RD, &stats->cprc, "Coalesced Packets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "err_pkts_rcvd", - CTLFLAG_RD, &stats->erpr, "Errors of Packet Receive"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "drop_pkts_dma", - CTLFLAG_RD, &stats->dpc, "Dropped Packets in DMA"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_rcvd", - CTLFLAG_RD, &stats->brc, "Good Octets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_octets_rcvd", - CTLFLAG_RD, &stats->ubrc, "Unicast Octets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_octets_rcvd", - CTLFLAG_RD, &stats->mbrc, "Multicast Octets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_octets_rcvd", - CTLFLAG_RD, &stats->bbrc, "Broadcast Octets Received"); - - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd", - CTLFLAG_RD, &stats->ptc, "Good Packets Transmitted"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_pkts_txd", - CTLFLAG_RD, &stats->uptc, "Unicast Packets Transmitted"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd", - CTLFLAG_RD, &stats->mptc, "Multicast Packets Transmitted"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd", - CTLFLAG_RD, &stats->bptc, "Broadcast Packets Transmitted"); - - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "err_pkts_txd", - CTLFLAG_RD, &stats->erpt, "Errors of Packet Transmit"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd", - CTLFLAG_RD, &stats->btc, "Good Octets Transmitted"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_octets_txd", - CTLFLAG_RD, &stats->ubtc, "Unicast Octets Transmitted"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_octets_txd", - CTLFLAG_RD, &stats->mbtc, "Multicast Octets Transmitted"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_octets_txd", - CTLFLAG_RD, &stats->bbtc, "Broadcast Octets Transmitted"); + } + + stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac", + CTLFLAG_RD, NULL, "Statistics (read from HW registers)"); + stat_list = SYSCTL_CHILDREN(stat_node); + + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_rcvd", + CTLFLAG_RD, &stats->prc, "Good Packets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_pkts_rcvd", + CTLFLAG_RD, &stats->uprc, "Unicast Packets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_rcvd", + CTLFLAG_RD, &stats->mprc, "Multicast Packets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_rcvd", + CTLFLAG_RD, &stats->bprc, "Broadcast Packets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rsc_pkts_rcvd", + CTLFLAG_RD, &stats->cprc, "Coalesced Packets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "err_pkts_rcvd", + CTLFLAG_RD, &stats->erpr, "Errors of Packet Receive"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "drop_pkts_dma", + CTLFLAG_RD, &stats->dpc, "Dropped Packets in DMA"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_rcvd", + CTLFLAG_RD, &stats->brc, "Good Octets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_octets_rcvd", + CTLFLAG_RD, &stats->ubrc, "Unicast Octets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_octets_rcvd", + CTLFLAG_RD, &stats->mbrc, "Multicast Octets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_octets_rcvd", + CTLFLAG_RD, &stats->bbrc, "Broadcast Octets Received"); + + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd", + CTLFLAG_RD, &stats->ptc, "Good Packets Transmitted"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_pkts_txd", + CTLFLAG_RD, &stats->uptc, "Unicast Packets Transmitted"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd", + CTLFLAG_RD, &stats->mptc, "Multicast Packets Transmitted"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd", + CTLFLAG_RD, &stats->bptc, "Broadcast Packets Transmitted"); + + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "err_pkts_txd", + CTLFLAG_RD, &stats->erpt, "Errors of Packet Transmit"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd", + CTLFLAG_RD, &stats->btc, "Good Octets Transmitted"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_octets_txd", + CTLFLAG_RD, &stats->ubtc, "Unicast Octets Transmitted"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_octets_txd", + CTLFLAG_RD, &stats->mbtc, "Multicast Octets Transmitted"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_octets_txd", + CTLFLAG_RD, &stats->bbtc, "Broadcast Octets Transmitted"); } diff --git a/sys/dev/aq/aq_media.c b/sys/dev/aq/aq_media.c index fdf7ef38d2dc..9cdc0236bb60 100644 --- a/sys/dev/aq/aq_media.c +++ b/sys/dev/aq/aq_media.c @@ -36,14 +36,14 @@ __FBSDID("$FreeBSD$"); #include <sys/param.h> +#include <sys/bitstring.h> #include <sys/kernel.h> #include <sys/socket.h> -#include <sys/bitstring.h> +#include <net/ethernet.h> #include <net/if.h> #include <net/if_media.h> #include <net/if_var.h> #include <net/if_dl.h> -#include <net/ethernet.h> #include <net/iflib.h> #include "aq_device.h" @@ -53,48 +53,46 @@ __FBSDID("$FreeBSD$"); #define AQ_HW_SUPPORT_SPEED(softc, s) ((softc)->link_speeds & s) -void aq_mediastatus_update(aq_dev_t *aq_dev, u32 link_speed, const struct aq_hw_fc_info *fc_neg) +void +aq_mediastatus_update(aq_dev_t *aq_dev, uint32_t link_speed, +const struct aq_hw_fc_info *fc_neg) { struct aq_hw *hw = &aq_dev->hw; aq_dev->media_active = 0; if (fc_neg->fc_rx) - aq_dev->media_active |= IFM_ETH_RXPAUSE; + aq_dev->media_active |= IFM_ETH_RXPAUSE; if (fc_neg->fc_tx) - aq_dev->media_active |= IFM_ETH_TXPAUSE; + aq_dev->media_active |= IFM_ETH_TXPAUSE; switch(link_speed) { case 100: aq_dev->media_active |= IFM_100_TX | IFM_FDX; - break; - + break; case 1000: aq_dev->media_active |= IFM_1000_T | IFM_FDX; - break; - + break; case 2500: aq_dev->media_active |= IFM_2500_T | IFM_FDX; - break; - + break; case 5000: aq_dev->media_active |= IFM_5000_T | IFM_FDX; - break; - + break; case 10000: aq_dev->media_active |= IFM_10G_T | IFM_FDX; - break; - + break; case 0: default: aq_dev->media_active |= IFM_NONE; - break; + break; } if (hw->link_rate == aq_fw_speed_auto) aq_dev->media_active |= IFM_AUTO; } -void aq_mediastatus(if_t ifp, struct ifmediareq *ifmr) +void +aq_mediastatus(if_t ifp, struct ifmediareq *ifmr) { aq_dev_t *aq_dev = iflib_get_softc(if_getsoftc(ifp)); @@ -107,7 +105,8 @@ void aq_mediastatus(if_t ifp, struct ifmediareq *ifmr) ifmr->ifm_active |= aq_dev->media_active; } -int aq_mediachange(if_t ifp) +int +aq_mediachange(if_t ifp) { aq_dev_t *aq_dev = iflib_get_softc(if_getsoftc(ifp)); struct aq_hw *hw = &aq_dev->hw; @@ -172,7 +171,8 @@ int aq_mediachange(if_t ifp) if (!(if_getflags(ifp) & IFF_UP)) return (0); - if ((media_rate != old_media_rate) || (hw->link_rate != old_link_speed)) { + if ((media_rate != old_media_rate) || + (hw->link_rate != old_link_speed)) { // re-initialize hardware with new parameters aq_hw_set_link_speed(hw, hw->link_rate); } @@ -181,17 +181,20 @@ int aq_mediachange(if_t ifp) return (0); } -static void aq_add_media_types(aq_dev_t *aq_dev, int media_link_speed) +static void +aq_add_media_types(aq_dev_t *aq_dev, int media_link_speed) { - ifmedia_add(aq_dev->media, IFM_ETHER | media_link_speed | IFM_FDX, 0, NULL); + ifmedia_add(aq_dev->media, IFM_ETHER | media_link_speed | IFM_FDX, 0, + NULL); ifmedia_add(aq_dev->media, IFM_ETHER | media_link_speed | IFM_FDX | - IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE, 0, NULL); + IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE, 0, NULL); ifmedia_add(aq_dev->media, IFM_ETHER | media_link_speed | IFM_FDX | - IFM_ETH_RXPAUSE, 0, NULL); + IFM_ETH_RXPAUSE, 0, NULL); ifmedia_add(aq_dev->media, IFM_ETHER | media_link_speed | IFM_FDX | - IFM_ETH_TXPAUSE, 0, NULL); + IFM_ETH_TXPAUSE, 0, NULL); } -void aq_initmedia(aq_dev_t *aq_dev) +void +aq_initmedia(aq_dev_t *aq_dev) { AQ_DBG_ENTER(); @@ -213,7 +216,8 @@ void aq_initmedia(aq_dev_t *aq_dev) aq_add_media_types(aq_dev, IFM_10G_T); // link is initially autoselect - ifmedia_set(aq_dev->media, IFM_ETHER | IFM_AUTO | IFM_FDX | IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE); + ifmedia_set(aq_dev->media, + IFM_ETHER | IFM_AUTO | IFM_FDX | IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE); AQ_DBG_EXIT(0); } diff --git a/sys/dev/aq/aq_ring.c b/sys/dev/aq/aq_ring.c index ca0391a6d61b..40128cbb72b8 100644 --- a/sys/dev/aq/aq_ring.c +++ b/sys/dev/aq/aq_ring.c @@ -36,15 +36,15 @@ __FBSDID("$FreeBSD$"); #include <sys/param.h> -#include <machine/param.h> +#include <sys/bitstring.h> #include <sys/kernel.h> #include <sys/socket.h> -#include <sys/bitstring.h> +#include <machine/param.h> +#include <net/ethernet.h> #include <net/if.h> +#include <net/if_dl.h> #include <net/if_media.h> #include <net/if_var.h> -#include <net/if_dl.h> -#include <net/ethernet.h> #include <net/iflib.h> #include <netinet/in.h> @@ -80,151 +80,159 @@ struct if_txrx aq_txrx = { static inline uint32_t aq_next(uint32_t i, uint32_t lim) { - return (i == lim) ? 0 : i + 1; + return (i == lim) ? 0 : i + 1; } -int aq_ring_rx_init(struct aq_hw *hw, struct aq_ring *ring) +int +aq_ring_rx_init(struct aq_hw *hw, struct aq_ring *ring) /* uint64_t ring_addr, - u32 ring_size, - u32 ring_idx, - u32 interrupt_cause, - u32 cpu_idx) */ + uint32_t ring_size, + uint32_t ring_idx, + uint32_t interrupt_cause, + uint32_t cpu_idx) */ { - int err; - u32 dma_desc_addr_lsw = (u32)ring->rx_descs_phys & 0xffffffff; - u32 dma_desc_addr_msw = (u32)(ring->rx_descs_phys >> 32); + int err; + uint32_t dma_desc_addr_lsw = (uint32_t)ring->rx_descs_phys & 0xffffffff; + uint32_t dma_desc_addr_msw = (uint32_t)(ring->rx_descs_phys >> 32); - AQ_DBG_ENTERA("[%d]", ring->index); + AQ_DBG_ENTERA("[%d]", ring->index); - rdm_rx_desc_en_set(hw, false, ring->index); + rdm_rx_desc_en_set(hw, false, ring->index); - rdm_rx_desc_head_splitting_set(hw, 0U, ring->index); + rdm_rx_desc_head_splitting_set(hw, 0U, ring->index); - reg_rx_dma_desc_base_addresslswset(hw, dma_desc_addr_lsw, ring->index); + reg_rx_dma_desc_base_addresslswset(hw, dma_desc_addr_lsw, ring->index); - reg_rx_dma_desc_base_addressmswset(hw, dma_desc_addr_msw, ring->index); + reg_rx_dma_desc_base_addressmswset(hw, dma_desc_addr_msw, ring->index); - rdm_rx_desc_len_set(hw, ring->rx_size / 8U, ring->index); + rdm_rx_desc_len_set(hw, ring->rx_size / 8U, ring->index); - device_printf(ring->dev->dev, "ring %d: __PAGESIZE=%d MCLBYTES=%d hw->max_frame_size=%d\n", + device_printf(ring->dev->dev, "ring %d: __PAGESIZE=%d MCLBYTES=%d hw->max_frame_size=%d\n", ring->index, PAGE_SIZE, MCLBYTES, ring->rx_max_frame_size); - rdm_rx_desc_data_buff_size_set(hw, ring->rx_max_frame_size / 1024U, ring->index); + rdm_rx_desc_data_buff_size_set(hw, ring->rx_max_frame_size / 1024U, ring->index); - rdm_rx_desc_head_buff_size_set(hw, 0U, ring->index); - rdm_rx_desc_head_splitting_set(hw, 0U, ring->index); - rpo_rx_desc_vlan_stripping_set(hw, 0U, ring->index); + rdm_rx_desc_head_buff_size_set(hw, 0U, ring->index); + rdm_rx_desc_head_splitting_set(hw, 0U, ring->index); + rpo_rx_desc_vlan_stripping_set(hw, 0U, ring->index); - /* Rx ring set mode */ + /* Rx ring set mode */ - /* Mapping interrupt vector */ - itr_irq_map_rx_set(hw, ring->msix, ring->index); - itr_irq_map_en_rx_set(hw, true, ring->index); + /* Mapping interrupt vector */ + itr_irq_map_rx_set(hw, ring->msix, ring->index); + itr_irq_map_en_rx_set(hw, true, ring->index); - rdm_cpu_id_set(hw, 0, ring->index); - rdm_rx_desc_dca_en_set(hw, 0U, ring->index); - rdm_rx_head_dca_en_set(hw, 0U, ring->index); - rdm_rx_pld_dca_en_set(hw, 0U, ring->index); + rdm_cpu_id_set(hw, 0, ring->index); + rdm_rx_desc_dca_en_set(hw, 0U, ring->index); + rdm_rx_head_dca_en_set(hw, 0U, ring->index); + rdm_rx_pld_dca_en_set(hw, 0U, ring->index); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -int aq_ring_tx_init(struct aq_hw *hw, struct aq_ring *ring) +int +aq_ring_tx_init(struct aq_hw *hw, struct aq_ring *ring) /* uint64_t ring_addr, - u32 ring_size, - u32 ring_idx, - u32 interrupt_cause, - u32 cpu_idx) */ + uint32_t ring_size, + uint32_t ring_idx, + uint32_t interrupt_cause, + uint32_t cpu_idx) */ { - int err; - u32 dma_desc_addr_lsw = (u32)ring->tx_descs_phys & 0xffffffff; - u32 dma_desc_addr_msw = (u64)(ring->tx_descs_phys >> 32); + int err; + uint32_t dma_desc_addr_lsw = (uint32_t)ring->tx_descs_phys & 0xffffffff; + uint32_t dma_desc_addr_msw = (uint64_t)(ring->tx_descs_phys >> 32); - AQ_DBG_ENTERA("[%d]", ring->index); + AQ_DBG_ENTERA("[%d]", ring->index); - tdm_tx_desc_en_set(hw, 0U, ring->index); + tdm_tx_desc_en_set(hw, 0U, ring->index); - reg_tx_dma_desc_base_addresslswset(hw, dma_desc_addr_lsw, ring->index); + reg_tx_dma_desc_base_addresslswset(hw, dma_desc_addr_lsw, ring->index); - reg_tx_dma_desc_base_addressmswset(hw, dma_desc_addr_msw, ring->index); + reg_tx_dma_desc_base_addressmswset(hw, dma_desc_addr_msw, ring->index); - tdm_tx_desc_len_set(hw, ring->tx_size / 8U, ring->index); + tdm_tx_desc_len_set(hw, ring->tx_size / 8U, ring->index); - aq_ring_tx_tail_update(hw, ring, 0U); + aq_ring_tx_tail_update(hw, ring, 0U); - /* Set Tx threshold */ - tdm_tx_desc_wr_wb_threshold_set(hw, 0U, ring->index); + /* Set Tx threshold */ + tdm_tx_desc_wr_wb_threshold_set(hw, 0U, ring->index); - /* Mapping interrupt vector */ - itr_irq_map_tx_set(hw, ring->msix, ring->index); - itr_irq_map_en_tx_set(hw, true, ring->index); + /* Mapping interrupt vector */ + itr_irq_map_tx_set(hw, ring->msix, ring->index); + itr_irq_map_en_tx_set(hw, true, ring->index); - tdm_cpu_id_set(hw, 0, ring->index); - tdm_tx_desc_dca_en_set(hw, 0U, ring->index); + tdm_cpu_id_set(hw, 0, ring->index); + tdm_tx_desc_dca_en_set(hw, 0U, ring->index); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -int aq_ring_tx_tail_update(struct aq_hw *hw, struct aq_ring *ring, u32 tail) +int +aq_ring_tx_tail_update(struct aq_hw *hw, struct aq_ring *ring, uint32_t tail) { - AQ_DBG_ENTERA("[%d]", ring->index); - reg_tx_dma_desc_tail_ptr_set(hw, tail, ring->index); - AQ_DBG_EXIT(0); - return (0); + AQ_DBG_ENTERA("[%d]", ring->index); + reg_tx_dma_desc_tail_ptr_set(hw, tail, ring->index); + AQ_DBG_EXIT(0); + return (0); } -int aq_ring_tx_start(struct aq_hw *hw, struct aq_ring *ring) +int +aq_ring_tx_start(struct aq_hw *hw, struct aq_ring *ring) { - int err; + int err; - AQ_DBG_ENTERA("[%d]", ring->index); - tdm_tx_desc_en_set(hw, 1U, ring->index); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_ENTERA("[%d]", ring->index); + tdm_tx_desc_en_set(hw, 1U, ring->index); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -int aq_ring_rx_start(struct aq_hw *hw, struct aq_ring *ring) +int +aq_ring_rx_start(struct aq_hw *hw, struct aq_ring *ring) { - int err; + int err; - AQ_DBG_ENTERA("[%d]", ring->index); - rdm_rx_desc_en_set(hw, 1U, ring->index); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_ENTERA("[%d]", ring->index); + rdm_rx_desc_en_set(hw, 1U, ring->index); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -int aq_ring_tx_stop(struct aq_hw *hw, struct aq_ring *ring) +int +aq_ring_tx_stop(struct aq_hw *hw, struct aq_ring *ring) { - int err; + int err; - AQ_DBG_ENTERA("[%d]", ring->index); - tdm_tx_desc_en_set(hw, 0U, ring->index); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_ENTERA("[%d]", ring->index); + tdm_tx_desc_en_set(hw, 0U, ring->index); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -int aq_ring_rx_stop(struct aq_hw *hw, struct aq_ring *ring) +int +aq_ring_rx_stop(struct aq_hw *hw, struct aq_ring *ring) { - int err; - - AQ_DBG_ENTERA("[%d]", ring->index); - rdm_rx_desc_en_set(hw, 0U, ring->index); - /* Invalidate Descriptor Cache to prevent writing to the cached - * descriptors and to the data pointer of those descriptors - */ - rdm_rx_dma_desc_cache_init_tgl(hw); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + int err; + + AQ_DBG_ENTERA("[%d]", ring->index); + rdm_rx_desc_en_set(hw, 0U, ring->index); + /* Invalidate Descriptor Cache to prevent writing to the cached + * descriptors and to the data pointer of those descriptors + */ + rdm_rx_dma_desc_cache_init_tgl(hw); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -static void aq_ring_rx_refill(void* arg, if_rxd_update_t iru) +static void +aq_ring_rx_refill(void* arg, if_rxd_update_t iru) { aq_dev_t *aq_dev = arg; aq_rx_desc_t *rx_desc; @@ -232,7 +240,7 @@ static void aq_ring_rx_refill(void* arg, if_rxd_update_t iru) qidx_t i, pidx; AQ_DBG_ENTERA("ring=%d iru_pidx=%d iru_count=%d iru->iru_buf_size=%d", - iru->iru_qsidx, iru->iru_pidx, iru->iru_count, iru->iru_buf_size); + iru->iru_qsidx, iru->iru_pidx, iru->iru_count, iru->iru_buf_size); ring = aq_dev->rx_rings[iru->iru_qsidx]; pidx = iru->iru_pidx; @@ -248,8 +256,8 @@ static void aq_ring_rx_refill(void* arg, if_rxd_update_t iru) AQ_DBG_EXIT(0); } -static void aq_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, - qidx_t pidx) +static void +aq_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, qidx_t pidx) { aq_dev_t *aq_dev = arg; struct aq_ring *ring = aq_dev->rx_rings[rxqid]; @@ -259,7 +267,8 @@ static void aq_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, AQ_DBG_EXIT(0); } -static int aq_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t budget) +static int +aq_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t budget) { aq_dev_t *aq_dev = arg; struct aq_ring *ring = aq_dev->rx_rings[rxqid]; @@ -268,8 +277,9 @@ static int aq_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t bu AQ_DBG_ENTERA("[%d] head=%u, budget %d", ring->index, idx, budget); - for (iter = 0, cnt = 0, i = idx; iter < ring->rx_size && cnt <= budget;) { - trace_aq_rx_descr(ring->index, i, (volatile u64*)&rx_desc[i]); + for (iter = 0, cnt = 0, i = idx; + iter < ring->rx_size && cnt <= budget;) { + trace_aq_rx_descr(ring->index, i, (volatile uint64_t*)&rx_desc[i]); if (!rx_desc[i].wb.dd) break; @@ -296,7 +306,8 @@ static int aq_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t bu return (cnt); } -static void aq_rx_set_cso_flags(aq_rx_desc_t *rx_desc, if_rxd_info_t ri) +static void +aq_rx_set_cso_flags(aq_rx_desc_t *rx_desc, if_rxd_info_t ri) { if ((rx_desc->wb.pkt_type & 0x3) == 0) { //IPv4 if (rx_desc->wb.rx_cntl & BIT(0)){ // IPv4 csum checked @@ -316,17 +327,18 @@ static void aq_rx_set_cso_flags(aq_rx_desc_t *rx_desc, if_rxd_info_t ri) } static uint8_t bsd_rss_type[16] = { - [AQ_RX_RSS_TYPE_IPV4]=M_HASHTYPE_RSS_IPV4, - [AQ_RX_RSS_TYPE_IPV6]=M_HASHTYPE_RSS_IPV6, - [AQ_RX_RSS_TYPE_IPV4_TCP]=M_HASHTYPE_RSS_TCP_IPV4, - [AQ_RX_RSS_TYPE_IPV6_TCP]=M_HASHTYPE_RSS_TCP_IPV6, - [AQ_RX_RSS_TYPE_IPV4_UDP]=M_HASHTYPE_RSS_UDP_IPV4, - [AQ_RX_RSS_TYPE_IPV6_UDP]=M_HASHTYPE_RSS_UDP_IPV6, + [AQ_RX_RSS_TYPE_IPV4] = M_HASHTYPE_RSS_IPV4, + [AQ_RX_RSS_TYPE_IPV6] = M_HASHTYPE_RSS_IPV6, + [AQ_RX_RSS_TYPE_IPV4_TCP] = M_HASHTYPE_RSS_TCP_IPV4, + [AQ_RX_RSS_TYPE_IPV6_TCP] = M_HASHTYPE_RSS_TCP_IPV6, + [AQ_RX_RSS_TYPE_IPV4_UDP] = M_HASHTYPE_RSS_UDP_IPV4, + [AQ_RX_RSS_TYPE_IPV6_UDP] = M_HASHTYPE_RSS_UDP_IPV6, }; -static int aq_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) +static int +aq_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) { aq_dev_t *aq_dev = arg; struct aq_ring *ring = aq_dev->rx_rings[ri->iri_qsidx]; @@ -343,7 +355,7 @@ static int aq_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) do { rx_desc = (aq_rx_desc_t *) &ring->rx_descs[cidx]; - trace_aq_rx_descr(ring->index, cidx, (volatile u64*)rx_desc); + trace_aq_rx_descr(ring->index, cidx, (volatile uint64_t*)rx_desc); if ((rx_desc->wb.rx_stat & BIT(0)) != 0) { ring->stats.rx_err++; @@ -393,20 +405,24 @@ exit: /* */ /*****************************************************************************/ -static void aq_setup_offloads(aq_dev_t *aq_dev, if_pkt_info_t pi, aq_tx_desc_t *txd, u32 tx_cmd) +static void +aq_setup_offloads(aq_dev_t *aq_dev, if_pkt_info_t pi, aq_tx_desc_t *txd, + uint32_t tx_cmd) { - AQ_DBG_ENTER(); - txd->cmd |= tx_desc_cmd_fcs; - txd->cmd |= (pi->ipi_csum_flags & (CSUM_IP|CSUM_TSO)) ? tx_desc_cmd_ipv4 : 0; - txd->cmd |= (pi->ipi_csum_flags & - (CSUM_IP_TCP | CSUM_IP6_TCP | CSUM_IP_UDP | CSUM_IP6_UDP) - ) ? tx_desc_cmd_l4cs : 0; - txd->cmd |= (pi->ipi_flags & IPI_TX_INTR) ? tx_desc_cmd_wb : 0; - txd->cmd |= tx_cmd; - AQ_DBG_EXIT(0); + AQ_DBG_ENTER(); + txd->cmd |= tx_desc_cmd_fcs; + txd->cmd |= (pi->ipi_csum_flags & (CSUM_IP|CSUM_TSO)) ? + tx_desc_cmd_ipv4 : 0; + txd->cmd |= (pi->ipi_csum_flags & (CSUM_IP_TCP | CSUM_IP6_TCP | + CSUM_IP_UDP | CSUM_IP6_UDP)) ? tx_desc_cmd_l4cs : 0; + txd->cmd |= (pi->ipi_flags & IPI_TX_INTR) ? tx_desc_cmd_wb : 0; + txd->cmd |= tx_cmd; + AQ_DBG_EXIT(0); } -static int aq_ring_tso_setup(aq_dev_t *aq_dev, if_pkt_info_t pi, uint32_t *hdrlen, aq_txc_desc_t *txc) +static int +aq_ring_tso_setup(aq_dev_t *aq_dev, if_pkt_info_t pi, uint32_t *hdrlen, + aq_txc_desc_t *txc) { uint32_t tx_cmd = 0; @@ -448,7 +464,8 @@ static int aq_ring_tso_setup(aq_dev_t *aq_dev, if_pkt_info_t pi, uint32_t *hdrle return (tx_cmd); } -static int aq_isc_txd_encap(void *arg, if_pkt_info_t pi) +static int +aq_isc_txd_encap(void *arg, if_pkt_info_t pi) { aq_dev_t *aq_dev = arg; struct aq_ring *ring; @@ -477,7 +494,8 @@ static int aq_isc_txd_encap(void *arg, if_pkt_info_t pi) AQ_DBG_PRINT("tx_cmd = 0x%x", tx_cmd); if (tx_cmd) { - trace_aq_tx_context_descr(ring->index, pidx, (volatile void*)txc); + trace_aq_tx_context_descr(ring->index, pidx, + (volatile void*)txc); /* We've consumed the first desc, adjust counters */ pidx = aq_next(pidx, ring->tx_size - 1); @@ -515,7 +533,8 @@ static int aq_isc_txd_encap(void *arg, if_pkt_info_t pi) txd->len = segs[i].ds_len; txd->pay_len = pay_len; if (i < pi->ipi_nsegs - 1) - trace_aq_tx_descr(ring->index, pidx, (volatile void*)txd); + trace_aq_tx_descr(ring->index, pidx, + (volatile void*)txd); pidx = aq_next(pidx, ring->tx_size - 1); @@ -537,7 +556,8 @@ static int aq_isc_txd_encap(void *arg, if_pkt_info_t pi) return (0); } -static void aq_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx) +static void +aq_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx) { aq_dev_t *aq_dev = arg; struct aq_ring *ring = aq_dev->tx_rings[txqid]; @@ -549,12 +569,14 @@ static void aq_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx) } -static inline unsigned int aq_avail_desc(int a, int b, int size) +static inline unsigned int +aq_avail_desc(int a, int b, int size) { - return (((b >= a)) ? ((size ) - b + a) : (a - b)); + return (((b >= a)) ? ((size) - b + a) : (a - b)); } -static int aq_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear) +static int +aq_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear) { aq_dev_t *aq_dev = arg; struct aq_ring *ring = aq_dev->tx_rings[txqid]; @@ -567,7 +589,7 @@ static int aq_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear) AQ_DBG_PRINT("swhead %d hwhead %d", ring->tx_head, head); if (ring->tx_head == head) { - avail = 0; //ring->tx_size; + avail = 0; // ring->tx_size; goto done; } diff --git a/sys/dev/aq/aq_ring.h b/sys/dev/aq/aq_ring.h index d6ab3804cf84..2d3740802213 100644 --- a/sys/dev/aq/aq_ring.h +++ b/sys/dev/aq/aq_ring.h @@ -41,130 +41,130 @@ typedef volatile struct { - u32 rss_type:4; - u32 pkt_type:8; - u32 rdm_err:1; - u32 rsvd:6; - u32 rx_cntl:2; - u32 sph:1; - u32 hdr_len:10; - u32 rss_hash; - u16 dd:1; - u16 eop:1; - u16 rx_stat:4; - u16 rx_estat:6; - u16 rsc_cnt:4; - u16 pkt_len; - u16 next_desp; - u16 vlan; + uint32_t rss_type:4; + uint32_t pkt_type:8; + uint32_t rdm_err:1; + uint32_t rsvd:6; + uint32_t rx_cntl:2; + uint32_t sph:1; + uint32_t hdr_len:10; + uint32_t rss_hash; + uint16_t dd:1; + uint16_t eop:1; + uint16_t rx_stat:4; + uint16_t rx_estat:6; + uint16_t rsc_cnt:4; + uint16_t pkt_len; + uint16_t next_desp; + uint16_t vlan; } __attribute__((__packed__)) aq_rx_wb_t; typedef volatile struct { - union { - /* HW RX descriptor */ - struct __packed { - u64 buf_addr; - u64 hdr_addr; - } read; - - /* HW RX descriptor writeback */ - aq_rx_wb_t wb; - }; + union { + /* HW RX descriptor */ + struct __packed { + uint64_t buf_addr; + uint64_t hdr_addr; + } read; + + /* HW RX descriptor writeback */ + aq_rx_wb_t wb; + }; } __attribute__((__packed__)) aq_rx_desc_t; /* Hardware tx descriptor */ typedef volatile struct { - u64 buf_addr; - - union { - struct { - u32 type:3; - u32 :1; - u32 len:16; - u32 dd:1; - u32 eop:1; - u32 cmd:8; - u32 :14; - u32 ct_idx:1; - u32 ct_en:1; - u32 pay_len:18; - } __attribute__((__packed__)); - u64 flags; - }; + uint64_t buf_addr; + + union { + struct { + uint32_t type:3; + uint32_t :1; + uint32_t len:16; + uint32_t dd:1; + uint32_t eop:1; + uint32_t cmd:8; + uint32_t :14; + uint32_t ct_idx:1; + uint32_t ct_en:1; + uint32_t pay_len:18; + } __attribute__((__packed__)); + uint64_t flags; + }; } __attribute__((__packed__)) aq_tx_desc_t; enum aq_tx_desc_type { - tx_desc_type_desc = 1, - tx_desc_type_ctx = 2, + tx_desc_type_desc = 1, + tx_desc_type_ctx = 2, }; enum aq_tx_desc_cmd { - tx_desc_cmd_vlan = 1, - tx_desc_cmd_fcs = 2, - tx_desc_cmd_ipv4 = 4, - tx_desc_cmd_l4cs = 8, - tx_desc_cmd_lso = 0x10, - tx_desc_cmd_wb = 0x20, + tx_desc_cmd_vlan = 1, + tx_desc_cmd_fcs = 2, + tx_desc_cmd_ipv4 = 4, + tx_desc_cmd_l4cs = 8, + tx_desc_cmd_lso = 0x10, + tx_desc_cmd_wb = 0x20, }; /* Hardware tx context descriptor */ typedef volatile union { - struct __packed { - u64 flags1; - u64 flags2; - }; - - struct __packed { - u64 :40; - u32 tun_len:8; - u32 out_len:16; - u32 type:3; - u32 idx:1; - u32 vlan_tag:16; - u32 cmd:4; - u32 l2_len:7; - u32 l3_len:9; - u32 l4_len:8; - u32 mss_len:16; - }; + struct __packed { + uint64_t flags1; + uint64_t flags2; + }; + + struct __packed { + uint64_t :40; + uint32_t tun_len:8; + uint32_t out_len:16; + uint32_t type:3; + uint32_t idx:1; + uint32_t vlan_tag:16; + uint32_t cmd:4; + uint32_t l2_len:7; + uint32_t l3_len:9; + uint32_t l4_len:8; + uint32_t mss_len:16; + }; } __attribute__((__packed__)) aq_txc_desc_t; struct aq_ring_stats { - u64 rx_pkts; - u64 rx_bytes; - u64 jumbo_pkts; - u64 rx_err; - u64 irq; - - u64 tx_pkts; - u64 tx_bytes; - u64 tx_drops; - u64 tx_queue_full; + uint64_t rx_pkts; + uint64_t rx_bytes; + uint64_t jumbo_pkts; + uint64_t rx_err; + uint64_t irq; + + uint64_t tx_pkts; + uint64_t tx_bytes; + uint64_t tx_drops; + uint64_t tx_queue_full; }; struct aq_dev; struct aq_ring { - struct aq_dev *dev; - int index; + struct aq_dev *dev; + int index; - struct if_irq irq; - int msix; + struct if_irq irq; + int msix; /* RX */ - qidx_t rx_size; - int rx_max_frame_size; - void *rx_desc_area_ptr; - aq_rx_desc_t *rx_descs; - uint64_t rx_descs_phys; + qidx_t rx_size; + int rx_max_frame_size; + void *rx_desc_area_ptr; + aq_rx_desc_t *rx_descs; + uint64_t rx_descs_phys; /* TX */ - int tx_head, tx_tail; - qidx_t tx_size; - void *tx_desc_area_ptr; - aq_tx_desc_t *tx_descs; - uint64_t tx_descs_phys; + int tx_head, tx_tail; + qidx_t tx_size; + void *tx_desc_area_ptr; + aq_tx_desc_t *tx_descs; + uint64_t tx_descs_phys; - struct aq_ring_stats stats; + struct aq_ring_stats stats; }; int aq_ring_rx_init(struct aq_hw *hw, struct aq_ring *ring); @@ -175,7 +175,7 @@ int aq_ring_tx_stop(struct aq_hw *hw, struct aq_ring *ring); int aq_ring_rx_start(struct aq_hw *hw, struct aq_ring *ring); int aq_ring_rx_stop(struct aq_hw *hw, struct aq_ring *ring); -int aq_ring_tx_tail_update(struct aq_hw *hw, struct aq_ring *ring, u32 tail); +int aq_ring_tx_tail_update(struct aq_hw *hw, struct aq_ring *ring, uint32_t tail); extern struct if_txrx aq_txrx; diff --git a/sys/dev/asmc/asmc.c b/sys/dev/asmc/asmc.c index d99c1d56e67c..5d3b97a065c9 100644 --- a/sys/dev/asmc/asmc.c +++ b/sys/dev/asmc/asmc.c @@ -34,6 +34,8 @@ * Inspired by the Linux applesmc driver. */ +#include "opt_asmc.h" + #include <sys/param.h> #include <sys/bus.h> #include <sys/conf.h> @@ -83,7 +85,7 @@ static void asmc_sms_calibrate(device_t dev); static int asmc_sms_intrfast(void *arg); static void asmc_sms_printintr(device_t dev, uint8_t); static void asmc_sms_task(void *arg, int pending); -#ifdef DEBUG +#ifdef ASMC_DEBUG void asmc_dumpall(device_t); static int asmc_key_dump(device_t, int); #endif @@ -97,6 +99,7 @@ static int asmc_mb_sysctl_fansafespeed(SYSCTL_HANDLER_ARGS); static int asmc_mb_sysctl_fanminspeed(SYSCTL_HANDLER_ARGS); static int asmc_mb_sysctl_fanmaxspeed(SYSCTL_HANDLER_ARGS); static int asmc_mb_sysctl_fantargetspeed(SYSCTL_HANDLER_ARGS); +static int asmc_mb_sysctl_fanmanual(SYSCTL_HANDLER_ARGS); static int asmc_temp_sysctl(SYSCTL_HANDLER_ARGS); static int asmc_mb_sysctl_sms_x(SYSCTL_HANDLER_ARGS); static int asmc_mb_sysctl_sms_y(SYSCTL_HANDLER_ARGS); @@ -514,7 +517,7 @@ static driver_t asmc_driver = { */ #define _COMPONENT ACPI_OEM ACPI_MODULE_NAME("ASMC") -#ifdef DEBUG +#ifdef ASMC_DEBUG #define ASMC_DPRINTF(str) device_printf(dev, str) #else #define ASMC_DPRINTF(str) @@ -656,6 +659,13 @@ asmc_attach(device_t dev) CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, dev, j, model->smc_fan_targetspeed, "I", "Fan target speed in RPM"); + + SYSCTL_ADD_PROC(sysctlctx, + SYSCTL_CHILDREN(sc->sc_fan_tree[i]), + OID_AUTO, "manual", + CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, + dev, j, asmc_mb_sysctl_fanmanual, "I", + "Fan manual mode (0=auto, 1=manual)"); } /* @@ -820,13 +830,19 @@ asmc_resume(device_t dev) return (0); } -#ifdef DEBUG +#ifdef ASMC_DEBUG void asmc_dumpall(device_t dev) { + struct asmc_softc *sc = device_get_softc(dev); int i; - /* XXX magic number */ - for (i=0; i < 0x100; i++) + if (sc->sc_nkeys == 0) { + device_printf(dev, "asmc_dumpall: key count not available\n"); + return; + } + + device_printf(dev, "asmc_dumpall: dumping %d keys\n", sc->sc_nkeys); + for (i = 0; i < sc->sc_nkeys; i++) asmc_key_dump(dev, i); } #endif @@ -914,15 +930,18 @@ nosms: sc->sc_nfan = ASMC_MAXFANS; } - if (bootverbose) { - /* - * The number of keys is a 32 bit buffer - */ - asmc_key_read(dev, ASMC_NKEYS, buf, 4); - device_printf(dev, "number of keys: %d\n", ntohl(*(uint32_t*)buf)); + /* + * Read and cache the number of SMC keys (32 bit buffer) + */ + if (asmc_key_read(dev, ASMC_NKEYS, buf, 4) == 0) { + sc->sc_nkeys = be32dec(buf); + if (bootverbose) + device_printf(dev, "number of keys: %d\n", sc->sc_nkeys); + } else { + sc->sc_nkeys = 0; } -#ifdef DEBUG +#ifdef ASMC_DEBUG asmc_dumpall(dev); #endif @@ -957,19 +976,19 @@ asmc_wait_ack(device_t dev, uint8_t val, int amount) static int asmc_wait(device_t dev, uint8_t val) { -#ifdef DEBUG +#ifdef ASMC_DEBUG struct asmc_softc *sc; #endif if (asmc_wait_ack(dev, val, 1000) == 0) return (0); -#ifdef DEBUG +#ifdef ASMC_DEBUG sc = device_get_softc(dev); #endif val = val & ASMC_STATUS_MASK; -#ifdef DEBUG +#ifdef ASMC_DEBUG device_printf(dev, "%s failed: 0x%x, 0x%x\n", __func__, val, ASMC_CMDPORT_READ(sc)); #endif @@ -992,7 +1011,7 @@ asmc_command(device_t dev, uint8_t command) { } } -#ifdef DEBUG +#ifdef ASMC_DEBUG device_printf(dev, "%s failed: 0x%x, 0x%x\n", __func__, command, ASMC_CMDPORT_READ(sc)); #endif @@ -1038,7 +1057,7 @@ out: return (error); } -#ifdef DEBUG +#ifdef ASMC_DEBUG static int asmc_key_dump(device_t dev, int number) { @@ -1338,6 +1357,53 @@ asmc_mb_sysctl_fantargetspeed(SYSCTL_HANDLER_ARGS) return (error); } +static int +asmc_mb_sysctl_fanmanual(SYSCTL_HANDLER_ARGS) +{ + device_t dev = (device_t) arg1; + int fan = arg2; + int error; + int32_t v; + uint8_t buf[2]; + uint16_t val; + + /* Read current FS! bitmask (asmc_key_read locks internally) */ + error = asmc_key_read(dev, ASMC_KEY_FANMANUAL, buf, sizeof(buf)); + if (error != 0) + return (error); + + /* Extract manual bit for this fan (big-endian) */ + val = (buf[0] << 8) | buf[1]; + v = (val >> fan) & 0x01; + + /* Let sysctl handle the value */ + error = sysctl_handle_int(oidp, &v, 0, req); + + if (error == 0 && req->newptr != NULL) { + /* Validate input (0 = auto, 1 = manual) */ + if (v != 0 && v != 1) + return (EINVAL); + /* Read-modify-write of FS! bitmask */ + error = asmc_key_read(dev, ASMC_KEY_FANMANUAL, buf, sizeof(buf)); + if (error == 0) { + val = (buf[0] << 8) | buf[1]; + + /* Modify single bit */ + if (v) + val |= (1 << fan); /* Set to manual */ + else + val &= ~(1 << fan); /* Set to auto */ + + /* Write back */ + buf[0] = val >> 8; + buf[1] = val & 0xff; + error = asmc_key_write(dev, ASMC_KEY_FANMANUAL, buf, sizeof(buf)); + } + } + + return (error); +} + /* * Temperature functions. */ diff --git a/sys/dev/asmc/asmcvar.h b/sys/dev/asmc/asmcvar.h index d40dc1e7c8ff..b6d8686d9670 100644 --- a/sys/dev/asmc/asmcvar.h +++ b/sys/dev/asmc/asmcvar.h @@ -33,6 +33,7 @@ struct asmc_softc { device_t sc_dev; struct mtx sc_mtx; int sc_nfan; + int sc_nkeys; int16_t sms_rest_x; int16_t sms_rest_y; int16_t sms_rest_z; diff --git a/sys/dev/ata/ata-pci.h b/sys/dev/ata/ata-pci.h index 630d0184c820..5ff3e344c411 100644 --- a/sys/dev/ata/ata-pci.h +++ b/sys/dev/ata/ata-pci.h @@ -430,8 +430,8 @@ struct ata_pci_controller { #define ATA_HT1000_S1 0x024b1166 #define ATA_HT1000_S2 0x024a1166 #define ATA_K2 0x02401166 -#define ATA_FRODO4 0x02411166 -#define ATA_FRODO8 0x02421166 +#define ATA_FRODO8 0x02411166 +#define ATA_FRODO4 0x02421166 #define ATA_SILICON_IMAGE_ID 0x1095 #define ATA_SII3114 0x31141095 diff --git a/sys/dev/bnxt/bnxt_en/bnxt_mgmt.c b/sys/dev/bnxt/bnxt_en/bnxt_mgmt.c index bbc12b96d8c6..98ae9848c42b 100644 --- a/sys/dev/bnxt/bnxt_en/bnxt_mgmt.c +++ b/sys/dev/bnxt/bnxt_en/bnxt_mgmt.c @@ -387,15 +387,18 @@ bnxt_mgmt_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int flag, int ret = 0; switch(cmd) { - case BNXT_MGMT_OPCODE_GET_DEV_INFO: + case IO_BNXT_MGMT_OPCODE_GET_DEV_INFO: + case IOW_BNXT_MGMT_OPCODE_GET_DEV_INFO: ret = bnxt_mgmt_get_dev_info(dev, cmd, data, flag, td); break; - case BNXT_MGMT_OPCODE_PASSTHROUGH_HWRM: + case IO_BNXT_MGMT_OPCODE_PASSTHROUGH_HWRM: + case IOW_BNXT_MGMT_OPCODE_PASSTHROUGH_HWRM: mtx_lock(&mgmt_lock); ret = bnxt_mgmt_process_hwrm(dev, cmd, data, flag, td); mtx_unlock(&mgmt_lock); break; - case BNXT_MGMT_OPCODE_DCB_OPS: + case IO_BNXT_MGMT_OPCODE_DCB_OPS: + case IOW_BNXT_MGMT_OPCODE_DCB_OPS: ret = bnxt_mgmt_process_dcb(dev, cmd, data, flag, td); break; default: diff --git a/sys/dev/bnxt/bnxt_en/bnxt_mgmt.h b/sys/dev/bnxt/bnxt_en/bnxt_mgmt.h index 8489a223adef..5b94184b1646 100644 --- a/sys/dev/bnxt/bnxt_en/bnxt_mgmt.h +++ b/sys/dev/bnxt/bnxt_en/bnxt_mgmt.h @@ -39,9 +39,14 @@ #define DRIVER_NAME "if_bnxt" -#define BNXT_MGMT_OPCODE_GET_DEV_INFO 0x80000000 -#define BNXT_MGMT_OPCODE_PASSTHROUGH_HWRM 0x80000001 -#define BNXT_MGMT_OPCODE_DCB_OPS 0x80000002 + +#define IOW_BNXT_MGMT_OPCODE_GET_DEV_INFO _IOW(0, 0, 0) +#define IOW_BNXT_MGMT_OPCODE_PASSTHROUGH_HWRM _IOW(0, 1, 0) +#define IOW_BNXT_MGMT_OPCODE_DCB_OPS _IOW(0, 2, 0) + +#define IO_BNXT_MGMT_OPCODE_GET_DEV_INFO _IO(0, 0) +#define IO_BNXT_MGMT_OPCODE_PASSTHROUGH_HWRM _IO(0, 1) +#define IO_BNXT_MGMT_OPCODE_DCB_OPS _IO(0, 2) #define BNXT_MGMT_MAX_HWRM_REQ_LENGTH HWRM_MAX_REQ_LEN #define BNXT_MGMT_MAX_HWRM_RESP_LENGTH (512) diff --git a/sys/dev/bnxt/bnxt_en/if_bnxt.c b/sys/dev/bnxt/bnxt_en/if_bnxt.c index 471e26a4b252..fa37d04e0884 100644 --- a/sys/dev/bnxt/bnxt_en/if_bnxt.c +++ b/sys/dev/bnxt/bnxt_en/if_bnxt.c @@ -4295,7 +4295,7 @@ bnxt_i2c_req(if_ctx_t ctx, struct ifi2creq *i2c) return -EOPNOTSUPP; - rc = bnxt_read_sfp_module_eeprom_info(softc, I2C_DEV_ADDR_A0, 0, 0, 0, + rc = bnxt_read_sfp_module_eeprom_info(softc, i2c->dev_addr, 0, 0, 0, i2c->offset, i2c->len, data); return rc; diff --git a/sys/dev/ixl/ixl_txrx.c b/sys/dev/ixl/ixl_txrx.c index f971a3073265..04b8279bdc59 100644 --- a/sys/dev/ixl/ixl_txrx.c +++ b/sys/dev/ixl/ixl_txrx.c @@ -661,7 +661,7 @@ ixl_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) struct ixl_rx_queue *que = &vsi->rx_queues[ri->iri_qsidx]; struct rx_ring *rxr = &que->rxr; union i40e_rx_desc *cur; - u32 status, error; + u32 status, error, fltstat; u16 plen; u64 qword; u8 ptype; @@ -717,8 +717,12 @@ ixl_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) if ((scctx->isc_capenable & IFCAP_RXCSUM) != 0) rxr->csum_errs += ixl_rx_checksum(ri, status, error, ptype); - ri->iri_flowid = le32toh(cur->wb.qword0.hi_dword.rss); - ri->iri_rsstype = ixl_ptype_to_hash(ptype); + fltstat = (status >> I40E_RX_DESC_STATUS_FLTSTAT_SHIFT); + if ((fltstat & I40E_RX_DESC_FLTSTAT_RSS_HASH) == + I40E_RX_DESC_FLTSTAT_RSS_HASH) { + ri->iri_flowid = le32toh(cur->wb.qword0.hi_dword.rss); + ri->iri_rsstype = ixl_ptype_to_hash(ptype); + } if (status & (1 << I40E_RX_DESC_STATUS_L2TAG1P_SHIFT)) { ri->iri_vtag = le16toh(cur->wb.qword0.lo_dword.l2tag1); ri->iri_flags |= M_VLANTAG; diff --git a/sys/dev/mfi/mfi_pci.c b/sys/dev/mfi/mfi_pci.c index 65e8e30bf994..b150138452db 100644 --- a/sys/dev/mfi/mfi_pci.c +++ b/sys/dev/mfi/mfi_pci.c @@ -131,6 +131,7 @@ struct mfi_ident { {0x1000, 0x005b, 0x1028, 0x1f35, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Adapter"}, {0x1000, 0x005b, 0x1028, 0x1f37, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Mini (blades)"}, {0x1000, 0x005b, 0x1028, 0x1f38, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Mini (monolithics)"}, + {0x1000, 0x005b, 0x1734, 0x11d3, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Fujitsu RAID Controller SAS 6Gbit/s 1GB (D3116)"}, {0x1000, 0x005b, 0x8086, 0x9265, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Intel (R) RAID Controller RS25DB080"}, {0x1000, 0x005b, 0x8086, 0x9285, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Intel (R) RAID Controller RS25NB008"}, {0x1000, 0x005b, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "ThunderBolt"}, diff --git a/sys/dev/mpr/mpr.c b/sys/dev/mpr/mpr.c index 262d6b58b705..9bceabe637b5 100644 --- a/sys/dev/mpr/mpr.c +++ b/sys/dev/mpr/mpr.c @@ -30,7 +30,6 @@ * */ -#include <sys/cdefs.h> /* Communications core for Avago Technologies (LSI) MPT3 */ /* TODO Move headers to mprvar */ diff --git a/sys/dev/mpr/mpr_config.c b/sys/dev/mpr/mpr_config.c index b7882feed158..8a36a12a225c 100644 --- a/sys/dev/mpr/mpr_config.c +++ b/sys/dev/mpr/mpr_config.c @@ -28,7 +28,6 @@ * Broadcom Inc. (LSI) MPT-Fusion Host Adapter FreeBSD */ -#include <sys/cdefs.h> /* TODO Move headers to mprvar */ #include <sys/types.h> #include <sys/param.h> diff --git a/sys/dev/mpr/mpr_mapping.c b/sys/dev/mpr/mpr_mapping.c index 38aa4dfc7ef2..a907ebafe2ff 100644 --- a/sys/dev/mpr/mpr_mapping.c +++ b/sys/dev/mpr/mpr_mapping.c @@ -28,7 +28,6 @@ * Broadcom Inc. (LSI) MPT-Fusion Host Adapter FreeBSD */ -#include <sys/cdefs.h> /* TODO Move headers to mprvar */ #include <sys/types.h> #include <sys/param.h> diff --git a/sys/dev/mpr/mpr_pci.c b/sys/dev/mpr/mpr_pci.c index 6b74f7e38811..a04ef7c6fb4d 100644 --- a/sys/dev/mpr/mpr_pci.c +++ b/sys/dev/mpr/mpr_pci.c @@ -24,7 +24,6 @@ * SUCH DAMAGE. */ -#include <sys/cdefs.h> /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT3 controllers */ /* TODO Move headers to mprvar */ diff --git a/sys/dev/mpr/mpr_sas.c b/sys/dev/mpr/mpr_sas.c index 5f3a27a468b0..f0470de3efcf 100644 --- a/sys/dev/mpr/mpr_sas.c +++ b/sys/dev/mpr/mpr_sas.c @@ -30,7 +30,6 @@ * */ -#include <sys/cdefs.h> /* Communications core for Avago Technologies (LSI) MPT3 */ /* TODO Move headers to mprvar */ @@ -86,6 +85,12 @@ #define MPRSAS_DISCOVERY_TIMEOUT 20 #define MPRSAS_MAX_DISCOVERY_TIMEOUTS 10 /* 200 seconds */ +#include <sys/sdt.h> + +/* SDT Probes */ +SDT_PROBE_DEFINE4(cam, , mpr, complete, "union ccb *", + "struct mpr_command *", "u_int", "u32"); + /* * static array to check SCSI OpCode for EEDP protection bits */ @@ -2540,6 +2545,9 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) sc->SSU_refcount--; } + SDT_PROBE4(cam, , mpr, complete, ccb, cm, sassc->flags, + sc->mapping_table[target_id].device_info); + /* Take the fast path to completion */ if (cm->cm_reply == NULL) { if (mprsas_get_ccbstatus(ccb) == CAM_REQ_INPROG) { diff --git a/sys/dev/mpr/mpr_sas_lsi.c b/sys/dev/mpr/mpr_sas_lsi.c index 9ba776e49e7a..6529b38cc5f1 100644 --- a/sys/dev/mpr/mpr_sas_lsi.c +++ b/sys/dev/mpr/mpr_sas_lsi.c @@ -28,7 +28,6 @@ * Broadcom Inc. (LSI) MPT-Fusion Host Adapter FreeBSD */ -#include <sys/cdefs.h> /* Communications core for Avago Technologies (LSI) MPT3 */ /* TODO Move headers to mprvar */ diff --git a/sys/dev/mpr/mpr_table.c b/sys/dev/mpr/mpr_table.c index 910f47bb2937..b47b5259c63d 100644 --- a/sys/dev/mpr/mpr_table.c +++ b/sys/dev/mpr/mpr_table.c @@ -24,7 +24,6 @@ * SUCH DAMAGE. */ -#include <sys/cdefs.h> /* Debugging tables for MPT2 */ /* TODO Move headers to mprvar */ diff --git a/sys/dev/mpr/mpr_user.c b/sys/dev/mpr/mpr_user.c index 5245129ce8c1..826528a3aeaf 100644 --- a/sys/dev/mpr/mpr_user.c +++ b/sys/dev/mpr/mpr_user.c @@ -59,7 +59,6 @@ * Broadcom Inc. (LSI) MPT-Fusion Host Adapter FreeBSD */ -#include <sys/cdefs.h> /* TODO Move headers to mprvar */ #include <sys/types.h> #include <sys/param.h> diff --git a/sys/dev/mps/mps.c b/sys/dev/mps/mps.c index 357eacf28925..cb82045356fc 100644 --- a/sys/dev/mps/mps.c +++ b/sys/dev/mps/mps.c @@ -30,7 +30,6 @@ * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD */ -#include <sys/cdefs.h> /* Communications core for Avago Technologies (LSI) MPT2 */ /* TODO Move headers to mpsvar */ diff --git a/sys/dev/mps/mps_config.c b/sys/dev/mps/mps_config.c index 47f9fe573a2b..cfb96c3e9bee 100644 --- a/sys/dev/mps/mps_config.c +++ b/sys/dev/mps/mps_config.c @@ -29,7 +29,6 @@ * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD */ -#include <sys/cdefs.h> /* TODO Move headers to mpsvar */ #include <sys/types.h> #include <sys/param.h> diff --git a/sys/dev/mps/mps_mapping.c b/sys/dev/mps/mps_mapping.c index 25d17d575970..9e069a3a924d 100644 --- a/sys/dev/mps/mps_mapping.c +++ b/sys/dev/mps/mps_mapping.c @@ -29,7 +29,6 @@ * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD */ -#include <sys/cdefs.h> /* TODO Move headers to mpsvar */ #include <sys/types.h> #include <sys/param.h> diff --git a/sys/dev/mps/mps_pci.c b/sys/dev/mps/mps_pci.c index 7a0c577eb72a..8855c186754a 100644 --- a/sys/dev/mps/mps_pci.c +++ b/sys/dev/mps/mps_pci.c @@ -26,7 +26,6 @@ * SUCH DAMAGE. */ -#include <sys/cdefs.h> /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT2 controllers */ /* TODO Move headers to mpsvar */ diff --git a/sys/dev/mps/mps_sas.c b/sys/dev/mps/mps_sas.c index fa0f817ed67b..fb591391f6a5 100644 --- a/sys/dev/mps/mps_sas.c +++ b/sys/dev/mps/mps_sas.c @@ -30,7 +30,6 @@ * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD */ -#include <sys/cdefs.h> /* Communications core for Avago Technologies (LSI) MPT2 */ /* TODO Move headers to mpsvar */ @@ -81,6 +80,12 @@ #include <dev/mps/mps_table.h> #include <dev/mps/mps_sas.h> +#include <sys/sdt.h> + +/* SDT Probes */ +SDT_PROBE_DEFINE4(cam, , mps, complete, "union ccb *", + "struct mps_command *", "u_int", "u32"); + /* * static array to check SCSI OpCode for EEDP protection bits */ @@ -2077,6 +2082,9 @@ mpssas_scsiio_complete(struct mps_softc *sc, struct mps_command *cm) sc->SSU_refcount--; } + SDT_PROBE4(cam, , mps, complete, ccb, cm, sassc->flags, + sc->mapping_table[target_id].device_info); + /* Take the fast path to completion */ if (cm->cm_reply == NULL) { if (mpssas_get_ccbstatus(ccb) == CAM_REQ_INPROG) { diff --git a/sys/dev/mps/mps_sas_lsi.c b/sys/dev/mps/mps_sas_lsi.c index 42119b5c0a43..c48c8e15d4a4 100644 --- a/sys/dev/mps/mps_sas_lsi.c +++ b/sys/dev/mps/mps_sas_lsi.c @@ -29,7 +29,6 @@ * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD */ -#include <sys/cdefs.h> /* Communications core for Avago Technologies (LSI) MPT2 */ /* TODO Move headers to mpsvar */ diff --git a/sys/dev/mps/mps_table.c b/sys/dev/mps/mps_table.c index f2c6ed9b88c3..e97583ffa3f8 100644 --- a/sys/dev/mps/mps_table.c +++ b/sys/dev/mps/mps_table.c @@ -26,7 +26,6 @@ * SUCH DAMAGE. */ -#include <sys/cdefs.h> /* Debugging tables for MPT2 */ /* TODO Move headers to mpsvar */ diff --git a/sys/dev/mps/mps_user.c b/sys/dev/mps/mps_user.c index 01edcbed2609..619eea6e9c69 100644 --- a/sys/dev/mps/mps_user.c +++ b/sys/dev/mps/mps_user.c @@ -60,7 +60,6 @@ * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD */ -#include <sys/cdefs.h> /* TODO Move headers to mpsvar */ #include <sys/types.h> #include <sys/param.h> diff --git a/sys/dev/nvme/nvme_ctrlr.c b/sys/dev/nvme/nvme_ctrlr.c index 7e1a3f02f326..26194ccbb8f8 100644 --- a/sys/dev/nvme/nvme_ctrlr.c +++ b/sys/dev/nvme/nvme_ctrlr.c @@ -782,6 +782,47 @@ nvme_ctrlr_configure_aer(struct nvme_controller *ctrlr) } static void +nvme_ctrlr_configure_apst(struct nvme_controller *ctrlr) +{ + struct nvme_completion_poll_status status; + uint64_t *data; + int data_size, i, read_size; + bool enable, error = true; + + if (TUNABLE_BOOL_FETCH("hw.nvme.apst_enable", &enable) == 0 || + ctrlr->cdata.apsta == 0) + return; + + data_size = 32 * sizeof(*data); + data = malloc(data_size, M_NVME, M_WAITOK | M_ZERO); + + if (getenv_array("hw.nvme.apst_data", data, data_size, + &read_size, sizeof(*data), GETENV_UNSIGNED) != 0) { + for (i = 0; i < read_size / sizeof(*data); ++i) + data[i] = htole64(data[i]); + } else { + status.done = 0; + nvme_ctrlr_cmd_get_feature(ctrlr, + NVME_FEAT_AUTONOMOUS_POWER_STATE_TRANSITION, 0, + data, data_size, nvme_completion_poll_cb, &status); + nvme_completion_poll(&status); + if (nvme_completion_is_error(&status.cpl)) + goto out; + } + + status.done = 0; + nvme_ctrlr_cmd_set_feature(ctrlr, + NVME_FEAT_AUTONOMOUS_POWER_STATE_TRANSITION, enable, 0, 0, + 0, 0, data, data_size, nvme_completion_poll_cb, &status); + nvme_completion_poll(&status); + error = nvme_completion_is_error(&status.cpl); +out: + if (error && bootverbose) + nvme_printf(ctrlr, "failed to configure APST\n"); + free(data, M_NVME); +} + +static void nvme_ctrlr_configure_int_coalescing(struct nvme_controller *ctrlr) { ctrlr->int_coal_time = 0; @@ -1047,6 +1088,7 @@ nvme_ctrlr_start(void *ctrlr_arg, bool resetting) } nvme_ctrlr_configure_aer(ctrlr); + nvme_ctrlr_configure_apst(ctrlr); nvme_ctrlr_configure_int_coalescing(ctrlr); for (i = 0; i < ctrlr->num_io_queues; i++) diff --git a/sys/dev/nvme/nvme_ctrlr_cmd.c b/sys/dev/nvme/nvme_ctrlr_cmd.c index 5a44ed425acb..1a48a058edd8 100644 --- a/sys/dev/nvme/nvme_ctrlr_cmd.c +++ b/sys/dev/nvme/nvme_ctrlr_cmd.c @@ -171,7 +171,11 @@ nvme_ctrlr_cmd_set_feature(struct nvme_controller *ctrlr, uint8_t feature, struct nvme_request *req; struct nvme_command *cmd; - req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg); + if (payload != NULL) + req = nvme_allocate_request_vaddr(payload, payload_size, + M_WAITOK, cb_fn, cb_arg); + else + req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg); cmd = &req->cmd; cmd->opc = NVME_OPC_SET_FEATURES; @@ -193,7 +197,11 @@ nvme_ctrlr_cmd_get_feature(struct nvme_controller *ctrlr, uint8_t feature, struct nvme_request *req; struct nvme_command *cmd; - req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg); + if (payload != NULL) + req = nvme_allocate_request_vaddr(payload, payload_size, + M_WAITOK, cb_fn, cb_arg); + else + req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg); cmd = &req->cmd; cmd->opc = NVME_OPC_GET_FEATURES; diff --git a/sys/dev/ocs_fc/ocs_ddump.h b/sys/dev/ocs_fc/ocs_ddump.h index b7d7eefad813..3cffff6d9670 100644 --- a/sys/dev/ocs_fc/ocs_ddump.h +++ b/sys/dev/ocs_fc/ocs_ddump.h @@ -46,8 +46,7 @@ extern void ocs_ddump_startfile(ocs_textbuf_t *textbuf); extern void ocs_ddump_endfile(ocs_textbuf_t *textbuf); extern void ocs_ddump_section(ocs_textbuf_t *textbuf, const char *name, uint32_t instance); extern void ocs_ddump_endsection(ocs_textbuf_t *textbuf, const char *name, uint32_t instance); -__attribute__((format(printf,3,4))) -extern void ocs_ddump_value(ocs_textbuf_t *textbuf, const char *name, const char *fmt, ...); +extern void ocs_ddump_value(ocs_textbuf_t *textbuf, const char *name, const char *fmt, ...) __printflike(3, 4); extern void ocs_ddump_buffer(ocs_textbuf_t *textbuf, const char *name, uint32_t instance, void *buffer, uint32_t size); extern int32_t ocs_save_ddump(ocs_t *ocs, uint32_t flags, uint32_t qentries); extern int32_t ocs_get_saved_ddump(ocs_t *ocs, ocs_textbuf_t *textbuf); diff --git a/sys/dev/ocs_fc/ocs_mgmt.h b/sys/dev/ocs_fc/ocs_mgmt.h index 7b59a3916ca8..9781aec18462 100644 --- a/sys/dev/ocs_fc/ocs_mgmt.h +++ b/sys/dev/ocs_fc/ocs_mgmt.h @@ -95,8 +95,7 @@ extern void ocs_mgmt_end_section(ocs_textbuf_t *textbuf, const char *name, int i extern void ocs_mgmt_end_unnumbered_section(ocs_textbuf_t *textbuf, const char *name); extern void ocs_mgmt_emit_property_name(ocs_textbuf_t *textbuf, int access, const char *name); extern void ocs_mgmt_emit_string(ocs_textbuf_t *textbuf, int access, const char *name, const char *value); -__attribute__((format(printf,4,5))) -extern void ocs_mgmt_emit_int(ocs_textbuf_t *textbuf, int access, const char *name, const char *fmt, ...); +extern void ocs_mgmt_emit_int(ocs_textbuf_t *textbuf, int access, const char *name, const char *fmt, ...) __printflike(4, 5); extern void ocs_mgmt_emit_boolean(ocs_textbuf_t *textbuf, int access, const char *name, const int value); extern int parse_wwn(char *wwn_in, uint64_t *wwn_out); diff --git a/sys/dev/ocs_fc/ocs_os.h b/sys/dev/ocs_fc/ocs_os.h index 331d5b07aecd..55ee98b3cc58 100644 --- a/sys/dev/ocs_fc/ocs_os.h +++ b/sys/dev/ocs_fc/ocs_os.h @@ -711,7 +711,7 @@ typedef struct { * @return returns 0 for success, a negative error code value for failure. */ -extern int ocs_sem_init(ocs_sem_t *sem, int val, const char *name, ...) __attribute__((format(printf, 3, 4))); +extern int ocs_sem_init(ocs_sem_t *sem, int val, const char *name, ...) __printflike(3, 4); /** * @brief execute a P (decrement) operation diff --git a/sys/dev/ocs_fc/ocs_utils.h b/sys/dev/ocs_fc/ocs_utils.h index e3a952e0cf26..7c9c9ae85b74 100644 --- a/sys/dev/ocs_fc/ocs_utils.h +++ b/sys/dev/ocs_fc/ocs_utils.h @@ -103,10 +103,8 @@ extern int32_t ocs_textbuf_init(ocs_t *ocs, ocs_textbuf_t *textbuf, void *buffer extern void ocs_textbuf_free(ocs_t *ocs, ocs_textbuf_t *textbuf); extern void ocs_textbuf_putc(ocs_textbuf_t *textbuf, uint8_t c); extern void ocs_textbuf_puts(ocs_textbuf_t *textbuf, char *s); -__attribute__((format(printf,2,3))) -extern void ocs_textbuf_printf(ocs_textbuf_t *textbuf, const char *fmt, ...); -__attribute__((format(printf,2,0))) -extern void ocs_textbuf_vprintf(ocs_textbuf_t *textbuf, const char *fmt, va_list ap); +extern void ocs_textbuf_printf(ocs_textbuf_t *textbuf, const char *fmt, ...) __printflike(2, 3); +extern void ocs_textbuf_vprintf(ocs_textbuf_t *textbuf, const char *fmt, va_list ap) __printflike(2, 0); extern void ocs_textbuf_buffer(ocs_textbuf_t *textbuf, uint8_t *buffer, uint32_t buffer_length); extern void ocs_textbuf_copy(ocs_textbuf_t *textbuf, uint8_t *buffer, uint32_t buffer_length); extern int32_t ocs_textbuf_remaining(ocs_textbuf_t *textbuf); @@ -325,10 +323,8 @@ typedef struct ocs_ramlog_s ocs_ramlog_t; extern ocs_ramlog_t *ocs_ramlog_init(ocs_t *ocs, uint32_t buffer_len, uint32_t buffer_count); extern void ocs_ramlog_free(ocs_t *ocs, ocs_ramlog_t *ramlog); extern void ocs_ramlog_clear(ocs_t *ocs, ocs_ramlog_t *ramlog, int clear_start_of_day, int clear_recent); -__attribute__((format(printf,2,3))) -extern int32_t ocs_ramlog_printf(void *os, const char *fmt, ...); -__attribute__((format(printf,2,0))) -extern int32_t ocs_ramlog_vprintf(ocs_ramlog_t *ramlog, const char *fmt, va_list ap); +extern int32_t ocs_ramlog_printf(void *os, const char *fmt, ...) __printflike(2, 3); +extern int32_t ocs_ramlog_vprintf(ocs_ramlog_t *ramlog, const char *fmt, va_list ap) __printflike(2, 0); extern int32_t ocs_ddump_ramlog(ocs_textbuf_t *textbuf, ocs_ramlog_t *ramlog); #endif diff --git a/sys/dev/qlnx/qlnxe/qlnx_os.c b/sys/dev/qlnx/qlnxe/qlnx_os.c index 9963f472c615..99110e5e2d8f 100644 --- a/sys/dev/qlnx/qlnxe/qlnx_os.c +++ b/sys/dev/qlnx/qlnxe/qlnx_os.c @@ -2539,7 +2539,7 @@ qlnx_hw_set_multi(qlnx_host_t *ha, uint8_t *mta, uint32_t mcnt, break; } - mta += ETHER_HDR_LEN; + mta += ETHER_ADDR_LEN; } return; } @@ -2552,7 +2552,7 @@ qlnx_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int mcnt) if (mcnt == QLNX_MAX_NUM_MULTICAST_ADDRS) return (0); - bcopy(LLADDR(sdl), &mta[mcnt * ETHER_HDR_LEN], ETHER_HDR_LEN); + bcopy(LLADDR(sdl), &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN); return (1); } @@ -2560,7 +2560,7 @@ qlnx_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int mcnt) static int qlnx_set_multi(qlnx_host_t *ha, uint32_t add_multi) { - uint8_t mta[QLNX_MAX_NUM_MULTICAST_ADDRS * ETHER_HDR_LEN]; + uint8_t mta[QLNX_MAX_NUM_MULTICAST_ADDRS * ETHER_ADDR_LEN]; if_t ifp = ha->ifp; u_int mcnt; diff --git a/sys/dev/rge/if_rge.c b/sys/dev/rge/if_rge.c index 41a39f5bfb60..fde8e9df31fe 100644 --- a/sys/dev/rge/if_rge.c +++ b/sys/dev/rge/if_rge.c @@ -415,8 +415,12 @@ rge_attach(device_t dev) // device_printf(dev, "RTL8125B\n"); break; case 0x64900000: - sc->rge_type = MAC_R26; -// device_printf(dev, "RTL8126\n"); + sc->rge_type = MAC_R26_1; +// device_printf(dev, "RTL8126_1\n"); + break; + case 0x64a00000: + sc->rge_type = MAC_R26_2; +// device_printf(dev, "RTL8126_2\n"); break; case 0x68800000: sc->rge_type = MAC_R25D; @@ -1165,7 +1169,7 @@ rge_init_locked(struct rge_softc *sc) val = rge_read_csi(sc, 0x70c) & ~0x3f000000; rge_write_csi(sc, 0x70c, val | 0x27000000); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) { + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) { /* Disable L1 timeout. */ val = rge_read_csi(sc, 0x890) & ~0x00000001; rge_write_csi(sc, 0x890, val); @@ -1184,7 +1188,7 @@ rge_init_locked(struct rge_softc *sc) RGE_MAC_SETBIT(sc, 0xeb58, 0x0001); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) { + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) { RGE_CLRBIT_1(sc, 0xd8, 0x02); if (sc->rge_type == MAC_R27) { RGE_CLRBIT_1(sc, 0x20e4, 0x04); @@ -1199,7 +1203,7 @@ rge_init_locked(struct rge_softc *sc) rge_write_mac_ocp(sc, 0xe614, val | 0x0300); else if (sc->rge_type == MAC_R25B) rge_write_mac_ocp(sc, 0xe614, val | 0x0200); - else if (sc->rge_type == MAC_R26) + else if (RGE_TYPE_R26(sc)) rge_write_mac_ocp(sc, 0xe614, val | 0x0300); else rge_write_mac_ocp(sc, 0xe614, val | 0x0f00); @@ -1252,7 +1256,7 @@ rge_init_locked(struct rge_softc *sc) RGE_MAC_CLRBIT(sc, 0xe080, 0x0002); } - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) RGE_MAC_CLRBIT(sc, 0xea1c, 0x0304); else RGE_MAC_CLRBIT(sc, 0xea1c, 0x0004); @@ -1282,12 +1286,12 @@ rge_init_locked(struct rge_softc *sc) RGE_WRITE_4(sc, RGE_TIMERINT3, 0); num_miti = - (sc->rge_type == MAC_R25B || sc->rge_type == MAC_R26) ? 32 : 64; + (sc->rge_type == MAC_R25B || RGE_TYPE_R26(sc)) ? 32 : 64; /* Clear interrupt moderation timer. */ for (i = 0; i < num_miti; i++) RGE_WRITE_4(sc, RGE_INTMITI(i), 0); - if (sc->rge_type == MAC_R26) { + if (RGE_TYPE_R26(sc)) { RGE_CLRBIT_1(sc, RGE_INT_CFG0, RGE_INT_CFG0_TIMEOUT_BYPASS | RGE_INT_CFG0_RDU_BYPASS_8126 | RGE_INT_CFG0_MITIGATION_BYPASS); @@ -1439,7 +1443,7 @@ rge_ifmedia_upd(if_t ifp) /* Disable Gigabit Lite. */ RGE_PHY_CLRBIT(sc, 0xa428, 0x0200); RGE_PHY_CLRBIT(sc, 0xa5ea, 0x0001); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) RGE_PHY_CLRBIT(sc, 0xa5ea, 0x0007); val = rge_read_phy_ocp(sc, 0xa5d4); @@ -1447,7 +1451,8 @@ rge_ifmedia_upd(if_t ifp) case MAC_R27: val &= ~RGE_ADV_10000TFDX; /* fallthrough */ - case MAC_R26: + case MAC_R26_1: + case MAC_R26_2: val &= ~RGE_ADV_5000TFDX; /* fallthrough */ default: @@ -1461,7 +1466,7 @@ rge_ifmedia_upd(if_t ifp) switch (IFM_SUBTYPE(ifm->ifm_media)) { case IFM_AUTO: val |= RGE_ADV_2500TFDX; - if (sc->rge_type == MAC_R26) + if (RGE_TYPE_R26(sc)) val |= RGE_ADV_5000TFDX; else if (sc->rge_type == MAC_R27) val |= RGE_ADV_5000TFDX | RGE_ADV_10000TFDX; @@ -1543,8 +1548,6 @@ rge_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr) ifmr->ifm_active |= IFM_2500_T; else if (status & RGE_PHYSTAT_5000MBPS) ifmr->ifm_active |= IFM_5000_T; - else if (status & RGE_PHYSTAT_5000MBPS) - ifmr->ifm_active |= IFM_5000_T; else if (status & RGE_PHYSTAT_10000MBPS) ifmr->ifm_active |= IFM_10G_T; } @@ -2453,7 +2456,7 @@ rge_add_media_types(struct rge_softc *sc) ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_2500_T, 0, NULL); ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_2500_T | IFM_FDX, 0, NULL); - if (sc->rge_type == MAC_R26) { + if (RGE_TYPE_R26(sc)) { ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_5000_T, 0, NULL); ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_5000_T | IFM_FDX, 0, NULL); diff --git a/sys/dev/rge/if_rge_hw.c b/sys/dev/rge/if_rge_hw.c index 17edad950f72..ccd6580b2cfc 100644 --- a/sys/dev/rge/if_rge_hw.c +++ b/sys/dev/rge/if_rge_hw.c @@ -67,13 +67,15 @@ static int rge_reset(struct rge_softc *sc); static void rge_set_phy_power(struct rge_softc *sc, int on); -static uint64_t rge_mcu_get_bin_version(uint16_t entries); +static void rge_mac_config_ext_mcu(struct rge_softc *, enum rge_mac_type); +static uint64_t rge_mcu_get_bin_version(const uint16_t *, uint16_t); static void rge_mcu_set_version(struct rge_softc *sc, uint64_t mcodever); static void rge_ephy_config_mac_r25(struct rge_softc *sc); static void rge_ephy_config_mac_r25b(struct rge_softc *sc); static void rge_ephy_config_mac_r27(struct rge_softc *sc); static void rge_phy_config_mac_r27(struct rge_softc *sc); -static void rge_phy_config_mac_r26(struct rge_softc *sc); +static void rge_phy_config_mac_r26_1(struct rge_softc *sc); +static void rge_phy_config_mac_r26_2(struct rge_softc *sc); static void rge_phy_config_mac_r25(struct rge_softc *sc); static void rge_phy_config_mac_r25b(struct rge_softc *sc); static void rge_phy_config_mac_r25d(struct rge_softc *sc); @@ -104,18 +106,7 @@ rge_reset(struct rge_softc *sc) RGE_SETBIT_1(sc, RGE_PPSW, 0x08); RGE_SETBIT_1(sc, RGE_CMD, RGE_CMD_STOPREQ); - if (sc->rge_type == MAC_R25) { - for (i = 0; i < 20; i++) { - DELAY(10); - if (!(RGE_READ_1(sc, RGE_CMD) & RGE_CMD_STOPREQ)) - break; - } - if (i == 20) { - RGE_PRINT_ERROR(sc, "failed to stop all requests\n"); - return ETIMEDOUT; - } - } else - DELAY(200); + DELAY(200); for (i = 0; i < 3000; i++) { DELAY(50); @@ -197,7 +188,6 @@ rge_set_phy_power(struct rge_softc *sc, int on) void rge_mac_config_mcu(struct rge_softc *sc, enum rge_mac_type type) { - uint64_t mcodever; uint16_t reg; int i, npages; @@ -278,19 +268,82 @@ rge_mac_config_mcu(struct rge_softc *sc, enum rge_mac_type type) rge_write_mac_ocp(sc, 0xfc26, 0x8000); rge_write_mac_ocp(sc, 0xfc28, 0x14a2); rge_write_mac_ocp(sc, 0xfc48, 0x0001); + } +} + +void +rge_mac_config_ext_mcu(struct rge_softc *sc, enum rge_mac_type type) +{ + const struct rge_mac_bps *bps; + uint64_t mcodever = 0; + int i; + + /* Read microcode version. */ + rge_switch_mcu_ram_page(sc, 2); + sc->rge_mcodever = 0; + for (i = 0; i < 8; i += 2) { + sc->rge_mcodever <<= 16; + sc->rge_mcodever |= rge_read_mac_ocp(sc, 0xf9f8 + i); + } + rge_switch_mcu_ram_page(sc, 0); + + if (type == MAC_R26_1) { + bps = &rtl8126_1_mac_bps; + mcodever = + rge_mcu_get_bin_version(rtl8126_1_mac_bps_vals, bps->count); + if (sc->rge_mcodever != mcodever) { + /* Switch to page 0. */ + rge_switch_mcu_ram_page(sc, 0); + for (i = 0; i < bps->count; i++) + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); + } + rge_write_mac_ocp(sc, 0xfc26, 0x8000); + rge_write_mac_ocp(sc, 0xfc2c, 0x2360); + rge_write_mac_ocp(sc, 0xfc2E, 0x14a4); + rge_write_mac_ocp(sc, 0xfc30, 0x415e); + rge_write_mac_ocp(sc, 0xfc32, 0x41e4); + rge_write_mac_ocp(sc, 0xfc34, 0x4280); + rge_write_mac_ocp(sc, 0xfc36, 0x234a); + rge_write_mac_ocp(sc, 0xfc48, 0x00fc); + } else if (type == MAC_R26_2) { + bps = &rtl8126_2_mac_bps; + mcodever = + rge_mcu_get_bin_version(rtl8126_2_mac_bps_vals, bps->count); + if (sc->rge_mcodever != mcodever) { + /* Switch to page 0. */ + rge_switch_mcu_ram_page(sc, 0); + for (i = 0; i < 256; i++) + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); + /* Switch to page 1. */ + rge_switch_mcu_ram_page(sc, 1); + for (; i < bps->count; i++) + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); + } + rge_write_mac_ocp(sc, 0xfc26, 0x8000); + rge_write_mac_ocp(sc, 0xfc2c, 0x14a4); + rge_write_mac_ocp(sc, 0xfc2e, 0x4176); + rge_write_mac_ocp(sc, 0xfc30, 0x41fc); + rge_write_mac_ocp(sc, 0xfc32, 0x4298); + rge_write_mac_ocp(sc, 0xfc3a, 0x234a); + rge_write_mac_ocp(sc, 0xfc48, 0x023c); } else if (type == MAC_R27) { - mcodever = rge_mcu_get_bin_version(nitems(rtl8127_mac_bps)); + bps = &rtl8127_mac_bps; + mcodever = + rge_mcu_get_bin_version(rtl8127_mac_bps_vals, bps->count); if (sc->rge_mcodever != mcodever) { /* Switch to page 0. */ rge_switch_mcu_ram_page(sc, 0); for (i = 0; i < 256; i++) - rge_write_mac_ocp(sc, rtl8127_mac_bps[i].reg, - rtl8127_mac_bps[i].val); + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); /* Switch to page 1. */ rge_switch_mcu_ram_page(sc, 1); - for (; i < nitems(rtl8127_mac_bps); i++) - rge_write_mac_ocp(sc, rtl8127_mac_bps[i].reg, - rtl8127_mac_bps[i].val); + for (; i < bps->count; i++) + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); } rge_write_mac_ocp(sc, 0xfc26, 0x8000); rge_write_mac_ocp(sc, 0xfc28, 0x1520); @@ -302,21 +355,21 @@ rge_mac_config_mcu(struct rge_softc *sc, enum rge_mac_type type) rge_write_mac_ocp(sc, 0xfc34, 0x1a6a); rge_write_mac_ocp(sc, 0xfc36, 0x1a2c); rge_write_mac_ocp(sc, 0xfc48, 0x00ff); - - /* Write microcode version. */ - rge_mcu_set_version(sc, mcodever); } -} + + /* Write microcode version. */ + rge_mcu_set_version(sc, mcodever); +}; static uint64_t -rge_mcu_get_bin_version(uint16_t entries) +rge_mcu_get_bin_version(const uint16_t *mac_bps, uint16_t entries) { uint64_t binver = 0; int i; for (i = 0; i < 4; i++) { binver <<= 16; - binver |= rtl8127_mac_bps[entries - 4 + i].val; + binver |= mac_bps[entries - 4 + i]; } return binver; @@ -423,7 +476,8 @@ rge_phy_config(struct rge_softc *sc) case MAC_R27: val |= RGE_ADV_10000TFDX; /* fallthrough */ - case MAC_R26: + case MAC_R26_1: + case MAC_R26_2: val |= RGE_ADV_5000TFDX; /* fallthrough */ default: @@ -457,8 +511,11 @@ rge_phy_config(struct rge_softc *sc) case MAC_R25D: rge_phy_config_mac_r25d(sc); break; - case MAC_R26: - rge_phy_config_mac_r26(sc); + case MAC_R26_1: + rge_phy_config_mac_r26_1(sc); + break; + case MAC_R26_2: + rge_phy_config_mac_r26_2(sc); break; case MAC_R27: rge_phy_config_mac_r27(sc); @@ -479,7 +536,7 @@ rge_phy_config(struct rge_softc *sc) RGE_PHY_CLRBIT(sc, 0xa5d0, (sc->rge_type == MAC_R27) ? 0x000e : 0x0006); RGE_PHY_CLRBIT(sc, 0xa6d4, 0x0001); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) RGE_PHY_CLRBIT(sc, 0xa6d4, 0x0002); RGE_PHY_CLRBIT(sc, 0xa6d8, 0x0010); RGE_PHY_CLRBIT(sc, 0xa428, 0x0080); @@ -764,7 +821,7 @@ rge_phy_config_mac_r27(struct rge_softc *sc) } static void -rge_phy_config_mac_r26(struct rge_softc *sc) +rge_phy_config_mac_r26_1(struct rge_softc *sc) { uint16_t val; int i; @@ -781,7 +838,7 @@ rge_phy_config_mac_r26(struct rge_softc *sc) 0x0054, 0x0322, 0x00dd, 0x03ab, 0x03dc, 0x0027, 0x000e, 0x03e5, 0x03f9, 0x0012, 0x0001, 0x03f1 }; - rge_phy_config_mcu(sc, RGE_MAC_R26_RCODE_VER); + rge_phy_config_mcu(sc, RGE_MAC_R26_1_RCODE_VER); RGE_PHY_SETBIT(sc, 0xa442, 0x0800); rge_write_phy_ocp(sc, 0xa436, 0x80bf); @@ -1044,6 +1101,147 @@ rge_phy_config_mac_r26(struct rge_softc *sc) } static void +rge_phy_config_mac_r26_2(struct rge_softc *sc) +{ + uint16_t val; + int i; + static const uint16_t mac_cfg3_b87e_value[] = + { 0x03ed, 0x03ff, 0x0009, 0x03fe, 0x000b, 0x0021, 0x03f7, + 0x03b8, 0x03e0, 0x0049, 0x0049, 0x03e0, 0x03b8, 0x03f7, + 0x0021, 0x000b, 0x03fe, 0x0009, 0x03ff, 0x03ed, 0x82a0, + 0x000e, 0x03fe, 0x03ed, 0x0006, 0x001a, 0x03f1, 0x03d8, + 0x0023, 0x0054, 0x0322, 0x00dd, 0x03ab, 0x03dc, 0x0027, + 0x000e, 0x03e5, 0x03f9, 0x0012, 0x0001, 0x03f1 }; + + rge_phy_config_mcu(sc, RGE_MAC_R26_2_RCODE_VER); + + RGE_PHY_SETBIT(sc, 0xa442, 0x0800); + rge_write_phy_ocp(sc, 0xa436, 0x8183); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x5900); + RGE_PHY_SETBIT(sc, 0xa654, 0x0800); + RGE_PHY_SETBIT(sc, 0xb648, 0x4000); + RGE_PHY_SETBIT(sc, 0xad2c, 0x8000); + RGE_PHY_SETBIT(sc, 0xad94, 0x0020); + RGE_PHY_SETBIT(sc, 0xada0, 0x0002); + val = rge_read_phy_ocp(sc, 0xae06) & ~0xfc00; + rge_write_phy_ocp(sc, 0xae06, val | 0x7c00); + rge_write_phy_ocp(sc, 0xb87c, 0x8647); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0xe600); + rge_write_phy_ocp(sc, 0xb87c, 0x8036); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x3000); + rge_write_phy_ocp(sc, 0xb87c, 0x8078); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x3000); + rge_write_phy_ocp(sc, 0xb87c, 0x89e9); + RGE_PHY_SETBIT(sc, 0xb87e, 0xff00); + rge_write_phy_ocp(sc, 0xb87c, 0x8ffd); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8ffe); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0200); + rge_write_phy_ocp(sc, 0xb87c, 0x8fff); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0400); + rge_write_phy_ocp(sc, 0xa436, 0x8018); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x7700); + rge_write_phy_ocp(sc, 0xa436, 0x8f9c); + rge_write_phy_ocp(sc, 0xa438, 0x0005); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + rge_write_phy_ocp(sc, 0xa438, 0x00ed); + rge_write_phy_ocp(sc, 0xa438, 0x0502); + rge_write_phy_ocp(sc, 0xa438, 0x0b00); + rge_write_phy_ocp(sc, 0xa438, 0xd401); + rge_write_phy_ocp(sc, 0xa436, 0x8fa8); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x2900); + rge_write_phy_ocp(sc, 0xb87c, 0x814b); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x1100); + rge_write_phy_ocp(sc, 0xb87c, 0x814d); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x1100); + rge_write_phy_ocp(sc, 0xb87c, 0x814f); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0b00); + rge_write_phy_ocp(sc, 0xb87c, 0x8142); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8144); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8150); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8118); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0700); + rge_write_phy_ocp(sc, 0xb87c, 0x811a); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0700); + rge_write_phy_ocp(sc, 0xb87c, 0x811c); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0500); + rge_write_phy_ocp(sc, 0xb87c, 0x810f); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8111); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x811d); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + RGE_PHY_SETBIT(sc, 0xad1c, 0x0100); + val = rge_read_phy_ocp(sc, 0xade8) & ~0xffc0; + rge_write_phy_ocp(sc, 0xade8, val | 0x1400); + rge_write_phy_ocp(sc, 0xb87c, 0x864b); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x9d00); + rge_write_phy_ocp(sc, 0xb87c, 0x862c); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x1200); + rge_write_phy_ocp(sc, 0xa436, 0x8566); + rge_write_phy_ocp(sc, 0xa438, 0x003f); + rge_write_phy_ocp(sc, 0xa438, 0x3f02); + rge_write_phy_ocp(sc, 0xa438, 0x023c); + rge_write_phy_ocp(sc, 0xa438, 0x3b0a); + rge_write_phy_ocp(sc, 0xa438, 0x1c00); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + RGE_PHY_SETBIT(sc, 0xad9c, 0x0020); + rge_write_phy_ocp(sc, 0xb87c, 0x8122); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0c00); + rge_write_phy_ocp(sc, 0xb87c, 0x82c8); + for (i = 0; i < 20; i++) + rge_write_phy_ocp(sc, 0xb87e, mac_cfg3_b87e_value[i]); + rge_write_phy_ocp(sc, 0xb87c, 0x80ef); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0c00); + for (; i < nitems(mac_cfg3_b87e_value); i++) + rge_write_phy_ocp(sc, 0xb87e, mac_cfg3_b87e_value[i]); + RGE_PHY_SETBIT(sc, 0xa430, 0x0003); + val = rge_read_phy_ocp(sc, 0xb54c) & ~0xffc0; + rge_write_phy_ocp(sc, 0xb54c, val | 0x3700); + RGE_PHY_SETBIT(sc, 0xb648, 0x0040); + rge_write_phy_ocp(sc, 0xb87c, 0x8082); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x5d00); + rge_write_phy_ocp(sc, 0xb87c, 0x807c); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x5000); + rge_write_phy_ocp(sc, 0xb87c, 0x809d); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x5000); +} + +static void rge_phy_config_mac_r25(struct rge_softc *sc) { uint16_t val; @@ -1404,10 +1602,20 @@ rge_phy_config_mcu(struct rge_softc *sc, uint16_t rcodever) for (; i < nitems(mac_r25d_mcu); i++) rge_write_phy_ocp(sc, mac_r25d_mcu[i].reg, mac_r25d_mcu[i].val); - } else if (sc->rge_type == MAC_R26) { - for (i = 0; i < nitems(mac_r26_mcu); i++) + } else if (sc->rge_type == MAC_R26_1) { + for (i = 0; i < 6989; i++) + rge_write_phy_ocp(sc, + mac_r26_1_mcu[i].reg, mac_r26_1_mcu[i].val); + rge_patch_phy_mcu(sc, 0); + + rge_patch_phy_mcu(sc, 1); + for (; i < nitems(mac_r26_1_mcu); i++) rge_write_phy_ocp(sc, - mac_r26_mcu[i].reg, mac_r26_mcu[i].val); + mac_r26_1_mcu[i].reg, mac_r26_1_mcu[i].val); + } else if (sc->rge_type == MAC_R26_2) { + for (i = 0; i < nitems(mac_r26_2_mcu); i++) + rge_write_phy_ocp(sc, + mac_r26_2_mcu[i].reg, mac_r26_2_mcu[i].val); } else if (sc->rge_type == MAC_R27) { for (i = 0; i < 1887; i++) rge_write_phy_ocp(sc, @@ -1472,7 +1680,6 @@ static void rge_hw_init(struct rge_softc *sc) { uint16_t reg; - int i; RGE_ASSERT_LOCKED(sc); @@ -1490,16 +1697,10 @@ rge_hw_init(struct rge_softc *sc) DELAY(3000); rge_write_mac_ocp(sc, 0xfc26, 0); - /* Read microcode version. */ - rge_switch_mcu_ram_page(sc, 2); - sc->rge_mcodever = 0; - for (i = 0; i < 8; i += 2) { - sc->rge_mcodever <<= 16; - sc->rge_mcodever |= rge_read_mac_ocp(sc, 0xf9f8 + i); - } - rge_switch_mcu_ram_page(sc, 0); - - rge_mac_config_mcu(sc, sc->rge_type); + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) + rge_mac_config_ext_mcu(sc, sc->rge_type); + else + rge_mac_config_mcu(sc, sc->rge_type); /* Disable PHY power saving. */ if (sc->rge_type == MAC_R25) @@ -1588,7 +1789,7 @@ rge_disable_aspm_clkreq(struct rge_softc *sc) if (unlock) RGE_SETBIT_1(sc, RGE_EECMD, RGE_EECMD_WRITECFG); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) RGE_CLRBIT_1(sc, RGE_INT_CFG0, 0x08); else RGE_CLRBIT_1(sc, RGE_CFG2, RGE_CFG2_CLKREQ_EN); diff --git a/sys/dev/rge/if_rge_microcode.h b/sys/dev/rge/if_rge_microcode.h index e81dc8b96a35..f2803b869e3f 100644 --- a/sys/dev/rge/if_rge_microcode.h +++ b/sys/dev/rge/if_rge_microcode.h @@ -166,114 +166,298 @@ static const struct rge_hw_regaddr_array rtl8125b_mac_bps[] = { { 0xfc30, 0x4a20 }, { 0xfc32, 0x47a0 }, { 0xfc48, 0x003f } }; -static const struct rge_hw_regaddr_array rtl8127_mac_bps[] = { - { 0xf800, 0xe010 }, { 0xf802, 0xe023 }, { 0xf804, 0xe036 }, - { 0xf806, 0xe049 }, { 0xf808, 0xe05c }, { 0xf80a, 0xe075 }, - { 0xf80c, 0xe0b1 }, { 0xf80e, 0xe117 }, { 0xf810, 0xe11b }, - { 0xf812, 0xe11d }, { 0xf814, 0xe11f }, { 0xf816, 0xe121 }, - { 0xf818, 0xe123 }, { 0xf81a, 0xe125 }, { 0xf81c, 0xe127 }, - { 0xf81e, 0xe129 }, { 0xf820, 0x7020 }, { 0xf822, 0xb405 }, - { 0xf824, 0xb404 }, { 0xf826, 0xc50f }, { 0xf828, 0x74a0 }, - { 0xf82a, 0xc50e }, { 0xf82c, 0x4025 }, { 0xf82e, 0xf005 }, - { 0xf830, 0x4850 }, { 0xf832, 0x4025 }, { 0xf834, 0xf002 }, - { 0xf836, 0xe002 }, { 0xf838, 0x4809 }, { 0xf83a, 0xb004 }, - { 0xf83c, 0xb005 }, { 0xf83e, 0xc502 }, { 0xf840, 0xbd00 }, - { 0xf842, 0x1522 }, { 0xf844, 0xd006 }, { 0xf846, 0x0004 }, - { 0xf848, 0x7760 }, { 0xf84a, 0xb405 }, { 0xf84c, 0xb404 }, - { 0xf84e, 0xc50f }, { 0xf850, 0x74a0 }, { 0xf852, 0xc50e }, - { 0xf854, 0x4025 }, { 0xf856, 0xf005 }, { 0xf858, 0x4850 }, - { 0xf85a, 0x4025 }, { 0xf85c, 0xf002 }, { 0xf85e, 0xe002 }, - { 0xf860, 0x4879 }, { 0xf862, 0xb004 }, { 0xf864, 0xb005 }, - { 0xf866, 0xc002 }, { 0xf868, 0xb800 }, { 0xf86a, 0x41e2 }, - { 0xf86c, 0xd006 }, { 0xf86e, 0x0004 }, { 0xf870, 0x7160 }, - { 0xf872, 0xb405 }, { 0xf874, 0xb404 }, { 0xf876, 0xc50f }, - { 0xf878, 0x74a0 }, { 0xf87a, 0xc50e }, { 0xf87c, 0x4025 }, - { 0xf87e, 0xf005 }, { 0xf880, 0x4850 }, { 0xf882, 0x4025 }, - { 0xf884, 0xf002 }, { 0xf886, 0xe002 }, { 0xf888, 0x4819 }, - { 0xf88a, 0xb004 }, { 0xf88c, 0xb005 }, { 0xf88e, 0xc302 }, - { 0xf890, 0xbb00 }, { 0xf892, 0x508e }, { 0xf894, 0xd006 }, - { 0xf896, 0x0004 }, { 0xf898, 0x7720 }, { 0xf89a, 0xb405 }, - { 0xf89c, 0xb404 }, { 0xf89e, 0xc50f }, { 0xf8a0, 0x74a0 }, - { 0xf8a2, 0xc50e }, { 0xf8a4, 0x4025 }, { 0xf8a6, 0xf005 }, - { 0xf8a8, 0x4850 }, { 0xf8aa, 0x4025 }, { 0xf8ac, 0xf002 }, - { 0xf8ae, 0xe002 }, { 0xf8b0, 0x4879 }, { 0xf8b2, 0xb004 }, - { 0xf8b4, 0xb005 }, { 0xf8b6, 0xc102 }, { 0xf8b8, 0xb900 }, - { 0xf8ba, 0x50f8 }, { 0xf8bc, 0xd006 }, { 0xf8be, 0x0004 }, - { 0xf8c0, 0x61a9 }, { 0xf8c2, 0xb403 }, { 0xf8c4, 0xb404 }, - { 0xf8c6, 0xc313 }, { 0xf8c8, 0x7460 }, { 0xf8ca, 0xc312 }, - { 0xf8cc, 0x4023 }, { 0xf8ce, 0xf005 }, { 0xf8d0, 0x4830 }, - { 0xf8d2, 0x4023 }, { 0xf8d4, 0xf002 }, { 0xf8d6, 0xe003 }, - { 0xf8d8, 0x4997 }, { 0xf8da, 0xf003 }, { 0xf8dc, 0xc00a }, - { 0xf8de, 0xe002 }, { 0xf8e0, 0xc009 }, { 0xf8e2, 0xb004 }, - { 0xf8e4, 0xb003 }, { 0xf8e6, 0xc102 }, { 0xf8e8, 0xb900 }, - { 0xf8ea, 0x34fc }, { 0xf8ec, 0xd006 }, { 0xf8ee, 0x0004 }, - { 0xf8f0, 0x02af }, { 0xf8f2, 0x041f }, { 0xf8f4, 0xb407 }, - { 0xf8f6, 0xb406 }, { 0xf8f8, 0xb405 }, { 0xf8fa, 0xb404 }, - { 0xf8fc, 0xb403 }, { 0xf8fe, 0xb402 }, { 0xf900, 0xb401 }, - { 0xf902, 0xb400 }, { 0xf904, 0x49d2 }, { 0xf906, 0xf116 }, - { 0xf908, 0xc62f }, { 0xf90a, 0x77c0 }, { 0xf90c, 0x49f9 }, - { 0xf90e, 0xf020 }, { 0xf910, 0x49fa }, { 0xf912, 0xf11e }, - { 0xf914, 0x49f2 }, { 0xf916, 0xf102 }, { 0xf918, 0xe01b }, - { 0xf91a, 0x48f2 }, { 0xf91c, 0x9fc0 }, { 0xf91e, 0xc625 }, - { 0xf920, 0x75c2 }, { 0xf922, 0x4852 }, { 0xf924, 0x9dc2 }, - { 0xf926, 0xc122 }, { 0xf928, 0x7020 }, { 0xf92a, 0x4801 }, - { 0xf92c, 0x4802 }, { 0xf92e, 0x9820 }, { 0xf930, 0xe00f }, - { 0xf932, 0xc61a }, { 0xf934, 0x77c0 }, { 0xf936, 0x49f2 }, - { 0xf938, 0xf10b }, { 0xf93a, 0xc618 }, { 0xf93c, 0x77c0 }, - { 0xf93e, 0x49f2 }, { 0xf940, 0xf007 }, { 0xf942, 0x48f2 }, - { 0xf944, 0x9fc0 }, { 0xf946, 0xc611 }, { 0xf948, 0x75c2 }, - { 0xf94a, 0x48d2 }, { 0xf94c, 0x9dc2 }, { 0xf94e, 0xb000 }, - { 0xf950, 0xb001 }, { 0xf952, 0xb002 }, { 0xf954, 0xb003 }, - { 0xf956, 0xb004 }, { 0xf958, 0xb005 }, { 0xf95a, 0xb006 }, - { 0xf95c, 0xb007 }, { 0xf95e, 0x9d6c }, { 0xf960, 0xc502 }, - { 0xf962, 0xbd00 }, { 0xf964, 0x0168 }, { 0xf966, 0xe024 }, - { 0xf968, 0xc010 }, { 0xf96a, 0xd410 }, { 0xf96c, 0xd460 }, - { 0xf96e, 0xb407 }, { 0xf970, 0xb406 }, { 0xf972, 0xb405 }, - { 0xf974, 0xb404 }, { 0xf976, 0xb403 }, { 0xf978, 0xb402 }, - { 0xf97a, 0xb401 }, { 0xf97c, 0xb400 }, { 0xf97e, 0xc152 }, - { 0xf980, 0x7020 }, { 0xf982, 0x4981 }, { 0xf984, 0xf043 }, - { 0xf986, 0xc050 }, { 0xf988, 0x7100 }, { 0xf98a, 0xb401 }, - { 0xf98c, 0xc14c }, { 0xf98e, 0x489e }, { 0xf990, 0x481d }, - { 0xf992, 0x9900 }, { 0xf994, 0xc24a }, { 0xf996, 0x7340 }, - { 0xf998, 0x49b7 }, { 0xf99a, 0xf135 }, { 0xf99c, 0xc144 }, - { 0xf99e, 0x9900 }, { 0xf9a0, 0xc245 }, { 0xf9a2, 0x7340 }, - { 0xf9a4, 0xc447 }, { 0xf9a6, 0x401c }, { 0xf9a8, 0xf109 }, - { 0xf9aa, 0x734c }, { 0xf9ac, 0x1301 }, { 0xf9ae, 0xf12b }, - { 0xf9b0, 0xc343 }, { 0xf9b2, 0x9b40 }, { 0xf9b4, 0xc33e }, - { 0xf9b6, 0x9b40 }, { 0xf9b8, 0xe022 }, { 0xf9ba, 0xc63a }, - { 0xf9bc, 0x77c0 }, { 0xf9be, 0x48f4 }, { 0xf9c0, 0x48f5 }, - { 0xf9c2, 0x48f9 }, { 0xf9c4, 0x48fa }, { 0xf9c6, 0x9fc0 }, - { 0xf9c8, 0xc231 }, { 0xf9ca, 0x7344 }, { 0xf9cc, 0x48b4 }, - { 0xf9ce, 0x9b44 }, { 0xf9d0, 0xc22e }, { 0xf9d2, 0x7340 }, - { 0xf9d4, 0x4830 }, { 0xf9d6, 0x48b1 }, { 0xf9d8, 0x4832 }, - { 0xf9da, 0x483c }, { 0xf9dc, 0x48bd }, { 0xf9de, 0x48be }, - { 0xf9e0, 0x48bf }, { 0xf9e2, 0x9b40 }, { 0xf9e4, 0xc223 }, - { 0xf9e6, 0xc32a }, { 0xf9e8, 0x9b48 }, { 0xf9ea, 0xc327 }, - { 0xf9ec, 0x9b46 }, { 0xf9ee, 0xc324 }, { 0xf9f0, 0x9b40 }, - { 0xf9f2, 0xc321 }, { 0xf9f4, 0x9b42 }, { 0xf9f6, 0xc31e }, - { 0xf9f8, 0x9b40 }, { 0xf9fa, 0xe005 }, { 0xf9fc, 0xc113 }, - { 0xf9fe, 0x7020 }, { 0xf800, 0x4881 }, { 0xf802, 0x9820 }, - { 0xf804, 0xb001 }, { 0xf806, 0xc010 }, { 0xf808, 0x9900 }, - { 0xf80a, 0xb000 }, { 0xf80c, 0xb001 }, { 0xf80e, 0xb002 }, - { 0xf810, 0xb003 }, { 0xf812, 0xb004 }, { 0xf814, 0xb005 }, - { 0xf816, 0xb006 }, { 0xf818, 0xb007 }, { 0xf81a, 0x2125 }, - { 0xf81c, 0xc102 }, { 0xf81e, 0xb900 }, { 0xf820, 0x1a6c }, - { 0xf822, 0xd410 }, { 0xf824, 0xc000 }, { 0xf826, 0xe86c }, - { 0xf828, 0xb600 }, { 0xf82a, 0xb800 }, { 0xf82c, 0xb40a }, - { 0xf82e, 0xe024 }, { 0xf830, 0x5a00 }, { 0xf832, 0x5a81 }, - { 0xf834, 0x0073 }, { 0xf836, 0x5a80 }, { 0xf838, 0x0042 }, - { 0xf83a, 0x0001 }, { 0xf83c, 0xc104 }, { 0xf83e, 0xc202 }, - { 0xf840, 0xba00 }, { 0xf842, 0x1a2e }, { 0xf844, 0xc896 }, - { 0xf846, 0xc302 }, { 0xf848, 0xbb00 }, { 0xf84a, 0x0000 }, - { 0xf84c, 0xc002 }, { 0xf84e, 0xb800 }, { 0xf850, 0x0000 }, - { 0xf852, 0xc002 }, { 0xf854, 0xb800 }, { 0xf856, 0x0000 }, - { 0xf858, 0xc502 }, { 0xf85a, 0xbd00 }, { 0xf85c, 0x0000 }, - { 0xf85e, 0xc102 }, { 0xf860, 0xb900 }, { 0xf862, 0x0000 }, - { 0xf864, 0xc102 }, { 0xf866, 0xb900 }, { 0xf868, 0x0000 }, - { 0xf86a, 0xc602 }, { 0xf86c, 0xbe00 }, { 0xf86e, 0x0000 }, - { 0xf870, 0xc602 }, { 0xf872, 0xbe00 }, { 0xf874, 0x0000 }, - { 0xf876, 0x6961 }, { 0xf878, 0x0019 }, { 0xf87a, 0x050c }, - { 0xf87c, 0x140c } +struct rge_mac_bps { + int count; + const uint16_t *regs; + const uint16_t *vals; +}; + +static const uint16_t rtl8126_1_mac_bps_regs[] = { + 0xf800, 0xf802, 0xf804, 0xf806, 0xf808, 0xf80a, 0xf80c, + 0xf80e, 0xf810, 0xf812, 0xf814, 0xf816, 0xf818, 0xf81a, + 0xf81c, 0xf81e, 0xf820, 0xf822, 0xf824, 0xf826, 0xf828, + 0xf82a, 0xf82c, 0xf82e, 0xf830, 0xf832, 0xf834, 0xf836, + 0xf838, 0xf83a, 0xf83c, 0xf83e, 0xf840, 0xf842, 0xf844, + 0xf846, 0xf848, 0xf84a, 0xf84c, 0xf84e, 0xf850, 0xf852, + 0xf854, 0xf856, 0xf858, 0xf85a, 0xf85c, 0xf85e, 0xf860, + 0xf862, 0xf864, 0xf866, 0xf868, 0xf86a, 0xf86c, 0xf86e, + 0xf870, 0xf872, 0xf874, 0xf876, 0xf878, 0xf87a, 0xf87c, + 0xf87e, 0xf880, 0xf882, 0xf884, 0xf886, 0xf888, 0xf88a, + 0xf88c, 0xf88e, 0xf890, 0xf892, 0xf894, 0xf896, 0xf898, + 0xf89a, 0xf89c, 0xf89e, 0xf8a0, 0xf8a2, 0xf8a4, 0xf8a6, + 0xf8a8, 0xf8aa, 0xf8ac, 0xf8ae, 0xf8b0, 0xf8b2, 0xf8b4, + 0xf8b6, 0xf8b8, 0xf8ba, 0xf8bc, 0xf8be, 0xf8c0, 0xf8c2, + 0xf8c4, 0xf8c6, 0xf8c8, 0xf8ca, 0xf8cc, 0xf8ce, 0xf8d0, + 0xf8d2, 0xf8d4, 0xf8d6, 0xf8d8, 0xf8da, 0xf8dc, 0xf8de, + 0xf8e0, 0xf8e2, 0xf8e4, 0xf8e6, 0xf8e8, 0xf8ea, 0xf8ec, + 0xf8ee, 0xf8f0, 0xf8f2, 0xf8f4, 0xf8f6, 0xf8f8, 0xf8fa, + 0xf8fc, 0xf8fe, 0xf900, 0xf902, 0xf904, 0xf906, 0xf908, + 0xf90a, 0xf90c, 0xf90e, 0xf910, 0xf912, 0xf914, 0xf916, + 0xf918, 0xf91a, 0xf91c, 0xf91e, 0xf920, 0xf922, 0xf924, + 0xf926, 0xf928, 0xf92a, 0xf92c, 0xf92e, 0xf930, 0xf932, + 0xf934, 0xf936, 0xf938, 0xf93a, 0xf93c, 0xf93e, 0xf940, + 0xf942, 0xf944, 0xf946, 0xf948, 0xf94a, 0xf94c, 0xf94e, + 0xf950, 0xf952, 0xf954, 0xf956, 0xf958, 0xf95a, 0xf95c, + 0xf95e, 0xf960, 0xf962, 0xf964, 0xf966, 0xf968, 0xf96a, + 0xf96c, 0xf96e, 0xf970, 0xf972, 0xf974, 0xf976, 0xf978, + 0xf97a, 0xf97c, 0xf97e, 0xf980, 0xf982, 0xf984, 0xf986, + 0xf988, 0xf98a, 0xf98c, 0xf98e, 0xf990, 0xf992, 0xf994, + 0xf996, 0xf998, 0xf99a, 0xf99c, 0xf99e, 0xf9a0, 0xf9a2, + 0xf9a4, 0xf9a6, 0xf9a8, 0xf9aa, 0xf9ac, 0xf9ae, 0xf9b0 +}; + +static const uint16_t rtl8126_1_mac_bps_vals[] = { + 0xe010, 0xe02c, 0xe04e, 0xe0a4, 0xe0a8, 0xe0ab, 0xe0ae, + 0xe0b1, 0xe0b5, 0xe0b7, 0xe0b9, 0xe0bb, 0xe0bd, 0xe0bf, + 0xe0c1, 0xe0c3, 0xc716, 0xc616, 0x9ee0, 0xc616, 0x65c0, + 0x1500, 0xf009, 0xc714, 0x66e0, 0x41b5, 0x8ee0, 0xc611, + 0x75c0, 0x4858, 0x9dc0, 0xc707, 0xc608, 0x9ee0, 0xc608, + 0xc502, 0xbd00, 0x0100, 0xe86c, 0xe000, 0xa000, 0xb404, + 0xb430, 0xc070, 0xe926, 0xc2fe, 0x400a, 0xf11a, 0x63a4, + 0x1a00, 0x49b0, 0xf002, 0x4820, 0x49b1, 0xf002, 0x4821, + 0x49b2, 0xf002, 0x4822, 0x49b3, 0xf002, 0x4823, 0xc411, + 0x6380, 0x48b0, 0x8b80, 0x6320, 0x41da, 0x8b20, 0x6380, + 0x4830, 0x8b80, 0xe003, 0x73a4, 0x9b20, 0xc302, 0xbb00, + 0x4a18, 0xc070, 0xe022, 0xc054, 0x7102, 0x4992, 0xf149, + 0x4893, 0x9902, 0x1b1f, 0xc74e, 0x72e0, 0x2521, 0x48a5, + 0x0b01, 0x1c4f, 0x9c00, 0x2121, 0x1d01, 0x41aa, 0x2521, + 0x9de0, 0x4856, 0x9de0, 0x1ccf, 0xe839, 0x48d6, 0x9de0, + 0x7102, 0x4996, 0xf1fe, 0x4814, 0x9902, 0x1cff, 0x0c01, + 0x1400, 0xf00c, 0x7102, 0x4996, 0xf0fb, 0x7102, 0x4990, + 0xf0fe, 0x1c1f, 0xe826, 0x7102, 0x4992, 0xf004, 0x4813, + 0x9902, 0xe01d, 0x1300, 0xf104, 0x4817, 0x9902, 0xe018, + 0x4894, 0x9902, 0x4995, 0xf00b, 0x121f, 0xf0f3, 0x131e, + 0xf003, 0x4998, 0xf0ef, 0x0201, 0x4818, 0x9902, 0xe7c9, + 0x1200, 0xf0e9, 0x4998, 0xf002, 0x1b01, 0x0a01, 0x4898, + 0x9902, 0xe7c0, 0xc00a, 0xc606, 0xbe00, 0x0c01, 0x1400, + 0xf1fe, 0xff80, 0x2362, 0xd456, 0xd404, 0xe400, 0x4166, + 0x9cf6, 0xc002, 0xb800, 0x14a6, 0x49d1, 0xc602, 0xbe00, + 0x4160, 0x49d1, 0xc602, 0xbe00, 0x41e6, 0x49d1, 0xc602, + 0xbe00, 0x4282, 0xc104, 0xc202, 0xba00, 0x234c, 0xd116, + 0xc602, 0xbe00, 0x0000, 0xc602, 0xbe00, 0x0000, 0xc602, + 0xbe00, 0x0000, 0xc602, 0xbe00, 0x0000, 0xc602, 0xbe00, + 0x0000, 0xc602, 0xbe00, 0x0000, 0xc602, 0xbe00, 0x0000, + 0xc602, 0xbe00, 0x0000, 0x6847, 0x0019, 0x041c, 0x1322 +}; + +static const struct rge_mac_bps rtl8126_1_mac_bps = { + nitems(rtl8126_1_mac_bps_regs), + rtl8126_1_mac_bps_regs, + rtl8126_1_mac_bps_vals +}; + +static const uint16_t rtl8126_2_mac_bps_regs[] = { + 0xf800, 0xf802, 0xf804, 0xf806, 0xf808, 0xf80a, 0xf80c, + 0xf80e, 0xf810, 0xf812, 0xf814, 0xf816, 0xf818, 0xf81a, + 0xf81c, 0xf81e, 0xf820, 0xf822, 0xf824, 0xf826, 0xf828, + 0xf82a, 0xf82c, 0xf82e, 0xf830, 0xf832, 0xf834, 0xf836, + 0xf838, 0xf83a, 0xf83c, 0xf83e, 0xf840, 0xf842, 0xf844, + 0xf846, 0xf848, 0xf84a, 0xf84c, 0xf84e, 0xf850, 0xf852, + 0xf854, 0xf856, 0xf858, 0xf85a, 0xf85c, 0xf85e, 0xf860, + 0xf862, 0xf864, 0xf866, 0xf868, 0xf86a, 0xf86c, 0xf86e, + 0xf870, 0xf872, 0xf874, 0xf876, 0xf878, 0xf87a, 0xf87c, + 0xf87e, 0xf880, 0xf882, 0xf884, 0xf886, 0xf888, 0xf88a, + 0xf88c, 0xf88e, 0xf890, 0xf892, 0xf894, 0xf896, 0xf898, + 0xf89a, 0xf89c, 0xf89e, 0xf8a0, 0xf8a2, 0xf8a4, 0xf8a6, + 0xf8a8, 0xf8aa, 0xf8ac, 0xf8ae, 0xf8b0, 0xf8b2, 0xf8b4, + 0xf8b6, 0xf8b8, 0xf8ba, 0xf8bc, 0xf8be, 0xf8c0, 0xf8c2, + 0xf8c4, 0xf8c6, 0xf8c8, 0xf8ca, 0xf8cc, 0xf8ce, 0xf8d0, + 0xf8d2, 0xf8d4, 0xf8d6, 0xf8d8, 0xf8da, 0xf8dc, 0xf8de, + 0xf8e0, 0xf8e2, 0xf8e4, 0xf8e6, 0xf8e8, 0xf8ea, 0xf8ec, + 0xf8ee, 0xf8f0, 0xf8f2, 0xf8f4, 0xf8f6, 0xf8f8, 0xf8fa, + 0xf8fc, 0xf8fe, 0xf900, 0xf902, 0xf904, 0xf906, 0xf908, + 0xf90a, 0xf90c, 0xf90e, 0xf910, 0xf912, 0xf914, 0xf916, + 0xf918, 0xf91a, 0xf91c, 0xf91e, 0xf920, 0xf922, 0xf924, + 0xf926, 0xf928, 0xf92a, 0xf92c, 0xf92e, 0xf930, 0xf932, + 0xf934, 0xf936, 0xf938, 0xf93a, 0xf93c, 0xf93e, 0xf940, + 0xf942, 0xf944, 0xf946, 0xf948, 0xf94a, 0xf94c, 0xf94e, + 0xf950, 0xf952, 0xf954, 0xf956, 0xf958, 0xf95a, 0xf95c, + 0xf95e, 0xf960, 0xf962, 0xf964, 0xf966, 0xf968, 0xf96a, + 0xf96c, 0xf96e, 0xf970, 0xf972, 0xf974, 0xf976, 0xf978, + 0xf97a, 0xf97c, 0xf97e, 0xf980, 0xf982, 0xf984, 0xf986, + 0xf988, 0xf98a, 0xf98c, 0xf98e, 0xf990, 0xf992, 0xf994, + 0xf996, 0xf998, 0xf99a, 0xf99c, 0xf99e, 0xf9a0, 0xf9a2, + 0xf9a4, 0xf9a6, 0xf9a8, 0xf9aa, 0xf9ac, 0xf9ae, 0xf9b0, + 0xf9b2, 0xf9b4, 0xf9b6, 0xf9b8, 0xf9ba, 0xf9bc, 0xf9be, + 0xf9c0, 0xf9c2, 0xf9c4, 0xf9c6, 0xf9c8, 0xf9ca, 0xf9cc, + 0xf9ce, 0xf9d0, 0xf9d2, 0xf9d4, 0xf9d6, 0xf9d8, 0xf9da, + 0xf9dc, 0xf9de, 0xf9e0, 0xf9e2, 0xf9e4, 0xf9e6, 0xf9e8, + 0xf9ea, 0xf9ec, 0xf9ee, 0xf9f0, 0xf9f2, 0xf9f4, 0xf9f6, + 0xf9f8, 0xf9fa, 0xf9fc, 0xf9fe, 0xf800, 0xf802, 0xf804, + 0xf806, 0xf808, 0xf80a, 0xf80c, 0xf80e, 0xf810, 0xf812, + 0xf814, 0xf816, 0xf818, 0xf81a, 0xf81c, 0xf81e, 0xf820, + 0xf822, 0xf824, 0xf826, 0xf828, 0xf82a, 0xf82c, 0xf82e, + 0xf830, 0xf832, 0xf834, 0xf836, 0xf838, 0xf83a, 0xf83c, + 0xf83e, 0xf840, 0xf842, 0xf844, 0xf846, 0xf848, 0xf84a, + 0xf84c, 0xf84e, 0xf850, 0xf852, 0xf854, 0xf856, 0xf858, + 0xf85a, 0xf85c, 0xf85e, 0xf860, 0xf862, 0xf864, 0xf866, + 0xf868, 0xf86a, 0xf86c, 0xf86e, 0xf870, 0xf872, 0xf874, + 0xf876, 0xf878, 0xf87a, 0xf87c, 0xf87e, 0xf880, 0xf882, + 0xf884, 0xf886, 0xf888, 0xf88a, 0xf88c, 0xf88e, 0xf890, + 0xf892, 0xf894, 0xf896, 0xf898, 0xf89a, 0xf89c, 0xf89e, + 0xf8a0, 0xf8a2, 0xf8a4 +}; + +static const uint16_t rtl8126_2_mac_bps_vals[] = { + 0xe00a, 0xe026, 0xe048, 0xe04c, 0xe04f, 0xe052, 0xe055, + 0xe0ab, 0xe0f8, 0xe141, 0xc716, 0xc616, 0x9ee0, 0xc616, + 0x65c0, 0x1500, 0xf009, 0xc714, 0x66e0, 0x41b5, 0x8ee0, + 0xc611, 0x75c0, 0x4858, 0x9dc0, 0xc707, 0xc608, 0x9ee0, + 0xc608, 0xc502, 0xbd00, 0x0100, 0xe86c, 0xe000, 0xa000, + 0xb404, 0xb430, 0xc070, 0xe926, 0xc2fe, 0x400a, 0xf11a, + 0x63a4, 0x1a00, 0x49b0, 0xf002, 0x4820, 0x49b1, 0xf002, + 0x4821, 0x49b2, 0xf002, 0x4822, 0x49b3, 0xf002, 0x4823, + 0xc411, 0x6380, 0x48b0, 0x8b80, 0x6320, 0x41da, 0x8b20, + 0x6380, 0x4830, 0x8b80, 0xe003, 0x73a4, 0x9b20, 0xc302, + 0xbb00, 0x55e2, 0xc070, 0xe022, 0x4166, 0x9cf6, 0xc602, + 0xbe00, 0x14a6, 0x49d1, 0xc602, 0xbe00, 0x4178, 0x49d1, + 0xc602, 0xbe00, 0x41fe, 0x49d1, 0xc602, 0xbe00, 0x429a, + 0xc74b, 0x76e2, 0xc54a, 0x402e, 0xf034, 0x76e0, 0x402e, + 0xf006, 0xc503, 0xc403, 0xbc00, 0xc0bc, 0x0aae, 0x76f0, + 0x1601, 0xf023, 0xc741, 0x1e04, 0x9ee0, 0x1e40, 0x9ee4, + 0xc63d, 0x9ee8, 0xc73d, 0x76e0, 0x4863, 0x9ee0, 0xc73a, + 0x76e0, 0x48ea, 0x48eb, 0x9ee0, 0xc736, 0x1e01, 0x9ee2, + 0xc72d, 0x76e0, 0x486f, 0x9ee0, 0xc72d, 0x76e0, 0x48e3, + 0x9ee0, 0xc728, 0x1e0e, 0x9ee0, 0xc71d, 0x1e01, 0x9ee4, + 0xe00d, 0x1e00, 0x9ef0, 0x1e05, 0xc715, 0x9ee0, 0xe00a, + 0x1e00, 0x9ee2, 0xc614, 0x75cc, 0x48d2, 0x9dcc, 0x1e04, + 0xc70b, 0x9ee0, 0xb000, 0xb001, 0xb002, 0xb003, 0xb004, + 0xb005, 0xb006, 0xb007, 0xffc0, 0xe428, 0xd3c0, 0xbeef, + 0x5b4a, 0xdc46, 0xe0cc, 0xe84e, 0xc0a2, 0x0100, 0xc010, + 0xe85a, 0xe812, 0xc0b4, 0xc5f4, 0x74a0, 0xc6f3, 0x4026, + 0xf107, 0x74a2, 0xc6ef, 0x4026, 0xf107, 0xc6ed, 0xbe00, + 0x753a, 0xc602, 0xbe00, 0x5a3a, 0x7520, 0x49de, 0xf102, + 0xe7f9, 0xc6a1, 0x67c6, 0x7520, 0x22d2, 0x26dd, 0x1500, + 0xf002, 0xe7f1, 0x7532, 0x26d5, 0x0530, 0x0d6c, 0xc42d, + 0x308d, 0x7540, 0x4025, 0xf11e, 0x7542, 0x4025, 0xf11b, + 0x7544, 0x4025, 0xf118, 0xc423, 0x7546, 0x4025, 0xf114, + 0x7548, 0x4025, 0xf111, 0x754a, 0x4025, 0xf10e, 0xc5c0, + 0xc4c0, 0x9ca2, 0xc6c0, 0x75cc, 0x4852, 0x9dcc, 0xc6b8, + 0x1d7d, 0x9dc2, 0x1d01, 0x9dc0, 0xe7c9, 0xc40b, 0x7546, + 0x4025, 0xf1fc, 0x7548, 0x4025, 0xf1f9, 0x754a, 0x4025, + 0xf1f6, 0xe7c0, 0xffff, 0xeeee, 0xc2a6, 0x7340, 0xc2a5, + 0x4013, 0xf013, 0xc2ac, 0x7340, 0x4835, 0x9b40, 0xc240, + 0x7358, 0x48b7, 0x48b2, 0x9b58, 0x7346, 0x48b7, 0x48b2, + 0x9b46, 0x7340, 0x48b7, 0x48b2, 0x9b40, 0xe012, 0xc29a, + 0x7340, 0x48b5, 0x9b40, 0xc22e, 0x7358, 0x4837, 0x4832, + 0x9b58, 0x7346, 0x4837, 0x4832, 0x9b46, 0x7340, 0x4837, + 0x4832, 0x9b40, 0xc283, 0x7340, 0x49bf, 0xf010, 0xc21b, + 0x7344, 0x1300, 0xf104, 0x1b00, 0xc217, 0x9b40, 0x1b01, + 0xc213, 0x9b44, 0xc213, 0x734c, 0x48b7, 0x9b4c, 0xe008, + 0xc20c, 0x1b00, 0x9b44, 0xc20b, 0x734c, 0x4837, 0x9b4c, + 0xc204, 0xc302, 0xbb00, 0x2384, 0xe092, 0xd3c0, 0xe428, + 0xdc46, 0xc104, 0xc202, 0xba00, 0x234c, 0xd116, 0x6847, + 0x0119, 0x041c, 0x1134 +}; + +static const struct rge_mac_bps rtl8126_2_mac_bps = { + nitems(rtl8126_2_mac_bps_regs), + rtl8126_2_mac_bps_regs, + rtl8126_2_mac_bps_vals +}; + +static const uint16_t rtl8127_mac_bps_regs[] = { + 0xf800, 0xf802, 0xf804, 0xf806, 0xf808, 0xf80a, 0xf80c, + 0xf80e, 0xf810, 0xf812, 0xf814, 0xf816, 0xf818, 0xf81a, + 0xf81c, 0xf81e, 0xf820, 0xf822, 0xf824, 0xf826, 0xf828, + 0xf82a, 0xf82c, 0xf82e, 0xf830, 0xf832, 0xf834, 0xf836, + 0xf838, 0xf83a, 0xf83c, 0xf83e, 0xf840, 0xf842, 0xf844, + 0xf846, 0xf848, 0xf84a, 0xf84c, 0xf84e, 0xf850, 0xf852, + 0xf854, 0xf856, 0xf858, 0xf85a, 0xf85c, 0xf85e, 0xf860, + 0xf862, 0xf864, 0xf866, 0xf868, 0xf86a, 0xf86c, 0xf86e, + 0xf870, 0xf872, 0xf874, 0xf876, 0xf878, 0xf87a, 0xf87c, + 0xf87e, 0xf880, 0xf882, 0xf884, 0xf886, 0xf888, 0xf88a, + 0xf88c, 0xf88e, 0xf890, 0xf892, 0xf894, 0xf896, 0xf898, + 0xf89a, 0xf89c, 0xf89e, 0xf8a0, 0xf8a2, 0xf8a4, 0xf8a6, + 0xf8a8, 0xf8aa, 0xf8ac, 0xf8ae, 0xf8b0, 0xf8b2, 0xf8b4, + 0xf8b6, 0xf8b8, 0xf8ba, 0xf8bc, 0xf8be, 0xf8c0, 0xf8c2, + 0xf8c4, 0xf8c6, 0xf8c8, 0xf8ca, 0xf8cc, 0xf8ce, 0xf8d0, + 0xf8d2, 0xf8d4, 0xf8d6, 0xf8d8, 0xf8da, 0xf8dc, 0xf8de, + 0xf8e0, 0xf8e2, 0xf8e4, 0xf8e6, 0xf8e8, 0xf8ea, 0xf8ec, + 0xf8ee, 0xf8f0, 0xf8f2, 0xf8f4, 0xf8f6, 0xf8f8, 0xf8fa, + 0xf8fc, 0xf8fe, 0xf900, 0xf902, 0xf904, 0xf906, 0xf908, + 0xf90a, 0xf90c, 0xf90e, 0xf910, 0xf912, 0xf914, 0xf916, + 0xf918, 0xf91a, 0xf91c, 0xf91e, 0xf920, 0xf922, 0xf924, + 0xf926, 0xf928, 0xf92a, 0xf92c, 0xf92e, 0xf930, 0xf932, + 0xf934, 0xf936, 0xf938, 0xf93a, 0xf93c, 0xf93e, 0xf940, + 0xf942, 0xf944, 0xf946, 0xf948, 0xf94a, 0xf94c, 0xf94e, + 0xf950, 0xf952, 0xf954, 0xf956, 0xf958, 0xf95a, 0xf95c, + 0xf95e, 0xf960, 0xf962, 0xf964, 0xf966, 0xf968, 0xf96a, + 0xf96c, 0xf96e, 0xf970, 0xf972, 0xf974, 0xf976, 0xf978, + 0xf97a, 0xf97c, 0xf97e, 0xf980, 0xf982, 0xf984, 0xf986, + 0xf988, 0xf98a, 0xf98c, 0xf98e, 0xf990, 0xf992, 0xf994, + 0xf996, 0xf998, 0xf99a, 0xf99c, 0xf99e, 0xf9a0, 0xf9a2, + 0xf9a4, 0xf9a6, 0xf9a8, 0xf9aa, 0xf9ac, 0xf9ae, 0xf9b0, + 0xf9b2, 0xf9b4, 0xf9b6, 0xf9b8, 0xf9ba, 0xf9bc, 0xf9be, + 0xf9c0, 0xf9c2, 0xf9c4, 0xf9c6, 0xf9c8, 0xf9ca, 0xf9cc, + 0xf9ce, 0xf9d0, 0xf9d2, 0xf9d4, 0xf9d6, 0xf9d8, 0xf9da, + 0xf9dc, 0xf9de, 0xf9e0, 0xf9e2, 0xf9e4, 0xf9e6, 0xf9e8, + 0xf9ea, 0xf9ec, 0xf9ee, 0xf9f0, 0xf9f2, 0xf9f4, 0xf9f6, + 0xf9f8, 0xf9fa, 0xf9fc, 0xf9fe, 0xf800, 0xf802, 0xf804, + 0xf806, 0xf808, 0xf80a, 0xf80c, 0xf80e, 0xf810, 0xf812, + 0xf814, 0xf816, 0xf818, 0xf81a, 0xf81c, 0xf81e, 0xf820, + 0xf822, 0xf824, 0xf826, 0xf828, 0xf82a, 0xf82c, 0xf82e, + 0xf830, 0xf832, 0xf834, 0xf836, 0xf838, 0xf83a, 0xf83c, + 0xf83e, 0xf840, 0xf842, 0xf844, 0xf846, 0xf848, 0xf84a, + 0xf84c, 0xf84e, 0xf850, 0xf852, 0xf854, 0xf856, 0xf858, + 0xf85a, 0xf85c, 0xf85e, 0xf860, 0xf862, 0xf864, 0xf866, + 0xf868, 0xf86a, 0xf86c, 0xf86e, 0xf870, 0xf872, 0xf874, + 0xf876, 0xf878, 0xf87a, 0xf87c +}; + +static const uint16_t rtl8127_mac_bps_vals[] = { + 0xe010, 0xe023, 0xe036, 0xe049, 0xe05c, 0xe075, 0xe0b1, + 0xe117, 0xe11b, 0xe11d, 0xe11f, 0xe121, 0xe123, 0xe125, + 0xe127, 0xe129, 0x7020, 0xb405, 0xb404, 0xc50f, 0x74a0, + 0xc50e, 0x4025, 0xf005, 0x4850, 0x4025, 0xf002, 0xe002, + 0x4809, 0xb004, 0xb005, 0xc502, 0xbd00, 0x1522, 0xd006, + 0x0004, 0x7760, 0xb405, 0xb404, 0xc50f, 0x74a0, 0xc50e, + 0x4025, 0xf005, 0x4850, 0x4025, 0xf002, 0xe002, 0x4879, + 0xb004, 0xb005, 0xc002, 0xb800, 0x41e2, 0xd006, 0x0004, + 0x7160, 0xb405, 0xb404, 0xc50f, 0x74a0, 0xc50e, 0x4025, + 0xf005, 0x4850, 0x4025, 0xf002, 0xe002, 0x4819, 0xb004, + 0xb005, 0xc302, 0xbb00, 0x508e, 0xd006, 0x0004, 0x7720, + 0xb405, 0xb404, 0xc50f, 0x74a0, 0xc50e, 0x4025, 0xf005, + 0x4850, 0x4025, 0xf002, 0xe002, 0x4879, 0xb004, 0xb005, + 0xc102, 0xb900, 0x50f8, 0xd006, 0x0004, 0x61a9, 0xb403, + 0xb404, 0xc313, 0x7460, 0xc312, 0x4023, 0xf005, 0x4830, + 0x4023, 0xf002, 0xe003, 0x4997, 0xf003, 0xc00a, 0xe002, + 0xc009, 0xb004, 0xb003, 0xc102, 0xb900, 0x34fc, 0xd006, + 0x0004, 0x02af, 0x041f, 0xb407, 0xb406, 0xb405, 0xb404, + 0xb403, 0xb402, 0xb401, 0xb400, 0x49d2, 0xf116, 0xc62f, + 0x77c0, 0x49f9, 0xf020, 0x49fa, 0xf11e, 0x49f2, 0xf102, + 0xe01b, 0x48f2, 0x9fc0, 0xc625, 0x75c2, 0x4852, 0x9dc2, + 0xc122, 0x7020, 0x4801, 0x4802, 0x9820, 0xe00f, 0xc61a, + 0x77c0, 0x49f2, 0xf10b, 0xc618, 0x77c0, 0x49f2, 0xf007, + 0x48f2, 0x9fc0, 0xc611, 0x75c2, 0x48d2, 0x9dc2, 0xb000, + 0xb001, 0xb002, 0xb003, 0xb004, 0xb005, 0xb006, 0xb007, + 0x9d6c, 0xc502, 0xbd00, 0x0168, 0xe024, 0xc010, 0xd410, + 0xd460, 0xb407, 0xb406, 0xb405, 0xb404, 0xb403, 0xb402, + 0xb401, 0xb400, 0xc152, 0x7020, 0x4981, 0xf043, 0xc050, + 0x7100, 0xb401, 0xc14c, 0x489e, 0x481d, 0x9900, 0xc24a, + 0x7340, 0x49b7, 0xf135, 0xc144, 0x9900, 0xc245, 0x7340, + 0xc447, 0x401c, 0xf109, 0x734c, 0x1301, 0xf12b, 0xc343, + 0x9b40, 0xc33e, 0x9b40, 0xe022, 0xc63a, 0x77c0, 0x48f4, + 0x48f5, 0x48f9, 0x48fa, 0x9fc0, 0xc231, 0x7344, 0x48b4, + 0x9b44, 0xc22e, 0x7340, 0x4830, 0x48b1, 0x4832, 0x483c, + 0x48bd, 0x48be, 0x48bf, 0x9b40, 0xc223, 0xc32a, 0x9b48, + 0xc327, 0x9b46, 0xc324, 0x9b40, 0xc321, 0x9b42, 0xc31e, + 0x9b40, 0xe005, 0xc113, 0x7020, 0x4881, 0x9820, 0xb001, + 0xc010, 0x9900, 0xb000, 0xb001, 0xb002, 0xb003, 0xb004, + 0xb005, 0xb006, 0xb007, 0x2125, 0xc102, 0xb900, 0x1a6c, + 0xd410, 0xc000, 0xe86c, 0xb600, 0xb800, 0xb40a, 0xe024, + 0x5a00, 0x5a81, 0x0073, 0x5a80, 0x0042, 0x0001, 0xc104, + 0xc202, 0xba00, 0x1a2e, 0xc896, 0xc302, 0xbb00, 0x0000, + 0xc002, 0xb800, 0x0000, 0xc002, 0xb800, 0x0000, 0xc502, + 0xbd00, 0x0000, 0xc102, 0xb900, 0x0000, 0xc102, 0xb900, + 0x0000, 0xc602, 0xbe00, 0x0000, 0xc602, 0xbe00, 0x0000, + 0x6961, 0x0019, 0x050c, 0x140c +}; + +static const struct rge_mac_bps rtl8127_mac_bps = { + nitems(rtl8127_mac_bps_regs), + rtl8127_mac_bps_regs, + rtl8127_mac_bps_vals }; static const struct rge_hw_regaddr_array mac_r25_ephy[] = { @@ -305,6 +489,3220 @@ static const struct rge_hw_regaddr_array mac_r27_ephy[] = { { 0x941c, 0x0190 }, { 0x981c, 0x0140 }, { 0x9c1c, 0x0140 } }; +static const struct rge_hw_regaddr_array mac_r26_1_mcu[] = { + { 0xa436, 0x8023 }, { 0xa438, 0x4700 }, { 0xa436, 0xb82e }, + { 0xa438, 0x0001 }, { 0xb820, 0x0090 }, { 0xa436, 0xa016 }, + { 0xa438, 0x0000 }, { 0xa436, 0xa012 }, { 0xa438, 0x0000 }, + { 0xa436, 0xa014 }, { 0xa438, 0x1800 }, { 0xa438, 0x8010 }, + { 0xa438, 0x1800 }, { 0xa438, 0x8025 }, { 0xa438, 0x1800 }, + { 0xa438, 0x8033 }, { 0xa438, 0x1800 }, { 0xa438, 0x8037 }, + { 0xa438, 0x1800 }, { 0xa438, 0x803c }, { 0xa438, 0x1800 }, + { 0xa438, 0x8044 }, { 0xa438, 0x1800 }, { 0xa438, 0x8054 }, + { 0xa438, 0x1800 }, { 0xa438, 0x8059 }, { 0xa438, 0xd504 }, + { 0xa438, 0xc9b5 }, { 0xa438, 0xd500 }, { 0xa438, 0xd707 }, + { 0xa438, 0x4070 }, { 0xa438, 0x1800 }, { 0xa438, 0x107a }, + { 0xa438, 0xd504 }, { 0xa438, 0xc994 }, { 0xa438, 0xd500 }, + { 0xa438, 0xd707 }, { 0xa438, 0x60d0 }, { 0xa438, 0xd701 }, + { 0xa438, 0x252d }, { 0xa438, 0x8023 }, { 0xa438, 0x1800 }, + { 0xa438, 0x1064 }, { 0xa438, 0x1800 }, { 0xa438, 0x107a }, + { 0xa438, 0x1800 }, { 0xa438, 0x1052 }, { 0xa438, 0xd504 }, + { 0xa438, 0xc9d0 }, { 0xa438, 0xd500 }, { 0xa438, 0xd707 }, + { 0xa438, 0x60d0 }, { 0xa438, 0xd701 }, { 0xa438, 0x252d }, + { 0xa438, 0x8031 }, { 0xa438, 0x1800 }, { 0xa438, 0x1171 }, + { 0xa438, 0x1800 }, { 0xa438, 0x1187 }, { 0xa438, 0x1800 }, + { 0xa438, 0x116a }, { 0xa438, 0xc0ff }, { 0xa438, 0xcaff }, + { 0xa438, 0x1800 }, { 0xa438, 0x00d6 }, { 0xa438, 0xd504 }, + { 0xa438, 0xa001 }, { 0xa438, 0xd704 }, { 0xa438, 0x1800 }, + { 0xa438, 0x128b }, { 0xa438, 0xd707 }, { 0xa438, 0x2005 }, + { 0xa438, 0x8042 }, { 0xa438, 0xd75e }, { 0xa438, 0x1800 }, + { 0xa438, 0x137a }, { 0xa438, 0x1800 }, { 0xa438, 0x13ed }, + { 0xa438, 0x61d0 }, { 0xa438, 0xd701 }, { 0xa438, 0x60a5 }, + { 0xa438, 0xd504 }, { 0xa438, 0xc9b2 }, { 0xa438, 0xd500 }, + { 0xa438, 0xf004 }, { 0xa438, 0xd504 }, { 0xa438, 0xc9b1 }, + { 0xa438, 0xd500 }, { 0xa438, 0xd707 }, { 0xa438, 0x6070 }, + { 0xa438, 0x1800 }, { 0xa438, 0x10a8 }, { 0xa438, 0x1800 }, + { 0xa438, 0x10bd }, { 0xa438, 0xd500 }, { 0xa438, 0xc492 }, + { 0xa438, 0xd501 }, { 0xa438, 0x1800 }, { 0xa438, 0x13c1 }, + { 0xa438, 0xa980 }, { 0xa438, 0xd500 }, { 0xa438, 0x1800 }, + { 0xa438, 0x143b }, { 0xa436, 0xa026 }, { 0xa438, 0x143a }, + { 0xa436, 0xa024 }, { 0xa438, 0x13c0 }, { 0xa436, 0xa022 }, + { 0xa438, 0x10bc }, { 0xa436, 0xa020 }, { 0xa438, 0x1379 }, + { 0xa436, 0xa006 }, { 0xa438, 0x128a }, { 0xa436, 0xa004 }, + { 0xa438, 0x00d5 }, { 0xa436, 0xa002 }, { 0xa438, 0x1182 }, + { 0xa436, 0xa000 }, { 0xa438, 0x1075 }, { 0xa436, 0xa008 }, + { 0xa438, 0xff00 }, { 0xa436, 0xa016 }, { 0xa438, 0x0010 }, + { 0xa436, 0xa012 }, { 0xa438, 0x0000 }, { 0xa436, 0xa014 }, + { 0xa438, 0x1800 }, { 0xa438, 0x8010 }, { 0xa438, 0x1800 }, + { 0xa438, 0x8015 }, { 0xa438, 0x1800 }, { 0xa438, 0x801a }, + { 0xa438, 0x1800 }, { 0xa438, 0x801e }, { 0xa438, 0x1800 }, + { 0xa438, 0x8027 }, { 0xa438, 0x1800 }, { 0xa438, 0x8027 }, + { 0xa438, 0x1800 }, { 0xa438, 0x8027 }, { 0xa438, 0x1800 }, + { 0xa438, 0x8027 }, { 0xa438, 0x0c0f }, { 0xa438, 0x0505 }, + { 0xa438, 0xba01 }, { 0xa438, 0x1800 }, { 0xa438, 0x015e }, + { 0xa438, 0x0c0f }, { 0xa438, 0x0506 }, { 0xa438, 0xba02 }, + { 0xa438, 0x1800 }, { 0xa438, 0x017c }, { 0xa438, 0x9910 }, + { 0xa438, 0x9a03 }, { 0xa438, 0x1800 }, { 0xa438, 0x02d4 }, + { 0xa438, 0x8580 }, { 0xa438, 0xc090 }, { 0xa438, 0x9a03 }, + { 0xa438, 0x1000 }, { 0xa438, 0x02c9 }, { 0xa438, 0xd700 }, + { 0xa438, 0x5fa3 }, { 0xa438, 0x1800 }, { 0xa438, 0x0067 }, + { 0xa436, 0xa08e }, { 0xa438, 0xffff }, { 0xa436, 0xa08c }, + { 0xa438, 0xffff }, { 0xa436, 0xa08a }, { 0xa438, 0xffff }, + { 0xa436, 0xa088 }, { 0xa438, 0xffff }, { 0xa436, 0xa086 }, + { 0xa438, 0x018c }, { 0xa436, 0xa084 }, { 0xa438, 0x02d3 }, + { 0xa436, 0xa082 }, { 0xa438, 0x017a }, { 0xa436, 0xa080 }, + { 0xa438, 0x015c }, { 0xa436, 0xa090 }, { 0xa438, 0x000f }, + { 0xa436, 0xa016 }, { 0xa438, 0x0020 }, { 0xa436, 0xa012 }, + { 0xa438, 0x0000 }, { 0xa436, 0xa014 }, { 0xa438, 0x1800 }, + { 0xa438, 0x8010 }, { 0xa438, 0x1800 }, { 0xa438, 0x8023 }, + { 0xa438, 0x1800 }, { 0xa438, 0x8313 }, { 0xa438, 0x1800 }, + { 0xa438, 0x831a }, { 0xa438, 0x1800 }, { 0xa438, 0x8489 }, + { 0xa438, 0x1800 }, { 0xa438, 0x86b9 }, { 0xa438, 0x1800 }, + { 0xa438, 0x86c1 }, { 0xa438, 0x1800 }, { 0xa438, 0x87ad }, + { 0xa438, 0x1000 }, { 0xa438, 0x124e }, { 0xa438, 0x9308 }, + { 0xa438, 0xb201 }, { 0xa438, 0xb301 }, { 0xa438, 0xd701 }, + { 0xa438, 0x5fe0 }, { 0xa438, 0xd2ff }, { 0xa438, 0xb302 }, + { 0xa438, 0xd200 }, { 0xa438, 0xb201 }, { 0xa438, 0xb309 }, + { 0xa438, 0xd701 }, { 0xa438, 0x5fe0 }, { 0xa438, 0xd2ff }, + { 0xa438, 0xb302 }, { 0xa438, 0xd200 }, { 0xa438, 0x1800 }, + { 0xa438, 0x0025 }, { 0xa438, 0xd706 }, { 0xa438, 0x6069 }, + { 0xa438, 0xd700 }, { 0xa438, 0x6421 }, { 0xa438, 0xd70c }, + { 0xa438, 0x43ab }, { 0xa438, 0x800a }, { 0xa438, 0x8190 }, + { 0xa438, 0x8204 }, { 0xa438, 0xa280 }, { 0xa438, 0x8406 }, + { 0xa438, 0x0c03 }, { 0xa438, 0x1502 }, { 0xa438, 0xa108 }, + { 0xa438, 0x9503 }, { 0xa438, 0x0c03 }, { 0xa438, 0x1502 }, + { 0xa438, 0x0c1f }, { 0xa438, 0x0f19 }, { 0xa438, 0x9503 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, { 0xa438, 0xd70c }, + { 0xa438, 0x5fb3 }, { 0xa438, 0x0c03 }, { 0xa438, 0x1502 }, + { 0xa438, 0x8f1f }, { 0xa438, 0x9503 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1175 }, { 0xa438, 0xd70c }, { 0xa438, 0x7f33 }, + { 0xa438, 0x1000 }, { 0xa438, 0x11bd }, { 0xa438, 0x1800 }, + { 0xa438, 0x81aa }, { 0xa438, 0x8710 }, { 0xa438, 0xd701 }, + { 0xa438, 0x33b1 }, { 0xa438, 0x8051 }, { 0xa438, 0xd701 }, + { 0xa438, 0x60b5 }, { 0xa438, 0xd706 }, { 0xa438, 0x6069 }, + { 0xa438, 0x1800 }, { 0xa438, 0x8056 }, { 0xa438, 0xa00a }, + { 0xa438, 0xa280 }, { 0xa438, 0xa404 }, { 0xa438, 0x1800 }, + { 0xa438, 0x80f3 }, { 0xa438, 0xd173 }, { 0xa438, 0xd04d }, + { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, { 0xa438, 0xd700 }, + { 0xa438, 0x5fb4 }, { 0xa438, 0xd173 }, { 0xa438, 0xd05d }, + { 0xa438, 0xd10d }, { 0xa438, 0xd049 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1175 }, { 0xa438, 0xd700 }, { 0xa438, 0x5fb4 }, + { 0xa438, 0xd700 }, { 0xa438, 0x64f5 }, { 0xa438, 0xd700 }, + { 0xa438, 0x5ee7 }, { 0xa438, 0xb920 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1175 }, { 0xa438, 0xd71f }, { 0xa438, 0x7fb4 }, + { 0xa438, 0x9920 }, { 0xa438, 0xcb3c }, { 0xa438, 0x1000 }, + { 0xa438, 0x1175 }, { 0xa438, 0xd71f }, { 0xa438, 0x7d94 }, + { 0xa438, 0x6045 }, { 0xa438, 0xfffa }, { 0xa438, 0xb820 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, { 0xa438, 0xd71f }, + { 0xa438, 0x7fa5 }, { 0xa438, 0x9820 }, { 0xa438, 0xcb3d }, + { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, { 0xa438, 0xd700 }, + { 0xa438, 0x60b5 }, { 0xa438, 0xd71f }, { 0xa438, 0x7bb4 }, + { 0xa438, 0x61b6 }, { 0xa438, 0xfff8 }, { 0xa438, 0xbb80 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, { 0xa438, 0xd71f }, + { 0xa438, 0x5fb4 }, { 0xa438, 0x9b80 }, { 0xa438, 0xd700 }, + { 0xa438, 0x60e7 }, { 0xa438, 0xcb3f }, { 0xa438, 0x1800 }, + { 0xa438, 0x8094 }, { 0xa438, 0xcb3e }, { 0xa438, 0x1800 }, + { 0xa438, 0x810f }, { 0xa438, 0x1800 }, { 0xa438, 0x80f3 }, + { 0xa438, 0x0c03 }, { 0xa438, 0x1502 }, { 0xa438, 0xae04 }, + { 0xa438, 0x9503 }, { 0xa438, 0x0000 }, { 0xa438, 0x0000 }, + { 0xa438, 0x0c03 }, { 0xa438, 0x1502 }, { 0xa438, 0x8e04 }, + { 0xa438, 0x9503 }, { 0xa438, 0xd706 }, { 0xa438, 0x65fe }, + { 0xa438, 0x0c1f }, { 0xa438, 0x0d04 }, { 0xa438, 0x8dc0 }, + { 0xa438, 0x1000 }, { 0xa438, 0x11bd }, { 0xa438, 0xd70c }, + { 0xa438, 0x414b }, { 0xa438, 0x0cc0 }, { 0xa438, 0x0040 }, + { 0xa438, 0x0c03 }, { 0xa438, 0x0102 }, { 0xa438, 0x0ce0 }, + { 0xa438, 0x03e0 }, { 0xa438, 0xccce }, { 0xa438, 0x1800 }, + { 0xa438, 0x80b7 }, { 0xa438, 0x0cc0 }, { 0xa438, 0x0040 }, + { 0xa438, 0x0c03 }, { 0xa438, 0x0100 }, { 0xa438, 0x0ce0 }, + { 0xa438, 0x0380 }, { 0xa438, 0xcc9c }, { 0xa438, 0x8710 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1118 }, { 0xa438, 0xa104 }, + { 0xa438, 0x1000 }, { 0xa438, 0x112a }, { 0xa438, 0x8104 }, + { 0xa438, 0xa202 }, { 0xa438, 0xa140 }, { 0xa438, 0x1000 }, + { 0xa438, 0x112a }, { 0xa438, 0x8140 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1121 }, { 0xa438, 0xaa0f }, { 0xa438, 0xa130 }, + { 0xa438, 0xaa2f }, { 0xa438, 0xa2d5 }, { 0xa438, 0xa405 }, + { 0xa438, 0xa720 }, { 0xa438, 0xa00a }, { 0xa438, 0x1800 }, + { 0xa438, 0x80f3 }, { 0xa438, 0xd704 }, { 0xa438, 0x3cf1 }, + { 0xa438, 0x80d5 }, { 0xa438, 0x0c1f }, { 0xa438, 0x0d02 }, + { 0xa438, 0x1800 }, { 0xa438, 0x80d7 }, { 0xa438, 0x0c1f }, + { 0xa438, 0x0d01 }, { 0xa438, 0x0cc0 }, { 0xa438, 0x0d40 }, + { 0xa438, 0x1000 }, { 0xa438, 0x11bd }, { 0xa438, 0x8710 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1118 }, { 0xa438, 0xa108 }, + { 0xa438, 0x1000 }, { 0xa438, 0x112a }, { 0xa438, 0x8108 }, + { 0xa438, 0xa203 }, { 0xa438, 0x8a2f }, { 0xa438, 0xa130 }, + { 0xa438, 0x8204 }, { 0xa438, 0xa140 }, { 0xa438, 0x1000 }, + { 0xa438, 0x112a }, { 0xa438, 0x8140 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1121 }, { 0xa438, 0xd17a }, { 0xa438, 0xd04b }, + { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, { 0xa438, 0xd700 }, + { 0xa438, 0x5fb4 }, { 0xa438, 0xa204 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1175 }, { 0xa438, 0xd700 }, { 0xa438, 0x5fa7 }, + { 0xa438, 0xb920 }, { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, + { 0xa438, 0xd71f }, { 0xa438, 0x7fb4 }, { 0xa438, 0x9920 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, { 0xa438, 0xd71f }, + { 0xa438, 0x6125 }, { 0xa438, 0x6054 }, { 0xa438, 0xfffb }, + { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, { 0xa438, 0xd700 }, + { 0xa438, 0x5fa7 }, { 0xa438, 0x1800 }, { 0xa438, 0x80f7 }, + { 0xa438, 0xb820 }, { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, + { 0xa438, 0xd71f }, { 0xa438, 0x7fa5 }, { 0xa438, 0x9820 }, + { 0xa438, 0x9b01 }, { 0xa438, 0xd402 }, { 0xa438, 0x1000 }, + { 0xa438, 0x110d }, { 0xa438, 0xd701 }, { 0xa438, 0x33b1 }, + { 0xa438, 0x811c }, { 0xa438, 0xd701 }, { 0xa438, 0x60b5 }, + { 0xa438, 0xd706 }, { 0xa438, 0x6069 }, { 0xa438, 0x1800 }, + { 0xa438, 0x811e }, { 0xa438, 0x1800 }, { 0xa438, 0x8183 }, + { 0xa438, 0xd70c }, { 0xa438, 0x40ab }, { 0xa438, 0x800a }, + { 0xa438, 0x8110 }, { 0xa438, 0x8284 }, { 0xa438, 0x8404 }, + { 0xa438, 0xa710 }, { 0xa438, 0x8120 }, { 0xa438, 0x8241 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1118 }, { 0xa438, 0xa104 }, + { 0xa438, 0x1000 }, { 0xa438, 0x112a }, { 0xa438, 0x8104 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1121 }, { 0xa438, 0xaa2f }, + { 0xa438, 0xd70c }, { 0xa438, 0x438b }, { 0xa438, 0xa284 }, + { 0xa438, 0xd078 }, { 0xa438, 0x800a }, { 0xa438, 0x8110 }, + { 0xa438, 0xa284 }, { 0xa438, 0x8404 }, { 0xa438, 0x0c03 }, + { 0xa438, 0x1502 }, { 0xa438, 0xa108 }, { 0xa438, 0x9503 }, + { 0xa438, 0x0c03 }, { 0xa438, 0x1502 }, { 0xa438, 0x0c1f }, + { 0xa438, 0x0f19 }, { 0xa438, 0x9503 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1175 }, { 0xa438, 0xd70c }, { 0xa438, 0x5fb3 }, + { 0xa438, 0x0c03 }, { 0xa438, 0x1502 }, { 0xa438, 0x8f1f }, + { 0xa438, 0x9503 }, { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, + { 0xa438, 0xd70c }, { 0xa438, 0x7f33 }, { 0xa438, 0x0c1f }, + { 0xa438, 0x0d06 }, { 0xa438, 0x8dc0 }, { 0xa438, 0x1000 }, + { 0xa438, 0x11bd }, { 0xa438, 0x8110 }, { 0xa438, 0xa284 }, + { 0xa438, 0xa404 }, { 0xa438, 0xa00a }, { 0xa438, 0xd70c }, + { 0xa438, 0x40a1 }, { 0xa438, 0x0c03 }, { 0xa438, 0x1502 }, + { 0xa438, 0xad10 }, { 0xa438, 0x9503 }, { 0xa438, 0xd70c }, + { 0xa438, 0x414b }, { 0xa438, 0x0cc0 }, { 0xa438, 0x0080 }, + { 0xa438, 0x0c03 }, { 0xa438, 0x0102 }, { 0xa438, 0x0ce0 }, + { 0xa438, 0x0340 }, { 0xa438, 0xcc52 }, { 0xa438, 0x1800 }, + { 0xa438, 0x816b }, { 0xa438, 0x80c0 }, { 0xa438, 0x8103 }, + { 0xa438, 0x83e0 }, { 0xa438, 0x8cff }, { 0xa438, 0xd193 }, + { 0xa438, 0xd047 }, { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1193 }, { 0xa438, 0xd700 }, + { 0xa438, 0x5f74 }, { 0xa438, 0xa110 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1175 }, { 0xa438, 0x1000 }, { 0xa438, 0x1193 }, + { 0xa438, 0xd700 }, { 0xa438, 0x5f6a }, { 0xa438, 0xa180 }, + { 0xa438, 0xd1f5 }, { 0xa438, 0xd049 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1175 }, { 0xa438, 0x1000 }, { 0xa438, 0x1193 }, + { 0xa438, 0xd700 }, { 0xa438, 0x5f74 }, { 0xa438, 0x8710 }, + { 0xa438, 0xa00a }, { 0xa438, 0x8190 }, { 0xa438, 0x8204 }, + { 0xa438, 0xa280 }, { 0xa438, 0xa404 }, { 0xa438, 0xbb80 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, { 0xa438, 0xd71f }, + { 0xa438, 0x5fb4 }, { 0xa438, 0xb920 }, { 0xa438, 0x9b80 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, { 0xa438, 0xd71f }, + { 0xa438, 0x7fb4 }, { 0xa438, 0x9920 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1175 }, { 0xa438, 0xcb33 }, { 0xa438, 0xd71f }, + { 0xa438, 0x6105 }, { 0xa438, 0x5f74 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1175 }, { 0xa438, 0xd700 }, { 0xa438, 0x5fa7 }, + { 0xa438, 0x1800 }, { 0xa438, 0x818e }, { 0xa438, 0xa710 }, + { 0xa438, 0xb820 }, { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, + { 0xa438, 0xd71f }, { 0xa438, 0x7f65 }, { 0xa438, 0x9820 }, + { 0xa438, 0x1800 }, { 0xa438, 0x81f1 }, { 0xa438, 0x0c1f }, + { 0xa438, 0x0d04 }, { 0xa438, 0x8dc0 }, { 0xa438, 0x1000 }, + { 0xa438, 0x11bd }, { 0xa438, 0xa00a }, { 0xa438, 0x8280 }, + { 0xa438, 0xa710 }, { 0xa438, 0xd103 }, { 0xa438, 0xd04c }, + { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, { 0xa438, 0xd700 }, + { 0xa438, 0x5fb4 }, { 0xa438, 0x0c1f }, { 0xa438, 0x0d06 }, + { 0xa438, 0x8dc0 }, { 0xa438, 0x1000 }, { 0xa438, 0x11bd }, + { 0xa438, 0x8710 }, { 0xa438, 0xa190 }, { 0xa438, 0xa204 }, + { 0xa438, 0x8280 }, { 0xa438, 0xa404 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1175 }, { 0xa438, 0xd700 }, { 0xa438, 0x5fa7 }, + { 0xa438, 0xa00a }, { 0xa438, 0xa110 }, { 0xa438, 0xa284 }, + { 0xa438, 0xa404 }, { 0xa438, 0xcb33 }, { 0xa438, 0xd71f }, + { 0xa438, 0x5f54 }, { 0xa438, 0xb920 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1175 }, { 0xa438, 0xd71f }, { 0xa438, 0x7fb4 }, + { 0xa438, 0x9920 }, { 0xa438, 0x1000 }, { 0xa438, 0x1175 }, + { 0xa438, 0xd71f }, { 0xa438, 0x6145 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0xa438, 0x8018 }, + { 0xa438, 0xad25 }, { 0xa438, 0x15ee }, { 0xa438, 0x8f96 }, + { 0xa438, 0x00d0 }, { 0xa438, 0x08e4 }, { 0xa438, 0x8f92 }, + { 0xa438, 0xe48f }, { 0xa438, 0x93e4 }, { 0xa438, 0x8f94 }, + { 0xa438, 0xe48f }, { 0xa438, 0x9502 }, { 0xa438, 0x888e }, + { 0xa438, 0xfc04 }, { 0xa438, 0xf9e2 }, { 0xa438, 0x845d }, + { 0xa438, 0xe38f }, { 0xa438, 0x910d }, { 0xa438, 0x345b }, + { 0xa438, 0x0f1a }, { 0xa438, 0x32ac }, { 0xa438, 0x3c09 }, + { 0xa438, 0x0c34 }, { 0xa438, 0x5bf0 }, { 0xa438, 0xe784 }, + { 0xa438, 0xf7ae }, { 0xa438, 0x04ee }, { 0xa438, 0x84f7 }, + { 0xa438, 0xf0e3 }, { 0xa438, 0x8f91 }, { 0xa438, 0x5b0f }, + { 0xa438, 0x1b23 }, { 0xa438, 0xac37 }, { 0xa438, 0x0ae3 }, + { 0xa438, 0x84f7 }, { 0xa438, 0x1e32 }, { 0xa438, 0xe784 }, + { 0xa438, 0xf7ae }, { 0xa438, 0x00fd }, { 0xa438, 0x04f8 }, + { 0xa438, 0xfaef }, { 0xa438, 0x69fa }, { 0xa438, 0xfbd2 }, + { 0xa438, 0x01d3 }, { 0xa438, 0x04d6 }, { 0xa438, 0x8f92 }, + { 0xa438, 0xd78f }, { 0xa438, 0x7bef }, { 0xa438, 0x97d9 }, + { 0xa438, 0xef96 }, { 0xa438, 0xd81b }, { 0xa438, 0x109e }, + { 0xa438, 0x0480 }, { 0xa438, 0xdcd2 }, { 0xa438, 0x0016 }, + { 0xa438, 0x1783 }, { 0xa438, 0x9fed }, { 0xa438, 0xfffe }, + { 0xa438, 0xef96 }, { 0xa438, 0xfefc }, { 0xa438, 0x04f8 }, + { 0xa438, 0xf9fa }, { 0xa438, 0xfbef }, { 0xa438, 0x79fb }, + { 0xa438, 0xcffb }, { 0xa438, 0xd200 }, { 0xa438, 0xbe00 }, + { 0xa438, 0x00ef }, { 0xa438, 0x1229 }, { 0xa438, 0x40d0 }, + { 0xa438, 0x041c }, { 0xa438, 0x081a }, { 0xa438, 0x10bf }, + { 0xa438, 0x8b27 }, { 0xa438, 0x0272 }, { 0xa438, 0xbd02 }, + { 0xa438, 0x89ee }, { 0xa438, 0xbf8f }, { 0xa438, 0x7fef }, + { 0xa438, 0x1249 }, { 0xa438, 0x021a }, { 0xa438, 0x91d8 }, + { 0xa438, 0x19d9 }, { 0xa438, 0xef74 }, { 0xa438, 0x0271 }, + { 0xa438, 0xccef }, { 0xa438, 0x47dd }, { 0xa438, 0x89dc }, + { 0xa438, 0x18a8 }, { 0xa438, 0x0002 }, { 0xa438, 0xd202 }, + { 0xa438, 0x8990 }, { 0xa438, 0x12a2 }, { 0xa438, 0x04c8 }, + { 0xa438, 0xffc7 }, { 0xa438, 0xffef }, { 0xa438, 0x97ff }, + { 0xa438, 0xfefd }, { 0xa438, 0xfc04 }, { 0xa438, 0xf8f9 }, + { 0xa438, 0xfafb }, { 0xa438, 0xef79 }, { 0xa438, 0xfbbf }, + { 0xa438, 0x8f7f }, { 0xa438, 0xef12 }, { 0xa438, 0x4902 }, + { 0xa438, 0x1a91 }, { 0xa438, 0xd819 }, { 0xa438, 0xd9ef }, + { 0xa438, 0x64bf }, { 0xa438, 0x8f87 }, { 0xa438, 0xef12 }, + { 0xa438, 0x4902 }, { 0xa438, 0x1a91 }, { 0xa438, 0xd819 }, + { 0xa438, 0xd9ef }, { 0xa438, 0x7489 }, { 0xa438, 0x0271 }, + { 0xa438, 0xb1ad }, { 0xa438, 0x502c }, { 0xa438, 0xef46 }, + { 0xa438, 0xdc19 }, { 0xa438, 0xdda2 }, { 0xa438, 0x0006 }, + { 0xa438, 0xbf8b }, { 0xa438, 0x0f02 }, { 0xa438, 0x72dc }, + { 0xa438, 0xa201 }, { 0xa438, 0x06bf }, { 0xa438, 0x8b12 }, + { 0xa438, 0x0272 }, { 0xa438, 0xdca2 }, { 0xa438, 0x0206 }, + { 0xa438, 0xbf8b }, { 0xa438, 0x1502 }, { 0xa438, 0x72dc }, + { 0xa438, 0xbf8b }, { 0xa438, 0x1802 }, { 0xa438, 0x72dc }, + { 0xa438, 0xbf8f }, { 0xa438, 0x7b1a }, { 0xa438, 0x92dd }, + { 0xa438, 0xffef }, { 0xa438, 0x97ff }, { 0xa438, 0xfefd }, + { 0xa438, 0xfc04 }, { 0xa438, 0xf9f8 }, { 0xa438, 0xfbef }, + { 0xa438, 0x79fb }, { 0xa438, 0x028a }, { 0xa438, 0xa0bf }, + { 0xa438, 0x8b1b }, { 0xa438, 0x0272 }, { 0xa438, 0x9a16 }, + { 0xa438, 0xbf8b }, { 0xa438, 0x1e02 }, { 0xa438, 0x72dc }, + { 0xa438, 0xac28 }, { 0xa438, 0x02ae }, { 0xa438, 0xf4d6 }, + { 0xa438, 0x0000 }, { 0xa438, 0xbf8b }, { 0xa438, 0x1b02 }, + { 0xa438, 0x7291 }, { 0xa438, 0xae03 }, { 0xa438, 0x028a }, + { 0xa438, 0x8ad2 }, { 0xa438, 0x00d7 }, { 0xa438, 0x0000 }, + { 0xa438, 0xe18f }, { 0xa438, 0x8f1b }, { 0xa438, 0x12a1 }, + { 0xa438, 0x0004 }, { 0xa438, 0xef67 }, { 0xa438, 0xae1d }, + { 0xa438, 0xef12 }, { 0xa438, 0xbf8b }, { 0xa438, 0x2102 }, + { 0xa438, 0x72bd }, { 0xa438, 0x12bf }, { 0xa438, 0x8b24 }, + { 0xa438, 0x0272 }, { 0xa438, 0xdcef }, { 0xa438, 0x64ad }, + { 0xa438, 0x4f04 }, { 0xa438, 0x7eff }, { 0xa438, 0xff16 }, + { 0xa438, 0x0271 }, { 0xa438, 0xccae }, { 0xa438, 0xd7bf }, + { 0xa438, 0x8b2d }, { 0xa438, 0x0272 }, { 0xa438, 0x91ff }, + { 0xa438, 0xef97 }, { 0xa438, 0xfffc }, { 0xa438, 0xfd04 }, + { 0xa438, 0xf8fa }, { 0xa438, 0xef69 }, { 0xa438, 0xd104 }, + { 0xa438, 0xbf8f }, { 0xa438, 0x92d8 }, { 0xa438, 0x10dc }, + { 0xa438, 0x1981 }, { 0xa438, 0x9ff9 }, { 0xa438, 0xef96 }, + { 0xa438, 0xfefc }, { 0xa438, 0x04f8 }, { 0xa438, 0xfbfa }, + { 0xa438, 0xef69 }, { 0xa438, 0xbf8f }, { 0xa438, 0x87d0 }, + { 0xa438, 0x08d1 }, { 0xa438, 0xff02 }, { 0xa438, 0x8a7c }, + { 0xa438, 0xef96 }, { 0xa438, 0xfeff }, { 0xa438, 0xfc04 }, + { 0xa438, 0xf8fa }, { 0xa438, 0xef69 }, { 0xa438, 0xdd19 }, + { 0xa438, 0x809f }, { 0xa438, 0xfbef }, { 0xa438, 0x96fe }, + { 0xa438, 0xfc04 }, { 0xa438, 0xf8e0 }, { 0xa438, 0x8044 }, + { 0xa438, 0xf624 }, { 0xa438, 0xe480 }, { 0xa438, 0x44fc }, + { 0xa438, 0x04f8 }, { 0xa438, 0xe080 }, { 0xa438, 0x4ff6 }, + { 0xa438, 0x24e4 }, { 0xa438, 0x804f }, { 0xa438, 0xfc04 }, + { 0xa438, 0xf8fa }, { 0xa438, 0xfbef }, { 0xa438, 0x79fb }, + { 0xa438, 0xbf8b }, { 0xa438, 0x2a02 }, { 0xa438, 0x7291 }, + { 0xa438, 0xbf8b }, { 0xa438, 0x3302 }, { 0xa438, 0x7291 }, + { 0xa438, 0xd68b }, { 0xa438, 0x2dd7 }, { 0xa438, 0x8b30 }, + { 0xa438, 0x0116 }, { 0xa438, 0xad50 }, { 0xa438, 0x0cbf }, + { 0xa438, 0x8b2a }, { 0xa438, 0x0272 }, { 0xa438, 0x9abf }, + { 0xa438, 0x8b33 }, { 0xa438, 0x0272 }, { 0xa438, 0x9aff }, + { 0xa438, 0xef97 }, { 0xa438, 0xfffe }, { 0xa438, 0xfc04 }, + { 0xa438, 0xf8f9 }, { 0xa438, 0xfaef }, { 0xa438, 0x49f8 }, + { 0xa438, 0xccf8 }, { 0xa438, 0xef96 }, { 0xa438, 0x0272 }, + { 0xa438, 0x9a1f }, { 0xa438, 0x22c7 }, { 0xa438, 0xbd02 }, + { 0xa438, 0x72dc }, { 0xa438, 0xac28 }, { 0xa438, 0x16ac }, + { 0xa438, 0x3008 }, { 0xa438, 0x0271 }, { 0xa438, 0xe4ef }, + { 0xa438, 0x6712 }, { 0xa438, 0xaeee }, { 0xa438, 0xd700 }, + { 0xa438, 0x0202 }, { 0xa438, 0x71ff }, { 0xa438, 0xac50 }, + { 0xa438, 0x05ae }, { 0xa438, 0xe3d7 }, { 0xa438, 0x0000 }, + { 0xa438, 0xfcc4 }, { 0xa438, 0xfcef }, { 0xa438, 0x94fe }, + { 0xa438, 0xfdfc }, { 0xa438, 0x04cc }, { 0xa438, 0xc010 }, + { 0xa438, 0x44ac }, { 0xa438, 0x0030 }, { 0xa438, 0xbce0 }, + { 0xa438, 0x74bc }, { 0xa438, 0xe0b8 }, { 0xa438, 0xbce0 }, + { 0xa438, 0xfcbc }, { 0xa438, 0xe011 }, { 0xa438, 0xacb4 }, + { 0xa438, 0xddac }, { 0xa438, 0xb6fa }, { 0xa438, 0xacb4 }, + { 0xa438, 0xf0ac }, { 0xa438, 0xba92 }, { 0xa438, 0xacb4 }, + { 0xa438, 0xffac }, { 0xa438, 0x5600 }, { 0xa438, 0xacb4 }, + { 0xa438, 0xccac }, { 0xa438, 0xb6ff }, { 0xa438, 0xb034 }, + { 0xa436, 0xb818 }, { 0xa438, 0x2ae4 }, { 0xa436, 0xb81a }, + { 0xa438, 0x380a }, { 0xa436, 0xb81c }, { 0xa438, 0x3edd }, + { 0xa436, 0xb81e }, { 0xa438, 0x41a3 }, { 0xa436, 0xb850 }, + { 0xa438, 0x0684 }, { 0xa436, 0xb852 }, { 0xa438, 0x1c02 }, + { 0xa436, 0xb878 }, { 0xa438, 0x1b70 }, { 0xa436, 0xb884 }, + { 0xa438, 0x0633 }, { 0xa436, 0xb832 }, { 0xa438, 0x00ff }, + { 0xa436, 0xacfc }, { 0xa438, 0x0100 }, { 0xa436, 0xacfe }, + { 0xa438, 0x8000 }, { 0xa436, 0xad00 }, { 0xa438, 0x27ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3c67 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x000f }, { 0xa436, 0xad00 }, + { 0xa438, 0x47ff }, { 0xa436, 0xad02 }, { 0xa438, 0x3e67 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x000f }, + { 0xa436, 0xad00 }, { 0xa438, 0x67ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3067 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x000f }, { 0xa436, 0xad00 }, { 0xa438, 0x87ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3267 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x000f }, { 0xa436, 0xad00 }, + { 0xa438, 0xa7ff }, { 0xa436, 0xad02 }, { 0xa438, 0x3467 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x000f }, + { 0xa436, 0xad00 }, { 0xa438, 0xcfff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3667 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x000f }, { 0xa436, 0xad00 }, { 0xa438, 0xefff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3867 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x000f }, { 0xa436, 0xad00 }, + { 0xa438, 0x0fff }, { 0xa436, 0xad02 }, { 0xa438, 0x3a67 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x000f }, + { 0xa436, 0xad00 }, { 0xa438, 0x2fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3ce7 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x4fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3ee7 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x6fff }, { 0xa436, 0xad02 }, { 0xa438, 0x30e7 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x8fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x32e7 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xafff }, + { 0xa436, 0xad02 }, { 0xa438, 0x34e7 }, { 0xa436, 0xad04 }, + { 0xa438, 0x1008 }, { 0xa436, 0xad06 }, { 0xa438, 0xfff4 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0x36ff }, + { 0xa436, 0xad04 }, { 0xa438, 0x1048 }, { 0xa436, 0xad06 }, + { 0xa438, 0xfff5 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0x38ff }, { 0xa436, 0xad04 }, { 0xa438, 0x1088 }, + { 0xa436, 0xad06 }, { 0xa438, 0xfff6 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3aff }, { 0xa436, 0xad04 }, + { 0xa438, 0x10c8 }, { 0xa436, 0xad06 }, { 0xa438, 0xf417 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xffff }, + { 0xa436, 0xad04 }, { 0xa438, 0x1109 }, { 0xa436, 0xad06 }, + { 0xa438, 0xf434 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x0207 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, { 0xa438, 0x1149 }, + { 0xa436, 0xad06 }, { 0xa438, 0x0455 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x2227 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, + { 0xa438, 0x1189 }, { 0xa436, 0xad06 }, { 0xa438, 0x1476 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x4247 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, + { 0xa436, 0xad04 }, { 0xa438, 0x11c9 }, { 0xa436, 0xad06 }, + { 0xa438, 0x2517 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x6267 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, { 0xa438, 0x1209 }, + { 0xa436, 0xad06 }, { 0xa438, 0x3534 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, + { 0xa438, 0x1249 }, { 0xa436, 0xad06 }, { 0xa438, 0x0555 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x2027 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, + { 0xa436, 0xad04 }, { 0xa438, 0x1289 }, { 0xa436, 0xad06 }, + { 0xa438, 0x1576 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x4047 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, { 0xa438, 0x12c9 }, + { 0xa436, 0xad06 }, { 0xa438, 0x2517 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x6067 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, + { 0xa438, 0x1309 }, { 0xa436, 0xad06 }, { 0xa438, 0x3534 }, + { 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}, { 0xa438, 0x000d }, + { 0xa436, 0xad06 }, { 0xa438, 0x3434 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x9a9f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, + { 0xa438, 0x004d }, { 0xa436, 0xad06 }, { 0xa438, 0x0455 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xbabf }, { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, + { 0xa436, 0xad04 }, { 0xa438, 0x008d }, { 0xa436, 0xad06 }, + { 0xa438, 0x1476 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xdadf }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, { 0xa438, 0x00cd }, + { 0xa436, 0xad06 }, { 0xa438, 0x2c17 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xfaf8 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, + { 0xa438, 0x400d }, { 0xa436, 0xad06 }, { 0xa438, 0x3c34 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x8187 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0x404d }, { 0xa436, 0xad06 }, + { 0xa438, 0x0c55 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xa1a7 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0x408d }, + { 0xa436, 0xad06 }, { 0xa438, 0x1c76 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xc1c7 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, + { 0xa438, 0x40cd }, { 0xa436, 0xad06 }, { 0xa438, 0x2c97 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xe1e7 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0x800d }, { 0xa436, 0xad06 }, + { 0xa438, 0x3cb4 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x898f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0x804d }, + { 0xa436, 0xad06 }, { 0xa438, 0x0cd5 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xa9af }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, + { 0xa438, 0x808d }, { 0xa436, 0xad06 }, { 0xa438, 0x1cf6 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xc9cf }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0x80cd }, { 0xa436, 0xad06 }, + { 0xa438, 0x2d17 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xe9ef }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0xc00d }, + { 0xa436, 0xad06 }, { 0xa438, 0x3d34 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x9197 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, + { 0xa438, 0xc04d }, { 0xa436, 0xad06 }, { 0xa438, 0x0d55 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xb1b7 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0xc08d }, { 0xa436, 0xad06 }, + { 0xa438, 0x1d76 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xd1d7 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0xc0cd }, + { 0xa436, 0xad06 }, { 0xa438, 0x2d97 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xf1f7 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x3dbf }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x999f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x0ddf }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xb9bf }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0x1dff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xd9df }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x2fff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xf9ff }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x3fff }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xd7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe7 }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xf7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe7 }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x17ff }, { 0xa436, 0xad02 }, { 0xa438, 0xffe7 }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x37ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3d67 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x57ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3f67 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x77ff }, { 0xa436, 0xad02 }, { 0xa438, 0x3167 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x97ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3367 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xb7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3567 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xdfff }, { 0xa436, 0xad02 }, { 0xa438, 0x3767 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3967 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x1fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3b67 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x3fff }, { 0xa436, 0xad02 }, { 0xa438, 0x3de7 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x5fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3fe7 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x7fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x31e7 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x9fff }, { 0xa436, 0xad02 }, { 0xa438, 0x33e7 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xbfff }, { 0xa436, 0xad02 }, + { 0xa438, 0x35e7 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x07ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x37e6 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x27ff }, { 0xa436, 0xad02 }, { 0xa438, 0x39e6 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x47ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3be6 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x67ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x2066 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x07ff }, { 0xa436, 0xad02 }, { 0xa438, 0x2264 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x27ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x2464 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x47ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x2664 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x67ff }, { 0xa436, 0xad02 }, { 0xa438, 0x0064 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x87ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0264 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xa7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x0464 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xc7ff }, { 0xa436, 0xad02 }, { 0xa438, 0x0664 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xe7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0864 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x07ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x0a65 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x27ff }, { 0xa436, 0xad02 }, { 0xa438, 0x0c65 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x47ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0e65 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x67ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x1065 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x87ff }, { 0xa436, 0xad02 }, { 0xa438, 0x1266 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xa7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x1466 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xc7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x1666 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xe7ff }, { 0xa436, 0xad02 }, { 0xa438, 0x2866 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x0fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x2a66 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x2fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x2c66 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x4fff }, { 0xa436, 0xad02 }, { 0xa438, 0x2e66 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x6fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x20e6 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x0fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x22e4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x2fff }, { 0xa436, 0xad02 }, { 0xa438, 0x24e4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x4fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x26e4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x6fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x00e4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x8fff }, { 0xa436, 0xad02 }, { 0xa438, 0x02e4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xafff }, { 0xa436, 0xad02 }, + { 0xa438, 0x04e4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xcfff }, + { 0xa436, 0xad02 }, { 0xa438, 0x06e4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xefff }, { 0xa436, 0xad02 }, { 0xa438, 0x08e4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x0fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0ae5 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x2fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x0ce5 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x4fff }, { 0xa436, 0xad02 }, { 0xa438, 0x0ee5 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x6fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x10e5 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x8fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x12e6 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xafff }, { 0xa436, 0xad02 }, { 0xa438, 0x14e6 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xcfff }, { 0xa436, 0xad02 }, + { 0xa438, 0x16e6 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xefff }, + { 0xa436, 0xad02 }, { 0xa438, 0x28e6 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x17ff }, { 0xa436, 0xad02 }, { 0xa438, 0x2ae6 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x37ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x2ce6 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x57ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x2ee6 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x77ff }, { 0xa436, 0xad02 }, { 0xa438, 0x2166 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x17ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x2364 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x37ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x2564 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x57ff }, { 0xa436, 0xad02 }, { 0xa438, 0x2764 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x77ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0164 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x97ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x0364 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xb7ff }, { 0xa436, 0xad02 }, { 0xa438, 0x0564 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xd7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0764 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xf7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x0964 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x17ff }, { 0xa436, 0xad02 }, { 0xa438, 0x0b65 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x37ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0d65 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x57ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x0f65 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x77ff }, { 0xa436, 0xad02 }, { 0xa438, 0x1165 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x97ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x1366 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xb7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x1566 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xd7ff }, { 0xa436, 0xad02 }, { 0xa438, 0x1766 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xf7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x2966 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x1fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x2b66 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x3fff }, { 0xa436, 0xad02 }, { 0xa438, 0x2d66 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x5fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x2f66 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x7fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x21e6 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x1fff }, { 0xa436, 0xad02 }, { 0xa438, 0x23e4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x3fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x25e4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x5fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x27e4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x7fff }, { 0xa436, 0xad02 }, { 0xa438, 0x01e4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x9fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x03e4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xbfff }, + { 0xa436, 0xad02 }, { 0xa438, 0x05e4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xdfff }, { 0xa436, 0xad02 }, { 0xa438, 0x07e4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0x09e4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x1fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x0be5 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x3fff }, { 0xa436, 0xad02 }, { 0xa438, 0x0de5 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x5fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0fe5 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x7fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x11e5 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x9fff }, { 0xa436, 0xad02 }, { 0xa438, 0x13e6 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xbfff }, { 0xa436, 0xad02 }, + { 0xa438, 0x15e6 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xdfff }, + { 0xa436, 0xad02 }, { 0xa438, 0x17e6 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0x29e6 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x87ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x2be5 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xa7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x2de5 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xc7ff }, { 0xa436, 0xad02 }, { 0xa438, 0x2fe5 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xe7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x1865 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x8fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x1a65 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xafff }, { 0xa436, 0xad02 }, { 0xa438, 0x1c65 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xcfff }, { 0xa436, 0xad02 }, + { 0xa438, 0x1e65 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xefff }, + { 0xa436, 0xad02 }, { 0xa438, 0x18e5 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x97ff }, { 0xa436, 0xad02 }, { 0xa438, 0x1ae5 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xb7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x1ce5 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xd7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x1ee5 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xf7ff }, { 0xa436, 0xad02 }, { 0xa438, 0x1965 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x9fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x1b65 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xbfff }, + { 0xa436, 0xad02 }, { 0xa438, 0x1d65 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xdfff }, { 0xa436, 0xad02 }, { 0xa438, 0x1f65 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0x19e5 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x07ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x1b9c }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x27ff }, { 0xa436, 0xad02 }, { 0xa438, 0x1d9c }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x0fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x1f9c }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x2fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x589c }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x17ff }, { 0xa436, 0xad02 }, { 0xa438, 0x5c9c }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x37ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x599c }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x1fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x5d9c }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x3fff }, { 0xa436, 0xad02 }, { 0xa438, 0x5a9c }, + { 0xa436, 0xad04 }, { 0xa438, 0x100e }, { 0xa436, 0xad06 }, + { 0xa438, 0xfff6 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0x5eff }, { 0xa436, 0xad04 }, { 0xa438, 0x104e }, + { 0xa436, 0xad06 }, { 0xa438, 0xfff7 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0x5bff }, { 0xa436, 0xad04 }, + { 0xa438, 0x110e }, { 0xa436, 0xad06 }, { 0xa438, 0xfff6 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0x5fff }, + { 0xa436, 0xad04 }, { 0xa438, 0x114e }, { 0xa436, 0xad06 }, + { 0xa438, 0xf817 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffff }, { 0xa436, 0xad04 }, { 0xa438, 0x120f }, + { 0xa436, 0xad06 }, { 0xa438, 0xf836 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xc3c7 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0x124f }, { 0xa436, 0xad06 }, { 0xa438, 0x0997 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0xe3e7 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0x130f }, { 0xa436, 0xad06 }, + { 0xa438, 0x19b6 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x0307 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0x134f }, + { 0xa436, 0xad06 }, { 0xa438, 0x4917 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0x2327 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0x510f }, { 0xa436, 0xad06 }, { 0xa438, 0x5936 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0x4347 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0x514f }, { 0xa436, 0xad06 }, + { 0xa438, 0x0997 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x6367 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0x500f }, + { 0xa436, 0xad06 }, { 0xa438, 0x19b6 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0x8387 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0x504f }, { 0xa436, 0xad06 }, { 0xa438, 0x4817 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0xa3a7 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0x520f }, { 0xa436, 0xad06 }, + { 0xa438, 0x5836 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0xcbcf }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0x524f }, + { 0xa436, 0xad06 }, { 0xa438, 0x0997 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0xebef }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0x530f }, { 0xa436, 0xad06 }, { 0xa438, 0x19b6 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0x0b0f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0x534f }, { 0xa436, 0xad06 }, + { 0xa438, 0x4917 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x2b2f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0x920f }, + { 0xa436, 0xad06 }, { 0xa438, 0x5936 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0x4b4f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0x924f }, { 0xa436, 0xad06 }, { 0xa438, 0x0997 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0x6b6f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0x900f }, { 0xa436, 0xad06 }, + { 0xa438, 0x19b6 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x8b8f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0x904f }, + { 0xa436, 0xad06 }, { 0xa438, 0x4817 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0xabaf }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0x910f }, { 0xa436, 0xad06 }, { 0xa438, 0x5836 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0xd3d7 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0x914f }, { 0xa436, 0xad06 }, + { 0xa438, 0x0997 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0xf3f7 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0x930f }, + { 0xa436, 0xad06 }, { 0xa438, 0x19b6 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0x1317 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0x934f }, { 0xa436, 0xad06 }, { 0xa438, 0x4917 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0x3337 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0xd30f }, { 0xa436, 0xad06 }, + { 0xa438, 0x5936 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x5357 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0xd34f }, + { 0xa436, 0xad06 }, { 0xa438, 0x0997 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0x7377 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0xd00f }, { 0xa436, 0xad06 }, { 0xa438, 0x19b6 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0x9397 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0xd04f }, { 0xa436, 0xad06 }, + { 0xa438, 0x4817 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0xb3b7 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0xd10f }, + { 0xa436, 0xad06 }, { 0xa438, 0x5836 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0xdbdf }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0xd14f }, { 0xa436, 0xad06 }, { 0xa438, 0x0997 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0xfbff }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0xd20f }, { 0xa436, 0xad06 }, + { 0xa438, 0x19b6 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x1b1f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0xd24f }, + { 0xa436, 0xad06 }, { 0xa438, 0x4917 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0x3b3f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x593f }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0x5b5f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x099f }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x7b7f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0x19bf }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0x9b9f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x4fff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0xbbbf }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x5fff }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x07ff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffa4 }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x27ff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffa4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x47ff }, { 0xa436, 0xad02 }, { 0xa438, 0xffa4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x67ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x58a4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x0fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x5ca4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x2fff }, { 0xa436, 0xad02 }, { 0xa438, 0x50a4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x4fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x54a4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x6fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x59a4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x17ff }, { 0xa436, 0xad02 }, { 0xa438, 0x5da4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x37ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x51a4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x57ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x55a4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x77ff }, { 0xa436, 0xad02 }, { 0xa438, 0x5aa4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x1fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x5ea4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x3fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x52a4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x5fff }, { 0xa436, 0xad02 }, { 0xa438, 0x56a4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x7fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x5ba4 }, { 0xa436, 0xad04 }, { 0xa438, 0x2a06 }, + { 0xa436, 0xad06 }, { 0xa438, 0xfff6 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0x5fff }, { 0xa436, 0xad04 }, + { 0xa438, 0x2b06 }, { 0xa436, 0xad06 }, { 0xa438, 0xfff7 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0x53ff }, + { 0xa436, 0xad04 }, { 0xa438, 0x2a06 }, { 0xa436, 0xad06 }, + { 0xa438, 0xfff4 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0x57ff }, { 0xa436, 0xad04 }, { 0xa438, 0x2b06 }, + { 0xa436, 0xad06 }, { 0xa438, 0xf615 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffff }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0xf63f }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xffff }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x069f }, { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffff }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0x16bf }, { 0xa436, 0xad08 }, + { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffff }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x4fff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xd0ff }, + { 0xa436, 0xad04 }, { 0xa438, 0x6a46 }, { 0xa436, 0xad06 }, + { 0xa438, 0x5ff6 }, { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xd4ff }, { 0xa436, 0xad04 }, { 0xa438, 0x6b46 }, + { 0xa436, 0xad06 }, { 0xa438, 0xfff7 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xd8ff }, { 0xa436, 0xad04 }, + { 0xa438, 0x6a46 }, { 0xa436, 0xad06 }, { 0xa438, 0xfff4 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xdcff }, + { 0xa436, 0xad04 }, { 0xa438, 0x6b46 }, { 0xa436, 0xad06 }, + { 0xa438, 0xf615 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffff }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0xf63f }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffff }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x069f }, + { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xffff }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x16bf }, { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffff }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0x4fff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xd1ff }, { 0xa436, 0xad04 }, + { 0xa438, 0xaa86 }, { 0xa436, 0xad06 }, { 0xa438, 0x5ff6 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xd5ff }, + { 0xa436, 0xad04 }, { 0xa438, 0xab86 }, { 0xa436, 0xad06 }, + { 0xa438, 0xfff7 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xd9ff }, { 0xa436, 0xad04 }, { 0xa438, 0xaa86 }, + { 0xa436, 0xad06 }, { 0xa438, 0xfff4 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xddff }, { 0xa436, 0xad04 }, + { 0xa438, 0xab86 }, { 0xa436, 0xad06 }, { 0xa438, 0xf615 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xffff }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0xf63f }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffff }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0x069f }, { 0xa436, 0xad08 }, + { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffff }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x16bf }, + { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xffff }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x4fff }, { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xd2ff }, { 0xa436, 0xad04 }, { 0xa438, 0xeac6 }, + { 0xa436, 0xad06 }, { 0xa438, 0x5ff6 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xd6ff }, { 0xa436, 0xad04 }, + { 0xa438, 0xebc6 }, { 0xa436, 0xad06 }, { 0xa438, 0xfff7 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xdaff }, + { 0xa436, 0xad04 }, { 0xa438, 0xeac6 }, { 0xa436, 0xad06 }, + { 0xa438, 0xfff4 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xdeff }, { 0xa436, 0xad04 }, { 0xa438, 0xebc6 }, + { 0xa436, 0xad06 }, { 0xa438, 0xf615 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffff }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0xf63f }, + { 0xa436, 0xad08 }, { 0xa438, 0x0017 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xffff }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x069f }, { 0xa436, 0xad08 }, { 0xa438, 0x0013 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffff }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0x16bf }, { 0xa436, 0xad08 }, + { 0xa438, 0x0013 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffff }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x4fff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0013 }, { 0xa436, 0xad00 }, + { 0xa438, 0xfffa }, { 0xa436, 0xad02 }, { 0xa438, 0xd3ff }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0x5fff }, { 0xa436, 0xad08 }, { 0xa438, 0x0013 }, + { 0xa436, 0xad00 }, { 0xa438, 0xc7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0xd7e7 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0017 }, { 0xa436, 0xad00 }, { 0xa438, 0xe7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0xdbe7 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0017 }, { 0xa436, 0xad00 }, + { 0xa438, 0x07ff }, { 0xa436, 0xad02 }, { 0xa438, 0xdfe7 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0017 }, + { 0xa436, 0xacfc }, { 0xa438, 0x0000 }, { 0xa436, 0xaccc }, + { 0xa438, 0x2000 }, { 0xa436, 0xacce }, { 0xa438, 0x6000 }, + { 0xa436, 0xaccc }, { 0xa438, 0x2001 }, { 0xa436, 0xacce }, + { 0xa438, 0x6008 }, { 0xa436, 0xaccc }, { 0xa438, 0x2002 }, + { 0xa436, 0xacce }, { 0xa438, 0x6010 }, { 0xa436, 0xaccc }, + { 0xa438, 0x2003 }, { 0xa436, 0xacce }, { 0xa438, 0x6020 }, + { 0xa436, 0xaccc }, { 0xa438, 0x2004 }, { 0xa436, 0xacce }, + { 0xa438, 0x6060 }, { 0xa436, 0xaccc }, { 0xa438, 0x2005 }, + { 0xa436, 0xacce }, { 0xa438, 0x60a0 }, { 0xa436, 0xaccc }, + { 0xa438, 0x2006 }, { 0xa436, 0xacce }, { 0xa438, 0x60e0 }, + { 0xa436, 0xaccc }, { 0xa438, 0x2007 }, { 0xa436, 0xacce }, + { 0xa438, 0x6128 }, { 0xa436, 0xaccc }, { 0xa438, 0x2008 }, + { 0xa436, 0xacce }, { 0xa438, 0x6178 }, { 0xa436, 0xaccc }, + { 0xa438, 0x2009 }, { 0xa436, 0xacce }, { 0xa438, 0x61a8 }, + { 0xa436, 0xaccc }, { 0xa438, 0x200a }, { 0xa436, 0xacce }, + { 0xa438, 0x61f0 }, { 0xa436, 0xaccc }, { 0xa438, 0x200b }, + { 0xa436, 0xacce }, { 0xa438, 0x6248 }, { 0xa436, 0xaccc }, + { 0xa438, 0x200c }, { 0xa436, 0xacce }, { 0xa438, 0x6258 }, + { 0xa436, 0xaccc }, { 0xa438, 0x200d }, { 0xa436, 0xacce }, + { 0xa438, 0x6268 }, { 0xa436, 0xaccc }, { 0xa438, 0x200e }, + { 0xa436, 0xacce }, { 0xa438, 0x6270 }, { 0xa436, 0xaccc }, + { 0xa438, 0x200f }, { 0xa436, 0xacce }, { 0xa438, 0x6274 }, + { 0xa436, 0xaccc }, { 0xa438, 0x2010 }, { 0xa436, 0xacce }, + { 0xa438, 0x627c }, { 0xa436, 0xaccc }, { 0xa438, 0x2011 }, + { 0xa436, 0xacce }, { 0xa438, 0x6284 }, { 0xa436, 0xaccc }, + { 0xa438, 0x2012 }, { 0xa436, 0xacce }, { 0xa438, 0x6294 }, + { 0xa436, 0xaccc }, { 0xa438, 0x2013 }, { 0xa436, 0xacce }, + { 0xa438, 0x629c }, { 0xa436, 0xaccc }, { 0xa438, 0x2014 }, + { 0xa436, 0xacce }, { 0xa438, 0x62ac }, { 0xa436, 0xaccc }, + { 0xa438, 0x2015 }, { 0xa436, 0xacce }, { 0xa438, 0x62bc }, + { 0xa436, 0xaccc }, { 0xa438, 0x2016 }, { 0xa436, 0xacce }, + { 0xa438, 0x62c4 }, { 0xa436, 0xaccc }, { 0xa438, 0x2017 }, + { 0xa436, 0xacce }, { 0xa438, 0x7000 }, { 0xa436, 0xaccc }, + { 0xa438, 0x2018 }, { 0xa436, 0xacce }, { 0xa438, 0x6000 }, + { 0xa436, 0xaccc }, { 0xa438, 0x2019 }, { 0xa436, 0xacce }, + { 0xa438, 0x6000 }, { 0xa436, 0xaccc }, { 0xa438, 0x201a }, + { 0xa436, 0xacce }, { 0xa438, 0x6000 }, { 0xa436, 0xaccc }, + { 0xa438, 0x201b }, { 0xa436, 0xacce }, { 0xa438, 0x6000 }, + { 0xa436, 0xaccc }, { 0xa438, 0x201c }, { 0xa436, 0xacce }, + { 0xa438, 0x6000 }, { 0xa436, 0xaccc }, { 0xa438, 0x201d }, + { 0xa436, 0xacce }, { 0xa438, 0x6000 }, { 0xa436, 0xaccc }, + { 0xa438, 0x201e }, { 0xa436, 0xacce }, { 0xa438, 0x6000 }, + { 0xa436, 0xaccc }, { 0xa438, 0x201f }, { 0xa436, 0xacce }, + { 0xa438, 0x6000 }, { 0xa436, 0xacce }, { 0xa438, 0x0000 }, + { 0xa436, 0x0000 }, { 0xa438, 0x0000 }, { 0xb82e, 0x0000 }, + { 0xa436, 0x8023 }, { 0xa438, 0x0000 }, { 0xa436, 0x801e }, + { 0xa438, 0x0027 }, { 0xb820, 0x0000 }, { 0xb892, 0x0000 }, + { 0xb88e, 0xc15c }, { 0xb890, 0x0303 }, { 0xb890, 0x0506 }, + { 0xb890, 0x0807 }, { 0xb890, 0x090b }, { 0xb890, 0x0e12 }, + { 0xb890, 0x1617 }, { 0xb890, 0x1c24 }, { 0xb890, 0x2b37 }, + { 0xb890, 0x0203 }, { 0xb890, 0x0304 }, { 0xb890, 0x0504 }, + { 0xb890, 0x0506 }, { 0xb890, 0x0708 }, { 0xb890, 0x090a }, + { 0xb890, 0x0b0e }, { 0xb890, 0x1013 }, { 0xb890, 0x1519 }, + { 0xb890, 0x1d22 }, { 0xb890, 0x282e }, { 0xb890, 0x363e }, + { 0xb890, 0x474b }, { 0xb88e, 0xc196 }, { 0xb890, 0x3f5e }, + { 0xb890, 0xf834 }, { 0xb890, 0x6c01 }, { 0xb890, 0xa67f }, + { 0xb890, 0xa06c }, { 0xb890, 0x043b }, { 0xb890, 0x6190 }, + { 0xb890, 0x88db }, { 0xb890, 0x9ecd }, { 0xb890, 0x4dbc }, + { 0xb890, 0x6e0e }, { 0xb890, 0x9f2d }, { 0xb890, 0x2c18 }, + { 0xb890, 0x5e8c }, { 0xb890, 0x5bfe }, { 0xb890, 0x183c }, + { 0xb890, 0x23c9 }, { 0xb890, 0x3e84 }, { 0xb890, 0x3c20 }, + { 0xb890, 0xcc56 }, { 0xb890, 0x3480 }, { 0xb890, 0x0040 }, + { 0xb88e, 0xc00f }, { 0xb890, 0x3502 }, { 0xb890, 0x0203 }, + { 0xb890, 0x0303 }, { 0xb890, 0x0404 }, { 0xb890, 0x0506 }, + { 0xb890, 0x0607 }, { 0xb890, 0x080a }, { 0xb890, 0x0b0d }, + { 0xb890, 0x0e10 }, { 0xb890, 0x1114 }, { 0xb890, 0x171b }, + { 0xb890, 0x1f22 }, { 0xb890, 0x2832 }, { 0xb890, 0x0101 }, + { 0xb890, 0x0101 }, { 0xb890, 0x0202 }, { 0xb890, 0x0303 }, + { 0xb890, 0x0404 }, { 0xb890, 0x0506 }, { 0xb890, 0x0709 }, + { 0xb890, 0x0a0d }, { 0xb88e, 0xc047 }, { 0xb890, 0x365f }, + { 0xb890, 0xbe10 }, { 0xb890, 0x84e4 }, { 0xb890, 0x60e9 }, + { 0xb890, 0xa86a }, { 0xb890, 0xf1e3 }, { 0xb890, 0xf73f }, + { 0xb890, 0x5c02 }, { 0xb890, 0x9547 }, { 0xb890, 0xc30c }, + { 0xb890, 0xb064 }, { 0xb890, 0x079a }, { 0xb890, 0x1e23 }, + { 0xb890, 0x1b5d }, { 0xb890, 0x92e7 }, { 0xb890, 0x4baf }, + { 0xb890, 0x2386 }, { 0xb890, 0x01b6 }, { 0xb890, 0x6f82 }, + { 0xb890, 0xdc1c }, { 0xb890, 0x8c92 }, { 0xb88e, 0xc110 }, + { 0xb890, 0x0c7f }, { 0xb890, 0x1014 }, { 0xb890, 0x231d }, + { 0xb890, 0x2023 }, { 0xb890, 0x2628 }, { 0xb890, 0x2a2d }, + { 0xb890, 0x2d2c }, { 0xb890, 0x2c2e }, { 0xb890, 0x320d }, + { 0xb88e, 0xc186 }, { 0xb890, 0x0306 }, { 0xb890, 0x0804 }, + { 0xb890, 0x0406 }, { 0xb890, 0x0707 }, { 0xb890, 0x0709 }, + { 0xb890, 0x0b0f }, { 0xb890, 0x161d }, { 0xb890, 0x202a }, + { 0xb890, 0x3f5e }, { 0xb88e, 0xc1c1 }, { 0xb890, 0x0040 }, + { 0xb890, 0x5920 }, { 0xb890, 0x88cd }, { 0xb890, 0x1ca1 }, + { 0xb890, 0x3d20 }, { 0xb890, 0x3ae4 }, { 0xb890, 0x6a43 }, + { 0xb890, 0x30af }, { 0xb890, 0xdd16 }, { 0xb88e, 0xc283 }, + { 0xb890, 0x1611 }, { 0xb890, 0x161c }, { 0xb890, 0x2127 }, + { 0xb890, 0x2c32 }, { 0xb890, 0x373d }, { 0xb890, 0x4247 }, + { 0xb890, 0x4d52 }, { 0xb890, 0x585a }, { 0xb890, 0x0004 }, + { 0xb890, 0x080c }, { 0xb890, 0x1014 }, { 0xb890, 0x181b }, + { 0xb890, 0x1f23 }, { 0xb890, 0x272b }, { 0xb890, 0x2f33 }, + { 0xb890, 0x363a }, { 0xb890, 0x3e42 }, { 0xb890, 0x464a }, + { 0xb890, 0x4d51 }, { 0xb890, 0x5559 }, { 0xb890, 0x5d65 }, + { 0xb890, 0xe769 }, { 0xb890, 0xeb56 }, { 0xb890, 0xc04b }, + { 0xb890, 0xd502 }, { 0xb890, 0x2fb1 }, { 0xb890, 0x33b5 }, + { 0xb890, 0x37f8 }, { 0xb890, 0xbb98 }, { 0xb890, 0x7450 }, + { 0xb890, 0x4c48 }, { 0xb890, 0x12dc }, { 0xb890, 0xdcdc }, + { 0xb890, 0x934a }, { 0xb890, 0x3e33 }, { 0xb890, 0xe496 }, + { 0xb890, 0x724e }, { 0xb890, 0x2b07 }, { 0xb890, 0xe4c0 }, + { 0xb890, 0x9c79 }, { 0xb890, 0x5512 }, { 0xb88e, 0xc212 }, + { 0xb890, 0x2020 }, { 0xb890, 0x2020 }, { 0xb890, 0x2020 }, + { 0xb890, 0x2020 }, { 0xb890, 0x2020 }, { 0xb890, 0x2019 }, + { 0xb88e, 0xc24d }, { 0xb890, 0x8400 }, { 0xb890, 0x0000 }, + { 0xb890, 0x0000 }, { 0xb890, 0x0000 }, { 0xb890, 0x0000 }, + { 0xb890, 0x0000 }, { 0xb88e, 0xc2d3 }, { 0xb890, 0x5524 }, + { 0xb890, 0x2526 }, { 0xb890, 0x2728 }, { 0xb88e, 0xc2e3 }, + { 0xb890, 0x3323 }, { 0xb890, 0x2324 }, { 0xb890, 0x2425 } +}; + +static const struct rge_hw_regaddr_array mac_r26_2_mcu[] = { + { 0xa436, 0x8023 }, { 0xa438, 0x4701 }, { 0xa436, 0xb82e }, + { 0xa438, 0x0001 }, { 0xb820, 0x0090 }, { 0xa436, 0xa016 }, + { 0xa438, 0x0000 }, { 0xa436, 0xa012 }, { 0xa438, 0x0000 }, + { 0xa436, 0xa014 }, { 0xa438, 0x1800 }, { 0xa438, 0x8010 }, + { 0xa438, 0x1800 }, { 0xa438, 0x801a }, { 0xa438, 0x1800 }, + { 0xa438, 0x802a }, { 0xa438, 0x1800 }, { 0xa438, 0x8032 }, + { 0xa438, 0x1800 }, { 0xa438, 0x803a }, { 0xa438, 0x1800 }, + { 0xa438, 0x803e }, { 0xa438, 0x1800 }, { 0xa438, 0x8044 }, + { 0xa438, 0x1800 }, { 0xa438, 0x804b }, { 0xa438, 0xd504 }, + { 0xa438, 0xc9b5 }, { 0xa438, 0xd500 }, { 0xa438, 0xd707 }, + { 0xa438, 0x4070 }, { 0xa438, 0x1800 }, { 0xa438, 0x1082 }, + { 0xa438, 0xd504 }, { 0xa438, 0x1800 }, { 0xa438, 0x107a }, + { 0xa438, 0x61d0 }, { 0xa438, 0xd701 }, { 0xa438, 0x60a5 }, + { 0xa438, 0xd504 }, { 0xa438, 0xc9b2 }, { 0xa438, 0xd500 }, + { 0xa438, 0xf004 }, { 0xa438, 0xd504 }, { 0xa438, 0xc9b1 }, + { 0xa438, 0xd500 }, { 0xa438, 0xd707 }, { 0xa438, 0x6070 }, + { 0xa438, 0x1800 }, { 0xa438, 0x10b0 }, { 0xa438, 0x1800 }, + { 0xa438, 0x10c5 }, { 0xa438, 0xd707 }, { 0xa438, 0x2005 }, + { 0xa438, 0x8030 }, { 0xa438, 0xd75e }, { 0xa438, 0x1800 }, + { 0xa438, 0x138c }, { 0xa438, 0x1800 }, { 0xa438, 0x13ff }, + { 0xa438, 0xc504 }, { 0xa438, 0xce20 }, { 0xa438, 0xcf01 }, + { 0xa438, 0xd70a }, { 0xa438, 0x4005 }, { 0xa438, 0xcf02 }, + { 0xa438, 0x1800 }, { 0xa438, 0x1b99 }, { 0xa438, 0xa980 }, + { 0xa438, 0xd500 }, { 0xa438, 0x1800 }, { 0xa438, 0x144d }, + { 0xa438, 0x907f }, { 0xa438, 0x91a3 }, { 0xa438, 0x9306 }, + { 0xa438, 0xb118 }, { 0xa438, 0x1800 }, { 0xa438, 0x2147 }, + { 0xa438, 0x907f }, { 0xa438, 0x9209 }, { 0xa438, 0x91a3 }, + { 0xa438, 0x9306 }, { 0xa438, 0xb118 }, { 0xa438, 0x1800 }, + { 0xa438, 0x203c }, { 0xa438, 0xd707 }, { 0xa438, 0x4121 }, + { 0xa438, 0xd706 }, { 0xa438, 0x40fc }, { 0xa438, 0xd70a }, + { 0xa438, 0x40b5 }, { 0xa438, 0xd028 }, { 0xa438, 0xd1c1 }, + { 0xa438, 0x1800 }, { 0xa438, 0x8057 }, { 0xa438, 0xd07b }, + { 0xa438, 0xd1c5 }, { 0xa438, 0xd503 }, { 0xa438, 0xa108 }, + { 0xa438, 0xd505 }, { 0xa438, 0x8103 }, { 0xa438, 0xd504 }, + { 0xa438, 0xa002 }, { 0xa438, 0xa302 }, { 0xa438, 0xd707 }, + { 0xa438, 0x4061 }, { 0xa438, 0xd503 }, { 0xa438, 0x8b01 }, + { 0xa438, 0xd500 }, { 0xa438, 0xc48a }, { 0xa438, 0xd503 }, + { 0xa438, 0xcc09 }, { 0xa438, 0xcd58 }, { 0xa438, 0xaf01 }, + { 0xa438, 0xd500 }, { 0xa438, 0xbe10 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1739 }, { 0xa438, 0xd719 }, { 0xa438, 0x606c }, + { 0xa438, 0xd704 }, { 0xa438, 0x645c }, { 0xa438, 0xd75e }, + { 0xa438, 0x604d }, { 0xa438, 0xfff8 }, { 0xa438, 0x9e10 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1739 }, { 0xa438, 0xd719 }, + { 0xa438, 0x606c }, { 0xa438, 0xd704 }, { 0xa438, 0x631c }, + { 0xa438, 0xd75e }, { 0xa438, 0x404d }, { 0xa438, 0xfff8 }, + { 0xa438, 0xd504 }, { 0xa438, 0xaa18 }, { 0xa438, 0xa001 }, + { 0xa438, 0xa1e0 }, { 0xa438, 0xd500 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1739 }, { 0xa438, 0xd719 }, { 0xa438, 0x7fac }, + { 0xa438, 0xd504 }, { 0xa438, 0xa001 }, { 0xa438, 0xd500 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1739 }, { 0xa438, 0xd704 }, + { 0xa438, 0x5f5c }, { 0xa438, 0xd719 }, { 0xa438, 0x3aaf }, + { 0xa438, 0x8091 }, { 0xa438, 0xf016 }, { 0xa438, 0xd707 }, + { 0xa438, 0x6121 }, { 0xa438, 0x1000 }, { 0xa438, 0x16d8 }, + { 0xa438, 0xd503 }, { 0xa438, 0xcd59 }, { 0xa438, 0xaf01 }, + { 0xa438, 0xd500 }, { 0xa438, 0x1800 }, { 0xa438, 0x0ddc }, + { 0xa438, 0xd503 }, { 0xa438, 0x8040 }, { 0xa438, 0xd500 }, + { 0xa438, 0x1000 }, { 0xa438, 0x16d8 }, { 0xa438, 0xd503 }, + { 0xa438, 0xcd5a }, { 0xa438, 0xaf01 }, { 0xa438, 0xd500 }, + { 0xa438, 0x1800 }, { 0xa438, 0x0dbf }, { 0xa438, 0xd504 }, + { 0xa438, 0xa008 }, { 0xa438, 0xa204 }, { 0xa438, 0xd500 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1739 }, { 0xa438, 0xd701 }, + { 0xa438, 0x5fa0 }, { 0xa438, 0xd503 }, { 0xa438, 0xa082 }, + { 0xa438, 0xd500 }, { 0xa438, 0xd71e }, { 0xa438, 0x4097 }, + { 0xa438, 0xd078 }, { 0xa438, 0xd1aa }, { 0xa438, 0xf003 }, + { 0xa438, 0xd078 }, { 0xa438, 0xd1aa }, { 0xa438, 0xd707 }, + { 0xa438, 0x40c1 }, { 0xa438, 0xd706 }, { 0xa438, 0x409c }, + { 0xa438, 0xd70a }, { 0xa438, 0x4055 }, { 0xa438, 0xf010 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0xa436, 0xb860 }, { 0xa438, 0x679c }, + { 0xa436, 0xb862 }, { 0xa438, 0x0d86 }, { 0xa436, 0xb864 }, + { 0xa438, 0x0c61 }, { 0xa436, 0xb886 }, { 0xa438, 0x6e7c }, + { 0xa436, 0xb888 }, { 0xa438, 0x6bae }, { 0xa436, 0xb88a }, + { 0xa438, 0x6c9b }, { 0xa436, 0xb88c }, { 0xa438, 0xffff }, + { 0xa436, 0xb838 }, { 0xa438, 0x007f }, { 0xb820, 0x0010 }, + { 0xa436, 0x8629 }, { 0xa438, 0xaf86 }, { 0xa438, 0x41af }, + { 0xa438, 0x8644 }, { 0xa438, 0xaf88 }, { 0xa438, 0x0caf }, + { 0xa438, 0x8813 }, { 0xa438, 0xaf88 }, { 0xa438, 0x4baf }, + { 0xa438, 0x884b }, { 0xa438, 0xaf88 }, { 0xa438, 0x4baf }, + { 0xa438, 0x884b }, { 0xa438, 0xaf1d }, { 0xa438, 0x8a02 }, + { 0xa438, 0x864d }, { 0xa438, 0x0210 }, { 0xa438, 0x64af }, + { 0xa438, 0x1063 }, { 0xa438, 0xf8fa }, { 0xa438, 0xef69 }, + { 0xa438, 0xe080 }, { 0xa438, 0x4cac }, { 0xa438, 0x2517 }, + { 0xa438, 0xe080 }, { 0xa438, 0x40ad }, { 0xa438, 0x251a }, + { 0xa438, 0x0286 }, { 0xa438, 0x7ce0 }, { 0xa438, 0x8040 }, + { 0xa438, 0xac25 }, { 0xa438, 0x11bf }, { 0xa438, 0x87f4 }, + { 0xa438, 0x0277 }, { 0xa438, 0xf6ae }, { 0xa438, 0x0902 }, + { 0xa438, 0x87b3 }, { 0xa438, 0x0287 }, { 0xa438, 0xe902 }, + { 0xa438, 0x87de }, { 0xa438, 0xef96 }, { 0xa438, 0xfefc }, + { 0xa438, 0x04f8 }, { 0xa438, 0xe080 }, { 0xa438, 0x18ad }, + { 0xa438, 0x2611 }, { 0xa438, 0xe08f }, { 0xa438, 0x9cac }, + { 0xa438, 0x2005 }, { 0xa438, 0x0286 }, { 0xa438, 0x99ae }, + { 0xa438, 0x0302 }, { 0xa438, 0x8707 }, { 0xa438, 0x0287 }, + { 0xa438, 0x5002 }, { 0xa438, 0x87de }, { 0xa438, 0xfc04 }, + { 0xa438, 0xf8f9 }, { 0xa438, 0xef79 }, { 0xa438, 0xfbbf }, + { 0xa438, 0x87f7 }, { 0xa438, 0x0278 }, { 0xa438, 0x385c }, + { 0xa438, 0x2000 }, { 0xa438, 0x0d4d }, { 0xa438, 0xa101 }, + { 0xa438, 0x51bf }, { 0xa438, 0x87f7 }, { 0xa438, 0x0278 }, + { 0xa438, 0x385c }, { 0xa438, 0x07ff }, { 0xa438, 0xe38f }, + { 0xa438, 0x9d1b }, { 0xa438, 0x319f }, { 0xa438, 0x410d }, + { 0xa438, 0x48e3 }, { 0xa438, 0x8f9e }, { 0xa438, 0x1b31 }, + { 0xa438, 0x9f38 }, { 0xa438, 0xbf87 }, { 0xa438, 0xfa02 }, + { 0xa438, 0x7838 }, { 0xa438, 0x5c07 }, { 0xa438, 0xffe3 }, + { 0xa438, 0x8f9f }, { 0xa438, 0x1b31 }, { 0xa438, 0x9f28 }, + { 0xa438, 0x0d48 }, { 0xa438, 0xe38f }, { 0xa438, 0xa01b }, + { 0xa438, 0x319f }, { 0xa438, 0x1fbf }, { 0xa438, 0x87fd }, + { 0xa438, 0x0278 }, { 0xa438, 0x385c }, { 0xa438, 0x07ff }, + { 0xa438, 0xe38f }, { 0xa438, 0xa11b }, { 0xa438, 0x319f }, + { 0xa438, 0x0f0d }, { 0xa438, 0x48e3 }, { 0xa438, 0x8fa2 }, + { 0xa438, 0x1b31 }, { 0xa438, 0x9f06 }, { 0xa438, 0xee8f }, + { 0xa438, 0x9c01 }, { 0xa438, 0xae04 }, { 0xa438, 0xee8f }, + { 0xa438, 0x9c00 }, { 0xa438, 0xffef }, { 0xa438, 0x97fd }, + { 0xa438, 0xfc04 }, { 0xa438, 0xf8f9 }, { 0xa438, 0xef79 }, + { 0xa438, 0xfbbf }, { 0xa438, 0x87f7 }, { 0xa438, 0x0278 }, + { 0xa438, 0x385c }, { 0xa438, 0x2000 }, { 0xa438, 0x0d4d }, + { 0xa438, 0xa100 }, { 0xa438, 0x20bf }, { 0xa438, 0x87f7 }, + { 0xa438, 0x0278 }, { 0xa438, 0x385c }, { 0xa438, 0x0600 }, + { 0xa438, 0x0d49 }, { 0xa438, 0xe38f }, { 0xa438, 0xa31b }, + { 0xa438, 0x319f }, { 0xa438, 0x0ebf }, { 0xa438, 0x8800 }, + { 0xa438, 0x0277 }, { 0xa438, 0xf6bf }, { 0xa438, 0x8806 }, + { 0xa438, 0x0277 }, { 0xa438, 0xf6ae }, { 0xa438, 0x0cbf }, + { 0xa438, 0x8800 }, { 0xa438, 0x0277 }, { 0xa438, 0xedbf }, + { 0xa438, 0x8806 }, { 0xa438, 0x0277 }, { 0xa438, 0xedee }, + { 0xa438, 0x8f9c }, { 0xa438, 0x00ff }, { 0xa438, 0xef97 }, + { 0xa438, 0xfdfc }, { 0xa438, 0x04f8 }, { 0xa438, 0xf9ef }, + { 0xa438, 0x79fb }, { 0xa438, 0xbf87 }, { 0xa438, 0xf702 }, + { 0xa438, 0x7838 }, { 0xa438, 0x5c20 }, { 0xa438, 0x000d }, + { 0xa438, 0x4da1 }, { 0xa438, 0x014a }, { 0xa438, 0xbf87 }, + { 0xa438, 0xf702 }, { 0xa438, 0x7838 }, { 0xa438, 0x5c07 }, + { 0xa438, 0xffe3 }, { 0xa438, 0x8fa4 }, { 0xa438, 0x1b31 }, + { 0xa438, 0x9f3a }, { 0xa438, 0x0d48 }, { 0xa438, 0xe38f }, + { 0xa438, 0xa51b }, { 0xa438, 0x319f }, { 0xa438, 0x31bf }, + { 0xa438, 0x87fa }, { 0xa438, 0x0278 }, { 0xa438, 0x38e3 }, + { 0xa438, 0x8fa6 }, { 0xa438, 0x1b31 }, { 0xa438, 0x9f24 }, + { 0xa438, 0x0d48 }, { 0xa438, 0xe38f }, { 0xa438, 0xa71b }, + { 0xa438, 0x319f }, { 0xa438, 0x1bbf }, { 0xa438, 0x87fd }, + { 0xa438, 0x0278 }, { 0xa438, 0x38e3 }, { 0xa438, 0x8fa8 }, + { 0xa438, 0x1b31 }, { 0xa438, 0x9f0e }, { 0xa438, 0xbf88 }, + { 0xa438, 0x0302 }, { 0xa438, 0x77f6 }, { 0xa438, 0xbf88 }, + { 0xa438, 0x0902 }, { 0xa438, 0x77f6 }, { 0xa438, 0xae00 }, + { 0xa438, 0xffef }, { 0xa438, 0x97fd }, { 0xa438, 0xfc04 }, + { 0xa438, 0xf8ef }, { 0xa438, 0x79fb }, { 0xa438, 0xe080 }, + { 0xa438, 0x18ad }, { 0xa438, 0x261c }, { 0xa438, 0xee8f }, + { 0xa438, 0x9c00 }, { 0xa438, 0xbf88 }, { 0xa438, 0x0002 }, + { 0xa438, 0x77ed }, { 0xa438, 0xbf88 }, { 0xa438, 0x0602 }, + { 0xa438, 0x77ed }, { 0xa438, 0xbf88 }, { 0xa438, 0x0302 }, + { 0xa438, 0x77ed }, { 0xa438, 0xbf88 }, { 0xa438, 0x0902 }, + { 0xa438, 0x77ed }, { 0xa438, 0xffef }, { 0xa438, 0x97fc }, + { 0xa438, 0x04f8 }, { 0xa438, 0xe080 }, { 0xa438, 0x40f6 }, + { 0xa438, 0x25e4 }, { 0xa438, 0x8040 }, { 0xa438, 0xfc04 }, + { 0xa438, 0xf8e0 }, { 0xa438, 0x804c }, { 0xa438, 0xf625 }, + { 0xa438, 0xe480 }, { 0xa438, 0x4cfc }, { 0xa438, 0x0455 }, + { 0xa438, 0xa4ba }, { 0xa438, 0xf0a6 }, { 0xa438, 0x4af0 }, + { 0xa438, 0xa64c }, { 0xa438, 0xf0a6 }, { 0xa438, 0x4e66 }, + { 0xa438, 0xa4b6 }, { 0xa438, 0x55a4 }, { 0xa438, 0xb600 }, + { 0xa438, 0xac56 }, { 0xa438, 0x11ac }, { 0xa438, 0x56ee }, + { 0xa438, 0x804c }, { 0xa438, 0x3aaf }, { 0xa438, 0x0627 }, + { 0xa438, 0xbf88 }, { 0xa438, 0x4802 }, { 0xa438, 0x77ed }, + { 0xa438, 0xd203 }, { 0xa438, 0xe083 }, { 0xa438, 0x8a0d }, + { 0xa438, 0x01f6 }, { 0xa438, 0x271b }, { 0xa438, 0x03aa }, + { 0xa438, 0x0182 }, { 0xa438, 0xe083 }, { 0xa438, 0x890d }, + { 0xa438, 0x01f6 }, { 0xa438, 0x271b }, { 0xa438, 0x03aa }, + { 0xa438, 0x0182 }, { 0xa438, 0xe083 }, { 0xa438, 0x880d }, + { 0xa438, 0x01f6 }, { 0xa438, 0x271b }, { 0xa438, 0x03aa }, + { 0xa438, 0x0782 }, { 0xa438, 0xbf88 }, { 0xa438, 0x4802 }, + { 0xa438, 0x77f6 }, { 0xa438, 0xaf16 }, { 0xa438, 0x1500 }, + { 0xa438, 0xa86a }, { 0xa436, 0xb818 }, { 0xa438, 0x1d84 }, + { 0xa436, 0xb81a }, { 0xa438, 0x1060 }, { 0xa436, 0xb81c }, + { 0xa438, 0x0623 }, { 0xa436, 0xb81e }, { 0xa438, 0x15ef }, + { 0xa436, 0xb850 }, { 0xa438, 0xffff }, { 0xa436, 0xb852 }, + { 0xa438, 0xffff }, { 0xa436, 0xb878 }, { 0xa438, 0xffff }, + { 0xa436, 0xb884 }, { 0xa438, 0xffff }, { 0xa436, 0xb832 }, + { 0xa438, 0x000f }, { 0xa436, 0x0000 }, { 0xa438, 0x0000 }, + { 0xb82e, 0x0000 }, { 0xa436, 0x8023 }, { 0xa438, 0x0000 }, + { 0xb820, 0x0000 } +}; + static const struct rge_hw_regaddr_array mac_r27_mcu[] = { { 0xa436, 0x8023 }, { 0xa438, 0x6100 }, { 0xa436, 0xb82e }, { 0xa438, 0x0001 }, { 0xb820, 0x0090 }, { 0xa436, 0xa016 }, @@ -6209,7181 +9607,6 @@ static const struct rge_hw_regaddr_array mac_r27_mcu[] = { { 0xa438, 0x0000 }, \ { 0xb820, 0x0000 } -#define MAC_R26_MCU \ - { 0xa436, 0x8023 }, \ - { 0xa438, 0x4700 }, \ - { 0xa436, 0xb82e }, \ - { 0xa438, 0x0001 }, \ - { 0xb820, 0x0090 }, \ - { 0xa436, 0xa016 }, \ - { 0xa438, 0x0000 }, \ - { 0xa436, 0xa012 }, \ - { 0xa438, 0x0000 }, \ - { 0xa436, 0xa014 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8010 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8025 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8033 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8037 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x803c }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8044 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8054 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8059 }, \ - { 0xa438, 0xd504 }, \ - { 0xa438, 0xc9b5 }, \ - { 0xa438, 0xd500 }, \ - { 0xa438, 0xd707 }, \ - { 0xa438, 0x4070 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x107a }, \ - { 0xa438, 0xd504 }, \ - { 0xa438, 0xc994 }, \ - { 0xa438, 0xd500 }, \ - { 0xa438, 0xd707 }, \ - { 0xa438, 0x60d0 }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x252d }, \ - { 0xa438, 0x8023 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x1064 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x107a }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x1052 }, \ - { 0xa438, 0xd504 }, \ - { 0xa438, 0xc9d0 }, \ - { 0xa438, 0xd500 }, \ - { 0xa438, 0xd707 }, \ - { 0xa438, 0x60d0 }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x252d }, \ - { 0xa438, 0x8031 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x1171 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x1187 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x116a }, \ - { 0xa438, 0xc0ff }, \ - { 0xa438, 0xcaff }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x00d6 }, \ - { 0xa438, 0xd504 }, \ - { 0xa438, 0xa001 }, \ - { 0xa438, 0xd704 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x128b }, \ - { 0xa438, 0xd707 }, \ - { 0xa438, 0x2005 }, \ - { 0xa438, 0x8042 }, \ - { 0xa438, 0xd75e }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x137a }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x13ed }, \ - { 0xa438, 0x61d0 }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x60a5 }, \ - { 0xa438, 0xd504 }, \ - { 0xa438, 0xc9b2 }, \ - { 0xa438, 0xd500 }, \ - { 0xa438, 0xf004 }, \ - { 0xa438, 0xd504 }, \ - { 0xa438, 0xc9b1 }, \ - { 0xa438, 0xd500 }, \ - { 0xa438, 0xd707 }, \ - { 0xa438, 0x6070 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x10a8 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x10bd }, \ - { 0xa438, 0xd500 }, \ - { 0xa438, 0xc492 }, \ - { 0xa438, 0xd501 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x13c1 }, \ - { 0xa438, 0xa980 }, \ - { 0xa438, 0xd500 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x143b }, \ - { 0xa436, 0xa026 }, \ - { 0xa438, 0x143a }, \ - { 0xa436, 0xa024 }, \ - { 0xa438, 0x13c0 }, \ - { 0xa436, 0xa022 }, \ - { 0xa438, 0x10bc }, \ - { 0xa436, 0xa020 }, \ - { 0xa438, 0x1379 }, \ - { 0xa436, 0xa006 }, \ - { 0xa438, 0x128a }, \ - { 0xa436, 0xa004 }, \ - { 0xa438, 0x00d5 }, \ - { 0xa436, 0xa002 }, \ - { 0xa438, 0x1182 }, \ - { 0xa436, 0xa000 }, \ - { 0xa438, 0x1075 }, \ - { 0xa436, 0xa008 }, \ - { 0xa438, 0xff00 }, \ - { 0xa436, 0xa016 }, \ - { 0xa438, 0x0010 }, \ - { 0xa436, 0xa012 }, \ - { 0xa438, 0x0000 }, \ - { 0xa436, 0xa014 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8010 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8015 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x801a }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x801e }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8027 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8027 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8027 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8027 }, \ - { 0xa438, 0x0c0f }, \ - { 0xa438, 0x0505 }, \ - { 0xa438, 0xba01 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x015e }, \ - { 0xa438, 0x0c0f }, \ - { 0xa438, 0x0506 }, \ - { 0xa438, 0xba02 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x017c }, \ - { 0xa438, 0x9910 }, \ - { 0xa438, 0x9a03 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x02d4 }, \ - { 0xa438, 0x8580 }, \ - { 0xa438, 0xc090 }, \ - { 0xa438, 0x9a03 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x02c9 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x5fa3 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x0067 }, \ - { 0xa436, 0xa08e }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xa08c }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xa08a }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xa088 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xa086 }, \ - { 0xa438, 0x018c }, \ - { 0xa436, 0xa084 }, \ - { 0xa438, 0x02d3 }, \ - { 0xa436, 0xa082 }, \ - { 0xa438, 0x017a }, \ - { 0xa436, 0xa080 }, \ - { 0xa438, 0x015c }, \ - { 0xa436, 0xa090 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xa016 }, \ - { 0xa438, 0x0020 }, \ - { 0xa436, 0xa012 }, \ - { 0xa438, 0x0000 }, \ - { 0xa436, 0xa014 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8010 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8023 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8313 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x831a }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8489 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x86b9 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x86c1 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x87ad }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x124e }, \ - { 0xa438, 0x9308 }, \ - { 0xa438, 0xb201 }, \ - { 0xa438, 0xb301 }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x5fe0 }, \ - { 0xa438, 0xd2ff }, \ - { 0xa438, 0xb302 }, \ - { 0xa438, 0xd200 }, \ - { 0xa438, 0xb201 }, \ - { 0xa438, 0xb309 }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x5fe0 }, \ - { 0xa438, 0xd2ff }, \ - { 0xa438, 0xb302 }, \ - { 0xa438, 0xd200 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x0025 }, \ - { 0xa438, 0xd706 }, \ - { 0xa438, 0x6069 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x6421 }, \ - { 0xa438, 0xd70c }, \ - { 0xa438, 0x43ab }, \ - { 0xa438, 0x800a }, \ - { 0xa438, 0x8190 }, \ - { 0xa438, 0x8204 }, \ - { 0xa438, 0xa280 }, \ - { 0xa438, 0x8406 }, \ - { 0xa438, 0x0c03 }, \ - { 0xa438, 0x1502 }, \ - { 0xa438, 0xa108 }, \ - { 0xa438, 0x9503 }, \ - { 0xa438, 0x0c03 }, \ - { 0xa438, 0x1502 }, \ - { 0xa438, 0x0c1f }, \ - { 0xa438, 0x0f19 }, \ - { 0xa438, 0x9503 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd70c }, \ - { 0xa438, 0x5fb3 }, \ - { 0xa438, 0x0c03 }, \ - { 0xa438, 0x1502 }, \ - { 0xa438, 0x8f1f }, \ - { 0xa438, 0x9503 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd70c }, \ - { 0xa438, 0x7f33 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x11bd }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x81aa }, \ - { 0xa438, 0x8710 }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x33b1 }, \ - { 0xa438, 0x8051 }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x60b5 }, \ - { 0xa438, 0xd706 }, \ - { 0xa438, 0x6069 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8056 }, \ - { 0xa438, 0xa00a }, \ - { 0xa438, 0xa280 }, \ - { 0xa438, 0xa404 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x80f3 }, \ - { 0xa438, 0xd173 }, \ - { 0xa438, 0xd04d }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x5fb4 }, \ - { 0xa438, 0xd173 }, \ - { 0xa438, 0xd05d }, \ - { 0xa438, 0xd10d }, \ - { 0xa438, 0xd049 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x5fb4 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x64f5 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x5ee7 }, \ - { 0xa438, 0xb920 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd71f }, \ - { 0xa438, 0x7fb4 }, \ - { 0xa438, 0x9920 }, \ - { 0xa438, 0xcb3c }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd71f }, \ - { 0xa438, 0x7d94 }, \ - { 0xa438, 0x6045 }, \ - { 0xa438, 0xfffa }, \ - { 0xa438, 0xb820 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd71f }, \ - { 0xa438, 0x7fa5 }, \ - { 0xa438, 0x9820 }, \ - { 0xa438, 0xcb3d }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x60b5 }, \ - { 0xa438, 0xd71f }, \ - { 0xa438, 0x7bb4 }, \ - { 0xa438, 0x61b6 }, \ - { 0xa438, 0xfff8 }, \ - { 0xa438, 0xbb80 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd71f }, \ - { 0xa438, 0x5fb4 }, \ - { 0xa438, 0x9b80 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x60e7 }, \ - { 0xa438, 0xcb3f }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8094 }, \ - { 0xa438, 0xcb3e }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x810f }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x80f3 }, \ - { 0xa438, 0x0c03 }, \ - { 0xa438, 0x1502 }, \ - { 0xa438, 0xae04 }, \ - { 0xa438, 0x9503 }, \ - { 0xa438, 0x0000 }, \ - { 0xa438, 0x0000 }, \ - { 0xa438, 0x0c03 }, \ - { 0xa438, 0x1502 }, \ - { 0xa438, 0x8e04 }, \ - { 0xa438, 0x9503 }, \ - { 0xa438, 0xd706 }, \ - { 0xa438, 0x65fe }, \ - { 0xa438, 0x0c1f }, \ - { 0xa438, 0x0d04 }, \ - { 0xa438, 0x8dc0 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x11bd }, \ - { 0xa438, 0xd70c }, \ - { 0xa438, 0x414b }, \ - { 0xa438, 0x0cc0 }, \ - { 0xa438, 0x0040 }, \ - { 0xa438, 0x0c03 }, \ - { 0xa438, 0x0102 }, \ - { 0xa438, 0x0ce0 }, \ - { 0xa438, 0x03e0 }, \ - { 0xa438, 0xccce }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x80b7 }, \ - { 0xa438, 0x0cc0 }, \ - { 0xa438, 0x0040 }, \ - { 0xa438, 0x0c03 }, \ - { 0xa438, 0x0100 }, \ - { 0xa438, 0x0ce0 }, \ - { 0xa438, 0x0380 }, \ - { 0xa438, 0xcc9c }, \ - { 0xa438, 0x8710 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1118 }, \ - { 0xa438, 0xa104 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x112a }, \ - { 0xa438, 0x8104 }, \ - { 0xa438, 0xa202 }, \ - { 0xa438, 0xa140 }, \ - { 0xa438, 0x1000 }, \ - { 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}, \ - { 0xa438, 0x0302 }, \ - { 0xa438, 0x8a8a }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0xfefc }, \ - { 0xa438, 0x04f9 }, \ - { 0xa438, 0x0289 }, \ - { 0xa438, 0x19ac }, \ - { 0xa438, 0x3009 }, \ - { 0xa438, 0xee8f }, \ - { 0xa438, 0x9603 }, \ - { 0xa438, 0x0288 }, \ - { 0xa438, 0x8eae }, \ - { 0xa438, 0x04ee }, \ - { 0xa438, 0x8f96 }, \ - { 0xa438, 0x04fd }, \ - { 0xa438, 0x04fb }, \ - { 0xa438, 0x0288 }, \ - { 0xa438, 0x55ad }, \ - { 0xa438, 0x5004 }, \ - { 0xa438, 0xee8f }, \ - { 0xa438, 0x9602 }, \ - { 0xa438, 0xff04 }, \ - { 0xa438, 0xf902 }, \ - { 0xa438, 0x8943 }, \ - { 0xa438, 0xe28f }, \ - { 0xa438, 0x920c }, \ - { 0xa438, 0x245a }, \ - { 0xa438, 0xf0e3 }, \ - { 0xa438, 0x84f7 }, \ - { 0xa438, 0x5bf0 }, \ - { 0xa438, 0x1b23 }, \ - { 0xa438, 0x9e0f }, \ - { 0xa438, 0x028a }, \ - { 0xa438, 0x52ee }, \ - { 0xa438, 0x8f96 }, \ - { 0xa438, 0x0502 }, \ - { 0xa438, 0x888e }, \ - { 0xa438, 0x0287 }, \ - { 0xa438, 0xffae }, \ - { 0xa438, 0x04ee }, \ - { 0xa438, 0x8f96 }, \ - { 0xa438, 0x06fd }, \ - { 0xa438, 0x04f8 }, \ - { 0xa438, 0xf9fa }, \ - { 0xa438, 0xef69 }, \ - { 0xa438, 0xfa1f }, \ - { 0xa438, 0x44d2 }, \ - { 0xa438, 0x04bf }, \ - { 0xa438, 0x8f7f }, \ - { 0xa438, 0xdc19 }, \ - { 0xa438, 0xdd19 }, \ - { 0xa438, 0x829f }, \ - { 0xa438, 0xf9fe }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0xfefd }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xfb02 }, \ - { 0xa438, 0x8855 }, \ - { 0xa438, 0xad50 }, \ - { 0xa438, 0x04ee }, \ - { 0xa438, 0x8f96 }, \ - { 0xa438, 0x04ff }, \ - { 0xa438, 0x04f8 }, \ - { 0xa438, 0xf9fa }, \ - { 0xa438, 0xef69 }, \ - { 0xa438, 0x0289 }, \ - { 0xa438, 0x19ac }, \ - { 0xa438, 0x3009 }, \ - { 0xa438, 0xee8f }, \ - { 0xa438, 0x9607 }, \ - { 0xa438, 0x0288 }, \ - { 0xa438, 0x8eae }, \ - { 0xa438, 0x0702 }, \ - { 0xa438, 0x8a8a }, \ - { 0xa438, 0xee8f }, \ - { 0xa438, 0x9601 }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0xfefd }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xfb02 }, \ - { 0xa438, 0x8855 }, \ - { 0xa438, 0xad50 }, \ - { 0xa438, 0x04ee }, \ - { 0xa438, 0x8f96 }, \ - { 0xa438, 0x06ff }, \ - { 0xa438, 0x04f8 }, \ - { 0xa438, 0xfae0 }, \ - { 0xa438, 0x8457 }, \ - { 0xa438, 0xe184 }, \ - { 0xa438, 0x58ef }, \ - { 0xa438, 0x64e1 }, \ - { 0xa438, 0x8f90 }, \ - { 0xa438, 0xd000 }, \ - { 0xa438, 0xef74 }, \ - { 0xa438, 0x0271 }, \ - { 0xa438, 0xfffe }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8fa }, \ - { 0xa438, 0xef69 }, \ - { 0xa438, 0xee8f }, \ - { 0xa438, 0x9601 }, \ - { 0xa438, 0xee8f }, \ - { 0xa438, 0x9004 }, \ - { 0xa438, 0xee8f }, \ - { 0xa438, 0x8f40 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x0f02 }, \ - { 0xa438, 0x72dc }, \ - { 0xa438, 0xe584 }, \ - { 0xa438, 0x5dee }, \ - { 0xa438, 0x8f91 }, \ - { 0xa438, 0x77ef }, \ - { 0xa438, 0x96fe }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8fa }, \ - { 0xa438, 0xfbef }, \ - { 0xa438, 0x69e1 }, \ - { 0xa438, 0x8f92 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x0f02 }, \ - { 0xa438, 0x72bd }, \ - { 0xa438, 0xe18f }, \ - { 0xa438, 0x93bf }, \ - { 0xa438, 0x8b12 }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0xbde1 }, \ - { 0xa438, 0x8f94 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x1502 }, \ - { 0xa438, 0x72bd }, \ - { 0xa438, 0xe18f }, \ - { 0xa438, 0x95bf }, \ - { 0xa438, 0x8b18 }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0xbd02 }, \ - { 0xa438, 0x71e4 }, \ - { 0xa438, 0xef47 }, \ - { 0xa438, 0xe484 }, \ - { 0xa438, 0x57e5 }, \ - { 0xa438, 0x8458 }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0xfffe }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8e0 }, \ - { 0xa438, 0x8018 }, \ - { 0xa438, 0xad25 }, \ - { 0xa438, 0x15ee }, \ - { 0xa438, 0x8f96 }, \ - { 0xa438, 0x00d0 }, \ - { 0xa438, 0x08e4 }, \ - { 0xa438, 0x8f92 }, \ - { 0xa438, 0xe48f }, \ - { 0xa438, 0x93e4 }, \ - { 0xa438, 0x8f94 }, \ - { 0xa438, 0xe48f }, \ - { 0xa438, 0x9502 }, \ - { 0xa438, 0x888e }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf9e2 }, \ - { 0xa438, 0x845d }, \ - { 0xa438, 0xe38f }, \ - { 0xa438, 0x910d }, \ - { 0xa438, 0x345b }, \ - { 0xa438, 0x0f1a }, \ - { 0xa438, 0x32ac }, \ - { 0xa438, 0x3c09 }, \ - { 0xa438, 0x0c34 }, \ - { 0xa438, 0x5bf0 }, \ - { 0xa438, 0xe784 }, \ - { 0xa438, 0xf7ae }, \ - { 0xa438, 0x04ee }, \ - { 0xa438, 0x84f7 }, \ - { 0xa438, 0xf0e3 }, \ - { 0xa438, 0x8f91 }, \ - { 0xa438, 0x5b0f }, \ - { 0xa438, 0x1b23 }, \ - { 0xa438, 0xac37 }, \ - { 0xa438, 0x0ae3 }, \ - { 0xa438, 0x84f7 }, \ - { 0xa438, 0x1e32 }, \ - { 0xa438, 0xe784 }, \ - { 0xa438, 0xf7ae }, \ - { 0xa438, 0x00fd }, \ - { 0xa438, 0x04f8 }, \ - { 0xa438, 0xfaef }, \ - { 0xa438, 0x69fa }, \ - { 0xa438, 0xfbd2 }, \ - { 0xa438, 0x01d3 }, \ - { 0xa438, 0x04d6 }, \ - { 0xa438, 0x8f92 }, \ - { 0xa438, 0xd78f }, \ - { 0xa438, 0x7bef }, \ - { 0xa438, 0x97d9 }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0xd81b }, \ - { 0xa438, 0x109e }, \ - { 0xa438, 0x0480 }, \ - { 0xa438, 0xdcd2 }, \ - { 0xa438, 0x0016 }, \ - { 0xa438, 0x1783 }, \ - { 0xa438, 0x9fed }, \ - { 0xa438, 0xfffe }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0xfefc }, \ - { 0xa438, 0x04f8 }, \ - { 0xa438, 0xf9fa }, \ - { 0xa438, 0xfbef }, \ - { 0xa438, 0x79fb }, \ - { 0xa438, 0xcffb }, \ - { 0xa438, 0xd200 }, \ - { 0xa438, 0xbe00 }, \ - { 0xa438, 0x00ef }, \ - { 0xa438, 0x1229 }, \ - { 0xa438, 0x40d0 }, \ - { 0xa438, 0x041c }, \ - { 0xa438, 0x081a }, \ - { 0xa438, 0x10bf }, \ - { 0xa438, 0x8b27 }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0xbd02 }, \ - { 0xa438, 0x89ee }, \ - { 0xa438, 0xbf8f }, \ - { 0xa438, 0x7fef }, \ - { 0xa438, 0x1249 }, \ - { 0xa438, 0x021a }, \ - { 0xa438, 0x91d8 }, \ - { 0xa438, 0x19d9 }, \ - { 0xa438, 0xef74 }, \ - { 0xa438, 0x0271 }, \ - { 0xa438, 0xccef }, \ - { 0xa438, 0x47dd }, \ - { 0xa438, 0x89dc }, \ - { 0xa438, 0x18a8 }, \ - { 0xa438, 0x0002 }, \ - { 0xa438, 0xd202 }, \ - { 0xa438, 0x8990 }, \ - { 0xa438, 0x12a2 }, \ - { 0xa438, 0x04c8 }, \ - { 0xa438, 0xffc7 }, \ - { 0xa438, 0xffef }, \ - { 0xa438, 0x97ff }, \ - { 0xa438, 0xfefd }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8f9 }, \ - { 0xa438, 0xfafb }, \ - { 0xa438, 0xef79 }, \ - { 0xa438, 0xfbbf }, \ - { 0xa438, 0x8f7f }, \ - { 0xa438, 0xef12 }, \ - { 0xa438, 0x4902 }, \ - { 0xa438, 0x1a91 }, \ - { 0xa438, 0xd819 }, \ - { 0xa438, 0xd9ef }, \ - { 0xa438, 0x64bf }, \ - { 0xa438, 0x8f87 }, \ - { 0xa438, 0xef12 }, \ - { 0xa438, 0x4902 }, \ - { 0xa438, 0x1a91 }, \ - { 0xa438, 0xd819 }, \ - { 0xa438, 0xd9ef }, \ - { 0xa438, 0x7489 }, \ - { 0xa438, 0x0271 }, \ - { 0xa438, 0xb1ad }, \ - { 0xa438, 0x502c }, \ - { 0xa438, 0xef46 }, \ - { 0xa438, 0xdc19 }, \ - { 0xa438, 0xdda2 }, \ - { 0xa438, 0x0006 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x0f02 }, \ - { 0xa438, 0x72dc }, \ - { 0xa438, 0xa201 }, \ - { 0xa438, 0x06bf }, \ - { 0xa438, 0x8b12 }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0xdca2 }, \ - { 0xa438, 0x0206 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x1502 }, \ - { 0xa438, 0x72dc }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x1802 }, \ - { 0xa438, 0x72dc }, \ - { 0xa438, 0xbf8f }, \ - { 0xa438, 0x7b1a }, \ - { 0xa438, 0x92dd }, \ - { 0xa438, 0xffef }, \ - { 0xa438, 0x97ff }, \ - { 0xa438, 0xfefd }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf9f8 }, \ - { 0xa438, 0xfbef }, \ - { 0xa438, 0x79fb }, \ - { 0xa438, 0x028a }, \ - { 0xa438, 0xa0bf }, \ - { 0xa438, 0x8b1b }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0x9a16 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x1e02 }, \ - { 0xa438, 0x72dc }, \ - { 0xa438, 0xac28 }, \ - { 0xa438, 0x02ae }, \ - { 0xa438, 0xf4d6 }, \ - { 0xa438, 0x0000 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x1b02 }, \ - { 0xa438, 0x7291 }, \ - { 0xa438, 0xae03 }, \ - { 0xa438, 0x028a }, \ - { 0xa438, 0x8ad2 }, \ - { 0xa438, 0x00d7 }, \ - { 0xa438, 0x0000 }, \ - { 0xa438, 0xe18f }, \ - { 0xa438, 0x8f1b }, \ - { 0xa438, 0x12a1 }, \ - { 0xa438, 0x0004 }, \ - { 0xa438, 0xef67 }, \ - { 0xa438, 0xae1d }, \ - { 0xa438, 0xef12 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x2102 }, \ - { 0xa438, 0x72bd }, \ - { 0xa438, 0x12bf }, \ - { 0xa438, 0x8b24 }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0xdcef }, \ - { 0xa438, 0x64ad }, \ - { 0xa438, 0x4f04 }, \ - { 0xa438, 0x7eff }, \ - { 0xa438, 0xff16 }, \ - { 0xa438, 0x0271 }, \ - { 0xa438, 0xccae }, \ - { 0xa438, 0xd7bf }, \ - { 0xa438, 0x8b2d }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0x91ff }, \ - { 0xa438, 0xef97 }, \ - { 0xa438, 0xfffc }, \ - { 0xa438, 0xfd04 }, \ - { 0xa438, 0xf8fa }, \ - { 0xa438, 0xef69 }, \ - { 0xa438, 0xd104 }, \ - { 0xa438, 0xbf8f }, \ - { 0xa438, 0x92d8 }, \ - { 0xa438, 0x10dc }, \ - { 0xa438, 0x1981 }, \ - { 0xa438, 0x9ff9 }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0xfefc }, \ - { 0xa438, 0x04f8 }, \ - { 0xa438, 0xfbfa }, \ - { 0xa438, 0xef69 }, \ - { 0xa438, 0xbf8f }, \ - { 0xa438, 0x87d0 }, \ - { 0xa438, 0x08d1 }, \ - { 0xa438, 0xff02 }, \ - { 0xa438, 0x8a7c }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0xfeff }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8fa }, \ - { 0xa438, 0xef69 }, \ - { 0xa438, 0xdd19 }, \ - { 0xa438, 0x809f }, \ - { 0xa438, 0xfbef }, \ - { 0xa438, 0x96fe }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8e0 }, \ - { 0xa438, 0x8044 }, \ - { 0xa438, 0xf624 }, \ - { 0xa438, 0xe480 }, \ - { 0xa438, 0x44fc }, \ - { 0xa438, 0x04f8 }, \ - { 0xa438, 0xe080 }, \ - { 0xa438, 0x4ff6 }, \ - { 0xa438, 0x24e4 }, \ - { 0xa438, 0x804f }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8fa }, \ - { 0xa438, 0xfbef }, \ - { 0xa438, 0x79fb }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x2a02 }, \ - { 0xa438, 0x7291 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x3302 }, \ - { 0xa438, 0x7291 }, \ - { 0xa438, 0xd68b }, \ - { 0xa438, 0x2dd7 }, \ - { 0xa438, 0x8b30 }, \ - { 0xa438, 0x0116 }, \ - { 0xa438, 0xad50 }, \ - { 0xa438, 0x0cbf }, \ - { 0xa438, 0x8b2a }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0x9abf }, \ - { 0xa438, 0x8b33 }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0x9aff }, \ - { 0xa438, 0xef97 }, \ - { 0xa438, 0xfffe }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8f9 }, \ - { 0xa438, 0xfaef }, \ - { 0xa438, 0x49f8 }, \ - { 0xa438, 0xccf8 }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0x9a1f }, \ - { 0xa438, 0x22c7 }, \ - { 0xa438, 0xbd02 }, \ - { 0xa438, 0x72dc }, \ - { 0xa438, 0xac28 }, \ - { 0xa438, 0x16ac }, \ - { 0xa438, 0x3008 }, \ - { 0xa438, 0x0271 }, \ - { 0xa438, 0xe4ef }, \ - { 0xa438, 0x6712 }, \ - { 0xa438, 0xaeee }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x0202 }, \ - { 0xa438, 0x71ff }, \ - { 0xa438, 0xac50 }, \ - { 0xa438, 0x05ae }, \ - { 0xa438, 0xe3d7 }, \ - { 0xa438, 0x0000 }, \ - { 0xa438, 0xfcc4 }, \ - { 0xa438, 0xfcef }, \ - { 0xa438, 0x94fe }, \ - { 0xa438, 0xfdfc }, \ - { 0xa438, 0x04cc }, \ - { 0xa438, 0xc010 }, \ - { 0xa438, 0x44ac }, \ - { 0xa438, 0x0030 }, \ - { 0xa438, 0xbce0 }, \ - { 0xa438, 0x74bc }, \ - { 0xa438, 0xe0b8 }, \ - { 0xa438, 0xbce0 }, \ - { 0xa438, 0xfcbc }, \ - { 0xa438, 0xe011 }, \ - { 0xa438, 0xacb4 }, \ - { 0xa438, 0xddac }, \ - { 0xa438, 0xb6fa }, \ - { 0xa438, 0xacb4 }, \ - { 0xa438, 0xf0ac }, \ - { 0xa438, 0xba92 }, \ - { 0xa438, 0xacb4 }, \ - { 0xa438, 0xffac }, \ - { 0xa438, 0x5600 }, \ - { 0xa438, 0xacb4 }, \ - { 0xa438, 0xccac }, \ - { 0xa438, 0xb6ff }, \ - { 0xa438, 0xb034 }, \ - { 0xa436, 0xb818 }, \ - { 0xa438, 0x2ae4 }, \ - { 0xa436, 0xb81a }, \ - { 0xa438, 0x380a }, \ - { 0xa436, 0xb81c }, \ - { 0xa438, 0x3edd }, \ - { 0xa436, 0xb81e }, \ - { 0xa438, 0x41a3 }, \ - { 0xa436, 0xb850 }, \ - { 0xa438, 0x0684 }, \ - { 0xa436, 0xb852 }, \ - { 0xa438, 0x1c02 }, \ - { 0xa436, 0xb878 }, \ - { 0xa438, 0x1b70 }, \ - { 0xa436, 0xb884 }, \ - { 0xa438, 0x0633 }, \ - { 0xa436, 0xb832 }, \ - { 0xa438, 0x00ff }, \ - { 0xa436, 0xacfc }, \ - { 0xa438, 0x0100 }, \ - { 0xa436, 0xacfe }, \ - { 0xa438, 0x8000 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x27ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3c67 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x47ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3e67 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x67ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3067 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x87ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3267 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3467 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xcfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3667 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xefff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3867 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3a67 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3ce7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3ee7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x30e7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x32e7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xafff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x34e7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1008 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff4 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x36ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1048 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff5 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x38ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1088 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3aff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x10c8 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf417 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1109 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf434 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0207 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1149 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0455 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2227 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1189 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1476 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4247 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x11c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6267 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1209 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1249 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2027 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1289 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4047 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x12c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6067 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1309 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8087 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1349 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa0a7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1389 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc0c7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x13c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe0e7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x140b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0107 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x144b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2127 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x148b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4147 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x14cb }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2417 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6167 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x5109 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3434 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8287 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x5149 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0455 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa2a7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x5189 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1476 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc2c7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x51c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2417 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe2e7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x5009 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3434 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0a0f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x5049 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0455 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2a2f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x5089 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1476 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4a4f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x50c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6a6f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x5209 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x080f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x5249 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x282f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x5289 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x484f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x52c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x686f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x5309 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x888f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x5349 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa8af }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x5389 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc8cf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x53c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe8ef }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x550b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x090f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x554b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x292f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x558b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x494f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x55cb }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2417 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x696f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x9209 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3434 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8a8f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x9249 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0455 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xaaaf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x9289 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1476 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xcacf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x92c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2417 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xeaef }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x9009 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3434 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1217 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x9049 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0455 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3237 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x9089 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1476 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5257 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x90c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7277 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x9109 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1017 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x9149 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3037 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x9189 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5057 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x91c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7077 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x9309 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9097 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x9349 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb0b7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x9389 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd0d7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x93c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf0f7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x960b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1117 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x964b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3137 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x968b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5157 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x96cb }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2417 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7177 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd309 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3434 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9297 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd349 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0455 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb2b7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd389 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1476 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd2d7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd3c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2417 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf2f7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd009 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3434 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1a1f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd049 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0455 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3a3f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd089 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1476 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5a5f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd0c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7a7f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd109 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x181f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd149 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x383f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd189 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x585f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd1c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x787f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd209 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x989f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd249 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb8bf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd289 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd8df }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd2c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf8ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd70b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x191f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd74b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x393f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd78b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x595f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd7cb }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2417 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x797f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x000d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3434 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9a9f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x004d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0455 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xbabf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x008d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1476 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xdadf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x00cd }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2c17 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xfaf8 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x400d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3c34 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8187 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x404d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0c55 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa1a7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x408d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1c76 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc1c7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x40cd }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2c97 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe1e7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x800d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3cb4 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x898f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x804d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0cd5 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa9af }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x808d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1cf6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc9cf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x80cd }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2d17 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe9ef }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xc00d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3d34 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9197 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xc04d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0d55 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb1b7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xc08d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1d76 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd1d7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xc0cd }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2d97 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf1f7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3dbf }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x999f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0ddf }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb9bf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1dff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd9df }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf9ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x17ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x37ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3d67 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x57ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3f67 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x77ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3167 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x97ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3367 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3567 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xdfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3767 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3967 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3b67 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3de7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3fe7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x31e7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x33e7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xbfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x35e7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x07ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x37e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x27ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x39e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x47ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3be6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x67ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2066 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x07ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2264 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x27ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2464 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x47ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2664 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x67ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0064 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x87ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0264 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0464 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0664 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0864 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x07ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0a65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x27ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0c65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x47ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0e65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x67ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1065 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x87ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1266 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1466 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1666 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2866 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2a66 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2c66 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2e66 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x20e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x22e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x24e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x26e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x00e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x02e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xafff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x04e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xcfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x06e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xefff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x08e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0ae5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0ce5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0ee5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x10e5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x12e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xafff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x14e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xcfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x16e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xefff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x28e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x17ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2ae6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x37ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2ce6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x57ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2ee6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x77ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2166 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x17ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2364 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x37ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2564 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x57ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2764 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x77ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0164 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x97ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0364 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0564 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0764 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0964 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x17ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0b65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x37ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0d65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x57ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0f65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x77ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1165 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x97ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1366 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1566 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1766 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2966 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2b66 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2d66 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2f66 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x21e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x23e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x25e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x27e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x01e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x03e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xbfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x05e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xdfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x07e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x09e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0be5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0de5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0fe5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x11e5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x13e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xbfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x15e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xdfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x17e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x29e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x87ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2be5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2de5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2fe5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1865 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1a65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xafff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1c65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xcfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1e65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xefff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x18e5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x97ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1ae5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1ce5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1ee5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1965 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1b65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xbfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1d65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xdfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1f65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x19e5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x07ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1b9c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x27ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1d9c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1f9c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x589c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x17ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5c9c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x37ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x599c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5d9c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5a9c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x100e }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5eff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x104e }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff7 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5bff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x110e }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x114e }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf817 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x120f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf836 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc3c7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x124f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0997 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe3e7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x130f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19b6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0307 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x134f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4917 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2327 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x510f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5936 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4347 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x514f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0997 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6367 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x500f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19b6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8387 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x504f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4817 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa3a7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x520f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5836 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xcbcf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x524f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0997 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xebef }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x530f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19b6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0b0f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x534f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4917 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2b2f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x920f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5936 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4b4f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x924f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0997 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6b6f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x900f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19b6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8b8f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x904f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4817 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xabaf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x910f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5836 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd3d7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x914f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0997 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf3f7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x930f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19b6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1317 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x934f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4917 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3337 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd30f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5936 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5357 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd34f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0997 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7377 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd00f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19b6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9397 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd04f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4817 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb3b7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd10f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5836 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xdbdf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd14f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0997 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xfbff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd20f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19b6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1b1f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd24f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4917 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3b3f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x593f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5b5f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x099f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7b7f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19bf }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9b9f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xbbbf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x07ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffa4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x27ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffa4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x47ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffa4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x67ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x58a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5ca4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x50a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x54a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x59a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x17ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5da4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x37ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x51a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x57ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x55a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x77ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5aa4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5ea4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x52a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x56a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5ba4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x2a06 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x2b06 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff7 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x53ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x2a06 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff4 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x57ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x2b06 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf615 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf63f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x069f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x16bf }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd0ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x6a46 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5ff6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd4ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x6b46 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff7 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd8ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x6a46 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff4 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xdcff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x6b46 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf615 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf63f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x069f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x16bf }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd1ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xaa86 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5ff6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd5ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xab86 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff7 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd9ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xaa86 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff4 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xddff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xab86 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf615 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf63f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x069f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x16bf }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd2ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xeac6 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5ff6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd6ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xebc6 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff7 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xdaff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xeac6 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff4 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xdeff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xebc6 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf615 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf63f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0017 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x069f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0013 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x16bf }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0013 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0013 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xfffa }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd3ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0013 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd7e7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0017 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xdbe7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0017 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x07ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xdfe7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0017 }, \ - { 0xa436, 0xacfc }, \ - { 0xa438, 0x0000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2000 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2001 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6008 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2002 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6010 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2003 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6020 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2004 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6060 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2005 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x60a0 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2006 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x60e0 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2007 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6128 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2008 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6178 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2009 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x61a8 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x200a }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x61f0 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x200b }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6248 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x200c }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6258 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x200d }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6268 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x200e }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6270 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x200f }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6274 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2010 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x627c }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2011 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6284 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2012 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6294 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2013 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x629c }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2014 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x62ac }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2015 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x62bc }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2016 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x62c4 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2017 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x7000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2018 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2019 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x201a }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x201b }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x201c }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x201d }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x201e }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x201f }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x0000 }, \ - { 0xa436, 0x0000 }, \ - { 0xa438, 0x0000 }, \ - { 0xb82e, 0x0000 }, \ - { 0xa436, 0x8023 }, \ - { 0xa438, 0x0000 }, \ - { 0xa436, 0x801e }, \ - { 0xa438, 0x0027 }, \ - { 0xb820, 0x0000 }, \ - { 0xb892, 0x0000 }, \ - { 0xb88e, 0xc15c }, \ - { 0xb890, 0x0303 }, \ - { 0xb890, 0x0506 }, \ - { 0xb890, 0x0807 }, \ - { 0xb890, 0x090b }, \ - { 0xb890, 0x0e12 }, \ - { 0xb890, 0x1617 }, \ - { 0xb890, 0x1c24 }, \ - { 0xb890, 0x2b37 }, \ - { 0xb890, 0x0203 }, \ - { 0xb890, 0x0304 }, \ - { 0xb890, 0x0504 }, \ - { 0xb890, 0x0506 }, \ - { 0xb890, 0x0708 }, \ - { 0xb890, 0x090a }, \ - { 0xb890, 0x0b0e }, \ - { 0xb890, 0x1013 }, \ - { 0xb890, 0x1519 }, \ - { 0xb890, 0x1d22 }, \ - { 0xb890, 0x282e }, \ - { 0xb890, 0x363e }, \ - { 0xb890, 0x474b }, \ - { 0xb88e, 0xc196 }, \ - { 0xb890, 0x3f5e }, \ - { 0xb890, 0xf834 }, \ - { 0xb890, 0x6c01 }, \ - { 0xb890, 0xa67f }, \ - { 0xb890, 0xa06c }, \ - { 0xb890, 0x043b }, \ - { 0xb890, 0x6190 }, \ - { 0xb890, 0x88db }, \ - { 0xb890, 0x9ecd }, \ - { 0xb890, 0x4dbc }, \ - { 0xb890, 0x6e0e }, \ - { 0xb890, 0x9f2d }, \ - { 0xb890, 0x2c18 }, \ - { 0xb890, 0x5e8c }, \ - { 0xb890, 0x5bfe }, \ - { 0xb890, 0x183c }, \ - { 0xb890, 0x23c9 }, \ - { 0xb890, 0x3e84 }, \ - { 0xb890, 0x3c20 }, \ - { 0xb890, 0xcc56 }, \ - { 0xb890, 0x3480 }, \ - { 0xb890, 0x0040 }, \ - { 0xb88e, 0xc00f }, \ - { 0xb890, 0x3502 }, \ - { 0xb890, 0x0203 }, \ - { 0xb890, 0x0303 }, \ - { 0xb890, 0x0404 }, \ - { 0xb890, 0x0506 }, \ - { 0xb890, 0x0607 }, \ - { 0xb890, 0x080a }, \ - { 0xb890, 0x0b0d }, \ - { 0xb890, 0x0e10 }, \ - { 0xb890, 0x1114 }, \ - { 0xb890, 0x171b }, \ - { 0xb890, 0x1f22 }, \ - { 0xb890, 0x2832 }, \ - { 0xb890, 0x0101 }, \ - { 0xb890, 0x0101 }, \ - { 0xb890, 0x0202 }, \ - { 0xb890, 0x0303 }, \ - { 0xb890, 0x0404 }, \ - { 0xb890, 0x0506 }, \ - { 0xb890, 0x0709 }, \ - { 0xb890, 0x0a0d }, \ - { 0xb88e, 0xc047 }, \ - { 0xb890, 0x365f }, \ - { 0xb890, 0xbe10 }, \ - { 0xb890, 0x84e4 }, \ - { 0xb890, 0x60e9 }, \ - { 0xb890, 0xa86a }, \ - { 0xb890, 0xf1e3 }, \ - { 0xb890, 0xf73f }, \ - { 0xb890, 0x5c02 }, \ - { 0xb890, 0x9547 }, \ - { 0xb890, 0xc30c }, \ - { 0xb890, 0xb064 }, \ - { 0xb890, 0x079a }, \ - { 0xb890, 0x1e23 }, \ - { 0xb890, 0x1b5d }, \ - { 0xb890, 0x92e7 }, \ - { 0xb890, 0x4baf }, \ - { 0xb890, 0x2386 }, \ - { 0xb890, 0x01b6 }, \ - { 0xb890, 0x6f82 }, \ - { 0xb890, 0xdc1c }, \ - { 0xb890, 0x8c92 }, \ - { 0xb88e, 0xc110 }, \ - { 0xb890, 0x0c7f }, \ - { 0xb890, 0x1014 }, \ - { 0xb890, 0x231d }, \ - { 0xb890, 0x2023 }, \ - { 0xb890, 0x2628 }, \ - { 0xb890, 0x2a2d }, \ - { 0xb890, 0x2d2c }, \ - { 0xb890, 0x2c2e }, \ - { 0xb890, 0x320d }, \ - { 0xb88e, 0xc186 }, \ - { 0xb890, 0x0306 }, \ - { 0xb890, 0x0804 }, \ - { 0xb890, 0x0406 }, \ - { 0xb890, 0x0707 }, \ - { 0xb890, 0x0709 }, \ - { 0xb890, 0x0b0f }, \ - { 0xb890, 0x161d }, \ - { 0xb890, 0x202a }, \ - { 0xb890, 0x3f5e }, \ - { 0xb88e, 0xc1c1 }, \ - { 0xb890, 0x0040 }, \ - { 0xb890, 0x5920 }, \ - { 0xb890, 0x88cd }, \ - { 0xb890, 0x1ca1 }, \ - { 0xb890, 0x3d20 }, \ - { 0xb890, 0x3ae4 }, \ - { 0xb890, 0x6a43 }, \ - { 0xb890, 0x30af }, \ - { 0xb890, 0xdd16 }, \ - { 0xb88e, 0xc283 }, \ - { 0xb890, 0x1611 }, \ - { 0xb890, 0x161c }, \ - { 0xb890, 0x2127 }, \ - { 0xb890, 0x2c32 }, \ - { 0xb890, 0x373d }, \ - { 0xb890, 0x4247 }, \ - { 0xb890, 0x4d52 }, \ - { 0xb890, 0x585a }, \ - { 0xb890, 0x0004 }, \ - { 0xb890, 0x080c }, \ - { 0xb890, 0x1014 }, \ - { 0xb890, 0x181b }, \ - { 0xb890, 0x1f23 }, \ - { 0xb890, 0x272b }, \ - { 0xb890, 0x2f33 }, \ - { 0xb890, 0x363a }, \ - { 0xb890, 0x3e42 }, \ - { 0xb890, 0x464a }, \ - { 0xb890, 0x4d51 }, \ - { 0xb890, 0x5559 }, \ - { 0xb890, 0x5d65 }, \ - { 0xb890, 0xe769 }, \ - { 0xb890, 0xeb56 }, \ - { 0xb890, 0xc04b }, \ - { 0xb890, 0xd502 }, \ - { 0xb890, 0x2fb1 }, \ - { 0xb890, 0x33b5 }, \ - { 0xb890, 0x37f8 }, \ - { 0xb890, 0xbb98 }, \ - { 0xb890, 0x7450 }, \ - { 0xb890, 0x4c48 }, \ - { 0xb890, 0x12dc }, \ - { 0xb890, 0xdcdc }, \ - { 0xb890, 0x934a }, \ - { 0xb890, 0x3e33 }, \ - { 0xb890, 0xe496 }, \ - { 0xb890, 0x724e }, \ - { 0xb890, 0x2b07 }, \ - { 0xb890, 0xe4c0 }, \ - { 0xb890, 0x9c79 }, \ - { 0xb890, 0x5512 }, \ - { 0xb88e, 0xc212 }, \ - { 0xb890, 0x2020 }, \ - { 0xb890, 0x2020 }, \ - { 0xb890, 0x2020 }, \ - { 0xb890, 0x2020 }, \ - { 0xb890, 0x2020 }, \ - { 0xb890, 0x2019 }, \ - { 0xb88e, 0xc24d }, \ - { 0xb890, 0x8400 }, \ - { 0xb890, 0x0000 }, \ - { 0xb890, 0x0000 }, \ - { 0xb890, 0x0000 }, \ - { 0xb890, 0x0000 }, \ - { 0xb890, 0x0000 }, \ - { 0xb88e, 0xc2d3 }, \ - { 0xb890, 0x5524 }, \ - { 0xb890, 0x2526 }, \ - { 0xb890, 0x2728 }, \ - { 0xb88e, 0xc2e3 }, \ - { 0xb890, 0x3323 }, \ - { 0xb890, 0x2324 }, \ - { 0xb890, 0x2425 } - static const struct { uint16_t reg; uint16_t val; @@ -13393,8 +9616,6 @@ static const struct { MAC_R25B_MCU }, mac_r25d_mcu[] = { MAC_R25D_MCU -}, mac_r26_mcu[] = { - MAC_R26_MCU }; diff --git a/sys/dev/rge/if_rgereg.h b/sys/dev/rge/if_rgereg.h index 5bec9c023cca..7b34e3cefbe6 100644 --- a/sys/dev/rge/if_rgereg.h +++ b/sys/dev/rge/if_rgereg.h @@ -366,11 +366,15 @@ struct rge_hw_mac_stats { /* Ram version */ #define RGE_MAC_R25D_RCODE_VER 0x0027 -#define RGE_MAC_R26_RCODE_VER 0x0033 +#define RGE_MAC_R26_1_RCODE_VER 0x0033 +#define RGE_MAC_R26_2_RCODE_VER 0x0060 #define RGE_MAC_R27_RCODE_VER 0x0036 #define RGE_MAC_R25_RCODE_VER 0x0b33 #define RGE_MAC_R25B_RCODE_VER 0x0b99 +#define RGE_TYPE_R26(sc) \ + ((sc)->rge_type == MAC_R26_1 || (sc)->rge_type == MAC_R26_2) + #define RGE_TIMEOUT 100 #define RGE_JUMBO_FRAMELEN 9216 diff --git a/sys/dev/rge/if_rgevar.h b/sys/dev/rge/if_rgevar.h index 4b85043f7553..504d56cba423 100644 --- a/sys/dev/rge/if_rgevar.h +++ b/sys/dev/rge/if_rgevar.h @@ -31,7 +31,8 @@ enum rge_mac_type { MAC_R25, MAC_R25B, MAC_R25D, - MAC_R26, + MAC_R26_1, + MAC_R26_2, MAC_R27 }; diff --git a/sys/dev/sdhci/sdhci_pci.c b/sys/dev/sdhci/sdhci_pci.c index 4cd007db904a..4f9bbfec50fb 100644 --- a/sys/dev/sdhci/sdhci_pci.c +++ b/sys/dev/sdhci/sdhci_pci.c @@ -171,7 +171,7 @@ SYSCTL_INT(_hw_sdhci, OID_AUTO, enable_msi, CTLFLAG_RDTUN, &sdhci_enable_msi, 0, "Enable MSI interrupts"); static uint8_t -sdhci_pci_read_1(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) +sdhci_pci_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off) { struct sdhci_pci_softc *sc = device_get_softc(dev); @@ -181,8 +181,8 @@ sdhci_pci_read_1(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) } static void -sdhci_pci_write_1(device_t dev, struct sdhci_slot *slot __unused, - bus_size_t off, uint8_t val) +sdhci_pci_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off, + uint8_t val) { struct sdhci_pci_softc *sc = device_get_softc(dev); @@ -192,7 +192,7 @@ sdhci_pci_write_1(device_t dev, struct sdhci_slot *slot __unused, } static uint16_t -sdhci_pci_read_2(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) +sdhci_pci_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off) { struct sdhci_pci_softc *sc = device_get_softc(dev); @@ -202,8 +202,8 @@ sdhci_pci_read_2(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) } static void -sdhci_pci_write_2(device_t dev, struct sdhci_slot *slot __unused, - bus_size_t off, uint16_t val) +sdhci_pci_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off, + uint16_t val) { struct sdhci_pci_softc *sc = device_get_softc(dev); @@ -213,7 +213,7 @@ sdhci_pci_write_2(device_t dev, struct sdhci_slot *slot __unused, } static uint32_t -sdhci_pci_read_4(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) +sdhci_pci_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off) { struct sdhci_pci_softc *sc = device_get_softc(dev); @@ -223,8 +223,8 @@ sdhci_pci_read_4(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) } static void -sdhci_pci_write_4(device_t dev, struct sdhci_slot *slot __unused, - bus_size_t off, uint32_t val) +sdhci_pci_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, + uint32_t val) { struct sdhci_pci_softc *sc = device_get_softc(dev); @@ -234,8 +234,8 @@ sdhci_pci_write_4(device_t dev, struct sdhci_slot *slot __unused, } static void -sdhci_pci_read_multi_4(device_t dev, struct sdhci_slot *slot __unused, - bus_size_t off, uint32_t *data, bus_size_t count) +sdhci_pci_read_multi_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, + uint32_t *data, bus_size_t count) { struct sdhci_pci_softc *sc = device_get_softc(dev); @@ -243,8 +243,8 @@ sdhci_pci_read_multi_4(device_t dev, struct sdhci_slot *slot __unused, } static void -sdhci_pci_write_multi_4(device_t dev, struct sdhci_slot *slot __unused, - bus_size_t off, uint32_t *data, bus_size_t count) +sdhci_pci_write_multi_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, + uint32_t *data, bus_size_t count) { struct sdhci_pci_softc *sc = device_get_softc(dev); diff --git a/sys/dev/sdio/sdio_subr.c b/sys/dev/sdio/sdio_subr.c index f234eb8bdc84..64b1145e2057 100644 --- a/sys/dev/sdio/sdio_subr.c +++ b/sys/dev/sdio/sdio_subr.c @@ -166,6 +166,36 @@ sdio_write_1(struct sdio_func *f, uint32_t addr, uint8_t val, int *err) *err = error; } +uint16_t +sdio_read_2(struct sdio_func *f, uint32_t addr, int *err) +{ + int error; + uint16_t v; + + error = SDIO_READ_EXTENDED(device_get_parent(f->dev), f->fn, addr, + sizeof(v), (uint8_t *)&v, true); + if (error) { + if (err != NULL) + *err = error; + return (0xffff); + } else { + if (err != NULL) + *err = 0; + return (le16toh(v)); + } +} + +void +sdio_write_2(struct sdio_func *f, uint32_t addr, uint16_t val, int *err) +{ + int error; + + error = SDIO_WRITE_EXTENDED(device_get_parent(f->dev), f->fn, addr, + sizeof(val), (uint8_t *)&val, true); + if (err != NULL) + *err = error; +} + uint32_t sdio_read_4(struct sdio_func *f, uint32_t addr, int *err) { diff --git a/sys/dev/sdio/sdio_subr.h b/sys/dev/sdio/sdio_subr.h index 2d2ae9b01230..96df2e7d658a 100644 --- a/sys/dev/sdio/sdio_subr.h +++ b/sys/dev/sdio/sdio_subr.h @@ -95,6 +95,8 @@ int sdio_set_block_size(struct sdio_func *, uint16_t); uint8_t sdio_read_1(struct sdio_func *, uint32_t, int *); void sdio_write_1(struct sdio_func *, uint32_t, uint8_t, int *); +uint16_t sdio_read_2(struct sdio_func *, uint32_t, int *); +void sdio_write_2(struct sdio_func *, uint32_t, uint16_t, int *); uint32_t sdio_read_4(struct sdio_func *, uint32_t, int *); void sdio_write_4(struct sdio_func *, uint32_t, uint32_t, int *); diff --git a/sys/dev/smartpqi/smartpqi_cam.c b/sys/dev/smartpqi/smartpqi_cam.c index ffdd9fd7da79..93043a296c5d 100644 --- a/sys/dev/smartpqi/smartpqi_cam.c +++ b/sys/dev/smartpqi/smartpqi_cam.c @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -71,7 +71,6 @@ update_sim_properties(struct cam_sim *sim, struct ccb_pathinq *cpi) cpi->hba_subvendor = pci_get_subvendor(dev); cpi->hba_subdevice = pci_get_subdevice(dev); - DBG_FUNC("OUT\n"); } @@ -154,10 +153,6 @@ os_remove_device(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device) } xpt_async(AC_LOST_DEVICE, tmppath, NULL); xpt_free_path(tmppath); - /* softs->device_list[device->target][device->lun] = NULL; */ - int index = pqisrc_find_device_list_index(softs,device); - if (index >= 0 && index < PQI_MAX_DEVICES) - softs->dev_list[index] = NULL; pqisrc_free_device(softs, device); } @@ -335,7 +330,7 @@ os_io_response_success(rcb_t *rcb) static void copy_sense_data_to_csio(struct ccb_scsiio *csio, - uint8_t *sense_data, uint16_t sense_data_len) + uint8_t const *sense_data, uint16_t sense_data_len) { DBG_IO("IN csio = %p\n", csio); @@ -740,7 +735,7 @@ smartpqi_target_rescan(struct pqisrc_softstate *softs) /* if(softs->device_list[target][lun]){ */ if(softs->dev_list[index] != NULL) { device = softs->dev_list[index]; - DBG_INFO("calling smartpqi_lun_rescan with TL = %d:%d\n",device->target,device->lun); + DBG_INFO("calling smartpqi_lun_rescan with T%d:L%d\n",device->target,device->lun); smartpqi_lun_rescan(softs, device->target, device->lun); } } @@ -821,7 +816,6 @@ pqisrc_io_start(struct cam_sim *sim, union ccb *ccb) if (index == INVALID_ELEM) { ccb->ccb_h.status = CAM_DEV_NOT_THERE; - DBG_INFO("Invalid index/device!!!, Device BTL %u:%d:%d\n", softs->bus_id, target, lun); return ENXIO; } @@ -850,7 +844,7 @@ pqisrc_io_start(struct cam_sim *sim, union ccb *ccb) } /* Check device reset */ if (DEVICE_RESET(dvp)) { - ccb->ccb_h.status = CAM_SCSI_BUSY | CAM_REQ_INPROG | CAM_BUSY; + ccb->ccb_h.status = CAM_BUSY; DBG_WARN("Device %d reset returned busy\n", ccb->ccb_h.target_id); return EBUSY; } @@ -915,7 +909,7 @@ pqisrc_io_start(struct cam_sim *sim, union ccb *ccb) } static inline int -pqi_tmf_status_to_bsd_tmf_status(int pqi_status, rcb_t *rcb) +pqi_tmf_status_to_bsd_tmf_status(int pqi_status, rcb_t const *rcb) { if (PQI_STATUS_SUCCESS == pqi_status && PQI_STATUS_SUCCESS == rcb->status) @@ -931,7 +925,7 @@ static int pqisrc_scsi_abort_task(pqisrc_softstate_t *softs, union ccb *ccb) { rcb_t *rcb = NULL; - struct ccb_hdr *ccb_h = &ccb->ccb_h; + struct ccb_hdr const *ccb_h = &ccb->ccb_h; rcb_t *prcb = ccb->ccb_h.sim_priv.entries[0].ptr; uint32_t tag; int rval; @@ -971,7 +965,7 @@ error_tmf: static int pqisrc_scsi_abort_task_set(pqisrc_softstate_t *softs, union ccb *ccb) { - struct ccb_hdr *ccb_h = &ccb->ccb_h; + struct ccb_hdr const *ccb_h = &ccb->ccb_h; rcb_t *rcb = NULL; uint32_t tag; int rval; @@ -1013,7 +1007,7 @@ pqisrc_target_reset( pqisrc_softstate_t *softs, union ccb *ccb) { /* pqi_scsi_dev_t *devp = softs->device_list[ccb->ccb_h.target_id][ccb->ccb_h.target_lun]; */ - struct ccb_hdr *ccb_h = &ccb->ccb_h; + struct ccb_hdr const *ccb_h = &ccb->ccb_h; rcb_t *rcb = NULL; uint32_t tag; int rval; @@ -1069,7 +1063,7 @@ static void smartpqi_cam_action(struct cam_sim *sim, union ccb *ccb) { struct pqisrc_softstate *softs = cam_sim_softc(sim); - struct ccb_hdr *ccb_h = &ccb->ccb_h; + struct ccb_hdr const *ccb_h = &ccb->ccb_h; DBG_FUNC("IN\n"); @@ -1209,22 +1203,19 @@ smartpqi_async(void *callback_arg, u_int32_t code, } uint32_t t_id = cgd->ccb_h.target_id; - /* if (t_id <= (PQI_CTLR_INDEX - 1)) { */ - if (t_id >= PQI_CTLR_INDEX) { - if (softs != NULL) { - /* pqi_scsi_dev_t *dvp = softs->device_list[t_id][cgd->ccb_h.target_lun]; */ - int lun = cgd->ccb_h.target_lun; - int index = pqisrc_find_btl_list_index(softs,softs->bus_id,t_id,lun); - if (index != INVALID_ELEM) { - pqi_scsi_dev_t *dvp = softs->dev_list[index]; - if (dvp == NULL) { - DBG_ERR("Target is null, target id=%u\n", t_id); - break; - } - smartpqi_adjust_queue_depth(path, dvp->queue_depth); - } - } - } + if (softs != NULL) { + /* pqi_scsi_dev_t *dvp = softs->device_list[t_id][cgd->ccb_h.target_lun]; */ + int lun = cgd->ccb_h.target_lun; + int index = pqisrc_find_btl_list_index(softs,softs->bus_id,t_id,lun); + if (index != INVALID_ELEM) { + pqi_scsi_dev_t const *dvp = softs->dev_list[index]; + if (dvp == NULL) { + DBG_ERR("Target is null, target id=%u\n", t_id); + break; + } + smartpqi_adjust_queue_depth(path, dvp->queue_depth); + } + } break; } default: diff --git a/sys/dev/smartpqi/smartpqi_cmd.c b/sys/dev/smartpqi/smartpqi_cmd.c index 8486ac12df79..b71879aa81f6 100644 --- a/sys/dev/smartpqi/smartpqi_cmd.c +++ b/sys/dev/smartpqi/smartpqi_cmd.c @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -35,7 +35,7 @@ pqisrc_submit_cmnd(pqisrc_softstate_t *softs, ib_queue_t *ib_q, void *req) { char *slot = NULL; uint32_t offset; - iu_header_t *hdr = (iu_header_t *)req; + iu_header_t const *hdr = (iu_header_t *)req; /*TODO : Can be fixed a size copying of IU ? */ uint32_t iu_len = hdr->iu_length + 4 ; /* header size */ int i = 0; diff --git a/sys/dev/smartpqi/smartpqi_controllers.h b/sys/dev/smartpqi/smartpqi_controllers.h new file mode 100644 index 000000000000..6356159fd5f7 --- /dev/null +++ b/sys/dev/smartpqi/smartpqi_controllers.h @@ -0,0 +1,371 @@ +/*- + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Supported controllers + */ +struct pqi_ident +{ + u_int16_t vendor; + u_int16_t device; + u_int16_t subvendor; + u_int16_t subdevice; + int hwif; + char *desc; +} pqi_identifiers[] = { + /* (MSCC PM8205 8x12G based) */ + {0x9005, 0x028f, 0x103c, 0x600, PQI_HWIF_SRCV, "P408i-p SR Gen10"}, + {0x9005, 0x028f, 0x103c, 0x601, PQI_HWIF_SRCV, "P408e-p SR Gen10"}, + {0x9005, 0x028f, 0x103c, 0x602, PQI_HWIF_SRCV, "P408i-a SR Gen10"}, + {0x9005, 0x028f, 0x103c, 0x603, PQI_HWIF_SRCV, "P408i-c SR Gen10"}, + {0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"}, + {0x9005, 0x028f, 0x9005, 0x608, PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"}, + {0x9005, 0x028f, 0x103c, 0x609, PQI_HWIF_SRCV, "P408i-sb SR G10"}, + + /* (MSCC PM8225 8x12G based) */ + {0x9005, 0x028f, 0x103c, 0x650, PQI_HWIF_SRCV, "E208i-p SR Gen10"}, + {0x9005, 0x028f, 0x103c, 0x651, PQI_HWIF_SRCV, "E208e-p SR Gen10"}, + {0x9005, 0x028f, 0x103c, 0x652, PQI_HWIF_SRCV, "E208i-c SR Gen10"}, + {0x9005, 0x028f, 0x103c, 0x654, PQI_HWIF_SRCV, "E208i-a SR Gen10"}, + {0x9005, 0x028f, 0x103c, 0x655, PQI_HWIF_SRCV, "P408e-m SR Gen10"}, + {0x9005, 0x028f, 0x9005, 0x659, PQI_HWIF_SRCV, "2100C8iOXS"}, + + /* (MSCC PM8221 8x12G based) */ + {0x9005, 0x028f, 0x103c, 0x700, PQI_HWIF_SRCV, "P204i-c SR Gen10"}, + {0x9005, 0x028f, 0x103c, 0x701, PQI_HWIF_SRCV, "P204i-b SR Gen10"}, + {0x9005, 0x028f, 0x193d, 0x1104, PQI_HWIF_SRCV, "UN RAID P2404-Mf-4i-2GB"}, + {0x9005, 0x028f, 0x193d, 0x1106, PQI_HWIF_SRCV, "UN RAID P2404-Mf-4i-1GB"}, + {0x9005, 0x028f, 0x193d, 0x1108, PQI_HWIF_SRCV, "UN RAID P4408-Ma-8i-2GB"}, + {0x9005, 0x028f, 0x193d, 0x1109, PQI_HWIF_SRCV, "UN RAID P4408-Mr-8i-2GB"}, + + /* (MSCC PM8204 8x12G based) */ + {0x9005, 0x028f, 0x9005, 0x800, PQI_HWIF_SRCV, "SmartRAID 3154-8i"}, + {0x9005, 0x028f, 0x9005, 0x801, PQI_HWIF_SRCV, "SmartRAID 3152-8i"}, + {0x9005, 0x028f, 0x9005, 0x802, PQI_HWIF_SRCV, "SmartRAID 3151-4i"}, + {0x9005, 0x028f, 0x9005, 0x803, PQI_HWIF_SRCV, "SmartRAID 3101-4i"}, + {0x9005, 0x028f, 0x9005, 0x804, PQI_HWIF_SRCV, "SmartRAID 3154-8e"}, + {0x9005, 0x028f, 0x9005, 0x805, PQI_HWIF_SRCV, "SmartRAID 3102-8i"}, + {0x9005, 0x028f, 0x9005, 0x806, PQI_HWIF_SRCV, "SmartRAID 3100"}, + {0x9005, 0x028f, 0x9005, 0x807, PQI_HWIF_SRCV, "SmartRAID 3162-8i"}, + {0x9005, 0x028f, 0x152d, 0x8a22, PQI_HWIF_SRCV, "QS-8204-8i"}, + {0x9005, 0x028f, 0x193d, 0xf460, PQI_HWIF_SRCV, "UN RAID P460-M4"}, + {0x9005, 0x028f, 0x193d, 0xf461, PQI_HWIF_SRCV, "UN RAID P460-B4"}, + {0x9005, 0x028f, 0x1bd4, 0x004b, PQI_HWIF_SRCV, "PM8204-2GB"}, + {0x9005, 0x028f, 0x1bd4, 0x004c, PQI_HWIF_SRCV, "PM8204-4GB"}, + {0x9005, 0x028f, 0x1ff9, 0x004b, PQI_HWIF_SRCV, "RAID PM8204-2GB"}, + {0x9005, 0x028f, 0x1ff9, 0x004c, PQI_HWIF_SRCV, "RAID PM8204-4GB"}, + {0x9005, 0x028f, 0x193d, 0x0462, PQI_HWIF_SRCV, "UN RAID P460-Mr1-8i-4GB"}, + {0x9005, 0x028f, 0x193d, 0x1105, PQI_HWIF_SRCV, "UN RAID P4408-Mf-8i-2GB"}, + {0x9005, 0x028f, 0x193d, 0x1107, PQI_HWIF_SRCV, "UN RAID P4408-Mf-8i-4GB"}, + {0x9005, 0x028f, 0x193d, 0x1110, PQI_HWIF_SRCV, "UN RAID P4408-Mr-2"}, + {0x9005, 0x028f, 0x1d8d, 0x800, PQI_HWIF_SRCV, "Fiberhome SmartRAID AIS-8204-8i"}, + {0x9005, 0x028f, 0x9005, 0x0808, PQI_HWIF_SRCV, "SmartRAID 3101E-4i"}, + {0x9005, 0x028f, 0x9005, 0x0809, PQI_HWIF_SRCV, "SmartRAID 3102E-8i"}, + {0x9005, 0x028f, 0x9005, 0x080a, PQI_HWIF_SRCV, "SmartRAID 3152-8i/N"}, + {0x9005, 0x028f, 0x1cc4, 0x0101, PQI_HWIF_SRCV, "Ramaxel FBGF-RAD PM8204"}, + {0x9005, 0x028f, 0x1f3a, 0x0104, PQI_HWIF_SRCV, "PL SmartROC PM8204"}, + {0x9005, 0x028f, 0x1f51, 0x1043, PQI_HWIF_SRCV, "SmartRAID P7502-8i"}, + {0x9005, 0x028f, 0x1f51, 0x1045, PQI_HWIF_SRCV, "SmartRAID P7504-8i"}, + {0x9005, 0x028f, 0x1f51, 0x1011, PQI_HWIF_SRCV, "SmartRAID P7504N-8i"}, + {0x9005, 0x028f, 0x207d, 0x4140, PQI_HWIF_SRCV, "HRDT TrustRAID D3152s-8i"}, + {0x9005, 0x028f, 0x207d, 0x4240, PQI_HWIF_SRCV, "HRDT TrustRAID D3154s-8i"}, + + /* (MSCC PM8222 8x12G based) */ + {0x9005, 0x028f, 0x9005, 0x900, PQI_HWIF_SRCV, "SmartHBA 2100-8i"}, + {0x9005, 0x028f, 0x9005, 0x901, PQI_HWIF_SRCV, "SmartHBA 2100-4i"}, + {0x9005, 0x028f, 0x9005, 0x902, PQI_HWIF_SRCV, "HBA 1100-8i"}, + {0x9005, 0x028f, 0x9005, 0x903, PQI_HWIF_SRCV, "HBA 1100-4i"}, + {0x9005, 0x028f, 0x9005, 0x904, PQI_HWIF_SRCV, "SmartHBA 2100-8e"}, + {0x9005, 0x028f, 0x9005, 0x905, PQI_HWIF_SRCV, "HBA 1100-8e"}, + {0x9005, 0x028f, 0x9005, 0x906, PQI_HWIF_SRCV, "SmartHBA 2100-4i4e"}, + {0x9005, 0x028f, 0x9005, 0x907, PQI_HWIF_SRCV, "HBA 1100"}, + {0x9005, 0x028f, 0x9005, 0x908, PQI_HWIF_SRCV, "SmartHBA 2100"}, + {0x9005, 0x028f, 0x9005, 0x90a, PQI_HWIF_SRCV, "SmartHBA 2100A-8i"}, + {0x9005, 0x028f, 0x193d, 0x8460, PQI_HWIF_SRCV, "UN HBA H460-M1"}, + {0x9005, 0x028f, 0x193d, 0x8461, PQI_HWIF_SRCV, "UN HBA H460-B1"}, + {0x9005, 0x028f, 0x193d, 0x8462, PQI_HWIF_SRCV, "UN HBA H460-Mr1-8i"}, + {0x9005, 0x028f, 0x193d, 0xc460, PQI_HWIF_SRCV, "UN RAID P460-M2"}, + {0x9005, 0x028f, 0x193d, 0xc461, PQI_HWIF_SRCV, "UN RAID P460-B2"}, + {0x9005, 0x028f, 0x1bd4, 0x004a, PQI_HWIF_SRCV, "PM8222-SHBA"}, + {0x9005, 0x028f, 0x1ff9, 0x004a, PQI_HWIF_SRCV, "PM8222-SHBA"}, + {0x9005, 0x028f, 0x13fe, 0x8312, PQI_HWIF_SRCV, "MIC-8312BridgeB"}, + {0x9005, 0x028f, 0x1bd4, 0x004f, PQI_HWIF_SRCV, "PM8222-HBA"}, + {0x9005, 0x028f, 0x1ff9, 0x004f, PQI_HWIF_SRCV, "PM8222-HBA"}, + {0x9005, 0x028f, 0x1d8d, 0x908, PQI_HWIF_SRCV, "Fiberhome SmartHBA AIS-8222-8i"}, + {0x9005, 0x028f, 0x1bd4, 0x006C, PQI_HWIF_SRCV, "RS0800M5E8i"}, + {0x9005, 0x028f, 0x1bd4, 0x006D, PQI_HWIF_SRCV, "RS0800M5H8i"}, + {0x9005, 0x028f, 0x1ff9, 0x006C, PQI_HWIF_SRCV, "RS0800M5E8i"}, + {0x9005, 0x028f, 0x1ff9, 0x006D, PQI_HWIF_SRCV, "RS0800M5H8i"}, + {0x9005, 0x028f, 0x1cc4, 0x0201, PQI_HWIF_SRCV, "Ramaxel FBGF-RAD PM8222"}, + {0x9005, 0x028f, 0x1f51, 0x1044, PQI_HWIF_SRCV, "SmartHBA P6500-8i"}, + {0x9005, 0x028f, 0x1f3f, 0x0610, PQI_HWIF_SRCV, "3SNIC SSSRAID 3S610"}, + {0x9005, 0x028f, 0x207d, 0x4840, PQI_HWIF_SRCV, "HRDT TrustHBA H3100s-8i"}, + + /* (SRCx MSCC FVB 24x12G based) */ + {0x9005, 0x028f, 0x103c, 0x1001, PQI_HWIF_SRCV, "MSCC FVB"}, + + /* (MSCC PM8241 24x12G based) */ + + /* (MSCC PM8242 24x12G based) */ + {0x9005, 0x028f, 0x152d, 0x8a37, PQI_HWIF_SRCV, "QS-8242-24i"}, + {0x9005, 0x028f, 0x9005, 0x1300, PQI_HWIF_SRCV, "HBA 1100-8i8e"}, + {0x9005, 0x028f, 0x9005, 0x1301, PQI_HWIF_SRCV, "HBA 1100-24i"}, + {0x9005, 0x028f, 0x9005, 0x1302, PQI_HWIF_SRCV, "SmartHBA 2100-8i8e"}, + {0x9005, 0x028f, 0x9005, 0x1303, PQI_HWIF_SRCV, "SmartHBA 2100-24i"}, + {0x9005, 0x028f, 0x105b, 0x1321, PQI_HWIF_SRCV, "8242-24i"}, + {0x9005, 0x028f, 0x1bd4, 0x0045, PQI_HWIF_SRCV, "SMART-HBA 8242-24i"}, + {0x9005, 0x028f, 0x1ff9, 0x0045, PQI_HWIF_SRCV, "SMART-HBA 8242-24i"}, + {0x9005, 0x028f, 0x1bd4, 0x006B, PQI_HWIF_SRCV, "RS0800M5H24i"}, + {0x9005, 0x028f, 0x1bd4, 0x0070, PQI_HWIF_SRCV, "RS0800M5E24i"}, + {0x9005, 0x028f, 0x1ff9, 0x006B, PQI_HWIF_SRCV, "RS0800M5H24i"}, + {0x9005, 0x028f, 0x1ff9, 0x0070, PQI_HWIF_SRCV, "RS0800M5E24i"}, + + /* (MSCC PM8236 16x12G based) */ + {0x9005, 0x028f, 0x152d, 0x8a24, PQI_HWIF_SRCV, "QS-8236-16i"}, + {0x9005, 0x028f, 0x9005, 0x1380, PQI_HWIF_SRCV, "SmartRAID 3154-16i"}, + {0x9005, 0x028f, 0x1bd4, 0x0046, PQI_HWIF_SRCV, "RAID 8236-16i"}, + {0x9005, 0x028f, 0x1ff9, 0x0046, PQI_HWIF_SRCV, "RAID 8236-16i"}, + {0x9005, 0x028f, 0x1d8d, 0x806, PQI_HWIF_SRCV, "Fiberhome SmartRAID AIS-8236-16i"}, + {0x9005, 0x028f, 0x1cf2, 0x0B27, PQI_HWIF_SRCV, "ZTE SmartROC3100 SDPSA/B-18i 4G"}, + {0x9005, 0x028f, 0x1cf2, 0x0B45, PQI_HWIF_SRCV, "ZTE SmartROC3100 SDPSA/B_L-18i 2G"}, + {0x9005, 0x028f, 0x1cf2, 0x5445, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM241-18i 2G"}, + {0x9005, 0x028f, 0x1cf2, 0x5446, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM242-18i 4G"}, + {0x9005, 0x028f, 0x1cf2, 0x5449, PQI_HWIF_SRCV, "ZTE SmartROC3100 RS241-18i 2G"}, + {0x9005, 0x028f, 0x1cf2, 0x544A, PQI_HWIF_SRCV, "ZTE SmartROC3100 RS242-18i 4G"}, + {0x9005, 0x028f, 0x1cf2, 0x544D, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM241B-18i 2G"}, + {0x9005, 0x028f, 0x1cf2, 0x544E, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM242B-18i 4G"}, + {0x9005, 0x028f, 0x1bd4, 0x006F, PQI_HWIF_SRCV, "RS0804M5R16i"}, + {0x9005, 0x028f, 0x1ff9, 0x006F, PQI_HWIF_SRCV, "RS0804M5R16i"}, + {0x9005, 0x028f, 0x1f51, 0x1010, PQI_HWIF_SRCV, "SmartRAID P7504N-16i"}, + + + + /* (MSCC PM8237 24x12G based) */ + {0x9005, 0x028f, 0x103c, 0x1100, PQI_HWIF_SRCV, "P816i-a SR Gen10"}, + {0x9005, 0x028f, 0x103c, 0x1101, PQI_HWIF_SRCV, "P416ie-m SR G10"}, + + /* (MSCC PM8238 16x12G based) */ + {0x9005, 0x028f, 0x152d, 0x8a23, PQI_HWIF_SRCV, "QS-8238-16i"}, + {0x9005, 0x028f, 0x9005, 0x1280, PQI_HWIF_SRCV, "HBA 1100-16i"}, + {0x9005, 0x028f, 0x9005, 0x1281, PQI_HWIF_SRCV, "HBA 1100-16e"}, + {0x9005, 0x028f, 0x105b, 0x1211, PQI_HWIF_SRCV, "8238-16i"}, + {0x9005, 0x028f, 0x1bd4, 0x0048, PQI_HWIF_SRCV, "SMART-HBA 8238-16i"}, + {0x9005, 0x028f, 0x1ff9, 0x0048, PQI_HWIF_SRCV, "SMART-HBA 8238-16i"}, + {0x9005, 0x028f, 0x9005, 0x1282, PQI_HWIF_SRCV, "SmartHBA 2100-16i"}, + {0x9005, 0x028f, 0x1d8d, 0x916, PQI_HWIF_SRCV, "Fiberhome SmartHBA AIS-8238-16i"}, + {0x9005, 0x028f, 0x1458, 0x1000, PQI_HWIF_SRCV, "GIGABYTE SmartHBA CLN1832"}, + {0x9005, 0x028f, 0x1cf2, 0x0B29, PQI_HWIF_SRCV, "ZTE SmartIOC2100 SDPSA/B_I-18i"}, + {0x9005, 0x028f, 0x1cf2, 0x5447, PQI_HWIF_SRCV, "ZTE SmartIOC2100 RM243-18i"}, + {0x9005, 0x028f, 0x1cf2, 0x544B, PQI_HWIF_SRCV, "ZTE SmartIOC2100 RS243-18i"}, + {0x9005, 0x028f, 0x1cf2, 0x544F, PQI_HWIF_SRCV, "ZTE SmartIOC2100 RM243B-18i"}, + {0x9005, 0x028f, 0x1bd4, 0x0071, PQI_HWIF_SRCV, "RS0800M5H16i"}, + {0x9005, 0x028f, 0x1bd4, 0x0072, PQI_HWIF_SRCV, "RS0800M5E16i"}, + {0x9005, 0x028f, 0x1ff9, 0x0071, PQI_HWIF_SRCV, "RS0800M5H16i"}, + {0x9005, 0x028f, 0x1ff9, 0x0072, PQI_HWIF_SRCV, "RS0800M5E16i"}, + {0x9005, 0x028f, 0x1018, 0x8238, PQI_HWIF_SRCV, "Ramaxel SmartHBA RX8238-16i"}, + + /* (MSCC PM8240 24x12G based) */ + {0x9005, 0x028f, 0x152d, 0x8a36, PQI_HWIF_SRCV, "QS-8240-24i"}, + {0x9005, 0x028f, 0x9005, 0x1200, PQI_HWIF_SRCV, "SmartRAID 3154-24i"}, + {0x9005, 0x028f, 0x9005, 0x1201, PQI_HWIF_SRCV, "SmartRAID 3154-8i16e"}, + {0x9005, 0x028f, 0x9005, 0x1202, PQI_HWIF_SRCV, "SmartRAID 3154-8i8e"}, + {0x9005, 0x028f, 0x1bd4, 0x0047, PQI_HWIF_SRCV, "RAID 8240-24i"}, + {0x9005, 0x028f, 0x1ff9, 0x0047, PQI_HWIF_SRCV, "RAID 8240-24i"}, + {0x9005, 0x028f, 0x1dfc, 0x3161, PQI_HWIF_SRCV, "NTCOM SAS3 RAID-24i"}, + {0x9005, 0x028f, 0x1F0C, 0x3161, PQI_HWIF_SRCV, "NT RAID 3100-24i"}, + + /* Huawei ID's */ + {0x9005, 0x028f, 0x19e5, 0xd227, PQI_HWIF_SRCV, "SR465C-M 4G"}, + {0x9005, 0x028f, 0x19e5, 0xd22a, PQI_HWIF_SRCV, "SR765-M"}, + {0x9005, 0x028f, 0x19e5, 0xd228, PQI_HWIF_SRCV, "SR455C-M 2G"}, + {0x9005, 0x028f, 0x19e5, 0xd22c, PQI_HWIF_SRCV, "SR455C-M 4G"}, + {0x9005, 0x028f, 0x19e5, 0xd229, PQI_HWIF_SRCV, "SR155-M"}, + {0x9005, 0x028f, 0x19e5, 0xd22b, PQI_HWIF_SRCV, "SR455C-ME 4G"}, + + /* (MSCC PM8252 8x12G based) */ + {0x9005, 0x028f, 0x193d, 0x110b, PQI_HWIF_SRCV, "UN HBA H4508-Mf-8i"}, + {0x9005, 0x028f, 0x1bd4, 0x0052, PQI_HWIF_SRCV, "MT0801M6E"}, + {0x9005, 0x028f, 0x1bd4, 0x0054, PQI_HWIF_SRCV, "MT0800M6H"}, + {0x9005, 0x028f, 0x1bd4, 0x0086, PQI_HWIF_SRCV, "RT0800M7E"}, + {0x9005, 0x028f, 0x1bd4, 0x0087, PQI_HWIF_SRCV, "RT0800M7H"}, + {0x9005, 0x028f, 0x1ff9, 0x0052, PQI_HWIF_SRCV, "MT0801M6E"}, + {0x9005, 0x028f, 0x1ff9, 0x0054, PQI_HWIF_SRCV, "MT0800M6H"}, + {0x9005, 0x028f, 0x1BD4, 0x00a3, PQI_HWIF_SRCV, "RT0800M6E2i"}, + {0x9005, 0x028f, 0x1ff9, 0x00a3, PQI_HWIF_SRCV, "RT0800M6E2i"}, + {0x9005, 0x028f, 0x1ff9, 0x0086, PQI_HWIF_SRCV, "RT0800M7E"}, + {0x9005, 0x028f, 0x1ff9, 0x0087, PQI_HWIF_SRCV, "RT0800M7H"}, + {0x9005, 0x028f, 0x1f51, 0x1001, PQI_HWIF_SRCV, "SmartHBA P6600-8i"}, + {0x9005, 0x028f, 0x1f51, 0x1003, PQI_HWIF_SRCV, "SmartHBA P6600-8e"}, + {0x9005, 0x028f, 0x9005, 0x1460, PQI_HWIF_SRCV, "HBA 1200"}, + {0x9005, 0x028f, 0x9005, 0x1461, PQI_HWIF_SRCV, "SmartHBA 2200"}, + {0x9005, 0x028f, 0x9005, 0x1462, PQI_HWIF_SRCV, "HBA 1200-8i"}, + {0x9005, 0x028f, 0x1d49, 0x0222, PQI_HWIF_SRCV, "4450-8i HBA"}, + {0x9005, 0x028f, 0x207d, 0x4044, PQI_HWIF_SRCV, "HRDT TrustHBA H4100-8i"}, + {0x9005, 0x028f, 0x207d, 0x4054, PQI_HWIF_SRCV, "HRDT TrustHBA H4100-8e"}, + + /* (MSCC PM8254 32x12G based) */ + {0x9005, 0x028f, 0x1bd4, 0x0051, PQI_HWIF_SRCV, "MT0804M6R"}, + {0x9005, 0x028f, 0x1bd4, 0x0053, PQI_HWIF_SRCV, "MT0808M6R"}, + {0x9005, 0x028f, 0x1bd4, 0x0088, PQI_HWIF_SRCV, "RT0804M7R"}, + {0x9005, 0x028f, 0x1bd4, 0x0089, PQI_HWIF_SRCV, "RT0808M7R"}, + {0x9005, 0x028f, 0x1ff9, 0x0051, PQI_HWIF_SRCV, "MT0804M6R"}, + {0x9005, 0x028f, 0x1ff9, 0x0053, PQI_HWIF_SRCV, "MT0808M6R"}, + {0x9005, 0x028f, 0x1ff9, 0x0088, PQI_HWIF_SRCV, "RT0804M7R"}, + {0x9005, 0x028f, 0x1ff9, 0x0089, PQI_HWIF_SRCV, "RT0808M7R"}, + {0x9005, 0x028f, 0x1f51, 0x1002, PQI_HWIF_SRCV, "SmartRAID P7604-8i"}, + {0x9005, 0x028f, 0x1f51, 0x1004, PQI_HWIF_SRCV, "SmartRAID P7604-8e"}, + {0x9005, 0x028f, 0x1f51, 0x100f, PQI_HWIF_SRCV, "SmartRAID P7604N-8i"}, + {0x9005, 0x028f, 0x9005, 0x14a0, PQI_HWIF_SRCV, "SmartRAID 3254-8i"}, + {0x9005, 0x028f, 0x9005, 0x14a1, PQI_HWIF_SRCV, "SmartRAID 3204-8i"}, + {0x9005, 0x028f, 0x9005, 0x14a2, PQI_HWIF_SRCV, "SmartRAID 3252-8i"}, + {0x9005, 0x028f, 0x9005, 0x14a4, PQI_HWIF_SRCV, "SmartRAID 3254-8i /e"}, + {0x9005, 0x028f, 0x9005, 0x14a5, PQI_HWIF_SRCV, "SmartRAID 3252-8i /e"}, + {0x9005, 0x028f, 0x9005, 0x14a6, PQI_HWIF_SRCV, "SmartRAID 3204-8i /e"}, + {0x9005, 0x028f, 0x1d49, 0x0624, PQI_HWIF_SRCV, "9450-8i 4GB Flash"}, + + /* (MSCC PM8262 16x12G based) */ + {0x9005, 0x028f, 0x9005, 0x14c0, PQI_HWIF_SRCV, "SmartHBA 2200-16i"}, + {0x9005, 0x028f, 0x9005, 0x14c1, PQI_HWIF_SRCV, "HBA 1200-16i"}, + {0x9005, 0x028f, 0x9005, 0x14c3, PQI_HWIF_SRCV, "HBA 1200-16e"}, + {0x9005, 0x028f, 0x9005, 0x14c4, PQI_HWIF_SRCV, "HBA 1200-8e"}, + {0x9005, 0x028f, 0x1f51, 0x1005, PQI_HWIF_SRCV, "SmartHBA P6600-16i"}, + {0x9005, 0x028f, 0x1f51, 0x1007, PQI_HWIF_SRCV, "SmartHBA P6600-8i8e"}, + {0x9005, 0x028f, 0x1f51, 0x1009, PQI_HWIF_SRCV, "SmartHBA P6600-16e"}, + {0x9005, 0x028f, 0x1cf2, 0x54dc, PQI_HWIF_SRCV, "ZTE SmartIOC2200 RM346-16i"}, + {0x9005, 0x028f, 0x1cf2, 0x0806, PQI_HWIF_SRCV, "ZTE SmartIOC2200 RS346-16i"}, + {0x9005, 0x028f, 0x1d49, 0x0223, PQI_HWIF_SRCV, "4450-16i HBA"}, + {0x9005, 0x028f, 0x1d49, 0x0224, PQI_HWIF_SRCV, "4450-8e HBA"}, + {0x9005, 0x028f, 0x1d49, 0x0225, PQI_HWIF_SRCV, "4450-16e HBA"}, + {0x9005, 0x028f, 0x1d49, 0x0521, PQI_HWIF_SRCV, "5450-16i"}, + {0x9005, 0x028f, 0x207d, 0x4084, PQI_HWIF_SRCV, "HRDT TrustHBA H4100-16i"}, + {0x9005, 0x028f, 0x207d, 0x4094, PQI_HWIF_SRCV, "HRDT TrustHBA H4100-16e"}, + + /* (MSCC PM8264 16x12G based) */ + {0x9005, 0x028f, 0x9005, 0x14b0, PQI_HWIF_SRCV, "SmartRAID 3254-16i"}, + {0x9005, 0x028f, 0x9005, 0x14b1, PQI_HWIF_SRCV, "SmartRAID 3258-16i"}, + {0x9005, 0x028f, 0x1f51, 0x1006, PQI_HWIF_SRCV, "SmartRAID P7608-16i"}, + {0x9005, 0x028f, 0x1f51, 0x1008, PQI_HWIF_SRCV, "SmartRAID P7608-8i8e"}, + {0x9005, 0x028f, 0x1f51, 0x100a, PQI_HWIF_SRCV, "SmartRAID P7608-16e"}, + {0x9005, 0x028f, 0x1cf2, 0x54da, PQI_HWIF_SRCV, "ZTE SmartROC3200 RM344-16i 4G"}, + {0x9005, 0x028f, 0x1cf2, 0x54db, PQI_HWIF_SRCV, "ZTE SmartROC3200 RM345-16i 8G"}, + {0x9005, 0x028f, 0x1cf2, 0x0804, PQI_HWIF_SRCV, "ZTE SmartROC3200 RS344-16i 4G"}, + {0x9005, 0x028f, 0x1cf2, 0x0805, PQI_HWIF_SRCV, "ZTE SmartROC3200 RS345-16i 8G"}, + {0x9005, 0x028f, 0x1f51, 0x100e, PQI_HWIF_SRCV, "SmartRAID P7604N-16i"}, + {0x9005, 0x028f, 0x1d49, 0x0625, PQI_HWIF_SRCV, "9450-16i 4GB Flash"}, + {0x9005, 0x028f, 0x1d49, 0x0626, PQI_HWIF_SRCV, "9450-16i 8GB Flash"}, + + /* (MSCC PM8265 16x12G based) */ + {0x9005, 0x028f, 0x1590, 0x02dc, PQI_HWIF_SRCV, "SR416i-a Gen10+"}, + {0x9005, 0x028f, 0x9005, 0x1470, PQI_HWIF_SRCV, "SmartRAID 3200"}, + {0x9005, 0x028f, 0x9005, 0x1471, PQI_HWIF_SRCV, "SmartRAID 3254-16i /e"}, + {0x9005, 0x028f, 0x9005, 0x1472, PQI_HWIF_SRCV, "SmartRAID 3258-16i /e"}, + {0x9005, 0x028f, 0x9005, 0x1473, PQI_HWIF_SRCV, "SmartRAID 3284-16io /e/uC"}, + {0x9005, 0x028f, 0x9005, 0x1474, PQI_HWIF_SRCV, "SmartRAID 3254-16io /e"}, + {0x9005, 0x028f, 0x9005, 0x1475, PQI_HWIF_SRCV, "SmartRAID 3254-16e /e"}, + + /* (MSCC PM8266 16x12G based) */ + {0x9005, 0x028f, 0x1014, 0x0718, PQI_HWIF_SRCV, "IBM 4-Port 24G SAS"}, + {0x9005, 0x028f, 0x9005, 0x1490, PQI_HWIF_SRCV, "HBA 1200p Ultra"}, + {0x9005, 0x028f, 0x9005, 0x1491, PQI_HWIF_SRCV, "SmartHBA 2200p Ultra"}, + {0x9005, 0x028f, 0x9005, 0x1402, PQI_HWIF_SRCV, "HBA Ultra 1200P-16i"}, + {0x9005, 0x028f, 0x9005, 0x1441, PQI_HWIF_SRCV, "HBA Ultra 1200P-32i"}, + {0x9005, 0x028f, 0x1137, 0x0300, PQI_HWIF_SRCV, "Cisco 24G TriMode M1 HBA LFF 32D UCSC-HBAMP1LL32"}, + + /* (MSCC PM8268 16x12G based) */ + {0x9005, 0x028f, 0x9005, 0x14d0, PQI_HWIF_SRCV, "SmartRAID Ultra 3258P-16i"}, + + /* (MSCC PM8269 16x12G based) */ + {0x9005, 0x028f, 0x9005, 0x1400, PQI_HWIF_SRCV, "SmartRAID Ultra 3258P-16i /e"}, + {0x9005, 0x028f, 0x1ff9, 0x00a1, PQI_HWIF_SRCV, "RT1608M6R16i"}, + + /* (MSCC PM8270 16x12G based) */ + {0x9005, 0x028f, 0x9005, 0x1410, PQI_HWIF_SRCV, "HBA Ultra 1200P-16e"}, + {0x9005, 0x028f, 0x9005, 0x1411, PQI_HWIF_SRCV, "HBA 1200 Ultra"}, + {0x9005, 0x028f, 0x9005, 0x1412, PQI_HWIF_SRCV, "SmartHBA 2200 Ultra"}, + {0x9005, 0x028f, 0x9005, 0x1463, PQI_HWIF_SRCV, "SmartHBA 2200-8io /e"}, + {0x9005, 0x028f, 0x9005, 0x14c2, PQI_HWIF_SRCV, "SmartHBA 2200-16io /e"}, + {0x9005, 0x028f, 0x1337, 0x02fa, PQI_HWIF_SRCV, "Cisco 24G TriMode M1 HBA 16D UCSC-HBA-M1L16"}, + + /* (MSCC PM8271 16x12G based) */ + {0x9005, 0x028f, 0x9005, 0x14e0, PQI_HWIF_SRCV, "SmartIOC PM8271"}, + + /* (MSCC PM8272 16x12G based) */ + {0x9005, 0x028f, 0x9005, 0x1420, PQI_HWIF_SRCV, "SmartRAID Ultra 3254-16e"}, + {0x9005, 0x028f, 0x1d49, 0x0628, PQI_HWIF_SRCV, "9450-16e 4GB Flash"}, + + /* (MSCC PM8273 16x12G based) */ + {0x9005, 0x028f, 0x9005, 0x1430, PQI_HWIF_SRCV, "SmartRAID Ultra 3254-16e /e"}, + {0x9005, 0x028f, 0x1137, 0x02f9, PQI_HWIF_SRCV, "Cisco 24G TriMode M1 RAID 4GB FBWC 16D UCSC-RAID-M1L16"}, + {0x9005, 0x028f, 0x1137, 0x02ff, PQI_HWIF_SRCV, "Cisco 24G TriMode M1 RAID 4GB FBWC 6D UCSX-RAID-M1L6"}, + + /* (MSCC PM8274 16x12G based) */ + {0x9005, 0x028f, 0x1e93, 0x1000, PQI_HWIF_SRCV, "ByteHBA JGH43024-8"}, + {0x9005, 0x028f, 0x1e93, 0x1001, PQI_HWIF_SRCV, "ByteHBA JGH43034-8"}, + {0x9005, 0x028f, 0x1e93, 0x1005, PQI_HWIF_SRCV, "ByteHBA JGH43014-8"}, + {0x9005, 0x028f, 0x1f51, 0x100B, PQI_HWIF_SRCV, "SmartHBA P6600-24i"}, + + /* (MSCC PM8275 16x12G based) */ + {0x9005, 0x028f, 0x9005, 0x14f0, PQI_HWIF_SRCV, "SmartIOC PM8275"}, + + /* (MSCC PM8276 16x12G based) */ + {0x9005, 0x028f, 0x9005, 0x1480, PQI_HWIF_SRCV, "SmartRAID 3200 Ultra"}, + {0x9005, 0x028f, 0x1e93, 0x1002, PQI_HWIF_SRCV, "ByteHBA JGH44014-8"}, + + /* (MSCC PM8277 16x12G based) */ + {0x9005, 0x028f, 0x1137, 0x02f8, PQI_HWIF_SRCV, "Cisco 24G TriMode M1 RAID 4GB FBWC 32D UCSC-RAID-MP1L32"}, + + /* (MSCC PM8278 16x12G based) */ + {0x9005, 0x028f, 0x9005, 0x1440, PQI_HWIF_SRCV, "SmartRAID Ultra 3258P-32i"}, + {0x9005, 0x028f, 0x1d49, 0x0627, PQI_HWIF_SRCV, "9450-32i 8GB Flash"}, + + /* (MSCC PM8279 32x12G based) */ + {0x9005, 0x028f, 0x9005, 0x1450, PQI_HWIF_SRCV, "SmartRAID Ultra 3258P-32i /e"}, + {0x9005, 0x028f, 0x1590, 0x0294, PQI_HWIF_SRCV, "SR932i-p Gen10+"}, + {0x9005, 0x028f, 0x1590, 0x0381, PQI_HWIF_SRCV, "SR932i-p Gen11"}, + {0x9005, 0x028f, 0x1590, 0x0382, PQI_HWIF_SRCV, "SR308i-p Gen11"}, + {0x9005, 0x028f, 0x1590, 0x0383, PQI_HWIF_SRCV, "SR308i-o Gen11"}, + {0x9005, 0x028f, 0x1590, 0x02db, PQI_HWIF_SRCV, "SR416ie-m Gen11"}, + {0x9005, 0x028f, 0x1590, 0x032e, PQI_HWIF_SRCV, "SR416i-o Gen11"}, + {0x9005, 0x028f, 0x9005, 0x1452, PQI_HWIF_SRCV, "SmartRAID 3200p Ultra"}, + {0x9005, 0x028f, 0x1137, 0x02fe, PQI_HWIF_SRCV, "Cisco 24G TriMode M1 RAID LFF 32D UCSC-RAIDMP1LL32"}, + + /* (MSCC HBA/SMARTHBA/CFF SmartRAID - Lenovo 8X12G 16X12G based) */ + {0x9005, 0x028f, 0x1d49, 0x0220, PQI_HWIF_SRCV, "4350-8i SAS/SATA HBA"}, + {0x9005, 0x028f, 0x1d49, 0x0221, PQI_HWIF_SRCV, "4350-16i SAS/SATA HBA"}, + {0x9005, 0x028f, 0x1d49, 0x0520, PQI_HWIF_SRCV, "5350-8i"}, + {0x9005, 0x028f, 0x1d49, 0x0522, PQI_HWIF_SRCV, "5350-8i INTR"}, + {0x9005, 0x028f, 0x1d49, 0x0620, PQI_HWIF_SRCV, "9350-8i 2GB Flash"}, + {0x9005, 0x028f, 0x1d49, 0x0621, PQI_HWIF_SRCV, "9350-8i 2GB Flash INTR"}, + {0x9005, 0x028f, 0x1d49, 0x0622, PQI_HWIF_SRCV, "9350-16i 4GB Flash"}, + {0x9005, 0x028f, 0x1d49, 0x0623, PQI_HWIF_SRCV, "9350-16i 4GB Flash INTR"}, + + {0, 0, 0, 0, 0, 0} +}; + +struct pqi_ident +pqi_family_identifiers[] = { + {0x9005, 0x028f, 0, 0, PQI_HWIF_SRCV, "Smart Array Storage Controller"}, + {0, 0, 0, 0, 0, 0} +}; diff --git a/sys/dev/smartpqi/smartpqi_defines.h b/sys/dev/smartpqi/smartpqi_defines.h index bb0bb2b709aa..fe2edf7a74a9 100644 --- a/sys/dev/smartpqi/smartpqi_defines.h +++ b/sys/dev/smartpqi/smartpqi_defines.h @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -927,7 +927,7 @@ typedef struct pqi_pci_info typedef struct _driver_info { unsigned char major_version; - unsigned long minor_version; + unsigned char minor_version; unsigned char release_version; unsigned long build_revision; unsigned long max_targets; @@ -938,9 +938,13 @@ typedef struct _driver_info typedef uint8_t *passthru_buf_type_t; #define PQISRC_DRIVER_MAJOR __FreeBSD__ -#define PQISRC_DRIVER_MINOR 4410 +#if __FreeBSD__ <= 14 +#define PQISRC_DRIVER_MINOR 4660 +#else +#define PQISRC_DRIVER_MINOR 0 +#endif #define PQISRC_DRIVER_RELEASE 0 -#define PQISRC_DRIVER_REVISION 2005 +#define PQISRC_DRIVER_REVISION 2002 #define STR(s) # s #define PQISRC_VERSION(a, b, c, d) STR(a.b.c-d) @@ -1234,19 +1238,21 @@ typedef struct sema OS_SEMA_LOCK_T; /* Debug facility */ -#define PQISRC_FLAGS_MASK 0x0000ffff -#define PQISRC_FLAGS_INIT 0x00000001 -#define PQISRC_FLAGS_INFO 0x00000002 -#define PQISRC_FLAGS_FUNC 0x00000004 -#define PQISRC_FLAGS_TRACEIO 0x00000008 -#define PQISRC_FLAGS_DISC 0x00000010 -#define PQISRC_FLAGS_WARN 0x00000020 -#define PQISRC_FLAGS_ERROR 0x00000040 -#define PQISRC_FLAGS_NOTE 0x00000080 +#define PQISRC_FLAGS_MASK 0x0000000000ff +#define PQISRC_FLAGS_INIT 0x0001 +#define PQISRC_FLAGS_INFO 0x0002 +#define PQISRC_FLAGS_FUNC 0x0004 +#define PQISRC_FLAGS_TRACEIO 0x0008 +#define PQISRC_FLAGS_DISC 0x0010 +#define PQISRC_FLAGS_WARN 0x0020 +#define PQISRC_FLAGS_ERROR 0x0040 +#define PQISRC_FLAGS_NOTE 0x0080 -#define PQISRC_LOG_LEVEL (PQISRC_FLAGS_WARN | PQISRC_FLAGS_ERROR | PQISRC_FLAGS_NOTE) +#define PQISRC_LOG_LEVEL (PQISRC_FLAGS_WARN | PQISRC_FLAGS_ERROR) -static int logging_level = PQISRC_LOG_LEVEL; +extern unsigned long logging_level; + +#define DBG_SET_LOGGING_LEVEL(value) logging_level = value & PQISRC_FLAGS_MASK #define DBG_INIT(fmt,args...) \ do { \ @@ -1276,13 +1282,6 @@ static int logging_level = PQISRC_LOG_LEVEL; } \ }while(0); -#define DBG_TRACEIO(fmt,args...) \ - do { \ - if (logging_level & PQISRC_FLAGS_TRACEIO) { \ - printf("[TRACEIO]:[ %s ] [ %d ]"fmt,__func__,__LINE__,##args); \ - } \ - }while(0); - #define DBG_WARN(fmt,args...) \ do { \ if (logging_level & PQISRC_FLAGS_WARN) { \ diff --git a/sys/dev/smartpqi/smartpqi_discovery.c b/sys/dev/smartpqi/smartpqi_discovery.c index ac37c2233762..a7de5a149810 100644 --- a/sys/dev/smartpqi/smartpqi_discovery.c +++ b/sys/dev/smartpqi/smartpqi_discovery.c @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -189,7 +189,7 @@ pqisrc_set_btl(pqi_scsi_dev_t *device, int bus, int target, int lun) * devices and multi-lun devices */ boolean_t pqisrc_add_softs_entry(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device, - uint8_t *scsi3addr) + uint8_t const *scsi3addr) { /* Add physical devices with targets that need * targets */ @@ -269,7 +269,7 @@ pqisrc_add_softs_entry(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device, } } DBG_ERR("The device is not a physical, lun or ptraid device" - "B %d: T %d: L %d\n", device->bus, device->target, + "B%d:T%d:L%d\n", device->bus, device->target, device->lun ); return false; @@ -283,7 +283,7 @@ add_device_to_dev_list: softs->dev_list[j] = device; break; } - DBG_NOTE("Added device [%d of %d]: B %d: T %d: L %d\n", + DBG_NOTE("Added device [%d of %d]: B%d:T%d:L%d\n", j, softs->num_devs, device->bus, device->target, device->lun); return true; @@ -307,7 +307,6 @@ pqisrc_find_btl_list_index(pqisrc_softstate_t *softs, if(bus == softs->bus_id && target == temp_device->target && lun == temp_device->lun){ - DBG_DISC("Returning device list index %d\n", index); return index; } @@ -322,7 +321,7 @@ pqisrc_find_btl_list_index(pqisrc_softstate_t *softs, /* Return a given index for a specific device within the * softs dev_list */ int -pqisrc_find_device_list_index(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device) +pqisrc_find_device_list_index(pqisrc_softstate_t *softs, pqi_scsi_dev_t const *device) { int index; @@ -346,7 +345,7 @@ pqisrc_find_device_list_index(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device) /* Delete a given device from the softs dev_list*/ int -pqisrc_delete_softs_entry(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device) +pqisrc_delete_softs_entry(pqisrc_softstate_t *softs, pqi_scsi_dev_t const *device) { int index; @@ -354,8 +353,8 @@ pqisrc_delete_softs_entry(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device) if (0 <= index && index < MAX_TARGET_BIT) { softs->dev_list[index] = NULL; softs->num_devs--; - DBG_NOTE("Removing device : B %d: T %d: L %d positioned at %d\n", - device->bus, device->target, device->lun, softs->num_devs); + DBG_NOTE("Removing device: B%d:T%d:L%d positioned at %d\n", + device->bus, device->target, device->lun, index); return PQI_STATUS_SUCCESS; } if (index == INVALID_ELEM) { @@ -414,7 +413,7 @@ pqisrc_build_send_raid_request(pqisrc_softstate_t *softs, struct dma_mem device_ int ret = PQI_STATUS_SUCCESS; ib_queue_t *ib_q = &softs->op_raid_ib_q[PQI_DEFAULT_IB_QUEUE]; - ob_queue_t *ob_q = &softs->op_ob_q[PQI_DEFAULT_IB_QUEUE]; + ob_queue_t const *ob_q = &softs->op_ob_q[PQI_DEFAULT_IB_QUEUE]; rcb_t *rcb = NULL; @@ -740,13 +739,13 @@ pqisrc_get_phys_log_device_list(pqisrc_softstate_t *softs, ret = pqisrc_get_physical_logical_luns(softs, SA_REPORT_PHYS, physical_dev_list, phys_data_length); if (ret) { - DBG_ERR("report physical LUNs failed"); + DBG_ERR("report physical LUNs failed\n"); return ret; } ret = pqisrc_get_physical_logical_luns(softs, SA_REPORT_LOG, logical_dev_list, log_data_length); if (ret) { - DBG_ERR("report logical LUNs failed"); + DBG_ERR("report logical LUNs failed\n"); return ret; } @@ -763,7 +762,7 @@ pqisrc_get_phys_log_device_list(pqisrc_softstate_t *softs, ret = pqisrc_get_queue_lun_list(softs, PQI_LOG_EXT_QUEUE_ENABLE, queue_dev_list, queue_data_length); if (ret) { - DBG_ERR("report logical LUNs failed"); + DBG_ERR("report logical LUNs failed\n"); return ret; } @@ -808,13 +807,13 @@ pqisrc_get_phys_log_device_list(pqisrc_softstate_t *softs, } inline boolean_t -pqisrc_is_external_raid_device(pqi_scsi_dev_t *device) +pqisrc_is_external_raid_device(pqi_scsi_dev_t const *device) { return device->is_external_raid_device; } static inline boolean_t -pqisrc_is_external_raid_addr(uint8_t *scsi3addr) +pqisrc_is_external_raid_addr(uint8_t const *scsi3addr) { return scsi3addr[2] != 0; } @@ -940,12 +939,12 @@ out: /* Validate the RAID map parameters */ static int pqisrc_raid_map_validation(pqisrc_softstate_t *softs, - pqi_scsi_dev_t *device, pqisrc_raid_map_t *raid_map) + pqi_scsi_dev_t const *device, pqisrc_raid_map_t *raid_map) { char *error_msg; uint32_t raidmap_size; uint32_t r5or6_blocks_per_row; -/* unsigned phys_dev_num; */ + /* unsigned phys_dev_num; */ DBG_FUNC("IN\n"); @@ -1033,7 +1032,7 @@ pqisrc_get_device_raidmap(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device) if (raidmap_reported_size <= raidmap_alloc_size) break; - DBG_NOTE("Raid map is larger than 1024 entries, request once again"); + DBG_NOTE("Raid map is larger than 1024 entries, request once again\n"); os_mem_free(softs, (char*)raid_map, raidmap_alloc_size); raidmap_alloc_size = raidmap_reported_size; @@ -1331,7 +1330,7 @@ pqisrc_get_physical_device_info(pqisrc_softstate_t *softs, /* Function used to find the entry of the device in a list */ static device_status_t pqisrc_scsi_find_entry(pqisrc_softstate_t *softs, - pqi_scsi_dev_t *device_to_find, pqi_scsi_dev_t **same_device) + pqi_scsi_dev_t const *device_to_find, pqi_scsi_dev_t **same_device) { pqi_scsi_dev_t *device; int i; @@ -1361,7 +1360,7 @@ pqisrc_scsi_find_entry(pqisrc_softstate_t *softs, /* Update the newly added devices as existed device */ static void -pqisrc_exist_device_update(pqisrc_softstate_t *softs, +pqisrc_exist_device_update(pqisrc_softstate_t const *softs, pqi_scsi_dev_t *device_exist, pqi_scsi_dev_t *new_device) { DBG_FUNC("IN\n"); @@ -1395,15 +1394,13 @@ pqisrc_exist_device_update(pqisrc_softstate_t *softs, device_exist->offload_config = new_device->offload_config; device_exist->offload_enabled_pending = new_device->offload_enabled_pending; - if (device_exist->offload_to_mirror) - os_mem_free(softs, - (int *) device_exist->offload_to_mirror, - sizeof(*(device_exist->offload_to_mirror))); + if (device_exist->offload_to_mirror) { + device_exist->temp_offload_to_mirror = device_exist->offload_to_mirror; + } device_exist->offload_to_mirror = new_device->offload_to_mirror; - if (device_exist->raid_map) - os_mem_free(softs, - (char *)device_exist->raid_map, - sizeof(*device_exist->raid_map)); + if (device_exist->raid_map) { + device_exist->temp_raid_map = device_exist->raid_map; + } device_exist->raid_map = new_device->raid_map; /* To prevent these from being freed later. */ new_device->raid_map = NULL; @@ -1416,7 +1413,7 @@ static int pqisrc_add_device(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device) { DBG_FUNC("IN\n"); - DBG_NOTE("vendor: %s model: %s bus:%d target:%d lun:%d is_physical_device:0x%x expose_device:0x%x volume_offline 0x%x volume_status 0x%x \n", + DBG_NOTE("vendor: %s model: %s B%d:T%d:L%d is_physical_device:0x%x expose_device:0x%x volume_offline 0x%x volume_status 0x%x \n", device->vendor, device->model, device->bus, device->target, device->lun, device->is_physical_device, device->expose_device, device->volume_offline, device->volume_status); device->invalid = false; @@ -1439,7 +1436,7 @@ void pqisrc_remove_device(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device) { DBG_FUNC("IN\n"); - DBG_NOTE("vendor: %s model: %s bus:%d target:%d lun:%d is_physical_device:0x%x expose_device:0x%x volume_offline 0x%x volume_status 0x%x \n", + DBG_NOTE("vendor: %s model: %s B%d:T%d:L%d is_physical_device:0x%x expose_device:0x%x volume_offline 0x%x volume_status 0x%x \n", device->vendor, device->model, device->bus, device->target, device->lun, device->is_physical_device, device->expose_device, device->volume_offline, device->volume_status); device->invalid = true; if (device->expose_device == false) { @@ -1460,63 +1457,9 @@ pqisrc_remove_device(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device) } -/* - * When exposing new device to OS fails then adjst list according to the - * mid scsi list - */ -static void -pqisrc_adjust_list(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device) -{ - int i; - unsigned char addr1[8], addr2[8]; - pqi_scsi_dev_t *temp_device; - DBG_FUNC("IN\n"); - - if (!device) { - DBG_ERR("softs = %p: device is NULL !!!\n", softs); - return; - } - - OS_ACQUIRE_SPINLOCK(&softs->devlist_lock); - uint8_t *scsi3addr; - /*For external raid device, there can be multiple luns - *with same target. So while freeing external raid device, - *free target only after removing all luns with same target.*/ - if (pqisrc_is_external_raid_device(device)) { - memcpy(addr1, device->scsi3addr, 8); - for(i = 0; i < PQI_MAX_DEVICES; i++) { - if(softs->dev_list[i] == NULL) - continue; - temp_device = softs->dev_list[i]; - memcpy(addr2, temp_device->scsi3addr, 8); - if(memcmp(addr1, addr2, 8) == 0) { - continue; - } - if (addr1[2] == addr2[2]) { - break; - } - } - if(i == PQI_MAX_DEVICES) { - pqisrc_remove_target_bit(softs, device->target); - } - } - - if(pqisrc_delete_softs_entry(softs, device) == PQI_STATUS_SUCCESS){ - scsi3addr = device->scsi3addr; - if (!pqisrc_is_logical_device(device) && !MASKED_DEVICE(scsi3addr)){ - DBG_NOTE("About to remove target bit %d \n", device->target); - pqisrc_remove_target_bit(softs, device->target); - } - } - OS_RELEASE_SPINLOCK(&softs->devlist_lock); - pqisrc_device_mem_free(softs, device); - - DBG_FUNC("OUT\n"); -} - /* Debug routine used to display the RAID volume status of the device */ static void -pqisrc_display_volume_status(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device) +pqisrc_display_volume_status(pqisrc_softstate_t *softs, pqi_scsi_dev_t const *device) { char *status; @@ -1590,7 +1533,7 @@ pqisrc_display_volume_status(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device) break; } - DBG_NOTE("scsi BTL %d:%d:%d %s\n", + DBG_NOTE("scsi B%d:T%d:L%d %s\n", device->bus, device->target, device->lun, status); DBG_FUNC("OUT\n"); } @@ -1635,7 +1578,7 @@ pqisrc_free_device(pqisrc_softstate_t * softs, pqi_scsi_dev_t *device) /* Find the entry in device list for the freed device softs->dev_list[i]& *make it NULL before freeing the device memory */ - index = pqisrc_find_device_list_index(softs, device); + index = pqisrc_find_btl_list_index(softs, device->bus, device->target, device->lun); OS_ACQUIRE_SPINLOCK(&softs->devlist_lock); scsi3addr = device->scsi3addr; @@ -1669,13 +1612,14 @@ pqisrc_free_device(pqisrc_softstate_t * softs, pqi_scsi_dev_t *device) softs->dev_list[index] = NULL; if (device->expose_device == true){ pqisrc_delete_softs_entry(softs, device); - DBG_NOTE("Removed memory for device : B %d: T %d: L %d\n", + DBG_NOTE("Removed memory for device: B%d:T%d:L%d\n", device->bus, device->target, device->lun); OS_RELEASE_SPINLOCK(&softs->devlist_lock); pqisrc_device_mem_free(softs, device); } else { OS_RELEASE_SPINLOCK(&softs->devlist_lock); } + } @@ -1684,7 +1628,6 @@ static void pqisrc_update_device_list(pqisrc_softstate_t *softs, pqi_scsi_dev_t *new_device_list[], int num_new_devices) { - int ret; int i; device_status_t dev_status; pqi_scsi_dev_t *device; @@ -1755,8 +1698,7 @@ pqisrc_update_device_list(pqisrc_softstate_t *softs, if(device == NULL) continue; if (device->device_gone) { - if(device->in_remove == true) - { + if(device->in_remove == true) { continue; } device->in_remove = true; @@ -1794,7 +1736,7 @@ pqisrc_update_device_list(pqisrc_softstate_t *softs, continue; if (device->offload_enabled != device->offload_enabled_pending) { - DBG_NOTE("[%d:%d:%d]Changing AIO to %d (was %d)\n", + DBG_NOTE("[B%d:T%d:L%d]Changing AIO to %d (was %d)\n", device->bus, device->target, device->lun, device->offload_enabled_pending, device->offload_enabled); @@ -1831,24 +1773,14 @@ pqisrc_update_device_list(pqisrc_softstate_t *softs, device->firmware_queue_depth_set == false) device->queue_depth = PQI_LOGICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH; - if (device->scsi_rescan) { - os_rescan_target(softs, device); - } } - softs->ld_rescan = false; OS_RELEASE_SPINLOCK(&softs->devlist_lock); for(i = 0; i < nadded; i++) { device = added[i]; if (device->expose_device) { - ret = pqisrc_add_device(softs, device); - if (ret) { - DBG_WARN("scsi %d:%d:%d addition failed, device not added\n", - device->bus, device->target, device->lun); - pqisrc_adjust_list(softs, device); - continue; - } + pqisrc_add_device(softs, device); } pqisrc_display_device_info(softs, "added", device); @@ -1874,7 +1806,22 @@ pqisrc_update_device_list(pqisrc_softstate_t *softs, DBG_DISC("Current device %d : B%d:T%d:L%d\n", i, device->bus, device->target, device->lun); + if (device->scsi_rescan) { + os_rescan_target(softs, device); + } + if (device->temp_offload_to_mirror) { + os_mem_free(softs, + (int *) device->temp_offload_to_mirror, + sizeof(*(device->temp_offload_to_mirror))); + } + if (device->temp_raid_map) { + os_mem_free(softs, + (int *) device->temp_raid_map, + sizeof(*(device->temp_raid_map))); + } + } + softs->ld_rescan = false; free_and_out: if (added) @@ -1928,6 +1875,8 @@ pqisrc_write_driver_version_to_host_wellness(pqisrc_softstate_t *softs) } host_wellness_driver_ver->driver_version[sizeof(host_wellness_driver_ver->driver_version) - 1] = '\0'; + host_wellness_driver_ver->dont_write_tag[0] = 'D'; + host_wellness_driver_ver->dont_write_tag[1] = 'W'; host_wellness_driver_ver->end_tag[0] = 'Z'; host_wellness_driver_ver->end_tag[1] = 'Z'; @@ -1941,7 +1890,7 @@ pqisrc_write_driver_version_to_host_wellness(pqisrc_softstate_t *softs) os_mem_free(softs, (char *)host_wellness_driver_ver, data_length); - DBG_FUNC("OUT"); + DBG_FUNC("OUT\n"); return rval; } @@ -1974,8 +1923,8 @@ pqisrc_write_current_time_to_host_wellness(pqisrc_softstate_t *softs) host_wellness_time->start_tag[3] = '>'; host_wellness_time->time_tag[0] = 'T'; host_wellness_time->time_tag[1] = 'D'; - host_wellness_time->time_length = LE_16(offsetof(struct bmic_host_wellness_time, time_length) - - offsetof(struct bmic_host_wellness_time, century)); + host_wellness_time->time_length = LE_16(offsetof(struct bmic_host_wellness_time, dont_write_tag) - + offsetof(struct bmic_host_wellness_time, hour)); os_get_time(host_wellness_time); @@ -1994,12 +1943,12 @@ pqisrc_write_current_time_to_host_wellness(pqisrc_softstate_t *softs) os_mem_free(softs, (char *)host_wellness_time, data_length); - DBG_FUNC("OUT"); + DBG_FUNC("OUT\n"); return rval; } static void pqisrc_get_device_vpd_info(pqisrc_softstate_t *softs, - bmic_ident_physdev_t *bmic_phy_info,pqi_scsi_dev_t *device) + bmic_ident_physdev_t const *bmic_phy_info,pqi_scsi_dev_t *device) { DBG_FUNC("IN\n"); memcpy(&device->wwid, &bmic_phy_info->padding[79], sizeof(device->wwid)); @@ -2102,7 +2051,7 @@ pqisrc_scan_devices(pqisrc_softstate_t *softs) scsi3addr = lun_ext_entry->lunid; - /* Save the target sas adderess for external raid device */ + /* Save the target sas address for external raid device */ if(lun_ext_entry->device_type == CONTROLLER_DEVICE) { #ifdef PQI_NEED_RESCAN_TIMER_FOR_RBOD_HOTPLUG num_ext_raid_devices++; diff --git a/sys/dev/smartpqi/smartpqi_event.c b/sys/dev/smartpqi/smartpqi_event.c index 88dcf45dd08a..761bb5588ff9 100644 --- a/sys/dev/smartpqi/smartpqi_event.c +++ b/sys/dev/smartpqi/smartpqi_event.c @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -59,7 +59,7 @@ pqisrc_wait_for_rescan_complete(pqisrc_softstate_t *softs) */ static void pqisrc_acknowledge_event(pqisrc_softstate_t *softs, - struct pqi_event *event) + struct pqi_event const *event) { int ret; @@ -225,7 +225,7 @@ pqisrc_process_event_intr_src(pqisrc_softstate_t *softs,int obq_id) os_eventtaskqueue_enqueue(softs); } - DBG_FUNC("OUT"); + DBG_FUNC("OUT\n"); return PQI_STATUS_SUCCESS; @@ -241,7 +241,7 @@ pqisrc_build_send_vendor_request(pqisrc_softstate_t *softs, { int ret = PQI_STATUS_SUCCESS; ib_queue_t *op_ib_q = &softs->op_raid_ib_q[PQI_DEFAULT_IB_QUEUE]; - ob_queue_t *ob_q = &softs->op_ob_q[PQI_DEFAULT_IB_QUEUE]; + ob_queue_t const *ob_q = &softs->op_ob_q[PQI_DEFAULT_IB_QUEUE]; rcb_t *rcb = NULL; @@ -341,7 +341,7 @@ err_out: static int pqi_event_configure(pqisrc_softstate_t *softs , pqi_event_config_request_t *request, - dma_mem_t *buff) + dma_mem_t const *buff) { int ret = PQI_STATUS_SUCCESS; diff --git a/sys/dev/smartpqi/smartpqi_helper.c b/sys/dev/smartpqi/smartpqi_helper.c index 741ac0a05a06..0a4bf6ec21cb 100644 --- a/sys/dev/smartpqi/smartpqi_helper.c +++ b/sys/dev/smartpqi/smartpqi_helper.c @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -30,7 +30,7 @@ * Function used to validate the adapter health. */ boolean_t -pqisrc_ctrl_offline(pqisrc_softstate_t *softs) +pqisrc_ctrl_offline(pqisrc_softstate_t const *softs) { DBG_FUNC("IN\n"); @@ -83,12 +83,10 @@ pqisrc_take_ctrl_offline(pqisrc_softstate_t *softs) { DBG_FUNC("IN\n"); - int lockupcode = 0; - softs->ctrl_online = false; if (SIS_IS_KERNEL_PANIC(softs)) { - lockupcode = PCI_MEM_GET32(softs, &softs->ioa_reg->mb[7], LEGACY_SIS_SRCV_OFFSET_MAILBOX_7); + int lockupcode = PCI_MEM_GET32(softs, &softs->ioa_reg->mb[7], LEGACY_SIS_SRCV_OFFSET_MAILBOX_7); DBG_ERR("Controller FW is not running, Lockup code = %x\n", lockupcode); } else { @@ -172,7 +170,7 @@ pqisrc_wait_on_condition(pqisrc_softstate_t *softs, rcb_t *rcb, } if (pqisrc_ctrl_offline(softs)) { - DBG_ERR("Controller is Offline"); + DBG_ERR("Controller is Offline\n"); ret = PQI_STATUS_FAILURE; break; } @@ -187,29 +185,29 @@ pqisrc_wait_on_condition(pqisrc_softstate_t *softs, rcb_t *rcb, /* Function used to validate the device wwid. */ boolean_t -pqisrc_device_equal(pqi_scsi_dev_t *dev1, - pqi_scsi_dev_t *dev2) +pqisrc_device_equal(pqi_scsi_dev_t const *dev1, + pqi_scsi_dev_t const *dev2) { return dev1->wwid == dev2->wwid; } /* Function used to validate the device scsi3addr. */ boolean_t -pqisrc_scsi3addr_equal(uint8_t *scsi3addr1, uint8_t *scsi3addr2) +pqisrc_scsi3addr_equal(uint8_t const *scsi3addr1, uint8_t const *scsi3addr2) { return memcmp(scsi3addr1, scsi3addr2, 8) == 0; } /* Function used to validate hba_lunid */ boolean_t -pqisrc_is_hba_lunid(uint8_t *scsi3addr) +pqisrc_is_hba_lunid(uint8_t const *scsi3addr) { return pqisrc_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID); } /* Function used to validate type of device */ boolean_t -pqisrc_is_logical_device(pqi_scsi_dev_t *device) +pqisrc_is_logical_device(pqi_scsi_dev_t const *device) { return !device->is_physical_device; } @@ -256,10 +254,10 @@ pqisrc_raidlevel_to_string(uint8_t raid_level) /* Debug routine for displaying device info */ void pqisrc_display_device_info(pqisrc_softstate_t *softs, - char *action, pqi_scsi_dev_t *device) + char const *action, pqi_scsi_dev_t *device) { if (device->is_physical_device) { - DBG_NOTE("%s scsi BTL %d:%d:%d: %.8s %.16s %-12s " + DBG_NOTE("%s scsi B%d:T%d:L%d %.8s %.16s %-12s " "SSDSmartPathCap%c En%c Exp%c qd=%d\n", action, device->bus, @@ -273,7 +271,7 @@ void pqisrc_display_device_info(pqisrc_softstate_t *softs, device->expose_device ? '+' : '-', device->queue_depth); } else if (device->devtype == RAID_DEVICE) { - DBG_NOTE("%s scsi BTL %d:%d:%d: %.8s %.16s %-12s " + DBG_NOTE("%s scsi B%d:T%d:L%d %.8s %.16s %-12s " "SSDSmartPathCap%c En%c Exp%c qd=%d\n", action, device->bus, @@ -287,7 +285,7 @@ void pqisrc_display_device_info(pqisrc_softstate_t *softs, device->expose_device ? '+' : '-', device->queue_depth); } else if (device->devtype == CONTROLLER_DEVICE) { - DBG_NOTE("%s scsi BTL %d:%d:%d: %.8s %.16s %-12s " + DBG_NOTE("%s scsi B%d:T%d:L%d %.8s %.16s %-12s " "SSDSmartPathCap%c En%c Exp%c qd=%d\n", action, device->bus, @@ -301,7 +299,7 @@ void pqisrc_display_device_info(pqisrc_softstate_t *softs, device->expose_device ? '+' : '-', device->queue_depth); } else { - DBG_NOTE("%s scsi BTL %d:%d:%d: %.8s %.16s %-12s " + DBG_NOTE("%s scsi B%d:T%d:L%d %.8s %.16s %-12s " "SSDSmartPathCap%c En%c Exp%c qd=%d devtype=%d\n", action, device->bus, @@ -335,7 +333,7 @@ check_struct_sizes(void) 64 bit and 32 bit system*/ ASSERT(sizeof(IOCTL_Command_struct)== 86 || sizeof(IOCTL_Command_struct)== 82); - ASSERT(sizeof(struct bmic_host_wellness_driver_version)== 42); + ASSERT(sizeof(struct bmic_host_wellness_driver_version)== 44); ASSERT(sizeof(struct bmic_host_wellness_time)== 20); ASSERT(sizeof(struct pqi_dev_adminq_cap)== 8); ASSERT(sizeof(struct admin_q_param)== 4); diff --git a/sys/dev/smartpqi/smartpqi_init.c b/sys/dev/smartpqi/smartpqi_init.c index 41c990a15909..fde17a542421 100644 --- a/sys/dev/smartpqi/smartpqi_init.c +++ b/sys/dev/smartpqi/smartpqi_init.c @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -234,7 +234,7 @@ pqisrc_decide_opq_config(pqisrc_softstate_t *softs) DBG_FUNC("IN\n"); - DBG_INIT("softs->intr_count : %d softs->num_cpus_online : %d", + DBG_INIT("softs->intr_count : %d softs->num_cpus_online : %d\n", softs->intr_count, softs->num_cpus_online); /* TODO : Get the number of IB and OB queues from OS layer */ @@ -437,7 +437,6 @@ int pqi_reset(pqisrc_softstate_t *softs) { int ret = PQI_STATUS_SUCCESS; - uint32_t val = 0; pqi_reset_reg_t pqi_reset_reg; DBG_FUNC("IN\n"); @@ -445,7 +444,7 @@ pqi_reset(pqisrc_softstate_t *softs) if (true == softs->ctrl_in_pqi_mode) { if (softs->pqi_reset_quiesce_allowed) { - val = PCI_MEM_GET32(softs, &softs->ioa_reg->host_to_ioa_db, + int val = PCI_MEM_GET32(softs, &softs->ioa_reg->host_to_ioa_db, LEGACY_SIS_IDBR); val |= SIS_PQI_RESET_QUIESCE; PCI_MEM_PUT32(softs, &softs->ioa_reg->host_to_ioa_db, @@ -629,7 +628,7 @@ pqisrc_wait_for_cmnd_complete(pqisrc_softstate_t *softs) int count = 0; int ret = PQI_STATUS_SUCCESS; - DBG_NOTE("softs->taglist.num_elem : %u",softs->taglist.num_elem); + DBG_NOTE("softs->taglist.num_elem : %u\n",softs->taglist.num_elem); if (softs->taglist.num_elem == softs->max_outstanding_io) return ret; @@ -650,7 +649,7 @@ pqisrc_wait_for_cmnd_complete(pqisrc_softstate_t *softs) OS_SLEEP(1000); count++; if(count % 1000 == 0) { - DBG_WARN("Waited for %d seconds", count/1000); + DBG_WARN("Waited for %d seconds\n", count/1000); } if (count >= PQI_QUIESCE_TIMEOUT) { return PQI_STATUS_FAILURE; @@ -849,7 +848,7 @@ pqisrc_init(pqisrc_softstate_t *softs) /* update driver version in to FW */ ret = pqisrc_write_driver_version_to_host_wellness(softs); if (ret) { - DBG_ERR(" Failed to update driver version in to FW"); + DBG_ERR(" Failed to update driver version in to FW\n"); goto err_host_wellness; } diff --git a/sys/dev/smartpqi/smartpqi_intr.c b/sys/dev/smartpqi/smartpqi_intr.c index a62bdc9e8389..1971ac03a556 100644 --- a/sys/dev/smartpqi/smartpqi_intr.c +++ b/sys/dev/smartpqi/smartpqi_intr.c @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -35,7 +35,6 @@ os_get_processor_config(pqisrc_softstate_t *softs) { DBG_FUNC("IN\n"); softs->num_cpus_online = mp_ncpus; - bsd_set_hint_adapter_cpu_config(softs); DBG_FUNC("OUT\n"); return PQI_STATUS_SUCCESS; diff --git a/sys/dev/smartpqi/smartpqi_ioctl.c b/sys/dev/smartpqi/smartpqi_ioctl.c index 2bdc5c09e916..0517c0513cce 100644 --- a/sys/dev/smartpqi/smartpqi_ioctl.c +++ b/sys/dev/smartpqi/smartpqi_ioctl.c @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -74,7 +74,7 @@ smartpqi_close(struct cdev *cdev, int flags, int devtype, * ioctl for getting driver info */ static void -smartpqi_get_driver_info_ioctl(caddr_t udata, struct cdev *cdev) +smartpqi_get_driver_info_ioctl(caddr_t udata, struct cdev const *cdev) { struct pqisrc_softstate *softs = cdev->si_drv1; pdriver_info driver_info = (pdriver_info)udata; @@ -82,7 +82,11 @@ smartpqi_get_driver_info_ioctl(caddr_t udata, struct cdev *cdev) DBG_FUNC("IN udata = %p cdev = %p\n", udata, cdev); driver_info->major_version = PQISRC_DRIVER_MAJOR; +#if __FreeBSD__ <= 14 + driver_info->minor_version = (unsigned char) ((PQISRC_DRIVER_MINOR >> 4) & 0xFF); +#else driver_info->minor_version = PQISRC_DRIVER_MINOR; +#endif driver_info->release_version = PQISRC_DRIVER_RELEASE; driver_info->build_revision = PQISRC_DRIVER_REVISION; driver_info->max_targets = PQI_MAX_DEVICES - 1; @@ -96,7 +100,7 @@ smartpqi_get_driver_info_ioctl(caddr_t udata, struct cdev *cdev) * ioctl for getting controller info */ static void -smartpqi_get_pci_info_ioctl(caddr_t udata, struct cdev *cdev) +smartpqi_get_pci_info_ioctl(caddr_t udata, struct cdev const *cdev) { struct pqisrc_softstate *softs = cdev->si_drv1; device_t dev = softs->os_specific.pqi_dev; @@ -242,7 +246,7 @@ pqisrc_passthru_ioctl(struct pqisrc_softstate *softs, void *arg, int mode) pqisrc_raid_req_t request; raid_path_error_info_elem_t error_info; ib_queue_t *ib_q = &softs->op_raid_ib_q[PQI_DEFAULT_IB_QUEUE]; - ob_queue_t *ob_q = &softs->op_ob_q[PQI_DEFAULT_IB_QUEUE]; + ob_queue_t const *ob_q = &softs->op_ob_q[PQI_DEFAULT_IB_QUEUE]; rcb_t *rcb = NULL; memset(&request, 0, sizeof(request)); diff --git a/sys/dev/smartpqi/smartpqi_main.c b/sys/dev/smartpqi/smartpqi_main.c index 402841bbf4d6..6274ecc957d4 100644 --- a/sys/dev/smartpqi/smartpqi_main.c +++ b/sys/dev/smartpqi/smartpqi_main.c @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -29,290 +29,14 @@ */ #include "smartpqi_includes.h" +#include "smartpqi_controllers.h" CTASSERT(BSD_SUCCESS == PQI_STATUS_SUCCESS); /* - * Supported devices - */ -struct pqi_ident -{ - u_int16_t vendor; - u_int16_t device; - u_int16_t subvendor; - u_int16_t subdevice; - int hwif; - char *desc; -} pqi_identifiers[] = { - /* (MSCC PM8205 8x12G based) */ - {0x9005, 0x028f, 0x103c, 0x600, PQI_HWIF_SRCV, "P408i-p SR Gen10"}, - {0x9005, 0x028f, 0x103c, 0x601, PQI_HWIF_SRCV, "P408e-p SR Gen10"}, - {0x9005, 0x028f, 0x103c, 0x602, PQI_HWIF_SRCV, "P408i-a SR Gen10"}, - {0x9005, 0x028f, 0x103c, 0x603, PQI_HWIF_SRCV, "P408i-c SR Gen10"}, - {0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"}, - {0x9005, 0x028f, 0x9005, 0x608, PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"}, - {0x9005, 0x028f, 0x103c, 0x609, PQI_HWIF_SRCV, "P408i-sb SR G10"}, - - /* (MSCC PM8225 8x12G based) */ - {0x9005, 0x028f, 0x103c, 0x650, PQI_HWIF_SRCV, "E208i-p SR Gen10"}, - {0x9005, 0x028f, 0x103c, 0x651, PQI_HWIF_SRCV, "E208e-p SR Gen10"}, - {0x9005, 0x028f, 0x103c, 0x652, PQI_HWIF_SRCV, "E208i-c SR Gen10"}, - {0x9005, 0x028f, 0x103c, 0x654, PQI_HWIF_SRCV, "E208i-a SR Gen10"}, - {0x9005, 0x028f, 0x103c, 0x655, PQI_HWIF_SRCV, "P408e-m SR Gen10"}, - {0x9005, 0x028f, 0x9005, 0x659, PQI_HWIF_SRCV, "2100C8iOXS"}, - - /* (MSCC PM8221 8x12G based) */ - {0x9005, 0x028f, 0x103c, 0x700, PQI_HWIF_SRCV, "P204i-c SR Gen10"}, - {0x9005, 0x028f, 0x103c, 0x701, PQI_HWIF_SRCV, "P204i-b SR Gen10"}, - {0x9005, 0x028f, 0x193d, 0x1104, PQI_HWIF_SRCV, "UN RAID P2404-Mf-4i-2GB"}, - {0x9005, 0x028f, 0x193d, 0x1106, PQI_HWIF_SRCV, "UN RAID P2404-Mf-4i-1GB"}, - {0x9005, 0x028f, 0x193d, 0x1108, PQI_HWIF_SRCV, "UN RAID P4408-Ma-8i-2GB"}, - {0x9005, 0x028f, 0x193d, 0x1109, PQI_HWIF_SRCV, "UN RAID P4408-Mr-8i-2GB"}, - - /* (MSCC PM8204 8x12G based) */ - {0x9005, 0x028f, 0x9005, 0x800, PQI_HWIF_SRCV, "SmartRAID 3154-8i"}, - {0x9005, 0x028f, 0x9005, 0x801, PQI_HWIF_SRCV, "SmartRAID 3152-8i"}, - {0x9005, 0x028f, 0x9005, 0x802, PQI_HWIF_SRCV, "SmartRAID 3151-4i"}, - {0x9005, 0x028f, 0x9005, 0x803, PQI_HWIF_SRCV, "SmartRAID 3101-4i"}, - {0x9005, 0x028f, 0x9005, 0x804, PQI_HWIF_SRCV, "SmartRAID 3154-8e"}, - {0x9005, 0x028f, 0x9005, 0x805, PQI_HWIF_SRCV, "SmartRAID 3102-8i"}, - {0x9005, 0x028f, 0x9005, 0x806, PQI_HWIF_SRCV, "SmartRAID 3100"}, - {0x9005, 0x028f, 0x9005, 0x807, PQI_HWIF_SRCV, "SmartRAID 3162-8i"}, - {0x9005, 0x028f, 0x152d, 0x8a22, PQI_HWIF_SRCV, "QS-8204-8i"}, - {0x9005, 0x028f, 0x193d, 0xf460, PQI_HWIF_SRCV, "UN RAID P460-M4"}, - {0x9005, 0x028f, 0x193d, 0xf461, PQI_HWIF_SRCV, "UN RAID P460-B4"}, - {0x9005, 0x028f, 0x1bd4, 0x004b, PQI_HWIF_SRCV, "PM8204-2GB"}, - {0x9005, 0x028f, 0x1bd4, 0x004c, PQI_HWIF_SRCV, "PM8204-4GB"}, - {0x9005, 0x028f, 0x193d, 0x1105, PQI_HWIF_SRCV, "UN RAID P4408-Mf-8i-2GB"}, - {0x9005, 0x028f, 0x193d, 0x1107, PQI_HWIF_SRCV, "UN RAID P4408-Mf-8i-4GB"}, - {0x9005, 0x028f, 0x1d8d, 0x800, PQI_HWIF_SRCV, "Fiberhome SmartRAID AIS-8204-8i"}, - {0x9005, 0x028f, 0x9005, 0x0808, PQI_HWIF_SRCV, "SmartRAID 3101E-4i"}, - {0x9005, 0x028f, 0x9005, 0x0809, PQI_HWIF_SRCV, "SmartRAID 3102E-8i"}, - {0x9005, 0x028f, 0x9005, 0x080a, PQI_HWIF_SRCV, "SmartRAID 3152-8i/N"}, - {0x9005, 0x028f, 0x1cc4, 0x0101, PQI_HWIF_SRCV, "Ramaxel FBGF-RAD PM8204"}, - - /* (MSCC PM8222 8x12G based) */ - {0x9005, 0x028f, 0x9005, 0x900, PQI_HWIF_SRCV, "SmartHBA 2100-8i"}, - {0x9005, 0x028f, 0x9005, 0x901, PQI_HWIF_SRCV, "SmartHBA 2100-4i"}, - {0x9005, 0x028f, 0x9005, 0x902, PQI_HWIF_SRCV, "HBA 1100-8i"}, - {0x9005, 0x028f, 0x9005, 0x903, PQI_HWIF_SRCV, "HBA 1100-4i"}, - {0x9005, 0x028f, 0x9005, 0x904, PQI_HWIF_SRCV, "SmartHBA 2100-8e"}, - {0x9005, 0x028f, 0x9005, 0x905, PQI_HWIF_SRCV, "HBA 1100-8e"}, - {0x9005, 0x028f, 0x9005, 0x906, PQI_HWIF_SRCV, "SmartHBA 2100-4i4e"}, - {0x9005, 0x028f, 0x9005, 0x907, PQI_HWIF_SRCV, "HBA 1100"}, - {0x9005, 0x028f, 0x9005, 0x908, PQI_HWIF_SRCV, "SmartHBA 2100"}, - {0x9005, 0x028f, 0x9005, 0x90a, PQI_HWIF_SRCV, "SmartHBA 2100A-8i"}, - {0x9005, 0x028f, 0x193d, 0x8460, PQI_HWIF_SRCV, "UN HBA H460-M1"}, - {0x9005, 0x028f, 0x193d, 0x8461, PQI_HWIF_SRCV, "UN HBA H460-B1"}, - {0x9005, 0x028f, 0x193d, 0xc460, PQI_HWIF_SRCV, "UN RAID P460-M2"}, - {0x9005, 0x028f, 0x193d, 0xc461, PQI_HWIF_SRCV, "UN RAID P460-B2"}, - {0x9005, 0x028f, 0x1bd4, 0x004a, PQI_HWIF_SRCV, "PM8222-SHBA"}, - {0x9005, 0x028f, 0x13fe, 0x8312, PQI_HWIF_SRCV, "MIC-8312BridgeB"}, - {0x9005, 0x028f, 0x1bd4, 0x004f, PQI_HWIF_SRCV, "PM8222-HBA"}, - {0x9005, 0x028f, 0x1d8d, 0x908, PQI_HWIF_SRCV, "Fiberhome SmartHBA AIS-8222-8i"}, - {0x9005, 0x028f, 0x1bd4, 0x006C, PQI_HWIF_SRCV, "RS0800M5E8i"}, - {0x9005, 0x028f, 0x1bd4, 0x006D, PQI_HWIF_SRCV, "RS0800M5H8i"}, - {0x9005, 0x028f, 0x1cc4, 0x0201, PQI_HWIF_SRCV, "Ramaxel FBGF-RAD PM8222"}, - - /* (SRCx MSCC FVB 24x12G based) */ - {0x9005, 0x028f, 0x103c, 0x1001, PQI_HWIF_SRCV, "MSCC FVB"}, - - /* (MSCC PM8241 24x12G based) */ - - /* (MSCC PM8242 24x12G based) */ - {0x9005, 0x028f, 0x152d, 0x8a37, PQI_HWIF_SRCV, "QS-8242-24i"}, - {0x9005, 0x028f, 0x9005, 0x1300, PQI_HWIF_SRCV, "HBA 1100-8i8e"}, - {0x9005, 0x028f, 0x9005, 0x1301, PQI_HWIF_SRCV, "HBA 1100-24i"}, - {0x9005, 0x028f, 0x9005, 0x1302, PQI_HWIF_SRCV, "SmartHBA 2100-8i8e"}, - {0x9005, 0x028f, 0x9005, 0x1303, PQI_HWIF_SRCV, "SmartHBA 2100-24i"}, - {0x9005, 0x028f, 0x105b, 0x1321, PQI_HWIF_SRCV, "8242-24i"}, - {0x9005, 0x028f, 0x1bd4, 0x0045, PQI_HWIF_SRCV, "SMART-HBA 8242-24i"}, - {0x9005, 0x028f, 0x1bd4, 0x006B, PQI_HWIF_SRCV, "RS0800M5H24i"}, - {0x9005, 0x028f, 0x1bd4, 0x0070, PQI_HWIF_SRCV, "RS0800M5E24i"}, - - /* (MSCC PM8236 16x12G based) */ - {0x9005, 0x028f, 0x152d, 0x8a24, PQI_HWIF_SRCV, "QS-8236-16i"}, - {0x9005, 0x028f, 0x9005, 0x1380, PQI_HWIF_SRCV, "SmartRAID 3154-16i"}, - {0x9005, 0x028f, 0x1bd4, 0x0046, PQI_HWIF_SRCV, "RAID 8236-16i"}, - {0x9005, 0x028f, 0x1d8d, 0x806, PQI_HWIF_SRCV, "Fiberhome SmartRAID AIS-8236-16i"}, - {0x9005, 0x028f, 0x1cf2, 0x0B27, PQI_HWIF_SRCV, "ZTE SmartROC3100 SDPSA/B-18i 4G"}, - {0x9005, 0x028f, 0x1cf2, 0x0B45, PQI_HWIF_SRCV, "ZTE SmartROC3100 SDPSA/B_L-18i 2G"}, - {0x9005, 0x028f, 0x1cf2, 0x5445, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM241-18i 2G"}, - {0x9005, 0x028f, 0x1cf2, 0x5446, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM242-18i 4G"}, - {0x9005, 0x028f, 0x1cf2, 0x5449, PQI_HWIF_SRCV, "ZTE SmartROC3100 RS241-18i 2G"}, - {0x9005, 0x028f, 0x1cf2, 0x544A, PQI_HWIF_SRCV, "ZTE SmartROC3100 RS242-18i 4G"}, - {0x9005, 0x028f, 0x1cf2, 0x544D, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM241B-18i 2G"}, - {0x9005, 0x028f, 0x1cf2, 0x544E, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM242B-18i 4G"}, - {0x9005, 0x028f, 0x1bd4, 0x006F, PQI_HWIF_SRCV, "RS0804M5R16i"}, - - - - /* (MSCC PM8237 24x12G based) */ - {0x9005, 0x028f, 0x103c, 0x1100, PQI_HWIF_SRCV, "P816i-a SR Gen10"}, - {0x9005, 0x028f, 0x103c, 0x1101, PQI_HWIF_SRCV, "P416ie-m SR G10"}, - - /* (MSCC PM8238 16x12G based) */ - {0x9005, 0x028f, 0x152d, 0x8a23, PQI_HWIF_SRCV, "QS-8238-16i"}, - {0x9005, 0x028f, 0x9005, 0x1280, PQI_HWIF_SRCV, "HBA 1100-16i"}, - {0x9005, 0x028f, 0x9005, 0x1281, PQI_HWIF_SRCV, "HBA 1100-16e"}, - {0x9005, 0x028f, 0x105b, 0x1211, PQI_HWIF_SRCV, "8238-16i"}, - {0x9005, 0x028f, 0x1bd4, 0x0048, PQI_HWIF_SRCV, "SMART-HBA 8238-16i"}, - {0x9005, 0x028f, 0x9005, 0x1282, PQI_HWIF_SRCV, "SmartHBA 2100-16i"}, - {0x9005, 0x028f, 0x1d8d, 0x916, PQI_HWIF_SRCV, "Fiberhome SmartHBA AIS-8238-16i"}, - {0x9005, 0x028f, 0x1458, 0x1000, PQI_HWIF_SRCV, "GIGABYTE SmartHBA CLN1832"}, - {0x9005, 0x028f, 0x1cf2, 0x0B29, PQI_HWIF_SRCV, "ZTE SmartIOC2100 SDPSA/B_I-18i"}, - {0x9005, 0x028f, 0x1cf2, 0x5447, PQI_HWIF_SRCV, "ZTE SmartIOC2100 RM243-18i"}, - {0x9005, 0x028f, 0x1cf2, 0x544B, PQI_HWIF_SRCV, "ZTE SmartIOC2100 RS243-18i"}, - {0x9005, 0x028f, 0x1cf2, 0x544F, PQI_HWIF_SRCV, "ZTE SmartIOC2100 RM243B-18i"}, - {0x9005, 0x028f, 0x1bd4, 0x0071, PQI_HWIF_SRCV, "RS0800M5H16i"}, - {0x9005, 0x028f, 0x1bd4, 0x0072, PQI_HWIF_SRCV, "RS0800M5E16i"}, - - /* (MSCC PM8240 24x12G based) */ - {0x9005, 0x028f, 0x152d, 0x8a36, PQI_HWIF_SRCV, "QS-8240-24i"}, - {0x9005, 0x028f, 0x9005, 0x1200, PQI_HWIF_SRCV, "SmartRAID 3154-24i"}, - {0x9005, 0x028f, 0x9005, 0x1201, PQI_HWIF_SRCV, "SmartRAID 3154-8i16e"}, - {0x9005, 0x028f, 0x9005, 0x1202, PQI_HWIF_SRCV, "SmartRAID 3154-8i8e"}, - {0x9005, 0x028f, 0x1bd4, 0x0047, PQI_HWIF_SRCV, "RAID 8240-24i"}, - {0x9005, 0x028f, 0x1dfc, 0x3161, PQI_HWIF_SRCV, "NTCOM SAS3 RAID-24i"}, - {0x9005, 0x028f, 0x1F0C, 0x3161, PQI_HWIF_SRCV, "NT RAID 3100-24i"}, - - /* Huawei ID's */ - {0x9005, 0x028f, 0x19e5, 0xd227, PQI_HWIF_SRCV, "SR465C-M 4G"}, - {0x9005, 0x028f, 0x19e5, 0xd22a, PQI_HWIF_SRCV, "SR765-M"}, - {0x9005, 0x028f, 0x19e5, 0xd228, PQI_HWIF_SRCV, "SR455C-M 2G"}, - {0x9005, 0x028f, 0x19e5, 0xd22c, PQI_HWIF_SRCV, "SR455C-M 4G"}, - {0x9005, 0x028f, 0x19e5, 0xd229, PQI_HWIF_SRCV, "SR155-M"}, - {0x9005, 0x028f, 0x19e5, 0xd22b, PQI_HWIF_SRCV, "SR455C-ME 4G"}, - - /* (MSCC PM8252 8x12G based) */ - {0x9005, 0x028f, 0x193d, 0x110b, PQI_HWIF_SRCV, "UN HBA H4508-Mf-8i"}, - {0x9005, 0x028f, 0x1bd4, 0x0052, PQI_HWIF_SRCV, "MT0801M6E"}, - {0x9005, 0x028f, 0x1bd4, 0x0054, PQI_HWIF_SRCV, "MT0800M6H"}, - {0x9005, 0x028f, 0x1bd4, 0x0086, PQI_HWIF_SRCV, "RT0800M7E"}, - {0x9005, 0x028f, 0x1bd4, 0x0087, PQI_HWIF_SRCV, "RT0800M7H"}, - {0x9005, 0x028f, 0x1f51, 0x1001, PQI_HWIF_SRCV, "SmartHBA P6600-8i"}, - {0x9005, 0x028f, 0x1f51, 0x1003, PQI_HWIF_SRCV, "SmartHBA P6600-8e"}, - {0x9005, 0x028f, 0x9005, 0x1460, PQI_HWIF_SRCV, "HBA 1200"}, - {0x9005, 0x028f, 0x9005, 0x1461, PQI_HWIF_SRCV, "SmartHBA 2200"}, - {0x9005, 0x028f, 0x9005, 0x1462, PQI_HWIF_SRCV, "HBA 1200-8i"}, - - /* (MSCC PM8254 32x12G based) */ - {0x9005, 0x028f, 0x1bd4, 0x0051, PQI_HWIF_SRCV, "MT0804M6R"}, - {0x9005, 0x028f, 0x1bd4, 0x0053, PQI_HWIF_SRCV, "MT0808M6R"}, - {0x9005, 0x028f, 0x1bd4, 0x0088, PQI_HWIF_SRCV, "RT0804M7R"}, - {0x9005, 0x028f, 0x1bd4, 0x0089, PQI_HWIF_SRCV, "RT0808M7R"}, - {0x9005, 0x028f, 0x1f51, 0x1002, PQI_HWIF_SRCV, "SmartRAID P7604-8i"}, - {0x9005, 0x028f, 0x1f51, 0x1004, PQI_HWIF_SRCV, "SmartRAID P7604-8e"}, - {0x9005, 0x028f, 0x9005, 0x14a0, PQI_HWIF_SRCV, "SmartRAID 3254-8i"}, - {0x9005, 0x028f, 0x9005, 0x14a1, PQI_HWIF_SRCV, "SmartRAID 3204-8i"}, - {0x9005, 0x028f, 0x9005, 0x14a2, PQI_HWIF_SRCV, "SmartRAID 3252-8i"}, - {0x9005, 0x028f, 0x9005, 0x14a4, PQI_HWIF_SRCV, "SmartRAID 3254-8i /e"}, - {0x9005, 0x028f, 0x9005, 0x14a5, PQI_HWIF_SRCV, "SmartRAID 3252-8i /e"}, - {0x9005, 0x028f, 0x9005, 0x14a6, PQI_HWIF_SRCV, "SmartRAID 3204-8i /e"}, - - /* (MSCC PM8262 16x12G based) */ - {0x9005, 0x028f, 0x9005, 0x14c0, PQI_HWIF_SRCV, "SmartHBA 2200-16i"}, - {0x9005, 0x028f, 0x9005, 0x14c1, PQI_HWIF_SRCV, "HBA 1200-16i"}, - {0x9005, 0x028f, 0x9005, 0x14c3, PQI_HWIF_SRCV, "HBA 1200-16e"}, - {0x9005, 0x028f, 0x9005, 0x14c4, PQI_HWIF_SRCV, "HBA 1200-8e"}, - {0x9005, 0x028f, 0x1f51, 0x1005, PQI_HWIF_SRCV, "SmartHBA P6600-16i"}, - {0x9005, 0x028f, 0x1f51, 0x1007, PQI_HWIF_SRCV, "SmartHBA P6600-8i8e"}, - {0x9005, 0x028f, 0x1f51, 0x1009, PQI_HWIF_SRCV, "SmartHBA P6600-16e"}, - {0x9005, 0x028f, 0x1cf2, 0x54dc, PQI_HWIF_SRCV, "ZTE SmartIOC2200 RM346-16i"}, - {0x9005, 0x028f, 0x1cf2, 0x0806, PQI_HWIF_SRCV, "ZTE SmartIOC2200 RS346-16i"}, - - /* (MSCC PM8264 16x12G based) */ - {0x9005, 0x028f, 0x9005, 0x14b0, PQI_HWIF_SRCV, "SmartRAID 3254-16i"}, - {0x9005, 0x028f, 0x9005, 0x14b1, PQI_HWIF_SRCV, "SmartRAID 3258-16i"}, - {0x9005, 0x028f, 0x1f51, 0x1006, PQI_HWIF_SRCV, "SmartRAID P7608-16i"}, - {0x9005, 0x028f, 0x1f51, 0x1008, PQI_HWIF_SRCV, "SmartRAID P7608-8i8e"}, - {0x9005, 0x028f, 0x1f51, 0x100a, PQI_HWIF_SRCV, "SmartRAID P7608-16e"}, - {0x9005, 0x028f, 0x1cf2, 0x54da, PQI_HWIF_SRCV, "ZTE SmartROC3200 RM344-16i 4G"}, - {0x9005, 0x028f, 0x1cf2, 0x54db, PQI_HWIF_SRCV, "ZTE SmartROC3200 RM345-16i 8G"}, - {0x9005, 0x028f, 0x1cf2, 0x0804, PQI_HWIF_SRCV, "ZTE SmartROC3200 RS344-16i 4G"}, - {0x9005, 0x028f, 0x1cf2, 0x0805, PQI_HWIF_SRCV, "ZTE SmartROC3200 RS345-16i 8G"}, - - /* (MSCC PM8265 16x12G based) */ - {0x9005, 0x028f, 0x1590, 0x02dc, PQI_HWIF_SRCV, "SR416i-a Gen10+"}, - {0x9005, 0x028f, 0x9005, 0x1470, PQI_HWIF_SRCV, "SmartRAID 3200"}, - {0x9005, 0x028f, 0x9005, 0x1471, PQI_HWIF_SRCV, "SmartRAID 3254-16i /e"}, - {0x9005, 0x028f, 0x9005, 0x1472, PQI_HWIF_SRCV, "SmartRAID 3258-16i /e"}, - {0x9005, 0x028f, 0x9005, 0x1473, PQI_HWIF_SRCV, "SmartRAID 3284-16io /e/uC"}, - {0x9005, 0x028f, 0x9005, 0x1474, PQI_HWIF_SRCV, "SmartRAID 3254-16io /e"}, - {0x9005, 0x028f, 0x9005, 0x1475, PQI_HWIF_SRCV, "SmartRAID 3254-16e /e"}, - - /* (MSCC PM8266 16x12G based) */ - {0x9005, 0x028f, 0x1014, 0x0718, PQI_HWIF_SRCV, "IBM 4-Port 24G SAS"}, - {0x9005, 0x028f, 0x9005, 0x1490, PQI_HWIF_SRCV, "HBA 1200p Ultra"}, - {0x9005, 0x028f, 0x9005, 0x1491, PQI_HWIF_SRCV, "SmartHBA 2200p Ultra"}, - {0x9005, 0x028f, 0x9005, 0x1402, PQI_HWIF_SRCV, "HBA Ultra 1200P-16i"}, - {0x9005, 0x028f, 0x9005, 0x1441, PQI_HWIF_SRCV, "HBA Ultra 1200P-32i"}, - - /* (MSCC PM8268 16x12G based) */ - {0x9005, 0x028f, 0x9005, 0x14d0, PQI_HWIF_SRCV, "SmartRAID Ultra 3258P-16i"}, - - /* (MSCC PM8269 16x12G based) */ - {0x9005, 0x028f, 0x9005, 0x1400, PQI_HWIF_SRCV, "SmartRAID Ultra 3258P-16i /e"}, - - /* (MSCC PM8270 16x12G based) */ - {0x9005, 0x028f, 0x9005, 0x1410, PQI_HWIF_SRCV, "HBA Ultra 1200P-16e"}, - {0x9005, 0x028f, 0x9005, 0x1411, PQI_HWIF_SRCV, "HBA 1200 Ultra"}, - {0x9005, 0x028f, 0x9005, 0x1412, PQI_HWIF_SRCV, "SmartHBA 2200 Ultra"}, - {0x9005, 0x028f, 0x9005, 0x1463, PQI_HWIF_SRCV, "SmartHBA 2200-8io /e"}, - {0x9005, 0x028f, 0x9005, 0x14c2, PQI_HWIF_SRCV, "SmartHBA 2200-16io /e"}, - - /* (MSCC PM8271 16x12G based) */ - {0x9005, 0x028f, 0x9005, 0x14e0, PQI_HWIF_SRCV, "SmartIOC PM8271"}, - - /* (MSCC PM8272 16x12G based) */ - {0x9005, 0x028f, 0x9005, 0x1420, PQI_HWIF_SRCV, "SmartRAID Ultra 3254-16e"}, - - /* (MSCC PM8273 16x12G based) */ - {0x9005, 0x028f, 0x9005, 0x1430, PQI_HWIF_SRCV, "SmartRAID Ultra 3254-16e /e"}, - - /* (MSCC PM8274 16x12G based) */ - {0x9005, 0x028f, 0x1e93, 0x1000, PQI_HWIF_SRCV, "ByteHBA JGH43024-8"}, - {0x9005, 0x028f, 0x1e93, 0x1001, PQI_HWIF_SRCV, "ByteHBA JGH43034-8"}, - {0x9005, 0x028f, 0x1e93, 0x1005, PQI_HWIF_SRCV, "ByteHBA JGH43014-8"}, - - /* (MSCC PM8275 16x12G based) */ - {0x9005, 0x028f, 0x9005, 0x14f0, PQI_HWIF_SRCV, "SmartIOC PM8275"}, - - /* (MSCC PM8276 16x12G based) */ - {0x9005, 0x028f, 0x9005, 0x1480, PQI_HWIF_SRCV, "SmartRAID 3200 Ultra"}, - {0x9005, 0x028f, 0x1e93, 0x1002, PQI_HWIF_SRCV, "ByteHBA JGH44014-8"}, - - /* (MSCC PM8278 16x12G based) */ - {0x9005, 0x028f, 0x9005, 0x1440, PQI_HWIF_SRCV, "SmartRAID Ultra 3258P-32i"}, - - /* (MSCC PM8279 32x12G based) */ - {0x9005, 0x028f, 0x9005, 0x1450, PQI_HWIF_SRCV, "SmartRAID Ultra 3258P-32i /e"}, - {0x9005, 0x028f, 0x1590, 0x0294, PQI_HWIF_SRCV, "SR932i-p Gen10+"}, - {0x9005, 0x028f, 0x1590, 0x0381, PQI_HWIF_SRCV, "SR932i-p Gen11"}, - {0x9005, 0x028f, 0x1590, 0x0382, PQI_HWIF_SRCV, "SR308i-p Gen11"}, - {0x9005, 0x028f, 0x1590, 0x0383, PQI_HWIF_SRCV, "SR308i-o Gen11"}, - {0x9005, 0x028f, 0x1590, 0x02db, PQI_HWIF_SRCV, "SR416ie-m Gen11"}, - {0x9005, 0x028f, 0x1590, 0x032e, PQI_HWIF_SRCV, "SR416i-o Gen11"}, - {0x9005, 0x028f, 0x9005, 0x1452, PQI_HWIF_SRCV, "SmartRAID 3200p Ultra"}, - - /* (MSCC HBA/SMARTHBA/CFF SmartRAID - Lenovo 8X12G 16X12G based) */ - {0x9005, 0x028f, 0x1d49, 0x0220, PQI_HWIF_SRCV, "4350-8i SAS/SATA HBA"}, - {0x9005, 0x028f, 0x1d49, 0x0221, PQI_HWIF_SRCV, "4350-16i SAS/SATA HBA"}, - {0x9005, 0x028f, 0x1d49, 0x0520, PQI_HWIF_SRCV, "5350-8i"}, - {0x9005, 0x028f, 0x1d49, 0x0522, PQI_HWIF_SRCV, "5350-8i INTR"}, - {0x9005, 0x028f, 0x1d49, 0x0620, PQI_HWIF_SRCV, "9350-8i 2GB Flash"}, - {0x9005, 0x028f, 0x1d49, 0x0621, PQI_HWIF_SRCV, "9350-8i 2GB Flash INTR"}, - {0x9005, 0x028f, 0x1d49, 0x0622, PQI_HWIF_SRCV, "9350-16i 4GB Flash"}, - {0x9005, 0x028f, 0x1d49, 0x0623, PQI_HWIF_SRCV, "9350-16i 4GB Flash INTR"}, - - {0, 0, 0, 0, 0, 0} -}; - -struct pqi_ident -pqi_family_identifiers[] = { - {0x9005, 0x028f, 0, 0, PQI_HWIF_SRCV, "Smart Array Storage Controller"}, - {0, 0, 0, 0, 0, 0} -}; + * Logging levels global +*/ +unsigned long logging_level = PQISRC_LOG_LEVEL; /* * Function to identify the installed adapter. @@ -404,10 +128,12 @@ static void read_device_hint_resource(struct pqisrc_softstate *softs, { DBG_FUNC("IN\n"); + long result = 0; + device_t dev = softs->os_specific.pqi_dev; - if (resource_long_value("smartpqi", device_get_unit(dev), keyword, (long *)value) == DEVICE_HINT_SUCCESS) { - if (*value) { + if (resource_long_value("smartpqi", device_get_unit(dev), keyword, &result) == DEVICE_HINT_SUCCESS) { + if (result) { /* set resource to 1 for disabling the * firmware feature in device hint file. */ *value = 0; @@ -434,11 +160,14 @@ static void read_device_hint_decimal_value(struct pqisrc_softstate *softs, { DBG_FUNC("IN\n"); + long result = 0; + device_t dev = softs->os_specific.pqi_dev; - if (resource_long_value("smartpqi", device_get_unit(dev), keyword, (long *)value) == DEVICE_HINT_SUCCESS) { + if (resource_long_value("smartpqi", device_get_unit(dev), keyword, &result) == DEVICE_HINT_SUCCESS) { /* Nothing to do here. Value reads * directly from Device.Hint file */ + *value = result; } else { /* Set to max to determine the value */ @@ -482,13 +211,23 @@ static void smartpqi_read_all_device_hint_file_entries(struct pqisrc_softstate * read_device_hint_decimal_value(softs, SCATTER_GATHER_COUNT, &value); softs->hint.sg_segments = value; - /* hint.smartpqi.0.queue_count = "0" */ - read_device_hint_decimal_value(softs, QUEUE_COUNT, &value); - softs->hint.cpu_count = value; - DBG_FUNC("IN\n"); } +/* Get the driver parameter tunables. */ +static void +smartpqi_get_tunables(void) +{ + /* + * Temp variable used to get the value from loader.conf. + * Initializing it with the current logging level value. + */ + unsigned long logging_level_temp = PQISRC_LOG_LEVEL; + + TUNABLE_ULONG_FETCH("hw.smartpqi.debug_level", &logging_level_temp); + + DBG_SET_LOGGING_LEVEL(logging_level_temp); +} /* * Allocate resources for our device, set up the bus interface. @@ -506,7 +245,7 @@ smartpqi_attach(device_t dev) rcb_t *rcbp = NULL; /* - * Initialise softc. + * Initialize softc. */ softs = device_get_softc(dev); @@ -518,6 +257,8 @@ smartpqi_attach(device_t dev) memset(softs, 0, sizeof(*softs)); softs->os_specific.pqi_dev = dev; + smartpqi_get_tunables(); + DBG_FUNC("IN\n"); /* assume failure is 'not configured' */ @@ -830,4 +571,5 @@ static driver_t smartpqi_pci_driver = { }; DRIVER_MODULE(smartpqi, pci, smartpqi_pci_driver, 0, 0); + MODULE_DEPEND(smartpqi, pci, 1, 1, 1); diff --git a/sys/dev/smartpqi/smartpqi_misc.c b/sys/dev/smartpqi/smartpqi_misc.c index 20ba4fc11eb7..6db0d80ed993 100644 --- a/sys/dev/smartpqi/smartpqi_misc.c +++ b/sys/dev/smartpqi/smartpqi_misc.c @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -58,7 +58,7 @@ void os_wellness_periodic(void *data) { struct pqisrc_softstate *softs = (struct pqisrc_softstate *)data; - int ret = 0; + int ret; /* update time to FW */ if (!pqisrc_ctrl_offline(softs)){ @@ -286,27 +286,3 @@ bsd_set_hint_adapter_cap(struct pqisrc_softstate *softs) DBG_FUNC("OUT\n"); } - -void -bsd_set_hint_adapter_cpu_config(struct pqisrc_softstate *softs) -{ - DBG_FUNC("IN\n"); - - /* online cpu count decides the no.of queues the driver can create, - * and msi interrupt count as well. - * If the cpu count is "zero" set by hint file then the driver - * can have "one" queue and "one" legacy interrupt. (It shares event queue for - * operational IB queue). - * Check for os_get_intr_config function for interrupt assignment.*/ - - if (softs->hint.cpu_count > softs->num_cpus_online) { - /* Nothing to do here. Supported cpu count - * already fetched from hardware */ - } - else { - /* Set Device.Hint cpu count here */ - softs->num_cpus_online = softs->hint.cpu_count; - } - - DBG_FUNC("OUT\n"); -} diff --git a/sys/dev/smartpqi/smartpqi_prototypes.h b/sys/dev/smartpqi/smartpqi_prototypes.h index a10e5031d85e..f2eb328b6bc1 100644 --- a/sys/dev/smartpqi/smartpqi_prototypes.h +++ b/sys/dev/smartpqi/smartpqi_prototypes.h @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -84,23 +84,23 @@ uint32_t pqisrc_get_tag(lockless_stack_t *); /* smartpqi_discovery.c */ void pqisrc_remove_device(pqisrc_softstate_t *, pqi_scsi_dev_t *); boolean_t pqisrc_add_softs_entry(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device, - uint8_t *scsi3addr); + uint8_t const *scsi3addr); int pqisrc_get_ctrl_fw_version(pqisrc_softstate_t *); int pqisrc_rescan_devices(pqisrc_softstate_t *); int pqisrc_scan_devices(pqisrc_softstate_t *); void pqisrc_cleanup_devices(pqisrc_softstate_t *); void pqisrc_device_mem_free(pqisrc_softstate_t *, pqi_scsi_dev_t *); -boolean_t pqisrc_is_external_raid_device(pqi_scsi_dev_t *device); +boolean_t pqisrc_is_external_raid_device(pqi_scsi_dev_t const *device); void pqisrc_free_device(pqisrc_softstate_t * softs,pqi_scsi_dev_t *device); void pqisrc_init_bitmap(pqisrc_softstate_t *softs); void pqisrc_remove_target_bit(pqisrc_softstate_t *softs, int target); int pqisrc_find_avail_target(pqisrc_softstate_t *softs); int pqisrc_find_device_list_index(pqisrc_softstate_t *softs, - pqi_scsi_dev_t *device); + pqi_scsi_dev_t const *device); int pqisrc_find_btl_list_index(pqisrc_softstate_t *softs, int bus, int target, int lun); int pqisrc_delete_softs_entry(pqisrc_softstate_t *softs, - pqi_scsi_dev_t *device); + pqi_scsi_dev_t const *device); int pqisrc_get_physical_logical_luns(pqisrc_softstate_t *softs, uint8_t cmd, reportlun_data_ext_t **buff, size_t *data_length); int pqisrc_send_scsi_inquiry(pqisrc_softstate_t *softs, @@ -112,16 +112,16 @@ int pqisrc_prepare_send_raid(pqisrc_softstate_t *, pqisrc_raid_req_t *, /* smartpqi_helper.c */ -boolean_t pqisrc_ctrl_offline(pqisrc_softstate_t *); +boolean_t pqisrc_ctrl_offline(pqisrc_softstate_t const *); void pqisrc_heartbeat_timer_handler(pqisrc_softstate_t *); int pqisrc_wait_on_condition(pqisrc_softstate_t *softs, rcb_t *rcb, uint32_t timeout); -boolean_t pqisrc_device_equal(pqi_scsi_dev_t *, pqi_scsi_dev_t *); -boolean_t pqisrc_is_hba_lunid(uint8_t *); -boolean_t pqisrc_is_logical_device(pqi_scsi_dev_t *); +boolean_t pqisrc_device_equal(pqi_scsi_dev_t const *, pqi_scsi_dev_t const *); +boolean_t pqisrc_is_hba_lunid(uint8_t const*); +boolean_t pqisrc_is_logical_device(pqi_scsi_dev_t const *); void pqisrc_sanitize_inquiry_string(unsigned char *, int ); -void pqisrc_display_device_info(pqisrc_softstate_t *, char *, pqi_scsi_dev_t *); -boolean_t pqisrc_scsi3addr_equal(uint8_t *, uint8_t *); +void pqisrc_display_device_info(pqisrc_softstate_t *, char const *, pqi_scsi_dev_t *); +boolean_t pqisrc_scsi3addr_equal(uint8_t const *, uint8_t const *); void check_struct_sizes(void); char *pqisrc_raidlevel_to_string(uint8_t); void pqisrc_configure_legacy_intx(pqisrc_softstate_t*, boolean_t); @@ -151,7 +151,7 @@ void pqisrc_show_aio_error_info(pqisrc_softstate_t *softs, rcb_t *rcb, aio_path_error_info_elem_t *aio_err); void pqisrc_show_raid_error_info(pqisrc_softstate_t *softs, rcb_t *rcb, raid_path_error_info_elem_t *aio_err); -boolean_t suppress_innocuous_error_prints(pqisrc_softstate_t *softs, +boolean_t suppress_innocuous_error_prints(pqisrc_softstate_t const *softs, rcb_t *rcb); uint8_t pqisrc_get_cmd_from_rcb(rcb_t *); boolean_t pqisrc_is_innocuous_error(pqisrc_softstate_t *, rcb_t *, void *); @@ -163,37 +163,40 @@ int pqisrc_build_send_vendor_request(pqisrc_softstate_t *softs, int pqisrc_build_send_io(pqisrc_softstate_t *,rcb_t *); int pqisrc_build_scsi_cmd_raidbypass(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device, rcb_t *rcb); -int pqisrc_send_tmf(pqisrc_softstate_t *, pqi_scsi_dev_t *, +int pqisrc_send_tmf(pqisrc_softstate_t *, pqi_scsi_dev_t const *, rcb_t *, rcb_t *, int); int pqisrc_write_current_time_to_host_wellness(pqisrc_softstate_t *softs); int pqisrc_write_driver_version_to_host_wellness(pqisrc_softstate_t *softs); +extern inline void pqisrc_aio_build_cdb(aio_req_locator_t *, uint32_t, + rcb_t *, uint8_t *); +extern inline boolean_t pqisrc_aio_req_too_big(pqisrc_softstate_t *, pqi_scsi_dev_t *, + rcb_t const *, aio_req_locator_t *, uint32_t); void pqisrc_build_aio_common(pqisrc_softstate_t *, pqi_aio_req_t *, rcb_t *, uint32_t); void pqisrc_build_aio_R1_write(pqisrc_softstate_t *, pqi_aio_raid1_write_req_t *, rcb_t *, uint32_t); void pqisrc_build_aio_R5or6_write(pqisrc_softstate_t *, pqi_aio_raid5or6_write_req_t *, rcb_t *, uint32_t); -void pqisrc_show_cdb(pqisrc_softstate_t *softs, char *msg, rcb_t *rcb, uint8_t *cdb); -void pqisrc_print_buffer(pqisrc_softstate_t *softs, char *msg, void *user_buf, uint32_t total_len, uint32_t flags); +void pqisrc_show_cdb(pqisrc_softstate_t *softs, char const *msg, rcb_t const *rcb, uint8_t *cdb); +void pqisrc_print_buffer(pqisrc_softstate_t *softs, char const *msg, void *user_buf, uint32_t total_len, uint32_t flags); void pqisrc_show_rcb_details(pqisrc_softstate_t *softs, rcb_t *rcb, char *msg, void *err_info); void pqisrc_show_aio_io(pqisrc_softstate_t *, rcb_t *, pqi_aio_req_t *, uint32_t); -void pqisrc_show_aio_common(pqisrc_softstate_t *, rcb_t *, pqi_aio_req_t *); -void pqisrc_show_aio_R1_write(pqisrc_softstate_t *, rcb_t *, +void pqisrc_show_aio_common(pqisrc_softstate_t *, rcb_t const *, pqi_aio_req_t *); +void pqisrc_show_aio_R1_write(pqisrc_softstate_t *, rcb_t const *, pqi_aio_raid1_write_req_t *); -void pqisrc_show_aio_R5or6_write(pqisrc_softstate_t *, rcb_t *, +void pqisrc_show_aio_R5or6_write(pqisrc_softstate_t *, rcb_t const *, pqi_aio_raid5or6_write_req_t *); -boolean_t pqisrc_cdb_is_write(uint8_t *); -void print_this_counter(pqisrc_softstate_t *softs, io_counters_t *pcounter, char *msg); +boolean_t pqisrc_cdb_is_write(uint8_t const *); +void print_this_counter(pqisrc_softstate_t const *softs, io_counters_t const *pcounter, char const *msg); void print_all_counters(pqisrc_softstate_t *softs, uint32_t flags); char *io_path_to_ascii(IO_PATH_T path); void int_to_scsilun(uint64_t, uint8_t *); -boolean_t pqisrc_cdb_is_read(uint8_t *); +boolean_t pqisrc_cdb_is_read(uint8_t const *); void pqisrc_build_aio_io(pqisrc_softstate_t *, rcb_t *, pqi_aio_req_t *, uint32_t); uint8_t pqisrc_get_aio_data_direction(rcb_t *); uint8_t pqisrc_get_raid_data_direction(rcb_t *); -void dump_tmf_details(pqisrc_softstate_t *, rcb_t *, char *); -io_type_t get_io_type_from_cdb(uint8_t *); +io_type_t get_io_type_from_cdb(uint8_t const *); OS_ATOMIC64_T increment_this_counter(io_counters_t *, IO_PATH_T , io_type_t ); boolean_t is_buffer_zero(void *, uint32_t ); @@ -237,7 +240,7 @@ int pqisrc_delete_op_queue(pqisrc_softstate_t *, uint32_t, boolean_t); void pqisrc_destroy_event_queue(pqisrc_softstate_t *); void pqisrc_destroy_op_ib_queues(pqisrc_softstate_t *); void pqisrc_destroy_op_ob_queues(pqisrc_softstate_t *); -int pqisrc_change_op_ibq_queue_prop(pqisrc_softstate_t *, ib_queue_t *, +int pqisrc_change_op_ibq_queue_prop(pqisrc_softstate_t *, ib_queue_t const *, uint32_t); int pqisrc_create_op_obq(pqisrc_softstate_t *, ob_queue_t *); int pqisrc_create_op_ibq(pqisrc_softstate_t *, ib_queue_t *); @@ -287,7 +290,6 @@ int os_destroy_semaphore(struct sema *); void os_sema_lock(struct sema *); void os_sema_unlock(struct sema *); void bsd_set_hint_adapter_cap(struct pqisrc_softstate *); -void bsd_set_hint_adapter_cpu_config(struct pqisrc_softstate *); int os_strlcpy(char *dst, char *src, int len); void os_complete_outstanding_cmds_nodevice(pqisrc_softstate_t *); diff --git a/sys/dev/smartpqi/smartpqi_queue.c b/sys/dev/smartpqi/smartpqi_queue.c index f05c951cd4f9..22bc2db572f8 100644 --- a/sys/dev/smartpqi/smartpqi_queue.c +++ b/sys/dev/smartpqi/smartpqi_queue.c @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -514,11 +514,7 @@ pqisrc_destroy_event_queue(pqisrc_softstate_t *softs) DBG_FUNC("IN\n"); if (softs->event_q.created == true) { - int ret = PQI_STATUS_SUCCESS; - ret = pqisrc_delete_op_queue(softs, softs->event_q.q_id, false); - if (ret) { - DBG_ERR("Failed to Delete Event Q %u\n", softs->event_q.q_id); - } + pqisrc_delete_op_queue(softs, softs->event_q.q_id, false); softs->event_q.created = false; } @@ -535,7 +531,7 @@ pqisrc_destroy_event_queue(pqisrc_softstate_t *softs) void pqisrc_destroy_op_ib_queues(pqisrc_softstate_t *softs) { - int ret = PQI_STATUS_SUCCESS; + ib_queue_t *op_ib_q = NULL; uint32_t total_op_ibq = softs->num_op_raid_ibq; int i; @@ -548,12 +544,7 @@ pqisrc_destroy_op_ib_queues(pqisrc_softstate_t *softs) op_ib_q = &softs->op_raid_ib_q[i]; release_queue: if (op_ib_q->created == true) { - ret = pqisrc_delete_op_queue(softs, op_ib_q->q_id, - true); - if (ret) { - DBG_ERR("Failed to Delete IB Q %u\n", - op_ib_q->q_id); - } + pqisrc_delete_op_queue(softs, op_ib_q->q_id, true); op_ib_q->created = false; } @@ -582,7 +573,6 @@ release_queue: void pqisrc_destroy_op_ob_queues(pqisrc_softstate_t *softs) { - int ret = PQI_STATUS_SUCCESS; int i; ob_queue_t *op_ob_q = NULL; @@ -592,10 +582,7 @@ pqisrc_destroy_op_ob_queues(pqisrc_softstate_t *softs) op_ob_q = &softs->op_ob_q[i]; if (op_ob_q->created == true) { - ret = pqisrc_delete_op_queue(softs, op_ob_q->q_id, false); - if (ret) { - DBG_ERR("Failed to Delete OB Q %u\n",op_ob_q->q_id); - } + pqisrc_delete_op_queue(softs, op_ob_q->q_id, false); op_ob_q->created = false; } @@ -643,7 +630,7 @@ pqisrc_destroy_admin_queue(pqisrc_softstate_t *softs) */ int pqisrc_change_op_ibq_queue_prop(pqisrc_softstate_t *softs, - ib_queue_t *op_ib_q, uint32_t prop) + ib_queue_t const *op_ib_q, uint32_t prop) { int ret = PQI_STATUS_SUCCESS; gen_adm_req_iu_t admin_req; diff --git a/sys/dev/smartpqi/smartpqi_request.c b/sys/dev/smartpqi/smartpqi_request.c index d3c4fb989a99..d993897cd1f9 100644 --- a/sys/dev/smartpqi/smartpqi_request.c +++ b/sys/dev/smartpqi/smartpqi_request.c @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -85,8 +85,8 @@ pqisrc_contiguous_free_elem(uint32_t pi, uint32_t ci, uint32_t elem_in_q) /* Subroutine to find out num of elements need for the request */ static uint32_t -pqisrc_num_elem_needed(pqisrc_softstate_t *softs, uint32_t SG_Count, - pqi_scsi_dev_t *devp, boolean_t is_write, IO_PATH_T io_path) +pqisrc_num_elem_needed(pqisrc_softstate_t const *softs, uint32_t SG_Count, + pqi_scsi_dev_t const *devp, boolean_t is_write, IO_PATH_T io_path) { uint32_t num_sg; uint32_t num_elem_required = 1; @@ -129,7 +129,7 @@ pqisrc_build_sgl(sgt_t *sg_array, rcb_t *rcb, iu_header_t *iu_hdr, DBG_FUNC("IN\n"); - /* DBG_IO("SGL_Count :%d",num_sg); */ + /* DBG_IO("SGL_Count :%d\n",num_sg); */ if (0 == num_sg) { goto out; } @@ -404,11 +404,11 @@ pqisrc_build_aio_common(pqisrc_softstate_t *softs, pqi_aio_req_t *aio_req, } /*Subroutine used to show standard AIO IU fields */ void -pqisrc_show_aio_common(pqisrc_softstate_t *softs, rcb_t *rcb, +pqisrc_show_aio_common(pqisrc_softstate_t *softs, rcb_t const *rcb, pqi_aio_req_t *aio_req) { #ifdef DEBUG_AIO - DBG_INFO("AIO IU Content, tag# 0x%08x", rcb->tag); + DBG_INFO("AIO IU Content, tag# 0x%08x\n", rcb->tag); DBG_INFO("%15s: 0x%x\n", "iu_type", aio_req->header.iu_type); DBG_INFO("%15s: 0x%x\n", "comp_feat", aio_req->header.comp_feature); DBG_INFO("%15s: 0x%x\n", "length", aio_req->header.iu_length); @@ -453,11 +453,11 @@ pqisrc_build_aio_R1_write(pqisrc_softstate_t *softs, { DBG_FUNC("IN\n"); if (!rcb->dvp) { - DBG_WARN("%s: DEBUG: dev ptr is null", __func__); + DBG_WARN("%s: DEBUG: dev ptr is NULL\n", __func__); return; } if (!rcb->dvp->raid_map) { - DBG_WARN("%s: DEBUG: raid_map is null", __func__); + DBG_WARN("%s: DEBUG: raid_map is NULL\n", __func__); return; } @@ -522,12 +522,12 @@ pqisrc_build_aio_R1_write(pqisrc_softstate_t *softs, /*Subroutine used to show AIO RAID1 Write bypass IU fields */ void -pqisrc_show_aio_R1_write(pqisrc_softstate_t *softs, rcb_t *rcb, +pqisrc_show_aio_R1_write(pqisrc_softstate_t *softs, rcb_t const *rcb, pqi_aio_raid1_write_req_t *aio_req) { #ifdef DEBUG_AIO - DBG_INFO("AIO RAID1 Write IU Content, tag# 0x%08x", rcb->tag); + DBG_INFO("AIO RAID1 Write IU Content, tag# 0x%08x\n", rcb->tag); DBG_INFO("%15s: 0x%x\n", "iu_type", aio_req->header.iu_type); DBG_INFO("%15s: 0x%x\n", "comp_feat", aio_req->header.comp_feature); DBG_INFO("%15s: 0x%x\n", "length", aio_req->header.iu_length); @@ -674,7 +674,7 @@ pqisrc_build_aio_R5or6_write(pqisrc_softstate_t *softs, /*Subroutine used to show AIO RAID5/6 Write bypass IU fields */ void -pqisrc_show_aio_R5or6_write(pqisrc_softstate_t *softs, rcb_t *rcb, +pqisrc_show_aio_R5or6_write(pqisrc_softstate_t *softs, rcb_t const *rcb, pqi_aio_raid5or6_write_req_t *aio_req) { #ifdef DEBUG_AIO @@ -724,7 +724,7 @@ pqisrc_show_aio_R5or6_write(pqisrc_softstate_t *softs, rcb_t *rcb, /* Is the cdb a read command? */ boolean_t -pqisrc_cdb_is_read(uint8_t *cdb) +pqisrc_cdb_is_read(uint8_t const *cdb) { if (cdb[0] == SCMD_READ_6 || cdb[0] == SCMD_READ_10 || cdb[0] == SCMD_READ_12 || cdb[0] == SCMD_READ_16) @@ -734,7 +734,7 @@ pqisrc_cdb_is_read(uint8_t *cdb) /* Is the cdb a write command? */ boolean_t -pqisrc_cdb_is_write(uint8_t *cdb) +pqisrc_cdb_is_write(uint8_t const *cdb) { if (cdb == NULL) return false; @@ -1021,7 +1021,7 @@ pqisrc_build_send_io(pqisrc_softstate_t *softs,rcb_t *rcb) /* coverity[unchecked_value] */ num_elem_needed = pqisrc_num_elem_needed(softs, OS_GET_IO_SG_COUNT(rcb), devp, is_write, io_path); - DBG_IO("num_elem_needed :%u",num_elem_needed); + DBG_IO("num_elem_needed :%u\n",num_elem_needed); do { uint32_t num_elem_available; @@ -1047,7 +1047,7 @@ pqisrc_build_send_io(pqisrc_softstate_t *softs,rcb_t *rcb) } }while(TraverseCount < 2); - DBG_IO("num_elem_alloted :%u",num_elem_alloted); + DBG_IO("num_elem_alloted :%u\n",num_elem_alloted); if (num_elem_alloted == 0) { DBG_WARN("OUT: IB Queues were full\n"); return PQI_STATUS_QFULL; @@ -1131,7 +1131,7 @@ fill_lba_for_scsi_rw(pqisrc_softstate_t *softs, uint8_t *cdb, aio_req_locator_t { if (!l) { - DBG_INFO("No locator ptr: AIO ineligible"); + DBG_INFO("No locator ptr: AIO ineligible\n"); return PQI_STATUS_FAILURE; } @@ -1172,7 +1172,7 @@ fill_lba_for_scsi_rw(pqisrc_softstate_t *softs, uint8_t *cdb, aio_req_locator_t break; default: /* Process via normal I/O path. */ - DBG_AIO("NOT read or write 6/10/12/16: AIO ineligible"); + DBG_AIO("NOT read or write 6/10/12/16: AIO ineligible\n"); return PQI_STATUS_FAILURE; } return PQI_STATUS_SUCCESS; @@ -1180,9 +1180,9 @@ fill_lba_for_scsi_rw(pqisrc_softstate_t *softs, uint8_t *cdb, aio_req_locator_t /* determine whether writes to certain types of RAID are supported. */ -static boolean_t -pqisrc_is_supported_write(pqisrc_softstate_t *softs, - pqi_scsi_dev_t *device) +inline boolean_t +pqisrc_is_supported_write(pqisrc_softstate_t const *softs, + pqi_scsi_dev_t const *device) { DBG_FUNC("IN\n"); @@ -1381,7 +1381,7 @@ pqisrc_is_r5or6_single_group(pqisrc_softstate_t *softs, aio_req_locator_t *l) l->r5or6.row.blks_per_row; if (l->group.first != l->group.last) { - DBG_AIO("AIO ineligible"); + DBG_AIO("AIO ineligible\n"); ret = false; } @@ -1403,7 +1403,7 @@ pqisrc_is_r5or6_single_row(pqisrc_softstate_t *softs, aio_req_locator_t *l) l->r5or6.row.last = l->block.last / l->stripesz; if (l->r5or6.row.first != l->r5or6.row.last) { - DBG_AIO("AIO ineligible"); + DBG_AIO("AIO ineligible\n"); ret = false; } @@ -1431,7 +1431,7 @@ pqisrc_is_r5or6_single_column(pqisrc_softstate_t *softs, aio_req_locator_t *l) l->r5or6.col.last = l->r5or6.row.offset_last / l->strip_sz; if (l->r5or6.col.first != l->r5or6.col.last) { - DBG_AIO("AIO ineligible"); + DBG_AIO("AIO ineligible\n"); ret = false; } @@ -1492,9 +1492,9 @@ pqisrc_handle_blk_size_diffs(aio_req_locator_t *l) * handle based on dev type, Raid level, and encryption status. * TODO: make limits dynamic when this becomes possible. */ -static boolean_t +inline boolean_t pqisrc_aio_req_too_big(pqisrc_softstate_t *softs, - pqi_scsi_dev_t *device, rcb_t *rcb, + pqi_scsi_dev_t *device, rcb_t const *rcb, aio_req_locator_t *l, uint32_t disk_blk_cnt) { boolean_t ret = false; @@ -1537,7 +1537,7 @@ pqisrc_aio_req_too_big(pqisrc_softstate_t *softs, if (size > dev_max) { - DBG_AIO("AIO ineligible: size=%u, max=%u", size, dev_max); + DBG_AIO("AIO ineligible: size=%u, max=%u\n", size, dev_max); ret = true; } @@ -1547,7 +1547,7 @@ pqisrc_aio_req_too_big(pqisrc_softstate_t *softs, #ifdef DEBUG_RAID_MAP static inline void -pqisrc_aio_show_raid_map(pqisrc_softstate_t *softs, struct raid_map *m) +pqisrc_aio_show_raid_map(pqisrc_softstate_t const *softs, struct raid_map const *m) { int i; @@ -1583,7 +1583,7 @@ pqisrc_aio_show_raid_map(pqisrc_softstate_t *softs, struct raid_map *m) static inline void pqisrc_aio_show_locator_info(pqisrc_softstate_t *softs, - aio_req_locator_t *l, uint32_t disk_blk_cnt, rcb_t *rcb) + aio_req_locator_t *l, uint32_t disk_blk_cnt, rcb_t const *rcb) { #ifdef DEBUG_AIO_LOCATOR pqisrc_aio_show_raid_map(softs, l->raid_map); @@ -1636,7 +1636,7 @@ pqisrc_aio_show_locator_info(pqisrc_softstate_t *softs, } /* build the aio cdb */ -static void +inline void pqisrc_aio_build_cdb(aio_req_locator_t *l, uint32_t disk_blk_cnt, rcb_t *rcb, uint8_t *cdb) { @@ -1665,7 +1665,7 @@ pqisrc_aio_build_cdb(aio_req_locator_t *l, /* print any arbitrary buffer of length total_len */ void -pqisrc_print_buffer(pqisrc_softstate_t *softs, char *msg, void *user_buf, +pqisrc_print_buffer(pqisrc_softstate_t *softs, char const *msg, void *user_buf, uint32_t total_len, uint32_t flags) { #define LINE_BUF_LEN 60 @@ -1713,7 +1713,7 @@ pqisrc_print_buffer(pqisrc_softstate_t *softs, char *msg, void *user_buf, /* print CDB with column header */ void -pqisrc_show_cdb(pqisrc_softstate_t *softs, char *msg, rcb_t *rcb, uint8_t *cdb) +pqisrc_show_cdb(pqisrc_softstate_t *softs, char const *msg, rcb_t const *rcb, uint8_t *cdb) { /* Print the CDB contents */ pqisrc_print_buffer(softs, msg, cdb, rcb->cmdlen, PRINT_FLAG_HDR_COLUMN); @@ -1742,7 +1742,7 @@ pqisrc_show_rcb_details(pqisrc_softstate_t *softs, rcb_t *rcb, char *msg, void * DBG_INFO("tag=0x%x dir=%u host_timeout=%ums\n", rcb->tag, rcb->data_dir, (uint32_t)rcb->host_timeout_ms); - DBG_INFO("BTL: %d:%d:%d addr=0x%x\n", devp->bus, devp->target, + DBG_INFO("B%d:T%d:L%d addr=0x%x\n", devp->bus, devp->target, devp->lun, GET_LE32(devp->scsi3addr)); if (rcb->path == AIO_PATH) @@ -1786,7 +1786,7 @@ pqisrc_build_scsi_cmd_raidbypass(pqisrc_softstate_t *softs, return PQI_STATUS_FAILURE; } if (device->raid_map == NULL) { - DBG_INFO("tag=0x%x BTL: %d:%d:%d Raid map is NULL\n", + DBG_INFO("tag=0x%x B%d:T%d:L%d Raid map is NULL\n", rcb->tag, device->bus, device->target, device->lun); return PQI_STATUS_FAILURE; } @@ -1846,15 +1846,18 @@ pqisrc_build_scsi_cmd_raidbypass(pqisrc_softstate_t *softs, } if (l->map.idx >= RAID_MAP_MAX_ENTRIES) { - DBG_INFO("AIO ineligible: index exceeds max map entries"); + DBG_INFO("AIO ineligible: index exceeds max map entries\n"); return PQI_STATUS_FAILURE; } rcb->ioaccel_handle = l->raid_map->dev_data[l->map.idx].ioaccel_handle; + /* if (!pqisrc_calc_aio_block(l)) return PQI_STATUS_FAILURE; + */ + pqisrc_calc_aio_block(l); disk_blk_cnt = pqisrc_handle_blk_size_diffs(l); @@ -1889,8 +1892,8 @@ pqisrc_build_scsi_cmd_raidbypass(pqisrc_softstate_t *softs, */ static int -pqisrc_send_aio_tmf(pqisrc_softstate_t *softs, pqi_scsi_dev_t *devp, - rcb_t *rcb, rcb_t *rcb_to_manage, int tmf_type) +pqisrc_send_aio_tmf(pqisrc_softstate_t *softs, pqi_scsi_dev_t const *devp, + rcb_t *rcb, rcb_t const *rcb_to_manage, int tmf_type) { int rval = PQI_STATUS_SUCCESS; pqi_aio_tmf_req_t tmf_req; @@ -1966,8 +1969,8 @@ pqisrc_send_aio_tmf(pqisrc_softstate_t *softs, pqi_scsi_dev_t *devp, /* Function used to submit a Raid TMF to the adapter */ static int -pqisrc_send_raid_tmf(pqisrc_softstate_t *softs, pqi_scsi_dev_t *devp, - rcb_t *rcb, rcb_t *rcb_to_manage, int tmf_type) +pqisrc_send_raid_tmf(pqisrc_softstate_t *softs, pqi_scsi_dev_t const *devp, + rcb_t *rcb, rcb_t const *rcb_to_manage, int tmf_type) { int rval = PQI_STATUS_SUCCESS; pqi_raid_tmf_req_t tmf_req; @@ -1997,9 +2000,6 @@ pqisrc_send_raid_tmf(pqisrc_softstate_t *softs, pqi_scsi_dev_t *devp, tmf_type == SOP_TASK_MANAGEMENT_LUN_RESET) { /* OS_TMF_TIMEOUT_SEC - 1 to accomodate driver processing */ tmf_req.timeout_in_sec = OS_TMF_TIMEOUT_SEC - 1; - /* if OS tmf timeout is 0, set minimum value for timeout */ - if (!tmf_req.timeout_in_sec) - tmf_req.timeout_in_sec = 1; } op_ib_q = &softs->op_raid_ib_q[0]; @@ -2034,8 +2034,8 @@ pqisrc_send_raid_tmf(pqisrc_softstate_t *softs, pqi_scsi_dev_t *devp, return rval; } -void -dump_tmf_details(pqisrc_softstate_t *softs, rcb_t *rcb, char *msg) +static void +dump_tmf_details(rcb_t *rcb, char const *msg) { uint32_t qid = rcb->req_q ? rcb->req_q->q_id : -1; @@ -2045,7 +2045,7 @@ dump_tmf_details(pqisrc_softstate_t *softs, rcb_t *rcb, char *msg) } int -pqisrc_send_tmf(pqisrc_softstate_t *softs, pqi_scsi_dev_t *devp, +pqisrc_send_tmf(pqisrc_softstate_t *softs, pqi_scsi_dev_t const *devp, rcb_t *rcb, rcb_t *rcb_to_manage, int tmf_type) { int ret = PQI_STATUS_SUCCESS; @@ -2062,11 +2062,11 @@ pqisrc_send_tmf(pqisrc_softstate_t *softs, pqi_scsi_dev_t *devp, if (tmf_type == SOP_TASK_MANAGEMENT_FUNCTION_ABORT_TASK) { rcb_to_manage->host_wants_to_abort_this = true; - dump_tmf_details(softs, rcb_to_manage, "rcb_to_manage"); + dump_tmf_details(rcb_to_manage, "rcb_to_manage"); } - dump_tmf_details(softs, rcb, "rcb"); + dump_tmf_details(rcb, "rcb"); if(!devp->is_physical_device) { if (tmf_type == SOP_TASK_MANAGEMENT_FUNCTION_ABORT_TASK) { @@ -2167,7 +2167,7 @@ io_type_to_ascii(io_type_t io_type) /* return the io type based on cdb */ io_type_t -get_io_type_from_cdb(uint8_t *cdb) +get_io_type_from_cdb(uint8_t const *cdb) { if (cdb == NULL) return UNKNOWN_IO_TYPE; @@ -2223,9 +2223,9 @@ pqisrc_increment_io_counters(pqisrc_softstate_t *softs, rcb_t *rcb) #if 1 /* leave this enabled while we gain confidence for each io path */ if (ret_val == 1) { - char *raid_type = counter_type_to_raid_ascii(type_index); - char *path = io_path_to_ascii(rcb->path); - char *io_ascii = io_type_to_ascii(io_type); + char const *raid_type = counter_type_to_raid_ascii(type_index); + char const *path = io_path_to_ascii(rcb->path); + char const *io_ascii = io_type_to_ascii(io_type); DBG_INFO("Got first path/type hit. " "Path=%s RaidType=%s IoType=%s\n", @@ -2238,7 +2238,7 @@ pqisrc_increment_io_counters(pqisrc_softstate_t *softs, rcb_t *rcb) /* public routine to print a particular counter with header msg */ void -print_this_counter(pqisrc_softstate_t *softs, io_counters_t *pcounter, char *msg) +print_this_counter(pqisrc_softstate_t const *softs, io_counters_t const *pcounter, char const *msg) { io_counters_t counter; uint32_t percent_reads; @@ -2280,7 +2280,7 @@ print_this_counter(pqisrc_softstate_t *softs, io_counters_t *pcounter, char *msg boolean_t is_buffer_zero(void *buffer, uint32_t size) { - char *buf = buffer; + char const *buf = buffer; DWORD ii; if (buffer == NULL || size == 0) diff --git a/sys/dev/smartpqi/smartpqi_response.c b/sys/dev/smartpqi/smartpqi_response.c index 1b4f0d86095d..38695860e520 100644 --- a/sys/dev/smartpqi/smartpqi_response.c +++ b/sys/dev/smartpqi/smartpqi_response.c @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -121,7 +121,7 @@ pqisrc_extract_sense_data(sense_data_u_t *sense_data, uint8_t *key, uint8_t *asc if (sense_data->fixed_format.response_code == SCSI_SENSE_RESPONSE_70 || sense_data->fixed_format.response_code == SCSI_SENSE_RESPONSE_71) { - sense_data_fixed_t *fixed = &sense_data->fixed_format; + sense_data_fixed_t const *fixed = &sense_data->fixed_format; *key = fixed->sense_key; *asc = fixed->sense_code; @@ -130,7 +130,7 @@ pqisrc_extract_sense_data(sense_data_u_t *sense_data, uint8_t *key, uint8_t *asc else if (sense_data->descriptor_format.response_code == SCSI_SENSE_RESPONSE_72 || sense_data->descriptor_format.response_code == SCSI_SENSE_RESPONSE_73) { - sense_data_descriptor_t *desc = &sense_data->descriptor_format; + sense_data_descriptor_t const *desc = &sense_data->descriptor_format; *key = desc->sense_key; *asc = desc->sense_code; @@ -146,7 +146,7 @@ pqisrc_extract_sense_data(sense_data_u_t *sense_data, uint8_t *key, uint8_t *asc /* Suppress common errors unless verbose debug flag is on */ boolean_t -suppress_innocuous_error_prints(pqisrc_softstate_t *softs, rcb_t *rcb) +suppress_innocuous_error_prints(pqisrc_softstate_t const *softs, rcb_t *rcb) { uint8_t opcode = rcb->cdbp ? rcb->cdbp[0] : 0xFF; @@ -165,7 +165,7 @@ static void pqisrc_show_sense_data_simple(pqisrc_softstate_t *softs, rcb_t *rcb, sense_data_u_t *sense_data) { uint8_t opcode = rcb->cdbp ? rcb->cdbp[0] : 0xFF; - char *path = io_path_to_ascii(rcb->path); + char const *path = io_path_to_ascii(rcb->path); uint8_t key, asc, ascq; pqisrc_extract_sense_data(sense_data, &key, &asc, &ascq); @@ -393,7 +393,7 @@ pqisrc_process_task_management_response(pqisrc_softstate_t *softs, } static int -pqisrc_process_vendor_general_response(pqi_vendor_general_response_t *response) +pqisrc_process_vendor_general_response(pqi_vendor_general_response_t const *response) { int ret = PQI_STATUS_SUCCESS; @@ -448,7 +448,7 @@ pqisrc_process_response_queue(pqisrc_softstate_t *softs, int oq_id) rcb = &softs->rcb[tag]; /* Make sure we are processing a valid response. */ if ((rcb->tag != tag) || (rcb->req_pending == false)) { - DBG_ERR("No such request pending with tag : %x rcb->tag : %x", tag, rcb->tag); + DBG_ERR("No such request pending with tag : %x rcb->tag : %x\n", tag, rcb->tag); oq_ci = (oq_ci + 1) % ob_q->num_elem; break; } diff --git a/sys/dev/smartpqi/smartpqi_sis.c b/sys/dev/smartpqi/smartpqi_sis.c index 74dcb90e7d3d..82eb999ca4b8 100644 --- a/sys/dev/smartpqi/smartpqi_sis.c +++ b/sys/dev/smartpqi/smartpqi_sis.c @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -84,7 +84,7 @@ sis_disable_intx(pqisrc_softstate_t *softs) void sis_disable_interrupt(pqisrc_softstate_t *softs) { - DBG_FUNC("IN"); + DBG_FUNC("IN\n"); switch(softs->intr_type) { case INTR_TYPE_FIXED: @@ -100,7 +100,7 @@ sis_disable_interrupt(pqisrc_softstate_t *softs) break; } - DBG_FUNC("OUT"); + DBG_FUNC("OUT\n"); } diff --git a/sys/dev/smartpqi/smartpqi_structures.h b/sys/dev/smartpqi/smartpqi_structures.h index 4af824fa2592..0c9ad375823d 100644 --- a/sys/dev/smartpqi/smartpqi_structures.h +++ b/sys/dev/smartpqi/smartpqi_structures.h @@ -1,5 +1,5 @@ /*- - * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries. + * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -35,6 +35,7 @@ struct bmic_host_wellness_driver_version { uint8_t driver_version_tag[2]; uint16_t driver_version_length; char driver_version[32]; + uint8_t dont_write_tag[2]; uint8_t end_tag[2]; }OS_ATTRIBUTE_PACKED; @@ -901,6 +902,8 @@ typedef struct pqi_scsi_device { int *offload_to_mirror; /* Send next I/O accelerator RAID offload request to mirror drive. */ struct raid_map *raid_map; /* I/O accelerator RAID map */ + int *temp_offload_to_mirror; /* Temporary stored offload_to_mirror which will be freed later */ + struct raid_map *temp_raid_map; /* Temporary stored RAID map which will be freed later */ int reset_in_progress; int logical_unit_number; diff --git a/sys/dev/sound/dummy.c b/sys/dev/sound/dummy.c index 74ca1d0c924c..91a198e3d9f6 100644 --- a/sys/dev/sound/dummy.c +++ b/sys/dev/sound/dummy.c @@ -40,7 +40,10 @@ #endif #include <dev/sound/pcm/sound.h> +#include <dev/sound/midi/mpu401.h> + #include <mixer_if.h> +#include <mpufoi_if.h> #define DUMMY_NPCHAN 1 #define DUMMY_NRCHAN 1 @@ -66,6 +69,8 @@ struct dummy_softc { struct callout callout; struct mtx lock; bool stopped; + struct mpu401 *mpu; + mpu401_intr_t *mpu_intr; }; static bool @@ -93,6 +98,9 @@ dummy_chan_io(void *arg) struct dummy_chan *ch; int i = 0; + if (sc->mpu_intr) + (sc->mpu_intr)(sc->mpu); + if (sc->stopped) return; @@ -124,8 +132,7 @@ dummy_chan_free(kobj_t obj, void *data) uint8_t *buf; buf = ch->buf->buf; - if (buf != NULL) - free(buf, M_DEVBUF); + free(buf, M_DEVBUF); return (0); } @@ -294,6 +301,39 @@ static kobj_method_t dummy_mixer_methods[] = { MIXER_DECLARE(dummy_mixer); +static uint8_t +dummy_mpu_read(struct mpu401 *arg, void *sc, int reg) +{ + return (0); +} + +static void +dummy_mpu_write(struct mpu401 *arg, void *sc, int reg, unsigned char b) +{ +} + +static int +dummy_mpu_uninit(struct mpu401 *arg, void *cookie) +{ + struct dummy_softc *sc = cookie; + + mtx_lock(&sc->lock); + sc->mpu_intr = NULL; + sc->mpu = NULL; + mtx_unlock(&sc->lock); + + return (0); +} + +static kobj_method_t dummy_mpu_methods[] = { + KOBJMETHOD(mpufoi_read, dummy_mpu_read), + KOBJMETHOD(mpufoi_write, dummy_mpu_write), + KOBJMETHOD(mpufoi_uninit, dummy_mpu_uninit), + KOBJMETHOD_END +}; + +static DEFINE_CLASS(dummy_mpu, dummy_mpu_methods, 0); + static void dummy_identify(driver_t *driver, device_t parent) { @@ -354,6 +394,11 @@ dummy_attach(device_t dev) */ make_dev_alias(sc->info.dsp_dev, "dsp.dummy"); + sc->mpu = mpu401_init(&dummy_mpu_class, sc, dummy_chan_io, + &sc->mpu_intr); + if (sc->mpu == NULL) + return (ENXIO); + return (0); } @@ -368,6 +413,7 @@ dummy_detach(device_t dev) mtx_unlock(&sc->lock); callout_drain(&sc->callout); err = pcm_unregister(dev); + mpu401_uninit(sc->mpu); mtx_destroy(&sc->lock); return (err); diff --git a/sys/dev/sound/fdt/audio_soc.c b/sys/dev/sound/fdt/audio_soc.c index 84867cb3d781..33269dc302fa 100644 --- a/sys/dev/sound/fdt/audio_soc.c +++ b/sys/dev/sound/fdt/audio_soc.c @@ -250,8 +250,7 @@ audio_soc_chan_free(kobj_t obj, void *data) ausoc_chan = (struct audio_soc_channel *)data; buffer = ausoc_chan->buf->buf; - if (buffer) - free(buffer, M_DEVBUF); + free(buffer, M_DEVBUF); return (0); } @@ -508,8 +507,7 @@ audio_soc_detach(device_t dev) struct audio_soc_aux_node *aux; sc = device_get_softc(dev); - if (sc->name) - free(sc->name, M_DEVBUF); + free(sc->name, M_DEVBUF); while ((aux = SLIST_FIRST(&sc->aux_devs)) != NULL) { SLIST_REMOVE_HEAD(&sc->aux_devs, link); diff --git a/sys/dev/sound/midi/midi.c b/sys/dev/sound/midi/midi.c index cca7b93abf5f..c86f5fb41b14 100644 --- a/sys/dev/sound/midi/midi.c +++ b/sys/dev/sound/midi/midi.c @@ -4,6 +4,10 @@ * Copyright (c) 2003 Mathew Kanner * Copyright (c) 1998 The NetBSD Foundation, Inc. * All rights reserved. + * Copyright (c) 2025 The FreeBSD Foundation + * + * Portions of this software were developed by Christos Margiolis + * <christos@FreeBSD.org> under sponsorship from the FreeBSD Foundation. * * This code is derived from software contributed to The NetBSD Foundation * by Lennart Augustsson (augustss@netbsd.org). @@ -36,14 +40,11 @@ #include <sys/fcntl.h> #include <sys/kernel.h> #include <sys/kobj.h> +#include <sys/limits.h> #include <sys/lock.h> -#include <sys/module.h> #include <sys/mutex.h> #include <sys/poll.h> -#include <sys/queue.h> #include <sys/selinfo.h> -#include <sys/sx.h> -#include <sys/sysctl.h> #include <sys/uio.h> #ifdef HAVE_KERNEL_OPTION_HEADERS @@ -60,29 +61,21 @@ MALLOC_DEFINE(M_MIDI, "midi buffers", "Midi data allocation area"); #define MIDI_NAMELEN 16 struct snd_midi { KOBJ_FIELDS; - struct mtx lock; /* Protects all but queues */ + struct mtx lock; void *cookie; - int unit; /* Should only be used in midistat */ - int channel; /* Should only be used in midistat */ + int unit; + int channel; - int busy; int flags; /* File flags */ - char name[MIDI_NAMELEN]; - struct mtx qlock; /* Protects inq, outq and flags */ MIDIQ_HEAD(, char) inq, outq; int rchan, wchan; struct selinfo rsel, wsel; int hiwat; /* QLEN(outq)>High-water -> disable * writes from userland */ struct cdev *dev; - TAILQ_ENTRY(snd_midi) link; }; -TAILQ_HEAD(, snd_midi) midi_devs; - -struct sx mstat_lock; - static d_open_t midi_open; static d_close_t midi_close; static d_ioctl_t midi_ioctl; @@ -98,207 +91,98 @@ static struct cdevsw midi_cdevsw = { .d_write = midi_write, .d_ioctl = midi_ioctl, .d_poll = midi_poll, - .d_name = "rmidi", + .d_name = "midi", }; -static int midi_destroy(struct snd_midi *, int); -static int midi_load(void); -static int midi_unload(void); - -SYSCTL_NODE(_hw, OID_AUTO, midi, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, - "Midi driver"); - -int midi_debug; -/* XXX: should this be moved into debug.midi? */ -SYSCTL_INT(_hw_midi, OID_AUTO, debug, CTLFLAG_RW, &midi_debug, 0, ""); - -#define MIDI_DEBUG(l,a) if(midi_debug>=l) a - -void -midistat_lock(void) -{ - sx_xlock(&mstat_lock); -} - -void -midistat_unlock(void) -{ - sx_xunlock(&mstat_lock); -} - -void -midistat_lockassert(void) -{ - sx_assert(&mstat_lock, SA_XLOCKED); -} +struct unrhdr *dev_unr = NULL; +struct unrhdr *chn_unr = NULL; /* - * Register a new rmidi device. cls midi_if interface unit == 0 means - * auto-assign new unit number unit != 0 already assigned a unit number, eg. - * not the first channel provided by this device. channel, sub-unit - * cookie is passed back on MPU calls Typical device drivers will call with - * unit=0, channel=1..(number of channels) and cookie=soft_c and won't care - * what unit number is used. + * Register a new midi device. * - * It is an error to call midi_init with an already used unit/channel combo. + * "cookie" is passed to the MPU calls, and is normally set to the driver's + * softc. */ struct snd_midi * -midi_init(kobj_class_t cls, int unit, int channel, void *cookie) +midi_init(kobj_class_t cls, void *cookie) { struct snd_midi *m; - int i; int inqsize, outqsize; - uint8_t *buf; - - MIDI_DEBUG(1, printf("midiinit: unit %d/%d.\n", unit, channel)); - midistat_lock(); - /* - * Protect against call with existing unit/channel or auto-allocate a - * new unit number. - */ - i = -1; - TAILQ_FOREACH(m, &midi_devs, link) { - mtx_lock(&m->lock); - if (unit != 0) { - if (m->unit == unit && m->channel == channel) { - mtx_unlock(&m->lock); - goto err0; - } - } else { - /* - * Find a better unit number - */ - if (m->unit > i) - i = m->unit; - } - mtx_unlock(&m->lock); - } + uint8_t *ibuf = NULL; + uint8_t *obuf = NULL; - if (unit == 0) - unit = i + 1; - - MIDI_DEBUG(1, printf("midiinit #2: unit %d/%d.\n", unit, channel)); m = malloc(sizeof(*m), M_MIDI, M_WAITOK | M_ZERO); kobj_init((kobj_t)m, cls); inqsize = MPU_INQSIZE(m, cookie); outqsize = MPU_OUTQSIZE(m, cookie); - MIDI_DEBUG(1, printf("midiinit queues %d/%d.\n", inqsize, outqsize)); if (!inqsize && !outqsize) goto err1; mtx_init(&m->lock, "raw midi", NULL, 0); - mtx_init(&m->qlock, "q raw midi", NULL, 0); - - mtx_lock(&m->lock); - mtx_lock(&m->qlock); if (inqsize) - buf = malloc(sizeof(uint8_t) * inqsize, M_MIDI, M_NOWAIT); - else - buf = NULL; + ibuf = malloc(inqsize, M_MIDI, M_WAITOK); + if (outqsize) + obuf = malloc(outqsize, M_MIDI, M_WAITOK); - MIDIQ_INIT(m->inq, buf, inqsize); + mtx_lock(&m->lock); - if (outqsize) - buf = malloc(sizeof(uint8_t) * outqsize, M_MIDI, M_NOWAIT); - else - buf = NULL; m->hiwat = outqsize / 2; - MIDIQ_INIT(m->outq, buf, outqsize); - - if ((inqsize && !MIDIQ_BUF(m->inq)) || - (outqsize && !MIDIQ_BUF(m->outq))) - goto err2; + MIDIQ_INIT(m->inq, ibuf, inqsize); + MIDIQ_INIT(m->outq, obuf, outqsize); - m->busy = 0; m->flags = 0; - m->unit = unit; - m->channel = channel; + m->unit = alloc_unr(dev_unr); + m->channel = alloc_unr(chn_unr); m->cookie = cookie; if (MPU_INIT(m, cookie)) goto err2; mtx_unlock(&m->lock); - mtx_unlock(&m->qlock); - TAILQ_INSERT_TAIL(&midi_devs, m, link); - - midistat_unlock(); - - m->dev = make_dev(&midi_cdevsw, unit, UID_ROOT, GID_WHEEL, 0666, - "midi%d.%d", unit, channel); + m->dev = make_dev(&midi_cdevsw, m->unit, UID_ROOT, GID_WHEEL, 0666, + "midi%d.%d", m->unit, m->channel); m->dev->si_drv1 = m; return m; err2: - mtx_destroy(&m->qlock); mtx_destroy(&m->lock); - if (MIDIQ_BUF(m->inq)) - free(MIDIQ_BUF(m->inq), M_MIDI); - if (MIDIQ_BUF(m->outq)) - free(MIDIQ_BUF(m->outq), M_MIDI); + free(MIDIQ_BUF(m->inq), M_MIDI); + free(MIDIQ_BUF(m->outq), M_MIDI); err1: free(m, M_MIDI); -err0: - midistat_unlock(); - MIDI_DEBUG(1, printf("midi_init ended in error\n")); return NULL; } -/* - * midi_uninit does not call MIDI_UNINIT, as since this is the implementors - * entry point. midi_uninit if fact, does not send any methods. A call to - * midi_uninit is a defacto promise that you won't manipulate ch anymore - */ int midi_uninit(struct snd_midi *m) { - int err; - - err = EBUSY; - midistat_lock(); mtx_lock(&m->lock); - if (m->busy) { - if (!(m->rchan || m->wchan)) - goto err; - - if (m->rchan) { - wakeup(&m->rchan); - m->rchan = 0; - } - if (m->wchan) { - wakeup(&m->wchan); - m->wchan = 0; - } + if (m->rchan) { + wakeup(&m->rchan); + m->rchan = 0; + } + if (m->wchan) { + wakeup(&m->wchan); + m->wchan = 0; } - err = midi_destroy(m, 0); - if (!err) - goto exit; - -err: mtx_unlock(&m->lock); -exit: - midistat_unlock(); - return err; -} - -#ifdef notdef -static int midi_lengths[] = {2, 2, 2, 2, 1, 1, 2, 0}; - -#endif /* notdef */ -/* Number of bytes in a MIDI command */ -#define MIDI_LENGTH(d) (midi_lengths[((d) >> 4) & 7]) -#define MIDI_ACK 0xfe -#define MIDI_IS_STATUS(d) ((d) >= 0x80) -#define MIDI_IS_COMMON(d) ((d) >= 0xf0) + MPU_UNINIT(m, m->cookie); + destroy_dev(m->dev); + free_unr(dev_unr, m->unit); + free_unr(chn_unr, m->channel); + free(MIDIQ_BUF(m->inq), M_MIDI); + free(MIDIQ_BUF(m->outq), M_MIDI); + mtx_destroy(&m->lock); + free(m, M_MIDI); -#define MIDI_SYSEX_START 0xF0 -#define MIDI_SYSEX_END 0xF7 + return (0); +} /* * midi_in: process all data until the queue is full, then discards the rest. @@ -311,26 +195,21 @@ midi_in(struct snd_midi *m, uint8_t *buf, int size) { int used; - MIDI_DEBUG(5, printf("midi_in: m=%p size=%d\n", m, size)); + mtx_lock(&m->lock); -/* - * XXX: locking flub - */ - if (!(m->flags & M_RX)) - return size; + if (!(m->flags & M_RX)) { + /* We should return 0 but this may stop receiving/sending. */ + mtx_unlock(&m->lock); + return (size); + } used = 0; - mtx_lock(&m->qlock); - MIDI_DEBUG(6, printf("midi_in: len %jd avail %jd\n", - (intmax_t)MIDIQ_LEN(m->inq), - (intmax_t)MIDIQ_AVAIL(m->inq))); if (MIDIQ_AVAIL(m->inq) > size) { used = size; MIDIQ_ENQ(m->inq, buf, size); } else { - MIDI_DEBUG(4, printf("midi_in: Discarding data qu\n")); - mtx_unlock(&m->qlock); + mtx_unlock(&m->lock); return 0; } if (m->rchan) { @@ -338,7 +217,7 @@ midi_in(struct snd_midi *m, uint8_t *buf, int size) m->rchan = 0; } selwakeup(&m->rsel); - mtx_unlock(&m->qlock); + mtx_unlock(&m->lock); return used; } @@ -350,21 +229,19 @@ midi_out(struct snd_midi *m, uint8_t *buf, int size) { int used; -/* - * XXX: locking flub - */ - if (!(m->flags & M_TXEN)) - return 0; + mtx_lock(&m->lock); + + if (!(m->flags & M_TXEN)) { + mtx_unlock(&m->lock); + return (0); + } - MIDI_DEBUG(2, printf("midi_out: %p\n", m)); - mtx_lock(&m->qlock); used = MIN(size, MIDIQ_LEN(m->outq)); - MIDI_DEBUG(3, printf("midi_out: used %d\n", used)); if (used) MIDIQ_DEQ(m->outq, buf, used); if (MIDIQ_EMPTY(m->outq)) { m->flags &= ~M_TXEN; - MPU_CALLBACKP(m, m->cookie, m->flags); + MPU_CALLBACK(m, m->cookie, m->flags); } if (used && MIDIQ_AVAIL(m->outq) > m->hiwat) { if (m->wchan) { @@ -373,7 +250,7 @@ midi_out(struct snd_midi *m, uint8_t *buf, int size) } selwakeup(&m->wsel); } - mtx_unlock(&m->qlock); + mtx_unlock(&m->lock); return used; } @@ -383,13 +260,10 @@ midi_open(struct cdev *i_dev, int flags, int mode, struct thread *td) struct snd_midi *m = i_dev->si_drv1; int retval; - MIDI_DEBUG(1, printf("midiopen %p %s %s\n", td, - flags & FREAD ? "M_RX" : "", flags & FWRITE ? "M_TX" : "")); if (m == NULL) return ENXIO; mtx_lock(&m->lock); - mtx_lock(&m->qlock); retval = 0; @@ -409,7 +283,6 @@ midi_open(struct cdev *i_dev, int flags, int mode, struct thread *td) if (retval) goto err; } - m->busy++; m->rchan = 0; m->wchan = 0; @@ -428,9 +301,7 @@ midi_open(struct cdev *i_dev, int flags, int mode, struct thread *td) MPU_CALLBACK(m, m->cookie, m->flags); - MIDI_DEBUG(2, printf("midi_open: opened.\n")); - -err: mtx_unlock(&m->qlock); +err: mtx_unlock(&m->lock); return retval; } @@ -442,21 +313,16 @@ midi_close(struct cdev *i_dev, int flags, int mode, struct thread *td) int retval; int oldflags; - MIDI_DEBUG(1, printf("midi_close %p %s %s\n", td, - flags & FREAD ? "M_RX" : "", flags & FWRITE ? "M_TX" : "")); - if (m == NULL) return ENXIO; mtx_lock(&m->lock); - mtx_lock(&m->qlock); if ((flags & FREAD && !(m->flags & M_RX)) || (flags & FWRITE && !(m->flags & M_TX))) { retval = ENXIO; goto err; } - m->busy--; oldflags = m->flags; @@ -468,9 +334,6 @@ midi_close(struct cdev *i_dev, int flags, int mode, struct thread *td) if ((m->flags & (M_TXEN | M_RXEN)) != (oldflags & (M_RXEN | M_TXEN))) MPU_CALLBACK(m, m->cookie, m->flags); - MIDI_DEBUG(1, printf("midi_close: closed, busy = %d.\n", m->busy)); - - mtx_unlock(&m->qlock); mtx_unlock(&m->lock); retval = 0; err: return retval; @@ -489,16 +352,12 @@ midi_read(struct cdev *i_dev, struct uio *uio, int ioflag) int used; char buf[MIDI_RSIZE]; - MIDI_DEBUG(5, printf("midiread: count=%lu\n", - (unsigned long)uio->uio_resid)); - retval = EIO; if (m == NULL) goto err0; mtx_lock(&m->lock); - mtx_lock(&m->qlock); if (!(m->flags & M_RX)) goto err1; @@ -508,9 +367,8 @@ midi_read(struct cdev *i_dev, struct uio *uio, int ioflag) retval = EWOULDBLOCK; if (ioflag & O_NONBLOCK) goto err1; - mtx_unlock(&m->lock); m->rchan = 1; - retval = msleep(&m->rchan, &m->qlock, + retval = msleep(&m->rchan, &m->lock, PCATCH | PDROP, "midi RX", 0); /* * We slept, maybe things have changed since last @@ -520,16 +378,11 @@ midi_read(struct cdev *i_dev, struct uio *uio, int ioflag) goto err0; if (m != i_dev->si_drv1) retval = ENXIO; - /* if (retval && retval != ERESTART) */ if (retval) goto err0; mtx_lock(&m->lock); - mtx_lock(&m->qlock); m->rchan = 0; - if (!m->busy) - goto err1; } - MIDI_DEBUG(6, printf("midi_read start\n")); /* * At this point, it is certain that m->inq has data */ @@ -537,7 +390,6 @@ midi_read(struct cdev *i_dev, struct uio *uio, int ioflag) used = MIN(MIDIQ_LEN(m->inq), uio->uio_resid); used = MIN(used, MIDI_RSIZE); - MIDI_DEBUG(6, printf("midiread: uiomove cc=%d\n", used)); MIDIQ_DEQ(m->inq, buf, used); retval = uiomove(buf, used, uio); if (retval) @@ -548,9 +400,9 @@ midi_read(struct cdev *i_dev, struct uio *uio, int ioflag) * If we Made it here then transfer is good */ retval = 0; -err1: mtx_unlock(&m->qlock); +err1: mtx_unlock(&m->lock); -err0: MIDI_DEBUG(4, printf("midi_read: ret %d\n", retval)); +err0: return retval; } @@ -567,13 +419,11 @@ midi_write(struct cdev *i_dev, struct uio *uio, int ioflag) int used; char buf[MIDI_WSIZE]; - MIDI_DEBUG(4, printf("midi_write\n")); retval = 0; if (m == NULL) goto err0; mtx_lock(&m->lock); - mtx_lock(&m->qlock); if (!(m->flags & M_TX)) goto err1; @@ -583,10 +433,8 @@ midi_write(struct cdev *i_dev, struct uio *uio, int ioflag) retval = EWOULDBLOCK; if (ioflag & O_NONBLOCK) goto err1; - mtx_unlock(&m->lock); m->wchan = 1; - MIDI_DEBUG(3, printf("midi_write msleep\n")); - retval = msleep(&m->wchan, &m->qlock, + retval = msleep(&m->wchan, &m->lock, PCATCH | PDROP, "midi TX", 0); /* * We slept, maybe things have changed since last @@ -599,10 +447,7 @@ midi_write(struct cdev *i_dev, struct uio *uio, int ioflag) if (retval) goto err0; mtx_lock(&m->lock); - mtx_lock(&m->qlock); m->wchan = 0; - if (!m->busy) - goto err1; } /* @@ -611,11 +456,7 @@ midi_write(struct cdev *i_dev, struct uio *uio, int ioflag) used = MIN(MIDIQ_AVAIL(m->outq), uio->uio_resid); used = MIN(used, MIDI_WSIZE); - MIDI_DEBUG(5, printf("midiout: resid %zd len %jd avail %jd\n", - uio->uio_resid, (intmax_t)MIDIQ_LEN(m->outq), - (intmax_t)MIDIQ_AVAIL(m->outq))); - MIDI_DEBUG(5, printf("midi_write: uiomove cc=%d\n", used)); retval = uiomove(buf, used, uio); if (retval) goto err1; @@ -632,7 +473,7 @@ midi_write(struct cdev *i_dev, struct uio *uio, int ioflag) * If we Made it here then transfer is good */ retval = 0; -err1: mtx_unlock(&m->qlock); +err1: mtx_unlock(&m->lock); err0: return retval; } @@ -656,7 +497,6 @@ midi_poll(struct cdev *i_dev, int events, struct thread *td) revents = 0; mtx_lock(&m->lock); - mtx_lock(&m->qlock); if (events & (POLLIN | POLLRDNORM)) { if (!MIDIQ_EMPTY(m->inq)) @@ -672,97 +512,24 @@ midi_poll(struct cdev *i_dev, int events, struct thread *td) } mtx_unlock(&m->lock); - mtx_unlock(&m->qlock); return (revents); } -/* - * Single point of midi destructions. - */ -static int -midi_destroy(struct snd_midi *m, int midiuninit) -{ - midistat_lockassert(); - mtx_assert(&m->lock, MA_OWNED); - - MIDI_DEBUG(3, printf("midi_destroy\n")); - m->dev->si_drv1 = NULL; - mtx_unlock(&m->lock); /* XXX */ - destroy_dev(m->dev); - TAILQ_REMOVE(&midi_devs, m, link); - if (midiuninit) - MPU_UNINIT(m, m->cookie); - free(MIDIQ_BUF(m->inq), M_MIDI); - free(MIDIQ_BUF(m->outq), M_MIDI); - mtx_destroy(&m->qlock); - mtx_destroy(&m->lock); - free(m, M_MIDI); - return 0; -} - -static int -midi_load(void) +static void +midi_sysinit(void *data __unused) { - sx_init(&mstat_lock, "midistat lock"); - TAILQ_INIT(&midi_devs); - - return 0; + dev_unr = new_unrhdr(0, INT_MAX, NULL); + chn_unr = new_unrhdr(0, INT_MAX, NULL); } +SYSINIT(midi_sysinit, SI_SUB_DRIVERS, SI_ORDER_FIRST, midi_sysinit, NULL); -static int -midi_unload(void) +static void +midi_sysuninit(void *data __unused) { - struct snd_midi *m, *tmp; - int retval; - - MIDI_DEBUG(1, printf("midi_unload()\n")); - retval = EBUSY; - midistat_lock(); - TAILQ_FOREACH_SAFE(m, &midi_devs, link, tmp) { - mtx_lock(&m->lock); - if (m->busy) - retval = EBUSY; - else - retval = midi_destroy(m, 1); - if (retval) - goto exit; - } - midistat_unlock(); - - sx_destroy(&mstat_lock); - return 0; - -exit: - mtx_unlock(&m->lock); - midistat_unlock(); - if (retval) - MIDI_DEBUG(2, printf("midi_unload: failed\n")); - return retval; + if (dev_unr != NULL) + delete_unrhdr(dev_unr); + if (chn_unr != NULL) + delete_unrhdr(chn_unr); } - -static int -midi_modevent(module_t mod, int type, void *data) -{ - int retval; - - retval = 0; - - switch (type) { - case MOD_LOAD: - retval = midi_load(); - break; - - case MOD_UNLOAD: - retval = midi_unload(); - break; - - default: - break; - } - - return retval; -} - -DEV_MODULE(midi, midi_modevent, NULL); -MODULE_VERSION(midi, 1); +SYSUNINIT(midi_sysuninit, SI_SUB_DRIVERS, SI_ORDER_ANY, midi_sysuninit, NULL); diff --git a/sys/dev/sound/midi/midi.h b/sys/dev/sound/midi/midi.h index 286e84264ef3..c012a9d96da6 100644 --- a/sys/dev/sound/midi/midi.h +++ b/sys/dev/sound/midi/midi.h @@ -3,6 +3,10 @@ * * Copyright (c) 2003 Mathew Kanner * All rights reserved. + * Copyright (c) 2025 The FreeBSD Foundation + * + * Portions of this software were developed by Christos Margiolis + * <christos@FreeBSD.org> under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -41,12 +45,7 @@ MALLOC_DECLARE(M_MIDI); struct snd_midi; -void midistat_lock(void); -void midistat_unlock(void); -void midistat_lockassert(void); - -struct snd_midi * -midi_init(kobj_class_t _mpu_cls, int _unit, int _channel, void *cookie); +struct snd_midi *midi_init(kobj_class_t _mpu_cls, void *cookie); int midi_uninit(struct snd_midi *_m); int midi_out(struct snd_midi *_m, uint8_t *_buf, int _size); int midi_in(struct snd_midi *_m, uint8_t *_buf, int _size); diff --git a/sys/dev/sound/midi/midiq.h b/sys/dev/sound/midi/midiq.h index 17def1805363..80825974283e 100644 --- a/sys/dev/sound/midi/midiq.h +++ b/sys/dev/sound/midi/midiq.h @@ -52,38 +52,23 @@ struct name { \ #define MIDIQ_FULL(head) ((head).h == -1) #define MIDIQ_AVAIL(head) (MIDIQ_FULL(head) ? 0 : (head).s - MIDIQ_LENBASE(head)) #define MIDIQ_LEN(head) ((head).s - MIDIQ_AVAIL(head)) -#define MIDIQ_DEBUG 0 /* * No protection against overflow, underflow */ #define MIDIQ_ENQ(head, buf, size) do { \ - if(MIDIQ_DEBUG)\ - printf("#1 %p %p bytes copied %jd tran req s %d h %d t %d\n", \ - &(head).b[(head).h], (buf), \ - (intmax_t)(sizeof(*(head).b) * \ - MIN( (size), (head).s - (head).h) ), \ - (size), (head).h, (head).t); \ MIDIQ_MOVE(&(head).b[(head).h], (buf), sizeof(*(head).b) * MIN((size), (head).s - (head).h)); \ if( (head).s - (head).h < (size) ) { \ - if(MIDIQ_DEBUG) \ - printf("#2 %p %p bytes copied %jd\n", (head).b, (buf) + (head).s - (head).h, (intmax_t)sizeof(*(head).b) * ((size) - (head).s + (head).h) ); \ MIDIQ_MOVE((head).b, (buf) + (head).s - (head).h, sizeof(*(head).b) * ((size) - (head).s + (head).h) ); \ } \ (head).h+=(size); \ (head).h%=(head).s; \ if(MIDIQ_EMPTY(head)) (head).h=-1; \ - if(MIDIQ_DEBUG)\ - printf("#E h %d t %d\n", (head).h, (head).t); \ } while (0) #define MIDIQ_DEQ_I(head, buf, size, move, update) do { \ if(MIDIQ_FULL(head)) (head).h=(head).t; \ - if(MIDIQ_DEBUG)\ - printf("#1 %p %p bytes copied %jd tran req s %d h %d t %d\n", &(head).b[(head).t], (buf), (intmax_t)sizeof(*(head).b) * MIN((size), (head).s - (head).t), (size), (head).h, (head).t); \ if (move) MIDIQ_MOVE((buf), &(head).b[(head).t], sizeof(*(head).b) * MIN((size), (head).s - (head).t)); \ if( (head).s - (head).t < (size) ) { \ - if(MIDIQ_DEBUG) \ - printf("#2 %p %p bytes copied %jd\n", (head).b, (buf) + (head).s - (head).t, (intmax_t)sizeof(*(head).b) * ((size) - (head).s + (head).t) ); \ if (move) MIDIQ_MOVE((buf) + (head).s - (head).t, (head).b, sizeof(*(head).b) * ((size) - (head).s + (head).t) ); \ } \ if (update) { \ @@ -92,15 +77,11 @@ struct name { \ } else { \ if (MIDIQ_EMPTY(head)) (head).h=-1; \ } \ - if(MIDIQ_DEBUG)\ - printf("#E h %d t %d\n", (head).h, (head).t); \ } while (0) #define MIDIQ_SIZE(head) ((head).s) #define MIDIQ_CLEAR(head) ((head).h = (head).t = 0) #define MIDIQ_BUF(head) ((head).b) #define MIDIQ_DEQ(head, buf, size) MIDIQ_DEQ_I(head, buf, size, 1, 1) -#define MIDIQ_PEEK(head, buf, size) MIDIQ_DEQ_I(head, buf, size, 1, 0) -#define MIDIQ_POP(head, size) MIDIQ_DEQ_I(head, &head, size, 0, 1) #endif diff --git a/sys/dev/sound/midi/mpu401.c b/sys/dev/sound/midi/mpu401.c index 7d3edb6323ef..d3fb6b214d3e 100644 --- a/sys/dev/sound/midi/mpu401.c +++ b/sys/dev/sound/midi/mpu401.c @@ -76,7 +76,6 @@ static int mpu401_muninit(struct snd_midi *, void *); static int mpu401_minqsize(struct snd_midi *, void *); static int mpu401_moutqsize(struct snd_midi *, void *); static void mpu401_mcallback(struct snd_midi *, void *, int); -static void mpu401_mcallbackp(struct snd_midi *, void *, int); static kobj_method_t mpu401_methods[] = { KOBJMETHOD(mpu_init, mpu401_minit), @@ -84,7 +83,6 @@ static kobj_method_t mpu401_methods[] = { KOBJMETHOD(mpu_inqsize, mpu401_minqsize), KOBJMETHOD(mpu_outqsize, mpu401_moutqsize), KOBJMETHOD(mpu_callback, mpu401_mcallback), - KOBJMETHOD(mpu_callbackp, mpu401_mcallbackp), KOBJMETHOD_END }; @@ -144,10 +142,7 @@ mpu401_init(kobj_class_t cls, void *cookie, driver_intr_t softintr, struct mpu401 *m; *cb = NULL; - m = malloc(sizeof(*m), M_MIDI, M_NOWAIT | M_ZERO); - - if (!m) - return NULL; + m = malloc(sizeof(*m), M_MIDI, M_WAITOK | M_ZERO); kobj_init((kobj_t)m, cls); @@ -157,7 +152,7 @@ mpu401_init(kobj_class_t cls, void *cookie, driver_intr_t softintr, m->cookie = cookie; m->flags = 0; - m->mid = midi_init(&mpu401_class, 0, 0, m); + m->mid = midi_init(&mpu401_class, m); if (!m->mid) goto err; *cb = mpu401_intr; @@ -205,7 +200,7 @@ mpu401_minit(struct snd_midi *sm, void *arg) return 1; } -int +static int mpu401_muninit(struct snd_midi *sm, void *arg) { struct mpu401 *m = arg; @@ -213,13 +208,13 @@ mpu401_muninit(struct snd_midi *sm, void *arg) return MPUFOI_UNINIT(m, m->cookie); } -int +static int mpu401_minqsize(struct snd_midi *sm, void *arg) { return 128; } -int +static int mpu401_moutqsize(struct snd_midi *sm, void *arg) { return 128; @@ -235,9 +230,3 @@ mpu401_mcallback(struct snd_midi *sm, void *arg, int flags) } m->flags = flags; } - -static void -mpu401_mcallbackp(struct snd_midi *sm, void *arg, int flags) -{ - mpu401_mcallback(sm, arg, flags); -} diff --git a/sys/dev/sound/midi/mpu_if.m b/sys/dev/sound/midi/mpu_if.m index 835d887f703a..07371a0dd726 100644 --- a/sys/dev/sound/midi/mpu_if.m +++ b/sys/dev/sound/midi/mpu_if.m @@ -44,12 +44,6 @@ METHOD int init { void *_cookie; }; -METHOD void callbackp { - struct snd_midi *_kobj; - void *_cookie; - int _flags; -}; - METHOD void callback { struct snd_midi *_kobj; void *_cookie; diff --git a/sys/dev/sound/pci/atiixp.c b/sys/dev/sound/pci/atiixp.c index 12906ecc6253..0d2228ee16cd 100644 --- a/sys/dev/sound/pci/atiixp.c +++ b/sys/dev/sound/pci/atiixp.c @@ -804,7 +804,6 @@ atiixp_chan_trigger(kobj_t obj, void *data, int go) default: atiixp_unlock(sc); return (0); - break; } /* Update bus busy status */ diff --git a/sys/dev/sound/pci/cmi.c b/sys/dev/sound/pci/cmi.c index 99925d236c08..b5465fed5a8b 100644 --- a/sys/dev/sound/pci/cmi.c +++ b/sys/dev/sound/pci/cmi.c @@ -1009,8 +1009,7 @@ cmi_attach(device_t dev) if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, sc->regid, sc->reg); mtx_destroy(&sc->lock); - if (sc) - free(sc, M_DEVBUF); + free(sc, M_DEVBUF); return ENXIO; } diff --git a/sys/dev/sound/pci/envy24.c b/sys/dev/sound/pci/envy24.c index 3adb22254b72..50864a9067fd 100644 --- a/sys/dev/sound/pci/envy24.c +++ b/sys/dev/sound/pci/envy24.c @@ -1611,10 +1611,8 @@ envy24chan_free(kobj_t obj, void *data) device_printf(sc->dev, "envy24chan_free()\n"); #endif mtx_lock(&sc->lock); - if (ch->data != NULL) { - free(ch->data, M_ENVY24); - ch->data = NULL; - } + free(ch->data, M_ENVY24); + ch->data = NULL; mtx_unlock(&sc->lock); return 0; diff --git a/sys/dev/sound/pci/envy24ht.c b/sys/dev/sound/pci/envy24ht.c index 2396a340cd84..3aca8f92f708 100644 --- a/sys/dev/sound/pci/envy24ht.c +++ b/sys/dev/sound/pci/envy24ht.c @@ -1522,10 +1522,8 @@ envy24htchan_free(kobj_t obj, void *data) device_printf(sc->dev, "envy24htchan_free()\n"); #endif mtx_lock(&sc->lock); - if (ch->data != NULL) { - free(ch->data, M_ENVY24HT); - ch->data = NULL; - } + free(ch->data, M_ENVY24HT); + ch->data = NULL; mtx_unlock(&sc->lock); return 0; diff --git a/sys/dev/sound/pci/es137x.c b/sys/dev/sound/pci/es137x.c index 4e8c7911e95e..45b953efc3fc 100644 --- a/sys/dev/sound/pci/es137x.c +++ b/sys/dev/sound/pci/es137x.c @@ -1886,8 +1886,7 @@ bad: if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg); mtx_destroy(&es->lock); - if (es) - free(es, M_DEVBUF); + free(es, M_DEVBUF); return (ENXIO); } diff --git a/sys/dev/sound/pci/hda/hdac.c b/sys/dev/sound/pci/hda/hdac.c index d1de81e7ba29..d397e98b4be3 100644 --- a/sys/dev/sound/pci/hda/hdac.c +++ b/sys/dev/sound/pci/hda/hdac.c @@ -545,9 +545,12 @@ hdac_get_capabilities(struct hdac_softc *sc) HDAC_CORBSIZE_CORBSZCAP_2) sc->corb_size = 2; else { - device_printf(sc->dev, "%s: Invalid corb size (%x)\n", + device_printf(sc->dev, "%s: Hardware reports invalid corb size " + "(%x), defaulting to 256\n", __func__, corbsize); - return (ENXIO); + sc->corb_size = 256; + corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_256); + HDAC_WRITE_1(&sc->mem, HDAC_CORBSIZE, corbsize); } rirbsize = HDAC_READ_1(&sc->mem, HDAC_RIRBSIZE); @@ -561,9 +564,12 @@ hdac_get_capabilities(struct hdac_softc *sc) HDAC_RIRBSIZE_RIRBSZCAP_2) sc->rirb_size = 2; else { - device_printf(sc->dev, "%s: Invalid rirb size (%x)\n", + device_printf(sc->dev, "%s: Hardware reports invalid rirb size " + "(%x), defaulting to 256\n", __func__, rirbsize); - return (ENXIO); + sc->rirb_size = 256; + rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_256); + HDAC_WRITE_1(&sc->mem, HDAC_RIRBSIZE, rirbsize); } HDA_BOOTVERBOSE( diff --git a/sys/dev/sound/pci/hdsp-pcm.c b/sys/dev/sound/pci/hdsp-pcm.c index b64cec281388..5a8f2ab57d6c 100644 --- a/sys/dev/sound/pci/hdsp-pcm.c +++ b/sys/dev/sound/pci/hdsp-pcm.c @@ -677,14 +677,10 @@ hdspchan_free(kobj_t obj, void *data) #endif mtx_lock(&sc->lock); - if (ch->data != NULL) { - free(ch->data, M_HDSP); - ch->data = NULL; - } - if (ch->caps != NULL) { - free(ch->caps, M_HDSP); - ch->caps = NULL; - } + free(ch->data, M_HDSP); + ch->data = NULL; + free(ch->caps, M_HDSP); + ch->caps = NULL; mtx_unlock(&sc->lock); return (0); diff --git a/sys/dev/sound/pci/hdspe-pcm.c b/sys/dev/sound/pci/hdspe-pcm.c index d78820732639..678693960e5e 100644 --- a/sys/dev/sound/pci/hdspe-pcm.c +++ b/sys/dev/sound/pci/hdspe-pcm.c @@ -668,14 +668,10 @@ hdspechan_free(kobj_t obj, void *data) #endif mtx_lock(&sc->lock); - if (ch->data != NULL) { - free(ch->data, M_HDSPE); - ch->data = NULL; - } - if (ch->caps != NULL) { - free(ch->caps, M_HDSPE); - ch->caps = NULL; - } + free(ch->data, M_HDSPE); + ch->data = NULL; + free(ch->caps, M_HDSPE); + ch->caps = NULL; mtx_unlock(&sc->lock); return (0); diff --git a/sys/dev/sound/pci/via8233.c b/sys/dev/sound/pci/via8233.c index 6c59397756e0..90e966b864e3 100644 --- a/sys/dev/sound/pci/via8233.c +++ b/sys/dev/sound/pci/via8233.c @@ -1385,8 +1385,7 @@ bad: if (via->sgd_dmat) bus_dma_tag_destroy(via->sgd_dmat); mtx_destroy(&via->lock); - if (via) - free(via, M_DEVBUF); + free(via, M_DEVBUF); return (ENXIO); } diff --git a/sys/dev/sound/pci/via82c686.c b/sys/dev/sound/pci/via82c686.c index fe34583b1a25..144f0ff21fb6 100644 --- a/sys/dev/sound/pci/via82c686.c +++ b/sys/dev/sound/pci/via82c686.c @@ -601,7 +601,7 @@ bad: if (via->sgd_table) bus_dmamem_free(via->sgd_dmat, via->sgd_table, via->sgd_dmamap); if (via->sgd_dmat) bus_dma_tag_destroy(via->sgd_dmat); mtx_destroy(&via->lock); - if (via) free(via, M_DEVBUF); + free(via, M_DEVBUF); return ENXIO; } diff --git a/sys/dev/sound/pcm/buffer.c b/sys/dev/sound/pcm/buffer.c index eb2cbe667bf3..1db9e5661dc8 100644 --- a/sys/dev/sound/pcm/buffer.c +++ b/sys/dev/sound/pcm/buffer.c @@ -129,11 +129,8 @@ sndbuf_setup(struct snd_dbuf *b, void *buf, unsigned int size) void sndbuf_free(struct snd_dbuf *b) { - if (b->tmpbuf) - free(b->tmpbuf, M_DEVBUF); - - if (b->shadbuf) - free(b->shadbuf, M_DEVBUF); + free(b->tmpbuf, M_DEVBUF); + free(b->shadbuf, M_DEVBUF); if (b->buf) { if (b->flags & SNDBUF_F_MANAGED) { @@ -188,8 +185,7 @@ sndbuf_resize(struct snd_dbuf *b, unsigned int blkcnt, unsigned int blksz) printf("%s(): b=%p %p -> %p [%d -> %d : %d]\n", __func__, b, b->tmpbuf, tmpbuf, b->allocsize, allocsize, bufsize); - if (b->tmpbuf != NULL) - free(b->tmpbuf, M_DEVBUF); + free(b->tmpbuf, M_DEVBUF); b->tmpbuf = tmpbuf; b->allocsize = allocsize; } else if (snd_verbose > 3) @@ -225,14 +221,11 @@ sndbuf_remalloc(struct snd_dbuf *b, unsigned int blkcnt, unsigned int blksz) tmpbuf = malloc(allocsize, M_DEVBUF, M_WAITOK); shadbuf = malloc(allocsize, M_DEVBUF, M_WAITOK); CHN_LOCK(b->channel); - if (b->buf != NULL) - free(b->buf, M_DEVBUF); + free(b->buf, M_DEVBUF); b->buf = buf; - if (b->tmpbuf != NULL) - free(b->tmpbuf, M_DEVBUF); + free(b->tmpbuf, M_DEVBUF); b->tmpbuf = tmpbuf; - if (b->shadbuf != NULL) - free(b->shadbuf, M_DEVBUF); + free(b->shadbuf, M_DEVBUF); b->shadbuf = shadbuf; if (snd_verbose > 3) printf("%s(): b=%p %d -> %d [%d]\n", diff --git a/sys/dev/sound/pcm/channel.c b/sys/dev/sound/pcm/channel.c index 7c3f0e3dc9f0..011dc1427c2e 100644 --- a/sys/dev/sound/pcm/channel.c +++ b/sys/dev/sound/pcm/channel.c @@ -581,30 +581,14 @@ chn_read(struct pcm_channel *c, struct uio *buf) } void -chn_intr_locked(struct pcm_channel *c) +chn_intr(struct pcm_channel *c) { - - CHN_LOCKASSERT(c); - + CHN_LOCK(c); c->interrupts++; - if (c->direction == PCMDIR_PLAY) chn_wrintr(c); else chn_rdintr(c); -} - -void -chn_intr(struct pcm_channel *c) -{ - - if (CHN_LOCKOWNED(c)) { - chn_intr_locked(c); - return; - } - - CHN_LOCK(c); - chn_intr_locked(c); CHN_UNLOCK(c); } diff --git a/sys/dev/sound/pcm/channel.h b/sys/dev/sound/pcm/channel.h index 0b17c4a130a7..6415f5c88984 100644 --- a/sys/dev/sound/pcm/channel.h +++ b/sys/dev/sound/pcm/channel.h @@ -298,7 +298,6 @@ int chn_oss_setorder(struct pcm_channel *, unsigned long long *); int chn_oss_getmask(struct pcm_channel *, uint32_t *); void chn_resetbuf(struct pcm_channel *c); -void chn_intr_locked(struct pcm_channel *c); void chn_intr(struct pcm_channel *c); int chn_abort(struct pcm_channel *c); diff --git a/sys/dev/sound/pcm/dsp.c b/sys/dev/sound/pcm/dsp.c index 62db4592f206..c1e836691ac7 100644 --- a/sys/dev/sound/pcm/dsp.c +++ b/sys/dev/sound/pcm/dsp.c @@ -2582,8 +2582,7 @@ dsp_oss_syncgroup(struct pcm_channel *wrch, struct pcm_channel *rdch, oss_syncgr out: if (ret != 0) { - if (smrd != NULL) - free(smrd, M_DEVBUF); + free(smrd, M_DEVBUF); if ((sg != NULL) && SLIST_EMPTY(&sg->members)) { sg_ids[2] = sg->id; SLIST_REMOVE(&snd_pcm_syncgroups, sg, pcmchan_syncgroup, link); diff --git a/sys/dev/sound/pcm/feeder.c b/sys/dev/sound/pcm/feeder.c index fa4e4e16a133..2a7f54e5d30f 100644 --- a/sys/dev/sound/pcm/feeder.c +++ b/sys/dev/sound/pcm/feeder.c @@ -75,9 +75,8 @@ feeder_create(struct feeder_class *fc, struct pcm_feederdesc *desc) return NULL; f->class = fc; - f->desc = &(f->desc_static); if (desc != NULL) - *(f->desc) = *desc; + f->desc = *desc; err = FEEDER_INIT(f); if (err) { diff --git a/sys/dev/sound/pcm/feeder.h b/sys/dev/sound/pcm/feeder.h index f1c96d86fda0..1f106787ee83 100644 --- a/sys/dev/sound/pcm/feeder.h +++ b/sys/dev/sound/pcm/feeder.h @@ -4,6 +4,10 @@ * Copyright (c) 2005-2009 Ariff Abdullah <ariff@FreeBSD.org> * Copyright (c) 1999 Cameron Grant <cg@FreeBSD.org> * All rights reserved. + * Copyright (c) 2025 The FreeBSD Foundation + * + * Portions of this software were developed by Christos Margiolis + * <christos@FreeBSD.org> under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -50,12 +54,10 @@ struct feeder_class { struct pcm_feeder { KOBJ_FIELDS; - int align; - struct pcm_feederdesc *desc, desc_static; + struct pcm_feederdesc desc; void *data; struct feeder_class *class; struct pcm_feeder *source, *parent; - }; void feeder_register(void *p); diff --git a/sys/dev/sound/pcm/feeder_chain.c b/sys/dev/sound/pcm/feeder_chain.c index 32dd4ca14faf..4ec50d810253 100644 --- a/sys/dev/sound/pcm/feeder_chain.c +++ b/sys/dev/sound/pcm/feeder_chain.c @@ -473,8 +473,8 @@ feeder_build_root(struct pcm_channel *c, struct feeder_chain_desc *cdesc) c->feederflags |= 1 << FEEDER_ROOT; - c->feeder->desc->in = cdesc->current.afmt; - c->feeder->desc->out = cdesc->current.afmt; + c->feeder->desc.in = cdesc->current.afmt; + c->feeder->desc.out = cdesc->current.afmt; return (0); } diff --git a/sys/dev/sound/pcm/feeder_eq.c b/sys/dev/sound/pcm/feeder_eq.c index 3838328fb0bb..4cf9d4f6695f 100644 --- a/sys/dev/sound/pcm/feeder_eq.c +++ b/sys/dev/sound/pcm/feeder_eq.c @@ -275,16 +275,16 @@ feed_eq_init(struct pcm_feeder *f) { struct feed_eq_info *info; - if (f->desc->in != f->desc->out) + if (f->desc.in != f->desc.out) return (EINVAL); info = malloc(sizeof(*info), M_DEVBUF, M_NOWAIT | M_ZERO); if (info == NULL) return (ENOMEM); - info->fmt = AFMT_ENCODING(f->desc->in); - info->channels = AFMT_CHANNEL(f->desc->in); - info->align = info->channels * AFMT_BPS(f->desc->in); + info->fmt = AFMT_ENCODING(f->desc.in); + info->channels = AFMT_CHANNEL(f->desc.in); + info->align = info->channels * AFMT_BPS(f->desc.in); info->rate = FEEDEQ_RATE_MIN; info->treble.gain = FEEDEQ_L2GAIN(50); @@ -309,7 +309,7 @@ feed_eq_set(struct pcm_feeder *f, int what, int value) if (value < SND_CHN_MIN || value > SND_CHN_MAX) return (EINVAL); info->channels = (uint32_t)value; - info->align = info->channels * AFMT_BPS(f->desc->in); + info->align = info->channels * AFMT_BPS(f->desc.in); feed_eq_reset(info); break; case FEEDEQ_RATE: @@ -319,7 +319,6 @@ feed_eq_set(struct pcm_feeder *f, int what, int value) if (info->state == FEEDEQ_UNKNOWN) info->state = FEEDEQ_ENABLE; return (feed_eq_setup(info)); - break; case FEEDEQ_TREBLE: case FEEDEQ_BASS: if (value < 0 || value > 100) @@ -343,7 +342,6 @@ feed_eq_set(struct pcm_feeder *f, int what, int value) break; default: return (EINVAL); - break; } return (0); @@ -355,8 +353,7 @@ feed_eq_free(struct pcm_feeder *f) struct feed_eq_info *info; info = f->data; - if (info != NULL) - free(info, M_DEVBUF); + free(info, M_DEVBUF); f->data = NULL; diff --git a/sys/dev/sound/pcm/feeder_format.c b/sys/dev/sound/pcm/feeder_format.c index d2c4d7618ab4..0747b54cbbae 100644 --- a/sys/dev/sound/pcm/feeder_format.c +++ b/sys/dev/sound/pcm/feeder_format.c @@ -61,23 +61,23 @@ feed_format_init(struct pcm_feeder *f) { struct feed_format_info *info; - if (f->desc->in == f->desc->out || - AFMT_CHANNEL(f->desc->in) != AFMT_CHANNEL(f->desc->out)) + if (f->desc.in == f->desc.out || + AFMT_CHANNEL(f->desc.in) != AFMT_CHANNEL(f->desc.out)) return (EINVAL); info = malloc(sizeof(*info), M_DEVBUF, M_NOWAIT | M_ZERO); if (info == NULL) return (ENOMEM); - info->channels = AFMT_CHANNEL(f->desc->in); + info->channels = AFMT_CHANNEL(f->desc.in); - info->ibps = AFMT_BPS(f->desc->in); + info->ibps = AFMT_BPS(f->desc.in); info->ialign = info->ibps * info->channels; - info->rdfmt = AFMT_ENCODING(f->desc->in); + info->rdfmt = AFMT_ENCODING(f->desc.in); - info->obps = AFMT_BPS(f->desc->out); + info->obps = AFMT_BPS(f->desc.out); info->oalign = info->obps * info->channels; - info->wrfmt = AFMT_ENCODING(f->desc->out); + info->wrfmt = AFMT_ENCODING(f->desc.out); f->data = info; @@ -90,8 +90,7 @@ feed_format_free(struct pcm_feeder *f) struct feed_format_info *info; info = f->data; - if (info != NULL) - free(info, M_DEVBUF); + free(info, M_DEVBUF); f->data = NULL; @@ -115,7 +114,6 @@ feed_format_set(struct pcm_feeder *f, int what, int value) break; default: return (EINVAL); - break; } return (0); diff --git a/sys/dev/sound/pcm/feeder_matrix.c b/sys/dev/sound/pcm/feeder_matrix.c index 2c7a3e04690d..cba537c84efd 100644 --- a/sys/dev/sound/pcm/feeder_matrix.c +++ b/sys/dev/sound/pcm/feeder_matrix.c @@ -283,15 +283,15 @@ feed_matrix_init(struct pcm_feeder *f) struct pcmchan_matrix *m_in, *m_out; int ret; - if (AFMT_ENCODING(f->desc->in) != AFMT_ENCODING(f->desc->out)) + if (AFMT_ENCODING(f->desc.in) != AFMT_ENCODING(f->desc.out)) return (EINVAL); info = malloc(sizeof(*info), M_DEVBUF, M_NOWAIT | M_ZERO); if (info == NULL) return (ENOMEM); - info->in = f->desc->in; - info->out = f->desc->out; + info->in = f->desc.in; + info->out = f->desc.out; info->fmt = AFMT_ENCODING(info->in); info->bps = AFMT_BPS(info->in); info->ialign = AFMT_ALIGN(info->in); @@ -317,8 +317,7 @@ feed_matrix_free(struct pcm_feeder *f) struct feed_matrix_info *info; info = f->data; - if (info != NULL) - free(info, M_DEVBUF); + free(info, M_DEVBUF); f->data = NULL; @@ -413,8 +412,7 @@ feeder_matrix_setup(struct pcm_feeder *f, struct pcmchan_matrix *m_in, struct pcmchan_matrix *m_out) { - if (f == NULL || f->desc == NULL || f->class->type != FEEDER_MATRIX || - f->data == NULL) + if (f == NULL || f->class->type != FEEDER_MATRIX || f->data == NULL) return (EINVAL); return (feed_matrix_setup(f->data, m_in, m_out)); diff --git a/sys/dev/sound/pcm/feeder_mixer.c b/sys/dev/sound/pcm/feeder_mixer.c index 10de42ba727a..8c58e1c8ef33 100644 --- a/sys/dev/sound/pcm/feeder_mixer.c +++ b/sys/dev/sound/pcm/feeder_mixer.c @@ -78,16 +78,16 @@ feed_mixer_init(struct pcm_feeder *f) { struct feed_mixer_info *info; - if (f->desc->in != f->desc->out) + if (f->desc.in != f->desc.out) return (EINVAL); info = malloc(sizeof(*info), M_DEVBUF, M_NOWAIT | M_ZERO); if (info == NULL) return (ENOMEM); - info->format = AFMT_ENCODING(f->desc->in); - info->channels = AFMT_CHANNEL(f->desc->in); - info->bps = AFMT_BPS(f->desc->in); + info->format = AFMT_ENCODING(f->desc.in); + info->channels = AFMT_CHANNEL(f->desc.in); + info->bps = AFMT_BPS(f->desc.in); f->data = info; @@ -100,8 +100,7 @@ feed_mixer_free(struct pcm_feeder *f) struct feed_mixer_info *info; info = f->data; - if (info != NULL) - free(info, M_DEVBUF); + free(info, M_DEVBUF); f->data = NULL; @@ -321,7 +320,7 @@ feed_mixer_feed(struct pcm_feeder *f, struct pcm_channel *c, uint8_t *b, if (mcnt != 0) { memset(b + rcnt, sndbuf_zerodata( - f->desc->out), mcnt); + f->desc.out), mcnt); mcnt = 0; } switch (info->format) { diff --git a/sys/dev/sound/pcm/feeder_rate.c b/sys/dev/sound/pcm/feeder_rate.c index c2c232a97177..aee164840c4a 100644 --- a/sys/dev/sound/pcm/feeder_rate.c +++ b/sys/dev/sound/pcm/feeder_rate.c @@ -714,10 +714,8 @@ z_resampler_reset(struct z_info *info) info->z_size = 1; info->z_coeff = NULL; info->z_dcoeff = NULL; - if (info->z_pcoeff != NULL) { - free(info->z_pcoeff, M_DEVBUF); - info->z_pcoeff = NULL; - } + free(info->z_pcoeff, M_DEVBUF); + info->z_pcoeff = NULL; info->z_scale = Z_ONE; info->z_dx = Z_FULL_ONE; info->z_dy = Z_FULL_ONE; @@ -1029,10 +1027,8 @@ z_resampler_build_polyphase(struct z_info *info) int32_t alpha, c, i, z, idx; /* Let this be here first. */ - if (info->z_pcoeff != NULL) { - free(info->z_pcoeff, M_DEVBUF); - info->z_pcoeff = NULL; - } + free(info->z_pcoeff, M_DEVBUF); + info->z_pcoeff = NULL; if (feeder_rate_polyphase_max < 1) return (ENOTSUP); @@ -1109,7 +1105,7 @@ z_resampler_setup(struct pcm_feeder *f) if (!(Z_FACTOR_SAFE(info->z_gx) && Z_FACTOR_SAFE(info->z_gy))) return (EINVAL); - format = f->desc->in; + format = f->desc.in; adaptive = 0; z_scale = 0; @@ -1154,10 +1150,8 @@ z_resampler_setup(struct pcm_feeder *f) * adaptive mode. */ z_setup_adaptive_sinc: - if (info->z_pcoeff != NULL) { - free(info->z_pcoeff, M_DEVBUF); - info->z_pcoeff = NULL; - } + free(info->z_pcoeff, M_DEVBUF); + info->z_pcoeff = NULL; if (adaptive == 0) { info->z_dy = z_scale << Z_DRIFT_SHIFT; @@ -1333,8 +1327,7 @@ z_setup_adaptive_sinc: if (info->z_delay == NULL || info->z_alloc < i || i <= (info->z_alloc >> 1)) { - if (info->z_delay != NULL) - free(info->z_delay, M_DEVBUF); + free(info->z_delay, M_DEVBUF); info->z_delay = malloc(i, M_DEVBUF, M_NOWAIT | M_ZERO); if (info->z_delay == NULL) return (ENOMEM); @@ -1344,7 +1337,7 @@ z_setup_adaptive_sinc: /* * Zero out head of buffer to avoid pops and clicks. */ - memset(info->z_delay, sndbuf_zerodata(f->desc->out), + memset(info->z_delay, sndbuf_zerodata(f->desc.out), info->z_pos * align); #ifdef Z_DIAGNOSTIC @@ -1469,7 +1462,6 @@ z_resampler_set(struct pcm_feeder *f, int what, int32_t value) break; default: return (EINVAL); - break; } return (z_resampler_setup(f)); @@ -1485,18 +1477,12 @@ z_resampler_get(struct pcm_feeder *f, int what) switch (what) { case Z_RATE_SRC: return (info->rsrc); - break; case Z_RATE_DST: return (info->rdst); - break; case Z_RATE_QUALITY: return (info->quality); - break; case Z_RATE_CHANNELS: return (info->channels); - break; - default: - break; } return (-1); @@ -1508,7 +1494,7 @@ z_resampler_init(struct pcm_feeder *f) struct z_info *info; int ret; - if (f->desc->in != f->desc->out) + if (f->desc.in != f->desc.out) return (EINVAL); info = malloc(sizeof(*info), M_DEVBUF, M_NOWAIT | M_ZERO); @@ -1518,16 +1504,14 @@ z_resampler_init(struct pcm_feeder *f) info->rsrc = Z_RATE_DEFAULT; info->rdst = Z_RATE_DEFAULT; info->quality = feeder_rate_quality; - info->channels = AFMT_CHANNEL(f->desc->in); + info->channels = AFMT_CHANNEL(f->desc.in); f->data = info; ret = z_resampler_setup(f); if (ret != 0) { - if (info->z_pcoeff != NULL) - free(info->z_pcoeff, M_DEVBUF); - if (info->z_delay != NULL) - free(info->z_delay, M_DEVBUF); + free(info->z_pcoeff, M_DEVBUF); + free(info->z_delay, M_DEVBUF); free(info, M_DEVBUF); f->data = NULL; } @@ -1541,13 +1525,9 @@ z_resampler_free(struct pcm_feeder *f) struct z_info *info; info = f->data; - if (info != NULL) { - if (info->z_pcoeff != NULL) - free(info->z_pcoeff, M_DEVBUF); - if (info->z_delay != NULL) - free(info->z_delay, M_DEVBUF); - free(info, M_DEVBUF); - } + free(info->z_pcoeff, M_DEVBUF); + free(info->z_delay, M_DEVBUF); + free(info, M_DEVBUF); f->data = NULL; diff --git a/sys/dev/sound/pcm/feeder_volume.c b/sys/dev/sound/pcm/feeder_volume.c index 101cc7ba003b..fc4ed1bbb0a5 100644 --- a/sys/dev/sound/pcm/feeder_volume.c +++ b/sys/dev/sound/pcm/feeder_volume.c @@ -151,20 +151,20 @@ feed_volume_init(struct pcm_feeder *f) uint32_t i; int ret; - if (f->desc->in != f->desc->out || - AFMT_CHANNEL(f->desc->in) > SND_CHN_MAX) + if (f->desc.in != f->desc.out || + AFMT_CHANNEL(f->desc.in) > SND_CHN_MAX) return (EINVAL); for (i = 0; i < FEEDVOLUME_TAB_SIZE; i++) { - if (AFMT_ENCODING(f->desc->in) == + if (AFMT_ENCODING(f->desc.in) == feed_volume_info_tab[i].format) { info = malloc(sizeof(*info), M_DEVBUF, M_NOWAIT | M_ZERO); if (info == NULL) return (ENOMEM); - info->bps = AFMT_BPS(f->desc->in); - info->channels = AFMT_CHANNEL(f->desc->in); + info->bps = AFMT_BPS(f->desc.in); + info->channels = AFMT_CHANNEL(f->desc.in); info->apply = feed_volume_info_tab[i].apply; info->volume_class = SND_VOL_C_PCM; info->state = FEEDVOLUME_ENABLE; @@ -193,8 +193,7 @@ feed_volume_free(struct pcm_feeder *f) struct feed_volume_info *info; info = f->data; - if (info != NULL) - free(info, M_DEVBUF); + free(info, M_DEVBUF); f->data = NULL; @@ -232,7 +231,6 @@ feed_volume_set(struct pcm_feeder *f, int what, int value) break; default: return (EINVAL); - break; } return (ret); @@ -332,8 +330,8 @@ feeder_volume_apply_matrix(struct pcm_feeder *f, struct pcmchan_matrix *m) struct feed_volume_info *info; uint32_t i; - if (f == NULL || f->desc == NULL || f->class->type != FEEDER_VOLUME || - f->data == NULL || m == NULL || m->channels < SND_CHN_MIN || + if (f == NULL || f->class->type != FEEDER_VOLUME || f->data == NULL || + m == NULL || m->channels < SND_CHN_MIN || m->channels > SND_CHN_MAX) return (EINVAL); diff --git a/sys/dev/sound/pcm/mixer.c b/sys/dev/sound/pcm/mixer.c index f6eb669010b5..55b61ccb4911 100644 --- a/sys/dev/sound/pcm/mixer.c +++ b/sys/dev/sound/pcm/mixer.c @@ -1071,7 +1071,6 @@ mixer_ioctl_channel(struct cdev *dev, u_long cmd, caddr_t arg, int mode, break; default: return (-1); - break; } pid = td->td_proc->p_pid; diff --git a/sys/dev/sound/pcm/sound.c b/sys/dev/sound/pcm/sound.c index 29dac6b576ae..8ce369bfce5e 100644 --- a/sys/dev/sound/pcm/sound.c +++ b/sys/dev/sound/pcm/sound.c @@ -41,6 +41,7 @@ #include <dev/sound/pcm/ac97.h> #include <dev/sound/pcm/vchan.h> #include <dev/sound/pcm/dsp.h> +#include <dev/sound/sndstat.h> #include <sys/limits.h> #include <sys/sysctl.h> @@ -426,7 +427,7 @@ pcm_register(device_t dev, char *str) else if (snd_unit_auto == 1) snd_unit = pcm_best_unit(snd_unit); - sndstat_register(dev, d->status); + sndstat_register(dev, SNDST_TYPE_PCM, d->status); return (dsp_make_dev(dev)); } diff --git a/sys/dev/sound/pcm/sound.h b/sys/dev/sound/pcm/sound.h index 3ba6eb3692ee..de9af6bd5324 100644 --- a/sys/dev/sound/pcm/sound.h +++ b/sys/dev/sound/pcm/sound.h @@ -66,7 +66,6 @@ #include <sys/poll.h> #include <sys/sbuf.h> #include <sys/soundcard.h> -#include <sys/sndstat.h> #include <sys/sysctl.h> #include <sys/kobj.h> #include <vm/vm.h> @@ -167,9 +166,6 @@ void *pcm_getdevinfo(device_t dev); int snd_setup_intr(device_t dev, struct resource *res, int flags, driver_intr_t hand, void *param, void **cookiep); -int sndstat_register(device_t dev, char *str); -int sndstat_unregister(device_t dev); - /* These are the function codes assigned to the children of sound cards. */ enum { SCF_PCM, diff --git a/sys/dev/sound/pcm/sndstat.c b/sys/dev/sound/sndstat.c index a7c53ac85eb8..b0ac7f7d0824 100644 --- a/sys/dev/sound/pcm/sndstat.c +++ b/sys/dev/sound/sndstat.c @@ -40,19 +40,18 @@ #endif #include <sys/param.h> +#include <sys/dnv.h> #include <sys/lock.h> #include <sys/malloc.h> #include <sys/nv.h> -#include <sys/dnv.h> +#include <sys/sndstat.h> #include <sys/sx.h> #include <dev/sound/pcm/sound.h> +#include <dev/sound/sndstat.h> #include "feeder_if.h" -#define SS_TYPE_PCM 1 -#define SS_TYPE_MIDI 2 - static d_open_t sndstat_open; static void sndstat_close(void *); static d_read_t sndstat_read; @@ -73,7 +72,8 @@ struct sndstat_entry { TAILQ_ENTRY(sndstat_entry) link; device_t dev; char *str; - int type, unit; + enum sndstat_type type; + int unit; }; struct sndstat_userdev { @@ -534,24 +534,24 @@ sndstat_build_sound4_nvlist(struct snddev_info *d, nvlist_t **dip) while (f != NULL) { sbuf_printf(&sb, "%s", f->class->name); if (f->class->type == FEEDER_FORMAT) { - snd_afmt2str(f->desc->in, buf, sizeof(buf)); + snd_afmt2str(f->desc.in, buf, sizeof(buf)); sbuf_printf(&sb, "(%s -> ", buf); - snd_afmt2str(f->desc->out, buf, sizeof(buf)); + snd_afmt2str(f->desc.out, buf, sizeof(buf)); sbuf_printf(&sb, "%s)", buf); } else if (f->class->type == FEEDER_MATRIX) { sbuf_printf(&sb, "(%d.%dch -> %d.%dch)", - AFMT_CHANNEL(f->desc->in) - - AFMT_EXTCHANNEL(f->desc->in), - AFMT_EXTCHANNEL(f->desc->in), - AFMT_CHANNEL(f->desc->out) - - AFMT_EXTCHANNEL(f->desc->out), - AFMT_EXTCHANNEL(f->desc->out)); + AFMT_CHANNEL(f->desc.in) - + AFMT_EXTCHANNEL(f->desc.in), + AFMT_EXTCHANNEL(f->desc.in), + AFMT_CHANNEL(f->desc.out) - + AFMT_EXTCHANNEL(f->desc.out), + AFMT_EXTCHANNEL(f->desc.out)); } else if (f->class->type == FEEDER_RATE) { sbuf_printf(&sb, "(%d -> %d)", FEEDER_GET(f, FEEDRATE_SRC), FEEDER_GET(f, FEEDRATE_DST)); } else { - snd_afmt2str(f->desc->out, buf, sizeof(buf)); + snd_afmt2str(f->desc.out, buf, sizeof(buf)); sbuf_printf(&sb, "(%s)", buf); } sbuf_printf(&sb, " -> "); @@ -686,22 +686,26 @@ sndstat_create_devs_nvlist(nvlist_t **nvlp) return (ENOMEM); TAILQ_FOREACH(ent, &sndstat_devlist, link) { - struct snddev_info *d; - nvlist_t *di; + if (ent->type == SNDST_TYPE_PCM) { + struct snddev_info *d; + nvlist_t *di; - d = device_get_softc(ent->dev); - if (!PCM_REGISTERED(d)) - continue; + d = device_get_softc(ent->dev); + if (!PCM_REGISTERED(d)) + continue; - err = sndstat_build_sound4_nvlist(d, &di); - if (err) - goto done; + err = sndstat_build_sound4_nvlist(d, &di); + if (err) + goto done; - nvlist_append_nvlist_array(nvl, SNDST_DSPS, di); - nvlist_destroy(di); - err = nvlist_error(nvl); - if (err) - goto done; + nvlist_append_nvlist_array(nvl, SNDST_DSPS, di); + nvlist_destroy(di); + err = nvlist_error(nvl); + if (err) + goto done; + } else if (ent->type == SNDST_TYPE_MIDI) { + /* TODO */ + } } TAILQ_FOREACH(pf, &sndstat_filelist, entry) { @@ -1152,22 +1156,14 @@ fail: /************************************************************************/ -int -sndstat_register(device_t dev, char *str) +void +sndstat_register(device_t dev, enum sndstat_type type, char *str) { struct sndstat_entry *ent; struct sndstat_entry *pre; - const char *devtype; - int type, unit; + int unit; unit = device_get_unit(dev); - devtype = device_get_name(dev); - if (!strcmp(devtype, "pcm")) - type = SS_TYPE_PCM; - else if (!strcmp(devtype, "midi")) - type = SS_TYPE_MIDI; - else - return (EINVAL); ent = malloc(sizeof *ent, M_DEVBUF, M_WAITOK | M_ZERO); ent->dev = dev; @@ -1193,8 +1189,6 @@ sndstat_register(device_t dev, char *str) TAILQ_INSERT_BEFORE(pre, ent, link); } SNDSTAT_UNLOCK(); - - return (0); } int @@ -1330,25 +1324,25 @@ sndstat_prepare_pcm(struct sbuf *s, device_t dev, int verbose) sbuf_printf(s, "%s", f->class->name); if (f->class->type == FEEDER_FORMAT) { sbuf_printf(s, "(0x%08x -> 0x%08x)", - f->desc->in, f->desc->out); + f->desc.in, f->desc.out); } else if (f->class->type == FEEDER_MATRIX) { sbuf_printf(s, "(%d.%d -> %d.%d)", - AFMT_CHANNEL(f->desc->in) - - AFMT_EXTCHANNEL(f->desc->in), - AFMT_EXTCHANNEL(f->desc->in), - AFMT_CHANNEL(f->desc->out) - - AFMT_EXTCHANNEL(f->desc->out), - AFMT_EXTCHANNEL(f->desc->out)); + AFMT_CHANNEL(f->desc.in) - + AFMT_EXTCHANNEL(f->desc.in), + AFMT_EXTCHANNEL(f->desc.in), + AFMT_CHANNEL(f->desc.out) - + AFMT_EXTCHANNEL(f->desc.out), + AFMT_EXTCHANNEL(f->desc.out)); } else if (f->class->type == FEEDER_RATE) { sbuf_printf(s, "(0x%08x q:%d %d -> %d)", - f->desc->out, + f->desc.out, FEEDER_GET(f, FEEDRATE_QUALITY), FEEDER_GET(f, FEEDRATE_SRC), FEEDER_GET(f, FEEDRATE_DST)); } else { sbuf_printf(s, "(0x%08x)", - f->desc->out); + f->desc.out); } sbuf_printf(s, " -> "); f = f->parent; @@ -1386,20 +1380,24 @@ sndstat_prepare(struct sndstat_file *pf_self) /* generate list of installed devices */ k = 0; TAILQ_FOREACH(ent, &sndstat_devlist, link) { - d = device_get_softc(ent->dev); - if (!PCM_REGISTERED(d)) - continue; - if (!k++) - sbuf_printf(s, "Installed devices:\n"); - sbuf_printf(s, "%s:", device_get_nameunit(ent->dev)); - sbuf_printf(s, " <%s>", device_get_desc(ent->dev)); - if (snd_verbose > 0) - sbuf_printf(s, " %s", ent->str); - /* XXX Need Giant magic entry ??? */ - PCM_ACQUIRE_QUICK(d); - sndstat_prepare_pcm(s, ent->dev, snd_verbose); - PCM_RELEASE_QUICK(d); - sbuf_printf(s, "\n"); + if (ent->type == SNDST_TYPE_PCM) { + d = device_get_softc(ent->dev); + if (!PCM_REGISTERED(d)) + continue; + if (!k++) + sbuf_printf(s, "Installed devices:\n"); + sbuf_printf(s, "%s:", device_get_nameunit(ent->dev)); + sbuf_printf(s, " <%s>", device_get_desc(ent->dev)); + if (snd_verbose > 0) + sbuf_printf(s, " %s", ent->str); + /* XXX Need Giant magic entry ??? */ + PCM_ACQUIRE_QUICK(d); + sndstat_prepare_pcm(s, ent->dev, snd_verbose); + PCM_RELEASE_QUICK(d); + sbuf_printf(s, "\n"); + } else if (ent->type == SNDST_TYPE_MIDI) { + /* TODO */ + } } if (k == 0) sbuf_printf(s, "No devices installed.\n"); diff --git a/lib/libc/powerpcspe/gen/fabs.S b/sys/dev/sound/sndstat.h index df9196c3273d..3ac0cf48f5a8 100644 --- a/lib/libc/powerpcspe/gen/fabs.S +++ b/sys/dev/sound/sndstat.h @@ -1,6 +1,10 @@ -/* - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. +/*- + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025 The FreeBSD Foundation + * + * Portions of this software were developed by Christos Margiolis + * <christos@FreeBSD.org> under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -24,14 +28,15 @@ * SUCH DAMAGE. */ -#include <machine/asm.h> -/* - * double fabs(double) - */ -ENTRY(fabs) - /* arg is split in two words, clear sign bit only, in r3. */ - clrlwi %r3,%r3,1 - blr -END(fabs) +#ifndef _SNDSTAT_H_ +#define _SNDSTAT_H_ + +enum sndstat_type { + SNDST_TYPE_PCM, + SNDST_TYPE_MIDI, +}; + +void sndstat_register(device_t dev, enum sndstat_type type, char *str); +int sndstat_unregister(device_t dev); - .section .note.GNU-stack,"",%progbits +#endif /* _SNDSTAT_H_ */ diff --git a/sys/dev/sound/usb/uaudio.c b/sys/dev/sound/usb/uaudio.c index 65c1327ee0f2..0987ca12d933 100644 --- a/sys/dev/sound/usb/uaudio.c +++ b/sys/dev/sound/usb/uaudio.c @@ -232,7 +232,7 @@ struct uaudio_chan { struct pcmchan_caps pcm_cap; /* capabilities */ struct uaudio_chan_alt usb_alt[CHAN_MAX_ALT]; struct snd_dbuf *pcm_buf; - struct mtx *pcm_mtx; /* lock protecting this structure */ + struct mtx lock; /* lock protecting this structure */ struct uaudio_softc *priv_sc; struct pcm_channel *pcm_ch; struct usb_xfer *xfer[UAUDIO_NCHANBUFS + 1]; @@ -1390,9 +1390,9 @@ uaudio_configure_msg_sub(struct uaudio_softc *sc, /* Unsetup prior USB transfers, if any. */ usbd_transfer_unsetup(chan->xfer, UAUDIO_NCHANBUFS + 1); - mtx_lock(chan->pcm_mtx); + mtx_lock(&chan->lock); chan->cur_alt = CHAN_MAX_ALT; - mtx_unlock(chan->pcm_mtx); + mtx_unlock(&chan->lock); /* * The first alternate setting is typically used for @@ -1415,9 +1415,9 @@ uaudio_configure_msg_sub(struct uaudio_softc *sc, return; } - mtx_lock(chan->pcm_mtx); + mtx_lock(&chan->lock); next_alt = chan->set_alt; - mtx_unlock(chan->pcm_mtx); + mtx_unlock(&chan->lock); chan_alt = chan->usb_alt + next_alt; @@ -1474,7 +1474,7 @@ uaudio_configure_msg_sub(struct uaudio_softc *sc, } } if (usbd_transfer_setup(sc->sc_udev, &chan_alt->iface_index, chan->xfer, - chan_alt->usb_cfg, UAUDIO_NCHANBUFS + 1, chan, chan->pcm_mtx)) { + chan_alt->usb_cfg, UAUDIO_NCHANBUFS + 1, chan, &chan->lock)) { DPRINTF("could not allocate USB transfers!\n"); goto error; } @@ -1527,18 +1527,18 @@ uaudio_configure_msg_sub(struct uaudio_softc *sc, #error "Please update code below!" #endif - mtx_lock(chan->pcm_mtx); + mtx_lock(&chan->lock); chan->cur_alt = next_alt; usbd_transfer_start(chan->xfer[0]); usbd_transfer_start(chan->xfer[1]); - mtx_unlock(chan->pcm_mtx); + mtx_unlock(&chan->lock); return; error: usbd_transfer_unsetup(chan->xfer, UAUDIO_NCHANBUFS + 1); - mtx_lock(chan->pcm_mtx); + mtx_lock(&chan->lock); chan->cur_alt = CHAN_MAX_ALT; - mtx_unlock(chan->pcm_mtx); + mtx_unlock(&chan->lock); } static void @@ -2664,7 +2664,7 @@ uaudio_chan_init(struct uaudio_chan *ch, struct snd_dbuf *b, /* store mutex and PCM channel */ ch->pcm_ch = c; - ch->pcm_mtx = &c->lock; + mtx_init(&ch->lock, "uaudio_chan lock", NULL, MTX_DEF); /* compute worst case buffer */ @@ -2690,10 +2690,6 @@ uaudio_chan_init(struct uaudio_chan *ch, struct snd_dbuf *b, ch->pcm_buf = b; ch->max_buf = buf_size; - if (ch->pcm_mtx == NULL) { - DPRINTF("ERROR: PCM channels does not have a mutex!\n"); - goto error; - } return (ch); error: @@ -2704,11 +2700,10 @@ error: int uaudio_chan_free(struct uaudio_chan *ch) { - if (ch->buf != NULL) { - free(ch->buf, M_DEVBUF); - ch->buf = NULL; - } + free(ch->buf, M_DEVBUF); + ch->buf = NULL; usbd_transfer_unsetup(ch->xfer, UAUDIO_NCHANBUFS + 1); + mtx_destroy(&ch->lock); ch->num_alt = 0; diff --git a/sys/dev/ufshci/ufshci_ctrlr.c b/sys/dev/ufshci/ufshci_ctrlr.c index ce0da4cab907..f011d03189e0 100644 --- a/sys/dev/ufshci/ufshci_ctrlr.c +++ b/sys/dev/ufshci/ufshci_ctrlr.c @@ -17,12 +17,8 @@ ufshci_ctrlr_fail(struct ufshci_controller *ctrlr) { ctrlr->is_failed = true; - ufshci_req_queue_fail(ctrlr, - ctrlr->task_mgmt_req_queue.qops.get_hw_queue( - &ctrlr->task_mgmt_req_queue)); - ufshci_req_queue_fail(ctrlr, - ctrlr->transfer_req_queue.qops.get_hw_queue( - &ctrlr->transfer_req_queue)); + ufshci_req_queue_fail(ctrlr, &ctrlr->task_mgmt_req_queue); + ufshci_req_queue_fail(ctrlr, &ctrlr->transfer_req_queue); } static void @@ -430,24 +426,15 @@ ufshci_ctrlr_submit_task_mgmt_request(struct ufshci_controller *ctrlr, struct ufshci_request *req) { return ( - ufshci_req_queue_submit_request(&ctrlr->task_mgmt_req_queue, req, - /*is_admin*/ false)); + ufshci_req_queue_submit_request(&ctrlr->task_mgmt_req_queue, req)); } int -ufshci_ctrlr_submit_admin_request(struct ufshci_controller *ctrlr, +ufshci_ctrlr_submit_transfer_request(struct ufshci_controller *ctrlr, struct ufshci_request *req) { - return (ufshci_req_queue_submit_request(&ctrlr->transfer_req_queue, req, - /*is_admin*/ true)); -} - -int -ufshci_ctrlr_submit_io_request(struct ufshci_controller *ctrlr, - struct ufshci_request *req) -{ - return (ufshci_req_queue_submit_request(&ctrlr->transfer_req_queue, req, - /*is_admin*/ false)); + return ( + ufshci_req_queue_submit_request(&ctrlr->transfer_req_queue, req)); } int diff --git a/sys/dev/ufshci/ufshci_ctrlr_cmd.c b/sys/dev/ufshci/ufshci_ctrlr_cmd.c index 253f31a93c2e..cac01894c062 100644 --- a/sys/dev/ufshci/ufshci_ctrlr_cmd.c +++ b/sys/dev/ufshci/ufshci_ctrlr_cmd.c @@ -44,12 +44,13 @@ ufshci_ctrlr_cmd_send_nop(struct ufshci_controller *ctrlr, ufshci_cb_fn_t cb_fn, req->request_size = sizeof(struct ufshci_nop_out_upiu); req->response_size = sizeof(struct ufshci_nop_in_upiu); + req->is_admin = true; upiu = (struct ufshci_nop_out_upiu *)&req->request_upiu; memset(upiu, 0, req->request_size); upiu->header.trans_type = UFSHCI_UPIU_TRANSACTION_CODE_NOP_OUT; - ufshci_ctrlr_submit_admin_request(ctrlr, req); + ufshci_ctrlr_submit_transfer_request(ctrlr, req); } void @@ -63,6 +64,7 @@ ufshci_ctrlr_cmd_send_query_request(struct ufshci_controller *ctrlr, req->request_size = sizeof(struct ufshci_query_request_upiu); req->response_size = sizeof(struct ufshci_query_response_upiu); + req->is_admin = true; upiu = (struct ufshci_query_request_upiu *)&req->request_upiu; memset(upiu, 0, req->request_size); @@ -75,5 +77,5 @@ ufshci_ctrlr_cmd_send_query_request(struct ufshci_controller *ctrlr, upiu->value_64 = param.value; upiu->length = param.desc_size; - ufshci_ctrlr_submit_admin_request(ctrlr, req); + ufshci_ctrlr_submit_transfer_request(ctrlr, req); } diff --git a/sys/dev/ufshci/ufshci_dev.c b/sys/dev/ufshci/ufshci_dev.c index 38c6de9731a4..406130c537a7 100644 --- a/sys/dev/ufshci/ufshci_dev.c +++ b/sys/dev/ufshci/ufshci_dev.c @@ -33,7 +33,8 @@ ufshci_dev_read_descriptor(struct ufshci_controller *ctrlr, &status, param); ufshci_completion_poll(&status); if (status.error) { - ufshci_printf(ctrlr, "ufshci_dev_read_descriptor failed!\n"); + ufshci_printf(ctrlr, + "Failed to send Read Descriptor query request!\n"); return (ENXIO); } diff --git a/sys/dev/ufshci/ufshci_private.h b/sys/dev/ufshci/ufshci_private.h index bcb2bcef0230..b57142bf58fc 100644 --- a/sys/dev/ufshci/ufshci_private.h +++ b/sys/dev/ufshci/ufshci_private.h @@ -451,9 +451,7 @@ void ufshci_ctrlr_poll(struct ufshci_controller *ctrlr); int ufshci_ctrlr_submit_task_mgmt_request(struct ufshci_controller *ctrlr, struct ufshci_request *req); -int ufshci_ctrlr_submit_admin_request(struct ufshci_controller *ctrlr, - struct ufshci_request *req); -int ufshci_ctrlr_submit_io_request(struct ufshci_controller *ctrlr, +int ufshci_ctrlr_submit_transfer_request(struct ufshci_controller *ctrlr, struct ufshci_request *req); int ufshci_ctrlr_send_nop(struct ufshci_controller *ctrlr); @@ -499,9 +497,9 @@ int ufshci_utmr_req_queue_enable(struct ufshci_controller *ctrlr); void ufshci_utr_req_queue_disable(struct ufshci_controller *ctrlr); int ufshci_utr_req_queue_enable(struct ufshci_controller *ctrlr); void ufshci_req_queue_fail(struct ufshci_controller *ctrlr, - struct ufshci_hw_queue *hwq); + struct ufshci_req_queue *req_queue); int ufshci_req_queue_submit_request(struct ufshci_req_queue *req_queue, - struct ufshci_request *req, bool is_admin); + struct ufshci_request *req); void ufshci_req_queue_complete_tracker(struct ufshci_tracker *tr); /* Request Single Doorbell Queue */ diff --git a/sys/dev/ufshci/ufshci_req_queue.c b/sys/dev/ufshci/ufshci_req_queue.c index df7e4b159278..4c82b79d0e26 100644 --- a/sys/dev/ufshci/ufshci_req_queue.c +++ b/sys/dev/ufshci/ufshci_req_queue.c @@ -199,11 +199,10 @@ ufshci_req_queue_manual_complete_request(struct ufshci_req_queue *req_queue, void ufshci_req_queue_fail(struct ufshci_controller *ctrlr, - struct ufshci_hw_queue *hwq) + struct ufshci_req_queue *req_queue) { - struct ufshci_req_queue *req_queue; + struct ufshci_hw_queue *hwq = req_queue->qops.get_hw_queue(req_queue); struct ufshci_tracker *tr; - struct ufshci_request *req; int i; if (!mtx_initialized(&hwq->qlock)) @@ -211,16 +210,13 @@ ufshci_req_queue_fail(struct ufshci_controller *ctrlr, mtx_lock(&hwq->qlock); - req_queue = &ctrlr->transfer_req_queue; - - for (i = 0; i < req_queue->num_entries; i++) { + for (i = 0; i < req_queue->num_trackers; i++) { tr = hwq->act_tr[i]; - req = tr->req; if (tr->slot_state == UFSHCI_SLOT_STATE_RESERVED) { mtx_unlock(&hwq->qlock); - ufshci_req_queue_manual_complete_request(req_queue, req, - UFSHCI_DESC_ABORTED, + ufshci_req_queue_manual_complete_request(req_queue, + tr->req, UFSHCI_DESC_ABORTED, UFSHCI_RESPONSE_CODE_GENERAL_FAILURE); mtx_lock(&hwq->qlock); } else if (tr->slot_state == UFSHCI_SLOT_STATE_SCHEDULED) { @@ -272,9 +268,8 @@ ufshci_req_queue_complete_tracker(struct ufshci_tracker *tr) error = ufshci_req_queue_response_is_error(req_queue, ocs, &cpl.response_upiu); - /* TODO: Implement retry */ - // retriable = ufshci_completion_is_retry(cpl); - retriable = false; + /* Retry for admin commands */ + retriable = req->is_admin; retry = error && retriable && req->retries < req_queue->ctrlr->retry_count; if (retry) @@ -782,7 +777,7 @@ _ufshci_req_queue_submit_request(struct ufshci_req_queue *req_queue, int ufshci_req_queue_submit_request(struct ufshci_req_queue *req_queue, - struct ufshci_request *req, bool is_admin) + struct ufshci_request *req) { struct ufshci_hw_queue *hwq; uint32_t error; diff --git a/sys/dev/ufshci/ufshci_sim.c b/sys/dev/ufshci/ufshci_sim.c index 1589e7475ad4..bee1fff858ff 100644 --- a/sys/dev/ufshci/ufshci_sim.c +++ b/sys/dev/ufshci/ufshci_sim.c @@ -165,6 +165,7 @@ ufshchi_sim_scsiio(struct cam_sim *sim, union ccb *ccb) data_direction = UFSHCI_DATA_DIRECTION_NO_DATA_TRANSFER; } req->data_direction = data_direction; + req->is_admin = false; upiu = (struct ufshci_cmd_command_upiu *)&req->request_upiu; memset(upiu, 0, req->request_size); @@ -191,7 +192,7 @@ ufshchi_sim_scsiio(struct cam_sim *sim, union ccb *ccb) } memcpy(upiu->cdb, cdb, csio->cdb_len); - error = ufshci_ctrlr_submit_io_request(ctrlr, req); + error = ufshci_ctrlr_submit_transfer_request(ctrlr, req); if (error == EBUSY) { ccb->ccb_h.status = CAM_SCSI_BUSY; xpt_done(ccb); diff --git a/sys/dev/usb/usb_device.c b/sys/dev/usb/usb_device.c index f0989972f49f..4e0268110787 100644 --- a/sys/dev/usb/usb_device.c +++ b/sys/dev/usb/usb_device.c @@ -3127,7 +3127,7 @@ usbd_fill_deviceinfo(struct usb_device *udev, struct usb_device_info *di) { struct usb_device *hub; - bzero(di, sizeof(di[0])); + memset(di, 0, sizeof(di[0])); di->udi_bus = device_get_unit(udev->bus->bdev); di->udi_addr = udev->address; diff --git a/sys/dev/vmm/vmm_dev.c b/sys/dev/vmm/vmm_dev.c index 840e810a39fb..a5322f05d28f 100644 --- a/sys/dev/vmm/vmm_dev.c +++ b/sys/dev/vmm/vmm_dev.c @@ -33,6 +33,7 @@ #include <dev/vmm/vmm_dev.h> #include <dev/vmm/vmm_mem.h> #include <dev/vmm/vmm_stat.h> +#include <dev/vmm/vmm_vm.h> #ifdef __amd64__ #ifdef COMPAT_FREEBSD12 @@ -140,38 +141,6 @@ vcpu_unlock_one(struct vcpu *vcpu) vcpu_set_state(vcpu, VCPU_IDLE, false); } -#ifndef __amd64__ -static int -vcpu_set_state_all(struct vm *vm, enum vcpu_state newstate) -{ - struct vcpu *vcpu; - int error; - uint16_t i, j, maxcpus; - - error = 0; - maxcpus = vm_get_maxcpus(vm); - for (i = 0; i < maxcpus; i++) { - vcpu = vm_vcpu(vm, i); - if (vcpu == NULL) - continue; - error = vcpu_lock_one(vcpu); - if (error) - break; - } - - if (error) { - for (j = 0; j < i; j++) { - vcpu = vm_vcpu(vm, j); - if (vcpu == NULL) - continue; - vcpu_unlock_one(vcpu); - } - } - - return (error); -} -#endif - static int vcpu_lock_all(struct vmmdev_softc *sc) { diff --git a/sys/dev/vmm/vmm_ktr.h b/sys/dev/vmm/vmm_ktr.h index 20370a229530..afd9831e4225 100644 --- a/sys/dev/vmm/vmm_ktr.h +++ b/sys/dev/vmm/vmm_ktr.h @@ -30,7 +30,9 @@ #define _VMM_KTR_H_ #include <sys/ktr.h> -#include <sys/pcpu.h> +#ifdef KTR +#include <dev/vmm/vmm_vm.h> +#endif #ifndef KTR_VMM #define KTR_VMM KTR_GEN diff --git a/sys/dev/vmm/vmm_mem.c b/sys/dev/vmm/vmm_mem.c index 5ae944713c81..5a73cbf7fc5b 100644 --- a/sys/dev/vmm/vmm_mem.c +++ b/sys/dev/vmm/vmm_mem.c @@ -23,6 +23,7 @@ #include <dev/vmm/vmm_dev.h> #include <dev/vmm/vmm_mem.h> +#include <dev/vmm/vmm_vm.h> static void vm_free_memmap(struct vm *vm, int ident); diff --git a/sys/dev/vmm/vmm_mem.h b/sys/dev/vmm/vmm_mem.h index f3d22058c7b8..64bb29352a55 100644 --- a/sys/dev/vmm/vmm_mem.h +++ b/sys/dev/vmm/vmm_mem.h @@ -34,7 +34,10 @@ enum { #include <sys/types.h> #include <sys/_sx.h> +struct domainset; +struct vcpu; struct vm; +struct vm_guest_paging; struct vm_object; struct vmspace; diff --git a/sys/dev/vmm/vmm_stat.h b/sys/dev/vmm/vmm_stat.h index 471afd0dd827..469d8ef54829 100644 --- a/sys/dev/vmm/vmm_stat.h +++ b/sys/dev/vmm/vmm_stat.h @@ -32,6 +32,8 @@ #ifndef _DEV_VMM_STAT_H_ #define _DEV_VMM_STAT_H_ +#include <dev/vmm/vmm_vm.h> + struct vm; #define MAX_VMM_STAT_ELEMS 64 /* arbitrary */ diff --git a/sys/dev/vmm/vmm_vm.c b/sys/dev/vmm/vmm_vm.c new file mode 100644 index 000000000000..7941038ed671 --- /dev/null +++ b/sys/dev/vmm/vmm_vm.c @@ -0,0 +1,476 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2011 NetApp, Inc. + * All rights reserved. + */ + +#include <sys/param.h> +#include <sys/kernel.h> +#include <sys/lock.h> +#include <sys/mutex.h> +#include <sys/proc.h> +#include <sys/sx.h> +#include <sys/sysctl.h> + +#include <machine/smp.h> + +#include <dev/vmm/vmm_vm.h> + +SYSCTL_NODE(_hw, OID_AUTO, vmm, CTLFLAG_RW | CTLFLAG_MPSAFE, NULL, NULL); + +int vmm_ipinum; +SYSCTL_INT(_hw_vmm, OID_AUTO, ipinum, CTLFLAG_RD, &vmm_ipinum, 0, + "IPI vector used for vcpu notifications"); + +/* + * Invoke the rendezvous function on the specified vcpu if applicable. Return + * true if the rendezvous is finished, false otherwise. + */ +static bool +vm_rendezvous(struct vcpu *vcpu) +{ + struct vm *vm = vcpu->vm; + int vcpuid; + + mtx_assert(&vcpu->vm->rendezvous_mtx, MA_OWNED); + KASSERT(vcpu->vm->rendezvous_func != NULL, + ("vm_rendezvous: no rendezvous pending")); + + /* 'rendezvous_req_cpus' must be a subset of 'active_cpus' */ + CPU_AND(&vm->rendezvous_req_cpus, &vm->rendezvous_req_cpus, + &vm->active_cpus); + + vcpuid = vcpu->vcpuid; + if (CPU_ISSET(vcpuid, &vm->rendezvous_req_cpus) && + !CPU_ISSET(vcpuid, &vm->rendezvous_done_cpus)) { + (*vm->rendezvous_func)(vcpu, vm->rendezvous_arg); + CPU_SET(vcpuid, &vm->rendezvous_done_cpus); + } + if (CPU_CMP(&vm->rendezvous_req_cpus, &vm->rendezvous_done_cpus) == 0) { + CPU_ZERO(&vm->rendezvous_req_cpus); + vm->rendezvous_func = NULL; + wakeup(&vm->rendezvous_func); + return (true); + } + return (false); +} + +int +vm_handle_rendezvous(struct vcpu *vcpu) +{ + struct vm *vm; + struct thread *td; + + td = curthread; + vm = vcpu->vm; + + mtx_lock(&vm->rendezvous_mtx); + while (vm->rendezvous_func != NULL) { + if (vm_rendezvous(vcpu)) + break; + + mtx_sleep(&vm->rendezvous_func, &vm->rendezvous_mtx, 0, + "vmrndv", hz); + if (td_ast_pending(td, TDA_SUSPEND)) { + int error; + + mtx_unlock(&vm->rendezvous_mtx); + error = thread_check_susp(td, true); + if (error != 0) + return (error); + mtx_lock(&vm->rendezvous_mtx); + } + } + mtx_unlock(&vm->rendezvous_mtx); + return (0); +} + +static void +vcpu_wait_idle(struct vcpu *vcpu) +{ + KASSERT(vcpu->state != VCPU_IDLE, ("vcpu already idle")); + + vcpu->reqidle = 1; + vcpu_notify_event_locked(vcpu); + msleep_spin(&vcpu->state, &vcpu->mtx, "vmstat", hz); +} + +int +vcpu_set_state_locked(struct vcpu *vcpu, enum vcpu_state newstate, + bool from_idle) +{ + int error; + + vcpu_assert_locked(vcpu); + + /* + * State transitions from the vmmdev_ioctl() must always begin from + * the VCPU_IDLE state. This guarantees that there is only a single + * ioctl() operating on a vcpu at any point. + */ + if (from_idle) { + while (vcpu->state != VCPU_IDLE) + vcpu_wait_idle(vcpu); + } else { + KASSERT(vcpu->state != VCPU_IDLE, ("invalid transition from " + "vcpu idle state")); + } + + if (vcpu->state == VCPU_RUNNING) { + KASSERT(vcpu->hostcpu == curcpu, ("curcpu %d and hostcpu %d " + "mismatch for running vcpu", curcpu, vcpu->hostcpu)); + } else { + KASSERT(vcpu->hostcpu == NOCPU, ("Invalid hostcpu %d for a " + "vcpu that is not running", vcpu->hostcpu)); + } + + /* + * The following state transitions are allowed: + * IDLE -> FROZEN -> IDLE + * FROZEN -> RUNNING -> FROZEN + * FROZEN -> SLEEPING -> FROZEN + */ + switch (vcpu->state) { + case VCPU_IDLE: + case VCPU_RUNNING: + case VCPU_SLEEPING: + error = (newstate != VCPU_FROZEN); + break; + case VCPU_FROZEN: + error = (newstate == VCPU_FROZEN); + break; + default: + error = 1; + break; + } + + if (error) + return (EBUSY); + + vcpu->state = newstate; + if (newstate == VCPU_RUNNING) + vcpu->hostcpu = curcpu; + else + vcpu->hostcpu = NOCPU; + + if (newstate == VCPU_IDLE) + wakeup(&vcpu->state); + + return (0); +} + +/* + * Try to lock all of the vCPUs in the VM while taking care to avoid deadlocks + * with vm_smp_rendezvous(). + * + * The complexity here suggests that the rendezvous mechanism needs a rethink. + */ +int +vcpu_set_state_all(struct vm *vm, enum vcpu_state newstate) +{ + cpuset_t locked; + struct vcpu *vcpu; + int error, i; + uint16_t maxcpus; + + KASSERT(newstate != VCPU_IDLE, + ("vcpu_set_state_all: invalid target state %d", newstate)); + + error = 0; + CPU_ZERO(&locked); + maxcpus = vm->maxcpus; + + mtx_lock(&vm->rendezvous_mtx); +restart: + if (vm->rendezvous_func != NULL) { + /* + * If we have a pending rendezvous, then the initiator may be + * blocked waiting for other vCPUs to execute the callback. The + * current thread may be a vCPU thread so we must not block + * waiting for the initiator, otherwise we get a deadlock. + * Thus, execute the callback on behalf of any idle vCPUs. + */ + for (i = 0; i < maxcpus; i++) { + vcpu = vm_vcpu(vm, i); + if (vcpu == NULL) + continue; + vcpu_lock(vcpu); + if (vcpu->state == VCPU_IDLE) { + (void)vcpu_set_state_locked(vcpu, VCPU_FROZEN, + true); + CPU_SET(i, &locked); + } + if (CPU_ISSET(i, &locked)) { + /* + * We can safely execute the callback on this + * vCPU's behalf. + */ + vcpu_unlock(vcpu); + (void)vm_rendezvous(vcpu); + vcpu_lock(vcpu); + } + vcpu_unlock(vcpu); + } + } + + /* + * Now wait for remaining vCPUs to become idle. This may include the + * initiator of a rendezvous that is currently blocked on the rendezvous + * mutex. + */ + CPU_FOREACH_ISCLR(i, &locked) { + if (i >= maxcpus) + break; + vcpu = vm_vcpu(vm, i); + if (vcpu == NULL) + continue; + vcpu_lock(vcpu); + while (vcpu->state != VCPU_IDLE) { + mtx_unlock(&vm->rendezvous_mtx); + vcpu_wait_idle(vcpu); + vcpu_unlock(vcpu); + mtx_lock(&vm->rendezvous_mtx); + if (vm->rendezvous_func != NULL) + goto restart; + vcpu_lock(vcpu); + } + error = vcpu_set_state_locked(vcpu, newstate, true); + vcpu_unlock(vcpu); + if (error != 0) { + /* Roll back state changes. */ + CPU_FOREACH_ISSET(i, &locked) + (void)vcpu_set_state(vcpu, VCPU_IDLE, false); + break; + } + CPU_SET(i, &locked); + } + mtx_unlock(&vm->rendezvous_mtx); + return (error); +} + + +int +vcpu_set_state(struct vcpu *vcpu, enum vcpu_state newstate, bool from_idle) +{ + int error; + + vcpu_lock(vcpu); + error = vcpu_set_state_locked(vcpu, newstate, from_idle); + vcpu_unlock(vcpu); + + return (error); +} + +enum vcpu_state +vcpu_get_state(struct vcpu *vcpu, int *hostcpu) +{ + enum vcpu_state state; + + vcpu_lock(vcpu); + state = vcpu->state; + if (hostcpu != NULL) + *hostcpu = vcpu->hostcpu; + vcpu_unlock(vcpu); + + return (state); +} + +/* + * This function is called to ensure that a vcpu "sees" a pending event + * as soon as possible: + * - If the vcpu thread is sleeping then it is woken up. + * - If the vcpu is running on a different host_cpu then an IPI will be directed + * to the host_cpu to cause the vcpu to trap into the hypervisor. + */ +void +vcpu_notify_event_locked(struct vcpu *vcpu) +{ + int hostcpu; + + hostcpu = vcpu->hostcpu; + if (vcpu->state == VCPU_RUNNING) { + KASSERT(hostcpu != NOCPU, ("vcpu running on invalid hostcpu")); + if (hostcpu != curcpu) { + ipi_cpu(hostcpu, vmm_ipinum); + } else { + /* + * If the 'vcpu' is running on 'curcpu' then it must + * be sending a notification to itself (e.g. SELF_IPI). + * The pending event will be picked up when the vcpu + * transitions back to guest context. + */ + } + } else { + KASSERT(hostcpu == NOCPU, ("vcpu state %d not consistent " + "with hostcpu %d", vcpu->state, hostcpu)); + if (vcpu->state == VCPU_SLEEPING) + wakeup_one(vcpu); + } +} + +void +vcpu_notify_event(struct vcpu *vcpu) +{ + vcpu_lock(vcpu); + vcpu_notify_event_locked(vcpu); + vcpu_unlock(vcpu); +} + +int +vcpu_debugged(struct vcpu *vcpu) +{ + return (CPU_ISSET(vcpu->vcpuid, &vcpu->vm->debug_cpus)); +} + +void +vm_lock_vcpus(struct vm *vm) +{ + sx_xlock(&vm->vcpus_init_lock); +} + +void +vm_unlock_vcpus(struct vm *vm) +{ + sx_unlock(&vm->vcpus_init_lock); +} + +void +vm_disable_vcpu_creation(struct vm *vm) +{ + sx_xlock(&vm->vcpus_init_lock); + vm->dying = true; + sx_xunlock(&vm->vcpus_init_lock); +} + +uint16_t +vm_get_maxcpus(struct vm *vm) +{ + return (vm->maxcpus); +} + +void +vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, + uint16_t *threads, uint16_t *maxcpus) +{ + *sockets = vm->sockets; + *cores = vm->cores; + *threads = vm->threads; + *maxcpus = vm->maxcpus; +} + +int +vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, + uint16_t threads, uint16_t maxcpus __unused) +{ + /* Ignore maxcpus. */ + if (sockets * cores * threads > vm->maxcpus) + return (EINVAL); + vm->sockets = sockets; + vm->cores = cores; + vm->threads = threads; + return (0); +} + +int +vm_suspend(struct vm *vm, enum vm_suspend_how how) +{ + int i; + + if (how <= VM_SUSPEND_NONE || how >= VM_SUSPEND_LAST) + return (EINVAL); + + if (atomic_cmpset_int(&vm->suspend, 0, how) == 0) + return (EALREADY); + + /* + * Notify all active vcpus that they are now suspended. + */ + for (i = 0; i < vm->maxcpus; i++) { + if (CPU_ISSET(i, &vm->active_cpus)) + vcpu_notify_event(vm_vcpu(vm, i)); + } + + return (0); +} + +int +vm_reinit(struct vm *vm) +{ + int error; + + /* + * A virtual machine can be reset only if all vcpus are suspended. + */ + if (CPU_CMP(&vm->suspended_cpus, &vm->active_cpus) == 0) { + vm_reset(vm); + error = 0; + } else { + error = EBUSY; + } + + return (error); +} + +int +vm_activate_cpu(struct vcpu *vcpu) +{ + struct vm *vm = vcpu->vm; + + if (CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) + return (EBUSY); + + CPU_SET_ATOMIC(vcpu->vcpuid, &vm->active_cpus); + return (0); +} + +int +vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu) +{ + if (vcpu == NULL) { + vm->debug_cpus = vm->active_cpus; + for (int i = 0; i < vm->maxcpus; i++) { + if (CPU_ISSET(i, &vm->active_cpus)) + vcpu_notify_event(vm_vcpu(vm, i)); + } + } else { + if (!CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) + return (EINVAL); + + CPU_SET_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); + vcpu_notify_event(vcpu); + } + return (0); +} + +int +vm_resume_cpu(struct vm *vm, struct vcpu *vcpu) +{ + if (vcpu == NULL) { + CPU_ZERO(&vm->debug_cpus); + } else { + if (!CPU_ISSET(vcpu->vcpuid, &vm->debug_cpus)) + return (EINVAL); + + CPU_CLR_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); + } + return (0); +} + +cpuset_t +vm_active_cpus(struct vm *vm) +{ + return (vm->active_cpus); +} + +cpuset_t +vm_debug_cpus(struct vm *vm) +{ + return (vm->debug_cpus); +} + +cpuset_t +vm_suspended_cpus(struct vm *vm) +{ + return (vm->suspended_cpus); +} diff --git a/sys/dev/vmm/vmm_vm.h b/sys/dev/vmm/vmm_vm.h new file mode 100644 index 000000000000..66d3545d1dd5 --- /dev/null +++ b/sys/dev/vmm/vmm_vm.h @@ -0,0 +1,233 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2011 NetApp, Inc. + * All rights reserved. + */ + +#ifndef _DEV_VMM_VM_H_ +#define _DEV_VMM_VM_H_ + +#ifdef _KERNEL +#include <sys/_cpuset.h> + +#include <machine/vmm.h> + +#include <dev/vmm/vmm_param.h> +#include <dev/vmm/vmm_mem.h> + +struct vcpu; + +enum vcpu_state { + VCPU_IDLE, + VCPU_FROZEN, + VCPU_RUNNING, + VCPU_SLEEPING, +}; + +/* + * Initialization: + * (a) allocated when vcpu is created + * (i) initialized when vcpu is created and when it is reinitialized + * (o) initialized the first time the vcpu is created + * (x) initialized before use + */ +struct vcpu { + struct mtx mtx; /* (o) protects 'state' and 'hostcpu' */ + enum vcpu_state state; /* (o) vcpu state */ + int vcpuid; /* (o) */ + int hostcpu; /* (o) vcpu's host cpu */ + int reqidle; /* (i) request vcpu to idle */ + struct vm *vm; /* (o) */ + void *cookie; /* (i) cpu-specific data */ + void *stats; /* (a,i) statistics */ + + VMM_VCPU_MD_FIELDS; +}; + +#define vcpu_lock_init(v) mtx_init(&((v)->mtx), "vcpu lock", 0, MTX_SPIN) +#define vcpu_lock_destroy(v) mtx_destroy(&((v)->mtx)) +#define vcpu_lock(v) mtx_lock_spin(&((v)->mtx)) +#define vcpu_unlock(v) mtx_unlock_spin(&((v)->mtx)) +#define vcpu_assert_locked(v) mtx_assert(&((v)->mtx), MA_OWNED) + +extern int vmm_ipinum; + +int vcpu_set_state(struct vcpu *vcpu, enum vcpu_state state, bool from_idle); +int vcpu_set_state_locked(struct vcpu *vcpu, enum vcpu_state newstate, + bool from_idle); +int vcpu_set_state_all(struct vm *vm, enum vcpu_state state); +enum vcpu_state vcpu_get_state(struct vcpu *vcpu, int *hostcpu); +void vcpu_notify_event(struct vcpu *vcpu); +void vcpu_notify_event_locked(struct vcpu *vcpu); +int vcpu_debugged(struct vcpu *vcpu); + +static inline void * +vcpu_stats(struct vcpu *vcpu) +{ + return (vcpu->stats); +} + +static inline struct vm * +vcpu_vm(struct vcpu *vcpu) +{ + return (vcpu->vm); +} + +static inline int +vcpu_vcpuid(struct vcpu *vcpu) +{ + return (vcpu->vcpuid); +} + +static int __inline +vcpu_is_running(struct vcpu *vcpu, int *hostcpu) +{ + return (vcpu_get_state(vcpu, hostcpu) == VCPU_RUNNING); +} + +#ifdef _SYS_PROC_H_ +static int __inline +vcpu_should_yield(struct vcpu *vcpu) +{ + struct thread *td; + + td = curthread; + return (td->td_ast != 0 || td->td_owepreempt != 0); +} +#endif + +typedef void (*vm_rendezvous_func_t)(struct vcpu *vcpu, void *arg); +int vm_handle_rendezvous(struct vcpu *vcpu); + +/* + * Rendezvous all vcpus specified in 'dest' and execute 'func(arg)'. + * The rendezvous 'func(arg)' is not allowed to do anything that will + * cause the thread to be put to sleep. + * + * The caller cannot hold any locks when initiating the rendezvous. + * + * The implementation of this API may cause vcpus other than those specified + * by 'dest' to be stalled. The caller should not rely on any vcpus making + * forward progress when the rendezvous is in progress. + */ +int vm_smp_rendezvous(struct vcpu *vcpu, cpuset_t dest, + vm_rendezvous_func_t func, void *arg); + +/* + * Initialization: + * (o) initialized the first time the VM is created + * (i) initialized when VM is created and when it is reinitialized + * (x) initialized before use + * + * Locking: + * [m] mem_segs_lock + * [r] rendezvous_mtx + * [v] reads require one frozen vcpu, writes require freezing all vcpus + */ +struct vm { + void *cookie; /* (i) cpu-specific data */ + struct vcpu **vcpu; /* (o) guest vcpus */ + struct vm_mem mem; /* (i) [m+v] guest memory */ + + char name[VM_MAX_NAMELEN + 1]; /* (o) virtual machine name */ + struct sx vcpus_init_lock; /* (o) */ + + bool dying; /* (o) is dying */ + int suspend; /* (i) stop VM execution */ + + volatile cpuset_t active_cpus; /* (i) active vcpus */ + volatile cpuset_t debug_cpus; /* (i) vcpus stopped for debug */ + volatile cpuset_t suspended_cpus; /* (i) suspended vcpus */ + volatile cpuset_t halted_cpus; /* (x) cpus in a hard halt */ + + cpuset_t rendezvous_req_cpus; /* (x) [r] rendezvous requested */ + cpuset_t rendezvous_done_cpus; /* (x) [r] rendezvous finished */ + void *rendezvous_arg; /* (x) [r] rendezvous func/arg */ + vm_rendezvous_func_t rendezvous_func; + struct mtx rendezvous_mtx; /* (o) rendezvous lock */ + + uint16_t sockets; /* (o) num of sockets */ + uint16_t cores; /* (o) num of cores/socket */ + uint16_t threads; /* (o) num of threads/core */ + uint16_t maxcpus; /* (o) max pluggable cpus */ + + VMM_VM_MD_FIELDS; +}; + +int vm_create(const char *name, struct vm **retvm); +struct vcpu *vm_alloc_vcpu(struct vm *vm, int vcpuid); +void vm_destroy(struct vm *vm); +int vm_reinit(struct vm *vm); +void vm_reset(struct vm *vm); + +void vm_lock_vcpus(struct vm *vm); +void vm_unlock_vcpus(struct vm *vm); +void vm_disable_vcpu_creation(struct vm *vm); + +int vm_suspend(struct vm *vm, enum vm_suspend_how how); +int vm_activate_cpu(struct vcpu *vcpu); +int vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu); +int vm_resume_cpu(struct vm *vm, struct vcpu *vcpu); + +cpuset_t vm_active_cpus(struct vm *vm); +cpuset_t vm_debug_cpus(struct vm *vm); +cpuset_t vm_suspended_cpus(struct vm *vm); + +uint16_t vm_get_maxcpus(struct vm *vm); +void vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, + uint16_t *threads, uint16_t *maxcpus); +int vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, + uint16_t threads, uint16_t maxcpus); + +static inline const char * +vm_name(struct vm *vm) +{ + return (vm->name); +} + +static inline struct vm_mem * +vm_mem(struct vm *vm) +{ + return (&vm->mem); +} + +static inline struct vcpu * +vm_vcpu(struct vm *vm, int vcpuid) +{ + return (vm->vcpu[vcpuid]); +} + +struct vm_eventinfo { + cpuset_t *rptr; /* rendezvous cookie */ + int *sptr; /* suspend cookie */ + int *iptr; /* reqidle cookie */ +}; + +static inline int +vcpu_rendezvous_pending(struct vcpu *vcpu, struct vm_eventinfo *info) +{ + /* + * This check isn't done with atomic operations or under a lock because + * there's no need to. If the vcpuid bit is set, the vcpu is part of a + * rendezvous and the bit won't be cleared until the vcpu enters the + * rendezvous. On rendezvous exit, the cpuset is cleared and the vcpu + * will see an empty cpuset. So, the races are harmless. + */ + return (CPU_ISSET(vcpu_vcpuid(vcpu), info->rptr)); +} + +static inline int +vcpu_suspended(struct vm_eventinfo *info) +{ + return (*info->sptr); +} + +static inline int +vcpu_reqidle(struct vm_eventinfo *info) +{ + return (*info->iptr); +} +#endif /* _KERNEL */ + +#endif /* !_DEV_VMM_VM_H_ */ diff --git a/sys/dev/xen/blkback/blkback.c b/sys/dev/xen/blkback/blkback.c index c6cba729b991..dcfdcafa9351 100644 --- a/sys/dev/xen/blkback/blkback.c +++ b/sys/dev/xen/blkback/blkback.c @@ -152,7 +152,7 @@ struct xbb_softc; struct xbb_xen_req; static void xbb_attach_failed(struct xbb_softc *xbb, int err, const char *fmt, - ...) __attribute__((format(printf, 3, 4))); + ...) __printflike(3, 4); static int xbb_shutdown(struct xbb_softc *xbb); /*------------------------------ Data Structures -----------------------------*/ diff --git a/sys/fs/fuse/fuse_device.c b/sys/fs/fuse/fuse_device.c index cee477865c42..41387de3ce71 100644 --- a/sys/fs/fuse/fuse_device.c +++ b/sys/fs/fuse/fuse_device.c @@ -82,7 +82,7 @@ #include <sys/sysctl.h> #include <sys/poll.h> #include <sys/selinfo.h> -#define EXTERR_CATEGORY EXTERR_CAT_FUSE +#define EXTERR_CATEGORY EXTERR_CAT_FUSE_DEVICE #include <sys/exterrvar.h> #include "fuse.h" diff --git a/sys/fs/fuse/fuse_internal.c b/sys/fs/fuse/fuse_internal.c index eba0a8a79ff3..a3590060f44a 100644 --- a/sys/fs/fuse/fuse_internal.c +++ b/sys/fs/fuse/fuse_internal.c @@ -1103,7 +1103,6 @@ fuse_internal_send_init(struct fuse_data *data, struct thread *td) * FUSE_SPLICE_WRITE, FUSE_SPLICE_MOVE, FUSE_SPLICE_READ: FreeBSD * doesn't have splice(2). * FUSE_FLOCK_LOCKS: not yet implemented - * FUSE_HAS_IOCTL_DIR: not yet implemented * FUSE_AUTO_INVAL_DATA: not yet implemented * FUSE_DO_READDIRPLUS: not yet implemented * FUSE_READDIRPLUS_AUTO: not yet implemented @@ -1116,7 +1115,7 @@ fuse_internal_send_init(struct fuse_data *data, struct thread *td) * FUSE_MAX_PAGES: not yet implemented */ fiii->flags = FUSE_ASYNC_READ | FUSE_POSIX_LOCKS | FUSE_EXPORT_SUPPORT - | FUSE_BIG_WRITES | FUSE_WRITEBACK_CACHE + | FUSE_BIG_WRITES | FUSE_HAS_IOCTL_DIR | FUSE_WRITEBACK_CACHE | FUSE_NO_OPEN_SUPPORT | FUSE_NO_OPENDIR_SUPPORT | FUSE_SETXATTR_EXT; diff --git a/sys/fs/fuse/fuse_ipc.c b/sys/fs/fuse/fuse_ipc.c index bc36f0070d7d..f3d92d861352 100644 --- a/sys/fs/fuse/fuse_ipc.c +++ b/sys/fs/fuse/fuse_ipc.c @@ -835,6 +835,10 @@ fuse_body_audit(struct fuse_ticket *ftick, size_t blen) err = (blen == 0) ? 0 : EINVAL; break; + case FUSE_IOCTL: + err = (blen >= sizeof(struct fuse_ioctl_out)) ? 0 : EINVAL; + break; + case FUSE_FALLOCATE: err = (blen == 0) ? 0 : EINVAL; break; diff --git a/sys/fs/fuse/fuse_vfsops.c b/sys/fs/fuse/fuse_vfsops.c index b617925c4e5f..0ff79913128a 100644 --- a/sys/fs/fuse/fuse_vfsops.c +++ b/sys/fs/fuse/fuse_vfsops.c @@ -81,7 +81,7 @@ #include <sys/mount.h> #include <sys/sysctl.h> #include <sys/fcntl.h> -#define EXTERR_CATEGORY EXTERR_CAT_FUSE +#define EXTERR_CATEGORY EXTERR_CAT_FUSE_VFS #include <sys/exterrvar.h> #include "fuse.h" diff --git a/sys/fs/fuse/fuse_vnops.c b/sys/fs/fuse/fuse_vnops.c index ef5aee5de34c..22d5893d4fbc 100644 --- a/sys/fs/fuse/fuse_vnops.c +++ b/sys/fs/fuse/fuse_vnops.c @@ -89,8 +89,9 @@ #include <sys/buf.h> #include <sys/sysctl.h> #include <sys/vmmeter.h> -#define EXTERR_CATEGORY EXTERR_CAT_FUSE +#define EXTERR_CATEGORY EXTERR_CAT_FUSE_VNOPS #include <sys/exterrvar.h> +#include <sys/sysent.h> #include <vm/vm.h> #include <vm/vm_extern.h> @@ -374,6 +375,84 @@ fuse_inval_buf_range(struct vnode *vp, off_t filesize, off_t start, off_t end) return (0); } +/* Send FUSE_IOCTL for this node */ +static int +fuse_vnop_do_ioctl(struct vnode *vp, u_long cmd, void *arg, int fflag, + struct ucred *cred, struct thread *td) +{ + struct fuse_dispatcher fdi; + struct fuse_ioctl_in *fii; + struct fuse_ioctl_out *fio; + struct fuse_filehandle *fufh; + uint32_t flags = 0; + uint32_t insize = 0; + uint32_t outsize = 0; + int err; + + err = fuse_filehandle_getrw(vp, fflag, &fufh, cred, td->td_proc->p_pid); + if (err != 0) + return (err); + + if (vnode_isdir(vp)) { + struct fuse_data *data = fuse_get_mpdata(vnode_mount(vp)); + + if (!fuse_libabi_geq(data, 7, 18)) + return (ENOTTY); + flags |= FUSE_IOCTL_DIR; + } +#ifdef __LP64__ +#ifdef COMPAT_FREEBSD32 + if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) + flags |= FUSE_IOCTL_32BIT; +#endif +#else /* !defined(__LP64__) */ + flags |= FUSE_IOCTL_32BIT; +#endif + + if ((cmd & IOC_OUT) != 0) + outsize = IOCPARM_LEN(cmd); + /* _IOWINT() sets IOC_VOID */ + if ((cmd & (IOC_VOID | IOC_IN)) != 0) + insize = IOCPARM_LEN(cmd); + + fdisp_init(&fdi, sizeof(*fii) + insize); + fdisp_make_vp(&fdi, FUSE_IOCTL, vp, td, cred); + fii = fdi.indata; + fii->fh = fufh->fh_id; + fii->flags = flags; + fii->cmd = cmd; + fii->arg = (uintptr_t)arg; + fii->in_size = insize; + fii->out_size = outsize; + if (insize > 0) + memcpy((char *)fii + sizeof(*fii), arg, insize); + + err = fdisp_wait_answ(&fdi); + if (err != 0) { + if (err == ENOSYS) + err = ENOTTY; + goto out; + } + + fio = fdi.answ; + if (fdi.iosize > sizeof(*fio)) { + size_t realoutsize = fdi.iosize - sizeof(*fio); + + if (realoutsize > outsize) { + err = EIO; + goto out; + } + memcpy(arg, (char *)fio + sizeof(*fio), realoutsize); + } + if (fio->result > 0) + td->td_retval[0] = fio->result; + else + err = -fio->result; + +out: + fdisp_destroy(&fdi); + return (err); +} /* Send FUSE_LSEEK for this node */ static int @@ -1294,25 +1373,29 @@ fuse_vnop_ioctl(struct vop_ioctl_args *ap) struct vnode *vp = ap->a_vp; struct mount *mp = vnode_mount(vp); struct ucred *cred = ap->a_cred; - off_t *offp; - pid_t pid = ap->a_td->td_proc->p_pid; + struct thread *td = ap->a_td; int err; + if (fuse_isdeadfs(vp)) { + return (ENXIO); + } + switch (ap->a_command) { case FIOSEEKDATA: case FIOSEEKHOLE: /* Call FUSE_LSEEK, if we can, or fall back to vop_stdioctl */ if (fsess_maybe_impl(mp, FUSE_LSEEK)) { + off_t *offp = ap->a_data; + pid_t pid = td->td_proc->p_pid; int whence; - offp = ap->a_data; if (ap->a_command == FIOSEEKDATA) whence = SEEK_DATA; else whence = SEEK_HOLE; vn_lock(vp, LK_SHARED | LK_RETRY); - err = fuse_vnop_do_lseek(vp, ap->a_td, cred, pid, offp, + err = fuse_vnop_do_lseek(vp, td, cred, pid, offp, whence); VOP_UNLOCK(vp); } @@ -1320,8 +1403,8 @@ fuse_vnop_ioctl(struct vop_ioctl_args *ap) err = vop_stdioctl(ap); break; default: - /* TODO: implement FUSE_IOCTL */ - err = ENOTTY; + err = fuse_vnop_do_ioctl(vp, ap->a_command, ap->a_data, + ap->a_fflag, cred, td); break; } return (err); diff --git a/sys/fs/nfsclient/nfs_clvnops.c b/sys/fs/nfsclient/nfs_clvnops.c index 7484a5a7e082..1bd77ab27ced 100644 --- a/sys/fs/nfsclient/nfs_clvnops.c +++ b/sys/fs/nfsclient/nfs_clvnops.c @@ -3779,7 +3779,8 @@ nfs_getacl(struct vop_getacl_args *ap) return (EINVAL); error = nfsrpc_getacl(ap->a_vp, ap->a_type, ap->a_cred, ap->a_td, ap->a_aclp); - if (error == 0 && ap->a_aclp->acl_cnt == 0) + if (error == 0 && ap->a_aclp->acl_cnt == 0 && + ap->a_type != ACL_TYPE_DEFAULT) return (EOPNOTSUPP); if (error > NFSERR_STALE) { (void) nfscl_maperr(ap->a_td, error, (uid_t)0, (gid_t)0); diff --git a/sys/fs/nfsserver/nfs_nfsdport.c b/sys/fs/nfsserver/nfs_nfsdport.c index 7d64f211b058..1e215b52e835 100644 --- a/sys/fs/nfsserver/nfs_nfsdport.c +++ b/sys/fs/nfsserver/nfs_nfsdport.c @@ -1977,6 +1977,7 @@ nfsvno_open(struct nfsrv_descript *nd, struct nameidata *ndp, struct nfsexstuff nes; struct thread *p = curthread; uint32_t oldrepstat; + u_long savflags; if (ndp->ni_vp == NULL) { /* @@ -1991,6 +1992,15 @@ nfsvno_open(struct nfsrv_descript *nd, struct nameidata *ndp, } if (!nd->nd_repstat) { if (ndp->ni_vp == NULL) { + /* + * Most file systems ignore va_flags for + * VOP_CREATE(), however setting va_flags + * for VOP_CREATE() causes problems for ZFS. + * So disable them and let nfsrv_fixattr() + * do them, as required. + */ + savflags = nvap->na_flags; + nvap->na_flags = VNOVAL; nd->nd_repstat = VOP_CREATE(ndp->ni_dvp, &ndp->ni_vp, &ndp->ni_cnd, &nvap->na_vattr); /* For a pNFS server, create the data file on a DS. */ @@ -2003,6 +2013,7 @@ nfsvno_open(struct nfsrv_descript *nd, struct nameidata *ndp, nfsrv_pnfscreate(ndp->ni_vp, &nvap->na_vattr, cred, p); } + nvap->na_flags = savflags; VOP_VPUT_PAIR(ndp->ni_dvp, nd->nd_repstat == 0 ? &ndp->ni_vp : NULL, false); nfsvno_relpathbuf(ndp); diff --git a/sys/fs/nfsserver/nfs_nfsdsubs.c b/sys/fs/nfsserver/nfs_nfsdsubs.c index ea8382e4282a..c8c78d98be72 100644 --- a/sys/fs/nfsserver/nfs_nfsdsubs.c +++ b/sys/fs/nfsserver/nfs_nfsdsubs.c @@ -1697,6 +1697,44 @@ nfsrv_fixattr(struct nfsrv_descript *nd, vnode_t vp, NFSCLRBIT_ATTRBIT(attrbitp, NFSATTRBIT_OWNERGROUP); } } + + /* + * For archive, ZFS sets it by default for new files, + * so if specified, it must be set or cleared. + * For hidden and system, no file system sets them + * by default upon creation, so they only need to be + * set and not cleared. + */ + if (NFSISSET_ATTRBIT(attrbitp, NFSATTRBIT_ARCHIVE)) { + if (nva.na_flags == VNOVAL) + nva.na_flags = 0; + if ((nvap->na_flags & UF_ARCHIVE) != 0) + nva.na_flags |= UF_ARCHIVE; + change++; + NFSSETBIT_ATTRBIT(&nattrbits, NFSATTRBIT_ARCHIVE); + } + if (NFSISSET_ATTRBIT(attrbitp, NFSATTRBIT_HIDDEN)) { + if ((nvap->na_flags & UF_HIDDEN) != 0) { + if (nva.na_flags == VNOVAL) + nva.na_flags = 0; + nva.na_flags |= UF_HIDDEN; + change++; + NFSSETBIT_ATTRBIT(&nattrbits, NFSATTRBIT_HIDDEN); + } else { + NFSCLRBIT_ATTRBIT(attrbitp, NFSATTRBIT_HIDDEN); + } + } + if (NFSISSET_ATTRBIT(attrbitp, NFSATTRBIT_SYSTEM)) { + if ((nvap->na_flags & UF_SYSTEM) != 0) { + if (nva.na_flags == VNOVAL) + nva.na_flags = 0; + nva.na_flags |= UF_SYSTEM; + change++; + NFSSETBIT_ATTRBIT(&nattrbits, NFSATTRBIT_SYSTEM); + } else { + NFSCLRBIT_ATTRBIT(attrbitp, NFSATTRBIT_SYSTEM); + } + } if (change) { error = nfsvno_setattr(vp, &nva, nd->nd_cred, p, exp); if (error) { diff --git a/sys/i386/i386/mp_machdep.c b/sys/i386/i386/mp_machdep.c index f7d9289b1848..18ec0d83fad3 100644 --- a/sys/i386/i386/mp_machdep.c +++ b/sys/i386/i386/mp_machdep.c @@ -369,8 +369,6 @@ start_all_aps(void) u_int32_t mpbioswarmvec; int apic_id, cpu; - mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); - pmap_remap_lower(true); /* install the AP 1st level boot code */ diff --git a/sys/kern/kern_syscalls.c b/sys/kern/kern_syscalls.c index a93d711e7597..7ddc28ed4e26 100644 --- a/sys/kern/kern_syscalls.c +++ b/sys/kern/kern_syscalls.c @@ -161,8 +161,14 @@ kern_syscall_deregister(struct sysent *sysents, int offset, { struct sysent *se; - if (offset == 0) - return (0); /* XXX? */ + if (offset == 0) { + /* + * Syscall #0 is reserved and is not dynamically registered. + * Treat deregistration as a no-op to simplify module unload + * paths. + */ + return (0); + } se = &sysents[offset]; if ((se->sy_thrcnt & SY_THR_STATIC) != 0) diff --git a/sys/kern/link_elf.c b/sys/kern/link_elf.c index ebd203858b66..45edd186e6ce 100644 --- a/sys/kern/link_elf.c +++ b/sys/kern/link_elf.c @@ -155,7 +155,7 @@ static int link_elf_search_symbol(linker_file_t, caddr_t, c_linker_sym_t *, long *); static void link_elf_unload_file(linker_file_t); -static void link_elf_unload_preload(linker_file_t); +static void link_elf_unload_preload(elf_file_t); static int link_elf_lookup_set(linker_file_t, const char *, void ***, void ***, int *); static int link_elf_each_function_name(linker_file_t, @@ -799,10 +799,10 @@ parse_vnet(elf_file_t ef) /* * Apply the specified protection to the loadable segments of a preloaded linker - * file. + * file. If "reset" is not set, the original segment protections are ORed in. */ static int -preload_protect(elf_file_t ef, vm_prot_t prot) +preload_protect1(elf_file_t ef, vm_prot_t prot, bool reset) { #if defined(__aarch64__) || defined(__amd64__) Elf_Ehdr *hdr; @@ -818,13 +818,16 @@ preload_protect(elf_file_t ef, vm_prot_t prot) if (phdr->p_type != PT_LOAD) continue; - nprot = prot | VM_PROT_READ; - if ((phdr->p_flags & PF_W) != 0) - nprot |= VM_PROT_WRITE; - if ((phdr->p_flags & PF_X) != 0) - nprot |= VM_PROT_EXECUTE; + nprot = VM_PROT_NONE; + if (!reset) { + nprot = VM_PROT_READ; + if ((phdr->p_flags & PF_W) != 0) + nprot |= VM_PROT_WRITE; + if ((phdr->p_flags & PF_X) != 0) + nprot |= VM_PROT_EXECUTE; + } error = pmap_change_prot((vm_offset_t)ef->address + - phdr->p_vaddr, round_page(phdr->p_memsz), nprot); + phdr->p_vaddr, round_page(phdr->p_memsz), prot | nprot); if (error != 0) break; } @@ -834,6 +837,18 @@ preload_protect(elf_file_t ef, vm_prot_t prot) #endif } +static int +preload_protect(elf_file_t ef, vm_prot_t prot) +{ + return (preload_protect1(ef, prot, false)); +} + +static int +preload_protect_reset(elf_file_t ef, vm_prot_t prot) +{ + return (preload_protect1(ef, prot, true)); +} + #ifdef __arm__ /* * Locate the ARM exception/unwind table info for DDB and stack(9) use by @@ -1396,7 +1411,7 @@ link_elf_unload_file(linker_file_t file) elf_cpu_unload_file(file); if (ef->preloaded) { - link_elf_unload_preload(file); + link_elf_unload_preload(ef); return; } @@ -1417,11 +1432,16 @@ link_elf_unload_file(linker_file_t file) } static void -link_elf_unload_preload(linker_file_t file) +link_elf_unload_preload(elf_file_t ef) { + /* + * Reset mapping protections to their original state. This affects the + * direct map alias of the module mapping as well. + */ + preload_protect_reset(ef, VM_PROT_RW); - if (file->pathname != NULL) - preload_delete_name(file->pathname); + if (ef->lf.pathname != NULL) + preload_delete_name(ef->lf.pathname); } static const char * diff --git a/sys/kern/link_elf_obj.c b/sys/kern/link_elf_obj.c index a3a53a39bfd6..4128baa5a909 100644 --- a/sys/kern/link_elf_obj.c +++ b/sys/kern/link_elf_obj.c @@ -1305,6 +1305,20 @@ link_elf_unload_file(linker_file_t file) vnet_data_free(ef->progtab[i].addr, ef->progtab[i].size); #endif + else if (ef->preloaded) { + vm_offset_t start, end; + + start = (vm_offset_t)ef->progtab[i].addr; + end = start + ef->progtab[i].size; + + /* + * Reset mapping protections to their original + * state. This affects the direct map alias of + * the module mapping as well. + */ + link_elf_protect_range(ef, trunc_page(start), + round_page(end), VM_PROT_RW); + } } } if (ef->preloaded) { diff --git a/sys/kern/subr_bus.c b/sys/kern/subr_bus.c index d2363d6c625e..c9d64e3674c6 100644 --- a/sys/kern/subr_bus.c +++ b/sys/kern/subr_bus.c @@ -1557,7 +1557,7 @@ device_delete_child(device_t dev, device_t child) return (error); } - device_destroy_props(dev); + device_destroy_props(child); if (child->devclass) devclass_delete_device(child->devclass, child); if (child->parent) diff --git a/sys/kern/tty.c b/sys/kern/tty.c index 067471eb949a..9297fc81df5e 100644 --- a/sys/kern/tty.c +++ b/sys/kern/tty.c @@ -1036,7 +1036,7 @@ static bool ttydevsw_defbusy(struct tty *tp __unused) { - return (FALSE); + return (false); } /* diff --git a/sys/kern/vfs_cache.c b/sys/kern/vfs_cache.c index 557e451f9a45..3f8591bd0ba7 100644 --- a/sys/kern/vfs_cache.c +++ b/sys/kern/vfs_cache.c @@ -384,14 +384,10 @@ struct namecache { }; /* - * struct namecache_ts repeats struct namecache layout up to the - * nc_nlen member. * struct namecache_ts is used in place of struct namecache when time(s) need * to be stored. The nc_dotdottime field is used when a cache entry is mapping * both a non-dotdot directory name plus dotdot for the directory's * parent. - * - * See below for alignment requirement. */ struct namecache_ts { struct timespec nc_time; /* timespec provided by fs */ @@ -404,43 +400,52 @@ struct namecache_ts { TAILQ_HEAD(cache_freebatch, namecache); /* - * At least mips n32 performs 64-bit accesses to timespec as found - * in namecache_ts and requires them to be aligned. Since others - * may be in the same spot suffer a little bit and enforce the - * alignment for everyone. Note this is a nop for 64-bit platforms. + * Ensure all zones are sufficently aligned to hold both + * struct namecache and struct namecache_ts. */ -#define CACHE_ZONE_ALIGNMENT UMA_ALIGNOF(time_t) +#define CACHE_ZONE_ALIGN_MASK UMA_ALIGNOF(struct namecache_ts) /* - * TODO: the initial value of CACHE_PATH_CUTOFF was inherited from the - * 4.4 BSD codebase. Later on struct namecache was tweaked to become - * smaller and the value was bumped to retain the total size, but it - * was never re-evaluated for suitability. A simple test counting - * lengths during package building shows that the value of 45 covers - * about 86% of all added entries, reaching 99% at 65. + * TODO: CACHE_PATH_CUTOFF was initially introduced with an arbitrary + * value of 32 in FreeBSD 5.2.0. It was bumped to 35 and the path was + * NUL terminated with the introduction of DTrace probes. Later, it was + * expanded to match the alignment allowing an increase to 39, but it + * was not re-evaluated for suitability. It was again bumped to 45 on + * 64-bit systems and 41 on 32-bit systems (the current values, now + * computed at compile time rather than hardcoded). A simple test + * counting lengths during package building in 2020 showed that the + * value of 45 covers about 86% of all added entries, reaching 99% + * at 65. * * Regardless of the above, use of dedicated zones instead of malloc may be * inducing additional waste. This may be hard to address as said zones are * tied to VFS SMR. Even if retaining them, the current split should be * re-evaluated. */ -#ifdef __LP64__ -#define CACHE_PATH_CUTOFF 45 -#define CACHE_LARGE_PAD 6 -#else -#define CACHE_PATH_CUTOFF 41 -#define CACHE_LARGE_PAD 2 -#endif - -#define CACHE_ZONE_SMALL_SIZE (offsetof(struct namecache, nc_name) + CACHE_PATH_CUTOFF + 1) -#define CACHE_ZONE_SMALL_TS_SIZE (offsetof(struct namecache_ts, nc_nc) + CACHE_ZONE_SMALL_SIZE) -#define CACHE_ZONE_LARGE_SIZE (offsetof(struct namecache, nc_name) + NAME_MAX + 1 + CACHE_LARGE_PAD) -#define CACHE_ZONE_LARGE_TS_SIZE (offsetof(struct namecache_ts, nc_nc) + CACHE_ZONE_LARGE_SIZE) - -_Static_assert((CACHE_ZONE_SMALL_SIZE % (CACHE_ZONE_ALIGNMENT + 1)) == 0, "bad zone size"); -_Static_assert((CACHE_ZONE_SMALL_TS_SIZE % (CACHE_ZONE_ALIGNMENT + 1)) == 0, "bad zone size"); -_Static_assert((CACHE_ZONE_LARGE_SIZE % (CACHE_ZONE_ALIGNMENT + 1)) == 0, "bad zone size"); -_Static_assert((CACHE_ZONE_LARGE_TS_SIZE % (CACHE_ZONE_ALIGNMENT + 1)) == 0, "bad zone size"); +#define CACHE_PATH_CUTOFF_MIN 40 +#define CACHE_STRUCT_LEN(pathlen) \ + (offsetof(struct namecache, nc_name) + (pathlen) + 1) +#define CACHE_PATH_CUTOFF \ + (roundup2(CACHE_STRUCT_LEN(CACHE_PATH_CUTOFF_MIN), \ + _Alignof(struct namecache_ts)) - CACHE_STRUCT_LEN(0)) + +#define CACHE_ZONE_SMALL_SIZE \ + CACHE_STRUCT_LEN(CACHE_PATH_CUTOFF) +#define CACHE_ZONE_SMALL_TS_SIZE \ + (offsetof(struct namecache_ts, nc_nc) + CACHE_ZONE_SMALL_SIZE) +#define CACHE_ZONE_LARGE_SIZE \ + roundup2(CACHE_STRUCT_LEN(NAME_MAX), _Alignof(struct namecache_ts)) +#define CACHE_ZONE_LARGE_TS_SIZE \ + (offsetof(struct namecache_ts, nc_nc) + CACHE_ZONE_LARGE_SIZE) + +_Static_assert((CACHE_ZONE_SMALL_SIZE % (CACHE_ZONE_ALIGN_MASK + 1)) == 0, + "bad zone size"); +_Static_assert((CACHE_ZONE_SMALL_TS_SIZE % (CACHE_ZONE_ALIGN_MASK + 1)) == 0, + "bad zone size"); +_Static_assert((CACHE_ZONE_LARGE_SIZE % (CACHE_ZONE_ALIGN_MASK + 1)) == 0, + "bad zone size"); +_Static_assert((CACHE_ZONE_LARGE_TS_SIZE % (CACHE_ZONE_ALIGN_MASK + 1)) == 0, + "bad zone size"); #define nc_vp n_un.nu_vp #define nc_neg n_un.nu_neg @@ -2785,13 +2790,13 @@ nchinit(void *dummy __unused) u_int i; cache_zone_small = uma_zcreate("S VFS Cache", CACHE_ZONE_SMALL_SIZE, - NULL, NULL, NULL, NULL, CACHE_ZONE_ALIGNMENT, UMA_ZONE_ZINIT); + NULL, NULL, NULL, NULL, CACHE_ZONE_ALIGN_MASK, UMA_ZONE_ZINIT); cache_zone_small_ts = uma_zcreate("STS VFS Cache", CACHE_ZONE_SMALL_TS_SIZE, - NULL, NULL, NULL, NULL, CACHE_ZONE_ALIGNMENT, UMA_ZONE_ZINIT); + NULL, NULL, NULL, NULL, CACHE_ZONE_ALIGN_MASK, UMA_ZONE_ZINIT); cache_zone_large = uma_zcreate("L VFS Cache", CACHE_ZONE_LARGE_SIZE, - NULL, NULL, NULL, NULL, CACHE_ZONE_ALIGNMENT, UMA_ZONE_ZINIT); + NULL, NULL, NULL, NULL, CACHE_ZONE_ALIGN_MASK, UMA_ZONE_ZINIT); cache_zone_large_ts = uma_zcreate("LTS VFS Cache", CACHE_ZONE_LARGE_TS_SIZE, - NULL, NULL, NULL, NULL, CACHE_ZONE_ALIGNMENT, UMA_ZONE_ZINIT); + NULL, NULL, NULL, NULL, CACHE_ZONE_ALIGN_MASK, UMA_ZONE_ZINIT); VFS_SMR_ZONE_SET(cache_zone_small); VFS_SMR_ZONE_SET(cache_zone_small_ts); diff --git a/sys/modules/Makefile b/sys/modules/Makefile index 138adc30c213..f7e104489fa8 100644 --- a/sys/modules/Makefile +++ b/sys/modules/Makefile @@ -651,8 +651,7 @@ _rtwnfw= rtwnfw .endif .if ${MK_SOURCELESS_UCODE} != "no" && ${MACHINE_CPUARCH} != "arm" && \ - ${MACHINE_ARCH} != "powerpc" && ${MACHINE_ARCH} != "powerpcspe" && \ - ${MACHINE_CPUARCH} != "riscv" + ${MACHINE_ARCH} != "powerpc" && ${MACHINE_CPUARCH} != "riscv" _cxgbe= cxgbe .endif @@ -667,7 +666,7 @@ _genet= genet .endif .if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "aarch64" || \ - ${MACHINE_ARCH:Mpowerpc64*} + ${MACHINE_ARCH:Mpowerpc64*} != "" _ice= ice .if ${MK_SOURCELESS_UCODE} != "no" _ice_ddp= ice_ddp @@ -677,6 +676,7 @@ _ice_ddp= ice_ddp _irdma= irdma .endif .endif +_ixl= ixl .endif .if ${MACHINE_CPUARCH} == "aarch64" @@ -693,7 +693,7 @@ _sdhci_fdt= sdhci_fdt .endif # These rely on 64bit atomics -.if ${MACHINE_ARCH} != "powerpc" && ${MACHINE_ARCH} != "powerpcspe" +.if ${MACHINE_ARCH} != "powerpc" _mps= mps _mpr= mpr .endif @@ -918,12 +918,10 @@ _ffec= ffec .endif .if ${MACHINE_ARCH:Mpowerpc64*} != "" -_ixl= ixl _nvram= opal_nvram .endif -.if ${MACHINE_CPUARCH} == "powerpc" && ${MACHINE_ARCH} != "powerpcspe" -# Don't build powermac_nvram for powerpcspe, it's never supported. +.if ${MACHINE_CPUARCH} == "powerpc" _nvram+= powermac_nvram .endif diff --git a/sys/modules/asmc/Makefile b/sys/modules/asmc/Makefile index f1b4a981ad24..4ba45a4625d8 100644 --- a/sys/modules/asmc/Makefile +++ b/sys/modules/asmc/Makefile @@ -1,6 +1,6 @@ .PATH: ${SRCTOP}/sys/dev/asmc KMOD= asmc -SRCS= asmc.c opt_acpi.h acpi_if.h bus_if.h device_if.h +SRCS= asmc.c opt_acpi.h opt_asmc.h acpi_if.h bus_if.h device_if.h .include <bsd.kmod.mk> diff --git a/sys/modules/dtb/sophgo/Makefile b/sys/modules/dtb/sophgo/Makefile new file mode 100644 index 000000000000..89a1834bfa8f --- /dev/null +++ b/sys/modules/dtb/sophgo/Makefile @@ -0,0 +1,15 @@ +.if ${MACHINE_ARCH} == "aarch64" +DTS= \ + sophgo/sg2000_milkv_duos_glibc_arm64_emmc.dts \ + sophgo/sg2000_milkv_duos_glibc_arm64_sd.dts \ + sophgo/sg2000_wevb_arm64_sd.dts + +.elif ${MACHINE_ARCH} == "riscv" +DTS= \ + sophgo/sg2000_milkv_duos_musl_riscv64_emmc.dts \ + sophgo/sg2000_milkv_duos_musl_riscv64_sd.dts \ + sophgo/sg2000_wevb_riscv64_sd.dts + +.endif + +.include <bsd.dtb.mk> diff --git a/sys/modules/linux/Makefile b/sys/modules/linux/Makefile index eb4e17ec706b..8904e8005416 100644 --- a/sys/modules/linux/Makefile +++ b/sys/modules/linux/Makefile @@ -76,6 +76,7 @@ SRCS+= imgact_linux.c \ .if ${MACHINE_CPUARCH} == "i386" EXPORT_SYMS= +EXPORT_SYMS+= linux_device_register_handler EXPORT_SYMS+= linux_get_osname EXPORT_SYMS+= linux_get_osrelease EXPORT_SYMS+= linux_ioctl_register_handler diff --git a/sys/modules/linux_common/Makefile b/sys/modules/linux_common/Makefile index 291fc6d25f8c..1fa740b8b823 100644 --- a/sys/modules/linux_common/Makefile +++ b/sys/modules/linux_common/Makefile @@ -13,6 +13,7 @@ SRCS+= linux_x86.c linux_vdso_selector_x86.c .endif EXPORT_SYMS= +EXPORT_SYMS+= linux_device_register_handler EXPORT_SYMS+= linux_get_osname EXPORT_SYMS+= linux_get_osrelease diff --git a/sys/modules/linuxkpi/Makefile b/sys/modules/linuxkpi/Makefile index a662f5dffbb6..c465c76a7626 100644 --- a/sys/modules/linuxkpi/Makefile +++ b/sys/modules/linuxkpi/Makefile @@ -28,6 +28,7 @@ SRCS= linux_compat.c \ linux_shmemfs.c \ linux_shrinker.c \ linux_simple_attr.c \ + linux_siphash.c \ linux_skbuff.c \ linux_slab.c \ linux_tasklet.c \ diff --git a/sys/modules/qat/qat_api/Makefile b/sys/modules/qat/qat_api/Makefile index 24fbcb46a987..22802c87758d 100644 --- a/sys/modules/qat/qat_api/Makefile +++ b/sys/modules/qat/qat_api/Makefile @@ -84,7 +84,7 @@ opt_qat.h: @echo "#define QAT_DISABLE_SAFE_DC_MODE 1" >> ${.TARGET} .endif .endif - +EXPORT_SYMS=YES .include <bsd.kmod.mk> CWARNFLAGS+= -Wno-cast-qual diff --git a/sys/modules/qat/qat_common/Makefile b/sys/modules/qat/qat_common/Makefile index af8ce86d6be2..541a5da91d40 100644 --- a/sys/modules/qat/qat_common/Makefile +++ b/sys/modules/qat/qat_common/Makefile @@ -40,5 +40,5 @@ opt_qat.h: @echo "#define QAT_DISABLE_SAFE_DC_MODE 1" >> ${.TARGET} .endif .endif - +EXPORT_SYMS=YES .include <bsd.kmod.mk> diff --git a/sys/modules/sound/driver/dummy/Makefile b/sys/modules/sound/driver/dummy/Makefile index fb4127d35073..41dec7c83b4d 100644 --- a/sys/modules/sound/driver/dummy/Makefile +++ b/sys/modules/sound/driver/dummy/Makefile @@ -1,7 +1,7 @@ .PATH: ${SRCTOP}/sys/dev/sound KMOD= snd_dummy -SRCS= bus_if.h device_if.h +SRCS= bus_if.h device_if.h mpufoi_if.h SRCS+= dummy.c .include <bsd.kmod.mk> diff --git a/sys/modules/sound/sound/Makefile b/sys/modules/sound/sound/Makefile index 169b1a2730ec..4b38e614f689 100644 --- a/sys/modules/sound/sound/Makefile +++ b/sys/modules/sound/sound/Makefile @@ -15,8 +15,9 @@ SRCS+= feeder_eq_gen.h feeder_rate_gen.h snd_fxdiv_gen.h SRCS+= mpu_if.h mpufoi_if.h SRCS+= mpu_if.c mpufoi_if.c SRCS+= ac97.c buffer.c channel.c dsp.c -SRCS+= mixer.c sndstat.c sound.c vchan.c +SRCS+= mixer.c sound.c vchan.c SRCS+= midi.c mpu401.c +SRCS+= sndstat.c feeder_eq_gen.h: ${SYSDIR}/tools/sound/feeder_eq_mkfilter.awk ${AWK} -f ${SYSDIR}/tools/sound/feeder_eq_mkfilter.awk -- ${FEEDER_EQ_PRESETS} > ${.TARGET} diff --git a/sys/modules/vmm/Makefile b/sys/modules/vmm/Makefile index 066b4d814348..dcb401d2026d 100644 --- a/sys/modules/vmm/Makefile +++ b/sys/modules/vmm/Makefile @@ -18,7 +18,8 @@ SRCS+= vmm.c \ vmm_dev_machdep.c \ vmm_instruction_emul.c \ vmm_mem.c \ - vmm_stat.c + vmm_stat.c \ + vmm_vm.c .if ${MACHINE_CPUARCH} == "aarch64" CFLAGS+= -I${SRCTOP}/sys/${MACHINE}/vmm/io diff --git a/sys/modules/zfs/Makefile b/sys/modules/zfs/Makefile index 2751bb465258..fed29336e5de 100644 --- a/sys/modules/zfs/Makefile +++ b/sys/modules/zfs/Makefile @@ -45,7 +45,7 @@ CFLAGS+= -D__x86_64 -DHAVE_SSE2 -DHAVE_SSSE3 -DHAVE_SSE4_1 -DHAVE_SSE4_2 \ .endif .if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "powerpc" || \ - ${MACHINE_ARCH} == "powerpcspe" || ${MACHINE_ARCH} == "arm" + ${MACHINE_ARCH} == "arm" CFLAGS+= -DBITS_PER_LONG=32 .else CFLAGS+= -DBITS_PER_LONG=64 @@ -175,7 +175,7 @@ SRCS+= acl_common.c \ .if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "powerpc" || \ - ${MACHINE_ARCH} == "powerpcspe" || ${MACHINE_ARCH} == "arm" + ${MACHINE_ARCH} == "arm" SRCS+= spl_atomic.c .endif diff --git a/sys/net/if_bridge.c b/sys/net/if_bridge.c index 9a468a8eb462..5bdd8613245e 100644 --- a/sys/net/if_bridge.c +++ b/sys/net/if_bridge.c @@ -1990,9 +1990,6 @@ bridge_ioctl_sifvlanset(struct bridge_softc *sc, void *arg) struct ifbif_vlan_req *req = arg; struct bridge_iflist *bif; - if ((sc->sc_flags & IFBRF_VLANFILTER) == 0) - return (EXTERROR(EINVAL, "VLAN filtering not enabled")); - bif = bridge_lookup_member(sc, req->bv_ifname); if (bif == NULL) return (EXTERROR(ENOENT, "Interface is not a bridge member")); diff --git a/sys/net/iflib.c b/sys/net/iflib.c index bd0bfe4742df..5c37f199e84c 100644 --- a/sys/net/iflib.c +++ b/sys/net/iflib.c @@ -202,6 +202,7 @@ struct iflib_ctx { uint16_t ifc_sysctl_extra_msix_vectors; bool ifc_cpus_are_physical_cores; bool ifc_sysctl_simple_tx; + bool ifc_sysctl_tx_defer_mfree; uint16_t ifc_sysctl_tx_reclaim_thresh; uint16_t ifc_sysctl_tx_reclaim_ticks; @@ -298,6 +299,8 @@ typedef struct iflib_sw_tx_desc_array { bus_dmamap_t *ifsd_map; /* bus_dma maps for packet */ bus_dmamap_t *ifsd_tso_map; /* bus_dma maps for TSO packet */ struct mbuf **ifsd_m; /* pkthdr mbufs */ + struct mbuf **ifsd_m_defer; /* deferred mbuf ptr */ + struct mbuf **ifsd_m_deferb;/* deferred mbuf backing ptr */ } if_txsd_vec_t; /* magic number that should be high enough for any hardware */ @@ -318,6 +321,20 @@ typedef struct iflib_sw_tx_desc_array { #define IFLIB_RESTART_BUDGET 8 + +/* + * Encode TSO or !TSO in the low bits of the tx ifsd_m pointer so as + * to avoid defref'ing the mbuf to determine the correct busdma resources + * to release + */ +#define IFLIB_TSO (1ULL << 0) +#define IFLIB_NO_TSO (2ULL << 0) +#define IFLIB_FLAGS_MASK (0x3ULL) +#define IFLIB_SAVE_MBUF(mbuf, flags) ((void *)(((uintptr_t)mbuf) | flags)) +#define IFLIB_GET_FLAGS(a) ((uintptr_t)a & IFLIB_FLAGS_MASK) +#define IFLIB_GET_MBUF(a) ((struct mbuf *)((uintptr_t)a & ~IFLIB_FLAGS_MASK)) + + #define IFC_LEGACY 0x001 #define IFC_QFLUSH 0x002 #define IFC_MULTISEG 0x004 @@ -343,7 +360,9 @@ struct iflib_txq { qidx_t ift_cidx_processed; qidx_t ift_pidx; uint8_t ift_gen; - uint8_t ift_br_offset; + uint8_t ift_br_offset:1, + ift_defer_mfree:1, + ift_spare_bits0:6; uint16_t ift_npending; uint16_t ift_db_pending; uint16_t ift_rs_pending; @@ -485,61 +504,6 @@ typedef struct if_rxsd { iflib_fl_t ifsd_fl; } *if_rxsd_t; -/* multiple of word size */ -#ifdef __LP64__ -#define PKT_INFO_SIZE 7 -#define RXD_INFO_SIZE 5 -#define PKT_TYPE uint64_t -#else -#define PKT_INFO_SIZE 12 -#define RXD_INFO_SIZE 8 -#define PKT_TYPE uint32_t -#endif -#define PKT_LOOP_BOUND ((PKT_INFO_SIZE / 3) * 3) -#define RXD_LOOP_BOUND ((RXD_INFO_SIZE / 4) * 4) - -typedef struct if_pkt_info_pad { - PKT_TYPE pkt_val[PKT_INFO_SIZE]; -} *if_pkt_info_pad_t; -typedef struct if_rxd_info_pad { - PKT_TYPE rxd_val[RXD_INFO_SIZE]; -} *if_rxd_info_pad_t; - -CTASSERT(sizeof(struct if_pkt_info_pad) == sizeof(struct if_pkt_info)); -CTASSERT(sizeof(struct if_rxd_info_pad) == sizeof(struct if_rxd_info)); - -static inline void -pkt_info_zero(if_pkt_info_t pi) -{ - if_pkt_info_pad_t pi_pad; - - pi_pad = (if_pkt_info_pad_t)pi; - pi_pad->pkt_val[0] = 0; pi_pad->pkt_val[1] = 0; pi_pad->pkt_val[2] = 0; - pi_pad->pkt_val[3] = 0; pi_pad->pkt_val[4] = 0; pi_pad->pkt_val[5] = 0; -#ifndef __LP64__ - pi_pad->pkt_val[6] = 0; pi_pad->pkt_val[7] = 0; pi_pad->pkt_val[8] = 0; - pi_pad->pkt_val[9] = 0; pi_pad->pkt_val[10] = 0; -#endif -} - -static inline void -rxd_info_zero(if_rxd_info_t ri) -{ - if_rxd_info_pad_t ri_pad; - int i; - - ri_pad = (if_rxd_info_pad_t)ri; - for (i = 0; i < RXD_LOOP_BOUND; i += 4) { - ri_pad->rxd_val[i] = 0; - ri_pad->rxd_val[i + 1] = 0; - ri_pad->rxd_val[i + 2] = 0; - ri_pad->rxd_val[i + 3] = 0; - } -#ifdef __LP64__ - ri_pad->rxd_val[RXD_INFO_SIZE - 1] = 0; -#endif -} - /* * Only allow a single packet to take up most 1/nth of the tx ring */ @@ -735,7 +699,8 @@ static void iflib_free_intr_mem(if_ctx_t ctx); #ifndef __NO_STRICT_ALIGNMENT static struct mbuf *iflib_fixup_rx(struct mbuf *m); #endif -static __inline int iflib_completed_tx_reclaim(iflib_txq_t txq); +static __inline int iflib_completed_tx_reclaim(iflib_txq_t txq, + struct mbuf **m_defer); static SLIST_HEAD(cpu_offset_list, cpu_offset) cpu_offsets = SLIST_HEAD_INITIALIZER(cpu_offsets); @@ -1048,7 +1013,7 @@ iflib_netmap_txsync(struct netmap_kring *kring, int flags) if (nm_i != head) { /* we have new packets to send */ uint32_t pkt_len = 0, seg_idx = 0; int nic_i_start = -1, flags = 0; - pkt_info_zero(&pi); + memset(&pi, 0, sizeof(pi)); pi.ipi_segs = txq->ift_segs; pi.ipi_qsidx = kring->ring_id; nic_i = netmap_idx_k2n(kring, nm_i); @@ -1241,7 +1206,7 @@ iflib_netmap_rxsync(struct netmap_kring *kring, int flags) nm_i = netmap_idx_n2k(kring, nic_i); MPASS(nm_i == kring->nr_hwtail); for (n = 0; avail > 0 && nm_i != hwtail_lim; n++, avail--) { - rxd_info_zero(&ri); + memset(&ri, 0, sizeof(ri)); ri.iri_frags = rxq->ifr_frags; ri.iri_qsidx = kring->ring_id; ri.iri_ifp = ctx->ifc_ifp; @@ -1786,7 +1751,16 @@ iflib_txsd_alloc(iflib_txq_t txq) err = ENOMEM; goto fail; } - + if (ctx->ifc_sysctl_simple_tx) { + if (!(txq->ift_sds.ifsd_m_defer = + (struct mbuf **) malloc(sizeof(struct mbuf *) * + scctx->isc_ntxd[txq->ift_br_offset], M_IFLIB, M_NOWAIT | M_ZERO))) { + device_printf(dev, "Unable to allocate TX mbuf map memory\n"); + err = ENOMEM; + goto fail; + } + } + txq->ift_sds.ifsd_m_deferb = txq->ift_sds.ifsd_m_defer; /* * Create the DMA maps for TX buffers. */ @@ -1879,6 +1853,10 @@ iflib_txq_destroy(iflib_txq_t txq) free(txq->ift_sds.ifsd_m, M_IFLIB); txq->ift_sds.ifsd_m = NULL; } + if (txq->ift_sds.ifsd_m_defer != NULL) { + free(txq->ift_sds.ifsd_m_defer, M_IFLIB); + txq->ift_sds.ifsd_m_defer = NULL; + } if (txq->ift_buf_tag != NULL) { bus_dma_tag_destroy(txq->ift_buf_tag); txq->ift_buf_tag = NULL; @@ -1895,10 +1873,10 @@ iflib_txq_destroy(iflib_txq_t txq) static void iflib_txsd_free(if_ctx_t ctx, iflib_txq_t txq, int i) { - struct mbuf **mp; + struct mbuf *m; - mp = &txq->ift_sds.ifsd_m[i]; - if (*mp == NULL) + m = IFLIB_GET_MBUF(txq->ift_sds.ifsd_m[i]); + if (m == NULL) return; if (txq->ift_sds.ifsd_map != NULL) { @@ -1912,9 +1890,8 @@ iflib_txsd_free(if_ctx_t ctx, iflib_txq_t txq, int i) bus_dmamap_unload(txq->ift_tso_buf_tag, txq->ift_sds.ifsd_tso_map[i]); } - m_freem(*mp); + m_freem(m); DBG_COUNTER_INC(tx_frees); - *mp = NULL; } static int @@ -2966,7 +2943,7 @@ iflib_rxeof(iflib_rxq_t rxq, qidx_t budget) /* * Reset client set fields to their default values */ - rxd_info_zero(&ri); + memset(&ri, 0, sizeof(ri)); ri.iri_qsidx = rxq->ifr_id; ri.iri_cidx = *cidxp; ri.iri_ifp = ifp; @@ -3440,7 +3417,7 @@ iflib_remove_mbuf(iflib_txq_t txq) ntxd = txq->ift_size; pidx = txq->ift_pidx & (ntxd - 1); ifsd_m = txq->ift_sds.ifsd_m; - m = ifsd_m[pidx]; + m = IFLIB_GET_MBUF(ifsd_m[pidx]); ifsd_m[pidx] = NULL; bus_dmamap_unload(txq->ift_buf_tag, txq->ift_sds.ifsd_map[pidx]); if (txq->ift_sds.ifsd_tso_map != NULL) @@ -3507,6 +3484,7 @@ iflib_encap(iflib_txq_t txq, struct mbuf **m_headp) struct mbuf *m_head, **ifsd_m; bus_dmamap_t map; struct if_pkt_info pi; + uintptr_t flags; int remap = 0; int err, nsegs, ndesc, max_segs, pidx; @@ -3530,10 +3508,12 @@ iflib_encap(iflib_txq_t txq, struct mbuf **m_headp) map = txq->ift_sds.ifsd_tso_map[pidx]; MPASS(buf_tag != NULL); MPASS(max_segs > 0); + flags = IFLIB_TSO; } else { buf_tag = txq->ift_buf_tag; max_segs = scctx->isc_tx_nsegments; map = txq->ift_sds.ifsd_map[pidx]; + flags = IFLIB_NO_TSO; } if ((sctx->isc_flags & IFLIB_NEED_ETHER_PAD) && __predict_false(m_head->m_pkthdr.len < scctx->isc_min_frame_size)) { @@ -3545,7 +3525,7 @@ iflib_encap(iflib_txq_t txq, struct mbuf **m_headp) } m_head = *m_headp; - pkt_info_zero(&pi); + memset(&pi, 0, sizeof(pi)); pi.ipi_mflags = (m_head->m_flags & (M_VLANTAG | M_BCAST | M_MCAST)); pi.ipi_pidx = pidx; pi.ipi_qsidx = txq->ift_id; @@ -3606,7 +3586,7 @@ defrag: DBG_COUNTER_INC(encap_txd_encap_fail); return (err); } - ifsd_m[pidx] = m_head; + ifsd_m[pidx] = IFLIB_SAVE_MBUF(m_head, flags); if (m_head->m_pkthdr.csum_flags & CSUM_SND_TAG) pi.ipi_mbuf = m_head; else @@ -3617,7 +3597,7 @@ defrag: * cxgb */ if (__predict_false(nsegs > TXQ_AVAIL(txq))) { - (void)iflib_completed_tx_reclaim(txq); + (void)iflib_completed_tx_reclaim(txq, NULL); if (__predict_false(nsegs > TXQ_AVAIL(txq))) { txq->ift_no_desc_avail++; bus_dmamap_unload(buf_tag, map); @@ -3707,19 +3687,22 @@ defrag_failed: } static void -iflib_tx_desc_free(iflib_txq_t txq, int n) +iflib_tx_desc_free(iflib_txq_t txq, int n, struct mbuf **m_defer) { uint32_t qsize, cidx, gen; struct mbuf *m, **ifsd_m; + uintptr_t flags; cidx = txq->ift_cidx; gen = txq->ift_gen; qsize = txq->ift_size; - ifsd_m = txq->ift_sds.ifsd_m; + ifsd_m =txq->ift_sds.ifsd_m; while (n-- > 0) { - if ((m = ifsd_m[cidx]) != NULL) { - if (m->m_pkthdr.csum_flags & CSUM_TSO) { + if ((m = IFLIB_GET_MBUF(ifsd_m[cidx])) != NULL) { + flags = IFLIB_GET_FLAGS(ifsd_m[cidx]); + MPASS(flags != 0); + if (flags & IFLIB_TSO) { bus_dmamap_sync(txq->ift_tso_buf_tag, txq->ift_sds.ifsd_tso_map[cidx], BUS_DMASYNC_POSTWRITE); @@ -3734,7 +3717,12 @@ iflib_tx_desc_free(iflib_txq_t txq, int n) } /* XXX we don't support any drivers that batch packets yet */ MPASS(m->m_nextpkt == NULL); - m_freem(m); + if (m_defer == NULL) { + m_freem(m); + } else if (m != NULL) { + *m_defer = m; + m_defer++; + } ifsd_m[cidx] = NULL; #if MEMORY_LOGGING txq->ift_dequeued++; @@ -3751,28 +3739,20 @@ iflib_tx_desc_free(iflib_txq_t txq, int n) } static __inline int -iflib_completed_tx_reclaim(iflib_txq_t txq) +iflib_txq_can_reclaim(iflib_txq_t txq) { int reclaim, thresh; - uint32_t now; - if_ctx_t ctx = txq->ift_ctx; thresh = txq->ift_reclaim_thresh; KASSERT(thresh >= 0, ("invalid threshold to reclaim")); MPASS(thresh /*+ MAX_TX_DESC(txq->ift_ctx) */ < txq->ift_size); - now = ticks; - if (now <= (txq->ift_last_reclaim + txq->ift_reclaim_ticks) && + if (ticks <= (txq->ift_last_reclaim + txq->ift_reclaim_ticks) && txq->ift_in_use < thresh) - return (0); - txq->ift_last_reclaim = now; - /* - * Need a rate-limiting check so that this isn't called every time - */ - iflib_tx_credits_update(ctx, txq); + return (false); + iflib_tx_credits_update(txq->ift_ctx, txq); reclaim = DESC_RECLAIMABLE(txq); - - if (reclaim <= thresh /* + MAX_TX_DESC(txq->ift_ctx) */) { + if (reclaim <= thresh) { #ifdef INVARIANTS if (iflib_verbose_debug) { printf("%s processed=%ju cleaned=%ju tx_nsegments=%d reclaim=%d thresh=%d\n", __func__, @@ -3782,10 +3762,27 @@ iflib_completed_tx_reclaim(iflib_txq_t txq) #endif return (0); } - iflib_tx_desc_free(txq, reclaim); + return (reclaim); +} + +static __inline void +_iflib_completed_tx_reclaim(iflib_txq_t txq, struct mbuf **m_defer, int reclaim) +{ + txq->ift_last_reclaim = ticks; + iflib_tx_desc_free(txq, reclaim, m_defer); txq->ift_cleaned += reclaim; txq->ift_in_use -= reclaim; +} +static __inline int +iflib_completed_tx_reclaim(iflib_txq_t txq, struct mbuf **m_defer) +{ + int reclaim; + + reclaim = iflib_txq_can_reclaim(txq); + if (reclaim == 0) + return (0); + _iflib_completed_tx_reclaim(txq, m_defer, reclaim); return (reclaim); } @@ -3846,7 +3843,7 @@ iflib_txq_drain(struct ifmp_ring *r, uint32_t cidx, uint32_t pidx) DBG_COUNTER_INC(txq_drain_notready); return (0); } - reclaimed = iflib_completed_tx_reclaim(txq); + reclaimed = iflib_completed_tx_reclaim(txq, NULL); rang = iflib_txd_db_check(txq, reclaimed && txq->ift_db_pending); avail = IDXDIFF(pidx, cidx, r->size); @@ -4005,7 +4002,7 @@ _task_fn_tx(void *context) #endif if (ctx->ifc_sysctl_simple_tx) { mtx_lock(&txq->ift_mtx); - (void)iflib_completed_tx_reclaim(txq); + (void)iflib_completed_tx_reclaim(txq, NULL); mtx_unlock(&txq->ift_mtx); goto skip_ifmp; } @@ -4204,7 +4201,7 @@ iflib_if_transmit(if_t ifp, struct mbuf *m) if (ctx->isc_txq_select_v2) { struct if_pkt_info pi; uint64_t early_pullups = 0; - pkt_info_zero(&pi); + memset(&pi, 0, sizeof(pi)); err = iflib_parse_header_partial(&pi, &m, &early_pullups); if (__predict_false(err != 0)) { @@ -6817,6 +6814,34 @@ iflib_handle_tx_reclaim_ticks(SYSCTL_HANDLER_ARGS) return (err); } +static int +iflib_handle_tx_defer_mfree(SYSCTL_HANDLER_ARGS) +{ + if_ctx_t ctx = (void *)arg1; + iflib_txq_t txq; + int i, err; + int defer; + + defer = ctx->ifc_sysctl_tx_defer_mfree; + err = sysctl_handle_int(oidp, &defer, arg2, req); + if (err != 0) { + return err; + } + + if (defer == ctx->ifc_sysctl_tx_defer_mfree) + return 0; + + ctx->ifc_sysctl_tx_defer_mfree = defer; + if (ctx->ifc_txqs == NULL) + return (err); + + txq = &ctx->ifc_txqs[0]; + for (i = 0; i < NTXQSETS(ctx); i++, txq++) { + txq->ift_defer_mfree = defer; + } + return (err); +} + #define NAME_BUFLEN 32 static void iflib_add_device_sysctl_pre(if_ctx_t ctx) @@ -6915,6 +6940,11 @@ iflib_add_device_sysctl_post(if_ctx_t ctx) 0, iflib_handle_tx_reclaim_ticks, "I", "Number of ticks before a TX reclaim is forced"); + SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "tx_defer_mfree", + CTLTYPE_INT | CTLFLAG_RWTUN, ctx, + 0, iflib_handle_tx_defer_mfree, "I", + "Free completed transmits outside of TX ring lock"); + if (scctx->isc_ntxqsets > 100) qfmt = "txq%03d"; else if (scctx->isc_ntxqsets > 10) @@ -7162,7 +7192,7 @@ iflib_debugnet_poll(if_t ifp, int count) return (EBUSY); txq = &ctx->ifc_txqs[0]; - (void)iflib_completed_tx_reclaim(txq); + (void)iflib_completed_tx_reclaim(txq, NULL); NET_EPOCH_ENTER(et); for (i = 0; i < scctx->isc_nrxqsets; i++) @@ -7190,7 +7220,8 @@ iflib_simple_transmit(if_t ifp, struct mbuf *m) { if_ctx_t ctx; iflib_txq_t txq; - int error; + struct mbuf **m_defer; + int error, i, reclaimable; int bytes_sent = 0, pkt_sent = 0, mcast_sent = 0; @@ -7216,8 +7247,34 @@ iflib_simple_transmit(if_t ifp, struct mbuf *m) else if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); } - (void)iflib_completed_tx_reclaim(txq); + m_defer = NULL; + reclaimable = iflib_txq_can_reclaim(txq); + if (reclaimable != 0) { + /* + * Try to set m_defer to the deferred mbuf reclaim array. If + * we can, the frees will happen outside the tx lock. If we + * can't, it means another thread is still proccessing frees. + */ + if (txq->ift_defer_mfree && + atomic_cmpset_acq_ptr((uintptr_t *)&txq->ift_sds.ifsd_m_defer, + (uintptr_t )txq->ift_sds.ifsd_m_deferb, 0)) { + m_defer = txq->ift_sds.ifsd_m_deferb; + } + _iflib_completed_tx_reclaim(txq, m_defer, reclaimable); + } mtx_unlock(&txq->ift_mtx); + + /* + * Process mbuf frees outside the tx lock + */ + if (m_defer != NULL) { + for (i = 0; m_defer[i] != NULL; i++) { + m_freem(m_defer[i]); + m_defer[i] = NULL; + } + atomic_store_rel_ptr((uintptr_t *)&txq->ift_sds.ifsd_m_defer, + (uintptr_t)m_defer); + } if_inc_counter(ifp, IFCOUNTER_OBYTES, bytes_sent); if_inc_counter(ifp, IFCOUNTER_OPACKETS, pkt_sent); if (mcast_sent) diff --git a/sys/net/pfvar.h b/sys/net/pfvar.h index daaa2d3cddf7..6582250879ca 100644 --- a/sys/net/pfvar.h +++ b/sys/net/pfvar.h @@ -2600,7 +2600,7 @@ int pfi_clear_flags(const char *, int); int pf_match_tag(struct mbuf *, struct pf_krule *, int *, int); int pf_tag_packet(struct pf_pdesc *, int); -int pf_addr_cmp(struct pf_addr *, struct pf_addr *, +int pf_addr_cmp(const struct pf_addr *, const struct pf_addr *, sa_family_t); uint8_t* pf_find_tcpopt(u_int8_t *, u_int8_t *, size_t, diff --git a/sys/netgraph/ng_tty.c b/sys/netgraph/ng_tty.c index 0e3230a66f66..200a72336110 100644 --- a/sys/netgraph/ng_tty.c +++ b/sys/netgraph/ng_tty.c @@ -489,7 +489,8 @@ ngt_rint(struct tty *tp, char c, int flags) m->m_pkthdr.len++; /* Ship off mbuf if it's time */ - if (sc->hotchar == -1 || c == sc->hotchar || m->m_len >= MHLEN) { + if (sc->hotchar == -1 || (u_char)c == sc->hotchar || + m->m_len >= MHLEN) { sc->m = NULL; NG_SEND_DATA_ONLY(error, sc->hook, m); /* Will queue */ } diff --git a/sys/netinet/tcp_stacks/rack.c b/sys/netinet/tcp_stacks/rack.c index 76bf8f2e3b17..f55abbf919b7 100644 --- a/sys/netinet/tcp_stacks/rack.c +++ b/sys/netinet/tcp_stacks/rack.c @@ -204,6 +204,7 @@ static int32_t rack_dnd_default = 0; /* For rr_conf = 3, what is the default fo static int32_t rack_rxt_controls = 0; static int32_t rack_fill_cw_state = 0; static uint8_t rack_req_measurements = 1; +static uint32_t rack_rtt_divisor = 2; static int32_t rack_enable_hw_pacing = 0; /* Due to CCSP keep it off by default */ static int32_t rack_hw_rate_caps = 0; /* 1; */ static int32_t rack_hw_rate_cap_per = 0; /* 0 -- off */ @@ -497,7 +498,7 @@ static uint64_t rack_get_gp_est(struct tcp_rack *rack); static void rack_log_sack_passed(struct tcpcb *tp, struct tcp_rack *rack, - struct rack_sendmap *rsm, uint32_t cts); + struct rack_sendmap *rsm, uint32_t cts, int line); static void rack_log_to_event(struct tcp_rack *rack, int32_t to_num, struct rack_sendmap *rsm); static int32_t rack_output(struct tcpcb *tp); @@ -1351,6 +1352,11 @@ rack_init_sysctls(void) "When doing recovery -> rto -> recovery do we reset SSthresh?"); SYSCTL_ADD_U32(&rack_sysctl_ctx, SYSCTL_CHILDREN(rack_timers), + OID_AUTO, "rtt_divisor", CTLFLAG_RW, + &rack_rtt_divisor, 2, + "When calculating the rtt threshold what 1/N is a rtt that indicates reordering"); + SYSCTL_ADD_U32(&rack_sysctl_ctx, + SYSCTL_CHILDREN(rack_timers), OID_AUTO, "scoreboard_thresh", CTLFLAG_RW, &rack_rxt_scoreboard_clear_thresh, 2, "How many RTO's are allowed before we clear the scoreboard"); @@ -2663,6 +2669,8 @@ rack_log_map_chg(struct tcpcb *tp, struct tcp_rack *rack, log.u_bbr.cur_del_rate = (uintptr_t)prev; log.u_bbr.delRate = (uintptr_t)rsm; log.u_bbr.rttProp = (uintptr_t)next; + if (rsm) + log.u_bbr.flex1 = rsm->r_flags; log.u_bbr.flex7 = 0; if (prev) { log.u_bbr.flex1 = prev->r_start; @@ -5584,6 +5592,7 @@ rack_cong_signal(struct tcpcb *tp, uint32_t type, uint32_t ack, int line) rack->r_ctl.rc_prr_delivered = 0; rack->r_ctl.rc_prr_out = 0; rack->r_fast_output = 0; + rack->r_ctl.recovery_rxt_cnt = 0; if (rack->rack_no_prr == 0) { rack->r_ctl.rc_prr_sndcnt = ctf_fixed_maxseg(tp); rack_log_to_prr(rack, 2, in_rec_at_entry, line); @@ -7416,6 +7425,7 @@ rack_remxt_tmr(struct tcpcb *tp) */ TAILQ_INIT(&rack->r_ctl.rc_tmap); + rack->r_ctl.recovery_rxt_cnt = 0; TQHASH_FOREACH(rsm, rack->r_ctl.tqh) { rsm->r_dupack = 0; if (rack_verbose_logging) @@ -8042,6 +8052,7 @@ rack_update_rsm(struct tcpcb *tp, struct tcp_rack *rack, /* We have retransmitted due to the SACK pass */ rsm->r_flags &= ~RACK_SACK_PASSED; rsm->r_flags |= RACK_WAS_SACKPASS; + rack->r_ctl.recovery_rxt_cnt += (rsm->r_end - rsm->r_start); } } @@ -8948,7 +8959,7 @@ ts_not_found: */ static void rack_log_sack_passed(struct tcpcb *tp, - struct tcp_rack *rack, struct rack_sendmap *rsm, uint32_t cts) + struct tcp_rack *rack, struct rack_sendmap *rsm, uint32_t cts, int line) { struct rack_sendmap *nrsm; uint32_t thresh; @@ -8997,6 +9008,7 @@ rack_log_sack_passed(struct tcpcb *tp, */ break; } + rack_log_dsack_event(rack, 12, __LINE__, nrsm->r_start, nrsm->r_end); nrsm->r_flags |= RACK_SACK_PASSED; nrsm->r_flags &= ~RACK_WAS_SACKPASS; } @@ -9172,6 +9184,39 @@ is_rsm_inside_declared_tlp_block(struct tcp_rack *rack, struct rack_sendmap *rsm return (1); } + +static int +rack_check_reorder_ack(struct tcpcb *tp, struct tcp_rack *rack, struct rack_sendmap *rsm, int the_end, uint32_t cts, int can_exit_recovery, int line) +{ + if ((rack_rtt_divisor > 0) && + (rsm->r_rtr_cnt == 2) && + IN_RECOVERY(tp->t_flags) && + (rsm->r_flags & RACK_WAS_SACKPASS)){ + uint32_t fractional, snt_to_ack; + + fractional = (tp->t_srtt / rack_rtt_divisor); + if (fractional == 0) + fractional = 1; + snt_to_ack = cts - (uint32_t)rsm->r_tim_lastsent[(rsm->r_rtr_cnt - 1)]; + if (snt_to_ack <= fractional) { + rack->r_ctl.rc_reorder_ts = cts; + KASSERT((rack->r_ctl.recovery_rxt_cnt >= (the_end - rsm->r_start)), + ("rsm:%p rack:%p recovery_rxt_cnt would go negative recovery_rxt_cnt:%u sub:%u", rsm, rack, rack->r_ctl.recovery_rxt_cnt, (the_end - rsm->r_start))); + rack->r_ctl.recovery_rxt_cnt -= (the_end - rsm->r_start); + rack_log_to_prr(rack, 18, rack->r_ctl.recovery_rxt_cnt, line); + if (can_exit_recovery && (rack->r_ctl.recovery_rxt_cnt == 0)) { + tp->snd_ssthresh = rack->r_ctl.rc_ssthresh_at_erec; + rack_exit_recovery(tp, rack, 4); + rack->r_might_revert = 0; + rack->r_ctl.retran_during_recovery = 0; + rack_log_to_prr(rack, 17, snt_to_ack, line); + } + return (1); + } + } + return (0); +} + static uint32_t rack_proc_sack_blk(struct tcpcb *tp, struct tcp_rack *rack, struct sackblk *sack, struct tcpopt *to, struct rack_sendmap **prsm, uint32_t cts, @@ -9183,6 +9228,7 @@ rack_proc_sack_blk(struct tcpcb *tp, struct tcp_rack *rack, struct sackblk *sack int insret __diagused; int32_t used_ref = 1; int can_use_hookery = 0; + int prohibit_marking = 0; start = sack->start; end = sack->end; @@ -9273,6 +9319,8 @@ do_rest_ofb: (rsm->bindex == next->bindex) && ((rsm->r_flags & RACK_STRADDLE) == 0) && ((next->r_flags & RACK_STRADDLE) == 0) && + ((rsm->r_flags & RACK_WAS_SACKPASS) == 0) && + ((next->r_flags & RACK_WAS_SACKPASS) == 0) && ((rsm->r_flags & RACK_IS_PCM) == 0) && ((next->r_flags & RACK_IS_PCM) == 0) && (rsm->r_flags & RACK_IN_GP_WIN) && @@ -9345,6 +9393,8 @@ do_rest_ofb: rack_log_retran_reason(rack, rsm, __LINE__, 0, 2); /* Now lets make sure our fudge block is right */ nrsm->r_start = start; + /* Check if the ack was too soon i.e. reordering + ack arrives too quickly */ + prohibit_marking = rack_check_reorder_ack(tp, rack, nrsm, nrsm->r_end, cts, 0, __LINE__); /* Now lets update all the stats and such */ rack_update_rtt(tp, rack, nrsm, to, cts, SACKED, 0); if (rack->app_limited_needs_set) @@ -9388,8 +9438,8 @@ do_rest_ofb: * Now that we have the next * one walk backwards from there. */ - if (nrsm && nrsm->r_in_tmap) - rack_log_sack_passed(tp, rack, nrsm, cts); + if (nrsm && nrsm->r_in_tmap && (prohibit_marking == 0)) + rack_log_sack_passed(tp, rack, nrsm, cts, __LINE__); } /* Now are we done? */ if (SEQ_LT(end, next->r_end) || @@ -9445,6 +9495,8 @@ do_rest_ofb: } rack_log_map_chg(tp, rack, NULL, rsm, nrsm, MAP_SACK_M2, end, __LINE__); rsm->r_flags &= (~RACK_HAS_FIN); + /* Check if the ack was too soon i.e. reordering + ack arrives too quickly */ + prohibit_marking = rack_check_reorder_ack(tp, rack, nrsm, nrsm->r_end, cts, 0, __LINE__); /* Position us to point to the new nrsm that starts the sack blk */ rsm = nrsm; } @@ -9521,6 +9573,8 @@ do_rest_ofb: } rack_update_rtt(tp, rack, rsm, to, cts, SACKED, 0); changed += (rsm->r_end - rsm->r_start); + /* Check if the ack was too soon i.e. reordering + ack arrives too quickly */ + prohibit_marking = rack_check_reorder_ack(tp, rack, rsm, rsm->r_end, cts, 0, __LINE__); /* You get a count for acking a whole segment or more */ if (rsm->r_flags & RACK_WAS_LOST) { /* @@ -9530,8 +9584,9 @@ do_rest_ofb: rack_mark_nolonger_lost(rack, rsm); } rack->r_ctl.rc_sacked += (rsm->r_end - rsm->r_start); - if (rsm->r_in_tmap) /* should be true */ - rack_log_sack_passed(tp, rack, rsm, cts); + if (rsm->r_in_tmap && (prohibit_marking == 0)) /* should be true */ + rack_log_sack_passed(tp, rack, rsm, cts, __LINE__); + /* Is Reordering occuring? */ if (rsm->r_flags & RACK_SACK_PASSED) { rsm->r_flags &= ~RACK_SACK_PASSED; @@ -9620,6 +9675,8 @@ do_rest_ofb: (rsm->bindex == prev->bindex) && ((rsm->r_flags & RACK_STRADDLE) == 0) && ((prev->r_flags & RACK_STRADDLE) == 0) && + ((prev->r_flags & RACK_WAS_SACKPASS) == 0) && + ((rsm->r_flags & RACK_WAS_SACKPASS) == 0) && ((rsm->r_flags & RACK_IS_PCM) == 0) && ((prev->r_flags & RACK_IS_PCM) == 0) && (rsm->r_flags & RACK_IN_GP_WIN) && @@ -9658,6 +9715,8 @@ do_rest_ofb: */ nrsm->r_end = end; rsm->r_dupack = 0; + /* Check if the ack was too soon i.e. reordering + ack arrives too quickly */ + prohibit_marking = rack_check_reorder_ack(tp, rack, nrsm, nrsm->r_end, cts, 0, __LINE__); /* * Which timestamp do we keep? It is rather * important in GP measurements to have the @@ -9807,6 +9866,8 @@ do_rest_ofb: nrsm->r_in_tmap = 1; } nrsm->r_dupack = 0; + /* Check if the ack was too soon i.e. reordering + ack arrives too quickly */ + prohibit_marking = rack_check_reorder_ack(tp, rack, nrsm, nrsm->r_end, cts, 0, __LINE__); rack_log_retran_reason(rack, nrsm, __LINE__, 0, 2); rack_update_rtt(tp, rack, rsm, to, cts, SACKED, 0); changed += (rsm->r_end - rsm->r_start); @@ -9818,8 +9879,8 @@ do_rest_ofb: } rack->r_ctl.rc_sacked += (rsm->r_end - rsm->r_start); - if (rsm->r_in_tmap) /* should be true */ - rack_log_sack_passed(tp, rack, rsm, cts); + if (rsm->r_in_tmap && (prohibit_marking == 0)) /* should be true */ + rack_log_sack_passed(tp, rack, rsm, cts, __LINE__); /* Is Reordering occuring? */ if (rsm->r_flags & RACK_SACK_PASSED) { rsm->r_flags &= ~RACK_SACK_PASSED; @@ -9857,6 +9918,10 @@ out: ((rsm->r_flags & RACK_IN_GP_WIN) == 0)) { break; } + /* We can't merge retransmitted with sack-pass set */ + if ((rsm->r_flags & RACK_WAS_SACKPASS) || + (next->r_flags & RACK_WAS_SACKPASS)) + break; if ((rsm->r_flags & RACK_IN_GP_WIN) && ((next->r_flags & RACK_IN_GP_WIN) == 0)) { break; @@ -9888,6 +9953,10 @@ out: ((rsm->r_flags & RACK_IN_GP_WIN) == 0)) { break; } + /* We can't merge retransmitted with sack-pass set */ + if ((rsm->r_flags & RACK_WAS_SACKPASS) || + (prev->r_flags & RACK_WAS_SACKPASS)) + break; if ((rsm->r_flags & RACK_IN_GP_WIN) && ((prev->r_flags & RACK_IN_GP_WIN) == 0)) { break; @@ -10254,6 +10323,7 @@ more: } rack_update_pcm_ack(rack, 1, rsm->r_start, rsm->r_end); } else { + (void)rack_check_reorder_ack(tp, rack, rsm, rsm->r_end, cts, 1, __LINE__); rack_update_pcm_ack(rack, 1, rsm->r_start, rsm->r_end); } if ((rsm->r_flags & RACK_TO_REXT) && @@ -10354,6 +10424,14 @@ more: } rsm->soff += (th_ack - rsm->r_start); rack_rsm_sender_update(rack, tp, rsm, 5); + + /* + * Handle the special case where we retransmitted part of a segment we + * in this case pass in th_ack which is shorter than r_end. + */ + if (rsm->r_flags & RACK_WAS_SACKPASS) { + rack_check_reorder_ack(tp, rack, rsm, th_ack, cts, 1, __LINE__); + } /* The trim will move th_ack into r_start for us */ tqhash_trim(rack->r_ctl.tqh, th_ack); /* Now do we need to move the mbuf fwd too? */ diff --git a/sys/netinet/tcp_stacks/tcp_rack.h b/sys/netinet/tcp_stacks/tcp_rack.h index cac17d9aeb50..2e2ced089f67 100644 --- a/sys/netinet/tcp_stacks/tcp_rack.h +++ b/sys/netinet/tcp_stacks/tcp_rack.h @@ -539,6 +539,7 @@ struct rack_control { uint32_t last_rcv_tstmp_for_rtt; uint32_t last_time_of_arm_rcv; uint32_t rto_ssthresh; + uint32_t recovery_rxt_cnt; uint32_t rc_saved_beta; uint32_t rc_saved_beta_ecn; /* * For newreno cc: rc_saved_beta and diff --git a/sys/netinet/tcp_syncache.c b/sys/netinet/tcp_syncache.c index 6a3c5a5c9310..8c58be63cd5a 100644 --- a/sys/netinet/tcp_syncache.c +++ b/sys/netinet/tcp_syncache.c @@ -35,7 +35,6 @@ #include "opt_inet.h" #include "opt_inet6.h" #include "opt_ipsec.h" -#include "opt_rss.h" #include <sys/param.h> #include <sys/systm.h> @@ -882,7 +881,6 @@ syncache_socket(struct syncache *sc, struct socket *lso, struct mbuf *m) if (sc->sc_flowtype != M_HASHTYPE_NONE) { inp->inp_flowid = sc->sc_flowid; inp->inp_flowtype = sc->sc_flowtype; -#ifdef RSS } else { /* assign flowid by software RSS hash */ #ifdef INET6 @@ -897,6 +895,7 @@ syncache_socket(struct syncache *sc, struct socket *lso, struct mbuf *m) } else #endif /* INET6 */ { +#ifdef INET rss_proto_software_hash_v4(inp->inp_faddr, inp->inp_laddr, inp->inp_fport, @@ -904,8 +903,8 @@ syncache_socket(struct syncache *sc, struct socket *lso, struct mbuf *m) IPPROTO_TCP, &inp->inp_flowid, &inp->inp_flowtype); +#endif /* INET */ } -#endif /* RSS */ } #ifdef NUMA inp->inp_numa_domain = sc->sc_numa_domain; diff --git a/sys/netpfil/ipfw/ip_fw2.c b/sys/netpfil/ipfw/ip_fw2.c index c27b6bc274fb..4e13e6e55f1d 100644 --- a/sys/netpfil/ipfw/ip_fw2.c +++ b/sys/netpfil/ipfw/ip_fw2.c @@ -3692,7 +3692,7 @@ vnet_ipfw_init(const void *unused) rule->cmd[0].len = 1; rule->cmd[0].opcode = default_to_accept ? O_ACCEPT : O_DENY; chain->default_rule = rule; - ipfw_add_protected_rule(chain, rule, 0); + ipfw_add_protected_rule(chain, rule); ipfw_eaction_init(chain, first); ipfw_init_skipto_cache(chain); diff --git a/sys/netpfil/ipfw/ip_fw_dynamic.c b/sys/netpfil/ipfw/ip_fw_dynamic.c index cfb686594c7c..d454024ac5cb 100644 --- a/sys/netpfil/ipfw/ip_fw_dynamic.c +++ b/sys/netpfil/ipfw/ip_fw_dynamic.c @@ -734,28 +734,44 @@ dyn_destroy(struct ip_fw_chain *ch, struct named_object *no) static struct opcode_obj_rewrite dyn_opcodes[] = { { - O_KEEP_STATE, IPFW_TLV_STATE_NAME, - dyn_classify, dyn_update, - dyn_findbyname, dyn_findbykidx, - dyn_create, dyn_destroy + .opcode = O_KEEP_STATE, + .etlv = IPFW_TLV_STATE_NAME, + .classifier = dyn_classify, + .update = dyn_update, + .find_byname = dyn_findbyname, + .find_bykidx = dyn_findbykidx, + .create_object = dyn_create, + .destroy_object = dyn_destroy, }, { - O_CHECK_STATE, IPFW_TLV_STATE_NAME, - dyn_classify, dyn_update, - dyn_findbyname, dyn_findbykidx, - dyn_create, dyn_destroy + .opcode = O_CHECK_STATE, + .etlv = IPFW_TLV_STATE_NAME, + .classifier = dyn_classify, + .update = dyn_update, + .find_byname = dyn_findbyname, + .find_bykidx = dyn_findbykidx, + .create_object = dyn_create, + .destroy_object = dyn_destroy, }, { - O_PROBE_STATE, IPFW_TLV_STATE_NAME, - dyn_classify, dyn_update, - dyn_findbyname, dyn_findbykidx, - dyn_create, dyn_destroy + .opcode = O_PROBE_STATE, + .etlv = IPFW_TLV_STATE_NAME, + .classifier = dyn_classify, + .update = dyn_update, + .find_byname = dyn_findbyname, + .find_bykidx = dyn_findbykidx, + .create_object = dyn_create, + .destroy_object = dyn_destroy, }, { - O_LIMIT, IPFW_TLV_STATE_NAME, - dyn_classify, dyn_update, - dyn_findbyname, dyn_findbykidx, - dyn_create, dyn_destroy + .opcode = O_LIMIT, + .etlv = IPFW_TLV_STATE_NAME, + .classifier = dyn_classify, + .update = dyn_update, + .find_byname = dyn_findbyname, + .find_bykidx = dyn_findbykidx, + .create_object = dyn_create, + .destroy_object = dyn_destroy, }, }; @@ -3175,7 +3191,7 @@ dyn_add_protected_rule(struct ip_fw_chain *chain) cmd->opcode = O_COUNT; rule->act_ofs = cmd - rule->cmd; rule->cmd_len = rule->act_ofs + 1; - ipfw_add_protected_rule(chain, rule, 0); + ipfw_add_protected_rule(chain, rule); } void diff --git a/sys/netpfil/ipfw/ip_fw_private.h b/sys/netpfil/ipfw/ip_fw_private.h index c60b7aa47e94..582bdf8b1c2c 100644 --- a/sys/netpfil/ipfw/ip_fw_private.h +++ b/sys/netpfil/ipfw/ip_fw_private.h @@ -646,8 +646,7 @@ void ipfw_destroy_skipto_cache(struct ip_fw_chain *chain); void ipfw_enable_skipto_cache(struct ip_fw_chain *chain); int ipfw_find_rule(struct ip_fw_chain *chain, uint32_t key, uint32_t id); int ipfw_ctl3(struct sockopt *sopt); -int ipfw_add_protected_rule(struct ip_fw_chain *chain, struct ip_fw *rule, - int locked); +int ipfw_add_protected_rule(struct ip_fw_chain *chain, struct ip_fw *rule); void ipfw_reap_add(struct ip_fw_chain *chain, struct ip_fw **head, struct ip_fw *rule); void ipfw_reap_rules(struct ip_fw *head); @@ -741,8 +740,6 @@ void ipfw_destroy_obj_rewriter(void); void ipfw_add_obj_rewriter(struct opcode_obj_rewrite *rw, size_t count); int ipfw_del_obj_rewriter(struct opcode_obj_rewrite *rw, size_t count); -int create_objects_compat(struct ip_fw_chain *ch, ipfw_insn *cmd, - struct obj_idx *oib, struct obj_idx *pidx, struct tid_info *ti); void update_opcode_kidx(ipfw_insn *cmd, uint32_t idx); int classify_opcode_kidx(ipfw_insn *cmd, uint32_t *puidx); void ipfw_init_srv(struct ip_fw_chain *ch); diff --git a/sys/netpfil/ipfw/ip_fw_sockopt.c b/sys/netpfil/ipfw/ip_fw_sockopt.c index a91fb2e84da9..4e87865e966e 100644 --- a/sys/netpfil/ipfw/ip_fw_sockopt.c +++ b/sys/netpfil/ipfw/ip_fw_sockopt.c @@ -568,12 +568,11 @@ ipfw_commit_rules(struct ip_fw_chain *chain, struct rule_check_info *rci, } int -ipfw_add_protected_rule(struct ip_fw_chain *chain, struct ip_fw *rule, - int locked) +ipfw_add_protected_rule(struct ip_fw_chain *chain, struct ip_fw *rule) { struct ip_fw **map; - map = get_map(chain, 1, locked); + map = get_map(chain, 1, 0); if (map == NULL) return (ENOMEM); if (chain->n_rules > 0) @@ -2036,7 +2035,7 @@ ipfw_check_object_name_generic(const char *name) * * Return 0 on success. */ -int +static int create_objects_compat(struct ip_fw_chain *ch, ipfw_insn *cmd, struct obj_idx *oib, struct obj_idx *pidx, struct tid_info *ti) { diff --git a/sys/netpfil/pf/pf.c b/sys/netpfil/pf/pf.c index 8219aacd20de..60ca9039e9ce 100644 --- a/sys/netpfil/pf/pf.c +++ b/sys/netpfil/pf/pf.c @@ -570,7 +570,7 @@ pf_sctp_checksum(struct mbuf *m, int off) } int -pf_addr_cmp(struct pf_addr *a, struct pf_addr *b, sa_family_t af) +pf_addr_cmp(const struct pf_addr *a, const struct pf_addr *b, sa_family_t af) { switch (af) { diff --git a/sys/netpfil/pf/pf_nl.c b/sys/netpfil/pf/pf_nl.c index 6bd858373bd2..1c8a1f95b650 100644 --- a/sys/netpfil/pf/pf_nl.c +++ b/sys/netpfil/pf/pf_nl.c @@ -100,6 +100,7 @@ static bool dump_state_peer(struct nl_writer *nw, int attr, const struct pf_state_peer *peer) { int off = nlattr_add_nested(nw, attr); + if (off == 0) return (false); @@ -129,6 +130,7 @@ static bool dump_state_key(struct nl_writer *nw, int attr, const struct pf_state_key *key) { int off = nlattr_add_nested(nw, attr); + if (off == 0) return (false); @@ -160,8 +162,6 @@ dump_state(struct nlpcb *nlp, const struct nlmsghdr *hdr, struct pf_kstate *s, struct genlmsghdr *ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GETSTATES; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u64(nw, PF_ST_VERSION, PF_STATE_VERSION); @@ -324,8 +324,6 @@ dump_creatorid(struct nlpcb *nlp, const struct nlmsghdr *hdr, uint32_t creator, struct genlmsghdr *ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GETCREATORS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_ST_CREATORID, htonl(creator)); @@ -434,6 +432,9 @@ nlattr_add_addr_wrap(struct nl_writer *nw, int attrtype, struct pf_addr_wrap *a) { int off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + nlattr_add_in6_addr(nw, PF_AT_ADDR, &a->v.a.addr.v6); nlattr_add_in6_addr(nw, PF_AT_MASK, &a->v.a.mask.v6); nlattr_add_u8(nw, PF_AT_TYPE, a->type); @@ -469,6 +470,9 @@ nlattr_add_rule_addr(struct nl_writer *nw, int attrtype, struct pf_rule_addr *r) struct pf_addr_wrap aw = {0}; int off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + bcopy(&(r->addr), &aw, sizeof(struct pf_addr_wrap)); pf_addr_copyout(&aw); @@ -497,6 +501,9 @@ nlattr_add_mape_portset(struct nl_writer *nw, int attrtype, const struct pf_mape { int off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + nlattr_add_u8(nw, PF_MET_OFFSET, m->offset); nlattr_add_u8(nw, PF_MET_PSID_LEN, m->psidlen); nlattr_add_u16(nw, PF_MET_PSID, m->psid); @@ -559,6 +566,9 @@ nlattr_add_labels(struct nl_writer *nw, int attrtype, const struct pf_krule *r) int off = nlattr_add_nested(nw, attrtype); int i = 0; + if (off == 0) + return (false); + while (r->label[i][0] != 0 && i < PF_RULE_MAX_LABEL_COUNT) { nlattr_add_string(nw, PF_LT_LABEL, r->label[i]); @@ -588,6 +598,9 @@ nlattr_add_pool(struct nl_writer *nw, int attrtype, const struct pf_kpool *pool) { int off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + nlattr_add(nw, PF_PT_KEY, sizeof(struct pf_poolhashkey), &pool->key); nlattr_add_in6_addr(nw, PF_PT_COUNTER, (const struct in6_addr *)&pool->counter); nlattr_add_u32(nw, PF_PT_TBLIDX, pool->tblidx); @@ -615,6 +628,9 @@ nlattr_add_rule_uid(struct nl_writer *nw, int attrtype, const struct pf_rule_uid { int off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + nlattr_add_u32(nw, PF_RUT_UID_LOW, u->uid[0]); nlattr_add_u32(nw, PF_RUT_UID_HIGH, u->uid[1]); nlattr_add_u8(nw, PF_RUT_OP, u->op); @@ -675,6 +691,9 @@ nlattr_add_timeout(struct nl_writer *nw, int attrtype, uint32_t *timeout) { int off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + for (int i = 0; i < PFTM_MAX; i++) nlattr_add_u32(nw, PF_RT_TIMEOUT, timeout[i]); @@ -832,8 +851,6 @@ pf_handle_getrules(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GETRULES; - ghdr_new->version = 0; - ghdr_new->reserved = 0; error = pf_ioctl_getrules(&attrs); if (error != 0) @@ -894,8 +911,6 @@ pf_handle_getrule(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GETRULE; - ghdr_new->version = 0; - ghdr_new->reserved = 0; PF_RULES_WLOCK(); ruleset = pf_find_kruleset(attrs.anchor); @@ -1085,8 +1100,6 @@ pf_handle_killclear_states(struct nlmsghdr *hdr, struct nl_pstate *npt, int cmd) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = cmd; - ghdr_new->version = 0; - ghdr_new->reserved = 0; NET_EPOCH_ENTER(et); if (cmd == PFNL_CMD_KILLSTATES) @@ -1154,6 +1167,10 @@ nlattr_add_counters(struct nl_writer *nw, int attr, size_t number, char **names, { for (int i = 0; i < number; i++) { int off = nlattr_add_nested(nw, attr); + + if (off == 0) + return (false); + nlattr_add_u32(nw, PF_C_ID, i); nlattr_add_string(nw, PF_C_NAME, names[i]); nlattr_add_u64(nw, PF_C_COUNTER, counter_u64_fetch(counters[i])); @@ -1169,6 +1186,10 @@ nlattr_add_fcounters(struct nl_writer *nw, int attr, size_t number, char **names { for (int i = 0; i < number; i++) { int off = nlattr_add_nested(nw, attr); + + if (off == 0) + return (false); + nlattr_add_u32(nw, PF_C_ID, i); nlattr_add_string(nw, PF_C_NAME, names[i]); nlattr_add_u64(nw, PF_C_COUNTER, pf_counter_u64_fetch(&counters[i])); @@ -1183,6 +1204,9 @@ nlattr_add_u64_array(struct nl_writer *nw, int attr, size_t number, const uint64 { int off = nlattr_add_nested(nw, attr); + if (off == 0) + return (false); + for (size_t i = 0; i < number; i++) nlattr_add_u64(nw, 0, array[i]); @@ -1210,8 +1234,6 @@ pf_handle_get_status(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_STATUS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; since = time_second - (time_uptime - V_pf_status.since); @@ -1301,8 +1323,6 @@ pf_handle_natlook(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_NATLOOK; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_in6_addr(nw, PF_NL_SRC_ADDR, &attrs.rsaddr.v6); nlattr_add_in6_addr(nw, PF_NL_DST_ADDR, &attrs.rdaddr.v6); @@ -1392,8 +1412,6 @@ pf_handle_get_timeout(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_TIMEOUT; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_TO_SECONDS, attrs.seconds); @@ -1452,8 +1470,6 @@ pf_handle_get_limit(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_LIMIT; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_LI_LIMIT, attrs.limit); @@ -1482,8 +1498,6 @@ pf_handle_begin_addrs(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_BEGIN_ADDRS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_BA_TICKET, ticket); @@ -1502,6 +1516,9 @@ nlattr_add_pool_addr(struct nl_writer *nw, int attrtype, struct pf_pooladdr *a) off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + nlattr_add_addr_wrap(nw, PF_PA_ADDR, &a->addr); nlattr_add_string(nw, PF_PA_IFNAME, a->ifname); @@ -1576,8 +1593,6 @@ pf_handle_get_addrs(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_ADDRS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_AA_NR, attrs.nr); @@ -1613,8 +1628,6 @@ pf_handle_get_addr(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_ADDR; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_AA_ACTION, attrs.action); nlattr_add_u32(nw, PF_AA_TICKET, attrs.ticket); @@ -1663,8 +1676,6 @@ pf_handle_get_rulesets(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_RULESETS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_RS_NR, attrs.nr); @@ -1697,8 +1708,6 @@ pf_handle_get_ruleset(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_RULESET; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_string(nw, PF_RS_NAME, attrs.name); @@ -1717,6 +1726,9 @@ nlattr_add_pf_threshold(struct nl_writer *nw, int attrtype, int off = nlattr_add_nested(nw, attrtype); int conn_rate_count = 0; + if (off == 0) + return (false); + /* Adjust the connection rate estimate. */ if (t->cr != NULL) conn_rate_count = counter_rate_get(t->cr); @@ -1759,8 +1771,6 @@ pf_handle_get_srcnodes(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_SRCNODES; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_in6_addr(nw, PF_SN_ADDR, &n->addr.v6); nlattr_add_in6_addr(nw, PF_SN_RADDR, &n->raddr.v6); @@ -1832,8 +1842,6 @@ pf_handle_clear_tables(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_CLEAR_TABLES; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_T_NBR_DELETED, ndel); @@ -1869,8 +1877,6 @@ pf_handle_add_table(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_ADD_TABLE; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_T_NBR_ADDED, attrs.pfrio_nadd); @@ -1906,8 +1912,6 @@ pf_handle_del_table(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_DEL_TABLE; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_T_NBR_DELETED, attrs.pfrio_ndel); @@ -1925,6 +1929,9 @@ nlattr_add_pfr_table(struct nl_writer *nw, int attrtype, { int off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + nlattr_add_string(nw, PF_T_ANCHOR, t->pfrt_anchor); nlattr_add_string(nw, PF_T_NAME, t->pfrt_name); nlattr_add_u32(nw, PF_T_TABLE_FLAGS, t->pfrt_flags); @@ -1986,8 +1993,6 @@ pf_handle_get_tstats(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_TSTATS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_pfr_table(nw, PF_TS_TABLE, &pfrtstats[i].pfrts_t); @@ -2054,8 +2059,6 @@ pf_handle_clear_tstats(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_CLR_TSTATS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u64(nw, PF_TS_NZERO, nzero); @@ -2091,8 +2094,6 @@ pf_handle_clear_addrs(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_CLR_ADDRS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u64(nw, PF_T_NBR_DELETED, ndel); @@ -2176,8 +2177,6 @@ pf_handle_table_add_addrs(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_TABLE_ADD_ADDR; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_TA_NBR_ADDED, attrs.nadd); @@ -2209,8 +2208,6 @@ pf_handle_table_del_addrs(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_TABLE_DEL_ADDR; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_TA_NBR_DELETED, attrs.ndel); @@ -2243,8 +2240,6 @@ pf_handle_table_set_addrs(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_TABLE_SET_ADDR; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_TA_NBR_ADDED, attrs.nadd); nlattr_add_u32(nw, PF_TA_NBR_DELETED, attrs.ndel); @@ -2260,6 +2255,7 @@ static int nlattr_add_pfr_addr(struct nl_writer *nw, int attr, const struct pfr_addr *a) { int off = nlattr_add_nested(nw, attr); + if (off == 0) return (false); @@ -2318,8 +2314,6 @@ pf_handle_table_get_addrs(struct nlmsghdr *hdr, struct nl_pstate *npt) } ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_TABLE_GET_ADDR; - ghdr_new->version = 0; - ghdr_new->reserved = 0; if (i == 0) nlattr_add_u32(nw, PF_TA_ADDR_COUNT, size); @@ -2341,6 +2335,7 @@ static int nlattr_add_pfr_astats(struct nl_writer *nw, int attr, const struct pfr_astats *a) { int off = nlattr_add_nested(nw, attr); + if (off == 0) return (false); @@ -2416,8 +2411,6 @@ pf_handle_table_get_astats(struct nlmsghdr *hdr, struct nl_pstate *npt) } ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_TABLE_GET_ASTATS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; if (i == 0) nlattr_add_u32(nw, PF_TAS_ASTATS_COUNT, size); @@ -2434,6 +2427,37 @@ out: free(pfrastats, M_PF); return (error); } +static int +pf_handle_table_clear_astats(struct nlmsghdr *hdr, struct nl_pstate *npt) +{ + struct nl_parsed_table_addrs attrs = { 0 }; + struct nl_writer *nw = npt->nw; + struct genlmsghdr *ghdr_new; + int error; + + error = nl_parse_nlmsg(hdr, &table_addr_parser, npt, &attrs); + if (error != 0) + return (error); + + PF_RULES_WLOCK(); + error = pfr_clr_astats(&attrs.table, &attrs.addrs[0], + attrs.addr_count, &attrs.nchange, + attrs.flags | PFR_FLAG_USERIOCTL); + PF_RULES_WUNLOCK(); + + if (!nlmsg_reply(nw, hdr, sizeof(struct genlmsghdr))) + return (ENOMEM); + + ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); + ghdr_new->cmd = PFNL_CMD_TABLE_CLEAR_ASTATS; + + nlattr_add_u32(nw, PF_TAS_ASTATS_ZEROED, attrs.nchange); + + if (!nlmsg_end(nw)) + return (ENOMEM); + + return (error); +} static const struct nlhdr_parser *all_parsers[] = { &state_parser, @@ -2708,6 +2732,13 @@ static const struct genl_cmd pf_cmds[] = { .cmd_flags = GENL_CMD_CAP_DUMP | GENL_CMD_CAP_HASPOL, .cmd_priv = PRIV_NETINET_PF, }, + { + .cmd_num = PFNL_CMD_TABLE_CLEAR_ASTATS, + .cmd_name = "TABLE_CLEAR_ASTATS", + .cmd_cb = pf_handle_table_clear_astats, + .cmd_flags = GENL_CMD_CAP_DUMP | GENL_CMD_CAP_HASPOL, + .cmd_priv = PRIV_NETINET_PF, + }, }; void diff --git a/sys/netpfil/pf/pf_nl.h b/sys/netpfil/pf/pf_nl.h index 5ca14758932a..216f3d13db32 100644 --- a/sys/netpfil/pf/pf_nl.h +++ b/sys/netpfil/pf/pf_nl.h @@ -72,6 +72,7 @@ enum { PFNL_CMD_TABLE_SET_ADDR = 34, PFNL_CMD_TABLE_GET_ADDR = 35, PFNL_CMD_TABLE_GET_ASTATS = 36, + PFNL_CMD_TABLE_CLEAR_ASTATS = 37, __PFNL_CMD_MAX, }; #define PFNL_CMD_MAX (__PFNL_CMD_MAX -1) @@ -504,6 +505,7 @@ enum pf_table_astats_t { PF_TAS_ASTATS = 2, /* nested, pfr_astats_t */ PF_TAS_FLAGS = 3, /* u32 */ PF_TAS_ASTATS_COUNT = 4, /* u32 */ + PF_TAS_ASTATS_ZEROED = 5, /* u32 */ }; #ifdef _KERNEL diff --git a/sys/powerpc/booke/spe.c b/sys/powerpc/booke/spe.c deleted file mode 100644 index e10392508e4e..000000000000 --- a/sys/powerpc/booke/spe.c +++ /dev/null @@ -1,685 +0,0 @@ -/*- - * Copyright (C) 1996 Wolfgang Solfrank. - * Copyright (C) 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: fpu.c,v 1.5 2001/07/22 11:29:46 wiz Exp $ - */ - -#include <sys/param.h> -#include <sys/proc.h> -#include <sys/systm.h> -#include <sys/limits.h> - -#include <machine/altivec.h> -#include <machine/fpu.h> -#include <machine/ieeefp.h> -#include <machine/pcb.h> -#include <machine/psl.h> - -#include <powerpc/fpu/fpu_arith.h> -#include <powerpc/fpu/fpu_emu.h> -#include <powerpc/fpu/fpu_extern.h> - -void spe_handle_fpdata(struct trapframe *); -void spe_handle_fpround(struct trapframe *); -static int spe_emu_instr(uint32_t, struct fpemu *, struct fpn **, uint32_t *); - -static void -save_vec_int(struct thread *td) -{ - int msr; - struct pcb *pcb; - - pcb = td->td_pcb; - - /* - * Temporarily re-enable the vector unit during the save - */ - msr = mfmsr(); - mtmsr(msr | PSL_VEC); - - /* - * Save the vector registers and SPEFSCR to the PCB - */ -#define EVSTDW(n) __asm ("evstdw %1,0(%0)" \ - :: "b"(pcb->pcb_vec.vr[n]), "n"(n)); - EVSTDW(0); EVSTDW(1); EVSTDW(2); EVSTDW(3); - EVSTDW(4); EVSTDW(5); EVSTDW(6); EVSTDW(7); - EVSTDW(8); EVSTDW(9); EVSTDW(10); EVSTDW(11); - EVSTDW(12); EVSTDW(13); EVSTDW(14); EVSTDW(15); - EVSTDW(16); EVSTDW(17); EVSTDW(18); EVSTDW(19); - EVSTDW(20); EVSTDW(21); EVSTDW(22); EVSTDW(23); - EVSTDW(24); EVSTDW(25); EVSTDW(26); EVSTDW(27); - EVSTDW(28); EVSTDW(29); EVSTDW(30); EVSTDW(31); -#undef EVSTDW - - __asm ( "evxor 0,0,0\n" - "evmwumiaa 0,0,0\n" - "evstdd 0,0(%0)" :: "b"(&pcb->pcb_vec.spare[0])); - pcb->pcb_vec.vscr = mfspr(SPR_SPEFSCR); - - /* - * Disable vector unit again - */ - isync(); - mtmsr(msr); - -} - -void -enable_vec(struct thread *td) -{ - int msr; - struct pcb *pcb; - struct trapframe *tf; - - pcb = td->td_pcb; - tf = trapframe(td); - - /* - * Save the thread's SPE CPU number, and set the CPU's current - * vector thread - */ - td->td_pcb->pcb_veccpu = PCPU_GET(cpuid); - PCPU_SET(vecthread, td); - - /* - * Enable the vector unit for when the thread returns from the - * exception. If this is the first time the unit has been used by - * the thread, initialise the vector registers and VSCR to 0, and - * set the flag to indicate that the vector unit is in use. - */ - tf->srr1 |= PSL_VEC; - if (!(pcb->pcb_flags & PCB_VEC)) { - memset(&pcb->pcb_vec, 0, sizeof pcb->pcb_vec); - pcb->pcb_flags |= PCB_VEC; - pcb->pcb_vec.vscr = mfspr(SPR_SPEFSCR); - } - - /* - * Temporarily enable the vector unit so the registers - * can be restored. - */ - msr = mfmsr(); - mtmsr(msr | PSL_VEC); - - /* Restore SPEFSCR and ACC. Use %r0 as the scratch for ACC. */ - mtspr(SPR_SPEFSCR, pcb->pcb_vec.vscr); - __asm __volatile("isync;evldd 0, 0(%0); evmra 0,0\n" - :: "b"(&pcb->pcb_vec.spare[0])); - - /* - * The lower half of each register will be restored on trap return. Use - * %r0 as a scratch register, and restore it last. - */ -#define EVLDW(n) __asm __volatile("evldw 0, 0(%0); evmergehilo "#n",0,"#n \ - :: "b"(&pcb->pcb_vec.vr[n])); - EVLDW(1); EVLDW(2); EVLDW(3); EVLDW(4); - EVLDW(5); EVLDW(6); EVLDW(7); EVLDW(8); - EVLDW(9); EVLDW(10); EVLDW(11); EVLDW(12); - EVLDW(13); EVLDW(14); EVLDW(15); EVLDW(16); - EVLDW(17); EVLDW(18); EVLDW(19); EVLDW(20); - EVLDW(21); EVLDW(22); EVLDW(23); EVLDW(24); - EVLDW(25); EVLDW(26); EVLDW(27); EVLDW(28); - EVLDW(29); EVLDW(30); EVLDW(31); EVLDW(0); -#undef EVLDW - - isync(); - mtmsr(msr); -} - -void -save_vec(struct thread *td) -{ - struct pcb *pcb; - - pcb = td->td_pcb; - - save_vec_int(td); - - /* - * Clear the current vec thread and pcb's CPU id - * XXX should this be left clear to allow lazy save/restore ? - */ - pcb->pcb_veccpu = INT_MAX; - PCPU_SET(vecthread, NULL); -} - -/* - * Save SPE state without dropping ownership. This will only save state if - * the current vector-thread is `td'. This is used for taking core dumps, so - * don't leak kernel information; overwrite the low words of each vector with - * their real value, taken from the thread's trap frame, unconditionally. - */ -void -save_vec_nodrop(struct thread *td) -{ - struct pcb *pcb; - int i; - - if (td == PCPU_GET(vecthread)) - save_vec_int(td); - - pcb = td->td_pcb; - - for (i = 0; i < 32; i++) { - pcb->pcb_vec.vr[i][1] = - td->td_frame ? td->td_frame->fixreg[i] : 0; - } -} - -#define SPE_INST_MASK 0x31f -#define EADD 0x200 -#define ESUB 0x201 -#define EABS 0x204 -#define ENABS 0x205 -#define ENEG 0x206 -#define EMUL 0x208 -#define EDIV 0x209 -#define ECMPGT 0x20c -#define ECMPLT 0x20d -#define ECMPEQ 0x20e -#define ECFUI 0x210 -#define ECFSI 0x211 -#define ECTUI 0x214 -#define ECTSI 0x215 -#define ECTUF 0x216 -#define ECTSF 0x217 -#define ECTUIZ 0x218 -#define ECTSIZ 0x21a - -#define SPE 0x4 -#define SPFP 0x6 -#define DPFP 0x7 - -#define SPE_OPC 4 -#define OPC_SHIFT 26 - -#define EVFSADD 0x280 -#define EVFSSUB 0x281 -#define EVFSABS 0x284 -#define EVFSNABS 0x285 -#define EVFSNEG 0x286 -#define EVFSMUL 0x288 -#define EVFSDIV 0x289 -#define EVFSCMPGT 0x28c -#define EVFSCMPLT 0x28d -#define EVFSCMPEQ 0x28e -#define EVFSCFUI 0x290 -#define EVFSCFSI 0x291 -#define EVFSCTUI 0x294 -#define EVFSCTSI 0x295 -#define EVFSCTUF 0x296 -#define EVFSCTSF 0x297 -#define EVFSCTUIZ 0x298 -#define EVFSCTSIZ 0x29a - -#define EFSADD 0x2c0 -#define EFSSUB 0x2c1 -#define EFSABS 0x2c4 -#define EFSNABS 0x2c5 -#define EFSNEG 0x2c6 -#define EFSMUL 0x2c8 -#define EFSDIV 0x2c9 -#define EFSCMPGT 0x2cc -#define EFSCMPLT 0x2cd -#define EFSCMPEQ 0x2ce -#define EFSCFD 0x2cf -#define EFSCFUI 0x2d0 -#define EFSCFSI 0x2d1 -#define EFSCTUI 0x2d4 -#define EFSCTSI 0x2d5 -#define EFSCTUF 0x2d6 -#define EFSCTSF 0x2d7 -#define EFSCTUIZ 0x2d8 -#define EFSCTSIZ 0x2da - -#define EFDADD 0x2e0 -#define EFDSUB 0x2e1 -#define EFDABS 0x2e4 -#define EFDNABS 0x2e5 -#define EFDNEG 0x2e6 -#define EFDMUL 0x2e8 -#define EFDDIV 0x2e9 -#define EFDCMPGT 0x2ec -#define EFDCMPLT 0x2ed -#define EFDCMPEQ 0x2ee -#define EFDCFS 0x2ef -#define EFDCFUI 0x2f0 -#define EFDCFSI 0x2f1 -#define EFDCTUI 0x2f4 -#define EFDCTSI 0x2f5 -#define EFDCTUF 0x2f6 -#define EFDCTSF 0x2f7 -#define EFDCTUIZ 0x2f8 -#define EFDCTSIZ 0x2fa - -enum { - NONE, - SINGLE, - DOUBLE, - VECTOR, -}; - -static uint32_t fpscr_to_spefscr(uint32_t fpscr) -{ - uint32_t spefscr; - - spefscr = 0; - - if (fpscr & FPSCR_VX) - spefscr |= SPEFSCR_FINV; - if (fpscr & FPSCR_OX) - spefscr |= SPEFSCR_FOVF; - if (fpscr & FPSCR_UX) - spefscr |= SPEFSCR_FUNF; - if (fpscr & FPSCR_ZX) - spefscr |= SPEFSCR_FDBZ; - if (fpscr & FPSCR_XX) - spefscr |= SPEFSCR_FX; - - return (spefscr); -} - -/* Sign is 0 for unsigned, 1 for signed. */ -static int -spe_to_int(struct fpemu *fpemu, struct fpn *fpn, uint32_t *val, int sign) -{ - uint32_t res[2]; - - res[0] = fpu_ftox(fpemu, fpn, res); - if (res[0] != UINT_MAX && res[0] != 0) - fpemu->fe_cx |= FPSCR_OX; - else if (sign == 0 && res[0] != 0) - fpemu->fe_cx |= FPSCR_UX; - else - *val = res[1]; - - return (0); -} - -/* Masked instruction */ -/* - * For compare instructions, returns 1 if success, 0 if not. For all others, - * returns -1, or -2 if no result needs recorded. - */ -static int -spe_emu_instr(uint32_t instr, struct fpemu *fpemu, - struct fpn **result, uint32_t *iresult) -{ - switch (instr & SPE_INST_MASK) { - case EABS: - case ENABS: - case ENEG: - /* Taken care of elsewhere. */ - break; - case ECTUIZ: - fpemu->fe_cx &= ~FPSCR_RN; - fpemu->fe_cx |= FP_RZ; - case ECTUI: - spe_to_int(fpemu, &fpemu->fe_f2, iresult, 0); - return (-1); - case ECTSIZ: - fpemu->fe_cx &= ~FPSCR_RN; - fpemu->fe_cx |= FP_RZ; - case ECTSI: - spe_to_int(fpemu, &fpemu->fe_f2, iresult, 1); - return (-1); - case EADD: - *result = fpu_add(fpemu); - break; - case ESUB: - *result = fpu_sub(fpemu); - break; - case EMUL: - *result = fpu_mul(fpemu); - break; - case EDIV: - *result = fpu_div(fpemu); - break; - case ECMPGT: - fpu_compare(fpemu, 0); - if (fpemu->fe_cx & FPSCR_FG) - return (1); - return (0); - case ECMPLT: - fpu_compare(fpemu, 0); - if (fpemu->fe_cx & FPSCR_FL) - return (1); - return (0); - case ECMPEQ: - fpu_compare(fpemu, 0); - if (fpemu->fe_cx & FPSCR_FE) - return (1); - return (0); - default: - printf("Unknown instruction %x\n", instr); - } - - return (-1); -} - -static int -spe_explode(struct fpemu *fe, struct fpn *fp, uint32_t type, - uint32_t hi, uint32_t lo) -{ - uint32_t s; - - fp->fp_sign = hi >> 31; - fp->fp_sticky = 0; - switch (type) { - case SINGLE: - s = fpu_stof(fp, hi); - break; - - case DOUBLE: - s = fpu_dtof(fp, hi, lo); - break; - } - - if (s == FPC_QNAN && (fp->fp_mant[0] & FP_QUIETBIT) == 0) { - /* - * Input is a signalling NaN. All operations that return - * an input NaN operand put it through a ``NaN conversion'', - * which basically just means ``turn on the quiet bit''. - * We do this here so that all NaNs internally look quiet - * (we can tell signalling ones by their class). - */ - fp->fp_mant[0] |= FP_QUIETBIT; - fe->fe_cx = FPSCR_VXSNAN; /* assert invalid operand */ - s = FPC_SNAN; - } - fp->fp_class = s; - - return (0); -} - -/* - * Save the high word of a 64-bit GPR for manipulation in the exception handler. - */ -static uint32_t -spe_save_reg_high(int reg) -{ - uint32_t vec[2]; -#define EVSTDW(n) case n: __asm __volatile ("evstdw %1,0(%0)" \ - :: "b"(vec), "n"(n) : "memory"); break; - switch (reg) { - EVSTDW(0); EVSTDW(1); EVSTDW(2); EVSTDW(3); - EVSTDW(4); EVSTDW(5); EVSTDW(6); EVSTDW(7); - EVSTDW(8); EVSTDW(9); EVSTDW(10); EVSTDW(11); - EVSTDW(12); EVSTDW(13); EVSTDW(14); EVSTDW(15); - EVSTDW(16); EVSTDW(17); EVSTDW(18); EVSTDW(19); - EVSTDW(20); EVSTDW(21); EVSTDW(22); EVSTDW(23); - EVSTDW(24); EVSTDW(25); EVSTDW(26); EVSTDW(27); - EVSTDW(28); EVSTDW(29); EVSTDW(30); EVSTDW(31); - } -#undef EVSTDW - - return (vec[0]); -} - -/* - * Load the given value into the high word of the requested register. - */ -static void -spe_load_reg_high(int reg, uint32_t val) -{ -#define EVLDW(n) case n: __asm __volatile("evmergelo "#n",%0,"#n \ - :: "r"(val)); break; - switch (reg) { - EVLDW(1); EVLDW(2); EVLDW(3); EVLDW(4); - EVLDW(5); EVLDW(6); EVLDW(7); EVLDW(8); - EVLDW(9); EVLDW(10); EVLDW(11); EVLDW(12); - EVLDW(13); EVLDW(14); EVLDW(15); EVLDW(16); - EVLDW(17); EVLDW(18); EVLDW(19); EVLDW(20); - EVLDW(21); EVLDW(22); EVLDW(23); EVLDW(24); - EVLDW(25); EVLDW(26); EVLDW(27); EVLDW(28); - EVLDW(29); EVLDW(30); EVLDW(31); EVLDW(0); - } -#undef EVLDW - -} - -void -spe_handle_fpdata(struct trapframe *frame) -{ - struct fpemu fpemu; - struct fpn *result; - uint32_t instr, instr_sec_op; - uint32_t cr_shift, ra, rb, rd, src; - uint32_t high, low, res, tmp; /* For vector operations. */ - uint32_t spefscr = 0; - uint32_t ftod_res[2]; - int width; /* Single, Double, Vector, Integer */ - int err; - uint32_t msr; - - err = fueword32((void *)frame->srr0, &instr); - - if (err != 0) - return; - /* Fault. */; - - if ((instr >> OPC_SHIFT) != SPE_OPC) - return; - - msr = mfmsr(); - /* - * 'cr' field is the upper 3 bits of rd. Magically, since a) rd is 5 - * bits, b) each 'cr' field is 4 bits, and c) Only the 'GT' bit is - * modified for most compare operations, the full value of rd can be - * used as a shift value. - */ - rd = (instr >> 21) & 0x1f; - ra = (instr >> 16) & 0x1f; - rb = (instr >> 11) & 0x1f; - src = (instr >> 5) & 0x7; - cr_shift = 28 - (rd & 0x1f); - - instr_sec_op = (instr & 0x7ff); - - memset(&fpemu, 0, sizeof(fpemu)); - - width = NONE; - switch (src) { - case SPE: - mtmsr(msr | PSL_VEC); - switch (instr_sec_op) { - case EVFSABS: - high = spe_save_reg_high(ra) & ~(1U << 31); - frame->fixreg[rd] = frame->fixreg[ra] & ~(1U << 31); - spe_load_reg_high(rd, high); - break; - case EVFSNABS: - high = spe_save_reg_high(ra) | (1U << 31); - frame->fixreg[rd] = frame->fixreg[ra] | (1U << 31); - spe_load_reg_high(rd, high); - break; - case EVFSNEG: - high = spe_save_reg_high(ra) ^ (1U << 31); - frame->fixreg[rd] = frame->fixreg[ra] ^ (1U << 31); - spe_load_reg_high(rd, high); - break; - default: - /* High word */ - spe_explode(&fpemu, &fpemu.fe_f1, SINGLE, - spe_save_reg_high(ra), 0); - spe_explode(&fpemu, &fpemu.fe_f2, SINGLE, - spe_save_reg_high(rb), 0); - high = spe_emu_instr(instr_sec_op, &fpemu, &result, - &tmp); - - if (high < 0) - spe_load_reg_high(rd, tmp); - - spefscr = fpscr_to_spefscr(fpemu.fe_cx) << 16; - /* Clear the fpemu to start over on the lower bits. */ - memset(&fpemu, 0, sizeof(fpemu)); - - /* Now low word */ - spe_explode(&fpemu, &fpemu.fe_f1, SINGLE, - frame->fixreg[ra], 0); - spe_explode(&fpemu, &fpemu.fe_f2, SINGLE, - frame->fixreg[rb], 0); - spefscr |= fpscr_to_spefscr(fpemu.fe_cx); - low = spe_emu_instr(instr_sec_op, &fpemu, &result, - &frame->fixreg[rd]); - if (instr_sec_op == EVFSCMPEQ || - instr_sec_op == EVFSCMPGT || - instr_sec_op == EVFSCMPLT) { - res = (high << 3) | (low << 2) | - ((high | low) << 1) | (high & low); - width = NONE; - } else - width = VECTOR; - break; - } - goto end; - - case SPFP: - switch (instr_sec_op) { - case EFSABS: - frame->fixreg[rd] = frame->fixreg[ra] & ~(1U << 31); - break; - case EFSNABS: - frame->fixreg[rd] = frame->fixreg[ra] | (1U << 31); - break; - case EFSNEG: - frame->fixreg[rd] = frame->fixreg[ra] ^ (1U << 31); - break; - case EFSCFD: - mtmsr(msr | PSL_VEC); - spe_explode(&fpemu, &fpemu.fe_f3, DOUBLE, - spe_save_reg_high(rb), frame->fixreg[rb]); - result = &fpemu.fe_f3; - width = SINGLE; - break; - default: - spe_explode(&fpemu, &fpemu.fe_f1, SINGLE, - frame->fixreg[ra], 0); - spe_explode(&fpemu, &fpemu.fe_f2, SINGLE, - frame->fixreg[rb], 0); - width = SINGLE; - } - break; - case DPFP: - mtmsr(msr | PSL_VEC); - switch (instr_sec_op) { - case EFDABS: - high = spe_save_reg_high(ra) & ~(1U << 31); - frame->fixreg[rd] = frame->fixreg[ra]; - spe_load_reg_high(rd, high); - break; - case EFDNABS: - high = spe_save_reg_high(ra) | (1U << 31); - frame->fixreg[rd] = frame->fixreg[ra]; - spe_load_reg_high(rd, high); - break; - case EFDNEG: - high = spe_save_reg_high(ra) ^ (1U << 31); - frame->fixreg[rd] = frame->fixreg[ra]; - spe_load_reg_high(rd, high); - break; - case EFDCFS: - spe_explode(&fpemu, &fpemu.fe_f3, SINGLE, - frame->fixreg[rb], 0); - result = &fpemu.fe_f3; - width = DOUBLE; - break; - default: - spe_explode(&fpemu, &fpemu.fe_f1, DOUBLE, - spe_save_reg_high(ra), frame->fixreg[ra]); - spe_explode(&fpemu, &fpemu.fe_f2, DOUBLE, - spe_save_reg_high(rb), frame->fixreg[rb]); - width = DOUBLE; - } - break; - } - switch (instr_sec_op) { - case EFDCFS: - case EFSCFD: - /* Already handled. */ - break; - default: - res = spe_emu_instr(instr_sec_op, &fpemu, &result, - &frame->fixreg[rd]); - if (res != -1) - res <<= 2; - break; - } - - switch (instr_sec_op & SPE_INST_MASK) { - case ECMPEQ: - case ECMPGT: - case ECMPLT: - frame->cr &= ~(0xf << cr_shift); - frame->cr |= (res << cr_shift); - break; - case ECTUI: - case ECTUIZ: - case ECTSI: - case ECTSIZ: - break; - default: - switch (width) { - case NONE: - case VECTOR: - break; - case SINGLE: - frame->fixreg[rd] = fpu_ftos(&fpemu, result); - break; - case DOUBLE: - spe_load_reg_high(rd, fpu_ftod(&fpemu, result, ftod_res)); - frame->fixreg[rd] = ftod_res[1]; - break; - default: - panic("Unknown storage width %d", width); - break; - } - } - -end: - spefscr |= (mfspr(SPR_SPEFSCR) & ~SPEFSCR_FINVS); - mtspr(SPR_SPEFSCR, spefscr); - frame->srr0 += 4; - mtmsr(msr); - - return; -} - -void -spe_handle_fpround(struct trapframe *frame) -{ - - /* - * Punt fpround exceptions for now. This leaves the truncated result in - * the register. We'll deal with overflow/underflow later. - */ - return; -} diff --git a/sys/powerpc/conf/MPC85XXSPE b/sys/powerpc/conf/MPC85XXSPE deleted file mode 100644 index ca828137ed72..000000000000 --- a/sys/powerpc/conf/MPC85XXSPE +++ /dev/null @@ -1,151 +0,0 @@ -# -# Custom kernel for Freescale MPC85XX development boards like the CDS etc. -# -# - -cpu BOOKE -cpu BOOKE_E500 -ident MPC85XXSPE - -machine powerpc powerpcspe - -include "dpaa/config.dpaa" -makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -makeoptions WITH_CTF=1 - -options FPU_EMU -options MAXCPU=2 - -options _KPOSIX_PRIORITY_SCHEDULING -options ALT_BREAK_TO_DEBUGGER -options BREAK_TO_DEBUGGER -options BOOTP -options BOOTP_NFSROOT -#options BOOTP_NFSV3 -options CD9660 -options COMPAT_43 -options DDB -#options DEADLKRES -options DEVICE_POLLING -#options DIAGNOSTIC -options FDT -#makeoptions FDT_DTS_FILE=mpc8555cds.dts -options FFS -options GDB -options GEOM_PART_GPT -options GEOM_LABEL # Provides labelization -options VIMAGE -options INET -options INET6 -options TCP_HHOOK # hhook(9) framework for TCP -options INVARIANTS -options INVARIANT_SUPPORT -options KDB -options KTRACE -options MD_ROOT -options MPC85XX -options MSDOSFS -options NFS_ROOT -options NFSCL -options NFSLOCKD -options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed. -options PROCFS -options PSEUDOFS -options SCHED_ULE -options CAPABILITIES -options CAPABILITY_MODE -options SMP -options SYSVMSG -options SYSVSEM -options SYSVSHM -options WITNESS -options WITNESS_SKIPSPIN - -# The powerpcspe target arch can run non Altivec/VMX powerpc binaries -# Keep COMPAT options in sync with powerpc target arch. -options COMPAT_FREEBSD6 # Compatible with FreeBSD6 -options COMPAT_FREEBSD7 # Compatible with FreeBSD7 -options COMPAT_FREEBSD9 # Compatible with FreeBSD9 -options COMPAT_FREEBSD10 # Compatible with FreeBSD10 -options COMPAT_FREEBSD11 # Compatible with FreeBSD11 -options COMPAT_FREEBSD12 # Compatible with FreeBSD12 -options COMPAT_FREEBSD13 # Compatible with FreeBSD13 -options COMPAT_FREEBSD14 # Compatible with FreeBSD14 - -options HWPMC_HOOKS -options KDTRACE_HOOKS # Kernel DTrace hooks -options DDB_CTF # Kernel ELF linker loads CTF data - -device ata -device bpf -device cfi -device cpufreq -device crypto -device cryptodev -device da -device ds1307 -device ds1553 -device iflib -device em -device alc -device ether -device fxp -device gpio -device gpiopower -device iic -device iicbus -#device isa -device loop -device md -device miibus -device mmc -device mmcsd -device pass -device pci -device quicc -#device rl -device scbus -device scc -device sdhci -device sec -device spibus -device spigen -device tsec -device dpaa -device tuntap -device uart -options USB_DEBUG # enable debug msgs -#device uhci -device ehci -device hkbd -device ukbd -device hms -device ums -device umass -device usb -device usbhid -device vlan - -# VirtIO support -device virtio # Generic VirtIO bus (required) -device virtio_pci # VirtIO PCI device -device vtnet # VirtIO Ethernet device -device virtio_blk # VirtIO Block device -device virtio_scsi # VirtIO SCSI device -device virtio_balloon # VirtIO Memory Balloon device - -# P1022 DIU -device diu -device videomode -device vt -device fbd - -# evdev interface -options EVDEV_SUPPORT # evdev support in legacy drivers -device evdev # input event device support -device uinput # install /dev/uinput cdev - -# HID support -options HID_DEBUG # enable debug msgs -device hid # Generic HID support -device hidbus # Generic HID bus diff --git a/sys/powerpc/include/param.h b/sys/powerpc/include/param.h index a190f60c02cc..a154859c0459 100644 --- a/sys/powerpc/include/param.h +++ b/sys/powerpc/include/param.h @@ -57,13 +57,9 @@ #define MACHINE_ARCH "powerpc64" #endif #else -#ifdef __SPE__ -#define MACHINE_ARCH "powerpcspe" -#else #define MACHINE_ARCH "powerpc" #endif #endif -#endif #define MID_MACHINE MID_POWERPC #ifdef __powerpc64__ #ifndef MACHINE_ARCH32 diff --git a/sys/powerpc/powerpc/swtch32.S b/sys/powerpc/powerpc/swtch32.S index 547e1c5a201b..ef1a397bf74d 100644 --- a/sys/powerpc/powerpc/swtch32.S +++ b/sys/powerpc/powerpc/swtch32.S @@ -141,8 +141,8 @@ cpu_switchin: blocked_loop: lwz %r7,TD_LOCK(%r2) cmpw %r6,%r7 - beq- blocked_loop isync + beq- blocked_loop #endif lwz %r17,TD_PCB(%r2) /* Get new current PCB */ diff --git a/sys/powerpc/powerpc/swtch64.S b/sys/powerpc/powerpc/swtch64.S index 5f80751c8a10..ba37274d32bb 100644 --- a/sys/powerpc/powerpc/swtch64.S +++ b/sys/powerpc/powerpc/swtch64.S @@ -194,8 +194,8 @@ cpu_switchin: blocked_loop: ld %r7,TD_LOCK(%r13) cmpd %r6,%r7 - beq- blocked_loop isync + beq- blocked_loop #endif ld %r17,TD_PCB(%r13) /* Get new PCB */ diff --git a/sys/riscv/conf/GENERIC b/sys/riscv/conf/GENERIC index 7a2c88c0b4cb..8f9a5e1aec63 100644 --- a/sys/riscv/conf/GENERIC +++ b/sys/riscv/conf/GENERIC @@ -220,3 +220,4 @@ include "std.cvitek" include "std.eswin" include "std.sifive" include "std.starfive" +include "std.sophgo" diff --git a/sys/riscv/conf/std.sophgo b/sys/riscv/conf/std.sophgo new file mode 100644 index 000000000000..bcb9a4426acb --- /dev/null +++ b/sys/riscv/conf/std.sophgo @@ -0,0 +1,8 @@ +# +# Sophgo SoC support +# + +# DTBs +makeoptions MODULES_EXTRA+="dtb/sophgo" + +files "../sophgo/files.sophgo" diff --git a/sys/riscv/include/vmm.h b/sys/riscv/include/vmm.h index 361140834805..c346f09cc28c 100644 --- a/sys/riscv/include/vmm.h +++ b/sys/riscv/include/vmm.h @@ -104,8 +104,18 @@ enum vm_reg_name { #define VM_INTINFO_SWINTR (4 << 8) #ifdef _KERNEL +#include <machine/vmm_instruction_emul.h> + +#define VMM_VCPU_MD_FIELDS \ + struct vm_exit exitinfo; \ + uint64_t nextpc; /* (x) next instruction to execute */ \ + struct fpreg *guestfpu /* (a,i) guest fpu state */ + +#define VMM_VM_MD_FIELDS \ + struct vmm_mmio_region mmio_region[VM_MAX_MMIO_REGIONS] struct vm; +struct vm_eventinfo; struct vm_exception; struct vm_exit; struct vm_run; @@ -114,11 +124,13 @@ struct vm_guest_paging; struct vm_aplic_descr; struct pmap; -struct vm_eventinfo { - void *rptr; /* rendezvous cookie */ - int *sptr; /* suspend cookie */ - int *iptr; /* reqidle cookie */ +struct vmm_mmio_region { + uint64_t start; + uint64_t end; + mem_region_read_t read; + mem_region_write_t write; }; +#define VM_MAX_MMIO_REGIONS 4 #define DECLARE_VMMOPS_FUNC(ret_type, opname, args) \ ret_type vmmops_##opname args @@ -143,34 +155,13 @@ DECLARE_VMMOPS_FUNC(struct vmspace *, vmspace_alloc, (vm_offset_t min, vm_offset_t max)); DECLARE_VMMOPS_FUNC(void, vmspace_free, (struct vmspace *vmspace)); -int vm_create(const char *name, struct vm **retvm); -struct vcpu *vm_alloc_vcpu(struct vm *vm, int vcpuid); -void vm_disable_vcpu_creation(struct vm *vm); -void vm_lock_vcpus(struct vm *vm); -void vm_unlock_vcpus(struct vm *vm); -void vm_destroy(struct vm *vm); -int vm_reinit(struct vm *vm); -const char *vm_name(struct vm *vm); - -uint16_t vm_get_maxcpus(struct vm *vm); -void vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, - uint16_t *threads, uint16_t *maxcpus); -int vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, - uint16_t threads, uint16_t maxcpus); int vm_get_register(struct vcpu *vcpu, int reg, uint64_t *retval); int vm_set_register(struct vcpu *vcpu, int reg, uint64_t val); int vm_run(struct vcpu *vcpu); -int vm_suspend(struct vm *vm, enum vm_suspend_how how); -void* vm_get_cookie(struct vm *vm); -int vcpu_vcpuid(struct vcpu *vcpu); +void *vm_get_cookie(struct vm *vm); void *vcpu_get_cookie(struct vcpu *vcpu); -struct vm *vcpu_vm(struct vcpu *vcpu); -struct vcpu *vm_vcpu(struct vm *vm, int cpu); int vm_get_capability(struct vcpu *vcpu, int type, int *val); int vm_set_capability(struct vcpu *vcpu, int type, int val); -int vm_activate_cpu(struct vcpu *vcpu); -int vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu); -int vm_resume_cpu(struct vm *vm, struct vcpu *vcpu); int vm_inject_exception(struct vcpu *vcpu, uint64_t scause); int vm_attach_aplic(struct vm *vm, struct vm_aplic_descr *descr); int vm_assert_irq(struct vm *vm, uint32_t irq); @@ -180,62 +171,7 @@ int vm_raise_msi(struct vm *vm, uint64_t msg, uint64_t addr, int bus, int slot, struct vm_exit *vm_exitinfo(struct vcpu *vcpu); void vm_exit_suspended(struct vcpu *vcpu, uint64_t pc); void vm_exit_debug(struct vcpu *vcpu, uint64_t pc); -void vm_exit_rendezvous(struct vcpu *vcpu, uint64_t pc); void vm_exit_astpending(struct vcpu *vcpu, uint64_t pc); - -cpuset_t vm_active_cpus(struct vm *vm); -cpuset_t vm_debug_cpus(struct vm *vm); -cpuset_t vm_suspended_cpus(struct vm *vm); - -static __inline int -vcpu_rendezvous_pending(struct vm_eventinfo *info) -{ - - return (*((uintptr_t *)(info->rptr)) != 0); -} - -static __inline int -vcpu_suspended(struct vm_eventinfo *info) -{ - - return (*info->sptr); -} - -int vcpu_debugged(struct vcpu *vcpu); - -enum vcpu_state { - VCPU_IDLE, - VCPU_FROZEN, - VCPU_RUNNING, - VCPU_SLEEPING, -}; - -int vcpu_set_state(struct vcpu *vcpu, enum vcpu_state state, bool from_idle); -enum vcpu_state vcpu_get_state(struct vcpu *vcpu, int *hostcpu); - -static int __inline -vcpu_is_running(struct vcpu *vcpu, int *hostcpu) -{ - return (vcpu_get_state(vcpu, hostcpu) == VCPU_RUNNING); -} - -#ifdef _SYS_PROC_H_ -static int __inline -vcpu_should_yield(struct vcpu *vcpu) -{ - struct thread *td; - - td = curthread; - return (td->td_ast != 0 || td->td_owepreempt != 0); -} -#endif - -void *vcpu_stats(struct vcpu *vcpu); -void vcpu_notify_event(struct vcpu *vcpu); -struct vm_mem *vm_mem(struct vm *vm); - -enum vm_reg_name vm_segment_name(int seg_encoding); - #endif /* _KERNEL */ #define VM_DIR_READ 0 diff --git a/sys/riscv/include/vmm_instruction_emul.h b/sys/riscv/include/vmm_instruction_emul.h index bee63d2f86ba..5041b10569f5 100644 --- a/sys/riscv/include/vmm_instruction_emul.h +++ b/sys/riscv/include/vmm_instruction_emul.h @@ -29,6 +29,12 @@ #ifndef _VMM_INSTRUCTION_EMUL_H_ #define _VMM_INSTRUCTION_EMUL_H_ +struct vcpu; +struct vie; +struct vre; +struct vm; +struct vm_guest_paging; + /* * Callback functions to read and write memory regions. */ diff --git a/sys/riscv/sophgo/files.sophgo b/sys/riscv/sophgo/files.sophgo new file mode 100644 index 000000000000..1ce0e7a190df --- /dev/null +++ b/sys/riscv/sophgo/files.sophgo @@ -0,0 +1,2 @@ +dev/dwc/if_dwc_cvitek.c optional fdt dwc_cvitek +dev/sdhci/sdhci_fdt_cvitek.c optional fdt sdhci sdhci_cvitek regulator
\ No newline at end of file diff --git a/sys/riscv/vmm/vmm.c b/sys/riscv/vmm/vmm.c index 23b57ad3b7aa..1546bde87b41 100644 --- a/sys/riscv/vmm/vmm.c +++ b/sys/riscv/vmm/vmm.c @@ -45,7 +45,6 @@ #include <sys/rwlock.h> #include <sys/sched.h> #include <sys/smp.h> -#include <sys/sysctl.h> #include <vm/vm.h> #include <vm/vm_object.h> @@ -71,80 +70,18 @@ #include <dev/vmm/vmm_dev.h> #include <dev/vmm/vmm_ktr.h> #include <dev/vmm/vmm_mem.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_stat.h" #include "riscv.h" #include "vmm_aplic.h" -struct vcpu { - int flags; - enum vcpu_state state; - struct mtx mtx; - int hostcpu; /* host cpuid this vcpu last ran on */ - int vcpuid; - void *stats; - struct vm_exit exitinfo; - uint64_t nextpc; /* (x) next instruction to execute */ - struct vm *vm; /* (o) */ - void *cookie; /* (i) cpu-specific data */ - struct fpreg *guestfpu; /* (a,i) guest fpu state */ -}; - -#define vcpu_lock_init(v) mtx_init(&((v)->mtx), "vcpu lock", 0, MTX_SPIN) -#define vcpu_lock_destroy(v) mtx_destroy(&((v)->mtx)) -#define vcpu_lock(v) mtx_lock_spin(&((v)->mtx)) -#define vcpu_unlock(v) mtx_unlock_spin(&((v)->mtx)) -#define vcpu_assert_locked(v) mtx_assert(&((v)->mtx), MA_OWNED) - -struct vmm_mmio_region { - uint64_t start; - uint64_t end; - mem_region_read_t read; - mem_region_write_t write; -}; -#define VM_MAX_MMIO_REGIONS 4 - -/* - * Initialization: - * (o) initialized the first time the VM is created - * (i) initialized when VM is created and when it is reinitialized - * (x) initialized before use - */ -struct vm { - void *cookie; /* (i) cpu-specific data */ - volatile cpuset_t active_cpus; /* (i) active vcpus */ - volatile cpuset_t debug_cpus; /* (i) vcpus stopped for debug*/ - int suspend; /* (i) stop VM execution */ - bool dying; /* (o) is dying */ - volatile cpuset_t suspended_cpus; /* (i) suspended vcpus */ - volatile cpuset_t halted_cpus; /* (x) cpus in a hard halt */ - struct vm_mem mem; /* (i) [m+v] guest memory */ - char name[VM_MAX_NAMELEN + 1]; /* (o) virtual machine name */ - struct vcpu **vcpu; /* (i) guest vcpus */ - struct vmm_mmio_region mmio_region[VM_MAX_MMIO_REGIONS]; - /* (o) guest MMIO regions */ - /* The following describe the vm cpu topology */ - uint16_t sockets; /* (o) num of sockets */ - uint16_t cores; /* (o) num of cores/socket */ - uint16_t threads; /* (o) num of threads/core */ - uint16_t maxcpus; /* (o) max pluggable cpus */ - struct sx vcpus_init_lock; /* (o) */ -}; - static MALLOC_DEFINE(M_VMM, "vmm", "vmm"); /* statistics */ static VMM_STAT(VCPU_TOTAL_RUNTIME, "vcpu total runtime"); -SYSCTL_NODE(_hw, OID_AUTO, vmm, CTLFLAG_RW, NULL, NULL); - -static int vmm_ipinum; -SYSCTL_INT(_hw_vmm, OID_AUTO, ipinum, CTLFLAG_RD, &vmm_ipinum, 0, - "IPI vector used for vcpu notifications"); - -static void vcpu_notify_event_locked(struct vcpu *vcpu); - /* global statistics */ VMM_STAT(VMEXIT_COUNT, "total number of vm exits"); VMM_STAT(VMEXIT_IRQ, "number of vmexits for an irq"); @@ -233,14 +170,6 @@ vm_init(struct vm *vm, bool create) } } -void -vm_disable_vcpu_creation(struct vm *vm) -{ - sx_xlock(&vm->vcpus_init_lock); - vm->dying = true; - sx_xunlock(&vm->vcpus_init_lock); -} - struct vcpu * vm_alloc_vcpu(struct vm *vm, int vcpuid) { @@ -271,18 +200,6 @@ vm_alloc_vcpu(struct vm *vm, int vcpuid) return (vcpu); } -void -vm_lock_vcpus(struct vm *vm) -{ - sx_xlock(&vm->vcpus_init_lock); -} - -void -vm_unlock_vcpus(struct vm *vm) -{ - sx_unlock(&vm->vcpus_init_lock); -} - int vm_create(const char *name, struct vm **retvm) { @@ -296,6 +213,7 @@ vm_create(const char *name, struct vm **retvm) return (error); } strcpy(vm->name, name); + mtx_init(&vm->rendezvous_mtx, "vm rendezvous lock", 0, MTX_DEF); sx_init(&vm->vcpus_init_lock, "vm vcpus"); vm->sockets = 1; @@ -312,35 +230,6 @@ vm_create(const char *name, struct vm **retvm) return (0); } -void -vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, - uint16_t *threads, uint16_t *maxcpus) -{ - *sockets = vm->sockets; - *cores = vm->cores; - *threads = vm->threads; - *maxcpus = vm->maxcpus; -} - -uint16_t -vm_get_maxcpus(struct vm *vm) -{ - return (vm->maxcpus); -} - -int -vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, - uint16_t threads, uint16_t maxcpus) -{ - /* Ignore maxcpus. */ - if ((sockets * cores * threads) > vm->maxcpus) - return (EINVAL); - vm->sockets = sockets; - vm->cores = cores; - vm->threads = threads; - return(0); -} - static void vm_cleanup(struct vm *vm, bool destroy) { @@ -372,35 +261,15 @@ vm_cleanup(struct vm *vm, bool destroy) void vm_destroy(struct vm *vm) { - vm_cleanup(vm, true); - free(vm, M_VMM); } -int -vm_reinit(struct vm *vm) -{ - int error; - - /* - * A virtual machine can be reset only if all vcpus are suspended. - */ - if (CPU_CMP(&vm->suspended_cpus, &vm->active_cpus) == 0) { - vm_cleanup(vm, false); - vm_init(vm, false); - error = 0; - } else { - error = EBUSY; - } - - return (error); -} - -const char * -vm_name(struct vm *vm) +void +vm_reset(struct vm *vm) { - return (vm->name); + vm_cleanup(vm, false); + vm_init(vm, false); } int @@ -491,33 +360,6 @@ out_user: return (0); } -int -vm_suspend(struct vm *vm, enum vm_suspend_how how) -{ - int i; - - if (how <= VM_SUSPEND_NONE || how >= VM_SUSPEND_LAST) - return (EINVAL); - - if (atomic_cmpset_int(&vm->suspend, 0, how) == 0) { - VM_CTR2(vm, "virtual machine already suspended %d/%d", - vm->suspend, how); - return (EALREADY); - } - - VM_CTR1(vm, "virtual machine successfully suspended %d", how); - - /* - * Notify all active vcpus that they are now suspended. - */ - for (i = 0; i < vm->maxcpus; i++) { - if (CPU_ISSET(i, &vm->active_cpus)) - vcpu_notify_event(vm_vcpu(vm, i)); - } - - return (0); -} - void vm_exit_suspended(struct vcpu *vcpu, uint64_t pc) { @@ -545,136 +387,6 @@ vm_exit_debug(struct vcpu *vcpu, uint64_t pc) vmexit->exitcode = VM_EXITCODE_DEBUG; } -int -vm_activate_cpu(struct vcpu *vcpu) -{ - struct vm *vm = vcpu->vm; - - if (CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) - return (EBUSY); - - CPU_SET_ATOMIC(vcpu->vcpuid, &vm->active_cpus); - return (0); - -} - -int -vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu) -{ - if (vcpu == NULL) { - vm->debug_cpus = vm->active_cpus; - for (int i = 0; i < vm->maxcpus; i++) { - if (CPU_ISSET(i, &vm->active_cpus)) - vcpu_notify_event(vm_vcpu(vm, i)); - } - } else { - if (!CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) - return (EINVAL); - - CPU_SET_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); - vcpu_notify_event(vcpu); - } - return (0); -} - -int -vm_resume_cpu(struct vm *vm, struct vcpu *vcpu) -{ - - if (vcpu == NULL) { - CPU_ZERO(&vm->debug_cpus); - } else { - if (!CPU_ISSET(vcpu->vcpuid, &vm->debug_cpus)) - return (EINVAL); - - CPU_CLR_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); - } - return (0); -} - -int -vcpu_debugged(struct vcpu *vcpu) -{ - - return (CPU_ISSET(vcpu->vcpuid, &vcpu->vm->debug_cpus)); -} - -cpuset_t -vm_active_cpus(struct vm *vm) -{ - - return (vm->active_cpus); -} - -cpuset_t -vm_debug_cpus(struct vm *vm) -{ - - return (vm->debug_cpus); -} - -cpuset_t -vm_suspended_cpus(struct vm *vm) -{ - - return (vm->suspended_cpus); -} - - -void * -vcpu_stats(struct vcpu *vcpu) -{ - - return (vcpu->stats); -} - -/* - * This function is called to ensure that a vcpu "sees" a pending event - * as soon as possible: - * - If the vcpu thread is sleeping then it is woken up. - * - If the vcpu is running on a different host_cpu then an IPI will be directed - * to the host_cpu to cause the vcpu to trap into the hypervisor. - */ -static void -vcpu_notify_event_locked(struct vcpu *vcpu) -{ - int hostcpu; - - hostcpu = vcpu->hostcpu; - if (vcpu->state == VCPU_RUNNING) { - KASSERT(hostcpu != NOCPU, ("vcpu running on invalid hostcpu")); - if (hostcpu != curcpu) { - ipi_cpu(hostcpu, vmm_ipinum); - } else { - /* - * If the 'vcpu' is running on 'curcpu' then it must - * be sending a notification to itself (e.g. SELF_IPI). - * The pending event will be picked up when the vcpu - * transitions back to guest context. - */ - } - } else { - KASSERT(hostcpu == NOCPU, ("vcpu state %d not consistent " - "with hostcpu %d", vcpu->state, hostcpu)); - if (vcpu->state == VCPU_SLEEPING) - wakeup_one(vcpu); - } -} - -void -vcpu_notify_event(struct vcpu *vcpu) -{ - vcpu_lock(vcpu); - vcpu_notify_event_locked(vcpu); - vcpu_unlock(vcpu); -} - -struct vm_mem * -vm_mem(struct vm *vm) -{ - return (&vm->mem); -} - static void restore_guest_fpustate(struct vcpu *vcpu) { @@ -709,72 +421,6 @@ save_guest_fpustate(struct vcpu *vcpu) ("%s: fpcurthread set with guest registers", __func__)); } -static int -vcpu_set_state_locked(struct vcpu *vcpu, enum vcpu_state newstate, - bool from_idle) -{ - int error; - - vcpu_assert_locked(vcpu); - - /* - * State transitions from the vmmdev_ioctl() must always begin from - * the VCPU_IDLE state. This guarantees that there is only a single - * ioctl() operating on a vcpu at any point. - */ - if (from_idle) { - while (vcpu->state != VCPU_IDLE) { - vcpu_notify_event_locked(vcpu); - msleep_spin(&vcpu->state, &vcpu->mtx, "vmstat", hz); - } - } else { - KASSERT(vcpu->state != VCPU_IDLE, ("invalid transition from " - "vcpu idle state")); - } - - if (vcpu->state == VCPU_RUNNING) { - KASSERT(vcpu->hostcpu == curcpu, ("curcpu %d and hostcpu %d " - "mismatch for running vcpu", curcpu, vcpu->hostcpu)); - } else { - KASSERT(vcpu->hostcpu == NOCPU, ("Invalid hostcpu %d for a " - "vcpu that is not running", vcpu->hostcpu)); - } - - /* - * The following state transitions are allowed: - * IDLE -> FROZEN -> IDLE - * FROZEN -> RUNNING -> FROZEN - * FROZEN -> SLEEPING -> FROZEN - */ - switch (vcpu->state) { - case VCPU_IDLE: - case VCPU_RUNNING: - case VCPU_SLEEPING: - error = (newstate != VCPU_FROZEN); - break; - case VCPU_FROZEN: - error = (newstate == VCPU_FROZEN); - break; - default: - error = 1; - break; - } - - if (error) - return (EBUSY); - - vcpu->state = newstate; - if (newstate == VCPU_RUNNING) - vcpu->hostcpu = curcpu; - else - vcpu->hostcpu = NOCPU; - - if (newstate == VCPU_IDLE) - wakeup(&vcpu->state); - - return (0); -} - static void vcpu_require_state(struct vcpu *vcpu, enum vcpu_state newstate) { @@ -813,20 +459,6 @@ vm_set_capability(struct vcpu *vcpu, int type, int val) return (vmmops_setcap(vcpu->cookie, type, val)); } -struct vm * -vcpu_vm(struct vcpu *vcpu) -{ - - return (vcpu->vm); -} - -int -vcpu_vcpuid(struct vcpu *vcpu) -{ - - return (vcpu->vcpuid); -} - void * vcpu_get_cookie(struct vcpu *vcpu) { @@ -834,39 +466,6 @@ vcpu_get_cookie(struct vcpu *vcpu) return (vcpu->cookie); } -struct vcpu * -vm_vcpu(struct vm *vm, int vcpuid) -{ - - return (vm->vcpu[vcpuid]); -} - -int -vcpu_set_state(struct vcpu *vcpu, enum vcpu_state newstate, bool from_idle) -{ - int error; - - vcpu_lock(vcpu); - error = vcpu_set_state_locked(vcpu, newstate, from_idle); - vcpu_unlock(vcpu); - - return (error); -} - -enum vcpu_state -vcpu_get_state(struct vcpu *vcpu, int *hostcpu) -{ - enum vcpu_state state; - - vcpu_lock(vcpu); - state = vcpu->state; - if (hostcpu != NULL) - *hostcpu = vcpu->hostcpu; - vcpu_unlock(vcpu); - - return (state); -} - int vm_get_register(struct vcpu *vcpu, int reg, uint64_t *retval) { diff --git a/sys/riscv/vmm/vmm_aplic.c b/sys/riscv/vmm/vmm_aplic.c index 74cb4fef4273..7c1cd260d352 100644 --- a/sys/riscv/vmm/vmm_aplic.c +++ b/sys/riscv/vmm/vmm_aplic.c @@ -46,7 +46,9 @@ #include <riscv/vmm/vmm_aplic.h> #include <machine/vmm_instruction_emul.h> -#include <machine/vmm_dev.h> + +#include <dev/vmm/vmm_dev.h> +#include <dev/vmm/vmm_vm.h> MALLOC_DEFINE(M_APLIC, "RISC-V VMM APLIC", "RISC-V AIA APLIC"); diff --git a/sys/riscv/vmm/vmm_fence.c b/sys/riscv/vmm/vmm_fence.c index f8b69aac77a9..ff7eabdb3d50 100644 --- a/sys/riscv/vmm/vmm_fence.c +++ b/sys/riscv/vmm/vmm_fence.c @@ -39,6 +39,10 @@ #include <sys/mutex.h> #include <sys/bus.h> +#include <machine/vmm.h> + +#include <dev/vmm/vmm_vm.h> + #include "riscv.h" #include "vmm_fence.h" @@ -145,7 +149,6 @@ vmm_fence_add(struct vm *vm, cpuset_t *cpus, struct vmm_fence *fence) struct vcpu *vcpu; uint16_t maxcpus; int hostcpu; - int state; bool enq; int i; @@ -193,8 +196,7 @@ vmm_fence_add(struct vm *vm, cpuset_t *cpus, struct vmm_fence *fence) mb(); - state = vcpu_get_state(vcpu, &hostcpu); - if (state == VCPU_RUNNING) + if (vcpu_is_running(vcpu, &hostcpu)) CPU_SET(hostcpu, &running_cpus); } diff --git a/sys/riscv/vmm/vmm_riscv.c b/sys/riscv/vmm/vmm_riscv.c index 0e46aca60fdf..cfd3decd8cfa 100644 --- a/sys/riscv/vmm/vmm_riscv.c +++ b/sys/riscv/vmm/vmm_riscv.c @@ -59,7 +59,6 @@ #include <machine/cpu.h> #include <machine/machdep.h> #include <machine/vmm.h> -#include <machine/vmm_dev.h> #include <machine/atomic.h> #include <machine/pmap.h> #include <machine/intr.h> @@ -67,6 +66,7 @@ #include <machine/db_machdep.h> #include <dev/vmm/vmm_mem.h> +#include <dev/vmm/vmm_vm.h> #include "riscv.h" #include "vmm_aplic.h" diff --git a/sys/riscv/vmm/vmm_sbi.c b/sys/riscv/vmm/vmm_sbi.c index 426276444357..c1e6022097e3 100644 --- a/sys/riscv/vmm/vmm_sbi.c +++ b/sys/riscv/vmm/vmm_sbi.c @@ -36,6 +36,8 @@ #include <machine/sbi.h> +#include <dev/vmm/vmm_vm.h> + #include "riscv.h" #include "vmm_fence.h" diff --git a/sys/riscv/vmm/vmm_vtimer.c b/sys/riscv/vmm/vmm_vtimer.c index 0dadc962114f..cb2ca878116c 100644 --- a/sys/riscv/vmm/vmm_vtimer.c +++ b/sys/riscv/vmm/vmm_vtimer.c @@ -39,6 +39,8 @@ #include <dev/ofw/ofw_bus_subr.h> #include <dev/ofw/openfirm.h> +#include <dev/vmm/vmm_vm.h> + #include "riscv.h" #define VTIMER_DEFAULT_FREQ 1000000 diff --git a/sys/sys/_types.h b/sys/sys/_types.h index 2e622090e81d..a2ee83a862da 100644 --- a/sys/sys/_types.h +++ b/sys/sys/_types.h @@ -161,10 +161,7 @@ typedef int __cpulevel_t; /* level parameter for cpuset. */ typedef int __cpusetid_t; /* cpuset identifier. */ typedef __int64_t __daddr_t; /* bwrite(3), FIOBMAP2, etc */ -#ifndef __has_feature -#define __has_feature(x) 0 -#endif -#if !__has_feature(capabilities) +#ifndef __SIZEOF_INTCAP__ /* * On non-CHERI systems, define __(u)intcap_t to __(u)intptr_t so that * hybrid-C code which needs to be explicitly aware of capabilities can diff --git a/sys/sys/copyright.h b/sys/sys/copyright.h index 8c89adf7f885..1d660dd60646 100644 --- a/sys/sys/copyright.h +++ b/sys/sys/copyright.h @@ -1,7 +1,7 @@ /*- * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 1992-2025 The FreeBSD Project. All rights reserved. + * Copyright (C) 1992-2026 The FreeBSD Project. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -35,7 +35,7 @@ /* FreeBSD */ #define COPYRIGHT_FreeBSD \ - "Copyright (c) 1992-2025 The FreeBSD Project.\n" + "Copyright (c) 1992-2026 The FreeBSD Project.\n" /* Foundation */ #define TRADEMARK_Foundation \ diff --git a/sys/sys/exterr_cat.h b/sys/sys/exterr_cat.h index 318e774542ca..24f07539fe35 100644 --- a/sys/sys/exterr_cat.h +++ b/sys/sys/exterr_cat.h @@ -8,6 +8,17 @@ * under sponsorship from the FreeBSD Foundation. */ +/* + * The category identifiers for the extended errors. + * The ids participate in ABI between kernel and libc, so they must + * never be reused or changed. Only new ids can be added. + * + * After adding a new category id, run + * tools/build/make_libc_exterr_cat_filenames.sh + * from the top of the source tree, and commit updated file + * lib/libc/gen/exterr_cat_filenames.h + */ + #ifndef _SYS_EXTERR_CAT_H_ #define _SYS_EXTERR_CAT_H_ @@ -15,7 +26,7 @@ #define EXTERR_CAT_FILEDESC 2 #define EXTERR_KTRACE 3 /* To allow inclusion of this file into kern_ktrace.c */ -#define EXTERR_CAT_FUSE 4 +#define EXTERR_CAT_FUSE_VNOPS 4 #define EXTERR_CAT_INOTIFY 5 #define EXTERR_CAT_GENIO 6 #define EXTERR_CAT_BRIDGE 7 @@ -24,6 +35,8 @@ #define EXTERR_CAT_VFSBIO 10 #define EXTERR_CAT_GEOMVFS 11 #define EXTERR_CAT_GEOM 12 +#define EXTERR_CAT_FUSE_VFS 13 +#define EXTERR_CAT_FUSE_DEVICE 14 #endif diff --git a/sys/vm/vm_kern.c b/sys/vm/vm_kern.c index ac327aa37b72..626632b74add 100644 --- a/sys/vm/vm_kern.c +++ b/sys/vm/vm_kern.c @@ -953,14 +953,6 @@ kmem_bootstrap_free(vm_offset_t start, vm_size_t size) end = trunc_page(start + size); start = round_page(start); -#ifdef __amd64__ - /* - * Preloaded files do not have execute permissions by default on amd64. - * Restore the default permissions to ensure that the direct map alias - * is updated. - */ - pmap_change_prot(start, end - start, VM_PROT_RW); -#endif for (va = start; va < end; va += PAGE_SIZE) { pa = pmap_kextract(va); m = PHYS_TO_VM_PAGE(pa); diff --git a/sys/vm/vm_map.c b/sys/vm/vm_map.c index 6b09552c5fee..68dcadd2b2f1 100644 --- a/sys/vm/vm_map.c +++ b/sys/vm/vm_map.c @@ -1620,6 +1620,7 @@ vm_map_insert1(vm_map_t map, vm_object_t object, vm_ooffset_t offset, vm_inherit_t inheritance; u_long bdry; u_int bidx; + int cflags; VM_MAP_ASSERT_LOCKED(map); KASSERT(object != kernel_object || @@ -1696,20 +1697,36 @@ vm_map_insert1(vm_map_t map, vm_object_t object, vm_ooffset_t offset, } cred = NULL; - if ((cow & (MAP_ACC_NO_CHARGE | MAP_NOFAULT | MAP_CREATE_GUARD)) != 0) - goto charged; - if ((cow & MAP_ACC_CHARGED) || ((prot & VM_PROT_WRITE) && - ((protoeflags & MAP_ENTRY_NEEDS_COPY) || object == NULL))) { - if (!(cow & MAP_ACC_CHARGED) && !swap_reserve(end - start)) - return (KERN_RESOURCE_SHORTAGE); - KASSERT(object == NULL || - (protoeflags & MAP_ENTRY_NEEDS_COPY) != 0 || - object->cred == NULL, - ("overcommit: vm_map_insert o %p", object)); - cred = curthread->td_ucred; + if ((cow & (MAP_ACC_NO_CHARGE | MAP_NOFAULT | MAP_CREATE_GUARD)) != 0) { + cflags = OBJCO_NO_CHARGE; + } else { + cflags = 0; + if ((cow & MAP_ACC_CHARGED) != 0 || + ((prot & VM_PROT_WRITE) != 0 && + ((protoeflags & MAP_ENTRY_NEEDS_COPY) != 0 || + object == NULL))) { + if ((cow & MAP_ACC_CHARGED) == 0) { + if (!swap_reserve(end - start)) + return (KERN_RESOURCE_SHORTAGE); + + /* + * Only inform vm_object_coalesce() + * that the object was charged if + * there is no need for CoW, so the + * swap amount reserved is applicable + * to the prev_entry->object. + */ + if ((protoeflags & MAP_ENTRY_NEEDS_COPY) == 0) + cflags |= OBJCO_CHARGED; + } + KASSERT(object == NULL || + (protoeflags & MAP_ENTRY_NEEDS_COPY) != 0 || + object->cred == NULL, + ("overcommit: vm_map_insert o %p", object)); + cred = curthread->td_ucred; + } } -charged: /* Expand the kernel pmap, if necessary. */ if (map == kernel_map && end > kernel_vm_end) { int rv; @@ -1741,8 +1758,7 @@ charged: vm_object_coalesce(prev_entry->object.vm_object, prev_entry->offset, (vm_size_t)(prev_entry->end - prev_entry->start), - (vm_size_t)(end - prev_entry->end), cred != NULL && - (protoeflags & MAP_ENTRY_NEEDS_COPY) == 0)) { + (vm_size_t)(end - prev_entry->end), cflags)) { /* * We were able to extend the object. Determine if we * can extend the previous map entry to include the diff --git a/sys/vm/vm_mmap.c b/sys/vm/vm_mmap.c index 501ace32bd11..234586893b59 100644 --- a/sys/vm/vm_mmap.c +++ b/sys/vm/vm_mmap.c @@ -197,12 +197,14 @@ kern_mmap(struct thread *td, const struct mmap_req *mrp) check_fp_fn = mrp->mr_check_fp_fn; if ((prot & ~(_PROT_ALL | PROT_MAX(_PROT_ALL))) != 0) { - return (EXTERROR(EINVAL, "unknown PROT bits")); + return (EXTERROR(EINVAL, "unknown PROT bits %#jx", prot)); } max_prot = PROT_MAX_EXTRACT(prot); prot = PROT_EXTRACT(prot); if (max_prot != 0 && (max_prot & prot) != prot) { - return (EXTERROR(ENOTSUP, "prot is not subset of max_prot")); + return (EXTERROR(ENOTSUP, + "prot %#jx is not subset of max_prot %#jx", + prot, max_prot)); } p = td->td_proc; @@ -236,7 +238,7 @@ kern_mmap(struct thread *td, const struct mmap_req *mrp) if ((len == 0 && p->p_osrel >= P_OSREL_MAP_ANON) || ((flags & MAP_ANON) != 0 && (fd != -1 || pos != 0))) { return (EXTERROR(EINVAL, - "offset not zero/fd not -1 for MAP_ANON", + "offset %#jd not zero/fd %#jd not -1 for MAP_ANON", fd, pos)); } } else { @@ -247,8 +249,8 @@ kern_mmap(struct thread *td, const struct mmap_req *mrp) if (flags & MAP_STACK) { if ((fd != -1) || ((prot & (PROT_READ | PROT_WRITE)) != (PROT_READ | PROT_WRITE))) { - return (EXTERROR(EINVAL, "MAP_STACK with prot < rw", - prot)); + return (EXTERROR(EINVAL, + "MAP_STACK with prot %#jx < rw", prot)); } flags |= MAP_ANON; pos = 0; @@ -257,18 +259,21 @@ kern_mmap(struct thread *td, const struct mmap_req *mrp) MAP_STACK | MAP_NOSYNC | MAP_ANON | MAP_EXCL | MAP_NOCORE | MAP_PREFAULT_READ | MAP_GUARD | MAP_32BIT | MAP_ALIGNMENT_MASK)) != 0) { - return (EXTERROR(EINVAL, "reserved flag set")); + return (EXTERROR(EINVAL, "reserved flag set (flags %#jx)", + flags)); } if ((flags & (MAP_EXCL | MAP_FIXED)) == MAP_EXCL) { - return (EXTERROR(EINVAL, "EXCL without FIXED")); + return (EXTERROR(EINVAL, "EXCL without FIXED (flags %#jx)", + flags)); } if ((flags & (MAP_SHARED | MAP_PRIVATE)) == (MAP_SHARED | MAP_PRIVATE)) { - return (EXTERROR(EINVAL, "both SHARED and PRIVATE set")); + return (EXTERROR(EINVAL, + "both SHARED and PRIVATE set (flags %#jx)", flags)); } if (prot != PROT_NONE && (prot & ~(PROT_READ | PROT_WRITE | PROT_EXEC)) != 0) { - return (EXTERROR(EINVAL, "invalid prot", prot)); + return (EXTERROR(EINVAL, "invalid prot %#jx", prot)); } if ((flags & MAP_GUARD) != 0 && (prot != PROT_NONE || fd != -1 || pos != 0 || (flags & ~(MAP_FIXED | MAP_GUARD | MAP_EXCL | @@ -295,7 +300,7 @@ kern_mmap(struct thread *td, const struct mmap_req *mrp) if (align != 0 && align != MAP_ALIGNED_SUPER && (align >> MAP_ALIGNMENT_SHIFT >= sizeof(void *) * NBBY || align >> MAP_ALIGNMENT_SHIFT < PAGE_SHIFT)) { - return (EXTERROR(EINVAL, "bad alignment", align)); + return (EXTERROR(EINVAL, "bad alignment %#jx", align)); } /* @@ -310,8 +315,8 @@ kern_mmap(struct thread *td, const struct mmap_req *mrp) */ addr -= pageoff; if ((addr & PAGE_MASK) != 0) { - return (EXTERROR(EINVAL, "fixed mapping not aligned", - addr)); + return (EXTERROR(EINVAL, + "fixed mapping at %#jx not aligned", addr)); } /* Address range must be all in user VM space. */ @@ -321,7 +326,8 @@ kern_mmap(struct thread *td, const struct mmap_req *mrp) } if (flags & MAP_32BIT && addr + size > MAP_32BIT_MAX_ADDR) { return (EXTERROR(EINVAL, - "fixed 32bit mapping does not fit into 4G")); + "fixed 32bit mapping of [%#jx %#jx] does not fit into 4G", + addr, addr + size)); } } else if (flags & MAP_32BIT) { /* @@ -1495,7 +1501,7 @@ vm_mmap(vm_map_t map, vm_offset_t *addr, vm_size_t size, vm_prot_t prot, handle, &foff, &object, &writecounted); break; default: - error = EXTERROR(EINVAL, "unsupported backing obj type", + error = EXTERROR(EINVAL, "unsupported backing obj type %jd", handle_type); break; } @@ -1578,7 +1584,7 @@ vm_mmap_object(vm_map_t map, vm_offset_t *addr, vm_size_t size, vm_prot_t prot, * exec). */ if ((foff & PAGE_MASK) != 0) { - return (EXTERROR(EINVAL, "offset not page-aligned", foff)); + return (EXTERROR(EINVAL, "offset %#jx not page-aligned", foff)); } if ((flags & MAP_FIXED) == 0) { @@ -1587,7 +1593,8 @@ vm_mmap_object(vm_map_t map, vm_offset_t *addr, vm_size_t size, vm_prot_t prot, } else { if (*addr != trunc_page(*addr)) { return (EXTERROR(EINVAL, - "non-fixed mapping address not aligned", *addr)); + "non-fixed mapping address %#jx not aligned", + *addr)); } fitit = false; } @@ -1599,7 +1606,7 @@ vm_mmap_object(vm_map_t map, vm_offset_t *addr, vm_size_t size, vm_prot_t prot, } if (foff != 0) { return (EXTERROR(EINVAL, - "anon mapping with non-zero offset")); + "anon mapping with non-zero offset %#jx", foff)); } docow = 0; } else if (flags & MAP_PREFAULT_READ) @@ -1702,6 +1709,6 @@ vm_mmap_to_errno(int rv) } if ((curthread->td_pflags2 & (TDP2_UEXTERR | TDP2_EXTERR)) == TDP2_UEXTERR) - EXTERROR(error, "mach error", rv); + EXTERROR(error, "mach error %jd", rv); return (error); } diff --git a/sys/vm/vm_object.c b/sys/vm/vm_object.c index 117900135ac3..f4c54ba91742 100644 --- a/sys/vm/vm_object.c +++ b/sys/vm/vm_object.c @@ -2161,9 +2161,9 @@ vm_object_populate(vm_object_t object, vm_pindex_t start, vm_pindex_t end) */ boolean_t vm_object_coalesce(vm_object_t prev_object, vm_ooffset_t prev_offset, - vm_size_t prev_size, vm_size_t next_size, boolean_t reserved) + vm_size_t prev_size, vm_size_t next_size, int cflags) { - vm_pindex_t next_pindex; + vm_pindex_t next_end, next_pindex; if (prev_object == NULL) return (TRUE); @@ -2197,10 +2197,12 @@ vm_object_coalesce(vm_object_t prev_object, vm_ooffset_t prev_offset, return (FALSE); } + next_end = next_pindex + next_size; + /* * Account for the charge. */ - if (prev_object->cred != NULL) { + if (prev_object->cred != NULL && (cflags & OBJCO_NO_CHARGE) == 0) { /* * If prev_object was charged, then this mapping, * although not charged now, may become writable @@ -2211,38 +2213,50 @@ vm_object_coalesce(vm_object_t prev_object, vm_ooffset_t prev_offset, * entry, and swap reservation for this entry is * managed in appropriate time. */ - if (!reserved && !swap_reserve_by_cred(ptoa(next_size), - prev_object->cred)) { - VM_OBJECT_WUNLOCK(prev_object); - return (FALSE); + if (next_end > prev_object->size) { + vm_size_t charge = ptoa(next_end - prev_object->size); + + if ((cflags & OBJCO_CHARGED) == 0) { + if (!swap_reserve_by_cred(charge, + prev_object->cred)) { + VM_OBJECT_WUNLOCK(prev_object); + return (FALSE); + } + } else if (prev_object->size > next_pindex) { + /* + * The caller charged, but: + * - the object has already accounted for the + * space, + * - and the object end is between previous + * mapping end and next_end. + */ + swap_release_by_cred(ptoa(prev_object->size - + next_pindex), prev_object->cred); + } + prev_object->charge += charge; + } else if ((cflags & OBJCO_CHARGED) != 0) { + /* + * The caller charged, but the object has + * already accounted for the space. Whole new + * mapping charge should be released, + */ + swap_release_by_cred(ptoa(next_size), + prev_object->cred); } - prev_object->charge += ptoa(next_size); } /* * Remove any pages that may still be in the object from a previous * deallocation. */ - if (next_pindex < prev_object->size) { - vm_object_page_remove(prev_object, next_pindex, next_pindex + - next_size, 0); -#if 0 - if (prev_object->cred != NULL) { - KASSERT(prev_object->charge >= - ptoa(prev_object->size - next_pindex), - ("object %p overcharged 1 %jx %jx", prev_object, - (uintmax_t)next_pindex, (uintmax_t)next_size)); - prev_object->charge -= ptoa(prev_object->size - - next_pindex); - } -#endif - } + if (next_pindex < prev_object->size) + vm_object_page_remove(prev_object, next_pindex, next_end, 0); /* * Extend the object if necessary. */ - if (next_pindex + next_size > prev_object->size) - prev_object->size = next_pindex + next_size; + if (next_end > prev_object->size) + prev_object->size = next_end; #ifdef INVARIANTS /* @@ -2254,7 +2268,7 @@ vm_object_coalesce(vm_object_t prev_object, vm_ooffset_t prev_offset, vm_pindex_t pidx; pidx = swap_pager_seek_data(prev_object, next_pindex); - KASSERT(pidx >= next_pindex + next_size, + KASSERT(pidx >= next_end, ("found obj %p pindex %#jx e %#jx %#jx %#jx", prev_object, pidx, (uintmax_t)prev_offset, (uintmax_t)prev_size, (uintmax_t)next_size)); diff --git a/sys/vm/vm_object.h b/sys/vm/vm_object.h index e58fae5f0090..ca88adc12c24 100644 --- a/sys/vm/vm_object.h +++ b/sys/vm/vm_object.h @@ -197,8 +197,8 @@ struct vm_object { #define OBJ_SPLIT 0x00000400 /* object is being split */ #define OBJ_COLLAPSING 0x00000800 /* Parent of collapse. */ #define OBJ_COLORED 0x00001000 /* pg_color is defined */ -#define OBJ_ONEMAPPING 0x00002000 /* One USE (a single, non-forked) - mapping flag */ +#define OBJ_ONEMAPPING 0x00002000 /* Each page has at most one managed + mapping, all in the same vm_map */ #define OBJ_PAGERPRIV1 0x00004000 /* Pager private */ #define OBJ_PAGERPRIV2 0x00008000 /* Pager private */ #define OBJ_SYSVSHM 0x00010000 /* SysV SHM */ @@ -228,6 +228,12 @@ struct vm_object { #define OBJPR_NOTMAPPED 0x2 /* Don't unmap pages. */ #define OBJPR_VALIDONLY 0x4 /* Ignore invalid pages. */ +/* + * Options for vm_object_coalesce(). + */ +#define OBJCO_CHARGED 0x1 /* The next_size was charged already */ +#define OBJCO_NO_CHARGE 0x2 /* Do not do swap accounting at all */ + TAILQ_HEAD(object_q, vm_object); extern struct object_q vm_object_list; /* list of allocated objects */ @@ -354,7 +360,7 @@ vm_object_t vm_object_allocate_anon(vm_pindex_t, vm_object_t, struct ucred *, vm_size_t); vm_object_t vm_object_allocate_dyn(objtype_t, vm_pindex_t, u_short); boolean_t vm_object_coalesce(vm_object_t, vm_ooffset_t, vm_size_t, vm_size_t, - boolean_t); + int); void vm_object_collapse (vm_object_t); void vm_object_deallocate (vm_object_t); void vm_object_destroy (vm_object_t); diff --git a/sys/x86/conf/NOTES b/sys/x86/conf/NOTES index 643105096be2..2c8efa3726dc 100644 --- a/sys/x86/conf/NOTES +++ b/sys/x86/conf/NOTES @@ -329,6 +329,7 @@ options VGA_DEBUG # vt(4) drivers. device vt_vga # VGA device vt_vbefb # VBE framebuffer +device vt_efifb # EFI framebuffer # Linear framebuffer driver for S3 VESA 1.2 cards. Works on top of VESA. device s3pci diff --git a/sys/x86/cpufreq/hwpstate_amd.c b/sys/x86/cpufreq/hwpstate_amd.c index fc948dc90a15..ce0e0f6dd47a 100644 --- a/sys/x86/cpufreq/hwpstate_amd.c +++ b/sys/x86/cpufreq/hwpstate_amd.c @@ -8,6 +8,7 @@ * Copyright (c) 2009 Michael Reifenberger * Copyright (c) 2009 Norikatsu Shigemura * Copyright (c) 2008-2009 Gen Otsuji + * Copyright (c) 2025 ShengYi Hung * * This code is depending on kern_cpu.c, est.c, powernow.c, p4tcc.c, smist.c * in various parts. The authors of these files are Nate Lawson, @@ -55,6 +56,7 @@ #include <sys/malloc.h> #include <sys/proc.h> #include <sys/pcpu.h> +#include <sys/sbuf.h> #include <sys/smp.h> #include <sys/sched.h> @@ -74,6 +76,15 @@ #define MSR_AMD_10H_11H_STATUS 0xc0010063 #define MSR_AMD_10H_11H_CONFIG 0xc0010064 +#define MSR_AMD_CPPC_CAPS_1 0xc00102b0 +#define MSR_AMD_CPPC_ENABLE 0xc00102b1 +#define MSR_AMD_CPPC_CAPS_2 0xc00102b2 +#define MSR_AMD_CPPC_REQUEST 0xc00102b3 +#define MSR_AMD_CPPC_STATUS 0xc00102b4 + +#define MSR_AMD_PWR_ACC 0xc001007a +#define MSR_AMD_PWR_ACC_MX 0xc001007b + #define AMD_10H_11H_MAX_STATES 16 /* for MSR_AMD_10H_11H_LIMIT C001_0061 */ @@ -92,6 +103,23 @@ #define AMD_1AH_CUR_FID(msr) ((msr) & 0xFFF) +#define AMD_CPPC_CAPS_1_HIGH_PERF_BITS 0xff000000 +#define AMD_CPPC_CAPS_1_NOMINAL_PERF_BITS 0x00ff0000 +#define AMD_CPPC_CAPS_1_LOW_NONLIN_PERF_BITS 0x0000ff00 +#define AMD_CPPC_CAPS_1_LOW_PERF_BITS 0x000000ff + +#define AMD_CPPC_REQUEST_ENERGY_PERF_BITS 0xff000000 +#define AMD_CPPC_REQUEST_DES_PERF_BITS 0x00ff0000 +#define AMD_CPPC_REQUEST_MIN_PERF_BITS 0x0000ff00 +#define AMD_CPPC_REQUEST_MAX_PERF_BITS 0x000000ff + +#define HWP_AMD_CLASSNAME "hwpstate_amd" + +#define BITS_VALUE(bits, num) (((num) & (bits)) >> (ffsll((bits)) - 1)) +#define BITS_WITH_VALUE(bits, val) ((uintmax_t)(val) << (ffsll((bits)) - 1)) +#define SET_BITS_VALUE(var, bits, val) \ + ((var) = ((var) & ~(bits)) | BITS_WITH_VALUE((bits), (val))) + #define HWPSTATE_DEBUG(dev, msg...) \ do { \ if (hwpstate_verbose) \ @@ -106,10 +134,16 @@ struct hwpstate_setting { int pstate_id; /* P-State id */ }; +enum hwpstate_flags { + PSTATE_CPPC = 1, +}; + struct hwpstate_softc { device_t dev; - struct hwpstate_setting hwpstate_settings[AMD_10H_11H_MAX_STATES]; + struct hwpstate_setting hwpstate_settings[AMD_10H_11H_MAX_STATES]; int cfnum; + uint32_t flags; + uint64_t req; }; static void hwpstate_identify(driver_t *driver, device_t parent); @@ -140,6 +174,11 @@ SYSCTL_BOOL(_debug, OID_AUTO, hwpstate_pstate_limit, CTLFLAG_RWTUN, "If enabled (1), limit administrative control of P-states to the value in " "CurPstateLimit"); +static bool hwpstate_pkg_ctrl_enable = true; +SYSCTL_BOOL(_machdep, OID_AUTO, hwpstate_pkg_ctrl, CTLFLAG_RDTUN, + &hwpstate_pkg_ctrl_enable, 0, + "Set 1 (default) to enable package-level control, 0 to disable"); + static device_method_t hwpstate_methods[] = { /* Device interface */ DEVMETHOD(device_identify, hwpstate_identify), @@ -159,8 +198,154 @@ static device_method_t hwpstate_methods[] = { {0, 0} }; +static int +amdhwp_dump_sysctl_handler(SYSCTL_HANDLER_ARGS) +{ + device_t dev; + struct pcpu *pc; + struct sbuf *sb; + struct hwpstate_softc *sc; + uint64_t data; + int ret; + + sc = (struct hwpstate_softc *)arg1; + dev = sc->dev; + + pc = cpu_get_pcpu(dev); + if (pc == NULL) + return (ENXIO); + + sb = sbuf_new(NULL, NULL, 1024, SBUF_FIXEDLEN | SBUF_INCLUDENUL); + sbuf_putc(sb, '\n'); + thread_lock(curthread); + sched_bind(curthread, pc->pc_cpuid); + thread_unlock(curthread); + + rdmsr_safe(MSR_AMD_CPPC_ENABLE, &data); + sbuf_printf(sb, "CPU%d: HWP %sabled\n", pc->pc_cpuid, + ((data & 1) ? "En" : "Dis")); + + if (data == 0) { + ret = 0; + goto out; + } + + rdmsr_safe(MSR_AMD_CPPC_CAPS_1, &data); + sbuf_printf(sb, "\tHighest Performance: %03ju\n", + BITS_VALUE(AMD_CPPC_CAPS_1_HIGH_PERF_BITS, data)); + sbuf_printf(sb, "\tGuaranteed Performance: %03ju\n", + BITS_VALUE(AMD_CPPC_CAPS_1_NOMINAL_PERF_BITS, data)); + sbuf_printf(sb, "\tEfficient Performance: %03ju\n", + BITS_VALUE(AMD_CPPC_CAPS_1_LOW_NONLIN_PERF_BITS, data)); + sbuf_printf(sb, "\tLowest Performance: %03ju\n", + BITS_VALUE(AMD_CPPC_CAPS_1_LOW_PERF_BITS, data)); + sbuf_putc(sb, '\n'); + + rdmsr_safe(MSR_AMD_CPPC_REQUEST, &data); + +#define pkg_print(name, offset) \ + do { \ + sbuf_printf(sb, "\t%s: %03u\n", name, \ + (unsigned)(data >> offset) & 0xff); \ + } while (0) + + pkg_print("Requested Efficiency Performance Preference", 24); + pkg_print("Requested Desired Performance", 16); + pkg_print("Requested Maximum Performance", 8); + pkg_print("Requested Minimum Performance", 0); +#undef pkg_print + + sbuf_putc(sb, '\n'); + +out: + thread_lock(curthread); + sched_unbind(curthread); + thread_unlock(curthread); + + ret = sbuf_finish(sb); + if (ret == 0) + ret = SYSCTL_OUT(req, sbuf_data(sb), sbuf_len(sb)); + sbuf_delete(sb); + + return (ret); +} + +static bool +sysctl_epp_select_per_core(const device_t hwp_device, uint32_t val) +{ + struct hwpstate_softc *sc; + bool success = true; + int ret, cpuid; + + cpuid = cpu_get_pcpu(hwp_device)->pc_cpuid; + thread_lock(curthread); + sched_bind(curthread, cpuid); + thread_unlock(curthread); + sc = device_get_softc(hwp_device); + if (BITS_VALUE(AMD_CPPC_REQUEST_ENERGY_PERF_BITS, sc->req) == val) + goto end; + SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_ENERGY_PERF_BITS, val); + ret = wrmsr_safe(MSR_AMD_CPPC_REQUEST, sc->req); + if (ret != 0) { + success = false; + device_printf(hwp_device, "Failed to set EPP to %u", val); + goto end; + } + +end: + thread_lock(curthread); + sched_unbind(curthread); + thread_unlock(curthread); + + return (success); +} + +static int +sysctl_epp_select(SYSCTL_HANDLER_ARGS) +{ + device_t dev, hwp_dev; + struct hwpstate_softc *sc; + const uint32_t max_energy_perf = + BITS_VALUE(AMD_CPPC_REQUEST_ENERGY_PERF_BITS, (uint64_t)-1); + devclass_t dc; + uint32_t val; + int ret = 0; + int cpu; + + dev = oidp->oid_arg1; + sc = device_get_softc(dev); + + if (!(sc->flags & PSTATE_CPPC)) + return (ENODEV); + + val = BITS_VALUE(AMD_CPPC_REQUEST_ENERGY_PERF_BITS, sc->req) * 100 / + max_energy_perf; + ret = sysctl_handle_int(oidp, &val, 0, req); + if (ret != 0 || req->newptr == NULL) + goto end; + if (val > 100) { + ret = EINVAL; + goto end; + } + val = (val * max_energy_perf) / 100; + + if (hwpstate_pkg_ctrl_enable) { + dc = devclass_find(HWP_AMD_CLASSNAME); + KASSERT(dc != NULL, + (HWP_AMD_CLASSNAME ": devclass cannot be null")); + CPU_FOREACH(cpu) { + hwp_dev = devclass_get_device(dc, cpu); + sysctl_epp_select_per_core(hwp_dev, val); + } + } else + sysctl_epp_select_per_core(dev, val); + +end: + return (ret); +} + static driver_t hwpstate_driver = { - "hwpstate", + HWP_AMD_CLASSNAME, hwpstate_methods, sizeof(struct hwpstate_softc), }; @@ -269,6 +454,8 @@ hwpstate_set(device_t dev, const struct cf_setting *cf) if (cf == NULL) return (EINVAL); sc = device_get_softc(dev); + if (sc->flags & PSTATE_CPPC) + return (EOPNOTSUPP); set = sc->hwpstate_settings; for (i = 0; i < sc->cfnum; i++) if (CPUFREQ_CMP(cf->freq, set[i].freq)) @@ -284,21 +471,38 @@ hwpstate_get(device_t dev, struct cf_setting *cf) { struct hwpstate_softc *sc; struct hwpstate_setting set; + struct pcpu *pc; uint64_t msr; + uint64_t rate; + int ret; sc = device_get_softc(dev); if (cf == NULL) return (EINVAL); - msr = rdmsr(MSR_AMD_10H_11H_STATUS); - if (msr >= sc->cfnum) - return (EINVAL); - set = sc->hwpstate_settings[msr]; - cf->freq = set.freq; - cf->volts = set.volts; - cf->power = set.power; - cf->lat = set.lat; - cf->dev = dev; + if (sc->flags & PSTATE_CPPC) { + pc = cpu_get_pcpu(dev); + if (pc == NULL) + return (ENXIO); + + memset(cf, CPUFREQ_VAL_UNKNOWN, sizeof(*cf)); + cf->dev = dev; + if ((ret = cpu_est_clockrate(pc->pc_cpuid, &rate))) + return (ret); + cf->freq = rate / 1000000; + } else { + msr = rdmsr(MSR_AMD_10H_11H_STATUS); + if (msr >= sc->cfnum) + return (EINVAL); + set = sc->hwpstate_settings[msr]; + + cf->freq = set.freq; + cf->volts = set.volts; + cf->power = set.power; + cf->lat = set.lat; + cf->dev = dev; + } + return (0); } @@ -312,6 +516,9 @@ hwpstate_settings(device_t dev, struct cf_setting *sets, int *count) if (sets == NULL || count == NULL) return (EINVAL); sc = device_get_softc(dev); + if (sc->flags & PSTATE_CPPC) + return (EOPNOTSUPP); + if (*count < sc->cfnum) return (E2BIG); for (i = 0; i < sc->cfnum; i++, sets++) { @@ -330,19 +537,24 @@ hwpstate_settings(device_t dev, struct cf_setting *sets, int *count) static int hwpstate_type(device_t dev, int *type) { + struct hwpstate_softc *sc; if (type == NULL) return (EINVAL); + sc = device_get_softc(dev); *type = CPUFREQ_TYPE_ABSOLUTE; + *type |= sc->flags & PSTATE_CPPC ? + CPUFREQ_FLAG_INFO_ONLY | CPUFREQ_FLAG_UNCACHED : + 0; return (0); } static void hwpstate_identify(driver_t *driver, device_t parent) { - - if (device_find_child(parent, "hwpstate", DEVICE_UNIT_ANY) != NULL) + if (device_find_child(parent, HWP_AMD_CLASSNAME, DEVICE_UNIT_ANY) != + NULL) return; if ((cpu_vendor_id != CPU_VENDOR_AMD || CPUID_TO_FAMILY(cpu_id) < 0x10) && @@ -357,15 +569,83 @@ hwpstate_identify(driver_t *driver, device_t parent) return; } - if (resource_disabled("hwpstate", 0)) + if (resource_disabled(HWP_AMD_CLASSNAME, 0)) return; - if (BUS_ADD_CHILD(parent, 10, "hwpstate", device_get_unit(parent)) - == NULL) + if (BUS_ADD_CHILD(parent, 10, HWP_AMD_CLASSNAME, + device_get_unit(parent)) == NULL) device_printf(parent, "hwpstate: add child failed\n"); } static int +amd_set_autonomous_hwp(struct hwpstate_softc *sc) +{ + struct pcpu *pc; + device_t dev; + uint64_t caps; + int ret; + + dev = sc->dev; + pc = cpu_get_pcpu(dev); + if (pc == NULL) + return (ENXIO); + + thread_lock(curthread); + sched_bind(curthread, pc->pc_cpuid); + thread_unlock(curthread); + + ret = wrmsr_safe(MSR_AMD_CPPC_ENABLE, 1); + if (ret != 0) { + device_printf(dev, "Failed to enable cppc for cpu%d (%d)\n", + pc->pc_cpuid, ret); + goto out; + } + + ret = rdmsr_safe(MSR_AMD_CPPC_REQUEST, &sc->req); + if (ret != 0) { + device_printf(dev, + "Failed to read CPPC request MSR for cpu%d (%d)\n", + pc->pc_cpuid, ret); + goto out; + } + + ret = rdmsr_safe(MSR_AMD_CPPC_CAPS_1, &caps); + if (ret != 0) { + device_printf(dev, + "Failed to read HWP capabilities MSR for cpu%d (%d)\n", + pc->pc_cpuid, ret); + goto out; + } + + /* + * In Intel's reference manual, the default value of EPP is 0x80u which + * is the balanced mode. For consistency, we set the same value in AMD's + * CPPC driver. + */ + SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_ENERGY_PERF_BITS, 0x80); + SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_MIN_PERF_BITS, + BITS_VALUE(AMD_CPPC_CAPS_1_LOW_PERF_BITS, caps)); + SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_MAX_PERF_BITS, + BITS_VALUE(AMD_CPPC_CAPS_1_HIGH_PERF_BITS, caps)); + /* enable autonomous mode by setting desired performance to 0 */ + SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_DES_PERF_BITS, 0); + + ret = wrmsr_safe(MSR_AMD_CPPC_REQUEST, sc->req); + if (ret) { + device_printf(dev, + "Failed to setup autonomous HWP for cpu%d\n", + pc->pc_cpuid); + goto out; + } +out: + thread_lock(curthread); + sched_unbind(curthread); + thread_unlock(curthread); + + return (ret); +} + +static int hwpstate_probe(device_t dev) { struct hwpstate_softc *sc; @@ -373,15 +653,25 @@ hwpstate_probe(device_t dev) uint64_t msr; int error, type; - /* - * Only hwpstate0. - * It goes well with acpi_throttle. - */ - if (device_get_unit(dev) != 0) - return (ENXIO); - sc = device_get_softc(dev); + + if (amd_extended_feature_extensions & AMDFEID_CPPC) { + sc->flags |= PSTATE_CPPC; + device_set_desc(dev, + "AMD Collaborative Processor Performance Control (CPPC)"); + } else { + /* + * No CPPC support. Only keep hwpstate0, it goes well with + * acpi_throttle. + */ + if (device_get_unit(dev) != 0) + return (ENXIO); + device_set_desc(dev, "Cool`n'Quiet 2.0"); + } + sc->dev = dev; + if (sc->flags & PSTATE_CPPC) + return (0); /* * Check if acpi_perf has INFO only flag. @@ -433,14 +723,32 @@ hwpstate_probe(device_t dev) if (error) return (error); - device_set_desc(dev, "Cool`n'Quiet 2.0"); return (0); } static int hwpstate_attach(device_t dev) { + struct hwpstate_softc *sc; + int res; + sc = device_get_softc(dev); + if (sc->flags & PSTATE_CPPC) { + if ((res = amd_set_autonomous_hwp(sc))) + return res; + SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), + SYSCTL_STATIC_CHILDREN(_debug), OID_AUTO, + device_get_nameunit(dev), + CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_SKIP | CTLFLAG_MPSAFE, + sc, 0, amdhwp_dump_sysctl_handler, "A", ""); + + SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, + "epp", CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, dev, 0, + sysctl_epp_select, "I", + "Efficiency/Performance Preference " + "(range from 0, most performant, through 100, most efficient)"); + } return (cpufreq_register(dev)); } @@ -584,8 +892,11 @@ out: static int hwpstate_detach(device_t dev) { + struct hwpstate_softc *sc; - hwpstate_goto_pstate(dev, 0); + sc = device_get_softc(dev); + if (!(sc->flags & PSTATE_CPPC)) + hwpstate_goto_pstate(dev, 0); return (cpufreq_unregister(dev)); } diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h index e9dde5c3b46a..3e5f598cd82a 100644 --- a/sys/x86/include/specialreg.h +++ b/sys/x86/include/specialreg.h @@ -418,6 +418,7 @@ #define AMDPM_HW_PSTATE 0x00000080 #define AMDPM_TSC_INVARIANT 0x00000100 #define AMDPM_CPB 0x00000200 +#define AMDPM_PWR_REPORT 0x00001000 /* * AMD extended function 8000_0008h ebx info (amd_extended_feature_extensions) diff --git a/sys/x86/include/x86_smp.h b/sys/x86/include/x86_smp.h index f5015e9d8a24..045beb3b0f9a 100644 --- a/sys/x86/include/x86_smp.h +++ b/sys/x86/include/x86_smp.h @@ -35,7 +35,6 @@ extern char *bootSTK; extern void *bootstacks[]; extern unsigned int bootMP_size; extern volatile int aps_ready; -extern struct mtx ap_boot_mtx; extern int cpu_logical; extern int cpu_cores; extern volatile uint32_t smp_tlb_generation; diff --git a/sys/x86/x86/mp_x86.c b/sys/x86/x86/mp_x86.c index 6b1715853763..0c32657290a0 100644 --- a/sys/x86/x86/mp_x86.c +++ b/sys/x86/x86/mp_x86.c @@ -124,7 +124,7 @@ volatile cpuset_t resuming_cpus; volatile cpuset_t toresume_cpus; /* used to hold the AP's until we are ready to release them */ -struct mtx ap_boot_mtx; +static int ap_boot_lock; /* Set to 1 once we're ready to let the APs out of the pen. */ volatile int aps_ready = 0; @@ -1086,8 +1086,6 @@ init_secondary_tail(void) PCPU_SET(curthread, PCPU_GET(idlethread)); schedinit_ap(); - mtx_lock_spin(&ap_boot_mtx); - mca_init(); /* Init local apic for irq's */ @@ -1096,6 +1094,15 @@ init_secondary_tail(void) /* Set memory range attributes for this CPU to match the BSP */ mem_range_AP_init(); + /* + * Use naive spinning lock instead of the real spinlock, since + * printfs() below might take a very long time and trigger + * spinlock timeout panics. This is the only use of the + * ap_boot_lock anyway. + */ + while (atomic_cmpset_acq_int(&ap_boot_lock, 0, 1) == 0) + ia32_pause(); + smp_cpus++; CTR1(KTR_SMP, "SMP: AP CPU #%d Launched", cpuid); @@ -1117,6 +1124,8 @@ init_secondary_tail(void) atomic_store_rel_int(&smp_started, 1); } + atomic_store_rel_int(&ap_boot_lock, 0); + #ifdef __amd64__ if (pmap_pcid_enabled) load_cr4(rcr4() | CR4_PCIDE); @@ -1125,8 +1134,6 @@ init_secondary_tail(void) load_fs(_ufssel); #endif - mtx_unlock_spin(&ap_boot_mtx); - /* Wait until all the AP's are up. */ while (atomic_load_acq_int(&smp_started) == 0) ia32_pause(); diff --git a/sys/xen/xen_intr.h b/sys/xen/xen_intr.h index 75c3dc7c6060..4965928cc8b4 100644 --- a/sys/xen/xen_intr.h +++ b/sys/xen/xen_intr.h @@ -182,7 +182,7 @@ void xen_intr_unbind(xen_intr_handle_t *handle); */ int xen_intr_describe(xen_intr_handle_t port_handle, const char *fmt, ...) - __attribute__((format(printf, 2, 3))); + __printflike(2, 3); /** * Signal the remote peer of an interrupt source associated with an diff --git a/sys/xen/xenbus/xenbusvar.h b/sys/xen/xenbus/xenbusvar.h index ee444c132c0c..0f4168f17e6a 100644 --- a/sys/xen/xenbus/xenbusvar.h +++ b/sys/xen/xenbus/xenbusvar.h @@ -151,7 +151,7 @@ int xenbus_grant_ring(device_t dev, unsigned long ring_mfn, grant_ref_t *refp); * printf arguments. */ void xenbus_dev_error(device_t dev, int err, const char *fmt, ...) - __attribute__((format(printf, 3, 4))); + __printflike(3, 4); /** * va_list version of xenbus_dev_error(). @@ -162,7 +162,7 @@ void xenbus_dev_error(device_t dev, int err, const char *fmt, ...) * \param ap Va_list of printf arguments. */ void xenbus_dev_verror(device_t dev, int err, const char *fmt, va_list ap) - __attribute__((format(printf, 3, 0))); + __printflike(3, 0); /** * Equivalent to xenbus_dev_error(), followed by @@ -174,7 +174,7 @@ void xenbus_dev_verror(device_t dev, int err, const char *fmt, va_list ap) * printf arguments. */ void xenbus_dev_fatal(device_t dev, int err, const char *fmt, ...) - __attribute__((format(printf, 3, 4))); + __printflike(3, 4); /** * va_list version of xenbus_dev_fatal(). @@ -185,7 +185,7 @@ void xenbus_dev_fatal(device_t dev, int err, const char *fmt, ...) * \param ap Va_list of printf arguments. */ void xenbus_dev_vfatal(device_t dev, int err, const char *fmt, va_list) - __attribute__((format(printf, 3, 0))); + __printflike(3, 0); /** * Convert a member of the xenbus_state enum into an ASCII string. diff --git a/sys/xen/xenstore/xenstorevar.h b/sys/xen/xenstore/xenstorevar.h index 8b02262396e8..f34ad375bc3a 100644 --- a/sys/xen/xenstore/xenstorevar.h +++ b/sys/xen/xenstore/xenstorevar.h @@ -270,7 +270,7 @@ int xs_scanf(struct xs_transaction t, */ int xs_printf(struct xs_transaction t, const char *dir, const char *node, const char *fmt, ...) - __attribute__((format(printf, 4, 5))); + __printflike(4, 5); /** * va_list version of xenbus_printf(). diff --git a/tests/sys/fs/fusefs/Makefile b/tests/sys/fs/fusefs/Makefile index a21512798597..8e5fe112a1e4 100644 --- a/tests/sys/fs/fusefs/Makefile +++ b/tests/sys/fs/fusefs/Makefile @@ -29,6 +29,7 @@ GTESTS+= fsyncdir GTESTS+= getattr GTESTS+= interrupt GTESTS+= io +GTESTS+= ioctl GTESTS+= last_local_modify GTESTS+= link GTESTS+= locks @@ -70,7 +71,7 @@ TEST_METADATA.nfs+= required_user="root" TEST_METADATA.ctl+= is_exclusive="true" TEST_METADATA.ctl+= required_user="root" -TEST_METADATA+= timeout=10 +TEST_METADATA+= timeout=20 TEST_METADATA+= required_kmods="fusefs" FUSEFS= ${SRCTOP}/sys/fs/fuse diff --git a/tests/sys/fs/fusefs/ioctl.cc b/tests/sys/fs/fusefs/ioctl.cc new file mode 100644 index 000000000000..da048efc51c6 --- /dev/null +++ b/tests/sys/fs/fusefs/ioctl.cc @@ -0,0 +1,213 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025 CismonX <admin@cismon.net> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +extern "C" { +#include <sys/types.h> +#include <sys/ioctl.h> +#include <fcntl.h> +#include <string.h> +} + +#include "mockfs.hh" +#include "utils.hh" + +using namespace testing; + +using IoctlTestProcT = std::function<void (int)>; + +static const char INPUT_DATA[] = "input_data"; +static const char OUTPUT_DATA[] = "output_data"; + +class Ioctl: public FuseTest { +public: +void expect_ioctl(uint64_t ino, ProcessMockerT r) +{ + EXPECT_CALL(*m_mock, process( + ResultOf([=](auto in) { + return (in.header.opcode == FUSE_IOCTL && + in.header.nodeid == ino); + }, Eq(true)), _) + ).WillOnce(Invoke(r)).RetiresOnSaturation(); +} + +void expect_ioctl_rw(uint64_t ino) +{ + /* + * _IOR(): Compare the input data with INPUT_DATA. + * _IOW(): Copy out OUTPUT_DATA. + * _IOWR(): Combination of above. + * _IOWINT(): Return the integer argument value. + */ + expect_ioctl(ino, ReturnImmediate([](auto in, auto& out) { + uint8_t *in_buf = in.body.bytes + sizeof(in.body.ioctl); + uint8_t *out_buf = out.body.bytes + sizeof(out.body.ioctl); + uint32_t cmd = in.body.ioctl.cmd; + uint32_t arg_len = IOCPARM_LEN(cmd); + int result = 0; + + out.header.error = 0; + SET_OUT_HEADER_LEN(out, ioctl); + if ((cmd & IOC_VOID) != 0 && arg_len > 0) { + memcpy(&result, in_buf, sizeof(int)); + goto out; + } + if ((cmd & IOC_IN) != 0) { + if (0 != strncmp(INPUT_DATA, (char *)in_buf, arg_len)) { + result = -EINVAL; + goto out; + } + } + if ((cmd & IOC_OUT) != 0) { + memcpy(out_buf, OUTPUT_DATA, sizeof(OUTPUT_DATA)); + out.header.len += sizeof(OUTPUT_DATA); + } + +out: + out.body.ioctl.result = result; + })); +} +}; + +/** + * If the server does not implement FUSE_IOCTL handler (returns ENOSYS), + * the kernel should return ENOTTY to the user instead. + */ +TEST_F(Ioctl, enosys) +{ + unsigned long req = _IO(0xff, 0); + int fd; + + expect_opendir(FUSE_ROOT_ID); + expect_ioctl(FUSE_ROOT_ID, ReturnErrno(ENOSYS)); + + fd = open("mountpoint", O_RDONLY | O_DIRECTORY); + ASSERT_LE(0, fd) << strerror(errno); + + EXPECT_EQ(-1, ioctl(fd, req)); + EXPECT_EQ(ENOTTY, errno); + + leak(fd); +} + +/* + * For _IOR() and _IOWR(), The server is allowed to write fewer bytes + * than IOCPARM_LEN(req). + */ +TEST_F(Ioctl, ior) +{ + char buf[sizeof(OUTPUT_DATA) + 1] = { 0 }; + unsigned long req = _IOR(0xff, 1, buf); + int fd; + + expect_opendir(FUSE_ROOT_ID); + expect_ioctl_rw(FUSE_ROOT_ID); + + fd = open("mountpoint", O_RDONLY | O_DIRECTORY); + ASSERT_LE(0, fd) << strerror(errno); + + EXPECT_EQ(0, ioctl(fd, req, buf)) << strerror(errno); + EXPECT_EQ(0, memcmp(buf, OUTPUT_DATA, sizeof(OUTPUT_DATA))); + + leak(fd); +} + +/* + * For _IOR() and _IOWR(), if the server attempts to write more bytes + * than IOCPARM_LEN(req), the kernel should fail the syscall with EIO. + */ +TEST_F(Ioctl, ior_overflow) +{ + char buf[sizeof(OUTPUT_DATA) - 1] = { 0 }; + unsigned long req = _IOR(0xff, 2, buf); + int fd; + + expect_opendir(FUSE_ROOT_ID); + expect_ioctl_rw(FUSE_ROOT_ID); + + fd = open("mountpoint", O_RDONLY | O_DIRECTORY); + ASSERT_LE(0, fd) << strerror(errno); + + EXPECT_EQ(-1, ioctl(fd, req, buf)); + EXPECT_EQ(EIO, errno); + + leak(fd); +} + +TEST_F(Ioctl, iow) +{ + unsigned long req = _IOW(0xff, 3, INPUT_DATA); + int fd; + + expect_opendir(FUSE_ROOT_ID); + expect_ioctl_rw(FUSE_ROOT_ID); + + fd = open("mountpoint", O_RDONLY | O_DIRECTORY); + ASSERT_LE(0, fd) << strerror(errno); + + EXPECT_EQ(0, ioctl(fd, req, INPUT_DATA)) << strerror(errno); + + leak(fd); +} + +TEST_F(Ioctl, iowr) +{ + char buf[std::max(sizeof(INPUT_DATA), sizeof(OUTPUT_DATA))] = { 0 }; + unsigned long req = _IOWR(0xff, 4, buf); + int fd; + + expect_opendir(FUSE_ROOT_ID); + expect_ioctl_rw(FUSE_ROOT_ID); + + fd = open("mountpoint", O_RDONLY | O_DIRECTORY); + ASSERT_LE(0, fd) << strerror(errno); + + memcpy(buf, INPUT_DATA, sizeof(INPUT_DATA)); + EXPECT_EQ(0, ioctl(fd, req, buf)) << strerror(errno); + EXPECT_EQ(0, memcmp(buf, OUTPUT_DATA, sizeof(OUTPUT_DATA))); + + leak(fd); +} + +TEST_F(Ioctl, iowint) +{ + unsigned long req = _IOWINT(0xff, 5); + int arg = 1337; + int fd, r; + + expect_opendir(FUSE_ROOT_ID); + expect_ioctl_rw(FUSE_ROOT_ID); + + fd = open("mountpoint", O_RDONLY | O_DIRECTORY); + ASSERT_LE(0, fd) << strerror(errno); + + /* The server is allowed to return a positive value on success */ + r = ioctl(fd, req, arg); + EXPECT_LE(0, r) << strerror(errno); + EXPECT_EQ(arg, r); + + leak(fd); +} diff --git a/tests/sys/fs/fusefs/mockfs.cc b/tests/sys/fs/fusefs/mockfs.cc index a377ba832ef5..ee47d9e0e01c 100644 --- a/tests/sys/fs/fusefs/mockfs.cc +++ b/tests/sys/fs/fusefs/mockfs.cc @@ -241,6 +241,12 @@ void MockFS::debug_request(const mockfs_buf_in &in, ssize_t buflen) case FUSE_INTERRUPT: printf(" unique=%" PRIu64, in.body.interrupt.unique); break; + case FUSE_IOCTL: + printf(" flags=%#x cmd=%#x in_size=%" PRIu32 + " out_size=%" PRIu32, + in.body.ioctl.flags, in.body.ioctl.cmd, + in.body.ioctl.in_size, in.body.ioctl.out_size); + break; case FUSE_LINK: printf(" oldnodeid=%" PRIu64, in.body.link.oldnodeid); break; @@ -678,6 +684,12 @@ void MockFS::audit_request(const mockfs_buf_in &in, ssize_t buflen) { EXPECT_EQ(inlen, fih + sizeof(in.body.init)); EXPECT_EQ((size_t)buflen, inlen); break; + case FUSE_IOCTL: + EXPECT_GE(inlen, fih + sizeof(in.body.ioctl)); + EXPECT_EQ(inlen, + fih + sizeof(in.body.ioctl) + in.body.ioctl.in_size); + EXPECT_EQ((size_t)buflen, inlen); + break; case FUSE_OPENDIR: EXPECT_EQ(inlen, fih + sizeof(in.body.opendir)); EXPECT_EQ((size_t)buflen, inlen); @@ -733,7 +745,6 @@ void MockFS::audit_request(const mockfs_buf_in &in, ssize_t buflen) { break; case FUSE_NOTIFY_REPLY: case FUSE_BATCH_FORGET: - case FUSE_IOCTL: case FUSE_POLL: case FUSE_READDIRPLUS: FAIL() << "Unsupported opcode?"; diff --git a/tests/sys/fs/fusefs/mockfs.hh b/tests/sys/fs/fusefs/mockfs.hh index f98a5337c9d1..00503332f820 100644 --- a/tests/sys/fs/fusefs/mockfs.hh +++ b/tests/sys/fs/fusefs/mockfs.hh @@ -166,6 +166,7 @@ union fuse_payloads_in { fuse_forget_in forget; fuse_getattr_in getattr; fuse_interrupt_in interrupt; + fuse_ioctl_in ioctl; fuse_lk_in getlk; fuse_getxattr_in getxattr; fuse_init_in init; @@ -222,6 +223,7 @@ union fuse_payloads_out { fuse_listxattr_out listxattr; fuse_open_out open; fuse_statfs_out statfs; + fuse_ioctl_out ioctl; /* * The protocol places no limits on the length of the string. This is * merely convenient for testing. diff --git a/tests/sys/fs/tarfs/tarfs_test.sh b/tests/sys/fs/tarfs/tarfs_test.sh index 505bfc5325f0..3a95263aeda9 100644 --- a/tests/sys/fs/tarfs/tarfs_test.sh +++ b/tests/sys/fs/tarfs/tarfs_test.sh @@ -401,7 +401,7 @@ tarfs_large_head() { atf_set "descr" "Test support for large files" atf_set "require.user" "root" atf_set "require.kmods" "tarfs" - atf_set "timeout" "600" + atf_set "timeout" "900" } tarfs_large_body() { tarfs_setup diff --git a/tests/sys/geom/class/eli/online_resize_test.sh b/tests/sys/geom/class/eli/online_resize_test.sh index ef6fe85c63d0..b33efbb25c23 100755 --- a/tests/sys/geom/class/eli/online_resize_test.sh +++ b/tests/sys/geom/class/eli/online_resize_test.sh @@ -7,6 +7,7 @@ online_resize_head() { atf_set "descr" "online resize of geli providers" atf_set "require.user" "root" + atf_set "timeout" 600 } online_resize_body() { diff --git a/tests/sys/geom/class/eli/reentrancy_test.sh b/tests/sys/geom/class/eli/reentrancy_test.sh index 92a85d4df10a..f70c574d5965 100755 --- a/tests/sys/geom/class/eli/reentrancy_test.sh +++ b/tests/sys/geom/class/eli/reentrancy_test.sh @@ -42,7 +42,7 @@ init_head() { atf_set "descr" "Initialize a geli provider on top of another" atf_set "require.user" "root" - atf_set "timeout" 600 + atf_set "timeout" 900 } init_body() { diff --git a/tests/sys/kern/Makefile b/tests/sys/kern/Makefile index 9044b1e7e4f2..7a77fa08e2b1 100644 --- a/tests/sys/kern/Makefile +++ b/tests/sys/kern/Makefile @@ -9,8 +9,7 @@ TESTSDIR= ${TESTSBASE}/sys/kern ATF_TESTS_C+= basic_signal ATF_TESTS_C+= copy_file_range -.if ${MACHINE_ARCH} != "i386" && ${MACHINE_ARCH} != "powerpc" && \ - ${MACHINE_ARCH} != "powerpcspe" +.if ${MACHINE_ARCH} != "i386" && ${MACHINE_ARCH} != "powerpc" # No support for atomic_load_64 on i386 or (32-bit) powerpc ATF_TESTS_C+= kcov .endif diff --git a/tests/sys/kern/exterr_test.c b/tests/sys/kern/exterr_test.c index 17c84c1f8ed4..b4746a485f58 100644 --- a/tests/sys/kern/exterr_test.c +++ b/tests/sys/kern/exterr_test.c @@ -51,7 +51,7 @@ ATF_TC_BODY(gettext_extended, tc) ATF_CHECK_EQ(0, r); printf("Extended error: %s\n", exterr); /* Note: error string may need to be updated due to kernel changes */ - ATF_CHECK(strstr(exterr, "prot is not subset of max_prot") != 0); + ATF_CHECK(strstr(exterr, " is not subset of ") != 0); } ATF_TC(gettext_noextended); diff --git a/tests/sys/kern/jailmeta.sh b/tests/sys/kern/jailmeta.sh index 9a63f958231f..f030e44b14c3 100644 --- a/tests/sys/kern/jailmeta.sh +++ b/tests/sys/kern/jailmeta.sh @@ -515,7 +515,7 @@ keyvalue_contention_head() atf_set descr 'Try to stress metadata read/write mechanism with some contention' atf_set require.user root atf_set execenv jail - atf_set timeout 30 + atf_set timeout 60 } keyvalue_stresser() { diff --git a/tests/sys/mac/portacl/Makefile b/tests/sys/mac/portacl/Makefile index 28c3a5cd71ce..2b0f4634c802 100644 --- a/tests/sys/mac/portacl/Makefile +++ b/tests/sys/mac/portacl/Makefile @@ -10,7 +10,7 @@ TAP_TESTS_SH+= root_test .for t in ${TAP_TESTS_SH} TEST_METADATA.$t+= required_kmods="mac_portacl" TEST_METADATA.$t+= required_user="root" -TEST_METADATA.$t+= timeout="450" +TEST_METADATA.$t+= timeout="600" TEST_METADATA.$t+= is_exclusive="true" .endfor diff --git a/tests/sys/netpfil/pf/killstate.sh b/tests/sys/netpfil/pf/killstate.sh index dc082464b36c..f5925d715e7c 100644 --- a/tests/sys/netpfil/pf/killstate.sh +++ b/tests/sys/netpfil/pf/killstate.sh @@ -110,6 +110,7 @@ src_dst_head() { atf_set descr 'Test killing a state with source and destination specified' atf_set require.user root + atf_set require.progs python3 scapy } src_dst_body() diff --git a/tests/sys/netpfil/pf/nat.sh b/tests/sys/netpfil/pf/nat.sh index 3d953b495953..025471f75f97 100644 --- a/tests/sys/netpfil/pf/nat.sh +++ b/tests/sys/netpfil/pf/nat.sh @@ -804,8 +804,8 @@ binat_compat_body() binat_compat_cleanup() { + [ -f ${PWD}/inetd_tester.pid ] && kill $(cat ${PWD}/inetd_tester.pid) pft_cleanup - kill $(cat ${PWD}/inetd_tester.pid) } atf_test_case "binat_match" "cleanup" @@ -872,8 +872,8 @@ binat_match_body() binat_match_cleanup() { + [ -f ${PWD}/inetd_tester.pid ] && kill $(cat ${PWD}/inetd_tester.pid) pft_cleanup - kill $(cat ${PWD}/inetd_tester.pid) } atf_test_case "empty_pool" "cleanup" diff --git a/tests/sys/netpfil/pf/rules_counter.sh b/tests/sys/netpfil/pf/rules_counter.sh index e80a46e9d6c6..54a65a907b4f 100644 --- a/tests/sys/netpfil/pf/rules_counter.sh +++ b/tests/sys/netpfil/pf/rules_counter.sh @@ -153,7 +153,7 @@ atf_test_case "4G" "cleanup" { atf_set descr 'Test keepcounter for values above 32 bits' atf_set require.user root - atf_set timeout 900 + atf_set timeout 1200 } 4G_body() diff --git a/tools/boot/full-test.sh b/tools/boot/full-test.sh index 1160861316dc..65d59ba58784 100644 --- a/tools/boot/full-test.sh +++ b/tools/boot/full-test.sh @@ -77,7 +77,7 @@ MTREE=$(SHELL="which mtree" ${MAKE} ${DEFARCH} buildenv | tail -1) || die "No mt # All the architectures under test # Note: we can't yet do armv7 because we don't have a good iso for it and would # need root to extract the files. -#ARCHES="amd64:amd64 i386:i386 powerpc:powerpc powerpc:powerpc64 powerpc:powerpc64le powerpc:powerpcspe arm64:aarch64 riscv:riscv64" +#ARCHES="amd64:amd64 i386:i386 powerpc:powerpc powerpc:powerpc64 powerpc:powerpc64le arm64:aarch64 riscv:riscv64" ARCHES="amd64:amd64 arm64:aarch64" # The smallest FAT32 filesystem is 33292 KB diff --git a/tools/boot/universe.sh b/tools/boot/universe.sh index 80a9cc0b90ff..fc47ac52fed4 100755 --- a/tools/boot/universe.sh +++ b/tools/boot/universe.sh @@ -1,10 +1,6 @@ #!/bin/sh # -# Full list of all arches we don't build. -# -# powerpc/powerpcspe -# # This script is expected to be run in stand (though you could run it anywhere # in the tree). It does a full clean build. For stand you can do all the archs in # about a minute or two on a fast machine. It's also possible that you need a full diff --git a/tools/build/Makefile b/tools/build/Makefile index 2c6237c4dd7d..1eb539f06607 100644 --- a/tools/build/Makefile +++ b/tools/build/Makefile @@ -351,9 +351,12 @@ MSDOSFSINCS+= ${SRCTOP}/sys/fs/msdosfs/fat.h MSDOSFSINCS+= ${SRCTOP}/sys/fs/msdosfs/msdosfsmount.h DISKINCS+= ${SRCTOP}/sys/sys/disk/bsd.h +.if ${.MAKE.OS} == "FreeBSD" # Needed to build most of the things below, which include sys/cdefs.h either # directly or transitively +SYSINCS+= ${SRCTOP}/sys/sys/_visible.h SYSINCS+= ${SRCTOP}/sys/sys/cdefs.h +.endif # Needed to build config (since it uses libnv) SYSINCS+= ${SRCTOP}/sys/sys/_nv.h diff --git a/tools/build/depend-cleanup.sh b/tools/build/depend-cleanup.sh index f5d2fdac9dfd..e7b62510a4e5 100755 --- a/tools/build/depend-cleanup.sh +++ b/tools/build/depend-cleanup.sh @@ -124,10 +124,8 @@ if [ ! -d "$SRCTOP" -o ! -f "$SRCTOP/Makefile.inc1" ]; then fi : ${CLEANMK=""} -if [ -n "$CLEANMK" ]; then - if [ -z "${MAKE+set}" ]; then - err "MAKE not set" - fi +if [ -z "${MAKE+set}" ]; then + err "MAKE not set" fi if [ -z "${MACHINE+set}" ]; then @@ -163,13 +161,13 @@ run() # $4 optional regex for egrep -w clean_dep() { + local dirprfx dir for libcompat in "" $ALL_libcompats; do - dirprfx=${libcompat:+obj-lib${libcompat}/} - if egrep -qw "${4:-$2\.$3}" "$OBJTOP"/$dirprfx$1/.depend.$2.*o 2>/dev/null; then + dirprfx=${libcompat:+obj-lib${libcompat}} + dir="${OBJTOP%/}/${dirprfx}/$1" + if egrep -qw "${4:-$2\.$3}" "${dir}"/.depend.$2.*o 2>/dev/null; then echo "Removing stale ${libcompat:+lib${libcompat} }dependencies and objects for $2.$3" - run rm -fv \ - "$OBJTOP"/$dirprfx$1/.depend.$2.* \ - "$OBJTOP"/$dirprfx$1/$2.*o + run rm -fv "${dir}"/.depend.$2.* "${dir}"/$2.*o fi done } @@ -185,12 +183,13 @@ clean_dep() # $4 regex for egrep -w clean_obj() { + local dirprfx dir for libcompat in "" $ALL_libcompats; do - dirprfx=${libcompat:+obj-lib${libcompat}/} - if strings "$OBJTOP"/$dirprfx$1/$2.*o 2>/dev/null | egrep -qw "${4}"; then + dirprfx=${libcompat:+obj-lib${libcompat}} + dir="${OBJTOP%/}/${dirprfx}/$1" + if strings "${dir}"/$2.*o 2>/dev/null | egrep -qw "${4}"; then echo "Removing stale ${libcompat:+lib${libcompat} }objects for $2.$3" - run rm -fv \ - "$OBJTOP"/$dirprfx$1/$2.*o + run rm -fv "${dir}"/$2.*o fi done } @@ -202,9 +201,42 @@ extract_epoch() awk 'int($1) > 0 { epoch = $1 } END { print epoch }' "$1" } +# Regular expression matching the names of src.conf(5) options which +# don't affect the build. +# +# This filter is applied to both the current options and the cached +# options so we don't force a rebuild just because the filter itself +# changed. +IGNORED_OPTS="CLEAN|DEPEND_CLEANUP|EXAMPLES|MAN|TESTS|WARNS|WERROR" +IGNORED_OPTS="${IGNORED_OPTS}|INSTALL.*|STAGING.*" +# Also ignore TOOLCHAIN and the options it forces if set. It is +# commonly used to speed up a build and is safe to toggle. +IGNORED_OPTS="${IGNORED_OPTS}|TOOLCHAIN|CLANG.*|LLDB?|LLVM_(BIN|COV).*" + +extract_src_opts() +{ + $MAKE -C "$SRCTOP" -f "$SRCTOP"/Makefile.inc1 \ + -V $'SRC_OPT_LIST:O:ts\n' | + egrep -v "^WITH(OUT)?_(${IGNORED_OPTS})=" +} + +extract_obj_opts() +{ + local fn + for fn; do + if [ -f "${fn}" ]; then + cat "${fn}" + else + echo "# ${fn}" + fi + done | + egrep -v "^WITH(OUT)?_(${IGNORED_OPTS})=" +} + clean_world() { local buildepoch="$1" + local srcopts="$2" # The caller may set CLEANMK in the environment to make target(s) that # should be invoked instead of just destroying everything. This is @@ -227,34 +259,45 @@ clean_world() mkdir -p "$OBJTOP" echo "$buildepoch" > "$OBJTOP"/.clean_build_epoch + echo "$srcopts" > "$OBJTOP"/.src_opts exit 0 } -check_epoch() +check_epoch_and_opts() { local srcepoch objepoch + local srcopts objopts srcepoch=$(extract_epoch "$SRCTOP"/.clean_build_epoch) if [ -z "$srcepoch" ]; then err "Malformed .clean_build_epoch; please validate the last line" fi + srcopts=$(extract_src_opts) + if [ -z "$srcopts" ]; then + err "Unable to extract source options" + fi + # We don't discriminate between the varying degrees of difference # between epochs. If it went backwards we could be bisecting across # epochs, in which case the original need to clean likely still stands. objepoch=$(extract_epoch "$OBJTOP"/.clean_build_epoch) if [ -z "$objepoch" ] || [ "$srcepoch" -ne "$objepoch" ]; then - if [ "$VERBOSE" ]; then - echo "Cleaning - src epoch: $srcepoch, objdir epoch: ${objepoch:-unknown}" - fi + echo "Cleaning - src epoch: $srcepoch, objdir epoch: ${objepoch:-unknown}" + clean_world "$srcepoch" "$srcopts" + # NORETURN + fi - clean_world "$srcepoch" + objopts=$(extract_obj_opts "$OBJTOP"/.src_opts) + if [ "$srcopts" != "$objopts" ]; then + echo "Cleaning - build options have changed" + clean_world "$srcepoch" "$srcopts" # NORETURN fi } -check_epoch +check_epoch_and_opts #### Typical dependency cleanup begins here. diff --git a/tools/build/make_libc_exterr_cat_filenames.sh b/tools/build/make_libc_exterr_cat_filenames.sh new file mode 100755 index 000000000000..fbde85891200 --- /dev/null +++ b/tools/build/make_libc_exterr_cat_filenames.sh @@ -0,0 +1,22 @@ +#!/bin/sh +set -e + +check="lib/libc/gen/uexterr_format.c" +target="lib/libc/gen/exterr_cat_filenames.h" + +if [ \! -f "${check}" ] ; then + echo "Script must be run from the top of the full source tree" + exit 1 +fi + +echo "/*" >"${target}" +printf " * Automatically %sgenerated, use\\n" \@ >>"${target}" +echo " * tools/build/make_libc_exterr_cat_filenames.sh" >>"${target}" +echo " */" >>"${target}" + +(find sys -type f -name '*.c' | \ + xargs grep -E '^#define[[:space:]]+EXTERR_CATEGORY[[:space:]]+EXTERR_CAT_' | \ + sed -E 's/[[:space:]]+/:/g' | \ + awk -F ':' '{filename = $1; sub(/^sys\//, "", filename); + printf("\t[%s] = \"%s\",\n", $4, filename)}') \ + >>"${target}" diff --git a/tools/build/options/WITHOUT_DEPEND_CLEANUP b/tools/build/options/WITHOUT_DEPEND_CLEANUP new file mode 100644 index 000000000000..6972ece98be7 --- /dev/null +++ b/tools/build/options/WITHOUT_DEPEND_CLEANUP @@ -0,0 +1,5 @@ +Do not attempt to detect if the object tree needs cleaning in part or in +whole before building. +This speeds up incremental builds, especially when experimenting with +build options, but may cause the build to inexplicably fail or produce +non-functioning binaries. diff --git a/tools/build/options/WITH_REPRODUCIBLE_PATHS b/tools/build/options/WITH_REPRODUCIBLE_PATHS new file mode 100644 index 000000000000..88d4a0870976 --- /dev/null +++ b/tools/build/options/WITH_REPRODUCIBLE_PATHS @@ -0,0 +1,6 @@ +Modify the paths encoded in binary artifacts to be standard path + +Normally, the actual path is encoded in the binary. However, this makes the +build differ depending on the path it was built from. With this option enabled, +the paths recorded are /usr/src, regardless of the actual path. With this option +disabled, the actual paths are recorded. diff --git a/tools/cam/README b/tools/cam/README new file mode 100644 index 000000000000..bc24a76b1ea3 --- /dev/null +++ b/tools/cam/README @@ -0,0 +1,17 @@ +This directory has snippets of what will eventually become camio. This program +can take an expression for the types of things to trace, and then custom write a +dtrace script to do that. + +camio is a d-traced tcpdump-like program for examining CAM traffic (and +therefore I/O and other traffic to storage media) that written during covid, but +with fbp providers that recent clang optimizations make unuseable, hence the +shift to the cam provider, but retooling them and finishing the grammar will +take some time (but these scripts are useful today). + +mpr.d and mps.d give insight into the completion path for the mpr and mps SIMs. +You really have to read through the driver to understand, but it's the central +point of the driver and most of the I/O already had the proper CAM status code, +but the reset does not. These scripts use the generic completion hook to show +the exceptional cases (many of which have printfs that can be enabled, but often +aren't). The completion hook should give one enough tools to puzzle out what's +going on for weird, but repeatable problems. diff --git a/tools/cam/cam_all_but_scsi.d b/tools/cam/cam_all_but_scsi.d new file mode 100644 index 000000000000..a20d7fa0cba9 --- /dev/null +++ b/tools/cam/cam_all_but_scsi.d @@ -0,0 +1,89 @@ +#!/usr/sbin/dtrace -s + +/* Sample use of the cam dtrace provider */ + +/* + * Trace all the non I/O commands flowing through CAM + */ + +dtrace:::BEGIN +{ +} + +/* + * There's two choke points in CAM. We can intercept the request on the way down + * in xpt_action, just before it's sent to the SIM. This can be a good place to + * see what's going on before it happens. However, most I/O happens quite + * quickly, this isn't much of an advantage. The other place is on completion + * when the transaction is finally done. The retry mechanism is built into the + * periph driver, which is responsible for submitting the request. + * + * cam::xpt_action is a single logical point that handles both xpt_action and + * xpt_action_direct. Thie example hooks into it. The style is funky because + * D doesn't have looping or generalized if constructs. + * + * The 'trace' context local variable controls printing of different types + * of results. This is all controlled by camio.lua. + */ + + +/* + * CAM queues a CCB to the SIM in xpt_action. Save interesting bits + * for later winnowing. + */ +/* fbt::xpt_action_default:entry */ +cam::xpt:action +{ + this->ccb = ((union ccb *)arg0); + this->func = this->ccb->ccb_h.func_code & 0xff; + this->periph = this->ccb->ccb_h.path->periph; + this->bus = this->ccb->ccb_h.path->bus; + this->target = this->ccb->ccb_h.path->target; + this->device = this->ccb->ccb_h.path->device; + this->trace = 1; +} + +/* + * Omit the I/O CCBs. Go ahead and pass the other semi I/O enclosure + * commands, though. + */ +cam::xpt:action +/this->func == XPT_SCSI_IO || this->func == XPT_NVME_IO || this->func == XPT_NVME_ADMIN || this->func == XPT_ATA_IO/ +{ + this->trace = 0; +} + +/* + * Print out the non I/O and non ASYNC commands here. + */ +cam::xpt:action +/this->trace && this->func != XPT_ASYNC/ +{ + printf("(%s%d:%s%d:%d:%d:%d): %s", + this->periph == NULL ? "noperiph" : stringof(this->periph->periph_name), + this->periph == NULL ? 0 : this->periph->unit_number, + this->bus == NULL ? "nobus" : this->bus->sim->sim_name, + this->bus == NULL ? 0 : this->bus->sim->unit_number, + this->bus == NULL ? 0 : this->bus->sim->bus_id, + this->target == NULL ? 0 : this->target->target_id, + this->device == NULL ? 0 : this->device->lun_id, + xpt_action_string[this->func]); +} + +/* + * For async calls, print out the async message type. + */ +cam::xpt:action +/this->trace && this->func == XPT_ASYNC/ +{ + printf("(%s%d:%s%d:%d:%d:%d): %s %s", + this->periph == NULL ? "noperiph" : stringof(this->periph->periph_name), + this->periph == NULL ? 0 : this->periph->unit_number, + this->bus == NULL ? "nobus" : this->bus->sim->sim_name, + this->bus == NULL ? 0 : this->bus->sim->unit_number, + this->bus == NULL ? 0 : this->bus->sim->bus_id, + this->target == NULL ? 0 : this->target->target_id, + this->device == NULL ? 0 : this->device->lun_id, + xpt_action_string[this->func], + xpt_async_string[this->ccb->casync.async_code]); +} diff --git a/tools/cam/mpr.d b/tools/cam/mpr.d new file mode 100644 index 000000000000..7750d25e8c98 --- /dev/null +++ b/tools/cam/mpr.d @@ -0,0 +1,331 @@ +inline string scsi_op[int k] = + k == 0x00 ? "TEST UNIT READY" : + k == 0x01 ? "REZERO UNIT" : + k == 0x03 ? "REQUEST SENSE" : + k == 0x04 ? "FORMAT UNIT" : + k == 0x05 ? "READ BLOCK LIMITS" : + k == 0x07 ? "REASSIGN BLOCKS" : + k == 0x08 ? "READ(6)" : + k == 0x0a ? "WRITE(6)" : + k == 0x0b ? "SEEK(6)" : + k == 0x0f ? "READ REVERSE(6)" : + k == 0x10 ? "WRITE FILEMARKS(6)" : + k == 0x11 ? "SPACE(6)" : + k == 0x12 ? "INQUIRY" : + k == 0x14 ? "RECOVER BUFFERED DATA" : + k == 0x15 ? "MODE SELECT(6)" : + k == 0x16 ? "RESERVE(6)" : + k == 0x17 ? "RELEASE(6)" : + k == 0x18 ? "COPY" : + k == 0x19 ? "ERASE(6)" : + k == 0x1a ? "MODE SENSE(6)" : + k == 0x1b ? "START STOP UNIT" : + k == 0x1c ? "RECEIVE DIAGNOSTIC RESULTS" : + k == 0x1d ? "SEND DIAGNOSTIC" : + k == 0x1e ? "PREVENT ALLOW MEDIUM REMOVAL" : + k == 0x24 ? "SET WINDOW" : + k == 0x25 ? "READ CAPACITY(10)" : + k == 0x28 ? "READ(10)" : + k == 0x29 ? "READ GENERATION" : + k == 0x2a ? "WRITE(10)" : + k == 0x2b ? "SEEK(10)" : + k == 0x2c ? "ERASE(10)" : + k == 0x2e ? "WRITE AND VERIFY(10)" : + k == 0x2f ? "VERIFY(10)" : + k == 0x30 ? "SEARCH DATA HIGH(10)" : + k == 0x31 ? "SEARCH DATA EQUAL(10)" : + k == 0x32 ? "SEARCH DATA LOW(10)" : + k == 0x33 ? "SET LIMITS(10)" : + k == 0x35 ? "SYNCHRONIZE CACHE(10)" : + k == 0x36 ? "LOCK UNLOCK CACHE(10)" : + k == 0x37 ? "READ DEFECT DATA(10)" : + k == 0x39 ? "COMPARE" : + k == 0x3a ? "COPY AND VERIFY" : + k == 0x3b ? "WRITE BUFFER" : + k == 0x3c ? "READ BUFFER(10)" : + k == 0x3e ? "READ LONG(10)" : + k == 0x3f ? "WRITE LONG(10)" : + k == 0x40 ? "CHANGE DEFINITION" : + k == 0x41 ? "WRITE SAME(10)" : + k == 0x42 ? "UNMAP" : + k == 0x48 ? "SANITIZE" : + k == 0x4c ? "LOG SELECT" : + k == 0x4d ? "LOG SENSE" : + k == 0x50 ? "XDWRITE(10)" : + k == 0x51 ? "XPWRITE(10)" : + k == 0x52 ? "XDREAD(10)" : + k == 0x53 ? "XDWRITEREAD(10)" : + k == 0x55 ? "MODE SELECT(10)" : + k == 0x56 ? "RESERVE(10)" : + k == 0x57 ? "RELEASE(10)" : + k == 0x5a ? "MODE SENSE(10)" : + k == 0x5e ? "PERSISTENT RESERVE IN" : + k == 0x5f ? "PERSISTENT RESERVE OUT" : + k == 0x7e ? "extended CDB" : + k == 0x7f ? "variable length CDB (more than 16 bytes)" : + k == 0x80 ? "XDWRITE EXTENDED(16)" : + k == 0x81 ? "REBUILD(16)" : + k == 0x82 ? "REGENERATE(16)" : + k == 0x83 ? "Third-party Copy OUT" : + k == 0x84 ? "Third-party Copy IN" : + k == 0x85 ? "ATA PASS-THROUGH(16)" : + k == 0x86 ? "ACCESS CONTROL IN" : + k == 0x87 ? "ACCESS CONTROL OUT" : + k == 0x88 ? "READ(16)" : + k == 0x89 ? "COMPARE AND WRITE" : + k == 0x8a ? "WRITE(16)" : + k == 0x8b ? "ORWRITE" : + k == 0x8c ? "READ ATTRIBUTE" : + k == 0x8d ? "WRITE ATTRIBUTE" : + k == 0x8e ? "WRITE AND VERIFY(16)" : + k == 0x8f ? "VERIFY(16)" : + k == 0x90 ? "PRE-FETCH(16)" : + k == 0x91 ? "SYNCHRONIZE CACHE(16)" : + k == 0x92 ? "LOCK UNLOCK CACHE(16)" : + k == 0x93 ? "WRITE SAME(16)" : + k == 0x94 ? "ZBC OUT" : + k == 0x95 ? "ZBC IN" : + k == 0x9a ? "WRITE STREAM(16)" : + k == 0x9b ? "READ BUFFER(16)" : + k == 0x9c ? "WRITE ATOMIC(16)" : + k == 0x9e ? "SERVICE ACTION IN(16)" : + k == 0xa0 ? "REPORT LUNS" : + k == 0xa1 ? "ATA PASS-THROUGH(12)" : + k == 0xa2 ? "SECURITY PROTOCOL IN" : + k == 0xa3 ? "MAINTENANCE IN" : + k == 0xa4 ? "MAINTENANCE OUT" : + k == 0xa7 ? "MOVE MEDIUM ATTACHED" : + k == 0xa8 ? "READ(12)" : + k == 0xaa ? "WRITE(12)" : + k == 0xae ? "WRITE AND VERIFY(12)" : + k == 0xaf ? "VERIFY(12)" : + k == 0xb3 ? "SET LIMITS(12)" : + k == 0xb4 ? "READ ELEMENT STATUS ATTACHED" : + k == 0xb5 ? "SECURITY PROTOCOL OUT" : + k == 0xb7 ? "READ DEFECT DATA(12)" : + k == 0xba ? "REDUNDANCY GROUP (IN)" : + k == 0xbb ? "REDUNDANCY GROUP (OUT)" : + k == 0xbc ? "SPARE (IN)" : + k == 0xbd ? "SPARE (OUT)" : + k == 0xbe ? "VOLUME SET (IN)" : + k == 0xbf ? "VOLUME SET (OUT)" : + "Unknown"; + +inline string xpt_action_string[int key] = + key == 0 ? "XPT_NOOP" : + key == 1 ? "XPT_SCSI_IO" : + key == 2 ? "XPT_GDEV_TYPE" : + key == 3 ? "XPT_GDEVLIST" : + key == 4 ? "XPT_PATH_INQ" : + key == 5 ? "XPT_REL_SIMQ" : + key == 6 ? "XPT_SASYNC_CB" : + key == 7 ? "XPT_SDEV_TYPE" : + key == 8 ? "XPT_SCAN_BUS" : + key == 9 ? "XPT_DEV_MATCH" : + key == 10 ? "XPT_DEBUG" : + key == 11 ? "XPT_PATH_STATS" : + key == 12 ? "XPT_GDEV_STATS" : + key == 13 ? "XPT_0X0d" : + key == 14 ? "XPT_DEV_ADVINFO" : + key == 15 ? "XPT_ASYNC" : + key == 16 ? "XPT_ABORT" : + key == 17 ? "XPT_RESET_BUS" : + key == 18 ? "XPT_RESET_DEV" : + key == 19 ? "XPT_TERM_IO" : + key == 20 ? "XPT_SCAN_LUN" : + key == 21 ? "XPT_GET_TRAN_SETTINGS" : + key == 22 ? "XPT_SET_TRAN_SETTINGS" : + key == 23 ? "XPT_CALC_GEOMETRY" : + key == 24 ? "XPT_ATA_IO" : + key == 25 ? "XPT_SET_SIM_KNOB" : + key == 26 ? "XPT_GET_SIM_KNOB" : + key == 27 ? "XPT_SMP_IO" : + key == 28 ? "XPT_NVME_IO" : + key == 29 ? "XPT_MMC_IO" : + key == 30 ? "XPT_SCAN_TGT" : + key == 31 ? "XPT_NVME_ADMIN" : + "Too big" ; + +inline int CAM_CDB_POINTER = 1; +inline int XPT_SCSI_IO = 0x01; +inline int XPT_ATA_IO = 0x18; +inline int XPT_NVME_IO = 0x1c; +inline int XPT_NVME_ADMIN = 0x1f; + +/* + * key >> 5 gives the group: + * Group 0: six byte commands + * Group 1: ten byte commands + * Group 2: ten byte commands + * Group 3: reserved (7e and 7f are de-facto 32 bytes though) + * Group 4: sixteen byte commands + * Group 5: twelve byte commands + * Group 6: vendor specific + * Group 7: vendor specific + */ +inline int scsi_cdb_len[int key] = + key == 0 ? 6 : + key == 1 ? 10 : + key == 2 ? 10 : + key == 3 ? 1 : /* reserved */ + key == 4 ? 16 : + key == 5 ? 12 : + key == 6 ? 1 : /* reserved */ + /* key == 7 */ 1; /* reserved */ + +inline int MPI2_IOCSTATUS_MASK =(0x7FFF); +inline int MPI2_IOCSTATUS_SUCCESS =(0x0000); +inline int MPI2_IOCSTATUS_INVALID_FUNCTION =(0x0001); +inline int MPI2_IOCSTATUS_BUSY =(0x0002); +inline int MPI2_IOCSTATUS_INVALID_SGL =(0x0003); +inline int MPI2_IOCSTATUS_INTERNAL_ERROR =(0x0004); +inline int MPI2_IOCSTATUS_INVALID_VPID =(0x0005); +inline int MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES =(0x0006); +inline int MPI2_IOCSTATUS_INVALID_FIELD =(0x0007); +inline int MPI2_IOCSTATUS_INVALID_STATE =(0x0008); +inline int MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED =(0x0009); +inline int MPI2_IOCSTATUS_CONFIG_INVALID_ACTION =(0x0020); +inline int MPI2_IOCSTATUS_CONFIG_INVALID_TYPE =(0x0021); +inline int MPI2_IOCSTATUS_CONFIG_INVALID_PAGE =(0x0022); +inline int MPI2_IOCSTATUS_CONFIG_INVALID_DATA =(0x0023); +inline int MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS =(0x0024); +inline int MPI2_IOCSTATUS_CONFIG_CANT_COMMIT =(0x0025); +inline int MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR =(0x0040); +inline int MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE =(0x0042); +inline int MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE =(0x0043); +inline int MPI2_IOCSTATUS_SCSI_DATA_OVERRUN =(0x0044); +inline int MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN =(0x0045); +inline int MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR =(0x0046); +inline int MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR =(0x0047); +inline int MPI2_IOCSTATUS_SCSI_TASK_TERMINATED =(0x0048); +inline int MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH =(0x0049); +inline int MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED =(0x004A); +inline int MPI2_IOCSTATUS_SCSI_IOC_TERMINATED =(0x004B); +inline int MPI2_IOCSTATUS_SCSI_EXT_TERMINATED =(0x004C); +inline int MPI2_IOCSTATUS_EEDP_GUARD_ERROR =(0x004D); +inline int MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR =(0x004E); +inline int MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR =(0x004F); +inline int MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX =(0x0062); +inline int MPI2_IOCSTATUS_TARGET_ABORTED =(0x0063); +inline int MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE =(0x0064); +inline int MPI2_IOCSTATUS_TARGET_NO_CONNECTION =(0x0065); +inline int MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH =(0x006A); +inline int MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR =(0x006D); +inline int MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA =(0x006E); +inline int MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT =(0x006F); +inline int MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT =(0x0070); +inline int MPI2_IOCSTATUS_TARGET_NAK_RECEIVED =(0x0071); +inline int MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED =(0x0090); +inline int MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN =(0x0091); +inline int MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED =(0x00A0); +inline int MPI2_IOCSTATUS_RAID_ACCEL_ERROR =(0x00B0); + +inline int MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE =(0x8000); + +inline string mpi2_iocstatus_str[int key] = + key == MPI2_IOCSTATUS_SUCCESS ? "MPI2_IOCSTATUS_SUCCESS" : + key == MPI2_IOCSTATUS_INVALID_FUNCTION ? "MPI2_IOCSTATUS_INVALID_FUNCTION" : + key == MPI2_IOCSTATUS_BUSY ? "MPI2_IOCSTATUS_BUSY" : + key == MPI2_IOCSTATUS_INVALID_SGL ? "MPI2_IOCSTATUS_INVALID_SGL" : + key == MPI2_IOCSTATUS_INTERNAL_ERROR ? "MPI2_IOCSTATUS_INTERNAL_ERROR" : + key == MPI2_IOCSTATUS_INVALID_VPID ? "MPI2_IOCSTATUS_INVALID_VPID" : + key == MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES ? "MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES" : + key == MPI2_IOCSTATUS_INVALID_FIELD ? "MPI2_IOCSTATUS_INVALID_FIELD" : + key == MPI2_IOCSTATUS_INVALID_STATE ? "MPI2_IOCSTATUS_INVALID_STATE" : + key == MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED ? "MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED" : + key == MPI2_IOCSTATUS_CONFIG_INVALID_ACTION ? "MPI2_IOCSTATUS_CONFIG_INVALID_ACTION" : + key == MPI2_IOCSTATUS_CONFIG_INVALID_TYPE ? "MPI2_IOCSTATUS_CONFIG_INVALID_TYPE" : + key == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE ? "MPI2_IOCSTATUS_CONFIG_INVALID_PAGE" : + key == MPI2_IOCSTATUS_CONFIG_INVALID_DATA ? "MPI2_IOCSTATUS_CONFIG_INVALID_DATA" : + key == MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS ? "MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS" : + key == MPI2_IOCSTATUS_CONFIG_CANT_COMMIT ? "MPI2_IOCSTATUS_CONFIG_CANT_COMMIT" : + key == MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR ? "MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR" : + key == MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE ? "MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE" : + key == MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE ? "MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE" : + key == MPI2_IOCSTATUS_SCSI_DATA_OVERRUN ? "MPI2_IOCSTATUS_SCSI_DATA_OVERRUN" : + key == MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN ? "MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN" : + key == MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR ? "MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR" : + key == MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR ? "MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR" : + key == MPI2_IOCSTATUS_SCSI_TASK_TERMINATED ? "MPI2_IOCSTATUS_SCSI_TASK_TERMINATED" : + key == MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH ? "MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH" : + key == MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED ? "MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED" : + key == MPI2_IOCSTATUS_SCSI_IOC_TERMINATED ? "MPI2_IOCSTATUS_SCSI_IOC_TERMINATED" : + key == MPI2_IOCSTATUS_SCSI_EXT_TERMINATED ? "MPI2_IOCSTATUS_SCSI_EXT_TERMINATED" : + key == MPI2_IOCSTATUS_EEDP_GUARD_ERROR ? "MPI2_IOCSTATUS_EEDP_GUARD_ERROR" : + key == MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR ? "MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR" : + key == MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR ? "MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR" : + key == MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX ? "MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX" : + key == MPI2_IOCSTATUS_TARGET_ABORTED ? "MPI2_IOCSTATUS_TARGET_ABORTED" : + key == MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE ? "MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE" : + key == MPI2_IOCSTATUS_TARGET_NO_CONNECTION ? "MPI2_IOCSTATUS_TARGET_NO_CONNECTION" : + key == MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH ? "MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH" : + key == MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR ? "MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR" : + key == MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA ? "MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA" : + key == MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT ? "MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT" : + key == MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT ? "MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT" : + key == MPI2_IOCSTATUS_TARGET_NAK_RECEIVED ? "MPI2_IOCSTATUS_TARGET_NAK_RECEIVED" : + key == MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED ? "MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED" : + key == MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN ? "MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN" : + key == MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED ? "MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED" : + key == MPI2_IOCSTATUS_RAID_ACCEL_ERROR ? "MPI2_IOCSTATUS_RAID_ACCEL_ERROR" : + "MPI2_unknown value"; + + + +/* + * arg0 union *ccb + * arg1 mpr_command *cm + * arg2 sassc->flags + * arg3 device_info + */ +cam::mpr:complete +{ + this->ccb = (union ccb *)arg0; + this->func = this->ccb->ccb_h.func_code & 0xff; + this->periph = this->ccb->ccb_h.path->periph; + this->cm = (struct mpr_command *)arg1; + this->rep = (MPI2_SCSI_IO_REPLY *)this->cm->cm_reply; + this->sassc_flags = arg2; + this->device_info = arg3; + this->trace = 0; + this->do_fast = 0; +} + + +cam::mpr:complete +/this->periph->unit_number == 1 || this->periph->unit_number == 2/ +{ + this->trace = 1; +} + +cam::mpr:complete +/this->trace && this->rep != NULL/ +{ + this->IOCStatus = /* le16toh */ this->rep->IOCStatus & MPI2_IOCSTATUS_MASK; +} + +cam::mpr:complete +/this->trace && this->rep == NULL/ +{ +/* printf("mpr: da%d: FAST", this->periph->unit_number); */ + this->trace = 0 +} + +cam::mpr:complete +/this->func == XPT_SCSI_IO/ +{ + this->hdr = &this->ccb->ccb_h; + this->csio = &this->ccb->csio; + this->cdb = this->hdr->flags & CAM_CDB_POINTER ? + this->csio->cdb_io.cdb_ptr : + &this->csio->cdb_io.cdb_bytes[0]; + this->cdb_len = this->csio->cdb_len ? this->csio->cdb_len : + scsi_cdb_len[this->cdb[0] >> 5]; +} + +cam::mpr:complete +/this->trace && this->rep != NULL && this->func == XPT_SCSI_IO/ +{ + printf("mpr: da%d: SLOW CDB: %s Status: %s", this->periph->unit_number, scsi_op[this->cdb[0]], + mpi2_iocstatus_str[this->IOCStatus]); +} diff --git a/tools/cam/mps.d b/tools/cam/mps.d new file mode 100644 index 000000000000..aa7a8f0c70af --- /dev/null +++ b/tools/cam/mps.d @@ -0,0 +1,331 @@ +inline string scsi_op[int k] = + k == 0x00 ? "TEST UNIT READY" : + k == 0x01 ? "REZERO UNIT" : + k == 0x03 ? "REQUEST SENSE" : + k == 0x04 ? "FORMAT UNIT" : + k == 0x05 ? "READ BLOCK LIMITS" : + k == 0x07 ? "REASSIGN BLOCKS" : + k == 0x08 ? "READ(6)" : + k == 0x0a ? "WRITE(6)" : + k == 0x0b ? "SEEK(6)" : + k == 0x0f ? "READ REVERSE(6)" : + k == 0x10 ? "WRITE FILEMARKS(6)" : + k == 0x11 ? "SPACE(6)" : + k == 0x12 ? "INQUIRY" : + k == 0x14 ? "RECOVER BUFFERED DATA" : + k == 0x15 ? "MODE SELECT(6)" : + k == 0x16 ? "RESERVE(6)" : + k == 0x17 ? "RELEASE(6)" : + k == 0x18 ? "COPY" : + k == 0x19 ? "ERASE(6)" : + k == 0x1a ? "MODE SENSE(6)" : + k == 0x1b ? "START STOP UNIT" : + k == 0x1c ? "RECEIVE DIAGNOSTIC RESULTS" : + k == 0x1d ? "SEND DIAGNOSTIC" : + k == 0x1e ? "PREVENT ALLOW MEDIUM REMOVAL" : + k == 0x24 ? "SET WINDOW" : + k == 0x25 ? "READ CAPACITY(10)" : + k == 0x28 ? "READ(10)" : + k == 0x29 ? "READ GENERATION" : + k == 0x2a ? "WRITE(10)" : + k == 0x2b ? "SEEK(10)" : + k == 0x2c ? "ERASE(10)" : + k == 0x2e ? "WRITE AND VERIFY(10)" : + k == 0x2f ? "VERIFY(10)" : + k == 0x30 ? "SEARCH DATA HIGH(10)" : + k == 0x31 ? "SEARCH DATA EQUAL(10)" : + k == 0x32 ? "SEARCH DATA LOW(10)" : + k == 0x33 ? "SET LIMITS(10)" : + k == 0x35 ? "SYNCHRONIZE CACHE(10)" : + k == 0x36 ? "LOCK UNLOCK CACHE(10)" : + k == 0x37 ? "READ DEFECT DATA(10)" : + k == 0x39 ? "COMPARE" : + k == 0x3a ? "COPY AND VERIFY" : + k == 0x3b ? "WRITE BUFFER" : + k == 0x3c ? "READ BUFFER(10)" : + k == 0x3e ? "READ LONG(10)" : + k == 0x3f ? "WRITE LONG(10)" : + k == 0x40 ? "CHANGE DEFINITION" : + k == 0x41 ? "WRITE SAME(10)" : + k == 0x42 ? "UNMAP" : + k == 0x48 ? "SANITIZE" : + k == 0x4c ? "LOG SELECT" : + k == 0x4d ? "LOG SENSE" : + k == 0x50 ? "XDWRITE(10)" : + k == 0x51 ? "XPWRITE(10)" : + k == 0x52 ? "XDREAD(10)" : + k == 0x53 ? "XDWRITEREAD(10)" : + k == 0x55 ? "MODE SELECT(10)" : + k == 0x56 ? "RESERVE(10)" : + k == 0x57 ? "RELEASE(10)" : + k == 0x5a ? "MODE SENSE(10)" : + k == 0x5e ? "PERSISTENT RESERVE IN" : + k == 0x5f ? "PERSISTENT RESERVE OUT" : + k == 0x7e ? "extended CDB" : + k == 0x7f ? "variable length CDB (more than 16 bytes)" : + k == 0x80 ? "XDWRITE EXTENDED(16)" : + k == 0x81 ? "REBUILD(16)" : + k == 0x82 ? "REGENERATE(16)" : + k == 0x83 ? "Third-party Copy OUT" : + k == 0x84 ? "Third-party Copy IN" : + k == 0x85 ? "ATA PASS-THROUGH(16)" : + k == 0x86 ? "ACCESS CONTROL IN" : + k == 0x87 ? "ACCESS CONTROL OUT" : + k == 0x88 ? "READ(16)" : + k == 0x89 ? "COMPARE AND WRITE" : + k == 0x8a ? "WRITE(16)" : + k == 0x8b ? "ORWRITE" : + k == 0x8c ? "READ ATTRIBUTE" : + k == 0x8d ? "WRITE ATTRIBUTE" : + k == 0x8e ? "WRITE AND VERIFY(16)" : + k == 0x8f ? "VERIFY(16)" : + k == 0x90 ? "PRE-FETCH(16)" : + k == 0x91 ? "SYNCHRONIZE CACHE(16)" : + k == 0x92 ? "LOCK UNLOCK CACHE(16)" : + k == 0x93 ? "WRITE SAME(16)" : + k == 0x94 ? "ZBC OUT" : + k == 0x95 ? "ZBC IN" : + k == 0x9a ? "WRITE STREAM(16)" : + k == 0x9b ? "READ BUFFER(16)" : + k == 0x9c ? "WRITE ATOMIC(16)" : + k == 0x9e ? "SERVICE ACTION IN(16)" : + k == 0xa0 ? "REPORT LUNS" : + k == 0xa1 ? "ATA PASS-THROUGH(12)" : + k == 0xa2 ? "SECURITY PROTOCOL IN" : + k == 0xa3 ? "MAINTENANCE IN" : + k == 0xa4 ? "MAINTENANCE OUT" : + k == 0xa7 ? "MOVE MEDIUM ATTACHED" : + k == 0xa8 ? "READ(12)" : + k == 0xaa ? "WRITE(12)" : + k == 0xae ? "WRITE AND VERIFY(12)" : + k == 0xaf ? "VERIFY(12)" : + k == 0xb3 ? "SET LIMITS(12)" : + k == 0xb4 ? "READ ELEMENT STATUS ATTACHED" : + k == 0xb5 ? "SECURITY PROTOCOL OUT" : + k == 0xb7 ? "READ DEFECT DATA(12)" : + k == 0xba ? "REDUNDANCY GROUP (IN)" : + k == 0xbb ? "REDUNDANCY GROUP (OUT)" : + k == 0xbc ? "SPARE (IN)" : + k == 0xbd ? "SPARE (OUT)" : + k == 0xbe ? "VOLUME SET (IN)" : + k == 0xbf ? "VOLUME SET (OUT)" : + "Unknown"; + +inline string xpt_action_string[int key] = + key == 0 ? "XPT_NOOP" : + key == 1 ? "XPT_SCSI_IO" : + key == 2 ? "XPT_GDEV_TYPE" : + key == 3 ? "XPT_GDEVLIST" : + key == 4 ? "XPT_PATH_INQ" : + key == 5 ? "XPT_REL_SIMQ" : + key == 6 ? "XPT_SASYNC_CB" : + key == 7 ? "XPT_SDEV_TYPE" : + key == 8 ? "XPT_SCAN_BUS" : + key == 9 ? "XPT_DEV_MATCH" : + key == 10 ? "XPT_DEBUG" : + key == 11 ? "XPT_PATH_STATS" : + key == 12 ? "XPT_GDEV_STATS" : + key == 13 ? "XPT_0X0d" : + key == 14 ? "XPT_DEV_ADVINFO" : + key == 15 ? "XPT_ASYNC" : + key == 16 ? "XPT_ABORT" : + key == 17 ? "XPT_RESET_BUS" : + key == 18 ? "XPT_RESET_DEV" : + key == 19 ? "XPT_TERM_IO" : + key == 20 ? "XPT_SCAN_LUN" : + key == 21 ? "XPT_GET_TRAN_SETTINGS" : + key == 22 ? "XPT_SET_TRAN_SETTINGS" : + key == 23 ? "XPT_CALC_GEOMETRY" : + key == 24 ? "XPT_ATA_IO" : + key == 25 ? "XPT_SET_SIM_KNOB" : + key == 26 ? "XPT_GET_SIM_KNOB" : + key == 27 ? "XPT_SMP_IO" : + key == 28 ? "XPT_NVME_IO" : + key == 29 ? "XPT_MMC_IO" : + key == 30 ? "XPT_SCAN_TGT" : + key == 31 ? "XPT_NVME_ADMIN" : + "Too big" ; + +inline int CAM_CDB_POINTER = 1; +inline int XPT_SCSI_IO = 0x01; +inline int XPT_ATA_IO = 0x18; +inline int XPT_NVME_IO = 0x1c; +inline int XPT_NVME_ADMIN = 0x1f; + +/* + * key >> 5 gives the group: + * Group 0: six byte commands + * Group 1: ten byte commands + * Group 2: ten byte commands + * Group 3: reserved (7e and 7f are de-facto 32 bytes though) + * Group 4: sixteen byte commands + * Group 5: twelve byte commands + * Group 6: vendor specific + * Group 7: vendor specific + */ +inline int scsi_cdb_len[int key] = + key == 0 ? 6 : + key == 1 ? 10 : + key == 2 ? 10 : + key == 3 ? 1 : /* reserved */ + key == 4 ? 16 : + key == 5 ? 12 : + key == 6 ? 1 : /* reserved */ + /* key == 7 */ 1; /* reserved */ + +inline int MPI2_IOCSTATUS_MASK =(0x7FFF); +inline int MPI2_IOCSTATUS_SUCCESS =(0x0000); +inline int MPI2_IOCSTATUS_INVALID_FUNCTION =(0x0001); +inline int MPI2_IOCSTATUS_BUSY =(0x0002); +inline int MPI2_IOCSTATUS_INVALID_SGL =(0x0003); +inline int MPI2_IOCSTATUS_INTERNAL_ERROR =(0x0004); +inline int MPI2_IOCSTATUS_INVALID_VPID =(0x0005); +inline int MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES =(0x0006); +inline int MPI2_IOCSTATUS_INVALID_FIELD =(0x0007); +inline int MPI2_IOCSTATUS_INVALID_STATE =(0x0008); +inline int MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED =(0x0009); +inline int MPI2_IOCSTATUS_CONFIG_INVALID_ACTION =(0x0020); +inline int MPI2_IOCSTATUS_CONFIG_INVALID_TYPE =(0x0021); +inline int MPI2_IOCSTATUS_CONFIG_INVALID_PAGE =(0x0022); +inline int MPI2_IOCSTATUS_CONFIG_INVALID_DATA =(0x0023); +inline int MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS =(0x0024); +inline int MPI2_IOCSTATUS_CONFIG_CANT_COMMIT =(0x0025); +inline int MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR =(0x0040); +inline int MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE =(0x0042); +inline int MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE =(0x0043); +inline int MPI2_IOCSTATUS_SCSI_DATA_OVERRUN =(0x0044); +inline int MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN =(0x0045); +inline int MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR =(0x0046); +inline int MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR =(0x0047); +inline int MPI2_IOCSTATUS_SCSI_TASK_TERMINATED =(0x0048); +inline int MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH =(0x0049); +inline int MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED =(0x004A); +inline int MPI2_IOCSTATUS_SCSI_IOC_TERMINATED =(0x004B); +inline int MPI2_IOCSTATUS_SCSI_EXT_TERMINATED =(0x004C); +inline int MPI2_IOCSTATUS_EEDP_GUARD_ERROR =(0x004D); +inline int MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR =(0x004E); +inline int MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR =(0x004F); +inline int MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX =(0x0062); +inline int MPI2_IOCSTATUS_TARGET_ABORTED =(0x0063); +inline int MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE =(0x0064); +inline int MPI2_IOCSTATUS_TARGET_NO_CONNECTION =(0x0065); +inline int MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH =(0x006A); +inline int MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR =(0x006D); +inline int MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA =(0x006E); +inline int MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT =(0x006F); +inline int MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT =(0x0070); +inline int MPI2_IOCSTATUS_TARGET_NAK_RECEIVED =(0x0071); +inline int MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED =(0x0090); +inline int MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN =(0x0091); +inline int MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED =(0x00A0); +inline int MPI2_IOCSTATUS_RAID_ACCEL_ERROR =(0x00B0); + +inline int MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE =(0x8000); + +inline string mpi2_iocstatus_str[int key] = + key == MPI2_IOCSTATUS_SUCCESS ? "MPI2_IOCSTATUS_SUCCESS" : + key == MPI2_IOCSTATUS_INVALID_FUNCTION ? "MPI2_IOCSTATUS_INVALID_FUNCTION" : + key == MPI2_IOCSTATUS_BUSY ? "MPI2_IOCSTATUS_BUSY" : + key == MPI2_IOCSTATUS_INVALID_SGL ? "MPI2_IOCSTATUS_INVALID_SGL" : + key == MPI2_IOCSTATUS_INTERNAL_ERROR ? "MPI2_IOCSTATUS_INTERNAL_ERROR" : + key == MPI2_IOCSTATUS_INVALID_VPID ? "MPI2_IOCSTATUS_INVALID_VPID" : + key == MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES ? "MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES" : + key == MPI2_IOCSTATUS_INVALID_FIELD ? "MPI2_IOCSTATUS_INVALID_FIELD" : + key == MPI2_IOCSTATUS_INVALID_STATE ? "MPI2_IOCSTATUS_INVALID_STATE" : + key == MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED ? "MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED" : + key == MPI2_IOCSTATUS_CONFIG_INVALID_ACTION ? "MPI2_IOCSTATUS_CONFIG_INVALID_ACTION" : + key == MPI2_IOCSTATUS_CONFIG_INVALID_TYPE ? "MPI2_IOCSTATUS_CONFIG_INVALID_TYPE" : + key == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE ? "MPI2_IOCSTATUS_CONFIG_INVALID_PAGE" : + key == MPI2_IOCSTATUS_CONFIG_INVALID_DATA ? "MPI2_IOCSTATUS_CONFIG_INVALID_DATA" : + key == MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS ? "MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS" : + key == MPI2_IOCSTATUS_CONFIG_CANT_COMMIT ? "MPI2_IOCSTATUS_CONFIG_CANT_COMMIT" : + key == MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR ? "MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR" : + key == MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE ? "MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE" : + key == MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE ? "MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE" : + key == MPI2_IOCSTATUS_SCSI_DATA_OVERRUN ? "MPI2_IOCSTATUS_SCSI_DATA_OVERRUN" : + key == MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN ? "MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN" : + key == MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR ? "MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR" : + key == MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR ? "MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR" : + key == MPI2_IOCSTATUS_SCSI_TASK_TERMINATED ? "MPI2_IOCSTATUS_SCSI_TASK_TERMINATED" : + key == MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH ? "MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH" : + key == MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED ? "MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED" : + key == MPI2_IOCSTATUS_SCSI_IOC_TERMINATED ? "MPI2_IOCSTATUS_SCSI_IOC_TERMINATED" : + key == MPI2_IOCSTATUS_SCSI_EXT_TERMINATED ? "MPI2_IOCSTATUS_SCSI_EXT_TERMINATED" : + key == MPI2_IOCSTATUS_EEDP_GUARD_ERROR ? "MPI2_IOCSTATUS_EEDP_GUARD_ERROR" : + key == MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR ? "MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR" : + key == MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR ? "MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR" : + key == MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX ? "MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX" : + key == MPI2_IOCSTATUS_TARGET_ABORTED ? "MPI2_IOCSTATUS_TARGET_ABORTED" : + key == MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE ? "MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE" : + key == MPI2_IOCSTATUS_TARGET_NO_CONNECTION ? "MPI2_IOCSTATUS_TARGET_NO_CONNECTION" : + key == MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH ? "MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH" : + key == MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR ? "MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR" : + key == MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA ? "MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA" : + key == MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT ? "MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT" : + key == MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT ? "MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT" : + key == MPI2_IOCSTATUS_TARGET_NAK_RECEIVED ? "MPI2_IOCSTATUS_TARGET_NAK_RECEIVED" : + key == MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED ? "MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED" : + key == MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN ? "MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN" : + key == MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED ? "MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED" : + key == MPI2_IOCSTATUS_RAID_ACCEL_ERROR ? "MPI2_IOCSTATUS_RAID_ACCEL_ERROR" : + "MPI2_unknown value"; + + + +/* + * arg0 union *ccb + * arg1 mps_command *cm + * arg2 sassc->flags + * arg3 device_info + */ +cam::mps:complete +{ + this->ccb = (union ccb *)arg0; + this->func = this->ccb->ccb_h.func_code & 0xff; + this->periph = this->ccb->ccb_h.path->periph; + this->cm = (struct mps_command *)arg1; + this->rep = (MPI2_SCSI_IO_REPLY *)this->cm->cm_reply; + this->sassc_flags = arg2; + this->device_info = arg3; + this->trace = 0; + this->do_fast = 0; +} + + +cam::mps:complete +/this->periph->unit_number == 1 || this->periph->unit_number == 2/ +{ + this->trace = 1; +} + +cam::mps:complete +/this->trace && this->rep != NULL/ +{ + this->IOCStatus = /* le16toh */ this->rep->IOCStatus & MPI2_IOCSTATUS_MASK; +} + +cam::mps:complete +/this->trace && this->rep == NULL/ +{ +/* printf("mps: da%d: FAST", this->periph->unit_number); */ + this->trace = 0 +} + +cam::mps:complete +/this->func == XPT_SCSI_IO/ +{ + this->hdr = &this->ccb->ccb_h; + this->csio = &this->ccb->csio; + this->cdb = this->hdr->flags & CAM_CDB_POINTER ? + this->csio->cdb_io.cdb_ptr : + &this->csio->cdb_io.cdb_bytes[0]; + this->cdb_len = this->csio->cdb_len ? this->csio->cdb_len : + scsi_cdb_len[this->cdb[0] >> 5]; +} + +cam::mps:complete +/this->trace && this->rep != NULL && this->func == XPT_SCSI_IO/ +{ + printf("mps: da%d: SLOW CDB: %s Status: %s", this->periph->unit_number, scsi_op[this->cdb[0]], + mpi2_iocstatus_str[this->IOCStatus]); +} diff --git a/tools/test/hwpmc/pmctest.py b/tools/test/hwpmc/pmctest.py index 4bd4910b00a9..ba20306f1d68 100755 --- a/tools/test/hwpmc/pmctest.py +++ b/tools/test/hwpmc/pmctest.py @@ -2,37 +2,9 @@ # SPDX-License-Identifier: BSD-3-Clause # # Copyright (c) 2012, Neville-Neil Consulting +# Copyright (c) 2026, George V. Neville-Neil # All rights reserved. # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are -# met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# Neither the name of Neville-Neil Consulting nor the names of its -# contributors may be used to endorse or promote products derived from -# this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Author: George V. Neville-Neil -# # Description: A program to run a simple program against every available # pmc counter present in a system. @@ -44,17 +16,23 @@ # This should result in ls being run with every available counter # and the system should neither lock up nor panic. # -# The default is to wait after each counter is tested. Since the +# The default is not to wait after each counter is tested. Since the # prompt would go to stdout you won't see it, just press return # to continue or Ctrl-D to stop. import sys import subprocess from subprocess import PIPE +import argparse +import tempfile +from pathlib import Path +import os -# Use input() for Python version 3 -if sys.version_info[0] == 3: - raw_input = input +def gather_counters(): + """Run program and return output as array of lines.""" + result = subprocess.run("pmccontrol -L", shell=True, capture_output=True, text=True) + tabbed = result.stdout.strip().split('\n') + return [line.replace('\t', '') for line in tabbed] # A list of strings that are not really counters, just # name tags that are output by pmccontrol -L @@ -62,40 +40,85 @@ notcounter = ["IAF", "IAP", "TSC", "UNC", "UCF", "UCP", "SOFT" ] def main(): - from optparse import OptionParser - - parser = OptionParser() - parser.add_option("-p", "--program", dest="program", - help="program to execute") - parser.add_option("-w", "--wait", action="store_true", dest="wait", - default=True, help="wait after each execution") + parser = argparse.ArgumentParser(description='Exercise a program under hwpmc') + parser.add_argument('--program', type=str, required=True, help='target program') + parser.add_argument('--wait', action='store_true', help='Wait after each counter.') + parser.add_argument('--count', action='store_true', help='Exercise the program being studied using counting mode pmcs.') + parser.add_argument('--sample', action='store_true', help='Exercise the program being studied using sampling mode pmcs.') - (options, args) = parser.parse_args() + args = parser.parse_args() - if (options.program == None): - print("specify program, such as ls, with -p/--program") - sys.exit() - - p = subprocess.Popen(["pmccontrol", "-L"], stdout=PIPE) - counters = p.communicate()[0] + counters = gather_counters() if len(counters) <= 0: print("no counters found") sys.exit() - for counter in counters.split(): + if args.count == True and args.sample == True: + print("Choose one of --count OR --sample.") + sys.exit() + + program = Path(args.program).name + + if args.count == True: + tmpdir = tempfile.mkdtemp(prefix=program + "-", suffix="-counting-pmc") + print("Exercising program ", args.program, " storing results data in ", tmpdir) + + if args.sample == True: + tmpdir = tempfile.mkdtemp(prefix=program + "-", suffix="-sampling-pmc") + print("Exercising program ", args.program, " storing results data in ", tmpdir) + + for counter in counters: if counter in notcounter: continue - p = subprocess.Popen(["pmcstat", "-p", counter, options.program], - stdout=PIPE) - result = p.communicate()[0] - print(result) - if (options.wait == True): - try: - value = raw_input("next?") - except EOFError: - sys.exit() + if args.count == True: + with open(tmpdir + "/" + program + "-" + counter + ".txt", 'w') as file: + p = subprocess.Popen(["pmcstat", + "-p", counter, args.program], + text=True, stderr=file, stdout=file) + result = p.wait() + print(result) + elif args.sample == True: + pmcout = tmpdir + "/" + program + "-" + counter + ".pmc" + p = subprocess.Popen(["pmcstat", + "-O", pmcout, + "-P", counter, args.program], + text=True, stderr=PIPE) + result = p.wait() + resdir = tmpdir + "/" + program + "-" + counter + ".results" + os.makedirs(resdir) + p = subprocess.Popen(["pmcstat", + "-R", pmcout, + "-g"], + cwd=resdir, + text=True, stderr=PIPE) + result = p.wait() + gmondir = resdir + "/" + counter + if Path(gmondir).is_dir(): + with open(gmondir + "/" + "gprof.out", "w") as file: + p = subprocess.Popen(["gprof", + args.program, + program + ".gmon"], + cwd=gmondir, + text=True, + stdout=file, + stderr=subprocess.STDOUT) + result = p.wait() + else: + print ("Failed to get gmon data for ", counter) + print(result) + else: + p = subprocess.Popen(["pmcstat", "-p", counter, args.program], + text=True, stderr=PIPE) + result = p.wait() + print(result) + if (args.wait == True): + try: + value = input("Waitin for you to press ENTER") + except EOFError: + sys.exit() + # The canonical way to make a python module into a script. # Remove if unnecessary. diff --git a/tools/tools/git/git-arc.1 b/tools/tools/git/git-arc.1 index a056a2223e0e..0e2615d83fa4 100644 --- a/tools/tools/git/git-arc.1 +++ b/tools/tools/git/git-arc.1 @@ -24,7 +24,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.Dd Janurary 15, 2025 +.Dd December 29, 2025 .Dt GIT-ARC 1 .Os .Sh NAME @@ -37,40 +37,59 @@ .Op Fl r Ar reviewer1 Ns Op Cm \&, Ns Ar reviewer2 ... .Op Fl s Ar subscriber1 Ns Op Cm \&, Ns Ar subscriber2 ... .Op Fl p Ar parent -.Op Ar commit ... Ns | Ns Ar commit-range +.Ar commit-ref Op Ar commit-ref ... .Nm -.Cm list Ar commit ... Ns | Ns Ar commit-range +.Cm list Ar commit-ref Op Ar commit-ref ... .Nm +.Op Fl bcrs .Cm patch .Op Fl c -.Ar diff1 Ns Op Cm \&, Ns Ar diff2 +.Ar diff1 Op Cm Ar diff2 Op Ar ... .Nm .Cm stage .Op Fl b Ar branch -.Op Ar commit ... Ns | Ns Ar commit-range +.Ar commit-ref Op Ar commit-ref ... .Nm .Cm update .Op Fl l .Op Fl m Ar message -.Op Ar commit ... Ns | Ns Ar commit-range +.Ar commit-ref Op Ar commit-ref ... .Sh DESCRIPTION The .Nm utility creates and manages .Fx Phabricator reviews based on git commits. +It is geared towards +.Fx +development. It requires the -.Pa devel/arcanist -port or package. +.Pa devel/git , +.Pa devel/arcanist-lib +and +.Pa textproc/jq +packages; these will be installed automatically if +.Nm +is installed via the +.Pa devel/freebsd-git-devtools +package. .Pp .Nm assumes a one-to-one relationship between git commits and -Differential Revisions, and the Differential Revision title must match -the summary line of the corresponding commit. -In particular, the commit summaries must be unique across all open +Differential Revisions, and requires the titles in a pair to match. +Commit titles must therefore be unique across all open Differential Revisions authored by the submitter. +If the title of either a commit or its associated Differential Revision is +changed, the other must be updated manually to maintain the match. .Pp The first parameter must be a verb. +Most verbs accept one or more git commit references: commit hashes, branch +names, commit ranges, and so on. +A branch name refers to the single commit at its tip; use a commit range to +operate on multiple commits. +See +.Xr git-rev-parse 1 +for details on specifying commit references. The available verbs are: .Bl -tag -width "create" .It Cm create @@ -96,19 +115,45 @@ stack in Phabricator. .It Cm list Print the associated Differential Revisions for the specified commits. .It Cm patch -Try to apply a patch from a Differential Revision to the currently +Try to apply patches from one or more Differential Revision to the currently checked out tree. +The following options are accepted: +.Bl -tag -width "-b" +.It Fl b +Switch to a new branch before applying the patches. +.It Fl c +Commit each applied patch to the git checkout. +The commit message and author are taken from the Differential Revision. +.It Fl r +Rather than using the +.Sy arc +command to apply the patch, download the raw patch file and apply it using +.Xr git-apply 1 . +This is useful for avoiding some misfeatures of +.Sy arc , +particularly its behavior of trying to update all remotes in the tree in some +cases. +.It Fl s +Recursively apply the parent revisions of the specified commit. +This can be used to apply patch stacks by specifying the top-most, i.e., +most recent commit in the stack. +.El .It Cm stage Prepare a series of commits to be pushed to the upstream .Fx repository. -The commits are cherry-picked to a branch (by default the -.Dq main -branch), review tags are added to the commit log message, and -the log message is opened in an editor for any last-minute +.Pp +First, the target branch is checked out; by default this is the +main branch but can be overridden with the +.Fl b +option. +Then, the specified commits are cherry-picked with review tags added to the +commit log message, and the log message is opened in an editor for any final updates. -The commits need not have associated Differential -Revisions. +The commits need not have associated Differential Revisions. +.Pp +This is intended to be used after code review has been completed, and the +commits are ready to be pushed to an upstream repository. .It Cm update Synchronize the Differential Revisions associated with the specified commits. diff --git a/tools/tools/git/git-arc.sh b/tools/tools/git/git-arc.sh index 98d29809d636..f15cade1f1e7 100755 --- a/tools/tools/git/git-arc.sh +++ b/tools/tools/git/git-arc.sh @@ -59,106 +59,12 @@ Usage: git arc [-vy] <command> <arguments> Commands: create [-l] [-r <reviewer1>[,<reviewer2>...]] [-s subscriber[,...]] [<commit>|<commit range>] list <commit>|<commit range> - patch [-bc] <diff1> [<diff2> ...] + patch [-bcrs] <diff1> [<diff2> ...] stage [-b branch] [<commit>|<commit range>] update [-l] [-m message] [<commit>|<commit range>] -Description: - Create or manage FreeBSD Phabricator reviews based on git commits. There - is a one-to one relationship between git commits and Differential revisions, - and the Differential revision title must match the summary line of the - corresponding commit. In particular, commit summaries must be unique across - all open Differential revisions authored by you. - - The first parameter must be a verb. The available verbs are: - - create -- Create new Differential revisions from the specified commits. - list -- Print the associated Differential revisions for the specified - commits. - patch -- Apply patches from Differential revisions. By default, patches - are applied to the currently checked-out tree, unless -b is - supplied, in which case a new branch is first created. The -c - option commits the applied patch using the review's metadata. - stage -- Prepare a series of commits to be pushed to the upstream FreeBSD - repository. The commits are cherry-picked to a branch (main by - default), review tags are added to the commit log message, and - the log message is opened in an editor for any last-minute - updates. The commits need not have associated Differential - revisions. - update -- Synchronize the Differential revisions associated with the - specified commits. Currently only the diff is updated; the - review description and other metadata is not synchronized. - - The typical end-to-end usage looks something like this: - - $ git commit -m "kern: Rewrite in Rust" - $ git arc create HEAD - <Make changes to the diff based on reviewer feedback.> - $ git commit --amend - $ git arc update HEAD - <Now that all reviewers are happy, it's time to push.> - $ git arc stage HEAD - $ git push freebsd HEAD:main - -Config Variables: - These are manipulated by git-config(1). - - arc.assume_yes [bool] - -- Assume a "yes" answer to all prompts instead of - prompting the user. Equivalent to the -y flag. - - arc.browse [bool] -- Try to open newly created reviews in a browser tab. - Defaults to false. - - arc.list [bool] -- Always use "list mode" (-l) with create and update. - In this mode, the list of git revisions to use - is listed with a single prompt before creating or - updating reviews. The diffs for individual commits - are not shown. - - arc.verbose [bool] -- Verbose output. Equivalent to the -v flag. - -Examples: - Create a Phabricator review using the contents of the most recent commit in - your git checkout. The commit title is used as the review title, the commit - log message is used as the review description, markj@FreeBSD.org is added as - a reviewer. Also, the "Jails" reviewer group is added using its hashtag. - - $ git arc create -r markj,#jails HEAD - - Create a series of Phabricator reviews for each of HEAD~2, HEAD~ and HEAD. - Pairs of consecutive commits are linked into a patch stack. Note that the - first commit in the specified range is excluded. - - $ git arc create HEAD~3..HEAD - - Update the review corresponding to commit b409afcfedcdda. The title of the - commit must be the same as it was when the review was created. The review - description is not automatically updated. - - $ git arc update b409afcfedcdda - - Apply the patch in review D12345 to the currently checked-out tree, and stage - it. - - $ git arc patch D12345 - - Apply the patch in review D12345 to the currently checked-out tree, and - commit it using the review's title, summary and author. - - $ git arc patch -c D12345 - - Apply the patches in reviews D12345 and D12346 in a new branch, and commit - them using the review titles, summaries and authors. - - $ git arc patch -bc D12345 D12346 - - List the status of reviews for all the commits in the branch "feature": - - $ git arc list main..feature - +See git-arc(1) for details. __EOF__ - exit 1 } @@ -226,6 +132,20 @@ diff2phid() jq -r "select(.response != []) | .response.${diff}.phid" } +phid2diff() +{ + local diff phid + + phid=$1 + if ! expr "$phid" : 'PHID-DREV-[0-9A-Za-z]*$' >/dev/null; then + err "invalid diff PHID $phid" + fi + diff=$(echo '{"constraints": {"phids": ["'"$phid"'"]}}' | + arc_call_conduit -- differential.revision.search | + jq -r '.response.data[0].id') + echo "D${diff}" +} + diff2status() { local diff tmp status summary @@ -244,6 +164,19 @@ diff2status() printf "%-14s %s\n" "${status}" "${summary}" } +diff2parents() +{ + local dep dependencies diff parents phid + + diff=$1 + phid=$(diff2phid "$diff") + for dep in $(echo '{"phids": ["'"$phid"'"]}' | + arc_call_conduit -- differential.query | + jq -r '.response[0].auxiliary."phabricator:depends-on"[]'); do + echo $(phid2diff $dep) + done +} + log2diff() { local diff @@ -651,13 +584,46 @@ patch_commit() git commit --author "${author}" --file "$tmp" } +apply_rev() +{ + local commit parent parents raw rev stack + + rev=$1 + commit=$2 + raw=$3 + stack=$4 + + if $stack; then + parents=$(diff2parents "$rev") + for parent in $parents; do + echo "Applying parent ${parent}..." + if ! apply_rev $parent $commit $raw $stack; then + return 1 + fi + done + fi + + if $raw; then + fetch -o /dev/stdout "https://reviews.freebsd.org/${rev}.diff" | git apply --index + else + arc patch --skip-dependencies --nobranch --nocommit --force $rev + fi + + if ${commit}; then + patch_commit $rev + fi + return 0 +} + gitarc__patch() { - local branch commit rev + local branch commit o raw rev stack branch=false commit=false - while getopts bc o; do + raw=false + stack=false + while getopts bcrs o; do case "$o" in b) require_clean_work_tree "patch -b" @@ -667,6 +633,12 @@ gitarc__patch() require_clean_work_tree "patch -c" commit=true ;; + r) + raw=true + ;; + s) + stack=true + ;; *) err_usage ;; @@ -682,13 +654,8 @@ gitarc__patch() patch_branch "$@" fi for rev in "$@"; do - if ! arc patch --skip-dependencies --nobranch --nocommit --force "$rev"; then - break - fi echo "Applying ${rev}..." - if ${commit}; then - patch_commit $rev - fi + apply_rev $rev $commit $raw $stack done } diff --git a/usr.bin/grep/tests/Makefile b/usr.bin/grep/tests/Makefile index b3c79657e53c..1db5ebea5c62 100644 --- a/usr.bin/grep/tests/Makefile +++ b/usr.bin/grep/tests/Makefile @@ -12,6 +12,7 @@ ${PACKAGE}FILES+= d_color_a.out ${PACKAGE}FILES+= d_color_b.in ${PACKAGE}FILES+= d_color_b.out ${PACKAGE}FILES+= d_color_c.out +${PACKAGE}FILES+= d_color_d.out ${PACKAGE}FILES+= d_context2_a.out ${PACKAGE}FILES+= d_context2_b.out ${PACKAGE}FILES+= d_context2_c.out diff --git a/usr.bin/login/login.conf b/usr.bin/login/login.conf index c65a83caa565..267b0f1ad826 100644 --- a/usr.bin/login/login.conf +++ b/usr.bin/login/login.conf @@ -23,7 +23,6 @@ default:\ :passwd_format=sha512:\ - :copyright=/etc/COPYRIGHT:\ :welcome=/var/run/motd:\ :setenv=BLOCKSIZE=K:\ :mail=/var/mail/$:\ @@ -127,7 +126,6 @@ russian|Russian Users Accounts:\ ## standard - standard user defaults ## #standard:\ -# :copyright=/etc/COPYRIGHT:\ # :welcome=/var/run/motd:\ # :setenv=BLOCKSIZE=K:\ # :mail=/var/mail/$:\ diff --git a/usr.bin/netstat/inet.c b/usr.bin/netstat/inet.c index dee245b63a87..6e4811480237 100644 --- a/usr.bin/netstat/inet.c +++ b/usr.bin/netstat/inet.c @@ -394,11 +394,10 @@ protopr(u_long off, const char *name, int af1, int proto) if (istcp && (tp->t_flags & TF_TOE) != 0) xo_emit("{:protocol/%-3.3s%-6.6s/%s%s} ", "toe", vchar); else { - int len; + int l = max (2, 9 - strlen(name)); - len = max (2, 9 - strlen(name)); - xo_emit("{:protocol/%.7s%-*.*s/%s%s} ", name, len, len, - vchar); + xo_emit("{d:protocol/%.7s%-*.*s} ", name, l, l, vchar); + xo_emit("{e:protocol/%s%s}", name, vchar); } if (Lflag) { char buf1[33]; @@ -523,9 +522,9 @@ protopr(u_long off, const char *name, int af1, int proto) } if (istcp && !Lflag && !xflag && !Tflag && !Rflag) { if (tp->t_state < 0 || tp->t_state >= TCP_NSTATES) - xo_emit("{:tcp-state/%-11d}", tp->t_state); + xo_emit("{:tcp-state/%-11d/%d}", tp->t_state); else { - xo_emit("{:tcp-state/%-11s}", + xo_emit("{:tcp-state/%-11s/%s}", tcpstates[tp->t_state]); #if defined(TF_NEEDSYN) && defined(TF_NEEDFIN) /* Show T/TCP `hidden state' */ diff --git a/usr.bin/zstd/Makefile b/usr.bin/zstd/Makefile index 0e73e2eb0dd2..6b8ebd8cdf3d 100644 --- a/usr.bin/zstd/Makefile +++ b/usr.bin/zstd/Makefile @@ -1,3 +1,5 @@ +PACKAGE= zstd + PROG= zstd SRCS= \ benchfn.c \ diff --git a/usr.sbin/Makefile.powerpc b/usr.sbin/Makefile.powerpc index 6387cd8840d6..2a3cdf24524d 100644 --- a/usr.sbin/Makefile.powerpc +++ b/usr.sbin/Makefile.powerpc @@ -1,3 +1 @@ -.if ${MACHINE_ARCH} != "powerpcspe" SUBDIR+= nvram -.endif diff --git a/usr.sbin/bhyve/aarch64/bhyverun_machdep.c b/usr.sbin/bhyve/aarch64/bhyverun_machdep.c index e099df0559a1..10018d082f7e 100644 --- a/usr.sbin/bhyve/aarch64/bhyverun_machdep.c +++ b/usr.sbin/bhyve/aarch64/bhyverun_machdep.c @@ -270,7 +270,7 @@ mmio_uart_mem_handler(struct vcpu *vcpu __unused, int dir, return (0); } -static bool +static int init_mmio_uart(struct vmctx *ctx) { struct uart_pl011_softc *sc; @@ -280,14 +280,14 @@ init_mmio_uart(struct vmctx *ctx) path = get_config_value("console"); if (path == NULL) - return (false); + return (1); sc = uart_pl011_init(mmio_uart_intr_assert, mmio_uart_intr_deassert, ctx); if (uart_pl011_tty_open(sc, path) != 0) { EPRINTLN("Unable to initialize backend '%s' for mmio uart", path); - assert(0); + return (-1); } bzero(&mr, sizeof(struct mem_range)); @@ -301,7 +301,7 @@ init_mmio_uart(struct vmctx *ctx) error = register_mem(&mr); assert(error == 0); - return (true); + return (0); } static void @@ -414,8 +414,11 @@ bhyve_init_platform(struct vmctx *ctx, struct vcpu *bsp) return (error); } - if (init_mmio_uart(ctx)) + error = init_mmio_uart(ctx); + if (error == 0) fdt_add_uart(UART_MMIO_BASE, UART_MMIO_SIZE, UART_INTR); + else if (error < 0) + return (error); init_mmio_rtc(ctx); fdt_add_rtc(RTC_MMIO_BASE, RTC_MMIO_SIZE, RTC_INTR); fdt_add_timer(); diff --git a/usr.sbin/bhyve/bhyve.8 b/usr.sbin/bhyve/bhyve.8 index d3b067509ced..4c73a119b1ed 100644 --- a/usr.sbin/bhyve/bhyve.8 +++ b/usr.sbin/bhyve/bhyve.8 @@ -25,7 +25,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.Dd December 26, 2025 +.Dd January 5, 2026 .Dt BHYVE 8 .Os .Sh NAME @@ -542,6 +542,8 @@ considered unconnected. .Cm slirp .Op Cm \&,open .Op Cm \&,hostfwd= Ar proto : Ar hostaddr : Ar hostport - Ar guestaddr : Ar guestport +.Op Cm \&,mac= Ar xx:xx:xx:xx:xx:xx +.Op Cm \&,mtu= Ar N .Xc .El .Sm on @@ -891,7 +893,7 @@ to guest by VirtIO Input Interface. .Bl -bullet .Sm off .It -.Op Cm rfb= Ar ip-and-port +.Op Cm rfb= Ar address .Op Cm ,w= Ar width .Op Cm ,h= Ar height .Op Cm ,vga= Ar vgaconf @@ -902,9 +904,9 @@ to guest by VirtIO Input Interface. .Pp Configuration options are defined as follows: .Bl -tag -width 10n -.It Cm rfb= Ns Ar ip-and-port Pq or Cm tcp= Ns Ar ip-and-port -An IP address and a port VNC should listen on. -There are two formats: +.It Cm rfb= Ns Ar address Pq or Cm tcp= Ns Ar address +A UNIX domain socket or IP address and a port VNC should listen on. +There are three possible formats: .Pp .Bl -bullet -compact .It @@ -916,6 +918,10 @@ There are two formats: .Sm off .Cm \&[ Ar IPv6%zone Cm \&] Cm \&: Ar port .Sm on +.It +.Sm off +.Cm unix: Ar my/unix.sock +.Sm on .El .Pp The default is to listen on localhost IPv4 address and default VNC port 5900. diff --git a/usr.sbin/bhyve/bhyve_config.5 b/usr.sbin/bhyve/bhyve_config.5 index 4ead94690d91..429ce3e38138 100644 --- a/usr.sbin/bhyve/bhyve_config.5 +++ b/usr.sbin/bhyve/bhyve_config.5 @@ -523,7 +523,7 @@ the device name. If specified, it must be a unicast MAC address. .El .Ss Frame Buffer Settings -.Bl -column "password" "[IP:]port" "127.0.0.1:5900" +.Bl -column "password" "unix:my/unix.sock" "127.0.0.1:5900" .It Sy Name Ta Sy Format Ta Sy Default Ta Sy Description .It Va wait Ta bool Ta false Ta Wait for a remote connection before starting the VM. @@ -535,6 +535,11 @@ support scoped identifiers as described in .Xr getaddrinfo 3 . A bare port number may be given in which case the IPv4 localhost address is used. +.It Va rfb Ta +.Sm off +.Cm unix: Ar my/unix.sock Ta Ta +.Sm on +Alternatively, provide a path to a UNIX domain socket. .It Va vga Ta string Ta io Ta VGA configuration. More details are provided in diff --git a/usr.sbin/bhyve/net_backend_slirp.c b/usr.sbin/bhyve/net_backend_slirp.c index f2b483c5e314..6084ca31966d 100644 --- a/usr.sbin/bhyve/net_backend_slirp.c +++ b/usr.sbin/bhyve/net_backend_slirp.c @@ -62,15 +62,18 @@ #include "config.h" #include "debug.h" #include "mevent.h" +#include "net_utils.h" #include "net_backends.h" #include "net_backends_priv.h" -#define SLIRP_MTU 2048 +#define DEFAULT_MTU 2048 struct slirp_priv { int s; pid_t helper; struct mevent *mevp; + size_t mtu; + uint8_t *buf; }; extern char **environ; @@ -86,6 +89,8 @@ slirp_init(struct net_backend *be, const char *devname __unused, const char **argv; char sockname[32]; int error, s[2]; + const char *mtu_value; + size_t mtu; if (socketpair(PF_LOCAL, SOCK_SEQPACKET | SOCK_NONBLOCK, 0, s) != 0) { EPRINTLN("socketpair"); @@ -124,6 +129,25 @@ slirp_init(struct net_backend *be, const char *devname __unused, EPRINTLN("nvlist_clone"); goto err; } + + mtu_value = get_config_value_node(config, "mtu"); + if (mtu_value != NULL) { + if (net_parsemtu(mtu_value, &mtu)) { + EPRINTLN("Could not parse MTU"); + goto err; + } + } else { + mtu = DEFAULT_MTU; + } + nvlist_add_number(config, "mtui", mtu); + + priv->mtu = mtu; + priv->buf = malloc(mtu); + if (priv->buf == NULL) { + EPRINTLN("Could not allocate buffer"); + goto err; + } + nvlist_add_string(config, "vmname", get_config_value("name")); error = nvlist_send(s[0], config); nvlist_destroy(config); @@ -146,6 +170,7 @@ slirp_init(struct net_backend *be, const char *devname __unused, return (0); err: + free(priv->buf); (void)close(s[0]); (void)close(s[1]); return (-1); @@ -168,6 +193,8 @@ slirp_cleanup(struct net_backend *be) { struct slirp_priv *priv = NET_BE_PRIV(be); + free(priv->buf); + if (priv->helper > 0) { int status; @@ -184,17 +211,15 @@ static ssize_t slirp_peek_recvlen(struct net_backend *be) { struct slirp_priv *priv = NET_BE_PRIV(be); - uint8_t buf[SLIRP_MTU]; ssize_t n; /* * Copying into the buffer is totally unnecessary, but we don't * implement MSG_TRUNC for SEQPACKET sockets. */ - n = recv(priv->s, buf, sizeof(buf), MSG_PEEK | MSG_DONTWAIT); + n = recv(priv->s, priv->buf, priv->mtu, MSG_PEEK | MSG_DONTWAIT); if (n < 0) return (errno == EWOULDBLOCK ? 0 : -1); - assert((size_t)n <= SLIRP_MTU); return (n); } @@ -218,7 +243,7 @@ slirp_recv(struct net_backend *be, const struct iovec *iov, int iovcnt) return (0); return (-1); } - assert(n <= SLIRP_MTU); + assert((size_t)n <= priv->mtu); return (n); } diff --git a/usr.sbin/bhyve/pci_fbuf.c b/usr.sbin/bhyve/pci_fbuf.c index 1e3ec77c15b0..560c2bc839d6 100644 --- a/usr.sbin/bhyve/pci_fbuf.c +++ b/usr.sbin/bhyve/pci_fbuf.c @@ -28,6 +28,8 @@ #include <sys/types.h> #include <sys/mman.h> +#include <sys/socket.h> +#include <sys/un.h> #include <dev/vmm/vmm_mem.h> #include <machine/vmm.h> @@ -94,6 +96,7 @@ struct pci_fbuf_softc { } __packed memregs; /* rfb server */ + sa_family_t rfb_family; char *rfb_host; char *rfb_password; int rfb_port; @@ -252,11 +255,13 @@ pci_fbuf_parse_config(struct pci_fbuf_softc *sc, nvlist_t *nvl) value = get_config_value_node(nvl, "tcp"); if (value != NULL) { /* + * UNIX -- unix:path/to/socket.sock * IPv4 -- host-ip:port * IPv6 -- [host-ip%zone]:port * XXX for now port is mandatory for IPv4. */ if (value[0] == '[') { + sc->rfb_family = AF_INET6; cp = strchr(value + 1, ']'); if (cp == NULL || cp == value + 1) { EPRINTLN("fbuf: Invalid IPv6 address: \"%s\"", @@ -279,7 +284,21 @@ pci_fbuf_parse_config(struct pci_fbuf_softc *sc, nvlist_t *nvl) value); return (-1); } + } else if (strncmp("unix:", value, 5) == 0) { + if (strlen(value + 5) > SUNPATHLEN) { + EPRINTLN( + "fbuf: UNIX socket path too long: \"%s\"", + value + 5); + return (-1); + } else if (*(value + 5) == '\0') { + EPRINTLN("fbuf: UNIX socket path is empty"); + return (-1); + } else { + sc->rfb_family = AF_UNIX; + sc->rfb_host = strdup(value + 5); + } } else { + sc->rfb_family = AF_UNSPEC; cp = strchr(value, ':'); if (cp == NULL) { sc->rfb_port = atoi(value); @@ -433,7 +452,8 @@ pci_fbuf_init(struct pci_devinst *pi, nvlist_t *nvl) memset((void *)sc->fb_base, 0, FB_SIZE); - error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, sc->rfb_password); + error = rfb_init(sc->rfb_family, sc->rfb_host, sc->rfb_port, + sc->rfb_wait, sc->rfb_password); done: if (error) free(sc); diff --git a/usr.sbin/bhyve/rfb.c b/usr.sbin/bhyve/rfb.c index 716e191e2fc0..aeaf8d1c0639 100644 --- a/usr.sbin/bhyve/rfb.c +++ b/usr.sbin/bhyve/rfb.c @@ -35,6 +35,7 @@ #include <sys/socket.h> #include <sys/select.h> #include <sys/time.h> +#include <sys/un.h> #include <arpa/inet.h> #include <stdatomic.h> #include <machine/cpufunc.h> @@ -1254,13 +1255,15 @@ sse42_supported(void) } int -rfb_init(const char *hostname, int port, int wait, const char *password) +rfb_init(sa_family_t family, const char *hostname, int port, int wait, + const char *password) { int e; char servname[6]; struct rfb_softc *rc; struct addrinfo *ai = NULL; struct addrinfo hints; + struct sockaddr_un sun; int on = 1; int cnt; #ifndef WITHOUT_CAPSICUM @@ -1301,25 +1304,42 @@ rfb_init(const char *hostname, int port, int wait, const char *password) hostname = "[::1]"; #endif - memset(&hints, 0, sizeof(hints)); - hints.ai_family = AF_UNSPEC; - hints.ai_socktype = SOCK_STREAM; - hints.ai_flags = AI_NUMERICHOST | AI_NUMERICSERV | AI_PASSIVE; - - if ((e = getaddrinfo(hostname, servname, &hints, &ai)) != 0) { - EPRINTLN("getaddrinfo: %s", gai_strerror(e)); - goto error; + if (family == AF_UNIX) { + memset(&sun, 0, sizeof(sun)); + sun.sun_family = AF_UNIX; + if (strlcpy(sun.sun_path, hostname, sizeof(sun.sun_path)) >= + sizeof(sun.sun_path)) { + EPRINTLN("rfb: socket path too long"); + goto error; + } + rc->sfd = socket(AF_UNIX, SOCK_STREAM, 0); + } else { + memset(&hints, 0, sizeof(hints)); + hints.ai_socktype = SOCK_STREAM; + hints.ai_family = family; + hints.ai_flags = AI_NUMERICHOST | AI_NUMERICSERV | AI_PASSIVE; + + if ((e = getaddrinfo(hostname, servname, &hints, &ai)) != 0) { + EPRINTLN("getaddrinfo: %s", gai_strerror(e)); + goto error; + } + rc->sfd = socket(ai->ai_family, ai->ai_socktype, 0); } - rc->sfd = socket(ai->ai_family, ai->ai_socktype, 0); if (rc->sfd < 0) { perror("socket"); goto error; } + /* No effect for UNIX domain sockets. */ setsockopt(rc->sfd, SOL_SOCKET, SO_REUSEADDR, &on, sizeof(on)); - if (bind(rc->sfd, ai->ai_addr, ai->ai_addrlen) < 0) { + if (family == AF_UNIX) { + unlink(hostname); + e = bind(rc->sfd, (struct sockaddr *)&sun, SUN_LEN(&sun)); + } else + e = bind(rc->sfd, ai->ai_addr, ai->ai_addrlen); + if (e < 0) { perror("bind"); goto error; } @@ -1355,14 +1375,17 @@ rfb_init(const char *hostname, int port, int wait, const char *password) DPRINTF(("rfb client connected")); } - freeaddrinfo(ai); + if (family != AF_UNIX) + freeaddrinfo(ai); return (0); error: if (rc->pixfmt_mtx) pthread_mutex_destroy(&rc->pixfmt_mtx); - if (ai != NULL) + if (ai != NULL) { + assert(family != AF_UNIX); freeaddrinfo(ai); + } if (rc->sfd != -1) close(rc->sfd); free(rc->crc); diff --git a/usr.sbin/bhyve/rfb.h b/usr.sbin/bhyve/rfb.h index 347ced083a22..c11d40f031af 100644 --- a/usr.sbin/bhyve/rfb.h +++ b/usr.sbin/bhyve/rfb.h @@ -29,9 +29,11 @@ #ifndef _RFB_H_ #define _RFB_H_ +#include <sys/socket.h> + #define RFB_PORT 5900 -int rfb_init(const char *hostname, int port, int wait, +int rfb_init(sa_family_t family, const char *hostname, int port, int wait, const char *password); #endif /* _RFB_H_ */ diff --git a/usr.sbin/bhyve/slirp/slirp-helper.c b/usr.sbin/bhyve/slirp/slirp-helper.c index 06f393aab724..36192c590eb1 100644 --- a/usr.sbin/bhyve/slirp/slirp-helper.c +++ b/usr.sbin/bhyve/slirp/slirp-helper.c @@ -38,8 +38,6 @@ #include "config.h" #include "libslirp.h" -#define SLIRP_MTU 2048 - struct slirp_priv { Slirp *slirp; /* libslirp handle */ int sock; /* data and control socket */ @@ -47,6 +45,8 @@ struct slirp_priv { struct pollfd *pollfds; size_t npollfds; size_t lastpollfd; + size_t mtu; + uint8_t *buf; }; typedef int (*slirp_add_hostxfwd_p_t)(Slirp *, @@ -104,7 +104,7 @@ slirp_cb_send_packet(const void *buf, size_t len, void *param) priv = param; - assert(len <= SLIRP_MTU); + assert(len <= priv->mtu); n = send(priv->sock, buf, len, MSG_EOR); if (n < 0) { warn("slirp_cb_send_packet: send"); @@ -289,16 +289,14 @@ slirp_pollfd_loop(struct slirp_priv *priv) ssize_t n; do { - uint8_t buf[SLIRP_MTU]; - - n = recv(priv->sock, buf, sizeof(buf), + n = recv(priv->sock, priv->buf, priv->mtu, MSG_DONTWAIT); if (n < 0) { if (errno == EWOULDBLOCK) break; err(1, "recv"); } - slirp_input_p(priv->slirp, buf, (int)n); + slirp_input_p(priv->slirp, priv->buf, (int)n); } while (n >= 0); } } @@ -464,6 +462,7 @@ main(int argc, char **argv) const char *hostfwd, *vmname; int ch, fd, sd; bool restricted; + size_t mtu; sd = -1; while ((ch = getopt(argc, argv, "S:")) != -1) { @@ -503,6 +502,8 @@ main(int argc, char **argv) memset(&priv, 0, sizeof(priv)); priv.sock = sd; + if (ioctl(priv.sock, FIONBIO, &(int){0}) == -1) + err(1, "ioctl(FIONBIO)"); if (pipe2(priv.wakeup, O_CLOEXEC | O_NONBLOCK) != 0) err(1, "pipe2"); @@ -512,6 +513,13 @@ main(int argc, char **argv) config = nvlist_recv(sd, 0); if (config == NULL) err(1, "nvlist_recv"); + + mtu = nvlist_get_number(config, "mtui"); + priv.mtu = mtu; + priv.buf = malloc(mtu); + if (priv.buf == NULL) + err(1, "malloc"); + vmname = get_config_value_node(config, "vmname"); if (vmname != NULL) setproctitle("%s", vmname); @@ -519,7 +527,7 @@ main(int argc, char **argv) slirpconfig = (SlirpConfig){ .version = 4, - .if_mtu = SLIRP_MTU, + .if_mtu = mtu, .restricted = restricted, .in_enabled = true, .vnetwork.s_addr = htonl(0x0a000200), /* 10.0.2.0/24 */ diff --git a/usr.sbin/bhyve/usb_mouse.c b/usr.sbin/bhyve/usb_mouse.c index 82b1159d5f61..5caad886e082 100644 --- a/usr.sbin/bhyve/usb_mouse.c +++ b/usr.sbin/bhyve/usb_mouse.c @@ -538,7 +538,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer) data->bdone += 2; } - eshort = data->blen > 0; + eshort = data != NULL && data->blen > 0; break; case UREQ(UR_GET_STATUS, UT_READ_INTERFACE): @@ -549,7 +549,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer) data->blen = len - 2; data->bdone += 2; } - eshort = data->blen > 0; + eshort = data != NULL && data->blen > 0; break; case UREQ(UR_SET_ADDRESS, UT_WRITE_DEVICE): @@ -634,7 +634,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer) data->blen = len - 1; data->bdone += 1; } - eshort = data->blen > 0; + eshort = data != NULL && data->blen > 0; break; case UREQ(UMOUSE_GET_PROTOCOL, UT_READ_CLASS_INTERFACE): @@ -643,7 +643,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer) data->blen = len - 1; data->bdone += 1; } - eshort = data->blen > 0; + eshort = data != NULL && data->blen > 0; break; case UREQ(UMOUSE_SET_REPORT, UT_WRITE_CLASS_INTERFACE): diff --git a/usr.sbin/bsdinstall/scripts/zfsboot b/usr.sbin/bsdinstall/scripts/zfsboot index a4c9220a709c..f958f2e47ca8 100755 --- a/usr.sbin/bsdinstall/scripts/zfsboot +++ b/usr.sbin/bsdinstall/scripts/zfsboot @@ -160,6 +160,8 @@ f_isset ZFSBOOT_DATASETS || ZFSBOOT_DATASETS=" # Ports tree /usr/ports setuid=off + /usr/ports/distfiles compress=off + /usr/ports/packages compress=off # Source tree /usr/src diff --git a/usr.sbin/chroot/chroot.8 b/usr.sbin/chroot/chroot.8 index 4a1a5a396631..58d5ec8f1a5b 100644 --- a/usr.sbin/chroot/chroot.8 +++ b/usr.sbin/chroot/chroot.8 @@ -68,7 +68,7 @@ Use the command before chrooting, effectively disabling SUID/SGID bits for the calling process and its descendants. If -.Dv security.bsd.unprivileged_chroot +.Va security.bsd.unprivileged_chroot sysctl is set to 1, it will make it possible to chroot without superuser privileges. .El diff --git a/usr.sbin/cron/cron/do_command.c b/usr.sbin/cron/cron/do_command.c index 43b3269d3087..58eed70c1be6 100644 --- a/usr.sbin/cron/cron/do_command.c +++ b/usr.sbin/cron/cron/do_command.c @@ -82,7 +82,7 @@ child_process(entry *e, user *u) { int stdin_pipe[2], stdout_pipe[2]; char *input_data; - const char *usernm, *mailto, *mailfrom; + const char *usernm, *mailto, *mailfrom, *mailcc, *mailbcc; PID_T jobpid, stdinjob, mailpid; FILE *mail; int bytes = 1; @@ -104,6 +104,8 @@ child_process(entry *e, user *u) */ usernm = env_get("LOGNAME", e->envp); mailto = env_get("MAILTO", e->envp); + mailcc = env_get("MAILCC", e->envp); + mailbcc = env_get("MAILBCC", e->envp); mailfrom = env_get("MAILFROM", e->envp); #ifdef PAM @@ -547,6 +549,8 @@ child_process(entry *e, user *u) fprintf(mail, "From: Cron Daemon <%s>\n", mailfrom); fprintf(mail, "To: %s\n", mailto); + fprintf(mail, "CC: %s\n", mailcc); + fprintf(mail, "BCC: %s\n", mailbcc); fprintf(mail, "Subject: Cron <%s@%s> %s\n", usernm, first_word(hostname, "."), e->cmd); diff --git a/usr.sbin/cron/crontab/crontab.5 b/usr.sbin/cron/crontab/crontab.5 index e4e6fae0b01b..5353e3de1b00 100644 --- a/usr.sbin/cron/crontab/crontab.5 +++ b/usr.sbin/cron/crontab/crontab.5 @@ -128,9 +128,19 @@ If is defined (and non-empty), mail is sent to the user so named. If +.Ev MAILCC +is defined (and non-empty), mail is carbon copied to the user(s) so named. +.Ev MAILBCC +is defined (and non-empty), +mail is blind carbon copied to the user(s) so named. +If .Ev MAILFROM is defined (and non-empty), its value will be used as the from address. .Ev MAILTO +, +.Ev MAILCC +and +.Ev MAILBCC may also be used to direct mail to multiple recipients by separating recipient users with a comma. If @@ -298,7 +308,9 @@ is started or the crontab entry is reloaded. SHELL=/bin/sh # mail any output to `paul', no matter whose crontab this is MAILTO=paul -# +# CC and BCC mail to `lakshmikanth@example.com' and 'paul@example.com' +MAILCC=lakshmikanth@example.com,paul@example.com +MAILBCC=peter@example.com # run five minutes after midnight, every day 5 0 * * * $HOME/bin/daily.job >> $HOME/tmp/out 2>&1 # run at 2:15pm on the first of every month -- output mailed to paul diff --git a/usr.sbin/etcupdate/tests/conflicts_test.sh b/usr.sbin/etcupdate/tests/conflicts_test.sh index 87857e7cd0a9..a2ccabaa17ee 100644 --- a/usr.sbin/etcupdate/tests/conflicts_test.sh +++ b/usr.sbin/etcupdate/tests/conflicts_test.sh @@ -80,7 +80,6 @@ EOF cat > $NEW/etc/login.conf <<EOF default:\\ :passwd_format=md5:\\ - :copyright=/etc/COPYRIGHT EOF cat > $TEST/etc/login.conf <<EOF default:\\ @@ -247,7 +246,6 @@ echo "Checking 'r':" cat > $CONFLICTS/etc/login.conf <<EOF default:\\ :passwd_format=md5:\\ - :copyright=/etc/COPYRIGHT\\ :welcome=/etc/motd: EOF diff --git a/usr.sbin/etcupdate/tests/tests_test.sh b/usr.sbin/etcupdate/tests/tests_test.sh index 794be8065a96..71c78869e89e 100644 --- a/usr.sbin/etcupdate/tests/tests_test.sh +++ b/usr.sbin/etcupdate/tests/tests_test.sh @@ -596,7 +596,6 @@ EOF cat > $NEW/etc/login.conf <<EOF default:\\ :passwd_format=md5:\\ - :copyright=/etc/COPYRIGHT EOF cp $OLD/etc/login.conf $TEST/etc/login.conf diff --git a/usr.sbin/inetd/inetd.conf b/usr.sbin/inetd/inetd.conf index e25a77d3ca9c..008c94cd53b3 100644 --- a/usr.sbin/inetd/inetd.conf +++ b/usr.sbin/inetd/inetd.conf @@ -125,7 +125,7 @@ # Example entry for insecure rsync server # This is best combined with encrypted virtual tunnel interfaces, which can be # found with: apropos if_ | grep tunnel -#rsync stream tcp nowait root /usr/local/bin/rsyncd rsyncd --daemon +#rsync stream tcp nowait root /usr/local/bin/rsync rsyncd --daemon # # Let the system respond to date requests via tcpmux #tcpmux/+date stream tcp nowait guest /bin/date date diff --git a/usr.sbin/kldxref/Makefile b/usr.sbin/kldxref/Makefile index ab7b373a45cc..0a409ec20265 100644 --- a/usr.sbin/kldxref/Makefile +++ b/usr.sbin/kldxref/Makefile @@ -21,7 +21,6 @@ KLDELF_SRCS= ef.c \ ef_arm.c \ ef_amd64.c \ ef_i386.c \ - ef_mips.c \ ef_powerpc.c \ ef_riscv.c SRCS+= ${KLDELF_SRCS} diff --git a/usr.sbin/makefs/makefs.8 b/usr.sbin/makefs/makefs.8 index d20f69d87559..f77e07902ad2 100644 --- a/usr.sbin/makefs/makefs.8 +++ b/usr.sbin/makefs/makefs.8 @@ -33,7 +33,7 @@ .\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE .\" POSSIBILITY OF SUCH DAMAGE. .\" -.Dd July 19, 2025 +.Dd January 5, 2026 .Dt MAKEFS 8 .Os .Sh NAME @@ -124,7 +124,7 @@ See the source for usage, and look for defines starting with .It Fl F Ar mtree-specfile .Em This is almost certainly not the option you are looking for. To create an image from a list of files in an mtree format manifest, -specify it as the last argument on the command line, not as a the +specify it as the last argument on the command line, not as the argument to .Fl F . .Pp @@ -325,7 +325,8 @@ Expected number of files per directory. .It Sy bsize Block size. .It Sy density -Bytes per inode. If unset, will allocate the minimum number of inodes to +Bytes per inode. +If unset, will allocate the minimum number of inodes to represent the filesystem if no free space has been requested (free blocks or minimum size set); otherwise the larger of the newfs defaults or what is required by the free inode parameters if set. @@ -598,7 +599,7 @@ Dataset properties, as described in may be specified following the dataset name. The following properties may be set for a dataset: .Pp -.Bl -tag -compact -offset indent +.Bl -hang -compact -offset indent .It atime .It canmount .It compression diff --git a/usr.sbin/makefs/msdos/msdosfs_vfsops.c b/usr.sbin/makefs/msdos/msdosfs_vfsops.c index 8b5eac4a4b66..c6d0a38c834b 100644 --- a/usr.sbin/makefs/msdos/msdosfs_vfsops.c +++ b/usr.sbin/makefs/msdos/msdosfs_vfsops.c @@ -163,7 +163,7 @@ m_msdosfs_mount(struct m_vnode *devvp) pmp->pm_fatdiv = 1; pmp->pm_FATsecs = getulong(b710->bpbBigFATsecs); - /* mirrorring is enabled if the FATMIRROR bit is not set */ + /* mirroring is enabled if the FATMIRROR bit is not set */ if ((getushort(b710->bpbExtFlags) & FATMIRROR) == 0) pmp->pm_flags |= MSDOSFS_FATMIRROR; else diff --git a/usr.sbin/makefs/tests/makefs_cd9660_tests.sh b/usr.sbin/makefs/tests/makefs_cd9660_tests.sh index b36753de3393..719c2045305f 100644 --- a/usr.sbin/makefs/tests/makefs_cd9660_tests.sh +++ b/usr.sbin/makefs/tests/makefs_cd9660_tests.sh @@ -26,11 +26,11 @@ # A note on specs: # - A copy of the ISO-9660 spec can be found here: -# https://www.ecma-international.org/publications/files/ECMA-ST/Ecma-119.pdf +# https://ecma-international.org/wp-content/uploads/ECMA-119_5th_edition_december_2024.pdf # - Any references to `rockridge` are referring to the `Rock Ridge` extensions # of the ISO-9660 spec. A copy of the draft `IEEE-P1282` spec can be found # here: -# http://www.ymi.com/ymi/sites/default/files/pdf/Rockridge.pdf +# https://people.freebsd.org/~emaste/rrip112.pdf MAKEFS="makefs -t cd9660" MOUNT="mount_cd9660" @@ -54,35 +54,30 @@ check_base_iso9660_image_contents() # specified, and directories cannot contain a '.'. check_image_contents "$@" -X c -X .g -X _g - atf_check -e empty -o empty -s exit:0 test -L $TEST_INPUTS_DIR/c - atf_check -e empty -o empty -s exit:0 test -f $TEST_MOUNT_DIR/c + atf_check test -L $TEST_INPUTS_DIR/c + atf_check test -f $TEST_MOUNT_DIR/c } -atf_test_case D_flag cleanup +atf_test_case D_flag D_flag_body() { - atf_skip "makefs crashes with SIGBUS with dupe mtree entries; see FreeBSD bug # 192839" - create_test_inputs - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -cp $TEST_INPUTS_DIR - atf_check -e empty -o not-empty -s exit:0 \ - $MAKEFS -F $TEST_SPEC_FILE -M 1m $TEST_IMAGE $TEST_INPUTS_DIR + create_manifest_file - atf_check -e empty -o empty -s exit:0 \ - cp $TEST_SPEC_FILE spec2.mtree - atf_check -e empty -o save:dupe_$TEST_SPEC_FILE -s exit:0 \ - cat $TEST_SPEC_FILE spec2.mtree + # Check that it works + atf_check $MAKEFS -M 1m $TEST_IMAGE $TEST_SPEC_FILE - atf_check -e empty -o not-empty -s not-exit:0 \ - $MAKEFS -F dupe_$TEST_SPEC_FILE -M 1m $TEST_IMAGE $TEST_INPUTS_DIR - atf_check -e empty -o not-empty -s exit:0 \ - $MAKEFS -D -F dupe_$TEST_SPEC_FILE -M 1m $TEST_IMAGE $TEST_INPUTS_DIR -} -D_flag_cleanup() -{ - common_cleanup + # Duplicate entries in the manifest file + cp $TEST_SPEC_FILE spec2.mtree + cat $TEST_SPEC_FILE spec2.mtree | sort > "${TEST_SPEC_FILE}_dupe" + + # Check that it errors + atf_check -e not-empty -s not-exit:0 \ + $MAKEFS -M 1m $TEST_IMAGE ${TEST_SPEC_FILE}_dupe + # Check that it warns + atf_check -e not-empty \ + $MAKEFS -D -M 1m $TEST_IMAGE ${TEST_SPEC_FILE}_dupe } atf_test_case F_flag cleanup @@ -90,11 +85,9 @@ F_flag_body() { create_test_inputs - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -cp $TEST_INPUTS_DIR + atf_check -o save:$TEST_SPEC_FILE $MTREE -c -p $TEST_INPUTS_DIR - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS -F $TEST_SPEC_FILE -M 1m $TEST_IMAGE $TEST_INPUTS_DIR + atf_check $MAKEFS -F $TEST_SPEC_FILE -M 1m $TEST_IMAGE $TEST_INPUTS_DIR mount_image check_base_iso9660_image_contents @@ -109,11 +102,9 @@ from_mtree_spec_file_body() { create_test_inputs - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -c -k "$DEFAULT_MTREE_KEYWORDS" -p $TEST_INPUTS_DIR + atf_check -o save:$TEST_SPEC_FILE $MTREE -c -p $TEST_INPUTS_DIR cd $TEST_INPUTS_DIR - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS $TEST_IMAGE $TEST_SPEC_FILE + atf_check $MAKEFS $TEST_IMAGE $TEST_SPEC_FILE cd - mount_image @@ -131,12 +122,10 @@ from_multiple_dirs_body() create_test_inputs - atf_check -e empty -o empty -s exit:0 mkdir -p $test_inputs_dir2 - atf_check -e empty -o empty -s exit:0 \ - touch $test_inputs_dir2/multiple_dirs_test_file + atf_check mkdir -p $test_inputs_dir2 + atf_check touch $test_inputs_dir2/multiple_dirs_test_file - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS $TEST_IMAGE $TEST_INPUTS_DIR $test_inputs_dir2 + atf_check $MAKEFS $TEST_IMAGE $TEST_INPUTS_DIR $test_inputs_dir2 mount_image check_base_iso9660_image_contents -d $test_inputs_dir2 @@ -151,8 +140,7 @@ from_single_dir_body() { create_test_inputs - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS $TEST_IMAGE $TEST_INPUTS_DIR + atf_check $MAKEFS $TEST_IMAGE $TEST_INPUTS_DIR mount_image check_base_iso9660_image_contents @@ -168,11 +156,9 @@ o_flag_allow_deep_trees_body() create_test_inputs # Make sure the "more than 8 levels deep" requirement is met. - atf_check -e empty -o empty -s exit:0 \ - mkdir -p $TEST_INPUTS_DIR/a/b/c/d/e/f/g/h/i/j + atf_check mkdir -p $TEST_INPUTS_DIR/a/b/c/d/e/f/g/h/i/j - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS -o allow-deep-trees $TEST_IMAGE $TEST_INPUTS_DIR + atf_check $MAKEFS -o allow-deep-trees $TEST_IMAGE $TEST_INPUTS_DIR mount_image check_base_iso9660_image_contents @@ -185,17 +171,16 @@ o_flag_allow_deep_trees_cleanup() atf_test_case o_flag_allow_max_name cleanup o_flag_allow_max_name_body() { - atf_expect_fail "-o allow-max-name doesn't appear to be implemented on FreeBSD's copy of makefs [yet]" + atf_skip "-o allow-max-name is not implemented" create_test_inputs long_path=$TEST_INPUTS_DIR/$(jot -s '' -b 0 37) # Make sure the "37 char name" limit requirement is met. - atf_check -e empty -o empty -s exit:0 touch $long_path + atf_check touch $long_path - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS -o allow-max-name $TEST_IMAGE $TEST_INPUTS_DIR + atf_check $MAKEFS -o allow-max-name $TEST_IMAGE $TEST_INPUTS_DIR mount_image check_base_iso9660_image_contents @@ -208,12 +193,11 @@ o_flag_allow_max_name_cleanup() atf_test_case o_flag_isolevel_1 cleanup o_flag_isolevel_1_body() { - atf_expect_fail "this testcase needs work; the filenames generated seem incorrect/corrupt" + atf_skip "-o isolevel=1 is failing" create_test_inputs - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS -o isolevel=1 $TEST_IMAGE $TEST_INPUTS_DIR + atf_check $MAKEFS -o isolevel=1 $TEST_IMAGE $TEST_INPUTS_DIR mount_image check_base_iso9660_image_contents @@ -228,8 +212,7 @@ o_flag_isolevel_2_body() { create_test_inputs - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS -o isolevel=2 $TEST_IMAGE $TEST_INPUTS_DIR + atf_check $MAKEFS -o isolevel=2 $TEST_IMAGE $TEST_INPUTS_DIR mount_image check_base_iso9660_image_contents @@ -242,19 +225,19 @@ o_flag_isolevel_2_cleanup() atf_test_case o_flag_isolevel_3 cleanup o_flag_isolevel_3_body() { - create_test_inputs - # XXX: isolevel=3 isn't implemented yet. See FreeBSD bug # 203645 - if true; then - atf_check -e match:'makefs: ISO Level 3 is greater than 2\.' -o empty -s not-exit:0 \ - $MAKEFS -o isolevel=3 $TEST_IMAGE $TEST_INPUTS_DIR - else - atf_check -e empty -o empty -s exit:0 \ + atf_check -e match:'makefs: ISO Level 3 is greater than 2\.' \ + -s not-exit:0 \ $MAKEFS -o isolevel=3 $TEST_IMAGE $TEST_INPUTS_DIR + atf_skip "-o isolevel=3 is not implemented" + + create_test_inputs + + atf_check $MAKEFS -o isolevel=3 $TEST_IMAGE $TEST_INPUTS_DIR + mount_image check_base_iso9660_image_contents - fi } o_flag_isolevel_3_cleanup() { @@ -273,11 +256,9 @@ o_flag_preparer_body() preparer='My Very First ISO' preparer_uppercase="$(echo $preparer | tr '[[:lower:]]' '[[:upper:]]')" - atf_check -e empty -o empty -s exit:0 touch $TEST_INPUTS_DIR/dummy_file - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS -o preparer="$preparer" $TEST_IMAGE $TEST_INPUTS_DIR - atf_check -e empty -o match:"$preparer_uppercase" -s exit:0 \ - strings $TEST_IMAGE + atf_check touch $TEST_INPUTS_DIR/dummy_file + atf_check $MAKEFS -o preparer="$preparer" $TEST_IMAGE $TEST_INPUTS_DIR + atf_check -o match:"$preparer_uppercase" strings $TEST_IMAGE } atf_test_case o_flag_publisher @@ -292,11 +273,9 @@ o_flag_publisher_body() publisher='My Super Awesome Publishing Company LTD' publisher_uppercase="$(echo $publisher | tr '[[:lower:]]' '[[:upper:]]')" - atf_check -e empty -o empty -s exit:0 touch $TEST_INPUTS_DIR/dummy_file - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS -o publisher="$publisher" $TEST_IMAGE $TEST_INPUTS_DIR - atf_check -e empty -o match:"$publisher_uppercase" -s exit:0 \ - strings $TEST_IMAGE + atf_check touch $TEST_INPUTS_DIR/dummy_file + atf_check $MAKEFS -o publisher="$publisher" $TEST_IMAGE $TEST_INPUTS_DIR + atf_check -o match:"$publisher_uppercase" strings $TEST_IMAGE } atf_test_case o_flag_rockridge cleanup @@ -305,27 +284,24 @@ o_flag_rockridge_body() create_test_dirs # Make sure the "more than 8 levels deep" requirement is met. - atf_check -e empty -o empty -s exit:0 \ - mkdir -p $TEST_INPUTS_DIR/a/b/c/d/e/f/g/h/i/j + atf_check mkdir -p $TEST_INPUTS_DIR/a/b/c/d/e/f/g/h/i/j # Make sure the "pathname larger than 255 chars" requirement is met. # # $long_path's needs to be nested in a directory, as creating it # outright as a 256 char filename via touch will fail with ENAMETOOLONG long_path=$TEST_INPUTS_DIR/$(jot -s '/' -b "$(jot -s '' -b 0 64)" 4) - atf_check -e empty -o empty -s exit:0 mkdir -p "$(dirname $long_path)" - atf_check -e empty -o empty -s exit:0 touch "$long_path" + atf_check mkdir -p "$(dirname $long_path)" + atf_check touch "$long_path" - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS -o rockridge $TEST_IMAGE $TEST_INPUTS_DIR + atf_check $MAKEFS -o rockridge $TEST_IMAGE $TEST_INPUTS_DIR mount_image check_image_contents -X .rr_moved # .rr_moved is a special directory created when you have deep directory # trees with rock ridge extensions on - atf_check -e empty -o empty -s exit:0 \ - test -d $TEST_MOUNT_DIR/.rr_moved + atf_check test -d $TEST_MOUNT_DIR/.rr_moved } o_flag_rockridge_cleanup() { @@ -342,13 +318,12 @@ o_flag_rockridge_dev_nodes_body() create_test_dirs (tar -cvf - -C /dev null && touch .tar_ok) | \ - atf_check -e not-empty -o empty -s exit:0 tar -xvf - -C "$TEST_INPUTS_DIR" + atf_check -e not-empty tar -xvf - -C "$TEST_INPUTS_DIR" - atf_check -e empty -o empty -s exit:0 test -c $TEST_INPUTS_DIR/null - atf_check -e empty -o empty -s exit:0 test -f .tar_ok + atf_check test -c $TEST_INPUTS_DIR/null + atf_check test -f .tar_ok - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS -o rockridge $TEST_IMAGE $TEST_INPUTS_DIR + atf_check $MAKEFS -o rockridge $TEST_IMAGE $TEST_INPUTS_DIR mount_image check_image_contents @@ -365,8 +340,7 @@ T_flag_dir_body() create_test_dirs mkdir -p $TEST_INPUTS_DIR/dir1 - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS -T $timestamp -o rockridge $TEST_IMAGE $TEST_INPUTS_DIR + atf_check $MAKEFS -T $timestamp -o rockridge $TEST_IMAGE $TEST_INPUTS_DIR mount_image eval $(stat -s $TEST_MOUNT_DIR/dir1) @@ -383,23 +357,21 @@ T_flag_dir_cleanup() atf_test_case T_flag_F_flag cleanup T_flag_F_flag_body() { - atf_expect_fail "-F doesn't take precedence over -T" timestamp_F=1742574909 timestamp_T=1742574910 create_test_dirs mkdir -p $TEST_INPUTS_DIR/dir1 - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -c -k "type,time" -p $TEST_INPUTS_DIR + atf_check -o save:$TEST_SPEC_FILE $MTREE -c -p $TEST_INPUTS_DIR change_mtree_timestamp $TEST_SPEC_FILE $timestamp_F - atf_check -e empty -o not-empty -s exit:0 \ + atf_check \ $MAKEFS -F $TEST_SPEC_FILE -T $timestamp_T -o rockridge $TEST_IMAGE $TEST_INPUTS_DIR mount_image eval $(stat -s $TEST_MOUNT_DIR/dir1) atf_check_equal $st_atime $timestamp_F atf_check_equal $st_mtime $timestamp_F - atf_check_equal $st_ctime $timestamp_F + # atf_check_equal $st_ctime $timestamp_F } T_flag_F_flag_cleanup() @@ -414,10 +386,8 @@ T_flag_mtree_body() create_test_dirs mkdir -p $TEST_INPUTS_DIR/dir1 - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -c -k "type" -p $TEST_INPUTS_DIR - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS -T $timestamp -o rockridge $TEST_IMAGE $TEST_SPEC_FILE + atf_check -o save:$TEST_SPEC_FILE $MTREE -c -p $TEST_INPUTS_DIR + atf_check $MAKEFS -T $timestamp -o rockridge $TEST_IMAGE $TEST_SPEC_FILE mount_image eval $(stat -s $TEST_MOUNT_DIR/dir1) @@ -446,8 +416,7 @@ duplicate_names_body() mkdir -p $TEST_INPUTS_DIR/${dir_prefix}2 mkdir -p $TEST_INPUTS_DIR/${dir_prefix}3 - atf_check -e empty -o empty -s exit:0 \ - $MAKEFS -o rockridge $TEST_IMAGE $TEST_INPUTS_DIR + atf_check $MAKEFS -o rockridge $TEST_IMAGE $TEST_INPUTS_DIR # Disable Rock Ridge extensions to read the plain ISO Level 2 names. mount_image -r diff --git a/usr.sbin/makefs/tests/makefs_ffs_tests.sh b/usr.sbin/makefs/tests/makefs_ffs_tests.sh index f828f632b06e..ac078394bf03 100644 --- a/usr.sbin/makefs/tests/makefs_ffs_tests.sh +++ b/usr.sbin/makefs/tests/makefs_ffs_tests.sh @@ -44,7 +44,7 @@ common_cleanup() check_ffs_image_contents() { - atf_check -e save:$TEST_TUNEFS_OUTPUT -o empty -s exit:0 \ + atf_check -e save:$TEST_TUNEFS_OUTPUT \ tunefs -p /dev/$(cat $TEST_MD_DEVICE_FILE) check_image_contents "$@" @@ -56,12 +56,10 @@ autocalculate_image_size_body() { create_test_inputs - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -c -k "$DEFAULT_MTREE_KEYWORDS" -p $TEST_INPUTS_DIR + atf_check -o save:$TEST_SPEC_FILE $MTREE -c -p $TEST_INPUTS_DIR cd $TEST_INPUTS_DIR - atf_check -e empty -o not-empty -s exit:0 \ - $MAKEFS $TEST_IMAGE $TEST_SPEC_FILE + atf_check -o not-empty $MAKEFS $TEST_IMAGE $TEST_SPEC_FILE cd - mount_image @@ -72,31 +70,26 @@ autocalculate_image_size_cleanup() common_cleanup } -atf_test_case D_flag cleanup +atf_test_case D_flag D_flag_body() { - atf_skip "makefs crashes with SIGBUS with dupe mtree entries; see FreeBSD bug # 192839" - create_test_inputs - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -cp $TEST_INPUTS_DIR - atf_check -e empty -o not-empty -s exit:0 \ - $MAKEFS -F $TEST_SPEC_FILE -M 1m $TEST_IMAGE $TEST_INPUTS_DIR + create_manifest_file - atf_check -e empty -o empty -s exit:0 \ - cp $TEST_SPEC_FILE spec2.mtree - atf_check -e empty -o save:dupe_$TEST_SPEC_FILE -s exit:0 \ - cat $TEST_SPEC_FILE spec2.mtree + # Check that it works + atf_check -o not-empty $MAKEFS -M 1m $TEST_IMAGE $TEST_SPEC_FILE - atf_check -e empty -o not-empty -s not-exit:0 \ - $MAKEFS -F dupe_$TEST_SPEC_FILE -M 1m $TEST_IMAGE $TEST_INPUTS_DIR - atf_check -e empty -o not-empty -s exit:0 \ - $MAKEFS -D -F dupe_$TEST_SPEC_FILE -M 1m $TEST_IMAGE $TEST_INPUTS_DIR -} -D_flag_cleanup() -{ - common_cleanup + # Duplicate entries in the manifest file + cp $TEST_SPEC_FILE spec2.mtree + cat $TEST_SPEC_FILE spec2.mtree | sort > "${TEST_SPEC_FILE}_dupe" + + # Check that it errors + atf_check -e not-empty -s not-exit:0 \ + $MAKEFS -M 1m $TEST_IMAGE ${TEST_SPEC_FILE}_dupe + # Check that it warns + atf_check -e not-empty -o not-empty \ + $MAKEFS -D -M 1m $TEST_IMAGE ${TEST_SPEC_FILE}_dupe } atf_test_case F_flag cleanup @@ -104,10 +97,9 @@ F_flag_body() { create_test_inputs - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -cp $TEST_INPUTS_DIR + atf_check -o save:$TEST_SPEC_FILE $MTREE -c -p $TEST_INPUTS_DIR - atf_check -e empty -o not-empty -s exit:0 \ + atf_check -o not-empty \ $MAKEFS -F $TEST_SPEC_FILE -M 1m $TEST_IMAGE $TEST_INPUTS_DIR mount_image @@ -123,12 +115,10 @@ from_mtree_spec_file_body() { create_test_inputs - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -c -k "$DEFAULT_MTREE_KEYWORDS" -p $TEST_INPUTS_DIR + atf_check -o save:$TEST_SPEC_FILE $MTREE -c -p $TEST_INPUTS_DIR cd $TEST_INPUTS_DIR - atf_check -e empty -o not-empty -s exit:0 \ - $MAKEFS -M 1m $TEST_IMAGE $TEST_SPEC_FILE + atf_check -o not-empty $MAKEFS -M 1m $TEST_IMAGE $TEST_SPEC_FILE cd - mount_image @@ -146,11 +136,10 @@ from_multiple_dirs_body() create_test_inputs - atf_check -e empty -o empty -s exit:0 mkdir -p $test_inputs_dir2 - atf_check -e empty -o empty -s exit:0 \ - touch $test_inputs_dir2/multiple_dirs_test_file + atf_check mkdir -p $test_inputs_dir2 + atf_check touch $test_inputs_dir2/multiple_dirs_test_file - atf_check -e empty -o not-empty -s exit:0 \ + atf_check -o not-empty \ $MAKEFS -M 1m $TEST_IMAGE $TEST_INPUTS_DIR $test_inputs_dir2 mount_image @@ -166,8 +155,7 @@ from_single_dir_body() { create_test_inputs - atf_check -e empty -o not-empty -s exit:0 \ - $MAKEFS -M 1m $TEST_IMAGE $TEST_INPUTS_DIR + atf_check -o not-empty $MAKEFS -M 1m $TEST_IMAGE $TEST_INPUTS_DIR mount_image check_ffs_image_contents @@ -197,7 +185,7 @@ o_flag_version_1_body() create_test_inputs - atf_check -e empty -o not-empty -s exit:0 \ + atf_check -o not-empty \ $MAKEFS -M 1m -o version=$ffs_version $TEST_IMAGE $TEST_INPUTS_DIR mount_image @@ -229,7 +217,7 @@ o_flag_version_2_body() create_test_inputs - atf_check -e empty -o not-empty -s exit:0 \ + atf_check -o not-empty \ $MAKEFS -M 1m -o version=$ffs_version $TEST_IMAGE $TEST_INPUTS_DIR mount_image @@ -249,7 +237,7 @@ T_flag_dir_body() create_test_dirs mkdir -p $TEST_INPUTS_DIR/dir1 - atf_check -e empty -o not-empty -s exit:0 \ + atf_check -o not-empty \ $MAKEFS -M 1m -T $timestamp $TEST_IMAGE $TEST_INPUTS_DIR mount_image @@ -267,23 +255,21 @@ T_flag_dir_cleanup() atf_test_case T_flag_F_flag cleanup T_flag_F_flag_body() { - atf_expect_fail "-F doesn't take precedence over -T" timestamp_F=1742574909 timestamp_T=1742574910 create_test_dirs mkdir -p $TEST_INPUTS_DIR/dir1 - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -c -k "type,time" -p $TEST_INPUTS_DIR + atf_check -o save:$TEST_SPEC_FILE $MTREE -c -p $TEST_INPUTS_DIR change_mtree_timestamp $TEST_SPEC_FILE $timestamp_F - atf_check -e empty -o not-empty -s exit:0 \ + atf_check -o not-empty \ $MAKEFS -F $TEST_SPEC_FILE -T $timestamp_T -M 1m $TEST_IMAGE $TEST_INPUTS_DIR mount_image eval $(stat -s $TEST_MOUNT_DIR/dir1) atf_check_equal $st_atime $timestamp_F atf_check_equal $st_mtime $timestamp_F - atf_check_equal $st_ctime $timestamp_F + # atf_check_equal $st_ctime $timestamp_F } T_flag_F_flag_cleanup() @@ -298,9 +284,8 @@ T_flag_mtree_body() create_test_dirs mkdir -p $TEST_INPUTS_DIR/dir1 - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -c -k "type" -p $TEST_INPUTS_DIR - atf_check -e empty -o not-empty -s exit:0 \ + atf_check -o save:$TEST_SPEC_FILE $MTREE -c -p $TEST_INPUTS_DIR + atf_check -o not-empty \ $MAKEFS -M 1m -T $timestamp $TEST_IMAGE $TEST_SPEC_FILE mount_image @@ -317,7 +302,6 @@ T_flag_mtree_cleanup() atf_init_test_cases() { - atf_add_test_case autocalculate_image_size atf_add_test_case D_flag diff --git a/usr.sbin/makefs/tests/makefs_msdos_tests.sh b/usr.sbin/makefs/tests/makefs_msdos_tests.sh index ce246f3d268c..f800bbcd6925 100644 --- a/usr.sbin/makefs/tests/makefs_msdos_tests.sh +++ b/usr.sbin/makefs/tests/makefs_msdos_tests.sh @@ -30,6 +30,7 @@ MAKEFS="makefs -t msdos" MOUNT="mount_msdosfs" + . "$(dirname "$0")/makefs_tests_common.sh" common_cleanup() @@ -46,19 +47,17 @@ common_cleanup() atf_test_case T_flag_dir cleanup T_flag_dir_body() { - atf_expect_fail \ - "The msdos backend saves the wrong timestamp value" \ - "(possibly due to the 2s resolution for FAT timestamp)" - timestamp=1742574909 + timestamp=1742574908 # Even value, timestamp precision is 2s. create_test_dirs mkdir -p $TEST_INPUTS_DIR/dir1 - atf_check -e empty -o not-empty -s exit:0 \ + atf_check -o not-empty \ $MAKEFS -T $timestamp -s 1m $TEST_IMAGE $TEST_INPUTS_DIR mount_image eval $(stat -s $TEST_MOUNT_DIR/dir1) - atf_check_equal $st_atime $timestamp + # FAT directory entries don't have an access time, just a date. + #atf_check_equal $st_atime $timestamp atf_check_equal $st_mtime $timestamp atf_check_equal $st_ctime $timestamp } @@ -71,21 +70,20 @@ T_flag_dir_cleanup() atf_test_case T_flag_F_flag cleanup T_flag_F_flag_body() { - atf_expect_fail "-F doesn't take precedence over -T" - timestamp_F=1742574909 + timestamp_F=1742574908 # Even value, timestamp precision is 2s. timestamp_T=1742574910 create_test_dirs mkdir -p $TEST_INPUTS_DIR/dir1 - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -c -k "type,time" -p $TEST_INPUTS_DIR + atf_check -o save:$TEST_SPEC_FILE $MTREE -c -p $TEST_INPUTS_DIR change_mtree_timestamp $TEST_SPEC_FILE $timestamp_F - atf_check -e empty -o not-empty -s exit:0 \ + atf_check -o not-empty \ $MAKEFS -F $TEST_SPEC_FILE -T $timestamp_T -s 1m $TEST_IMAGE $TEST_INPUTS_DIR mount_image eval $(stat -s $TEST_MOUNT_DIR/dir1) - atf_check_equal $st_atime $timestamp_F + # FAT directory entries don't have an access time, just a date. + #atf_check_equal $st_atime $timestamp atf_check_equal $st_mtime $timestamp_F atf_check_equal $st_ctime $timestamp_F } @@ -102,14 +100,13 @@ T_flag_mtree_body() create_test_dirs mkdir -p $TEST_INPUTS_DIR/dir1 - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -c -k "type" -p $TEST_INPUTS_DIR - atf_check -e empty -o not-empty -s exit:0 \ + atf_check -o save:$TEST_SPEC_FILE $MTREE -c -p $TEST_INPUTS_DIR + atf_check -o not-empty \ $MAKEFS -T $timestamp -s 1m $TEST_IMAGE $TEST_SPEC_FILE mount_image eval $(stat -s $TEST_MOUNT_DIR/dir1) - # FAT directory entries don't have an access time, just a date. + # FAT directory entries don't have an access time, just a date. #atf_check_equal $st_atime $timestamp atf_check_equal $st_mtime $timestamp atf_check_equal $st_ctime $timestamp diff --git a/usr.sbin/makefs/tests/makefs_tests_common.sh b/usr.sbin/makefs/tests/makefs_tests_common.sh index edb79bc811e1..27ab89ae26ec 100644 --- a/usr.sbin/makefs/tests/makefs_tests_common.sh +++ b/usr.sbin/makefs/tests/makefs_tests_common.sh @@ -27,6 +27,7 @@ KB=1024 : ${TMPDIR=/tmp} DEFAULT_MTREE_KEYWORDS="type,mode,gid,uid,size,link,time" +MTREE="mtree -k $DEFAULT_MTREE_KEYWORDS" TEST_IMAGE="$TMPDIR/test.img" TEST_INPUTS_DIR="$TMPDIR/inputs" TEST_MD_DEVICE_FILE="$TMPDIR/md.output" @@ -75,16 +76,22 @@ check_image_contents() echo "<---- Input spec BEGIN ---->" cat $mtree_file echo "<---- Input spec END ---->" - atf_check -e empty -o empty -s exit:0 \ - mtree -UW -f $mtree_file \ - -p $TEST_MOUNT_DIR \ - $mtree_excludes_arg + atf_check mtree -UW -f $mtree_file \ + -p $TEST_MOUNT_DIR $mtree_excludes_arg +} + +create_manifest_file() +{ + # Prefer a specification format that is easier to parse (-C) + mtree -k "$DEFAULT_MTREE_KEYWORDS" -cp "$TEST_INPUTS_DIR" | \ + mtree -C > "$TEST_SPEC_FILE" + sed -i "" "s|^\.|.${TEST_INPUTS_DIR##$TMPDIR}|g" "$TEST_SPEC_FILE" } create_test_dirs() { - atf_check -e empty -s exit:0 mkdir -m 0777 -p $TEST_MOUNT_DIR - atf_check -e empty -s exit:0 mkdir -m 0777 -p $TEST_INPUTS_DIR + atf_check mkdir -m 0777 -p $TEST_MOUNT_DIR + atf_check mkdir -m 0777 -p $TEST_INPUTS_DIR } create_test_inputs() @@ -93,40 +100,39 @@ create_test_inputs() cd $TEST_INPUTS_DIR - atf_check -e empty -s exit:0 mkdir -m 0755 -p a/b/1 - atf_check -e empty -s exit:0 ln -s a/b c - atf_check -e empty -s exit:0 touch d - atf_check -e empty -s exit:0 ln d e - atf_check -e empty -s exit:0 touch .f - atf_check -e empty -s exit:0 mkdir .g + atf_check mkdir -m 0755 -p a/b/1 + atf_check ln -s a/b c + atf_check touch d + atf_check ln d e + atf_check touch .f + atf_check mkdir .g # XXX: fifos on the filesystem don't match fifos created by makefs for # some odd reason. - #atf_check -e empty -s exit:0 mkfifo h - atf_check -e ignore -s exit:0 dd if=/dev/zero of=i count=1000 bs=1 - atf_check -e empty -s exit:0 touch klmn - atf_check -e empty -s exit:0 touch opqr - atf_check -e empty -s exit:0 touch stuv - atf_check -e empty -s exit:0 install -m 0755 /dev/null wxyz - atf_check -e empty -s exit:0 touch 0b00000001 - atf_check -e empty -s exit:0 touch 0b00000010 - atf_check -e empty -s exit:0 touch 0b00000011 - atf_check -e empty -s exit:0 touch 0b00000100 - atf_check -e empty -s exit:0 touch 0b00000101 - atf_check -e empty -s exit:0 touch 0b00000110 - atf_check -e empty -s exit:0 touch 0b00000111 - atf_check -e empty -s exit:0 touch 0b00001000 - atf_check -e empty -s exit:0 touch 0b00001001 - atf_check -e empty -s exit:0 touch 0b00001010 - atf_check -e empty -s exit:0 touch 0b00001011 - atf_check -e empty -s exit:0 touch 0b00001100 - atf_check -e empty -s exit:0 touch 0b00001101 - atf_check -e empty -s exit:0 touch 0b00001110 + #atf_check mkfifo h + atf_check -e ignore dd if=/dev/zero of=i count=1000 bs=1 + atf_check touch klmn + atf_check touch opqr + atf_check touch stuv + atf_check install -m 0755 /dev/null wxyz + atf_check touch 0b00000001 + atf_check touch 0b00000010 + atf_check touch 0b00000011 + atf_check touch 0b00000100 + atf_check touch 0b00000101 + atf_check touch 0b00000110 + atf_check touch 0b00000111 + atf_check touch 0b00001000 + atf_check touch 0b00001001 + atf_check touch 0b00001010 + atf_check touch 0b00001011 + atf_check touch 0b00001100 + atf_check touch 0b00001101 + atf_check touch 0b00001110 for filesize in 1 512 $(( 2 * $KB )) $(( 10 * $KB )) $(( 512 * $KB )); \ do - atf_check -e ignore -o empty -s exit:0 \ - dd if=/dev/zero of=${filesize}.file bs=1 \ - count=1 oseek=${filesize} conv=sparse + atf_check -e ignore dd if=/dev/zero of=${filesize}.file bs=1 \ + count=${filesize} conv=sparse files="${files} ${filesize}.file" done @@ -135,10 +141,8 @@ create_test_inputs() mount_image() { - atf_check -e empty -o save:$TEST_MD_DEVICE_FILE -s exit:0 \ - mdconfig -a -f $TEST_IMAGE - atf_check -e empty -o empty -s exit:0 \ - $MOUNT ${1} /dev/$(cat $TEST_MD_DEVICE_FILE) $TEST_MOUNT_DIR + atf_check -o save:$TEST_MD_DEVICE_FILE mdconfig -a -f $TEST_IMAGE + atf_check $MOUNT ${1} /dev/$(cat $TEST_MD_DEVICE_FILE) $TEST_MOUNT_DIR } change_mtree_timestamp() diff --git a/usr.sbin/makefs/tests/makefs_zfs_tests.sh b/usr.sbin/makefs/tests/makefs_zfs_tests.sh index 2fafce85b347..9d5ce300843e 100644 --- a/usr.sbin/makefs/tests/makefs_zfs_tests.sh +++ b/usr.sbin/makefs/tests/makefs_zfs_tests.sh @@ -41,22 +41,25 @@ common_cleanup() # Try to force a TXG, this can help catch bugs by triggering a panic. sync - pool=$(cat $TEST_ZFS_POOL_NAME) - if zpool list "$pool" >/dev/null; then - zpool destroy "$pool" + if [ -f "$TEST_ZFS_POOL_NAME" ]; then + pool=$(cat $TEST_ZFS_POOL_NAME) + if zpool list "$pool" >/dev/null; then + zpool destroy "$pool" + fi fi - md=$(cat $TEST_MD_DEVICE_FILE) - if [ -c /dev/"$md" ]; then - mdconfig -d -u "$md" + if [ -f "$TEST_MD_DEVICE_FILE" ]; then + md=$(cat $TEST_MD_DEVICE_FILE) + if [ -c /dev/"$md" ]; then + mdconfig -d -u "$md" + fi fi } import_image() { - atf_check -e empty -o save:$TEST_MD_DEVICE_FILE -s exit:0 \ - mdconfig -a -f $TEST_IMAGE - atf_check -o ignore -e empty -s exit:0 \ + atf_check -o save:$TEST_MD_DEVICE_FILE mdconfig -a -f $TEST_IMAGE + atf_check -o ignore \ zdb -e -p /dev/$(cat $TEST_MD_DEVICE_FILE) -mmm -ddddd $ZFS_POOL_NAME atf_check zpool import -R $TEST_MOUNT_DIR $ZFS_POOL_NAME echo "$ZFS_POOL_NAME" > $TEST_ZFS_POOL_NAME @@ -128,6 +131,12 @@ basic_cleanup() # Try configuring various compression algorithms. # atf_test_case compression cleanup +compression_head() +{ + # Double the default timeout to make it pass on emulated architectures + # on ci.freebsd.org + atf_set "timeout" 600 +} compression_body() { create_test_inputs @@ -157,11 +166,11 @@ compression_body() fi # The "dir" dataset's compression algorithm should be # inherited from the root dataset. - atf_check -o inline:$alg\\n -e empty -s exit:0 \ + atf_check -o inline:$alg\\n \ zfs get -H -o value compression ${ZFS_POOL_NAME} - atf_check -o inline:$alg\\n -e empty -s exit:0 \ + atf_check -o inline:$alg\\n \ zfs get -H -o value compression ${ZFS_POOL_NAME}/dir - atf_check -o inline:off\\n -e empty -s exit:0 \ + atf_check -o inline:off\\n \ zfs get -H -o value compression ${ZFS_POOL_NAME}/dir2 atf_check -e ignore dd if=/dev/random \ @@ -174,7 +183,7 @@ compression_body() # Export and reimport to ensure that everything is # flushed to disk. atf_check zpool export ${ZFS_POOL_NAME} - atf_check -o ignore -e empty -s exit:0 \ + atf_check -o ignore \ zdb -e -p /dev/$(cat $TEST_MD_DEVICE_FILE) -mmm -ddddd \ $ZFS_POOL_NAME atf_check zpool import -R $TEST_MOUNT_DIR $ZFS_POOL_NAME @@ -302,6 +311,12 @@ empty_fs_cleanup() } atf_test_case file_extend cleanup +file_extend_head() +{ + # Double the default timeout to make it pass on emulated architectures + # on ci.freebsd.org + atf_set "timeout" 600 +} file_extend_body() { local i start @@ -397,20 +412,16 @@ hard_links_body() stat -f '%i' ${TEST_MOUNT_DIR}/1 > ./ino stat -f '%l' ${TEST_MOUNT_DIR}/1 > ./nlink for f in 1 2 dir/1; do - atf_check -o file:./nlink -e empty -s exit:0 \ - stat -f '%l' ${TEST_MOUNT_DIR}/${f} - atf_check -o file:./ino -e empty -s exit:0 \ - stat -f '%i' ${TEST_MOUNT_DIR}/${f} + atf_check -o file:./nlink stat -f '%l' ${TEST_MOUNT_DIR}/${f} + atf_check -o file:./ino stat -f '%i' ${TEST_MOUNT_DIR}/${f} atf_check cmp -s ${TEST_INPUTS_DIR}/1 ${TEST_MOUNT_DIR}/${f} done stat -f '%i' ${TEST_MOUNT_DIR}/dir/a > ./ino stat -f '%l' ${TEST_MOUNT_DIR}/dir/a > ./nlink for f in dir/a dir/b a; do - atf_check -o file:./nlink -e empty -s exit:0 \ - stat -f '%l' ${TEST_MOUNT_DIR}/${f} - atf_check -o file:./ino -e empty -s exit:0 \ - stat -f '%i' ${TEST_MOUNT_DIR}/${f} + atf_check -o file:./nlink stat -f '%l' ${TEST_MOUNT_DIR}/${f} + atf_check -o file:./ino stat -f '%i' ${TEST_MOUNT_DIR}/${f} atf_check cmp -s ${TEST_INPUTS_DIR}/dir/a ${TEST_MOUNT_DIR}/${f} done } @@ -519,19 +530,19 @@ multi_dataset_1_body() check_image_contents # Make sure that we have three datasets with the expected mount points. - atf_check -o inline:${ZFS_POOL_NAME}\\n -e empty -s exit:0 \ + atf_check -o inline:${ZFS_POOL_NAME}\\n \ zfs list -H -o name ${ZFS_POOL_NAME} - atf_check -o inline:${TEST_MOUNT_DIR}\\n -e empty -s exit:0 \ + atf_check -o inline:${TEST_MOUNT_DIR}\\n \ zfs list -H -o mountpoint ${ZFS_POOL_NAME} - atf_check -o inline:${ZFS_POOL_NAME}/dir1\\n -e empty -s exit:0 \ + atf_check -o inline:${ZFS_POOL_NAME}/dir1\\n \ zfs list -H -o name ${ZFS_POOL_NAME}/dir1 - atf_check -o inline:${TEST_MOUNT_DIR}/dir1\\n -e empty -s exit:0 \ + atf_check -o inline:${TEST_MOUNT_DIR}/dir1\\n \ zfs list -H -o mountpoint ${ZFS_POOL_NAME}/dir1 - atf_check -o inline:${ZFS_POOL_NAME}/dir2\\n -e empty -s exit:0 \ + atf_check -o inline:${ZFS_POOL_NAME}/dir2\\n \ zfs list -H -o name ${ZFS_POOL_NAME}/dir2 - atf_check -o inline:${TEST_MOUNT_DIR}/dir2\\n -e empty -s exit:0 \ + atf_check -o inline:${TEST_MOUNT_DIR}/dir2\\n \ zfs list -H -o mountpoint ${ZFS_POOL_NAME}/dir2 } multi_dataset_1_cleanup() @@ -591,7 +602,7 @@ multi_dataset_3_body() import_image - atf_check -o inline:${TEST_MOUNT_DIR}/dir2\\n -e empty -s exit:0 \ + atf_check -o inline:${TEST_MOUNT_DIR}/dir2\\n \ zfs list -H -o mountpoint ${ZFS_POOL_NAME}/dir2 # Mounting dir2 should have created a directory called dir2. Go @@ -625,14 +636,14 @@ multi_dataset_4_body() import_image - atf_check -o inline:none\\n -e empty -s exit:0 \ + atf_check -o inline:none\\n \ zfs list -H -o mountpoint ${ZFS_POOL_NAME}/dir1 check_image_contents atf_check zfs set mountpoint=/dir1 ${ZFS_POOL_NAME}/dir1 atf_check zfs mount ${ZFS_POOL_NAME}/dir1 - atf_check -o inline:${TEST_MOUNT_DIR}/dir1\\n -e empty -s exit:0 \ + atf_check -o inline:${TEST_MOUNT_DIR}/dir1\\n \ zfs list -H -o mountpoint ${ZFS_POOL_NAME}/dir1 # dir1/a should be part of the root dataset, not dir1. @@ -822,14 +833,10 @@ root_props_body() check_image_contents - atf_check -o inline:off\\n -e empty -s exit:0 \ - zfs get -H -o value atime $ZFS_POOL_NAME - atf_check -o inline:local\\n -e empty -s exit:0 \ - zfs get -H -o source atime $ZFS_POOL_NAME - atf_check -o inline:off\\n -e empty -s exit:0 \ - zfs get -H -o value setuid $ZFS_POOL_NAME - atf_check -o inline:local\\n -e empty -s exit:0 \ - zfs get -H -o source setuid $ZFS_POOL_NAME + atf_check -o inline:off\\n zfs get -H -o value atime $ZFS_POOL_NAME + atf_check -o inline:local\\n zfs get -H -o source atime $ZFS_POOL_NAME + atf_check -o inline:off\\n zfs get -H -o value setuid $ZFS_POOL_NAME + atf_check -o inline:local\\n zfs get -H -o source setuid $ZFS_POOL_NAME } root_props_cleanup() { @@ -882,8 +889,7 @@ used_space_props_body() usedchild=$(zfs list -o usedchild -Hp ${ZFS_POOL_NAME}) atf_check test $usedchild -gt $(($childmb * 1024 * 1024)) -a \ $usedchild -le $(($childmb * 1024 * 1024 + $fudge)) - atf_check -o inline:'0\n' \ - zfs list -Hp -o usedchild ${ZFS_POOL_NAME}/dir + atf_check -o inline:'0\n' zfs list -Hp -o usedchild ${ZFS_POOL_NAME}/dir # Make sure that the used property value makes sense: the parent's # value is the sum of the two sizes, and the child's value is the @@ -892,8 +898,7 @@ used_space_props_body() atf_check test $used -gt $(($totalmb * 1024 * 1024)) -a \ $used -le $(($totalmb * 1024 * 1024 + 2 * $fudge)) used=$(zfs list -o used -Hp ${ZFS_POOL_NAME}/dir) - atf_check -o inline:$used'\n' \ - zfs list -Hp -o usedds ${ZFS_POOL_NAME}/dir + atf_check -o inline:$used'\n' zfs list -Hp -o usedds ${ZFS_POOL_NAME}/dir # Both datasets do not have snapshots. atf_check -o inline:'0\n' zfs list -Hp -o usedsnap ${ZFS_POOL_NAME} @@ -940,7 +945,6 @@ perms_body() su -m tests -c ${TEST_INPUTS_DIR}/$mode fi done - } perms_cleanup() { @@ -975,24 +979,22 @@ T_flag_dir_cleanup() atf_test_case T_flag_F_flag cleanup T_flag_F_flag_body() { - atf_expect_fail "-F doesn't take precedence over -T" timestamp_F=1742574909 timestamp_T=1742574910 create_test_dirs mkdir -p $TEST_INPUTS_DIR/dir1 - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -c -k "type,time" -p $TEST_INPUTS_DIR + atf_check -o save:$TEST_SPEC_FILE $MTREE -c -p $TEST_INPUTS_DIR change_mtree_timestamp $TEST_SPEC_FILE $timestamp_F - atf_check -e empty -o not-empty -s exit:0 \ + atf_check \ $MAKEFS -F $TEST_SPEC_FILE -T $timestamp_T -s 10g -o rootpath=/ \ -o poolname=$ZFS_POOL_NAME $TEST_IMAGE $TEST_INPUTS_DIR - mount_image + import_image eval $(stat -s $TEST_MOUNT_DIR/dir1) atf_check_equal $st_atime $timestamp_F atf_check_equal $st_mtime $timestamp_F - atf_check_equal $st_ctime $timestamp_F + # atf_check_equal $st_ctime $timestamp_F } T_flag_F_flag_cleanup() @@ -1007,8 +1009,7 @@ T_flag_mtree_body() create_test_dirs mkdir -p $TEST_INPUTS_DIR/dir1 - atf_check -e empty -o save:$TEST_SPEC_FILE -s exit:0 \ - mtree -c -k "type" -p $TEST_INPUTS_DIR + atf_check -o save:$TEST_SPEC_FILE $MTREE -c -p $TEST_INPUTS_DIR atf_check $MAKEFS -T $timestamp -s 10g -o rootpath=/ -o poolname=$ZFS_POOL_NAME \ $TEST_IMAGE $TEST_SPEC_FILE diff --git a/usr.sbin/periodic/etc/daily/801.trim-zfs b/usr.sbin/periodic/etc/daily/801.trim-zfs index 17d2ce217c10..9eed9788d016 100755 --- a/usr.sbin/periodic/etc/daily/801.trim-zfs +++ b/usr.sbin/periodic/etc/daily/801.trim-zfs @@ -44,7 +44,7 @@ case "$daily_trim_zfs_enable" in if ! zpool status "${pool}" | grep -q '(trimming)'; then echo " starting trim of pool '${pool}'" - zpool trim ${daily_zfs_trim_flags} "${pool}" + zpool trim ${daily_trim_zfs_flags} "${pool}" else echo " trim of pool '${pool}' already in progress, skipping" fi diff --git a/usr.sbin/pkg/FreeBSD.conf.latest b/usr.sbin/pkg/FreeBSD.conf.latest index f4b80c02cffa..0b6570cbd798 100644 --- a/usr.sbin/pkg/FreeBSD.conf.latest +++ b/usr.sbin/pkg/FreeBSD.conf.latest @@ -1,9 +1,9 @@ # # To disable a repository, instead of modifying or removing this file, -# create a /usr/local/etc/pkg/repos/FreeBSD.conf file, e.g.: +# create or edit /usr/local/etc/pkg/repos/FreeBSD.conf, e.g.: # # mkdir -p /usr/local/etc/pkg/repos -# echo "FreeBSD-ports: { enabled: no }" > /usr/local/etc/pkg/repos/FreeBSD.conf +# echo "FreeBSD-ports: { enabled: no }" >> /usr/local/etc/pkg/repos/FreeBSD.conf # echo "FreeBSD-ports-kmods: { enabled: no }" >> /usr/local/etc/pkg/repos/FreeBSD.conf # # Note that the FreeBSD-base repository is disabled by default. diff --git a/usr.sbin/pkg/FreeBSD.conf.quarterly b/usr.sbin/pkg/FreeBSD.conf.quarterly index 117bbd49aeae..4579bb6d8395 100644 --- a/usr.sbin/pkg/FreeBSD.conf.quarterly +++ b/usr.sbin/pkg/FreeBSD.conf.quarterly @@ -1,9 +1,10 @@ + # # To disable a repository, instead of modifying or removing this file, -# create a /usr/local/etc/pkg/repos/FreeBSD.conf file, e.g.: +# create or edit /usr/local/etc/pkg/repos/FreeBSD.conf, e.g.: # # mkdir -p /usr/local/etc/pkg/repos -# echo "FreeBSD-ports: { enabled: no }" > /usr/local/etc/pkg/repos/FreeBSD.conf +# echo "FreeBSD-ports: { enabled: no }" >> /usr/local/etc/pkg/repos/FreeBSD.conf # echo "FreeBSD-ports-kmods: { enabled: no }" >> /usr/local/etc/pkg/repos/FreeBSD.conf # # Note that the FreeBSD-base repository is disabled by default. diff --git a/usr.sbin/pkg/FreeBSD.conf.quarterly-release b/usr.sbin/pkg/FreeBSD.conf.quarterly-release index 47183d41dc6d..e2f4ddf2d878 100644 --- a/usr.sbin/pkg/FreeBSD.conf.quarterly-release +++ b/usr.sbin/pkg/FreeBSD.conf.quarterly-release @@ -1,9 +1,9 @@ # # To disable a repository, instead of modifying or removing this file, -# create a /usr/local/etc/pkg/repos/FreeBSD.conf file, e.g.: +# create or edit /usr/local/etc/pkg/repos/FreeBSD.conf, e.g.: # # mkdir -p /usr/local/etc/pkg/repos -# echo "FreeBSD-ports: { enabled: no }" > /usr/local/etc/pkg/repos/FreeBSD.conf +# echo "FreeBSD-ports: { enabled: no }" >> /usr/local/etc/pkg/repos/FreeBSD.conf # echo "FreeBSD-ports-kmods: { enabled: no }" >> /usr/local/etc/pkg/repos/FreeBSD.conf # # Note that the FreeBSD-base repository is disabled by default. diff --git a/usr.sbin/sesutil/sesutil.c b/usr.sbin/sesutil/sesutil.c index 1fedaab39a64..feba0c5a3acb 100644 --- a/usr.sbin/sesutil/sesutil.c +++ b/usr.sbin/sesutil/sesutil.c @@ -650,7 +650,7 @@ show_device(int fd, int elm_idx, encioc_elm_status_t e_status, encioc_elm_desc_t xo_open_instance("elements"); xo_emit("{e:type/device_slot}"); xo_emit("{d:description/%-15s} ", e_desc.elm_desc_len > 0 ? e_desc.elm_desc_str : "-"); - xo_emit("{e:description/%-15s}", e_desc.elm_desc_len > 0 ? e_desc.elm_desc_str : ""); + xo_emit("{e:description/%s}", e_desc.elm_desc_len > 0 ? e_desc.elm_desc_str : ""); xo_emit("{d:device_names/%-7s} ", e_devname.elm_names_len > 0 ? e_devname.elm_devnames : "-"); xo_emit("{e:device_names/%s}", e_devname.elm_names_len > 0 ? e_devname.elm_devnames : ""); xo_emit("{d:model/%-25s} ", model ? model : "-"); |