diff options
Diffstat (limited to 'contrib/gcc/config/i386/i386.h')
| -rw-r--r-- | contrib/gcc/config/i386/i386.h | 89 |
1 files changed, 39 insertions, 50 deletions
diff --git a/contrib/gcc/config/i386/i386.h b/contrib/gcc/config/i386/i386.h index 58f65c11908f..2b9ad4be058d 100644 --- a/contrib/gcc/config/i386/i386.h +++ b/contrib/gcc/config/i386/i386.h @@ -222,6 +222,7 @@ extern const int x86_add_esp_4, x86_add_esp_8, x86_sub_esp_4, x86_sub_esp_8; extern const int x86_partial_reg_dependency, x86_memory_mismatch_stall; extern const int x86_accumulate_outgoing_args, x86_prologue_using_move; extern const int x86_epilogue_using_move, x86_decompose_lea; +extern const int x86_arch_always_fancy_math_387; extern int x86_prefetch_sse; #define TARGET_USE_LEAVE (x86_use_leave & CPUMASK) @@ -281,18 +282,23 @@ extern int x86_prefetch_sse; #define TARGET_RED_ZONE (!(target_flags & MASK_NO_RED_ZONE)) +/* WARNING: Do not mark empty strings for translation, as calling + gettext on an empty string does NOT return an empty + string. */ + + #define TARGET_SWITCHES \ { { "80387", MASK_80387, N_("Use hardware fp") }, \ { "no-80387", -MASK_80387, N_("Do not use hardware fp") }, \ { "hard-float", MASK_80387, N_("Use hardware fp") }, \ { "soft-float", -MASK_80387, N_("Do not use hardware fp") }, \ { "no-soft-float", MASK_80387, N_("Use hardware fp") }, \ - { "386", 0, N_("") /*Deprecated.*/}, \ - { "486", 0, N_("") /*Deprecated.*/}, \ - { "pentium", 0, N_("") /*Deprecated.*/}, \ - { "pentiumpro", 0, N_("") /*Deprecated.*/}, \ - { "intel-syntax", 0, N_("") /*Deprecated.*/}, \ - { "no-intel-syntax", 0, N_("") /*Deprecated.*/}, \ + { "386", 0, "" /*Deprecated.*/}, \ + { "486", 0, "" /*Deprecated.*/}, \ + { "pentium", 0, "" /*Deprecated.*/}, \ + { "pentiumpro", 0, "" /*Deprecated.*/}, \ + { "intel-syntax", 0, "" /*Deprecated.*/}, \ + { "no-intel-syntax", 0, "" /*Deprecated.*/}, \ { "rtd", MASK_RTD, \ N_("Alternate calling convention") }, \ { "no-rtd", -MASK_RTD, \ @@ -346,20 +352,20 @@ extern int x86_prefetch_sse; N_("Support MMX built-in functions") }, \ { "no-mmx", -MASK_MMX, \ N_("Do not support MMX built-in functions") }, \ - { "no-mmx", MASK_MMX_SET, N_("") }, \ + { "no-mmx", MASK_MMX_SET, "" }, \ { "3dnow", MASK_3DNOW | MASK_3DNOW_SET, \ N_("Support 3DNow! built-in functions") }, \ - { "no-3dnow", -MASK_3DNOW, N_("") }, \ + { "no-3dnow", -MASK_3DNOW, "" }, \ { "no-3dnow", MASK_3DNOW_SET, \ N_("Do not support 3DNow! built-in functions") }, \ { "sse", MASK_SSE | MASK_SSE_SET, \ N_("Support MMX and SSE built-in functions and code generation") }, \ - { "no-sse", -MASK_SSE, N_("") }, \ + { "no-sse", -MASK_SSE, "" }, \ { "no-sse", MASK_SSE_SET, \ N_("Do not support MMX and SSE built-in functions and code generation") },\ { "sse2", MASK_SSE2 | MASK_SSE2_SET, \ N_("Support MMX, SSE and SSE2 built-in functions and code generation") }, \ - { "no-sse2", -MASK_SSE2, N_("") }, \ + { "no-sse2", -MASK_SSE2, "" }, \ { "no-sse2", MASK_SSE2_SET, \ N_("Do not support MMX, SSE and SSE2 built-in functions and code generation") }, \ { "128bit-long-double", MASK_128BIT_LONG_DOUBLE, \ @@ -440,9 +446,9 @@ extern int ix86_arch; { "cmodel=", &ix86_cmodel_string, \ N_("Use given x86-64 code model") }, \ { "debug-arg", &ix86_debug_arg_string, \ - N_("" /* Undocumented. */) }, \ + "" /* Undocumented. */ }, \ { "debug-addr", &ix86_debug_addr_string, \ - N_("" /* Undocumented. */) }, \ + "" /* Undocumented. */ }, \ { "asm=", &ix86_asm_string, \ N_("Use given assembler dialect") }, \ SUBTARGET_OPTIONS \ @@ -606,10 +612,10 @@ extern int ix86_arch; %{march=athlon-tbird|march=athlon-xp|march=athlon-mp|march=pentium3|march=pentium4:\ -D__SSE__ }\ %{march=pentium-mmx|march=k6|march=k6-2|march=k6-3\ -march=athlon|march=athlon-tbird|march=athlon-4|march=athlon-xp\ +|march=athlon|march=athlon-tbird|march=athlon-4|march=athlon-xp\ |march=athlon-mp|march=pentium2|march=pentium3|march=pentium4: -D__MMX__ }\ %{march=k6-2|march=k6-3\ -march=athlon|march=athlon-tbird|march=athlon-4|march=athlon-xp\ +|march=athlon|march=athlon-tbird|march=athlon-4|march=athlon-xp\ |march=athlon-mp: -D__3dNOW__ }\ %{march=athlon|march=athlon-tbird|march=athlon-4|march=athlon-xp\ |march=athlon-mp: -D__3dNOW_A__ }\ @@ -926,38 +932,21 @@ march=athlon|march=athlon-tbird|march=athlon-4|march=athlon-xp\ registers listed in CALL_USED_REGISTERS, keeping the others available for storage of persistent values. - Three different versions of REG_ALLOC_ORDER have been tried: + The ORDER_REGS_FOR_LOCAL_ALLOC actually overwrite the order, + so this is just empty initializer for array. */ - If the order is edx, ecx, eax, ... it produces a slightly faster compiler, - but slower code on simple functions returning values in eax. +#define REG_ALLOC_ORDER \ +{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,\ + 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, \ + 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ + 48, 49, 50, 51, 52 } - If the order is eax, ecx, edx, ... it causes reload to abort when compiling - perl 4.036 due to not being able to create a DImode register (to hold a 2 - word union). +/* ORDER_REGS_FOR_LOCAL_ALLOC is a macro which permits reg_alloc_order + to be rearranged based on a particular function. When using sse math, + we want to allocase SSE before x87 registers and vice vera. */ - If the order is eax, edx, ecx, ... it produces better code for simple - functions, and a slightly slower compiler. Users complained about the code - generated by allocating edx first, so restore the 'natural' order of things. */ +#define ORDER_REGS_FOR_LOCAL_ALLOC x86_order_regs_for_local_alloc () -#define REG_ALLOC_ORDER \ -/*ax,dx,cx,*/ \ -{ 0, 1, 2, \ -/* bx,si,di,bp,sp,*/ \ - 3, 4, 5, 6, 7, \ -/*r8,r9,r10,r11,*/ \ - 37,38, 39, 40, \ -/*r12,r15,r14,r13*/ \ - 41, 44, 43, 42, \ -/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ - 21, 22, 23, 24, 25, 26, 27, 28, \ -/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/ \ - 45, 46, 47, 48, 49, 50, 51, 52, \ -/*st,st1,st2,st3,st4,st5,st6,st7*/ \ - 8, 9, 10, 11, 12, 13, 14, 15, \ -/*,arg,cc,fpsr,dir,frame*/ \ - 16,17, 18, 19, 20, \ -/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \ - 29, 30, 31, 32, 33, 34, 35, 36 } /* Macro to conditionally modify fixed_regs/call_used_regs. */ #define CONDITIONAL_REGISTER_USAGE \ @@ -969,7 +958,7 @@ do { \ call_used_regs[i] = (call_used_regs[i] \ & (TARGET_64BIT ? 2 : 1)) != 0; \ } \ - if (flag_pic) \ + if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \ { \ fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ @@ -1145,11 +1134,11 @@ do { \ #define STATIC_CHAIN_REGNUM (TARGET_64BIT ? FIRST_REX_INT_REG + 10 - 8 : 2) /* Register to hold the addressing base for position independent - code access to data items. - We don't use PIC pointer for 64bit mode. Define the regnum to - dummy value to prevent gcc from pessimizing code dealing with EBX. - */ -#define PIC_OFFSET_TABLE_REGNUM (TARGET_64BIT ? INVALID_REGNUM : 3) + code access to data items. We don't use PIC pointer for 64bit + mode. Define the regnum to dummy value to prevent gcc from + pessimizing code dealing with EBX. */ +#define PIC_OFFSET_TABLE_REGNUM \ + (TARGET_64BIT || !flag_pic ? INVALID_REGNUM : 3) /* Register in which address to store a structure value arrives in the function. On the 386, the prologue @@ -1347,7 +1336,7 @@ enum reg_class #define SSE_REG_P(N) (REG_P (N) && SSE_REGNO_P (REGNO (N))) #define SSE_FLOAT_MODE_P(MODE) \ - ((TARGET_SSE_MATH && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode)) + ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode)) #define MMX_REGNO_P(N) ((N) >= FIRST_MMX_REG && (N) <= LAST_MMX_REG) #define MMX_REG_P(XOP) (REG_P (XOP) && MMX_REGNO_P (REGNO (XOP))) @@ -2360,7 +2349,7 @@ do { \ /* When a prototype says `char' or `short', really pass an `int'. (The 386 can't easily push less than an int.) */ -#define PROMOTE_PROTOTYPES 1 +#define PROMOTE_PROTOTYPES (!TARGET_64BIT) /* A macro to update M and UNSIGNEDP when an object whose type is TYPE and which has the specified mode and signedness is to be |