diff options
Diffstat (limited to 'contrib/llvm-project/clang/include/clang/Basic')
150 files changed, 23371 insertions, 7562 deletions
diff --git a/contrib/llvm-project/clang/include/clang/Basic/AArch64SVEACLETypes.def b/contrib/llvm-project/clang/include/clang/Basic/AArch64SVEACLETypes.def index b98a07436e94..fa9c1ac0491c 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/AArch64SVEACLETypes.def +++ b/contrib/llvm-project/clang/include/clang/Basic/AArch64SVEACLETypes.def @@ -49,6 +49,11 @@ SVE_TYPE(Name, Id, SingletonId) #endif +#ifndef SVE_OPAQUE_TYPE +#define SVE_OPAQUE_TYPE(Name, MangledName, Id, SingletonId) \ + SVE_TYPE(Name, Id, SingletonId) +#endif + //===- Vector point types -----------------------------------------------===// @@ -66,7 +71,7 @@ SVE_VECTOR_TYPE("__SVFloat16_t", "__SVFloat16_t", SveFloat16, SveFloat16Ty, 8, 1 SVE_VECTOR_TYPE("__SVFloat32_t", "__SVFloat32_t", SveFloat32, SveFloat32Ty, 4, 32, true, true, false) SVE_VECTOR_TYPE("__SVFloat64_t", "__SVFloat64_t", SveFloat64, SveFloat64Ty, 2, 64, true, true, false) -SVE_VECTOR_TYPE("__SVBFloat16_t", "__SVBFloat16_t", SveBFloat16, SveBFloat16Ty, 8, 16, true, false, true) +SVE_VECTOR_TYPE("__SVBfloat16_t", "__SVBfloat16_t", SveBFloat16, SveBFloat16Ty, 8, 16, true, false, true) // // x2 @@ -124,7 +129,12 @@ SVE_VECTOR_TYPE("__clang_svfloat64x4_t", "svfloat64x4_t", SveFloat64x4, SveFloat SVE_VECTOR_TYPE("__clang_svbfloat16x4_t", "svbfloat16x4_t", SveBFloat16x4, SveBFloat16x4Ty, 32, 16, true, false, true) SVE_PREDICATE_TYPE("__SVBool_t", "__SVBool_t", SveBool, SveBoolTy, 16) +SVE_PREDICATE_TYPE("__clang_svboolx2_t", "svboolx2_t", SveBoolx2, SveBoolx2Ty, 32) +SVE_PREDICATE_TYPE("__clang_svboolx4_t", "svboolx4_t", SveBoolx4, SveBoolx4Ty, 64) + +SVE_OPAQUE_TYPE("__SVCount_t", "__SVCount_t", SveCount, SveCountTy) #undef SVE_VECTOR_TYPE #undef SVE_PREDICATE_TYPE +#undef SVE_OPAQUE_TYPE #undef SVE_TYPE diff --git a/contrib/llvm-project/clang/include/clang/Basic/AddressSpaces.h b/contrib/llvm-project/clang/include/clang/Basic/AddressSpaces.h index 99bb67fd26d1..7b723d508fff 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/AddressSpaces.h +++ b/contrib/llvm-project/clang/include/clang/Basic/AddressSpaces.h @@ -56,6 +56,12 @@ enum class LangAS : unsigned { ptr32_uptr, ptr64, + // HLSL specific address spaces. + hlsl_groupshared, + + // Wasm specific address spaces. + wasm_funcref, + // This denotes the count of language-specific address spaces and also // the offset added to the target-specific address spaces, which are usually // specified by address space attributes __attribute__(address_space(n))). diff --git a/contrib/llvm-project/clang/include/clang/Basic/AlignedAllocation.h b/contrib/llvm-project/clang/include/clang/Basic/AlignedAllocation.h index ab9f19da5d59..ac26eb4a276d 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/AlignedAllocation.h +++ b/contrib/llvm-project/clang/include/clang/Basic/AlignedAllocation.h @@ -12,12 +12,12 @@ /// //===----------------------------------------------------------------------===// -#ifndef LLVM_CLANG_BASIC_ALIGNED_ALLOCATION_H -#define LLVM_CLANG_BASIC_ALIGNED_ALLOCATION_H +#ifndef LLVM_CLANG_BASIC_ALIGNEDALLOCATION_H +#define LLVM_CLANG_BASIC_ALIGNEDALLOCATION_H -#include "llvm/ADT/Triple.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/VersionTuple.h" +#include "llvm/TargetParser/Triple.h" namespace clang { @@ -26,8 +26,8 @@ inline llvm::VersionTuple alignedAllocMinVersion(llvm::Triple::OSType OS) { default: break; case llvm::Triple::Darwin: - case llvm::Triple::MacOSX: // Earliest supporting version is 10.14. - return llvm::VersionTuple(10U, 14U); + case llvm::Triple::MacOSX: // Earliest supporting version is 10.13. + return llvm::VersionTuple(10U, 13U); case llvm::Triple::IOS: case llvm::Triple::TvOS: // Earliest supporting version is 11.0.0. return llvm::VersionTuple(11U); @@ -42,4 +42,4 @@ inline llvm::VersionTuple alignedAllocMinVersion(llvm::Triple::OSType OS) { } // end namespace clang -#endif // LLVM_CLANG_BASIC_ALIGNED_ALLOCATION_H +#endif // LLVM_CLANG_BASIC_ALIGNEDALLOCATION_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/Attr.td b/contrib/llvm-project/clang/include/clang/Basic/Attr.td index 12d09181a2ea..dbf2dd2120fb 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Attr.td +++ b/contrib/llvm-project/clang/include/clang/Basic/Attr.td @@ -19,10 +19,19 @@ def DocCatType : DocumentationCategory<"Type Attributes">; def DocCatStmt : DocumentationCategory<"Statement Attributes">; def DocCatDecl : DocumentationCategory<"Declaration Attributes">; -// Attributes listed under the Undocumented category do not generate any public -// documentation. Ideally, this category should be used for internal-only -// attributes which contain no spellings. -def DocCatUndocumented : DocumentationCategory<"Undocumented">; +// This category is for attributes which have not yet been properly documented, +// but should be. +def DocCatUndocumented : DocumentationCategory<"Undocumented"> { + let Content = [{ +This section lists attributes which are recognized by Clang, but which are +currently missing documentation. +}]; +} + +// Attributes listed under the InternalOnly category do not generate any entry +// in the documentation. This category should be used only when we _want_ +// to not document the attribute, e.g. if the attribute has no spellings. +def DocCatInternalOnly : DocumentationCategory<"InternalOnly">; class DocDeprecated<string replacement = ""> { // If the Replacement field is empty, no replacement will be listed with the @@ -48,11 +57,17 @@ class Documentation { DocDeprecated Deprecated; } -// Specifies that the attribute is explicitly undocumented. This can be a -// helpful placeholder for the attribute while working on the implementation, -// but should not be used once feature work has been completed. +// Specifies that the attribute is explicitly omitted from the documentation, +// because it is not intended to be user-facing. +def InternalOnly : Documentation { + let Category = DocCatInternalOnly; +} + +// Specifies that the attribute is undocumented, but that it _should_ have +// documentation. def Undocumented : Documentation { let Category = DocCatUndocumented; + let Content = "No documentation."; } include "clang/Basic/AttrDocs.td" @@ -92,6 +107,10 @@ def NonBitField : SubsetSubject<Field, [{!S->isBitField()}], "non-bit-field non-static data members">; +def BitField : SubsetSubject<Field, + [{S->isBitField()}], + "bit-field data members">; + def NonStaticCXXMethod : SubsetSubject<CXXMethod, [{!S->isStatic()}], "non-static member functions">; @@ -118,6 +137,17 @@ def SharedVar : SubsetSubject<Var, def GlobalVar : SubsetSubject<Var, [{S->hasGlobalStorage()}], "global variables">; +def ExternalGlobalVar : SubsetSubject<Var, + [{S->hasGlobalStorage() && + S->getStorageClass()!=StorageClass::SC_Static && + !S->isLocalExternDecl()}], + "external global variables">; + +def NonTLSGlobalVar : SubsetSubject<Var, + [{S->hasGlobalStorage() && + S->getTLSKind() == 0}], + "non-TLS global variables">; + def InlineFunction : SubsetSubject<Function, [{S->isInlineSpecified()}], "inline functions">; @@ -126,6 +156,14 @@ def FunctionTmpl FunctionDecl::TK_FunctionTemplate}], "function templates">; +def HLSLEntry + : SubsetSubject<Function, + [{S->isExternallyVisible() && !isa<CXXMethodDecl>(S)}], + "global functions">; +def HLSLBufferObj : SubsetSubject<HLSLBuffer, + [{isa<HLSLBufferDecl>(S)}], + "cbuffer/tbuffer">; + def ClassTmpl : SubsetSubject<CXXRecord, [{S->getDescribedClassTemplate()}], "class templates">; @@ -139,6 +177,12 @@ def FunctionLike : SubsetSubject<DeclBase, [{S->getFunctionType(false) != nullptr}], "functions, function pointers">; +// Function Pointer is a stricter version of FunctionLike that only allows function +// pointers. +def FunctionPointer : SubsetSubject<DeclBase, + [{S->isFunctionPointerType()}], + "functions pointers">; + def OpenCLKernelFunction : SubsetSubject<Function, [{S->hasAttr<OpenCLKernelAttr>()}], "kernel functions">; @@ -201,6 +245,7 @@ class DeclArgument<DeclNode kind, string name, bit opt = 0, bit fake = 0> // OMPTraitProperty := {Kind} // class OMPTraitInfoArgument<string name> : Argument<name, 0>; +class VariadicOMPInteropInfoArgument<string name> : Argument<name, 0>; class TypeArgument<string name, bit opt = 0> : Argument<name, opt>; class UnsignedArgument<string name, bit opt = 0> : Argument<name, opt>; @@ -237,64 +282,91 @@ class DefaultIntArgument<string name, int default> : IntArgument<name, 1> { int Default = default; } -// This argument is more complex, it includes the enumerator type name, -// a list of strings to accept, and a list of enumerators to map them to. +// This argument is more complex, it includes the enumerator type +// name, whether the enum type is externally defined, a list of +// strings to accept, and a list of enumerators to map them to. class EnumArgument<string name, string type, list<string> values, - list<string> enums, bit opt = 0, bit fake = 0> + list<string> enums, bit opt = 0, bit fake = 0, + bit isExternalType = 0> : Argument<name, opt, fake> { string Type = type; list<string> Values = values; list<string> Enums = enums; + bit IsExternalType = isExternalType; } // FIXME: There should be a VariadicArgument type that takes any other type // of argument and generates the appropriate type. class VariadicEnumArgument<string name, string type, list<string> values, - list<string> enums> : Argument<name, 1> { + list<string> enums, bit isExternalType = 0> + : Argument<name, 1> { string Type = type; list<string> Values = values; list<string> Enums = enums; + bit IsExternalType = isExternalType; } +// Represents an attribute wrapped by another attribute. +class WrappedAttr<string name, bit opt = 0> : Argument<name, opt>; + // This handles one spelling of an attribute. -class Spelling<string name, string variety> { +class Spelling<string name, string variety, int version = 1> { string Name = name; string Variety = variety; + int Version = version; } class GNU<string name> : Spelling<name, "GNU">; -class Declspec<string name> : Spelling<name, "Declspec">; +class Declspec<string name> : Spelling<name, "Declspec"> { + bit PrintOnLeft = 1; +} class Microsoft<string name> : Spelling<name, "Microsoft">; class CXX11<string namespace, string name, int version = 1> - : Spelling<name, "CXX11"> { + : Spelling<name, "CXX11", version> { + bit CanPrintOnLeft = 0; string Namespace = namespace; - int Version = version; } -class C2x<string namespace, string name, int version = 1> - : Spelling<name, "C2x"> { +class C23<string namespace, string name, int version = 1> + : Spelling<name, "C23", version> { string Namespace = namespace; - int Version = version; } -class Keyword<string name> : Spelling<name, "Keyword">; +class Keyword<string name, bit hasOwnParseRules> + : Spelling<name, "Keyword"> { + bit HasOwnParseRules = hasOwnParseRules; +} + +// A keyword that can appear wherever a standard attribute can appear, +// and that appertains to whatever a standard attribute would appertain to. +// This is useful for things that affect semantics but that should otherwise +// be treated like standard attributes. +class RegularKeyword<string name> : Keyword<name, 0> {} + +// A keyword that has its own individual parsing rules. +class CustomKeyword<string name> : Keyword<name, 1> {} + class Pragma<string namespace, string name> : Spelling<name, "Pragma"> { string Namespace = namespace; } // The GCC spelling implies GNU<name>, CXX11<"gnu", name>, and optionally, -// C2x<"gnu", name>. This spelling should be used for any GCC-compatible +// C23<"gnu", name>. This spelling should be used for any GCC-compatible // attributes. class GCC<string name, bit allowInC = 1> : Spelling<name, "GCC"> { bit AllowInC = allowInC; } // The Clang spelling implies GNU<name>, CXX11<"clang", name>, and optionally, -// C2x<"clang", name>. This spelling should be used for any Clang-specific +// C23<"clang", name>. This spelling should be used for any Clang-specific // attributes. -class Clang<string name, bit allowInC = 1> : Spelling<name, "Clang"> { +class Clang<string name, bit allowInC = 1, int version = 1> + : Spelling<name, "Clang", version> { bit AllowInC = allowInC; } +// HLSL Semantic spellings +class HLSLSemantic<string name> : Spelling<name, "HLSLSemantic">; + class Accessor<string name, list<Spelling> spellings> { string Name = name; list<Spelling> Spellings = spellings; @@ -336,6 +408,8 @@ def ObjCAutoRefCount : LangOpt<"ObjCAutoRefCount">; def ObjCNonFragileRuntime : LangOpt<"", "LangOpts.ObjCRuntime.allowsClassStubs()">; +def HLSL : LangOpt<"HLSL">; + // Language option for CMSE extensions def Cmse : LangOpt<"Cmse">; @@ -361,10 +435,11 @@ class TargetArch<list<string> arches> : TargetSpec { let Arches = arches; } def TargetARM : TargetArch<["arm", "thumb", "armeb", "thumbeb"]>; -def TargetAArch64 : TargetArch<["aarch64"]>; +def TargetAArch64 : TargetArch<["aarch64", "aarch64_be", "aarch64_32"]>; def TargetAnyArm : TargetArch<!listconcat(TargetARM.Arches, TargetAArch64.Arches)>; def TargetAVR : TargetArch<["avr"]>; def TargetBPF : TargetArch<["bpfel", "bpfeb"]>; +def TargetLoongArch : TargetArch<["loongarch32", "loongarch64"]>; def TargetMips32 : TargetArch<["mips", "mipsel"]>; def TargetAnyMips : TargetArch<["mips", "mipsel", "mips64", "mips64el"]>; def TargetMSP430 : TargetArch<["msp430"]>; @@ -373,6 +448,10 @@ def TargetRISCV : TargetArch<["riscv32", "riscv64"]>; def TargetX86 : TargetArch<["x86"]>; def TargetAnyX86 : TargetArch<["x86", "x86_64"]>; def TargetWebAssembly : TargetArch<["wasm32", "wasm64"]>; +def TargetNVPTX : TargetArch<["nvptx", "nvptx64"]>; +def TargetWindows : TargetSpec { + let OSes = ["Win32"]; +} def TargetHasDLLImportExport : TargetSpec { let CustomCode = [{ Target.getTriple().hasDLLImportExport() }]; } @@ -385,10 +464,19 @@ def TargetMicrosoftCXXABI : TargetArch<["x86", "x86_64", "arm", "thumb", "aarch6 def TargetELF : TargetSpec { let ObjectFormats = ["ELF"]; } +def TargetELFOrMachO : TargetSpec { + let ObjectFormats = ["ELF", "MachO"]; +} def TargetSupportsInitPriority : TargetSpec { let CustomCode = [{ !Target.getTriple().isOSzOS() }]; } + +class TargetSpecificSpelling<TargetSpec target, list<Spelling> spellings> { + TargetSpec Target = target; + list<Spelling> Spellings = spellings; +} + // Attribute subject match rules that are used for #pragma clang attribute. // // A instance of AttrSubjectMatcherRule represents an individual match rule. @@ -501,6 +589,12 @@ class AttrSubjectMatcherAggregateRule<AttrSubject subject> { def SubjectMatcherForNamed : AttrSubjectMatcherAggregateRule<Named>; class Attr { + // Specifies that when printed, this attribute is meaningful on the + // 'left side' of the declaration. + bit CanPrintOnLeft = 1; + // Specifies that when printed, this attribute is required to be printed on + // the 'left side' of the declaration. + bit PrintOnLeft = 0; // The various ways in which an attribute can be spelled in source list<Spelling> Spellings; // The things to which an attribute can appertain @@ -509,6 +603,8 @@ class Attr { list<Argument> Args = []; // Accessors which should be generated for the attribute. list<Accessor> Accessors = []; + // Specify targets for spellings. + list<TargetSpecificSpelling> TargetSpecificSpellings = []; // Set to true for attributes with arguments which require delayed parsing. bit LateParsed = 0; // Set to false to prevent an attribute from being propagated from a template @@ -541,6 +637,8 @@ class Attr { // match rules. // - It has GNU/CXX11 spelling and doesn't require delayed parsing. bit PragmaAttributeSupport; + // Set to true if this attribute accepts parameter pack expansion expressions. + bit AcceptsExprPack = 0; // Lists language options, one of which is required to be true for the // attribute to be applicable. If empty, no language options are required. list<LangOpt> LangOpts = []; @@ -580,6 +678,9 @@ class DeclOrTypeAttr : InheritableAttr; /// A attribute is either a declaration attribute or a statement attribute. class DeclOrStmtAttr : InheritableAttr; +/// An attribute class for HLSL Annotations. +class HLSLAnnotationAttr : InheritableAttr; + /// A target-specific attribute. This class is meant to be used as a mixin /// with InheritableAttr or Attr depending on the attribute's needs. class TargetSpecificAttr<TargetSpec target> { @@ -614,7 +715,7 @@ class IgnoredAttr : Attr { let Ignored = 1; let ASTNode = 0; let SemaHandler = 0; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } // @@ -644,7 +745,7 @@ def Alias : Attr { def BuiltinAlias : Attr { let Spellings = [CXX11<"clang", "builtin_alias">, - C2x<"clang", "builtin_alias">, + C23<"clang", "builtin_alias">, GNU<"clang_builtin_alias">]; let Args = [IdentifierArgument<"BuiltinName">]; let Subjects = SubjectList<[Function], ErrorDiag>; @@ -659,13 +760,13 @@ def ArmBuiltinAlias : InheritableAttr, TargetSpecificAttr<TargetAnyArm> { } def Aligned : InheritableAttr { - let Spellings = [GCC<"aligned">, Declspec<"align">, Keyword<"alignas">, - Keyword<"_Alignas">]; + let Spellings = [GCC<"aligned">, Declspec<"align">, CustomKeyword<"alignas">, + CustomKeyword<"_Alignas">]; let Args = [AlignedArgument<"Alignment", 1>]; let Accessors = [Accessor<"isGNU", [GCC<"aligned">]>, - Accessor<"isC11", [Keyword<"_Alignas">]>, - Accessor<"isAlignas", [Keyword<"alignas">, - Keyword<"_Alignas">]>, + Accessor<"isC11", [CustomKeyword<"_Alignas">]>, + Accessor<"isAlignas", [CustomKeyword<"alignas">, + CustomKeyword<"_Alignas">]>, Accessor<"isDeclspec",[Declspec<"align">]>]; let Documentation = [Undocumented]; } @@ -694,19 +795,23 @@ def AlignMac68k : InheritableAttr { // This attribute has no spellings as it is only ever created implicitly. let Spellings = []; let SemaHandler = 0; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def AlignNatural : InheritableAttr { // This attribute has no spellings as it is only ever created implicitly. let Spellings = []; let SemaHandler = 0; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } -def AlwaysInline : InheritableAttr { - let Spellings = [GCC<"always_inline">, Keyword<"__forceinline">]; - let Subjects = SubjectList<[Function]>; +def AlwaysInline : DeclOrStmtAttr { + let Spellings = [GCC<"always_inline">, CXX11<"clang", "always_inline">, + C23<"clang", "always_inline">, CustomKeyword<"__forceinline">]; + let Accessors = [Accessor<"isClangAlwaysInline", [CXX11<"clang", "always_inline">, + C23<"clang", "always_inline">]>]; + let Subjects = SubjectList<[Function, Stmt], WarnDiag, + "functions and statements">; let Documentation = [AlwaysInlineDocs]; } @@ -745,7 +850,8 @@ def XRayLogArgs : InheritableAttr { def PatchableFunctionEntry : InheritableAttr, TargetSpecificAttr<TargetArch< - ["aarch64", "aarch64_be", "riscv32", "riscv64", "x86", "x86_64"]>> { + ["aarch64", "aarch64_be", "loongarch32", "loongarch64", "riscv32", + "riscv64", "x86", "x86_64"]>> { let Spellings = [GCC<"patchable_function_entry">]; let Subjects = SubjectList<[Function, ObjCMethod]>; let Args = [UnsignedArgument<"Count">, DefaultIntArgument<"Offset", 0>]; @@ -779,14 +885,23 @@ def Annotate : InheritableParamAttr { return AnnotateAttr::Create(Ctx, Annotation, nullptr, 0, CommonInfo); } static AnnotateAttr *CreateImplicit(ASTContext &Ctx, llvm::StringRef Annotation, \ - const AttributeCommonInfo &CommonInfo = {SourceRange{}}) { + const AttributeCommonInfo &CommonInfo) { return AnnotateAttr::CreateImplicit(Ctx, Annotation, nullptr, 0, CommonInfo); } }]; let PragmaAttributeSupport = 1; + let AcceptsExprPack = 1; let Documentation = [Undocumented]; } +def AnnotateType : TypeAttr { + let Spellings = [CXX11<"clang", "annotate_type">, C23<"clang", "annotate_type">]; + let Args = [StringArgument<"Annotation">, VariadicExprArgument<"Args">]; + let HasCustomParsing = 1; + let AcceptsExprPack = 1; + let Documentation = [AnnotateTypeDocs]; +} + def ARMInterrupt : InheritableAttr, TargetSpecificAttr<TargetARM> { // NOTE: If you add any additional spellings, M68kInterrupt's, // MSP430Interrupt's, MipsInterrupt's and AnyX86Interrupt's spellings @@ -815,7 +930,8 @@ def AVRSignal : InheritableAttr, TargetSpecificAttr<TargetAVR> { } def AsmLabel : InheritableAttr { - let Spellings = [Keyword<"asm">, Keyword<"__asm__">]; + let CanPrintOnLeft = 0; + let Spellings = [CustomKeyword<"asm">, CustomKeyword<"__asm__">]; let Args = [ // Label specifies the mangled name for the decl. StringArgument<"Label">, @@ -848,10 +964,12 @@ def Availability : InheritableAttr { [{static llvm::StringRef getPrettyPlatformName(llvm::StringRef Platform) { return llvm::StringSwitch<llvm::StringRef>(Platform) .Case("android", "Android") + .Case("fuchsia", "Fuchsia") .Case("ios", "iOS") .Case("macos", "macOS") .Case("tvos", "tvOS") .Case("watchos", "watchOS") + .Case("driverkit", "DriverKit") .Case("ios_app_extension", "iOS (App Extension)") .Case("macos_app_extension", "macOS (App Extension)") .Case("tvos_app_extension", "tvOS (App Extension)") @@ -859,6 +977,8 @@ def Availability : InheritableAttr { .Case("maccatalyst", "macCatalyst") .Case("maccatalyst_app_extension", "macCatalyst (App Extension)") .Case("swift", "Swift") + .Case("shadermodel", "HLSL ShaderModel") + .Case("ohos", "OpenHarmony OS") .Default(llvm::StringRef()); } static llvm::StringRef getPlatformNameSourceSpelling(llvm::StringRef Platform) { @@ -874,6 +994,7 @@ static llvm::StringRef getPlatformNameSourceSpelling(llvm::StringRef Platform) { .Case("maccatalyst", "macCatalyst") .Case("maccatalyst_app_extension", "macCatalystApplicationExtension") .Case("zos", "z/OS") + .Case("shadermodel", "ShaderModel") .Default(Platform); } static llvm::StringRef canonicalizePlatformName(llvm::StringRef Platform) { @@ -888,6 +1009,7 @@ static llvm::StringRef canonicalizePlatformName(llvm::StringRef Platform) { .Case("watchOSApplicationExtension", "watchos_app_extension") .Case("macCatalyst", "maccatalyst") .Case("macCatalystApplicationExtension", "maccatalyst_app_extension") + .Case("ShaderModel", "shadermodel") .Default(Platform); } }]; let HasCustomParsing = 1; @@ -897,10 +1019,12 @@ static llvm::StringRef canonicalizePlatformName(llvm::StringRef Platform) { } def ExternalSourceSymbol : InheritableAttr { - let Spellings = [Clang<"external_source_symbol">]; + let Spellings = [Clang<"external_source_symbol", /*allowInC=*/1, + /*version=*/20230206>]; let Args = [StringArgument<"language", 1>, StringArgument<"definedIn", 1>, - BoolArgument<"generatedDeclaration", 1>]; + BoolArgument<"generatedDeclaration", 1>, + StringArgument<"USR", 1>]; let HasCustomParsing = 1; let Subjects = SubjectList<[Named]>; let Documentation = [ExternalSourceSymbolDocs]; @@ -925,7 +1049,7 @@ def CarriesDependency : InheritableParamAttr { } def CDecl : DeclOrTypeAttr { - let Spellings = [GCC<"cdecl">, Keyword<"__cdecl">, Keyword<"_cdecl">]; + let Spellings = [GCC<"cdecl">, CustomKeyword<"__cdecl">, CustomKeyword<"_cdecl">]; // let Subjects = [Function, ObjCMethod]; let Documentation = [Undocumented]; } @@ -970,6 +1094,50 @@ def CFConsumed : InheritableParamAttr { let Documentation = [RetainBehaviorDocs]; } + +// coro_only_destroy_when_complete indicates the coroutines whose return type +// is marked by coro_only_destroy_when_complete can only be destroyed when the +// coroutine completes. Then the space for the destroy functions can be saved. +def CoroOnlyDestroyWhenComplete : InheritableAttr { + let Spellings = [Clang<"coro_only_destroy_when_complete">]; + let Subjects = SubjectList<[CXXRecord]>; + let LangOpts = [CPlusPlus]; + let Documentation = [CoroOnlyDestroyWhenCompleteDocs]; + let SimpleHandler = 1; +} + +def CoroReturnType : InheritableAttr { + let Spellings = [Clang<"coro_return_type">]; + let Subjects = SubjectList<[CXXRecord]>; + let LangOpts = [CPlusPlus]; + let Documentation = [CoroReturnTypeAndWrapperDoc]; + let SimpleHandler = 1; +} + +def CoroWrapper : InheritableAttr { + let Spellings = [Clang<"coro_wrapper">]; + let Subjects = SubjectList<[Function]>; + let LangOpts = [CPlusPlus]; + let Documentation = [CoroReturnTypeAndWrapperDoc]; + let SimpleHandler = 1; +} + +def CoroLifetimeBound : InheritableAttr { + let Spellings = [Clang<"coro_lifetimebound">]; + let Subjects = SubjectList<[CXXRecord]>; + let LangOpts = [CPlusPlus]; + let Documentation = [CoroLifetimeBoundDoc]; + let SimpleHandler = 1; +} + +def CoroDisableLifetimeBound : InheritableAttr { + let Spellings = [Clang<"coro_disable_lifetimebound">]; + let Subjects = SubjectList<[Function]>; + let LangOpts = [CPlusPlus]; + let Documentation = [CoroLifetimeBoundDoc]; + let SimpleHandler = 1; +} + // OSObject-based attributes. def OSConsumed : InheritableParamAttr { let Spellings = [Clang<"os_consumed">]; @@ -1012,7 +1180,7 @@ def Cleanup : InheritableAttr { let Spellings = [GCC<"cleanup">]; let Args = [DeclArgument<Function, "FunctionDecl">]; let Subjects = SubjectList<[LocalVar]>; - let Documentation = [Undocumented]; + let Documentation = [CleanupDocs]; } def CmseNSEntry : InheritableAttr, TargetSpecificAttr<TargetARM> { @@ -1031,7 +1199,7 @@ def CmseNSCall : TypeAttr, TargetSpecificAttr<TargetARM> { def Cold : InheritableAttr { let Spellings = [GCC<"cold">]; let Subjects = SubjectList<[Function]>; - let Documentation = [Undocumented]; + let Documentation = [ColdFunctionEntryDocs]; let SimpleHandler = 1; } @@ -1050,10 +1218,10 @@ def Const : InheritableAttr { def ConstInit : InheritableAttr { // This attribute does not have a C [[]] spelling because it requires the // CPlusPlus language option. - let Spellings = [Keyword<"constinit">, + let Spellings = [CustomKeyword<"constinit">, Clang<"require_constant_initialization", 0>]; let Subjects = SubjectList<[GlobalVar], ErrorDiag>; - let Accessors = [Accessor<"isConstinit", [Keyword<"constinit">]>]; + let Accessors = [Accessor<"isConstinit", [CustomKeyword<"constinit">]>]; let Documentation = [ConstInitDocs]; let LangOpts = [CPlusPlus]; let SimpleHandler = 1; @@ -1063,7 +1231,7 @@ def Constructor : InheritableAttr { let Spellings = [GCC<"constructor">]; let Args = [DefaultIntArgument<"Priority", 65535>]; let Subjects = SubjectList<[Function]>; - let Documentation = [Undocumented]; + let Documentation = [CtorDtorDocs]; } def CPUSpecific : InheritableAttr { @@ -1150,6 +1318,12 @@ def CUDAHost : InheritableAttr { } def : MutualExclusions<[CUDAGlobal, CUDAHost]>; +def NVPTXKernel : InheritableAttr, TargetSpecificAttr<TargetNVPTX> { + let Spellings = [Clang<"nvptx_kernel">]; + let Subjects = SubjectList<[Function]>; + let Documentation = [Undocumented]; +} + def HIPManaged : InheritableAttr { let Spellings = [GNU<"managed">, Declspec<"__managed__">]; let Subjects = SubjectList<[Var]>; @@ -1161,12 +1335,13 @@ def CUDAInvalidTarget : InheritableAttr { let Spellings = []; let Subjects = SubjectList<[Function]>; let LangOpts = [CUDA]; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def CUDALaunchBounds : InheritableAttr { let Spellings = [GNU<"launch_bounds">, Declspec<"__launch_bounds__">]; - let Args = [ExprArgument<"MaxThreads">, ExprArgument<"MinBlocks", 1>]; + let Args = [ExprArgument<"MaxThreads">, ExprArgument<"MinBlocks", 1>, + ExprArgument<"MaxBlocks", 1>]; let LangOpts = [CUDA]; let Subjects = SubjectList<[ObjCMethod, FunctionLike]>; // An AST node is created for this attribute, but is not used by other parts @@ -1190,24 +1365,31 @@ def SYCLKernel : InheritableAttr { let Documentation = [SYCLKernelDocs]; } +def SYCLSpecialClass: InheritableAttr { + let Spellings = [Clang<"sycl_special_class">]; + let Subjects = SubjectList<[CXXRecord]>; + let LangOpts = [SYCL]; + let Documentation = [SYCLSpecialClassDocs]; +} + def C11NoReturn : InheritableAttr { - let Spellings = [Keyword<"_Noreturn">]; + let Spellings = [CustomKeyword<"_Noreturn">]; let Subjects = SubjectList<[Function], ErrorDiag>; let SemaHandler = 0; let Documentation = [C11NoReturnDocs]; } def CXX11NoReturn : InheritableAttr { - let Spellings = [CXX11<"", "noreturn", 200809>]; + let Spellings = [CXX11<"", "noreturn", 200809>, + C23<"", "noreturn", 202202>, C23<"", "_Noreturn", 202202>]; let Subjects = SubjectList<[Function], ErrorDiag>; let Documentation = [CXX11NoReturnDocs]; - let SimpleHandler = 1; } // Similar to CUDA, OpenCL attributes do not receive a [[]] spelling because // the specification does not expose them with one currently. def OpenCLKernel : InheritableAttr { - let Spellings = [Keyword<"__kernel">, Keyword<"kernel">]; + let Spellings = [CustomKeyword<"__kernel">, CustomKeyword<"kernel">]; let Subjects = SubjectList<[Function], ErrorDiag>; let Documentation = [Undocumented]; let SimpleHandler = 1; @@ -1231,26 +1413,28 @@ def OpenCLIntelReqdSubGroupSize: InheritableAttr { // This attribute is both a type attribute, and a declaration attribute (for // parameter variables). def OpenCLAccess : Attr { - let Spellings = [Keyword<"__read_only">, Keyword<"read_only">, - Keyword<"__write_only">, Keyword<"write_only">, - Keyword<"__read_write">, Keyword<"read_write">]; + let Spellings = [CustomKeyword<"__read_only">, CustomKeyword<"read_only">, + CustomKeyword<"__write_only">, CustomKeyword<"write_only">, + CustomKeyword<"__read_write">, CustomKeyword<"read_write">]; let Subjects = SubjectList<[ParmVar, TypedefName], ErrorDiag>; - let Accessors = [Accessor<"isReadOnly", [Keyword<"__read_only">, - Keyword<"read_only">]>, - Accessor<"isReadWrite", [Keyword<"__read_write">, - Keyword<"read_write">]>, - Accessor<"isWriteOnly", [Keyword<"__write_only">, - Keyword<"write_only">]>]; + let Accessors = [Accessor<"isReadOnly", [CustomKeyword<"__read_only">, + CustomKeyword<"read_only">]>, + Accessor<"isReadWrite", [CustomKeyword<"__read_write">, + CustomKeyword<"read_write">]>, + Accessor<"isWriteOnly", [CustomKeyword<"__write_only">, + CustomKeyword<"write_only">]>]; let Documentation = [OpenCLAccessDocs]; } def OpenCLPrivateAddressSpace : TypeAttr { - let Spellings = [Keyword<"__private">, Keyword<"private">, Clang<"opencl_private">]; + let Spellings = [CustomKeyword<"__private">, CustomKeyword<"private">, + Clang<"opencl_private">]; let Documentation = [OpenCLAddressSpacePrivateDocs]; } def OpenCLGlobalAddressSpace : TypeAttr { - let Spellings = [Keyword<"__global">, Keyword<"global">, Clang<"opencl_global">]; + let Spellings = [CustomKeyword<"__global">, CustomKeyword<"global">, + Clang<"opencl_global">]; let Documentation = [OpenCLAddressSpaceGlobalDocs]; } @@ -1265,17 +1449,20 @@ def OpenCLGlobalHostAddressSpace : TypeAttr { } def OpenCLLocalAddressSpace : TypeAttr { - let Spellings = [Keyword<"__local">, Keyword<"local">, Clang<"opencl_local">]; + let Spellings = [CustomKeyword<"__local">, CustomKeyword<"local">, + Clang<"opencl_local">]; let Documentation = [OpenCLAddressSpaceLocalDocs]; } def OpenCLConstantAddressSpace : TypeAttr { - let Spellings = [Keyword<"__constant">, Keyword<"constant">, Clang<"opencl_constant">]; + let Spellings = [CustomKeyword<"__constant">, CustomKeyword<"constant">, + Clang<"opencl_constant">]; let Documentation = [OpenCLAddressSpaceConstantDocs]; } def OpenCLGenericAddressSpace : TypeAttr { - let Spellings = [Keyword<"__generic">, Keyword<"generic">, Clang<"opencl_generic">]; + let Spellings = [CustomKeyword<"__generic">, CustomKeyword<"generic">, + Clang<"opencl_generic">]; let Documentation = [OpenCLAddressSpaceGenericDocs]; } @@ -1298,7 +1485,7 @@ def RenderScriptKernel : Attr { def Deprecated : InheritableAttr { let Spellings = [GCC<"deprecated">, Declspec<"deprecated">, CXX11<"","deprecated", 201309>, - C2x<"", "deprecated", 201904>]; + C23<"", "deprecated", 201904>]; let Args = [StringArgument<"Message", 1>, // An optional string argument that enables us to provide a // Fix-It. @@ -1311,7 +1498,7 @@ def Destructor : InheritableAttr { let Spellings = [GCC<"destructor">]; let Args = [DefaultIntArgument<"Priority", 65535>]; let Subjects = SubjectList<[Function]>; - let Documentation = [Undocumented]; + let Documentation = [CtorDtorDocs]; } def EmptyBases : InheritableAttr, TargetSpecificAttr<TargetMicrosoftCXXABI> { @@ -1331,6 +1518,7 @@ def AllocSize : InheritableAttr { } def EnableIf : InheritableAttr { + let CanPrintOnLeft = 0; // Does not have a [[]] spelling because this attribute requires the ability // to parse function arguments but the attribute is not written in the type // position. @@ -1356,7 +1544,7 @@ def ExtVectorType : Attr { def FallThrough : StmtAttr { let Spellings = [CXX11<"", "fallthrough", 201603>, - C2x<"", "fallthrough", 201904>, + C23<"", "fallthrough", 201910>, CXX11<"clang", "fallthrough">, GCC<"fallthrough">]; // The attribute only applies to a NullStmt, but we have special fix-it // behavior if applied to a case label. @@ -1366,12 +1554,12 @@ def FallThrough : StmtAttr { } def Likely : StmtAttr { - let Spellings = [CXX11<"", "likely", 201803>, C2x<"clang", "likely">]; + let Spellings = [CXX11<"", "likely", 201803>, C23<"clang", "likely">]; let Documentation = [LikelihoodDocs]; } def Unlikely : StmtAttr { - let Spellings = [CXX11<"", "unlikely", 201803>, C2x<"clang", "unlikely">]; + let Spellings = [CXX11<"", "unlikely", 201803>, C23<"clang", "unlikely">]; let Documentation = [LikelihoodDocs]; } def : MutualExclusions<[Likely, Unlikely]>; @@ -1379,10 +1567,8 @@ def : MutualExclusions<[Likely, Unlikely]>; def NoMerge : DeclOrStmtAttr { let Spellings = [Clang<"nomerge">]; let Documentation = [NoMergeDocs]; - let InheritEvenIfAlreadyPresent = 1; - let Subjects = SubjectList<[Function, Stmt], ErrorDiag, - "functions and statements">; - let SimpleHandler = 1; + let Subjects = SubjectList<[Function, Stmt, Var], ErrorDiag, + "functions, statements and variables">; } def MustTail : StmtAttr { @@ -1392,28 +1578,31 @@ def MustTail : StmtAttr { } def FastCall : DeclOrTypeAttr { - let Spellings = [GCC<"fastcall">, Keyword<"__fastcall">, - Keyword<"_fastcall">]; + let Spellings = [GCC<"fastcall">, CustomKeyword<"__fastcall">, + CustomKeyword<"_fastcall">]; // let Subjects = [Function, ObjCMethod]; let Documentation = [FastCallDocs]; } def RegCall : DeclOrTypeAttr { - let Spellings = [GCC<"regcall">, Keyword<"__regcall">]; + let Spellings = [GCC<"regcall">, CustomKeyword<"__regcall">]; let Documentation = [RegCallDocs]; } def Final : InheritableAttr { - let Spellings = [Keyword<"final">, Keyword<"sealed">]; - let Accessors = [Accessor<"isSpelledAsSealed", [Keyword<"sealed">]>]; + let CanPrintOnLeft = 0; + let Spellings = [CustomKeyword<"final">, CustomKeyword<"sealed">]; + let Accessors = [Accessor<"isSpelledAsSealed", [CustomKeyword<"sealed">]>]; let SemaHandler = 0; - let Documentation = [Undocumented]; + // Omitted from docs, since this is language syntax, not an attribute, as far + // as users are concerned. + let Documentation = [InternalOnly]; } def MinSize : InheritableAttr { let Spellings = [Clang<"minsize">]; let Subjects = SubjectList<[Function, ObjCMethod], ErrorDiag>; - let Documentation = [Undocumented]; + let Documentation = [MinSizeDocs]; } def FlagEnum : InheritableAttr { @@ -1469,9 +1658,7 @@ def GNUInline : InheritableAttr { def Hot : InheritableAttr { let Spellings = [GCC<"hot">]; let Subjects = SubjectList<[Function]>; - // An AST node is created for this attribute, but not actually used beyond - // semantic checking for mutual exclusion with the Cold attribute. - let Documentation = [Undocumented]; + let Documentation = [HotFunctionEntryDocs]; let SimpleHandler = 1; } def : MutualExclusions<[Hot, Cold]>; @@ -1499,7 +1686,7 @@ def IBOutletCollection : InheritableAttr { let Documentation = [Undocumented]; } -def IFunc : Attr, TargetSpecificAttr<TargetELF> { +def IFunc : Attr, TargetSpecificAttr<TargetELFOrMachO> { let Spellings = [GCC<"ifunc">]; let Args = [StringArgument<"Resolver">]; let Subjects = SubjectList<[Function]>; @@ -1549,7 +1736,7 @@ def MaxFieldAlignment : InheritableAttr { let Spellings = []; let Args = [UnsignedArgument<"Alignment">]; let SemaHandler = 0; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def MayAlias : InheritableAttr { @@ -1686,11 +1873,14 @@ def ArmMveStrictPolymorphism : TypeAttr, TargetSpecificAttr<TargetARM> { let Documentation = [ArmMveStrictPolymorphismDocs]; } -def NoUniqueAddress : InheritableAttr, TargetSpecificAttr<TargetItaniumCXXABI> { - let Spellings = [CXX11<"", "no_unique_address", 201803>]; +def NoUniqueAddress : InheritableAttr { let Subjects = SubjectList<[NonBitField], ErrorDiag>; + let Spellings = [CXX11<"", "no_unique_address", 201803>, CXX11<"msvc", "no_unique_address", 201803>]; + let TargetSpecificSpellings = [ + TargetSpecificSpelling<TargetItaniumCXXABI, [CXX11<"", "no_unique_address", 201803>]>, + TargetSpecificSpelling<TargetMicrosoftCXXABI, [CXX11<"msvc", "no_unique_address", 201803>]>, + ]; let Documentation = [NoUniqueAddressDocs]; - let SimpleHandler = 1; } def ReturnsTwice : InheritableAttr { @@ -1750,10 +1940,15 @@ def Convergent : InheritableAttr { let SimpleHandler = 1; } -def NoInline : InheritableAttr { - let Spellings = [GCC<"noinline">, Declspec<"noinline">]; - let Subjects = SubjectList<[Function]>; - let Documentation = [Undocumented]; +def NoInline : DeclOrStmtAttr { + let Spellings = [CustomKeyword<"__noinline__">, GCC<"noinline">, + CXX11<"clang", "noinline">, C23<"clang", "noinline">, + Declspec<"noinline">]; + let Accessors = [Accessor<"isClangNoInline", [CXX11<"clang", "noinline">, + C23<"clang", "noinline">]>]; + let Documentation = [NoInlineDocs]; + let Subjects = SubjectList<[Function, Stmt], WarnDiag, + "functions and statements">; let SimpleHandler = 1; } @@ -1775,13 +1970,23 @@ def RISCVInterrupt : InheritableAttr, TargetSpecificAttr<TargetRISCV> { let Spellings = [GCC<"interrupt">]; let Subjects = SubjectList<[Function]>; let Args = [EnumArgument<"Interrupt", "InterruptType", - ["user", "supervisor", "machine"], - ["user", "supervisor", "machine"], + ["supervisor", "machine"], + ["supervisor", "machine"], 1>]; let ParseKind = "Interrupt"; let Documentation = [RISCVInterruptDocs]; } +def RISCVRVVVectorBits : TypeAttr { + let Spellings = [GNU<"riscv_rvv_vector_bits">]; + let Subjects = SubjectList<[TypedefName], ErrorDiag>; + let Args = [UnsignedArgument<"NumBits">]; + let Documentation = [RISCVRVVVectorBitsDocs]; + let PragmaAttributeSupport = 0; + // Represented as VectorType instead. + let ASTNode = 0; +} + // This is not a TargetSpecificAttr so that is silently accepted and // ignored on other targets as encouraged by the OpenCL spec. // @@ -1827,6 +2032,11 @@ def AMDGPUNumVGPR : InheritableAttr { let Subjects = SubjectList<[Function], ErrorDiag, "kernel functions">; } +def AMDGPUKernelCall : DeclOrTypeAttr { + let Spellings = [Clang<"amdgpu_kernel">]; + let Documentation = [Undocumented]; +} + def BPFPreserveAccessIndex : InheritableAttr, TargetSpecificAttr<TargetBPF> { let Spellings = [Clang<"preserve_access_index">]; @@ -1835,6 +2045,30 @@ def BPFPreserveAccessIndex : InheritableAttr, let LangOpts = [COnly]; } +def BPFPreserveStaticOffset : InheritableAttr, + TargetSpecificAttr<TargetBPF> { + let Spellings = [Clang<"preserve_static_offset">]; + let Subjects = SubjectList<[Record], ErrorDiag>; + let Documentation = [BPFPreserveStaticOffsetDocs]; + let LangOpts = [COnly]; +} + +def BTFDeclTag : InheritableAttr { + let Spellings = [Clang<"btf_decl_tag">]; + let Args = [StringArgument<"BTFDeclTag">]; + let Subjects = SubjectList<[Var, Function, Record, Field, TypedefName], + ErrorDiag>; + let Documentation = [BTFDeclTagDocs]; + let LangOpts = [COnly]; +} + +def BTFTypeTag : TypeAttr { + let Spellings = [Clang<"btf_type_tag">]; + let Args = [StringArgument<"BTFTypeTag">]; + let Documentation = [BTFTypeTagDocs]; + let LangOpts = [COnly]; +} + def WebAssemblyExportName : InheritableAttr, TargetSpecificAttr<TargetWebAssembly> { let Spellings = [Clang<"export_name">]; @@ -1875,9 +2109,9 @@ def NonNull : InheritableParamAttr { bool isNonNull(unsigned IdxAST) const { if (!args_size()) return true; - return args_end() != std::find_if( - args_begin(), args_end(), - [=](const ParamIdx &Idx) { return Idx.getASTIndex() == IdxAST; }); + return llvm::any_of(args(), [=](const ParamIdx &Idx) { + return Idx.getASTIndex() == IdxAST; + }); } }]; // FIXME: We should merge duplicates into a single nonnull attribute. @@ -1911,22 +2145,22 @@ def PassObjectSize : InheritableParamAttr { // Nullability type attributes. def TypeNonNull : TypeAttr { - let Spellings = [Keyword<"_Nonnull">]; + let Spellings = [CustomKeyword<"_Nonnull">]; let Documentation = [TypeNonNullDocs]; } def TypeNullable : TypeAttr { - let Spellings = [Keyword<"_Nullable">]; + let Spellings = [CustomKeyword<"_Nullable">]; let Documentation = [TypeNullableDocs]; } def TypeNullableResult : TypeAttr { - let Spellings = [Keyword<"_Nullable_result">]; + let Spellings = [CustomKeyword<"_Nullable_result">]; let Documentation = [TypeNullableResultDocs]; } def TypeNullUnspecified : TypeAttr { - let Spellings = [Keyword<"_Null_unspecified">]; + let Spellings = [CustomKeyword<"_Null_unspecified">]; let Documentation = [TypeNullUnspecifiedDocs]; } @@ -1934,12 +2168,12 @@ def TypeNullUnspecified : TypeAttr { // ignored because ARC is not enabled. The usual representation for this // qualifier is as an ObjCOwnership attribute with Kind == "none". def ObjCInertUnsafeUnretained : TypeAttr { - let Spellings = [Keyword<"__unsafe_unretained">]; - let Documentation = [Undocumented]; + let Spellings = [CustomKeyword<"__unsafe_unretained">]; + let Documentation = [InternalOnly]; } def ObjCKindOf : TypeAttr { - let Spellings = [Keyword<"__kindof">]; + let Spellings = [CustomKeyword<"__kindof">]; let Documentation = [Undocumented]; } @@ -1949,6 +2183,13 @@ def NoEscape : Attr { let Documentation = [NoEscapeDocs]; } +def MaybeUndef : InheritableAttr { + let Spellings = [Clang<"maybe_undef">]; + let Subjects = SubjectList<[ParmVar]>; + let Documentation = [MaybeUndefDocs]; + let SimpleHandler = 1; +} + def AssumeAligned : InheritableAttr { let Spellings = [GCC<"assume_aligned">]; let Subjects = SubjectList<[ObjCMethod, Function]>; @@ -1971,7 +2212,7 @@ def NoReturn : InheritableAttr { def NoInstrumentFunction : InheritableAttr { let Spellings = [GCC<"no_instrument_function">]; - let Subjects = SubjectList<[Function]>; + let Subjects = SubjectList<[Function, ObjCMethod]>; let Documentation = [Undocumented]; let SimpleHandler = 1; } @@ -1992,18 +2233,33 @@ def NotTailCalled : InheritableAttr { def : MutualExclusions<[AlwaysInline, NotTailCalled]>; def NoStackProtector : InheritableAttr { - let Spellings = [Clang<"no_stack_protector">]; + let Spellings = [Clang<"no_stack_protector">, CXX11<"gnu", "no_stack_protector">, + C23<"gnu", "no_stack_protector">, Declspec<"safebuffers">]; let Subjects = SubjectList<[Function]>; let Documentation = [NoStackProtectorDocs]; let SimpleHandler = 1; } +def StrictGuardStackCheck : InheritableAttr { + let Spellings = [Declspec<"strict_gs_check">]; + let Subjects = SubjectList<[Function]>; + let Documentation = [StrictGuardStackCheckDocs]; + let SimpleHandler = 1; +} + def NoThrow : InheritableAttr { let Spellings = [GCC<"nothrow">, Declspec<"nothrow">]; let Subjects = SubjectList<[FunctionLike]>; let Documentation = [NoThrowDocs]; } +def NoUwtable : InheritableAttr { + let Spellings = [Clang<"nouwtable">]; + let Subjects = SubjectList<[FunctionLike]>; + let Documentation = [NoUwtableDocs]; + let SimpleHandler = 1; +} + def NvWeak : IgnoredAttr { // No Declspec spelling of this attribute; the CUDA headers use // __attribute__((nv_weak)) unconditionally. Does not receive an [[]] @@ -2039,7 +2295,7 @@ def ObjCBridgeRelated : InheritableAttr { def NSErrorDomain : InheritableAttr { let Spellings = [GNU<"ns_error_domain">]; let Subjects = SubjectList<[Enum], ErrorDiag>; - let Args = [DeclArgument<Var, "ErrorDomain">]; + let Args = [IdentifierArgument<"ErrorDomain">]; let Documentation = [NSErrorDomainDocs]; } @@ -2217,9 +2473,12 @@ def Overloadable : Attr { } def Override : InheritableAttr { - let Spellings = [Keyword<"override">]; + let CanPrintOnLeft = 0; + let Spellings = [CustomKeyword<"override">]; let SemaHandler = 0; - let Documentation = [Undocumented]; + // Omitted from docs, since this is language syntax, not an attribute, as far + // as users are concerned. + let Documentation = [InternalOnly]; } def Ownership : InheritableAttr { @@ -2268,6 +2527,74 @@ def AArch64VectorPcs: DeclOrTypeAttr { let Documentation = [AArch64VectorPcsDocs]; } +def AArch64SVEPcs: DeclOrTypeAttr { + let Spellings = [Clang<"aarch64_sve_pcs">]; + let Documentation = [AArch64SVEPcsDocs]; +} + +def ArmStreaming : TypeAttr, TargetSpecificAttr<TargetAArch64> { + let Spellings = [RegularKeyword<"__arm_streaming">]; + let Subjects = SubjectList<[HasFunctionProto], ErrorDiag>; + let Documentation = [ArmSmeStreamingDocs]; +} + +def ArmStreamingCompatible : TypeAttr, TargetSpecificAttr<TargetAArch64> { + let Spellings = [RegularKeyword<"__arm_streaming_compatible">]; + let Subjects = SubjectList<[HasFunctionProto], ErrorDiag>; + let Documentation = [ArmSmeStreamingCompatibleDocs]; +} + +def ArmNew : InheritableAttr, TargetSpecificAttr<TargetAArch64> { + let Spellings = [RegularKeyword<"__arm_new">]; + let Args = [VariadicStringArgument<"NewArgs">]; + let Subjects = SubjectList<[Function], ErrorDiag>; + let Documentation = [ArmNewDocs]; + + let AdditionalMembers = [{ + bool isNewZA() const { + return llvm::is_contained(newArgs(), "za"); + } + bool isNewZT0() const { + return llvm::is_contained(newArgs(), "zt0"); + } + }]; +} + +def ArmIn : TypeAttr, TargetSpecificAttr<TargetAArch64> { + let Spellings = [RegularKeyword<"__arm_in">]; + let Args = [VariadicStringArgument<"InArgs">]; + let Subjects = SubjectList<[HasFunctionProto], ErrorDiag>; + let Documentation = [ArmInDocs]; +} + +def ArmOut : TypeAttr, TargetSpecificAttr<TargetAArch64> { + let Spellings = [RegularKeyword<"__arm_out">]; + let Args = [VariadicStringArgument<"OutArgs">]; + let Subjects = SubjectList<[HasFunctionProto], ErrorDiag>; + let Documentation = [ArmOutDocs]; +} + +def ArmInOut : TypeAttr, TargetSpecificAttr<TargetAArch64> { + let Spellings = [RegularKeyword<"__arm_inout">]; + let Args = [VariadicStringArgument<"InOutArgs">]; + let Subjects = SubjectList<[HasFunctionProto], ErrorDiag>; + let Documentation = [ArmInOutDocs]; +} + +def ArmPreserves : TypeAttr, TargetSpecificAttr<TargetAArch64> { + let Spellings = [RegularKeyword<"__arm_preserves">]; + let Args = [VariadicStringArgument<"PreserveArgs">]; + let Subjects = SubjectList<[HasFunctionProto], ErrorDiag>; + let Documentation = [ArmPreservesDocs]; +} + +def ArmLocallyStreaming : InheritableAttr, TargetSpecificAttr<TargetAArch64> { + let Spellings = [RegularKeyword<"__arm_locally_streaming">]; + let Subjects = SubjectList<[Function], ErrorDiag>; + let Documentation = [ArmSmeLocallyStreamingDocs]; +} + + def Pure : InheritableAttr { let Spellings = [GCC<"pure">]; let Documentation = [Undocumented]; @@ -2293,6 +2620,7 @@ def SwiftAttr : InheritableAttr { let Spellings = [GNU<"swift_attr">]; let Args = [StringArgument<"Attribute">]; let Documentation = [SwiftAttrDocs]; + let PragmaAttributeSupport = 1; } def SwiftBridge : InheritableAttr { @@ -2328,6 +2656,22 @@ def SwiftError : InheritableAttr { let Documentation = [SwiftErrorDocs]; } +def SwiftImportAsNonGeneric : InheritableAttr { + // This attribute has no spellings as it is only ever created implicitly + // from API notes. + let Spellings = []; + let SemaHandler = 0; + let Documentation = [InternalOnly]; +} + +def SwiftImportPropertyAsAccessors : InheritableAttr { + // This attribute has no spellings as it is only ever created implicitly + // from API notes. + let Spellings = []; + let SemaHandler = 0; + let Documentation = [InternalOnly]; +} + def SwiftName : InheritableAttr { let Spellings = [GNU<"swift_name">]; let Args = [StringArgument<"Name">]; @@ -2349,6 +2693,31 @@ def SwiftPrivate : InheritableAttr { let SimpleHandler = 1; } +def SwiftVersionedAddition : Attr { + // This attribute has no spellings as it is only ever created implicitly + // from API notes. + let Spellings = []; + let Args = [VersionArgument<"Version">, WrappedAttr<"AdditionalAttr">, + BoolArgument<"IsReplacedByActive">]; + let SemaHandler = 0; + let Documentation = [InternalOnly]; +} + +def SwiftVersionedRemoval : Attr { + // This attribute has no spellings as it is only ever created implicitly + // from API notes. + let Spellings = []; + let Args = [VersionArgument<"Version">, UnsignedArgument<"RawKind">, + BoolArgument<"IsReplacedByActive">]; + let SemaHandler = 0; + let Documentation = [InternalOnly]; + let AdditionalMembers = [{ + attr::Kind getAttrKindToRemove() const { + return static_cast<attr::Kind>(getRawKind()); + } + }]; +} + def NoDeref : TypeAttr { let Spellings = [Clang<"noderef">]; let Documentation = [NoDerefDocs]; @@ -2402,7 +2771,7 @@ def PragmaClangBSSSection : InheritableAttr { let Spellings = []; let Args = [StringArgument<"Name">]; let Subjects = SubjectList<[GlobalVar], ErrorDiag>; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def PragmaClangDataSection : InheritableAttr { @@ -2410,7 +2779,7 @@ def PragmaClangDataSection : InheritableAttr { let Spellings = []; let Args = [StringArgument<"Name">]; let Subjects = SubjectList<[GlobalVar], ErrorDiag>; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def PragmaClangRodataSection : InheritableAttr { @@ -2418,7 +2787,7 @@ def PragmaClangRodataSection : InheritableAttr { let Spellings = []; let Args = [StringArgument<"Name">]; let Subjects = SubjectList<[GlobalVar], ErrorDiag>; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def PragmaClangRelroSection : InheritableAttr { @@ -2426,7 +2795,7 @@ def PragmaClangRelroSection : InheritableAttr { let Spellings = []; let Args = [StringArgument<"Name">]; let Subjects = SubjectList<[GlobalVar], ErrorDiag>; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def StrictFP : InheritableAttr { @@ -2434,7 +2803,7 @@ def StrictFP : InheritableAttr { // Function uses strict floating point operations. let Spellings = []; let Subjects = SubjectList<[Function]>; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def PragmaClangTextSection : InheritableAttr { @@ -2442,7 +2811,16 @@ def PragmaClangTextSection : InheritableAttr { let Spellings = []; let Args = [StringArgument<"Name">]; let Subjects = SubjectList<[Function], ErrorDiag>; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; +} + +def CodeModel : InheritableAttr, TargetSpecificAttr<TargetLoongArch> { + let Spellings = [GCC<"model">]; + let Args = [EnumArgument<"Model", "llvm::CodeModel::Model", + ["normal", "medium", "extreme"], ["Small", "Medium", "Large"], + /*opt=*/0, /*fake=*/0, /*isExternalType=*/1>]; + let Subjects = SubjectList<[NonTLSGlobalVar], ErrorDiag>; + let Documentation = [CodeModelDocs]; } def Sentinel : InheritableAttr { @@ -2454,7 +2832,8 @@ def Sentinel : InheritableAttr { } def StdCall : DeclOrTypeAttr { - let Spellings = [GCC<"stdcall">, Keyword<"__stdcall">, Keyword<"_stdcall">]; + let Spellings = [GCC<"stdcall">, CustomKeyword<"__stdcall">, + CustomKeyword<"_stdcall">]; // let Subjects = [Function, ObjCMethod]; let Documentation = [StdCallDocs]; } @@ -2510,9 +2889,10 @@ def SwiftAsyncError : InheritableAttr { let Documentation = [SwiftAsyncErrorDocs]; } -def Suppress : StmtAttr { - let Spellings = [CXX11<"gsl", "suppress">]; +def Suppress : DeclOrStmtAttr { + let Spellings = [CXX11<"gsl", "suppress">, Clang<"suppress">]; let Args = [VariadicStringArgument<"DiagnosticIdentifiers">]; + let Accessors = [Accessor<"isGSL", [CXX11<"gsl", "suppress">]>]; let Documentation = [SuppressDocs]; } @@ -2523,21 +2903,35 @@ def SysVABI : DeclOrTypeAttr { } def ThisCall : DeclOrTypeAttr { - let Spellings = [GCC<"thiscall">, Keyword<"__thiscall">, - Keyword<"_thiscall">]; + let Spellings = [GCC<"thiscall">, CustomKeyword<"__thiscall">, + CustomKeyword<"_thiscall">]; // let Subjects = [Function, ObjCMethod]; let Documentation = [ThisCallDocs]; } def VectorCall : DeclOrTypeAttr { - let Spellings = [Clang<"vectorcall">, Keyword<"__vectorcall">, - Keyword<"_vectorcall">]; + let Spellings = [Clang<"vectorcall">, CustomKeyword<"__vectorcall">, + CustomKeyword<"_vectorcall">]; // let Subjects = [Function, ObjCMethod]; let Documentation = [VectorCallDocs]; } +def ZeroCallUsedRegs : InheritableAttr { + let Spellings = [GCC<"zero_call_used_regs">]; + let Subjects = SubjectList<[Function], ErrorDiag>; + let Args = [ + EnumArgument<"ZeroCallUsedRegs", "ZeroCallUsedRegsKind", + ["skip", "used-gpr-arg", "used-gpr", "used-arg", "used", + "all-gpr-arg", "all-gpr", "all-arg", "all"], + ["Skip", "UsedGPRArg", "UsedGPR", "UsedArg", "Used", + "AllGPRArg", "AllGPR", "AllArg", "All"]> + ]; + let Documentation = [ZeroCallUsedRegsDocs]; +} + def Pascal : DeclOrTypeAttr { - let Spellings = [Clang<"pascal">, Keyword<"__pascal">, Keyword<"_pascal">]; + let Spellings = [Clang<"pascal">, CustomKeyword<"__pascal">, + CustomKeyword<"_pascal">]; // let Subjects = [Function, ObjCMethod]; let Documentation = [Undocumented]; } @@ -2562,16 +2956,17 @@ def PreserveAll : DeclOrTypeAttr { let Documentation = [PreserveAllDocs]; } +def M68kRTD: DeclOrTypeAttr { + let Spellings = [Clang<"m68k_rtd">]; + let Documentation = [M68kRTDDocs]; +} + def Target : InheritableAttr { let Spellings = [GCC<"target">]; let Args = [StringArgument<"featuresStr">]; let Subjects = SubjectList<[Function], ErrorDiag>; let Documentation = [TargetDocs]; let AdditionalMembers = [{ - ParsedTargetAttr parse() const { - return parse(getFeaturesStr()); - } - StringRef getArchitecture() const { StringRef Features = getFeaturesStr(); if (Features == "default") return {}; @@ -2581,7 +2976,7 @@ def Target : InheritableAttr { for (auto &Feature : AttrFeatures) { Feature = Feature.trim(); - if (Feature.startswith("arch=")) + if (Feature.starts_with("arch=")) return Feature.drop_front(sizeof("arch=") - 1); } return ""; @@ -2599,66 +2994,81 @@ def Target : InheritableAttr { for (auto &Feature : AttrFeatures) { Feature = Feature.trim(); - if (!Feature.startswith("no-") && !Feature.startswith("arch=") && - !Feature.startswith("fpmath=") && !Feature.startswith("tune=")) + if (!Feature.starts_with("no-") && !Feature.starts_with("arch=") && + !Feature.starts_with("fpmath=") && !Feature.starts_with("tune=")) Out.push_back(Feature); } } - template<class Compare> - ParsedTargetAttr parse(Compare cmp) const { - ParsedTargetAttr Attrs = parse(); - llvm::sort(std::begin(Attrs.Features), std::end(Attrs.Features), cmp); - return Attrs; - } - bool isDefaultVersion() const { return getFeaturesStr() == "default"; } + }]; +} - static ParsedTargetAttr parse(StringRef Features) { - ParsedTargetAttr Ret; - if (Features == "default") return Ret; - SmallVector<StringRef, 1> AttrFeatures; - Features.split(AttrFeatures, ","); +def TargetVersion : InheritableAttr { + let Spellings = [GCC<"target_version">]; + let Args = [StringArgument<"NamesStr">]; + let Subjects = SubjectList<[Function], ErrorDiag>; + let Documentation = [TargetVersionDocs]; + let AdditionalMembers = [{ + StringRef getName() const { return getNamesStr().trim(); } + bool isDefaultVersion() const { + return getName() == "default"; + } + void getFeatures(llvm::SmallVectorImpl<StringRef> &Out) const { + if (isDefaultVersion()) return; + StringRef Features = getName(); + + SmallVector<StringRef, 8> AttrFeatures; + Features.split(AttrFeatures, "+"); - // Grab the various features and prepend a "+" to turn on the feature to - // the backend and add them to our existing set of features. for (auto &Feature : AttrFeatures) { - // Go ahead and trim whitespace rather than either erroring or - // accepting it weirdly. Feature = Feature.trim(); - - // TODO: Support the fpmath option. It will require checking - // overall feature validity for the function with the rest of the - // attributes on the function. - if (Feature.startswith("fpmath=")) - continue; - - if (Feature.startswith("branch-protection=")) { - Ret.BranchProtection = Feature.split('=').second.trim(); - continue; - } - - // While we're here iterating check for a different target cpu. - if (Feature.startswith("arch=")) { - if (!Ret.Architecture.empty()) - Ret.DuplicateArchitecture = true; - else - Ret.Architecture = Feature.split("=").second.trim(); - } else if (Feature.startswith("tune=")) { - if (!Ret.Tune.empty()) - Ret.DuplicateTune = true; - else - Ret.Tune = Feature.split("=").second.trim(); - } else if (Feature.startswith("no-")) - Ret.Features.push_back("-" + Feature.split("-").second.str()); - else - Ret.Features.push_back("+" + Feature.str()); + Out.push_back(Feature); } - return Ret; } }]; } +def TargetClones : InheritableAttr { + let Spellings = [GCC<"target_clones">]; + let Args = [VariadicStringArgument<"featuresStrs">]; + let Documentation = [TargetClonesDocs]; + let Subjects = SubjectList<[Function], ErrorDiag>; + let AdditionalMembers = [{ + StringRef getFeatureStr(unsigned Index) const { + return *(featuresStrs_begin() + Index); + } + // Given an index into the 'featuresStrs' sequence, compute a unique + // ID to be used with function name mangling for the associated variant. + // This mapping is necessary due to a requirement that the mangling ID + // used for the "default" variant be the largest mangling ID in the + // variant set. Duplicate variants present in 'featuresStrs' are also + // assigned their own unique ID (the mapping is bijective). + unsigned getMangledIndex(unsigned Index) const { + if (getFeatureStr(Index) == "default") + return std::count_if(featuresStrs_begin(), featuresStrs_end(), + [](StringRef S) { return S != "default"; }); + + return std::count_if(featuresStrs_begin(), featuresStrs_begin() + Index, + [](StringRef S) { return S != "default"; }); + } + + // Given an index into the 'featuresStrs' sequence, determine if the + // index corresponds to the first instance of the named variant. This + // is used to skip over duplicate variant instances when iterating over + // 'featuresStrs'. + bool isFirstOfVersion(unsigned Index) const { + StringRef FeatureStr(getFeatureStr(Index)); + return 0 == std::count_if( + featuresStrs_begin(), featuresStrs_begin() + Index, + [FeatureStr](StringRef S) { return S == FeatureStr; }); + + } + }]; +} + +def : MutualExclusions<[TargetClones, TargetVersion, Target, CPUDispatch, CPUSpecific]>; + def MinVectorWidth : InheritableAttr { let Spellings = [Clang<"min_vector_width">]; let Args = [UnsignedArgument<"VectorWidth">]; @@ -2685,9 +3095,11 @@ def Unavailable : InheritableAttr { "IR_ARCInitReturnsUnrelated", "IR_ARCFieldWithOwnership"], 1, /*fake*/ 1>]; let Documentation = [Undocumented]; + let MeaningfulToClassTemplateDefinition = 1; } def DiagnoseIf : InheritableAttr { + let CanPrintOnLeft = 0; // Does not have a [[]] spelling because this attribute requires the ability // to parse function arguments but the attribute is not written in the type // position. @@ -2738,7 +3150,7 @@ def ObjCRequiresPropertyDefs : InheritableAttr { def Unused : InheritableAttr { let Spellings = [CXX11<"", "maybe_unused", 201603>, GCC<"unused">, - C2x<"", "maybe_unused", 201904>]; + C23<"", "maybe_unused", 202106>]; let Subjects = SubjectList<[Var, ObjCIvar, Type, Enum, EnumConstant, Label, Field, ObjCMethod, FunctionLike]>; let Documentation = [WarnMaybeUnusedDocs]; @@ -2832,10 +3244,10 @@ def WarnUnused : InheritableAttr { def WarnUnusedResult : InheritableAttr { let Spellings = [CXX11<"", "nodiscard", 201907>, - C2x<"", "nodiscard", 201904>, + C23<"", "nodiscard", 202003>, CXX11<"clang", "warn_unused_result">, GCC<"warn_unused_result">]; - let Subjects = SubjectList<[ObjCMethod, Enum, Record, FunctionLike]>; + let Subjects = SubjectList<[ObjCMethod, Enum, Record, FunctionLike, TypedefName]>; let Args = [StringArgument<"Message", 1>]; let Documentation = [WarnUnusedResultsDocs]; let AdditionalMembers = [{ @@ -2850,7 +3262,7 @@ def WarnUnusedResult : InheritableAttr { def Weak : InheritableAttr { let Spellings = [GCC<"weak">]; let Subjects = SubjectList<[Var, Function, CXXRecord]>; - let Documentation = [Undocumented]; + let Documentation = [WeakDocs]; let SimpleHandler = 1; } @@ -2881,7 +3293,7 @@ def AnyX86Interrupt : InheritableAttr, TargetSpecificAttr<TargetAnyX86> { let Subjects = SubjectList<[HasFunctionProto]>; let ParseKind = "Interrupt"; let HasCustomParsing = 1; - let Documentation = [Undocumented]; + let Documentation = [AnyX86InterruptDocs]; } def AnyX86NoCallerSavedRegisters : InheritableAttr, @@ -2940,6 +3352,13 @@ def NoSanitizeSpecific : InheritableAttr { let ASTNode = 0; } +def DisableSanitizerInstrumentation : InheritableAttr { + let Spellings = [Clang<"disable_sanitizer_instrumentation">]; + let Subjects = SubjectList<[Function, ObjCMethod, GlobalVar]>; + let Documentation = [DisableSanitizerInstrumentationDocs]; + let SimpleHandler = 1; +} + def CFICanonicalJumpTable : InheritableAttr { let Spellings = [Clang<"cfi_canonical_jump_table">]; let Subjects = SubjectList<[Function], ErrorDiag>; @@ -3325,6 +3744,14 @@ def : MutualExclusions<[Owner, Pointer]>; // Microsoft-related attributes +def MSConstexpr : InheritableAttr { + let LangOpts = [MicrosoftExt]; + let Spellings = [CXX11<"msvc", "constexpr">]; + let Subjects = SubjectList<[Function, ReturnStmt], ErrorDiag, + "functions and return statements">; + let Documentation = [MSConstexprDocs]; +} + def MSNoVTable : InheritableAttr, TargetSpecificAttr<TargetMicrosoftCXXABI> { let Spellings = [Declspec<"novtable">]; let Subjects = SubjectList<[CXXRecord]>; @@ -3342,10 +3769,10 @@ def MSAllocator : InheritableAttr { let Documentation = [MSAllocatorDocs]; } -def CFGuard : InheritableAttr { +def CFGuard : InheritableAttr, TargetSpecificAttr<TargetWindows> { // Currently only the __declspec(guard(nocf)) modifier is supported. In future // we might also want to support __declspec(guard(suppress)). - let Spellings = [Declspec<"guard">]; + let Spellings = [Declspec<"guard">, Clang<"guard">]; let Subjects = SubjectList<[Function]>; let Args = [EnumArgument<"Guard", "GuardArg", ["nocf"], ["nocf"]>]; let Documentation = [CFGuardDocs]; @@ -3372,7 +3799,7 @@ def DLLExportStaticLocal : InheritableAttr, TargetSpecificAttr<TargetHasDLLImpor // the function has local static variables, the function is dllexported too. let Spellings = []; let Subjects = SubjectList<[Function]>; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def DLLImport : InheritableAttr, TargetSpecificAttr<TargetHasDLLImportExport> { @@ -3398,7 +3825,7 @@ def DLLImportStaticLocal : InheritableAttr, TargetSpecificAttr<TargetHasDLLImpor // attribute is used to determine whether the variables are imported or not. let Spellings = []; let Subjects = SubjectList<[Function]>; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def SelectAny : InheritableAttr { @@ -3415,37 +3842,37 @@ def Thread : Attr { } def Win64 : IgnoredAttr { - let Spellings = [Keyword<"__w64">]; + let Spellings = [CustomKeyword<"__w64">]; let LangOpts = [MicrosoftExt]; } def Ptr32 : TypeAttr { - let Spellings = [Keyword<"__ptr32">]; + let Spellings = [CustomKeyword<"__ptr32">]; let Documentation = [Ptr32Docs]; } def Ptr64 : TypeAttr { - let Spellings = [Keyword<"__ptr64">]; + let Spellings = [CustomKeyword<"__ptr64">]; let Documentation = [Ptr64Docs]; } def SPtr : TypeAttr { - let Spellings = [Keyword<"__sptr">]; + let Spellings = [CustomKeyword<"__sptr">]; let Documentation = [SPtrDocs]; } def UPtr : TypeAttr { - let Spellings = [Keyword<"__uptr">]; + let Spellings = [CustomKeyword<"__uptr">]; let Documentation = [UPtrDocs]; } def MSInheritance : InheritableAttr { let LangOpts = [MicrosoftExt]; let Args = [DefaultBoolArgument<"BestCase", /*default*/1, /*fake*/1>]; - let Spellings = [Keyword<"__single_inheritance">, - Keyword<"__multiple_inheritance">, - Keyword<"__virtual_inheritance">, - Keyword<"__unspecified_inheritance">]; + let Spellings = [CustomKeyword<"__single_inheritance">, + CustomKeyword<"__multiple_inheritance">, + CustomKeyword<"__virtual_inheritance">, + CustomKeyword<"__unspecified_inheritance">]; let AdditionalMembers = [{ MSInheritanceModel getInheritanceModel() const { // The spelling enum should agree with MSInheritanceModel. @@ -3464,7 +3891,7 @@ def MSVtorDisp : InheritableAttr { let AdditionalMembers = [{ MSVtorDispMode getVtorDispMode() const { return MSVtorDispMode(vdm); } }]; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def InitSeg : Attr { @@ -3556,21 +3983,21 @@ def CapturedRecord : InheritableAttr { // This attribute has no spellings as it is only ever created implicitly. let Spellings = []; let SemaHandler = 0; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def OMPThreadPrivateDecl : InheritableAttr { // This attribute has no spellings as it is only ever created implicitly. let Spellings = []; let SemaHandler = 0; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def OMPCaptureNoInit : InheritableAttr { // This attribute has no spellings as it is only ever created implicitly. let Spellings = []; let SemaHandler = 0; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def OMPCaptureKind : Attr { @@ -3578,7 +4005,7 @@ def OMPCaptureKind : Attr { let Spellings = []; let SemaHandler = 0; let Args = [UnsignedArgument<"CaptureKindVal">]; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; let AdditionalMembers = [{ llvm::omp::Clause getCaptureKind() const { return static_cast<llvm::omp::Clause>(getCaptureKindVal()); @@ -3591,7 +4018,7 @@ def OMPReferencedVar : Attr { let Spellings = []; let SemaHandler = 0; let Args = [ExprArgument<"Ref">]; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def OMPDeclareSimdDecl : Attr { @@ -3622,20 +4049,22 @@ def OMPDeclareTargetDecl : InheritableAttr { let Documentation = [OMPDeclareTargetDocs]; let Args = [ EnumArgument<"MapType", "MapTypeTy", - [ "to", "link" ], - [ "MT_To", "MT_Link" ]>, + [ "to", "enter", "link" ], + [ "MT_To", "MT_Enter", "MT_Link" ]>, EnumArgument<"DevType", "DevTypeTy", [ "host", "nohost", "any" ], [ "DT_Host", "DT_NoHost", "DT_Any" ]>, + ExprArgument<"IndirectExpr">, + BoolArgument<"Indirect">, UnsignedArgument<"Level"> ]; let AdditionalMembers = [{ void printPrettyPragma(raw_ostream &OS, const PrintingPolicy &Policy) const; - static llvm::Optional<MapTypeTy> + static std::optional<MapTypeTy> isDeclareTargetDeclaration(const ValueDecl *VD); - static llvm::Optional<OMPDeclareTargetDeclAttr*> getActiveAttr(const ValueDecl *VD); - static llvm::Optional<DevTypeTy> getDeviceType(const ValueDecl *VD); - static llvm::Optional<SourceLocation> getLocation(const ValueDecl *VD); + static std::optional<OMPDeclareTargetDeclAttr*> getActiveAttr(const ValueDecl *VD); + static std::optional<DevTypeTy> getDeviceType(const ValueDecl *VD); + static std::optional<SourceLocation> getLocation(const ValueDecl *VD); }]; } @@ -3659,9 +4088,10 @@ def OMPAllocateDecl : InheritableAttr { "OMPCGroupMemAlloc", "OMPPTeamMemAlloc", "OMPThreadMemAlloc", "OMPUserDefinedMemAlloc" ]>, - ExprArgument<"Allocator"> + ExprArgument<"Allocator">, + ExprArgument<"Alignment"> ]; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def OMPDeclareVariant : InheritableAttr { @@ -3674,11 +4104,21 @@ def OMPDeclareVariant : InheritableAttr { let Args = [ ExprArgument<"VariantFuncRef">, OMPTraitInfoArgument<"TraitInfos">, + VariadicExprArgument<"AdjustArgsNothing">, + VariadicExprArgument<"AdjustArgsNeedDevicePtr">, + VariadicOMPInteropInfoArgument<"AppendArgs">, ]; let AdditionalMembers = [{ OMPTraitInfo &getTraitInfo() { return *traitInfos; } void printPrettyPragma(raw_ostream & OS, const PrintingPolicy &Policy) const; + static StringRef getInteropTypeString(const OMPInteropInfo *I) { + if (I->IsTarget && I->IsTargetSync) + return "target,targetsync"; + if (I->IsTarget) + return "target"; + return "targetsync"; + } }]; } @@ -3800,17 +4240,31 @@ def ReleaseHandle : InheritableParamAttr { let Documentation = [ReleaseHandleDocs]; } +def UnsafeBufferUsage : InheritableAttr { + let Spellings = [Clang<"unsafe_buffer_usage">]; + let Subjects = SubjectList<[Function]>; + let Documentation = [UnsafeBufferUsageDocs]; +} + +def DiagnoseAsBuiltin : InheritableAttr { + let Spellings = [Clang<"diagnose_as_builtin">]; + let Args = [DeclArgument<Function, "Function">, + VariadicUnsignedArgument<"ArgIndices">]; + let Subjects = SubjectList<[Function]>; + let Documentation = [DiagnoseAsBuiltinDocs]; +} + def Builtin : InheritableAttr { let Spellings = []; let Args = [UnsignedArgument<"ID">]; let Subjects = SubjectList<[Function]>; let SemaHandler = 0; - let Documentation = [Undocumented]; + let Documentation = [InternalOnly]; } def EnforceTCB : InheritableAttr { let Spellings = [Clang<"enforce_tcb">]; - let Subjects = SubjectList<[Function]>; + let Subjects = SubjectList<[Function, ObjCMethod]>; let Args = [StringArgument<"TCBName">]; let Documentation = [EnforceTCBDocs]; bit InheritEvenIfAlreadyPresent = 1; @@ -3818,8 +4272,191 @@ def EnforceTCB : InheritableAttr { def EnforceTCBLeaf : InheritableAttr { let Spellings = [Clang<"enforce_tcb_leaf">]; - let Subjects = SubjectList<[Function]>; + let Subjects = SubjectList<[Function, ObjCMethod]>; let Args = [StringArgument<"TCBName">]; let Documentation = [EnforceTCBLeafDocs]; bit InheritEvenIfAlreadyPresent = 1; } + +def Error : InheritableAttr { + let Spellings = [GCC<"error">, GCC<"warning">]; + let Accessors = [Accessor<"isError", [GCC<"error">]>, + Accessor<"isWarning", [GCC<"warning">]>]; + let Args = [StringArgument<"UserDiagnostic">]; + let Subjects = SubjectList<[Function], ErrorDiag>; + let Documentation = [ErrorAttrDocs]; +} + +def HLSLNumThreads: InheritableAttr { + let Spellings = [Microsoft<"numthreads">]; + let Args = [IntArgument<"X">, IntArgument<"Y">, IntArgument<"Z">]; + let Subjects = SubjectList<[HLSLEntry]>; + let LangOpts = [HLSL]; + let Documentation = [NumThreadsDocs]; +} + +def HLSLSV_GroupIndex: HLSLAnnotationAttr { + let Spellings = [HLSLSemantic<"SV_GroupIndex">]; + let Subjects = SubjectList<[ParmVar, GlobalVar]>; + let LangOpts = [HLSL]; + let Documentation = [HLSLSV_GroupIndexDocs]; +} + +def HLSLResourceBinding: InheritableAttr { + let Spellings = [HLSLSemantic<"register">]; + let Subjects = SubjectList<[HLSLBufferObj, ExternalGlobalVar]>; + let LangOpts = [HLSL]; + let Args = [StringArgument<"Slot">, StringArgument<"Space", 1>]; + let Documentation = [HLSLResourceBindingDocs]; +} + +def HLSLSV_DispatchThreadID: HLSLAnnotationAttr { + let Spellings = [HLSLSemantic<"SV_DispatchThreadID">]; + let Subjects = SubjectList<[ParmVar, Field]>; + let LangOpts = [HLSL]; + let Documentation = [HLSLSV_DispatchThreadIDDocs]; +} + +def HLSLShader : InheritableAttr { + let Spellings = [Microsoft<"shader">]; + let Subjects = SubjectList<[HLSLEntry]>; + let LangOpts = [HLSL]; + let Args = [ + EnumArgument<"Type", "ShaderType", + ["pixel", "vertex", "geometry", "hull", "domain", "compute", + "raygeneration", "intersection", "anyhit", "closesthit", + "miss", "callable", "mesh", "amplification"], + ["Pixel", "Vertex", "Geometry", "Hull", "Domain", "Compute", + "RayGeneration", "Intersection", "AnyHit", "ClosestHit", + "Miss", "Callable", "Mesh", "Amplification"]> + ]; + let Documentation = [HLSLSV_ShaderTypeAttrDocs]; +} + +def HLSLResource : InheritableAttr { + let Spellings = []; + let Subjects = SubjectList<[Struct]>; + let LangOpts = [HLSL]; + let Args = [EnumArgument<"ResourceClass", "llvm::hlsl::ResourceClass", + ["SRV", "UAV", "CBuffer", "Sampler"], + ["SRV", "UAV", "CBuffer", "Sampler"], + /*opt=*/0, /*fake=*/0, /*isExternalType=*/1>, + EnumArgument<"ResourceKind", "llvm::hlsl::ResourceKind", + ["Texture1D", "Texture2D", "Texture2DMS", + "Texture3D", "TextureCube", "Texture1DArray", + "Texture2DArray", "Texture2DMSArray", + "TextureCubeArray", "TypedBuffer", "RawBuffer", + "StructuredBuffer", "CBuffer", "Sampler", + "TBuffer", "RTAccelerationStructure", + "FeedbackTexture2D", "FeedbackTexture2DArray"], + ["Texture1D", "Texture2D", "Texture2DMS", + "Texture3D", "TextureCube", "Texture1DArray", + "Texture2DArray", "Texture2DMSArray", + "TextureCubeArray", "TypedBuffer", "RawBuffer", + "StructuredBuffer", "CBuffer", "Sampler", + "TBuffer", "RTAccelerationStructure", + "FeedbackTexture2D", "FeedbackTexture2DArray"], + /*opt=*/0, /*fake=*/0, /*isExternalType=*/1>, + DefaultBoolArgument<"isROV", /*default=*/0> + ]; + let Documentation = [InternalOnly]; +} + +def HLSLGroupSharedAddressSpace : TypeAttr { + let Spellings = [CustomKeyword<"groupshared">]; + let Subjects = SubjectList<[Var]>; + let Documentation = [HLSLGroupSharedAddressSpaceDocs]; +} + +def HLSLParamModifier : TypeAttr { + let Spellings = [CustomKeyword<"in">, CustomKeyword<"inout">, CustomKeyword<"out">]; + let Accessors = [Accessor<"isIn", [CustomKeyword<"in">]>, + Accessor<"isInOut", [CustomKeyword<"inout">]>, + Accessor<"isOut", [CustomKeyword<"out">]>, + Accessor<"isAnyOut", [CustomKeyword<"out">, CustomKeyword<"inout">]>, + Accessor<"isAnyIn", [CustomKeyword<"in">, CustomKeyword<"inout">]>]; + let Subjects = SubjectList<[ParmVar]>; + let Documentation = [HLSLParamQualifierDocs]; + let Args = [DefaultBoolArgument<"MergedSpelling", /*default*/0, /*fake*/1>]; +} + +def RandomizeLayout : InheritableAttr { + let Spellings = [GCC<"randomize_layout">]; + let Subjects = SubjectList<[Record]>; + let Documentation = [ClangRandomizeLayoutDocs]; + let LangOpts = [COnly]; +} + +def NoRandomizeLayout : InheritableAttr { + let Spellings = [GCC<"no_randomize_layout">]; + let Subjects = SubjectList<[Record]>; + let Documentation = [ClangRandomizeLayoutDocs]; + let LangOpts = [COnly]; +} +def : MutualExclusions<[RandomizeLayout, NoRandomizeLayout]>; + +def FunctionReturnThunks : InheritableAttr, + TargetSpecificAttr<TargetAnyX86> { + let Spellings = [GCC<"function_return">]; + let Args = [EnumArgument<"ThunkType", "Kind", + ["keep", "thunk-extern"], + ["Keep", "Extern"] + >]; + let Subjects = SubjectList<[Function]>; + let Documentation = [FunctionReturnThunksDocs]; +} + +def WebAssemblyFuncref : TypeAttr, TargetSpecificAttr<TargetWebAssembly> { + let Spellings = [CustomKeyword<"__funcref">]; + let Documentation = [WebAssemblyExportNameDocs]; + let Subjects = SubjectList<[FunctionPointer], ErrorDiag>; +} + +def ReadOnlyPlacement : InheritableAttr { + let Spellings = [Clang<"enforce_read_only_placement">]; + let Subjects = SubjectList<[Record]>; + let Documentation = [ReadOnlyPlacementDocs]; +} + +def AvailableOnlyInDefaultEvalMethod : InheritableAttr { + let Spellings = [Clang<"available_only_in_default_eval_method">]; + let Subjects = SubjectList<[TypedefName], ErrorDiag>; + let Documentation = [Undocumented]; +} + +def PreferredType: InheritableAttr { + let Spellings = [Clang<"preferred_type">]; + let Subjects = SubjectList<[BitField], ErrorDiag>; + let Args = [TypeArgument<"Type", 1>]; + let Documentation = [PreferredTypeDocumentation]; +} + +def CodeAlign: StmtAttr { + let Spellings = [Clang<"code_align">]; + let Subjects = SubjectList<[ForStmt, CXXForRangeStmt, WhileStmt, DoStmt], + ErrorDiag, "'for', 'while', and 'do' statements">; + let Args = [ExprArgument<"Alignment">]; + let Documentation = [CodeAlignAttrDocs]; + let AdditionalMembers = [{ + static constexpr int MinimumAlignment = 1; + static constexpr int MaximumAlignment = 4096; + }]; +} + +def CountedBy : InheritableAttr { + let Spellings = [Clang<"counted_by">]; + let Subjects = SubjectList<[Field]>; + let Args = [IdentifierArgument<"CountedByField">]; + let Documentation = [CountedByDocs]; + let LangOpts = [COnly]; + // FIXME: This is ugly. Let using a DeclArgument would be nice, but a Decl + // isn't yet available due to the fact that we're still parsing the + // structure. Maybe that code could be changed sometime in the future. + code AdditionalMembers = [{ + private: + SourceRange CountedByFieldLoc; + public: + SourceRange getCountedByFieldLoc() const { return CountedByFieldLoc; } + void setCountedByFieldLoc(SourceRange Loc) { CountedByFieldLoc = Loc; } + }]; +} diff --git a/contrib/llvm-project/clang/include/clang/Basic/AttrDocs.td b/contrib/llvm-project/clang/include/clang/Basic/AttrDocs.td index c265a877e3b1..e02a1201e2ad 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/AttrDocs.td +++ b/contrib/llvm-project/clang/include/clang/Basic/AttrDocs.td @@ -22,7 +22,7 @@ // Windows (from within the clang\docs directory): // make.bat html // Non-Windows (from within the clang\docs directory): -// make -f Makefile.sphinx html +// sphinx-build -b html _build/html def GlobalDocumentation { code Intro =[{.. @@ -57,6 +57,15 @@ global variable or function should be in after translation. let Heading = "section, __declspec(allocate)"; } +def CodeModelDocs : Documentation { + let Category = DocCatVariable; + let Content = [{ +The ``model`` attribute allows overriding the translation unit's +code model (specified by ``-mcmodel``) for a specific global variable. + }]; + let Heading = "model"; +} + def UsedDocs : Documentation { let Category = DocCatFunction; let Content = [{ @@ -127,6 +136,10 @@ relative ordering of values is important. For example: ``Obj2`` will be initialized *before* ``Obj1`` despite the usual order of initialization being the opposite. +On Windows, ``init_seg(compiler)`` is represented with a priority of 200 and +``init_seg(library)`` is represented with a priority of 400. ``init_seg(user)`` +uses the default 65535 priority. + This attribute is only supported for C++ and Objective-C++ and is ignored in other language modes. Currently, this attribute is not implemented on z/OS. }]; @@ -187,6 +200,10 @@ primary use is for COFF object files which explicitly specify what interfaces are imported from external modules. See the dllimport_ documentation on MSDN for more information. +Note that a dllimport function may still be inlined, if its definition is +available and it doesn't reference any non-dllimport functions or global +variables. + .. _dllimport: https://msdn.microsoft.com/en-us/library/3y1sfaz2.aspx }]; } @@ -253,6 +270,28 @@ applies to copies of the block. For example: }]; } +def MaybeUndefDocs : Documentation { + let Category = DocCatVariable; + let Content = [{ +The ``maybe_undef`` attribute can be placed on a function parameter. It indicates +that the parameter is allowed to use undef values. It informs the compiler +to insert a freeze LLVM IR instruction on the function parameter. +Please note that this is an attribute that is used as an internal +implementation detail and not intended to be used by external users. + +In languages HIP, CUDA etc., some functions have multi-threaded semantics and +it is enough for only one or some threads to provide defined arguments. +Depending on semantics, undef arguments in some threads don't produce +undefined results in the function call. Since, these functions accept undefined +arguments, ``maybe_undef`` attribute can be placed. + +Sample usage: +.. code-block:: c + + void maybeundeffunc(int __attribute__((maybe_undef))param); + }]; +} + def CarriesDependencyDocs : Documentation { let Category = DocCatFunction; let Content = [{ @@ -281,6 +320,17 @@ features that are required for the function to be called. The result of this is that future processors execute the most restrictive version of the function the new processor can execute. +In addition, unlike the ICC implementation of this feature, the selection of the +version does not consider the manufacturer or microarchitecture of the processor. +It tests solely the list of features that are both supported by the specified +processor and present in the compiler-rt library. This can be surprising at times, +as the runtime processor may be from a completely different manufacturer, as long +as it supports the same feature set. + +This can additionally be surprising, as some processors are indistringuishable from +others based on the list of testable features. When this happens, the variant +is selected in an unspecified manner. + Function versions are defined with ``cpu_specific``, which takes one or more CPU names as a parameter. For example: @@ -405,6 +455,71 @@ The SYCL kernel in the previous code sample meets these expectations. }]; } +def SYCLSpecialClassDocs : Documentation { + let Category = DocCatStmt; + let Content = [{ +SYCL defines some special classes (accessor, sampler, and stream) which require +specific handling during the generation of the SPIR entry point. +The ``__attribute__((sycl_special_class))`` attribute is used in SYCL +headers to indicate that a class or a struct needs a specific handling when +it is passed from host to device. +Special classes will have a mandatory ``__init`` method and an optional +``__finalize`` method (the ``__finalize`` method is used only with the +``stream`` type). Kernel parameters types are extract from the ``__init`` method +parameters. The kernel function arguments list is derived from the +arguments of the ``__init`` method. The arguments of the ``__init`` method are +copied into the kernel function argument list and the ``__init`` and +``__finalize`` methods are called at the beginning and the end of the kernel, +respectively. +The ``__init`` and ``__finalize`` methods must be defined inside the +special class. +Please note that this is an attribute that is used as an internal +implementation detail and not intended to be used by external users. + +The syntax of the attribute is as follows: + +.. code-block:: text + + class __attribute__((sycl_special_class)) accessor {}; + class [[clang::sycl_special_class]] accessor {}; + +This is a code example that illustrates the use of the attribute: + +.. code-block:: c++ + + class __attribute__((sycl_special_class)) SpecialType { + int F1; + int F2; + void __init(int f1) { + F1 = f1; + F2 = f1; + } + void __finalize() {} + public: + SpecialType() = default; + int getF2() const { return F2; } + }; + + int main () { + SpecialType T; + cgh.single_task([=] { + T.getF2(); + }); + } + +This would trigger the following kernel entry point in the AST: + +.. code-block:: c++ + + void __sycl_kernel(int f1) { + SpecialType T; + T.__init(f1); + ... + T.__finalize() + } + }]; +} + def C11NoReturnDocs : Documentation { let Category = DocCatFunction; let Content = [{ @@ -418,10 +533,14 @@ pointer type. def CXX11NoReturnDocs : Documentation { let Category = DocCatFunction; + let Heading = "noreturn, _Noreturn"; let Content = [{ A function declared as ``[[noreturn]]`` shall not return to its caller. The compiler will generate a diagnostic for a function declared as ``[[noreturn]]`` that appears to be capable of returning to its caller. + +The ``[[_Noreturn]]`` spelling is deprecated and only exists to ease code +migration for code using ``[[noreturn]]`` after including ``<stdnoreturn.h>``. }]; } @@ -429,17 +548,68 @@ def NoMergeDocs : Documentation { let Category = DocCatStmt; let Content = [{ If a statement is marked ``nomerge`` and contains call expressions, those call -expressions inside the statement will not be merged during optimization. This +expressions inside the statement will not be merged during optimization. This attribute can be used to prevent the optimizer from obscuring the source location of certain calls. For example, it will prevent tail merging otherwise identical code sequences that raise an exception or terminate the program. Tail merging normally reduces the precision of source location information, making stack traces less useful for debugging. This attribute gives the user control -over the tradeoff between code size and debug information precision. +over the tradeoff between code size and debug information precision. + +``nomerge`` attribute can also be used as function attribute to prevent all +calls to the specified function from merging. It has no effect on indirect +calls to such functions. For example: + +.. code-block:: c++ + + [[clang::nomerge]] void foo(int) {} + + void bar(int x) { + auto *ptr = foo; + if (x) foo(1); else foo(2); // will not be merged + if (x) ptr(1); else ptr(2); // indirect call, can be merged + } + +``nomerge`` attribute can also be used for pointers to functions to +prevent calls through such pointer from merging. In such case the +effect applies only to a specific function pointer. For example: + +.. code-block:: c++ + + [[clang::nomerge]] void (*foo)(int); + + void bar(int x) { + auto *ptr = foo; + if (x) foo(1); else foo(2); // will not be merged + if (x) ptr(1); else ptr(2); // 'ptr' has no 'nomerge' attribute, can be merged + } + }]; +} + +def NoInlineDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +This function attribute suppresses the inlining of a function at the call sites +of the function. + +``[[clang::noinline]]`` spelling can be used as a statement attribute; other +spellings of the attribute are not supported on statements. If a statement is +marked ``[[clang::noinline]]`` and contains calls, those calls inside the +statement will not be inlined by the compiler. + +``__noinline__`` can be used as a keyword in CUDA/HIP languages. This is to +avoid diagnostics due to usage of ``__attribute__((__noinline__))`` +with ``__noinline__`` defined as a macro as ``__attribute__((noinline))``. + +.. code-block:: c + + int example(void) { + int r; + [[clang::noinline]] foo(); + [[clang::noinline]] r = bar(); + return r; + } -``nomerge`` attribute can also be used as function attribute to prevent all -calls to the specified function from merging. It has no effect on indirect -calls. }]; } @@ -466,6 +636,9 @@ Any variables in scope, including all arguments to the function and the return value must be trivially destructible. The calling convention of the caller and callee must match, and they must not be variadic functions or have old style K&R C function declarations. + +``clang::musttail`` provides assurances that the tail call can be optimized on +all targets, not just one. }]; } @@ -999,7 +1172,7 @@ caveats to this use of name mangling: * The ``overloadable`` attribute has almost no meaning when used in C++, because names will already be mangled and functions are already overloadable. However, when an ``overloadable`` function occurs within an ``extern "C"`` - linkage specification, it's name *will* be mangled in the same way as it + linkage specification, its name *will* be mangled in the same way as it would in C. For the purpose of backwards compatibility, at most one function with the same @@ -1241,6 +1414,10 @@ Example usage: ``[[no_unique_address]]`` is a standard C++20 attribute. Clang supports its use in C++11 onwards. + +On MSVC targets, ``[[no_unique_address]]`` is ignored; use +``[[msvc::no_unique_address]]`` instead. Currently there is no guarantee of ABI +compatibility or stability with MSVC. }]; } @@ -1445,6 +1622,10 @@ attributes are ignored. Supported platforms are: Apple's watchOS operating system. The minimum deployment target is specified by the ``-mwatchos-version-min=*version*`` command-line argument. +``driverkit`` + Apple's DriverKit userspace kernel extensions. The minimum deployment target + is specified as part of the triple. + A declaration can typically be used even when deploying back to a platform version prior to when the declaration was introduced. When this happens, the declaration is `weakly linked @@ -1609,6 +1790,19 @@ defined_in=\ *string-literal* source containers are modules, so ``defined_in`` should specify the Swift module name. +USR=\ *string-literal* + String that specifies a unified symbol resolution (USR) value for this + declaration. USR string uniquely identifies this particular declaration, and + is typically used when constructing an index of a codebase. + The USR value in this attribute is expected to be generated by an external + compiler that compiled the native declaration using its original source + language. The exact format of the USR string and its other attributes + are determined by the specification of this declaration's source language. + When not specified, Clang's indexer will use the Clang USR for this symbol. + User can query to see if Clang supports the use of the ``USR`` clause in + the ``external_source_symbol`` attribute with + ``__has_attribute(external_source_symbol) >= 20230206``. + generated_declaration This declaration was automatically generated by some tool. @@ -1677,7 +1871,8 @@ The attribute may be applied to the declaration of a class, a typedef, a variable, a function or method, a function parameter, an enumeration, an enumerator, a non-static data member, or a label. -.. code-block: c++ +.. code-block:: c++ + #include <cassert> [[maybe_unused]] void f([[maybe_unused]] bool thing1, @@ -1706,7 +1901,8 @@ literal contents) are allowed. If there are redeclarations of the entity with differing string literals, it is unspecified which one will be used by Clang in any resulting diagnostics. -.. code-block: c++ +.. code-block:: c++ + struct [[nodiscard]] error_info { /*...*/ }; error_info enable_missile_safety_mode(); @@ -1723,7 +1919,8 @@ marked with ``[[nodiscard]]`` or a constructor of a type marked ``[[nodiscard]]`` will also diagnose. This also applies to type conversions that use the annotated ``[[nodiscard]]`` constructor or result in an annotated type. -.. code-block: c++ +.. code-block:: c++ + struct [[nodiscard]] marked_type {/*..*/ }; struct marked_ctor { [[nodiscard]] marked_ctor(); @@ -2012,6 +2209,71 @@ struct or union, similar to clang ``__builtin_preserve_access_index()``. }]; } +def BPFPreserveStaticOffsetDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +Clang supports the ``__attribute__((preserve_static_offset))`` +attribute for the BPF target. This attribute may be attached to a +struct or union declaration. Reading or writing fields of types having +such annotation is guaranteed to generate LDX/ST/STX instruction with +offset corresponding to the field. + +For example: + +.. code-block:: c + + struct foo { + int a; + int b; + }; + + struct bar { + int a; + struct foo b; + } __attribute__((preserve_static_offset)); + + void buz(struct bar *g) { + g->b.a = 42; + } + +The assignment to ``g``'s field would produce an ST instruction with +offset 8: ``*(u32)(r1 + 8) = 42;``. + +Without this attribute generated instructions might be different, +depending on optimizations behavior. E.g. the example above could be +rewritten as ``r1 += 8; *(u32)(r1 + 0) = 42;``. + }]; +} + +def BTFDeclTagDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +Clang supports the ``__attribute__((btf_decl_tag("ARGUMENT")))`` attribute for +all targets. This attribute may be attached to a struct/union, struct/union +field, function, function parameter, variable or typedef declaration. If -g is +specified, the ``ARGUMENT`` info will be preserved in IR and be emitted to +dwarf. For BPF targets, the ``ARGUMENT`` info will be emitted to .BTF ELF +section too. + }]; +} + +def BTFTypeTagDocs : Documentation { + let Category = DocCatType; + let Content = [{ +Clang supports the ``__attribute__((btf_type_tag("ARGUMENT")))`` attribute for +all targets. It only has effect when ``-g`` is specified on the command line and +is currently silently ignored when not applied to a pointer type (note: this +scenario may be diagnosed in the future). + +The ``ARGUMENT`` string will be preserved in IR and emitted to DWARF for the +types used in variable declarations, function declarations, or typedef +declarations. + +For BPF targets, the ``ARGUMENT`` string will also be emitted to .BTF ELF +section. + }]; +} + def MipsInterruptDocs : Documentation { let Category = DocCatFunction; let Heading = "interrupt (MIPS)"; @@ -2111,7 +2373,7 @@ as ``-mlong-calls`` and ``-mno-long-calls``. def RISCVInterruptDocs : Documentation { let Category = DocCatFunction; - let Heading = "interrupt (RISCV)"; + let Heading = "interrupt (RISC-V)"; let Content = [{ Clang supports the GNU style ``__attribute__((interrupt))`` attribute on RISCV targets. This attribute may be attached to a function definition and instructs @@ -2132,6 +2394,43 @@ Version 1.10. }]; } +def RISCVRVVVectorBitsDocs : Documentation { + let Category = DocCatType; + let Content = [{ +On RISC-V targets, the ``riscv_rvv_vector_bits(N)`` attribute is used to define +fixed-length variants of sizeless types. + +For example: + +.. code-block:: c + + #include <riscv_vector.h> + + #if defined(__riscv_v_fixed_vlen) + typedef vint8m1_t fixed_vint8m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen))); + #endif + +Creates a type ``fixed_vint8m1_t_t`` that is a fixed-length variant of +``vint8m1_t`` that contains exactly 512 bits. Unlike ``vint8m1_t``, this type +can be used in globals, structs, unions, and arrays, all of which are +unsupported for sizeless types. + +The attribute can be attached to a single RVV vector (such as ``vint8m1_t``). +The attribute will be rejected unless +``N==(__riscv_v_fixed_vlen*LMUL)``, the implementation defined feature macro that +is enabled under the ``-mrvv-vector-bits`` flag. ``__riscv_v_fixed_vlen`` can +only be a power of 2 between 64 and 65536. + +For types where LMUL!=1, ``__riscv_v_fixed_vlen`` needs to be scaled by the LMUL +of the type before passing to the attribute. + +For ``vbool*_t`` types, ``__riscv_v_fixed_vlen`` needs to be divided by the +number from the type name. For example, ``vbool8_t`` needs to use +``__riscv_v_fixed_vlen`` / 8. If the resulting value is not a multiple of 8, +the type is not supported for that value of ``__riscv_v_fixed_vlen``. +}]; +} + def AVRInterruptDocs : Documentation { let Category = DocCatFunction; let Heading = "interrupt (AVR)"; @@ -2176,9 +2475,12 @@ for the function. For X86, the attribute also allows ``tune="CPU"`` to optimize the generated code for the given CPU without changing the available instructions. -For AArch64, the attribute also allows the "branch-protection=<args>" option, -where the permissible arguments and their effect on code generation are the same -as for the command-line option ``-mbranch-protection``. +For AArch64, ``arch="Arch"`` will set the architecture, similar to the -march +command line options. ``cpu="CPU"`` can be used to select a specific cpu, +as per the ``-mcpu`` option, similarly for ``tune=``. The attribute also allows the +"branch-protection=<args>" option, where the permissible arguments and their +effect on code generation are the same as for the command-line option +``-mbranch-protection``. Example "subtarget features" from the x86 backend include: "mmx", "sse", "sse4.2", "avx", "xop" and largely correspond to the machine specific options handled by @@ -2205,6 +2507,73 @@ Additionally, a function may not become multiversioned after its first use. }]; } +def TargetVersionDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +For AArch64 target clang supports function multiversioning by +``__attribute__((target_version("OPTIONS")))`` attribute. When applied to a +function it instructs compiler to emit multiple function versions based on +``target_version`` attribute strings, which resolved at runtime depend on their +priority and target features availability. One of the versions is always +( implicitly or explicitly ) the ``default`` (fallback). Attribute strings can +contain dependent features names joined by the "+" sign. +}]; +} + +def TargetClonesDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +Clang supports the ``target_clones("OPTIONS")`` attribute. This attribute may be +attached to a function declaration and causes function multiversioning, where +multiple versions of the function will be emitted with different code +generation options. Additionally, these versions will be resolved at runtime +based on the priority of their attribute options. All ``target_clone`` functions +are considered multiversioned functions. + +For AArch64 target: +The attribute contains comma-separated strings of target features joined by "+" +sign. For example: + + .. code-block:: c++ + + __attribute__((target_clones("sha2+memtag2", "fcma+sve2-pmull128"))) + void foo() {} + +For every multiversioned function a ``default`` (fallback) implementation +always generated if not specified directly. + +For x86/x86-64 targets: +All multiversioned functions must contain a ``default`` (fallback) +implementation, otherwise usages of the function are considered invalid. +Additionally, a function may not become multiversioned after its first use. + +The options to ``target_clones`` can either be a target-specific architecture +(specified as ``arch=CPU``), or one of a list of subtarget features. + +Example "subtarget features" from the x86 backend include: "mmx", "sse", "sse4.2", +"avx", "xop" and largely correspond to the machine specific options handled by +the front end. + +The versions can either be listed as a comma-separated sequence of string +literals or as a single string literal containing a comma-separated list of +versions. For compatibility with GCC, the two formats can be mixed. For +example, the following will emit 4 versions of the function: + + .. code-block:: c++ + + __attribute__((target_clones("arch=atom,avx2","arch=ivybridge","default"))) + void foo() {} + +For targets that support the GNU indirect function (IFUNC) feature, dispatch +is performed by emitting an indirect function that is resolved to the appropriate +target clone at load time. The indirect function is given the name the +multiversioned function would have if it had been declared without the attribute. +For backward compatibility with earlier Clang releases, a function alias with an +``.ifunc`` suffix is also emitted. The ``.ifunc`` suffixed symbol is a deprecated +feature and support for it may be removed in the future. +}]; +} + def MinVectorWidthDocs : Documentation { let Category = DocCatFunction; let Content = [{ @@ -2302,8 +2671,9 @@ An error will be given if: - Specified values violate subtarget specifications; - Specified values are not compatible with values provided through other attributes; - - The AMDGPU target backend is unable to create machine code that can meet the - request. + +The AMDGPU target backend will emit a warning whenever it is unable to +create machine code that meets the request. }]; } @@ -2378,6 +2748,32 @@ the Arm Developer website. }]; } +def AArch64SVEPcsDocs : Documentation { + let Category = DocCatCallingConvs; + let Content = [{ +On AArch64 targets, this attribute changes the calling convention of a +function to preserve additional Scalable Vector registers and Scalable +Predicate registers relative to the default calling convention used for +AArch64. + +This means it is more efficient to call such functions from code that performs +extensive scalable vector and scalable predicate calculations, because fewer +live SVE registers need to be saved. This property makes it well-suited for SVE +math library functions, which are typically leaf functions that require a small +number of registers. + +However, using this attribute also means that it is more expensive to call +a function that adheres to the default calling convention from within such +a function. Therefore, it is recommended that this attribute is only used +for leaf functions. + +For more information, see the documentation for `aarch64_sve_pcs` in the +ARM C Language Extension (ACLE) documentation. + +.. _`aarch64_sve_pcs`: https://github.com/ARM-software/acle/blob/main/main/acle.md#scalable-vector-extension-procedure-call-standard-attribute + }]; +} + def RegparmDocs : Documentation { let Category = DocCatCallingConvs; let Content = [{ @@ -2442,7 +2838,7 @@ On x86 targets, this attribute changes the calling convention to as possible in registers. It also tries to utilize registers for the return value whenever it is possible. -.. _`__regcall`: https://software.intel.com/en-us/node/693069 +.. _`__regcall`: https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-2/c-c-sycl-calling-conventions.html }]; } @@ -2486,6 +2882,18 @@ See the documentation for `__vectorcall`_ on MSDN for more details. }]; } +def M68kRTDDocs : Documentation { + let Category = DocCatCallingConvs; + let Content = [{ +On M68k targets, this attribute changes the calling convention of a function +to clear parameters off the stack on return. In other words, callee is +responsible for cleaning out the stack space allocated for incoming paramters. +This convention does not support variadic calls or unprototyped functions in C. +When targeting M68010 or newer CPUs, this calling convention is implemented +using the `rtd` instruction. + }]; +} + def DocCatConsumed : DocumentationCategory<"Consumed Annotation Checking"> { let Content = [{ Clang supports additional attributes for checking basic resource management @@ -2592,6 +3000,18 @@ full list of supported sanitizer flags. }]; } +def DisableSanitizerInstrumentationDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +Use the ``disable_sanitizer_instrumentation`` attribute on a function, +Objective-C method, or global variable, to specify that no sanitizer +instrumentation should be applied. + +This is not the same as ``__attribute__((no_sanitize(...)))``, which depending +on the tool may still insert instrumentation to prevent false positive reports. + }]; +} + def NoSanitizeAddressDocs : Documentation { let Category = DocCatFunction; // This function has multiple distinct spellings, and so it requires a custom @@ -2873,8 +3293,8 @@ def FormatDocs : Documentation { let Content = [{ Clang supports the ``format`` attribute, which indicates that the function -accepts a ``printf`` or ``scanf``-like format string and corresponding -arguments or a ``va_list`` that contains these arguments. +accepts (among other possibilities) a ``printf`` or ``scanf``-like format string +and corresponding arguments or a ``va_list`` that contains these arguments. Please see `GCC documentation about format attribute <http://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html>`_ to find details @@ -2928,6 +3348,39 @@ Clang implements two kinds of checks with this attribute. In this case Clang does not warn because the format string ``s`` and the corresponding arguments are annotated. If the arguments are incorrect, the caller of ``foo`` will receive a warning. + +As an extension to GCC's behavior, Clang accepts the ``format`` attribute on +non-variadic functions. Clang checks non-variadic format functions for the same +classes of issues that can be found on variadic functions, as controlled by the +same warning flags, except that the types of formatted arguments is forced by +the function signature. For example: + +.. code-block:: c + + __attribute__((__format__(__printf__, 1, 2))) + void fmt(const char *s, const char *a, int b); + + void bar(void) { + fmt("%s %i", "hello", 123); // OK + fmt("%i %g", "hello", 123); // warning: arguments don't match format + extern const char *fmt; + fmt(fmt, "hello", 123); // warning: format string is not a string literal + } + +When using the format attribute on a variadic function, the first data parameter +_must_ be the index of the ellipsis in the parameter list. Clang will generate +a diagnostic otherwise, as it wouldn't be possible to forward that argument list +to `printf`-family functions. For instance, this is an error: + +.. code-block:: c + + __attribute__((__format__(__printf__, 1, 2))) + void fmt(const char *s, int b, ...); + // ^ error: format attribute parameter 3 is out of bounds + // (must be __printf__, 1, 3) + +Using the ``format`` attribute on a non-variadic function emits a GCC +compatibility diagnostic. }]; } @@ -3152,6 +3605,9 @@ If a type is trivial for the purposes of calls, has a non-trivial destructor, and is passed as an argument by value, the convention is that the callee will destroy the object before returning. +If a type is trivial for the purpose of calls, it is assumed to be trivially +relocatable for the purpose of ``__is_trivially_relocatable``. + Attribute ``trivial_abi`` has no effect in the following cases: - The class directly declares a virtual base or virtual methods. @@ -3168,7 +3624,7 @@ Attribute ``trivial_abi`` has no effect in the following cases: def MSInheritanceDocs : Documentation { let Category = DocCatDecl; - let Heading = "__single_inhertiance, __multiple_inheritance, __virtual_inheritance"; + let Heading = "__single_inheritance, __multiple_inheritance, __virtual_inheritance"; let Content = [{ This collection of keywords is enabled under ``-fms-extensions`` and controls the pointer-to-member representation used on ``*-*-win32`` targets. @@ -3213,6 +3669,21 @@ an error: }]; } +def MSConstexprDocs : Documentation { + let Category = DocCatStmt; + let Content = [{ +The ``[[msvc::constexpr]]`` attribute can be applied only to a function +definition or a ``return`` statement. It does not impact function declarations. +A ``[[msvc::constexpr]]`` function cannot be ``constexpr`` or ``consteval``. +A ``[[msvc::constexpr]]`` function is treated as if it were a ``constexpr`` function +when it is evaluated in a constant context of ``[[msvc::constexpr]] return`` statement. +Otherwise, it is treated as a regular function. + +Semantics of this attribute are enabled only under MSVC compatibility +(``-fms-compatibility-version``) 19.33 and later. + }]; +} + def MSNoVTableDocs : Documentation { let Category = DocCatDecl; let Content = [{ @@ -3301,7 +3772,7 @@ Specifying ``#pragma nounroll`` indicates that the loop should not be unrolled: } ``#pragma unroll`` and ``#pragma unroll _value_`` have identical semantics to -``#pragma clang loop unroll(full)`` and +``#pragma clang loop unroll(enable)`` and ``#pragma clang loop unroll_count(_value_)`` respectively. ``#pragma nounroll`` is equivalent to ``#pragma clang loop unroll(disable)``. See `language extensions @@ -3577,7 +4048,7 @@ Whether a particular pointer may be "null" is an important concern when working with pointers in the C family of languages. The various nullability attributes indicate whether a particular pointer can be null or not, which makes APIs more expressive and can help static analysis tools identify bugs involving null -pointers. Clang supports several kinds of nullability attributes: the +pointers. Clang supports several kinds of nullability attributes: the ``nonnull`` and ``returns_nonnull`` attributes indicate which function or method parameters and result types can never be null, while nullability type qualifiers indicate which pointer types can be null (``_Nullable``) or cannot @@ -3670,10 +4141,10 @@ completion handler in a Swift async method. For instance, here: This method asynchronously calls ``completionHandler`` when the data is available, or calls it with an error. ``_Nullable_result`` indicates to the Swift importer that this is the uncommon case where ``result`` can get ``nil`` -even if no error has occured, and will therefore import it as a Swift optional +even if no error has occurred, and will therefore import it as a Swift optional type. Otherwise, if ``result`` was annotated with ``_Nullable``, the Swift importer will assume that ``result`` will always be non-nil unless an error -occured. +occurred. }]; } @@ -3753,7 +4224,7 @@ memory is not available rather than returning a null pointer: The ``returns_nonnull`` attribute implies that returning a null pointer is undefined behavior, which the optimizer may take advantage of. The ``_Nonnull`` type qualifier indicates that a pointer cannot be null in a more general manner -(because it is part of the type system) and does not imply undefined behavior, +(because it is part of the type system) and does not imply undefined behavior, making it more widely applicable }]; } @@ -4112,6 +4583,7 @@ Clang provides the following context selector extensions, used via match_none disable_implicit_base allow_templates + bind_to_declaration The match extensions change when the *entire* context selector is considered a match for an OpenMP context. The default is ``all``, with ``none`` no trait in the @@ -4127,8 +4599,9 @@ The allow extensions change when the ``begin declare variant`` effect is applied to a definition. If ``allow_templates`` is given, template function definitions are considered as specializations of existing or assumed template declarations with the same name. The template parameters for the base functions -are used to instantiate the specialization. - +are used to instantiate the specialization. If ``bind_to_declaration`` is given, +apply the same variant rules to function declarations. This allows the user to +override declarations with only a function declaration. }]; } @@ -4185,8 +4658,10 @@ spelled "XYZ" in the `OpenMP 5.1 Standard`_). def NoStackProtectorDocs : Documentation { let Category = DocCatFunction; + let Heading = "no_stack_protector, safebuffers"; let Content = [{ -Clang supports the ``__attribute__((no_stack_protector))`` attribute which disables +Clang supports the GNU style ``__attribute__((no_stack_protector))`` and Microsoft +style ``__declspec(safebuffers)`` attribute which disables the stack protector on the specified function. This attribute is useful for selectively disabling the stack protector on some functions when building with ``-fstack-protector`` compiler option. @@ -4205,6 +4680,27 @@ option. }]; } +def StrictGuardStackCheckDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +Clang supports the Microsoft style ``__declspec((strict_gs_check))`` attribute +which upgrades the stack protector check from ``-fstack-protector`` to +``-fstack-protector-strong``. + +For example, it upgrades the stack protector for the function ``foo`` to +``-fstack-protector-strong`` but function ``bar`` will still be built with the +stack protector with the ``-fstack-protector`` option. + +.. code-block:: c + + __declspec((strict_gs_check)) + int foo(int x); // stack protection will be upgraded for foo. + + int bar(int y); // bar can be built with the standard stack protector checks. + + }]; +} + def NotTailCalledDocs : Documentation { let Category = DocCatFunction; let Content = [{ @@ -4270,6 +4766,16 @@ guaranteed to not throw an exception. }]; } +def NoUwtableDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +Clang supports the ``nouwtable`` attribute which skips emitting +the unwind table entry for the specified function. This attribute is useful for +selectively emitting the unwind table entry on some functions when building with +``-funwind-tables`` compiler option. + }]; +} + def InternalLinkageDocs : Documentation { let Category = DocCatFunction; let Content = [{ @@ -4383,6 +4889,54 @@ Marking virtual functions as ``disable_tail_calls`` is legal. }]; } +def AnyX86InterruptDocs : Documentation { + let Category = DocCatFunction; + let Heading = "interrupt (X86)"; + let Content = [{ +Clang supports the GNU style ``__attribute__((interrupt))`` attribute on X86 +targets. This attribute may be attached to a function definition and instructs +the backend to generate appropriate function entry/exit code so that it can be +used directly as an interrupt service routine. + +Interrupt handlers have access to the stack frame pushed onto the stack by the processor, +and return using the ``IRET`` instruction. All registers in an interrupt handler are callee-saved. +Exception handlers also have access to the error code pushed onto the stack by the processor, +when applicable. + +An interrupt handler must take the following arguments: + + .. code-block:: c + + __attribute__ ((interrupt)) + void f (struct stack_frame *frame) { + ... + } + + Where ``struct stack_frame`` is a suitable struct matching the stack frame pushed by the + processor. + +An exception handler must take the following arguments: + + .. code-block:: c + + __attribute__ ((interrupt)) + void g (struct stack_frame *frame, unsigned long code) { + ... + } + + On 32-bit targets, the ``code`` argument should be of type ``unsigned int``. + +Exception handlers should only be used when an error code is pushed by the processor. +Using the incorrect handler type will crash the system. + +Interrupt and exception handlers cannot be called by other functions and must have return type ``void``. + +Interrupt and exception handlers should only call functions with the 'no_caller_saved_registers' +attribute, or should be compiled with the '-mgeneral-regs-only' flag to avoid saving unused +non-GPR registers. + }]; +} + def AnyX86NoCallerSavedRegistersDocs : Documentation { let Category = DocCatFunction; let Content = [{ @@ -4397,6 +4951,10 @@ The user can call functions specified with the 'no_caller_saved_registers' attribute from an interrupt handler without saving and restoring all call-clobbered registers. +Functions specified with the 'no_caller_saved_registers' attribute should only +call other functions with the 'no_caller_saved_registers' attribute, or should be +compiled with the '-mgeneral-regs-only' flag to avoid saving unused non-GPR registers. + Note that 'no_caller_saved_registers' attribute is not a calling convention. In fact, it only overrides the decision of which registers should be saved by the caller, but not how the parameters are passed from the caller to the callee. @@ -4721,7 +5279,74 @@ the ``int`` parameter is the one that represents the error. def SuppressDocs : Documentation { let Category = DocCatStmt; let Content = [{ -The ``[[gsl::suppress]]`` attribute suppresses specific +The ``suppress`` attribute suppresses unwanted warnings coming from static +analysis tools such as the Clang Static Analyzer. The tool will not report +any issues in source code annotated with the attribute. + +The attribute cannot be used to suppress traditional Clang warnings, because +many such warnings are emitted before the attribute is fully parsed. +Consider using ``#pragma clang diagnostic`` to control such diagnostics, +as described in `Controlling Diagnostics via Pragmas +<https://clang.llvm.org/docs/UsersManual.html#controlling-diagnostics-via-pragmas>`_. + +The ``suppress`` attribute can be placed on an individual statement in order to +suppress warnings about undesirable behavior occurring at that statement: + +.. code-block:: c++ + + int foo() { + int *x = nullptr; + ... + [[clang::suppress]] + return *x; // null pointer dereference warning suppressed here + } + +Putting the attribute on a compound statement suppresses all warnings in scope: + +.. code-block:: c++ + + int foo() { + [[clang::suppress]] { + int *x = nullptr; + ... + return *x; // warnings suppressed in the entire scope + } + } + +Some static analysis warnings are accompanied by one or more notes, and the +line of code against which the warning is emitted isn't necessarily the best +for suppression purposes. In such cases the tools are allowed to implement +additional ways to suppress specific warnings based on the attribute attached +to a note location. + +For example, the Clang Static Analyzer suppresses memory leak warnings when +the suppression attribute is placed at the allocation site (highlited by +a "note: memory is allocated"), which may be different from the line of code +at which the program "loses track" of the pointer (where the warning +is ultimately emitted): + +.. code-block:: c + + int bar1(bool coin_flip) { + __attribute__((suppress)) + int *result = (int *)malloc(sizeof(int)); + if (coin_flip) + return 1; // warning about this leak path is suppressed + + return *result; // warning about this leak path is also suppressed + } + + int bar2(bool coin_flip) { + int *result = (int *)malloc(sizeof(int)); + if (coin_flip) + return 1; // leak warning on this path NOT suppressed + + __attribute__((suppress)) + return *result; // leak warning is suppressed only on this path + } + + +When written as ``[[gsl::suppress]]``, this attribute suppresses specific clang-tidy diagnostics for rules of the `C++ Core Guidelines`_ in a portable way. The attribute can be attached to declarations, statements, and at namespace scope. @@ -4799,6 +5424,12 @@ general this requires the template to be declared at least twice. For example: clang::preferred_name(wstring)]] basic_string { // ... }; + + +Note that the ``preferred_name`` attribute will be ignored when the compiler +writes a C++20 Module interface now. This is due to a compiler issue +(https://github.com/llvm/llvm-project/issues/56490) that blocks users to modularize +declarations with `preferred_name`. This is intended to be fixed in the future. }]; } @@ -4819,6 +5450,9 @@ apply for values returned in callee-saved registers. R11. R11 can be used as a scratch register. Floating-point registers (XMMs/YMMs) are not preserved and need to be saved by the caller. +- On AArch64 the callee preserve all general purpose registers, except X0-X8 and + X16-X18. + The idea behind this convention is to support calls to runtime functions that have a hot path and a cold path. The hot path is usually a small piece of code that doesn't use many registers. The cold path might need to call out to @@ -4859,6 +5493,10 @@ returned in callee-saved registers. R11. R11 can be used as a scratch register. Furthermore it also preserves all floating-point registers (XMMs/YMMs). +- On AArch64 the callee preserve all general purpose registers, except X0-X8 and + X16-X18. Furthermore it also preserves lower 128 bits of V8-V31 SIMD - floating + point registers. + The idea behind this convention is to support calls to runtime functions that don't need to call out to any other functions. @@ -4909,7 +5547,9 @@ considered inline. Not all targets support this attribute. ELF target support depends on both the linker and runtime linker, and is available in at least lld 4.0 and later, binutils 2.20.1 and later, glibc v2.11.1 and later, and FreeBSD 9.1 and later. -Non-ELF targets currently do not support this attribute. +Mach-O targets support it, but with slightly different semantics: the resolver +is run at first call, instead of at load time by the runtime linker. Targets +other than ELF and Mach-O currently do not support this attribute. }]; } @@ -4968,10 +5608,25 @@ takes precedence over the command line option ``-fpatchable-function-entry=N,M`` ``M`` defaults to 0 if omitted. This attribute is only supported on -aarch64/aarch64-be/riscv32/riscv64/i386/x86-64 targets. +aarch64/aarch64-be/loongarch32/loongarch64/riscv32/riscv64/i386/x86-64 targets. }]; } +def HotFunctionEntryDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +``__attribute__((hot))`` marks a function as hot, as a manual alternative to PGO hotness data. +If PGO data is available, the annotation ``__attribute__((hot))`` overrides the profile count based hotness (unlike ``__attribute__((cold))``). +}]; +} + +def ColdFunctionEntryDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +``__attribute__((cold))`` marks a function as cold, as a manual alternative to PGO hotness data. +If PGO data is available, the profile count based hotness overrides the ``__attribute__((cold))`` annotation (unlike ``__attribute__((hot))``). +}]; +} def TransparentUnionDocs : Documentation { let Category = DocCatDecl; let Content = [{ @@ -5242,12 +5897,12 @@ accessed. The following are examples of valid expressions where may not be diagn ``noderef`` is currently only supported for pointers and arrays and not usable for references or Objective-C object pointers. -.. code-block: c++ +.. code-block:: c++ int x = 2; int __attribute__((noderef)) &y = x; // warning: 'noderef' can only be used on an array or pointer type -.. code-block: objc +.. code-block:: objc id __attribute__((noderef)) obj = [NSObject new]; // warning: 'noderef' can only be used on an array or pointer type }]; @@ -5444,7 +6099,7 @@ by showing the control-flow statement where the path diverges. if (somePredicate()) { ... callback(); - } esle { + } else { callback(); // OK: callback is called on every path } } @@ -5615,6 +6270,15 @@ attribute can also be written using C++11 syntax: ``[[mig::server_routine]]``. }]; } +def MinSizeDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +This function attribute indicates that optimization passes and code generator passes +make choices that keep the function code size as small as possible. Optimizations may +also sacrifice runtime performance in order to minimize the size of the generated code. + }]; +} + def MSAllocatorDocs : Documentation { let Category = DocCatFunction; let Content = [{ @@ -5637,15 +6301,15 @@ def CFGuardDocs : Documentation { let Content = [{ Code can indicate CFG checks are not wanted with the ``__declspec(guard(nocf))`` attribute. This directs the compiler to not insert any CFG checks for the entire -function. This approach is typically used only sparingly in specific situations -where the programmer has manually inserted "CFG-equivalent" protection. The -programmer knows that they are calling through some read-only function table -whose address is obtained through read-only memory references and for which the -index is masked to the function table limit. This approach may also be applied -to small wrapper functions that are not inlined and that do nothing more than -make a call through a function pointer. Since incorrect usage of this directive -can compromise the security of CFG, the programmer must be very careful using -the directive. Typically, this usage is limited to very small functions that +function. This approach is typically used only sparingly in specific situations +where the programmer has manually inserted "CFG-equivalent" protection. The +programmer knows that they are calling through some read-only function table +whose address is obtained through read-only memory references and for which the +index is masked to the function table limit. This approach may also be applied +to small wrapper functions that are not inlined and that do nothing more than +make a call through a function pointer. Since incorrect usage of this directive +can compromise the security of CFG, the programmer must be very careful using +the directive. Typically, this usage is limited to very small functions that only call one function. `Control Flow Guard documentation <https://docs.microsoft.com/en-us/windows/win32/secbp/pe-metadata>` @@ -5782,9 +6446,6 @@ attribute `clang_builtin_alias`. def NoBuiltinDocs : Documentation { let Category = DocCatFunction; let Content = [{ -.. Note:: This attribute is not yet fully implemented, it is validated but has - no effect on the generated code. - The ``__attribute__((no_builtin))`` is similar to the ``-fno-builtin`` flag except it is specific to the body of a function. The attribute may also be applied to a virtual function but has no effect on the behavior of overriding @@ -5831,7 +6492,7 @@ deferring any errors to the point of use. For instance: does_not_exist x; // error: use of unresolved 'using_if_exists' -The C++ spelling of the attribte (`[[clang::using_if_exists]]`) is also +The C++ spelling of the attribute (`[[clang::using_if_exists]]`) is also supported as a clang extension, since ISO C++ doesn't support attributes in this position. If the entity referred to by the using-declaration is found by name lookup, the attribute has no effect. This attribute is useful for libraries @@ -5859,19 +6520,21 @@ def AcquireHandleDocs : Documentation { If this annotation is on a function or a function type it is assumed to return a new handle. In case this annotation is on an output parameter, the function is assumed to fill the corresponding argument with a new -handle. +handle. The attribute requires a string literal argument which used to +identify the handle with later uses of ``use_handle`` or +``release_handle``. .. code-block:: c++ // Output arguments from Zircon. zx_status_t zx_socket_create(uint32_t options, - zx_handle_t __attribute__((acquire_handle)) * out0, - zx_handle_t* out1 [[clang::acquire_handle]]); + zx_handle_t __attribute__((acquire_handle("zircon"))) * out0, + zx_handle_t* out1 [[clang::acquire_handle("zircon")]]); // Returned handle. - [[clang::acquire_handle]] int open(const char *path, int oflag, ... ); - int open(const char *path, int oflag, ... ) __attribute__((acquire_handle)); + [[clang::acquire_handle("tag")]] int open(const char *path, int oflag, ... ); + int open(const char *path, int oflag, ... ) __attribute__((acquire_handle("tag"))); }]; } @@ -5879,12 +6542,13 @@ def UseHandleDocs : Documentation { let Category = HandleDocs; let Content = [{ A function taking a handle by value might close the handle. If a function -parameter is annotated with ``use_handle`` it is assumed to not to change +parameter is annotated with ``use_handle(tag)`` it is assumed to not to change the state of the handle. It is also assumed to require an open handle to work with. +The attribute requires a string literal argument to identify the handle being used. .. code-block:: c++ - zx_status_t zx_port_wait(zx_handle_t handle [[clang::use_handle]], + zx_status_t zx_port_wait(zx_handle_t handle [[clang::use_handle("zircon")]], zx_time_t deadline, zx_port_packet_t* packet); }]; @@ -5893,15 +6557,139 @@ the state of the handle. It is also assumed to require an open handle to work wi def ReleaseHandleDocs : Documentation { let Category = HandleDocs; let Content = [{ -If a function parameter is annotated with ``release_handle`` it is assumed to -close the handle. It is also assumed to require an open handle to work with. +If a function parameter is annotated with ``release_handle(tag)`` it is assumed to +close the handle. It is also assumed to require an open handle to work with. The +attribute requires a string literal argument to identify the handle being released. .. code-block:: c++ - zx_status_t zx_handle_close(zx_handle_t handle [[clang::release_handle]]); + zx_status_t zx_handle_close(zx_handle_t handle [[clang::release_handle("tag")]]); }]; } +def UnsafeBufferUsageDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +The attribute ``[[clang::unsafe_buffer_usage]]`` should be placed on functions +that need to be avoided as they are prone to buffer overflows. It is designed to +work together with the off-by-default compiler warning ``-Wunsafe-buffer-usage`` +to help codebases transition away from raw pointer based buffer management, +in favor of safer abstractions such as C++20 ``std::span``. The attribute causes +``-Wunsafe-buffer-usage`` to warn on every use of the function, and it may +enable ``-Wunsafe-buffer-usage`` to emit automatic fix-it hints +which would help the user replace such unsafe functions with safe +alternatives, though the attribute can be used even when the fix can't be automated. + +The attribute does not suppress ``-Wunsafe-buffer-usage`` inside the function +to which it is attached. These warnings still need to be addressed. + +The attribute is warranted even if the only way a function can overflow +the buffer is by violating the function's preconditions. For example, it +would make sense to put the attribute on function ``foo()`` below because +passing an incorrect size parameter would cause a buffer overflow: + +.. code-block:: c++ + + [[clang::unsafe_buffer_usage]] + void foo(int *buf, size_t size) { + for (size_t i = 0; i < size; ++i) { + buf[i] = i; + } + } + +The attribute is NOT warranted when the function uses safe abstractions, +assuming that these abstractions weren't misused outside the function. +For example, function ``bar()`` below doesn't need the attribute, +because assuming that the container ``buf`` is well-formed (has size that +fits the original buffer it refers to), overflow cannot occur: + +.. code-block:: c++ + + void bar(std::span<int> buf) { + for (size_t i = 0; i < buf.size(); ++i) { + buf[i] = i; + } + } + +In this case function ``bar()`` enables the user to keep the buffer +"containerized" in a span for as long as possible. On the other hand, +Function ``foo()`` in the previous example may have internal +consistency, but by accepting a raw buffer it requires the user to unwrap +their span, which is undesirable according to the programming model +behind ``-Wunsafe-buffer-usage``. + +The attribute is warranted when a function accepts a raw buffer only to +immediately put it into a span: + +.. code-block:: c++ + + [[clang::unsafe_buffer_usage]] + void baz(int *buf, size_t size) { + std::span<int> sp{ buf, size }; + for (size_t i = 0; i < sp.size(); ++i) { + sp[i] = i; + } + } + +In this case ``baz()`` does not contain any unsafe operations, but the awkward +parameter type causes the caller to unwrap the span unnecessarily. +Note that regardless of the attribute, code inside ``baz()`` isn't flagged +by ``-Wunsafe-buffer-usage`` as unsafe. It is definitely undesirable, +but if ``baz()`` is on an API surface, there is no way to improve it +to make it as safe as ``bar()`` without breaking the source and binary +compatibility with existing users of the function. In such cases +the proper solution would be to create a different function (possibly +an overload of ``baz()``) that accepts a safe container like ``bar()``, +and then use the attribute on the original ``baz()`` to help the users +update their code to use the new function. + }]; +} + +def DiagnoseAsBuiltinDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +The ``diagnose_as_builtin`` attribute indicates that Fortify diagnostics are to +be applied to the declared function as if it were the function specified by the +attribute. The builtin function whose diagnostics are to be mimicked should be +given. In addition, the order in which arguments should be applied must also +be given. + +For example, the attribute can be used as follows. + +.. code-block:: c + + __attribute__((diagnose_as_builtin(__builtin_memset, 3, 2, 1))) + void *mymemset(int n, int c, void *s) { + // ... + } + +This indicates that calls to ``mymemset`` should be diagnosed as if they were +calls to ``__builtin_memset``. The arguments ``3, 2, 1`` indicate by index the +order in which arguments of ``mymemset`` should be applied to +``__builtin_memset``. The third argument should be applied first, then the +second, and then the first. Thus (when Fortify warnings are enabled) the call +``mymemset(n, c, s)`` will diagnose overflows as if it were the call +``__builtin_memset(s, c, n)``. + +For variadic functions, the variadic arguments must come in the same order as +they would to the builtin function, after all normal arguments. For instance, +to diagnose a new function as if it were `sscanf`, we can use the attribute as +follows. + +.. code-block:: c + + __attribute__((diagnose_as_builtin(sscanf, 1, 2))) + int mysscanf(const char *str, const char *format, ...) { + // ... + } + +Then the call `mysscanf("abc def", "%4s %4s", buf1, buf2)` will be diagnosed as +if it were the call `sscanf("abc def", "%4s %4s", buf1, buf2)`. + +This attribute cannot be applied to non-static member functions. +}]; +} + def ArmSveVectorBitsDocs : Documentation { let Category = DocCatType; let Content = [{ @@ -6002,13 +6790,234 @@ Requirements on Development Tools - Engineering Specification Documentation }]; } +def DocCatArmSmeAttributes : DocumentationCategory<"AArch64 SME Attributes"> { + let Content = [{ +Clang supports a number of AArch64-specific attributes to manage state +added by the Scalable Matrix Extension (SME). This state includes the +runtime mode that the processor is in (e.g. non-streaming or streaming) +as well as the state of the ``ZA`` Matrix Storage. + +The attributes come in the form of type- and declaration attributes: + +* The SME declaration attributes can appear anywhere that a standard + ``[[...]]`` declaration attribute can appear. + +* The SME type attributes apply only to prototyped functions and can appear + anywhere that a standard ``[[...]]`` type attribute can appear. The SME + type attributes do not apply to functions having a K&R-style + unprototyped function type. + +See `Arm C Language Extensions <https://github.com/ARM-software/acle>`_ +for more details about the features related to the SME extension. + +See `Procedure Call Standard for the Arm® 64-bit Architecture (AArch64) +<https://github.com/ARM-software/abi-aa>`_ for more details about +streaming-interface functions and shared/private-ZA interface functions. + }]; +} + +def ArmSmeStreamingDocs : Documentation { + let Category = DocCatArmSmeAttributes; + let Content = [{ +The ``__arm_streaming`` keyword applies to prototyped function types and specifies +that the function has a "streaming interface". This means that: + +* the function requires that the processor implements the Scalable Matrix + Extension (SME). + +* the function must be entered in streaming mode (that is, with PSTATE.SM + set to 1) + +* the function must return in streaming mode + +Clang manages PSTATE.SM automatically; it is not the source code's +responsibility to do this. For example, if a non-streaming +function calls an ``__arm_streaming`` function, Clang generates code +that switches into streaming mode before calling the function and +switches back to non-streaming mode on return. + }]; +} + +def ArmSmeStreamingCompatibleDocs : Documentation { + let Category = DocCatArmSmeAttributes; + let Content = [{ +The ``__arm_streaming_compatible`` keyword applies to prototyped function types and +specifies that the function has a "streaming compatible interface". This +means that: + +* the function may be entered in either non-streaming mode (PSTATE.SM=0) or + in streaming mode (PSTATE.SM=1). + +* the function must return in the same mode as it was entered. + +* the code executed in the function is compatible with either mode. + +Clang manages PSTATE.SM automatically; it is not the source code's +responsibility to do this. Clang will ensure that the generated code in +streaming-compatible functions is valid in either mode (PSTATE.SM=0 or +PSTATE.SM=1). For example, if an ``__arm_streaming_compatible`` function calls a +non-streaming function, Clang generates code to temporarily switch out of streaming +mode before calling the function and switch back to streaming-mode on return if +``PSTATE.SM`` is ``1`` on entry of the caller. If ``PSTATE.SM`` is ``0`` on +entry to the ``__arm_streaming_compatible`` function, the call will be executed +without changing modes. + }]; +} + +def ArmInDocs : Documentation { + let Category = DocCatArmSmeAttributes; + let Content = [{ +The ``__arm_in`` keyword applies to prototyped function types and specifies +that the function shares a given state S with its caller. For ``__arm_in``, the +function takes the state S as input and returns with the state S unchanged. + +The attribute takes string arguments to instruct the compiler which state +is shared. The supported states for S are: + +* ``"za"`` for Matrix Storage (requires SME) + +The attributes ``__arm_in(S)``, ``__arm_out(S)``, ``__arm_inout(S)`` and +``__arm_preserves(S)`` are all mutually exclusive for the same state S. + }]; +} + +def ArmOutDocs : Documentation { + let Category = DocCatArmSmeAttributes; + let Content = [{ +The ``__arm_out`` keyword applies to prototyped function types and specifies +that the function shares a given state S with its caller. For ``__arm_out``, +the function ignores the incoming state for S and returns new state for S. + +The attribute takes string arguments to instruct the compiler which state +is shared. The supported states for S are: + +* ``"za"`` for Matrix Storage (requires SME) + +The attributes ``__arm_in(S)``, ``__arm_out(S)``, ``__arm_inout(S)`` and +``__arm_preserves(S)`` are all mutually exclusive for the same state S. + }]; +} + +def ArmInOutDocs : Documentation { + let Category = DocCatArmSmeAttributes; + let Content = [{ +The ``__arm_inout`` keyword applies to prototyped function types and specifies +that the function shares a given state S with its caller. For ``__arm_inout``, +the function takes the state S as input and returns new state for S. + +The attribute takes string arguments to instruct the compiler which state +is shared. The supported states for S are: + +* ``"za"`` for Matrix Storage (requires SME) + +The attributes ``__arm_in(S)``, ``__arm_out(S)``, ``__arm_inout(S)`` and +``__arm_preserves(S)`` are all mutually exclusive for the same state S. + }]; +} + +def ArmPreservesDocs : Documentation { + let Category = DocCatArmSmeAttributes; + let Content = [{ +The ``__arm_preserves`` keyword applies to prototyped function types and +specifies that the function does not read a given state S and returns +with state S unchanged. + +The attribute takes string arguments to instruct the compiler which state +is shared. The supported states for S are: + +* ``"za"`` for Matrix Storage (requires SME) + +The attributes ``__arm_in(S)``, ``__arm_out(S)``, ``__arm_inout(S)`` and +``__arm_preserves(S)`` are all mutually exclusive for the same state S. + }]; +} + +def ArmSmeLocallyStreamingDocs : Documentation { + let Category = DocCatArmSmeAttributes; + let Content = [{ +The ``__arm_locally_streaming`` keyword applies to function declarations +and specifies that all the statements in the function are executed in +streaming mode. This means that: + +* the function requires that the target processor implements the Scalable Matrix + Extension (SME). + +* the program automatically puts the machine into streaming mode before + executing the statements and automatically restores the previous mode + afterwards. + +Clang manages PSTATE.SM automatically; it is not the source code's +responsibility to do this. For example, Clang will emit code to enable +streaming mode at the start of the function, and disable streaming mode +at the end of the function. + }]; +} + +def ArmNewDocs : Documentation { + let Category = DocCatArmSmeAttributes; + let Content = [{ +The ``__arm_new`` keyword applies to function declarations and specifies +that the function will create a new scope for state S. + +The attribute takes string arguments to instruct the compiler for which state +to create new scope. The supported states for S are: + +* ``"za"`` for Matrix Storage (requires SME) + +For state ``"za"``, this means that: + +* the function requires that the target processor implements the Scalable Matrix + Extension (SME). + +* the function will commit any lazily saved ZA data. + +* the function will create a new ZA context and enable PSTATE.ZA. + +* the function will disable PSTATE.ZA (by setting it to 0) before returning. + +For ``__arm_new("za")`` functions Clang will set up the ZA context automatically +on entry to the function and disable it before returning. For example, if ZA is +in a dormant state Clang will generate the code to commit a lazy-save and set up +a new ZA state before executing user code. + }]; +} + def AlwaysInlineDocs : Documentation { let Category = DocCatFunction; let Content = [{ Inlining heuristics are disabled and inlining is always attempted regardless of optimization level. -Does not guarantee that inline substitution actually occurs. +``[[clang::always_inline]]`` spelling can be used as a statement attribute; other +spellings of the attribute are not supported on statements. If a statement is +marked ``[[clang::always_inline]]`` and contains calls, the compiler attempts +to inline those calls. + +.. code-block:: c + + int example(void) { + int i; + [[clang::always_inline]] foo(); // attempts to inline foo + [[clang::always_inline]] i = bar(); // attempts to inline bar + [[clang::always_inline]] return f(42, baz(bar())); // attempts to inline everything + } + +A declaration statement, which is a statement, is not a statement that can have an +attribute associated with it (the attribute applies to the declaration, not the +statement in that case). So this use case will not work: + +.. code-block:: c + + int example(void) { + [[clang::always_inline]] int i = bar(); + return i; + } + +This attribute does not guarantee that inline substitution actually occurs. + +<ins>Note: applying this attribute to a coroutine at the `-O0` optimization level +has no effect; other optimization levels may only partially inline and result in a +diagnostic.</ins> See also `the Microsoft Docs on Inline Functions`_, `the GCC Common Function Attribute docs`_, and `the GCC Inline docs`_. @@ -6045,3 +7054,827 @@ def EnforceTCBLeafDocs : Documentation { - ``enforce_tcb_leaf(Name)`` indicates that this function is a part of the TCB named ``Name`` }]; } + +def ErrorAttrDocs : Documentation { + let Category = DocCatFunction; + let Heading = "error, warning"; + let Content = [{ +The ``error`` and ``warning`` function attributes can be used to specify a +custom diagnostic to be emitted when a call to such a function is not +eliminated via optimizations. This can be used to create compile time +assertions that depend on optimizations, while providing diagnostics +pointing to precise locations of the call site in the source. + +.. code-block:: c++ + + __attribute__((warning("oh no"))) void dontcall(); + void foo() { + if (someCompileTimeAssertionThatsTrue) + dontcall(); // Warning + + dontcall(); // Warning + + if (someCompileTimeAssertionThatsFalse) + dontcall(); // No Warning + sizeof(dontcall()); // No Warning + } + }]; +} + +def ZeroCallUsedRegsDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +This attribute, when attached to a function, causes the compiler to zero a +subset of all call-used registers before the function returns. It's used to +increase program security by either mitigating `Return-Oriented Programming`_ +(ROP) attacks or preventing information leakage through registers. + +The term "call-used" means registers which are not guaranteed to be preserved +unchanged for the caller by the current calling convention. This could also be +described as "caller-saved" or "not callee-saved". + +The `choice` parameters gives the programmer flexibility to choose the subset +of the call-used registers to be zeroed: + +- ``skip`` doesn't zero any call-used registers. This choice overrides any + command-line arguments. +- ``used`` only zeros call-used registers used in the function. By ``used``, we + mean a register whose contents have been set or referenced in the function. +- ``used-gpr`` only zeros call-used GPR registers used in the function. +- ``used-arg`` only zeros call-used registers used to pass arguments to the + function. +- ``used-gpr-arg`` only zeros call-used GPR registers used to pass arguments to + the function. +- ``all`` zeros all call-used registers. +- ``all-gpr`` zeros all call-used GPR registers. +- ``all-arg`` zeros all call-used registers used to pass arguments to the + function. +- ``all-gpr-arg`` zeros all call-used GPR registers used to pass arguments to + the function. + +The default for the attribute is controlled by the ``-fzero-call-used-regs`` +flag. + +.. _Return-Oriented Programming: https://en.wikipedia.org/wiki/Return-oriented_programming + }]; +} + +def NumThreadsDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +The ``numthreads`` attribute applies to HLSL shaders where explcit thread counts +are required. The ``X``, ``Y``, and ``Z`` values provided to the attribute +dictate the thread id. Total number of threads executed is ``X * Y * Z``. + +The full documentation is available here: https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/sm5-attributes-numthreads + }]; +} + +def HLSLSV_ShaderTypeAttrDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +The ``shader`` type attribute applies to HLSL shader entry functions to +identify the shader type for the entry function. +The syntax is: + +.. code-block:: text + + ``[shader(string-literal)]`` + +where the string literal is one of: "pixel", "vertex", "geometry", "hull", +"domain", "compute", "raygeneration", "intersection", "anyhit", "closesthit", +"miss", "callable", "mesh", "amplification". Normally the shader type is set +by shader target with the ``-T`` option like ``-Tps_6_1``. When compiling to a +library target like ``lib_6_3``, the shader type attribute can help the +compiler to identify the shader type. It is mostly used by Raytracing shaders +where shaders must be compiled into a library and linked at runtime. + }]; +} + +def ClangRandomizeLayoutDocs : Documentation { + let Category = DocCatDecl; + let Heading = "randomize_layout, no_randomize_layout"; + let Content = [{ +The attribute ``randomize_layout``, when attached to a C structure, selects it +for structure layout field randomization; a compile-time hardening technique. A +"seed" value, is specified via the ``-frandomize-layout-seed=`` command line flag. +For example: + +.. code-block:: bash + + SEED=`od -A n -t x8 -N 32 /dev/urandom | tr -d ' \n'` + make ... CFLAGS="-frandomize-layout-seed=$SEED" ... + +You can also supply the seed in a file with ``-frandomize-layout-seed-file=``. +For example: + +.. code-block:: bash + + od -A n -t x8 -N 32 /dev/urandom | tr -d ' \n' > /tmp/seed_file.txt + make ... CFLAGS="-frandomize-layout-seed-file=/tmp/seed_file.txt" ... + +The randomization is deterministic based for a given seed, so the entire +program should be compiled with the same seed, but keep the seed safe +otherwise. + +The attribute ``no_randomize_layout``, when attached to a C structure, +instructs the compiler that this structure should not have its field layout +randomized. + }]; +} + +def HLSLSV_GroupIndexDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +The ``SV_GroupIndex`` semantic, when applied to an input parameter, specifies a +data binding to map the group index to the specified parameter. This attribute +is only supported in compute shaders. + +The full documentation is available here: https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/sv-groupindex + }]; +} + +def HLSLResourceBindingDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +The resource binding attribute sets the virtual register and logical register space for a resource. +Attribute spelling in HLSL is: ``register(slot [, space])``. +``slot`` takes the format ``[type][number]``, +where ``type`` is a single character specifying the resource type and ``number`` is the virtual register number. + +Register types are: +t for shader resource views (SRV), +s for samplers, +u for unordered access views (UAV), +b for constant buffer views (CBV). + +Register space is specified in the format ``space[number]`` and defaults to ``space0`` if omitted. +Here're resource binding examples with and without space: +.. code-block:: c++ + + RWBuffer<float> Uav : register(u3, space1); + Buffer<float> Buf : register(t1); + +The full documentation is available here: https://docs.microsoft.com/en-us/windows/win32/direct3d12/resource-binding-in-hlsl + }]; +} + +def HLSLSV_DispatchThreadIDDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +The ``SV_DispatchThreadID`` semantic, when applied to an input parameter, +specifies a data binding to map the global thread offset within the Dispatch +call (per dimension of the group) to the specified parameter. +When applied to a field of a struct, the data binding is specified to the field +when the struct is used as a parameter type. +The semantic on the field is ignored when not used as a parameter. +This attribute is only supported in compute shaders. + +The full documentation is available here: https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/sv-dispatchthreadid + }]; +} + +def HLSLGroupSharedAddressSpaceDocs : Documentation { + let Category = DocCatVariable; + let Content = [{ +HLSL enables threads of a compute shader to exchange values via shared memory. +HLSL provides barrier primitives such as GroupMemoryBarrierWithGroupSync, +and so on to ensure the correct ordering of reads and writes to shared memory +in the shader and to avoid data races. +Here's an example to declare a groupshared variable. +.. code-block:: c++ + + groupshared GSData data[5*5*1]; + +The full documentation is available here: https://learn.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-variable-syntax#group-shared + }]; +} + +def HLSLParamQualifierDocs : Documentation { + let Category = DocCatVariable; + let Heading = "HLSL Parameter Modifiers"; + let Content = [{ +HLSL function parameters are passed by value. Parameter declarations support +three qualifiers to denote parameter passing behavior. The three qualifiers are +`in`, `out` and `inout`. + +Parameters annotated with `in` or with no annotation are passed by value from +the caller to the callee. + +Parameters annotated with `out` are written to the argument after the callee +returns (Note: arguments values passed into `out` parameters *are not* copied +into the callee). + +Parameters annotated with `inout` are copied into the callee via a temporary, +and copied back to the argument after the callee returns. + }]; +} + +def AnnotateTypeDocs : Documentation { + let Category = DocCatType; + let Heading = "annotate_type"; + let Content = [{ +This attribute is used to add annotations to types, typically for use by static +analysis tools that are not integrated into the core Clang compiler (e.g., +Clang-Tidy checks or out-of-tree Clang-based tools). It is a counterpart to the +`annotate` attribute, which serves the same purpose, but for declarations. + +The attribute takes a mandatory string literal argument specifying the +annotation category and an arbitrary number of optional arguments that provide +additional information specific to the annotation category. The optional +arguments must be constant expressions of arbitrary type. + +For example: + +.. code-block:: c++ + + int* [[clang::annotate_type("category1", "foo", 1)]] f(int[[clang::annotate_type("category2")]] *); + +The attribute does not have any effect on the semantics of the type system, +neither type checking rules, nor runtime semantics. In particular: + +- ``std::is_same<T, T [[clang::annotate_type("foo")]]>`` is true for all types + ``T``. + +- It is not permissible for overloaded functions or template specializations + to differ merely by an ``annotate_type`` attribute. + +- The presence of an ``annotate_type`` attribute will not affect name + mangling. + }]; +} + +def WeakDocs : Documentation { + let Category = DocCatDecl; + let Content = [{ + +In supported output formats the ``weak`` attribute can be used to +specify that a variable or function should be emitted as a symbol with +``weak`` (if a definition) or ``extern_weak`` (if a declaration of an +external symbol) `linkage +<https://llvm.org/docs/LangRef.html#linkage-types>`_. + +If there is a non-weak definition of the symbol the linker will select +that over the weak. They must have same type and alignment (variables +must also have the same size), but may have a different value. + +If there are multiple weak definitions of same symbol, but no non-weak +definition, they should have same type, size, alignment and value, the +linker will select one of them (see also selectany_ attribute). + +If the ``weak`` attribute is applied to a ``const`` qualified variable +definition that variable is no longer consider a compiletime constant +as its value can change during linking (or dynamic linking). This +means that it can e.g no longer be part of an initializer expression. + +.. code-block:: c + + const int ANSWER __attribute__ ((weak)) = 42; + + /* This function may be replaced link-time */ + __attribute__ ((weak)) void debug_log(const char *msg) + { + fprintf(stderr, "DEBUG: %s\n", msg); + } + + int main(int argc, const char **argv) + { + debug_log ("Starting up..."); + + /* This may print something else than "6 * 7 = 42", + if there is a non-weak definition of "ANSWER" in + an object linked in */ + printf("6 * 7 = %d\n", ANSWER); + + return 0; + } + +If an external declaration is marked weak and that symbol does not +exist during linking (possibly dynamic) the address of the symbol will +evaluate to NULL. + +.. code-block:: c + + void may_not_exist(void) __attribute__ ((weak)); + + int main(int argc, const char **argv) + { + if (may_not_exist) { + may_not_exist(); + } else { + printf("Function did not exist\n"); + } + return 0; + } + }]; +} + +def FunctionReturnThunksDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +The attribute ``function_return`` can replace return instructions with jumps to +target-specific symbols. This attribute supports 2 possible values, +corresponding to the values supported by the ``-mfunction-return=`` command +line flag: + +* ``__attribute__((function_return("keep")))`` to disable related transforms. + This is useful for undoing global setting from ``-mfunction-return=`` locally + for individual functions. +* ``__attribute__((function_return("thunk-extern")))`` to replace returns with + jumps, while NOT emitting the thunk. + +The values ``thunk`` and ``thunk-inline`` from GCC are not supported. + +The symbol used for ``thunk-extern`` is target specific: +* X86: ``__x86_return_thunk`` + +As such, this function attribute is currently only supported on X86 targets. + }]; +} + +def ReadOnlyPlacementDocs : Documentation { + let Category = DocCatType; + let Content = [{This attribute is attached to a structure, class or union declaration. + When attached to a record declaration/definition, it checks if all instances + of this type can be placed in the read-only data segment of the program. If it + finds an instance that can not be placed in a read-only segment, the compiler + emits a warning at the source location where the type was used. + + Examples: + * ``struct __attribute__((enforce_read_only_placement)) Foo;`` + * ``struct __attribute__((enforce_read_only_placement)) Bar { ... };`` + + Both ``Foo`` and ``Bar`` types have the ``enforce_read_only_placement`` attribute. + + The goal of introducing this attribute is to assist developers with writing secure + code. A ``const``-qualified global is generally placed in the read-only section + of the memory that has additional run time protection from malicious writes. By + attaching this attribute to a declaration, the developer can express the intent + to place all instances of the annotated type in the read-only program memory. + + Note 1: The attribute doesn't guarantee that the object will be placed in the + read-only data segment as it does not instruct the compiler to ensure such + a placement. It emits a warning if something in the code can be proven to prevent + an instance from being placed in the read-only data segment. + + Note 2: Currently, clang only checks if all global declarations of a given type 'T' + are ``const``-qualified. The following conditions would also prevent the data to be + put into read only segment, but the corresponding warnings are not yet implemented. + + 1. An instance of type ``T`` is allocated on the heap/stack. + 2. Type ``T`` defines/inherits a mutable field. + 3. Type ``T`` defines/inherits non-constexpr constructor(s) for initialization. + 4. A field of type ``T`` is defined by type ``Q``, which does not bear the + ``enforce_read_only_placement`` attribute. + 5. A type ``Q`` inherits from type ``T`` and it does not have the + ``enforce_read_only_placement`` attribute. + }]; +} + +def WebAssemblyFuncrefDocs : Documentation { + let Category = DocCatType; + let Content = [{ +Clang supports the ``__funcref`` attribute for the WebAssembly target. +This attribute may be attached to a function pointer type, where it modifies +its underlying representation to be a WebAssembly ``funcref``. + }]; +} + +def PreferredTypeDocumentation : Documentation { + let Category = DocCatField; + let Content = [{ +This attribute allows adjusting the type of a bit-field in debug information. +This can be helpful when a bit-field is intended to store an enumeration value, +but has to be specified as having the enumeration's underlying type in order to +facilitate compiler optimizations or bit-field packing behavior. Normally, the +underlying type is what is emitted in debug information, which can make it hard +for debuggers to know to map a bit-field's value back to a particular enumeration. + +.. code-block:: c++ + + enum Colors { Red, Green, Blue }; + + struct S { + [[clang::preferred_type(Colors)]] unsigned ColorVal : 2; + [[clang::preferred_type(bool)]] unsigned UseAlternateColorSpace : 1; + } s = { Green, false }; + +Without the attribute, a debugger is likely to display the value ``1`` for ``ColorVal`` +and ``0`` for ``UseAlternateColorSpace``. With the attribute, the debugger may now +display ``Green`` and ``false`` instead. + +This can be used to map a bit-field to an arbitrary type that isn't integral +or an enumeration type. For example: + +.. code-block:: c++ + + struct A { + short a1; + short a2; + }; + + struct B { + [[clang::preferred_type(A)]] unsigned b1 : 32 = 0x000F'000C; + }; + +will associate the type ``A`` with the ``b1`` bit-field and is intended to display +something like this in the debugger: + +.. code-block:: text + + Process 2755547 stopped + * thread #1, name = 'test-preferred-', stop reason = step in + frame #0: 0x0000555555555148 test-preferred-type`main at test.cxx:13:14 + 10 int main() + 11 { + 12 B b; + -> 13 return b.b1; + 14 } + (lldb) v -T + (B) b = { + (A:32) b1 = { + (short) a1 = 12 + (short) a2 = 15 + } + } + +Note that debuggers may not be able to handle more complex mappings, and so +this usage is debugger-dependent. + }]; +} + +def CleanupDocs : Documentation { + let Category = DocCatVariable; + let Content = [{ +This attribute allows a function to be run when a local variable goes out of +scope. The attribute takes the identifier of a function with a parameter type +that is a pointer to the type with the attribute. + +.. code-block:: c + + static void foo (int *) { ... } + static void bar (int *) { ... } + void baz (void) { + int x __attribute__((cleanup(foo))); + { + int y __attribute__((cleanup(bar))); + } + } + +The above example will result in a call to ``bar`` being passed the address of +`y`` when ``y`` goes out of scope, then a call to ``foo`` being passed the +address of ``x`` when ``x`` goes out of scope. If two or more variables share +the same scope, their ``cleanup`` callbacks are invoked in the reverse order +the variables were declared in. It is not possible to check the return value +(if any) of these ``cleanup`` callback functions. +}]; +} + +def CtorDtorDocs : Documentation { + let Category = DocCatFunction; + let Content = [{ +The ``constructor`` attribute causes the function to be called before entering +``main()``, and the ``destructor`` attribute causes the function to be called +after returning from ``main()`` or when the ``exit()`` function has been +called. Note, ``quick_exit()``, ``_Exit()``, and ``abort()`` prevent a function +marked ``destructor`` from being called. + +The constructor or destructor function should not accept any arguments and its +return type should be ``void``. + +The attributes accept an optional argument used to specify the priority order +in which to execute constructor and destructor functions. The priority is +given as an integer constant expression between 101 and 65535 (inclusive). +Priorities outside of that range are reserved for use by the implementation. A +lower value indicates a higher priority of initialization. Note that only the +relative ordering of values is important. For example: + +.. code-block:: c++ + + __attribute__((constructor(200))) void foo(void); + __attribute__((constructor(101))) void bar(void); + +``bar()`` will be called before ``foo()``, and both will be called before +``main()``. If no argument is given to the ``constructor`` or ``destructor`` +attribute, they default to the value ``65535``. +}]; +} + +def CoroOnlyDestroyWhenCompleteDocs : Documentation { + let Category = DocCatDecl; + let Content = [{ +The `coro_only_destroy_when_complete` attribute should be marked on a C++ class. The coroutines +whose return type is marked with the attribute are assumed to be destroyed only after the coroutine has +reached the final suspend point. + +This is helpful for the optimizers to reduce the size of the destroy function for the coroutines. + +For example, + +.. code-block:: c++ + + A foo() { + dtor d; + co_await something(); + dtor d1; + co_await something(); + dtor d2; + co_return 43; + } + +The compiler may generate the following pseudocode: + +.. code-block:: c++ + + void foo.destroy(foo.Frame *frame) { + switch(frame->suspend_index()) { + case 1: + frame->d.~dtor(); + break; + case 2: + frame->d.~dtor(); + frame->d1.~dtor(); + break; + case 3: + frame->d.~dtor(); + frame->d1.~dtor(); + frame->d2.~dtor(); + break; + default: // coroutine completed or haven't started + break; + } + + frame->promise.~promise_type(); + delete frame; + } + +The `foo.destroy()` function's purpose is to release all of the resources +initialized for the coroutine when it is destroyed in a suspended state. +However, if the coroutine is only ever destroyed at the final suspend state, +the rest of the conditions are superfluous. + +The user can use the `coro_only_destroy_when_complete` attributo suppress +generation of the other destruction cases, optimizing the above `foo.destroy` to: + +.. code-block:: c++ + + void foo.destroy(foo.Frame *frame) { + frame->promise.~promise_type(); + delete frame; + } + + }]; +} + +def CoroReturnTypeAndWrapperDoc : Documentation { + let Category = DocCatDecl; + let Content = [{ +The ``[[clang::coro_return_type]]`` attribute is used to help static analyzers to recognize +coroutines from the function signatures. + +The ``coro_return_type`` attribute should be marked on a C++ class to mark it as +a **coroutine return type (CRT)**. + +A function ``R func(P1, .., PN)`` has a coroutine return type (CRT) ``R`` if ``R`` +is marked by ``[[clang::coro_return_type]]`` and ``R`` has a promise type associated to it +(i.e., std::coroutine_traits<R, P1, .., PN>::promise_type is a valid promise type). + +If the return type of a function is a ``CRT`` then the function must be a coroutine. +Otherwise the program is invalid. It is allowed for a non-coroutine to return a ``CRT`` +if the function is marked with ``[[clang::coro_wrapper]]``. + +The ``[[clang::coro_wrapper]]`` attribute should be marked on a C++ function to mark it as +a **coroutine wrapper**. A coroutine wrapper is a function which returns a ``CRT``, +is not a coroutine itself and is marked with ``[[clang::coro_wrapper]]``. + +Clang will enforce that all functions that return a ``CRT`` are either coroutines or marked +with ``[[clang::coro_wrapper]]``. Clang will enforce this with an error. + +From a language perspective, it is not possible to differentiate between a coroutine and a +function returning a CRT by merely looking at the function signature. + +Coroutine wrappers, in particular, are susceptible to capturing +references to temporaries and other lifetime issues. This allows to avoid such lifetime +issues with coroutine wrappers. + +For example, + +.. code-block:: c++ + + // This is a CRT. + template <typename T> struct [[clang::coro_return_type]] Task { + using promise_type = some_promise_type; + }; + + Task<int> increment(int a) { co_return a + 1; } // Fine. This is a coroutine. + Task<int> foo() { return increment(1); } // Error. foo is not a coroutine. + + // Fine for a coroutine wrapper to return a CRT. + [[clang::coro_wrapper]] Task<int> foo() { return increment(1); } + + void bar() { + // Invalid. This intantiates a function which returns a CRT but is not marked as + // a coroutine wrapper. + std::function<Task<int>(int)> f = increment; + } + +Note: ``a_promise_type::get_return_object`` is exempted from this analysis as it is a necessary +implementation detail of any coroutine library. +}]; +} + +def CodeAlignAttrDocs : Documentation { + let Category = DocCatVariable; + let Heading = "clang::code_align"; + let Content = [{ +The ``clang::code_align(N)`` attribute applies to a loop and specifies the byte +alignment for a loop. The attribute accepts a positive integer constant +initialization expression indicating the number of bytes for the minimum +alignment boundary. Its value must be a power of 2, between 1 and 4096 +(inclusive). + +.. code-block:: c++ + + void foo() { + int var = 0; + [[clang::code_align(16)]] for (int i = 0; i < 10; ++i) var++; + } + + void Array(int *array, size_t n) { + [[clang::code_align(64)]] for (int i = 0; i < n; ++i) array[i] = 0; + } + + void count () { + int a1[10], int i = 0; + [[clang::code_align(32)]] while (i < 10) { a1[i] += 3; } + } + + void check() { + int a = 10; + [[clang::code_align(8)]] do { + a = a + 1; + } while (a < 20); + } + + template<int A> + void func() { + [[clang::code_align(A)]] for(;;) { } + } + + }]; +} + +def CoroLifetimeBoundDoc : Documentation { + let Category = DocCatDecl; + let Content = [{ +The ``[[clang::coro_lifetimebound]]`` is a class attribute which can be applied +to a coroutine return type (`CRT`_) (i.e. +it should also be annotated with ``[[clang::coro_return_type]]``). + +All parameters of a function are considered to be lifetime bound if the function returns a +coroutine return type (CRT) annotated with ``[[clang::coro_lifetimebound]]``. +This lifetime bound analysis can be disabled for a coroutine wrapper or a coroutine by annotating the function +with ``[[clang::coro_disable_lifetimebound]]`` function attribute . +See `documentation`_ of ``[[clang::lifetimebound]]`` for details about lifetime bound analysis. + + +Reference parameters of a coroutine are susceptible to capturing references to temporaries or local variables. + +For example, + +.. code-block:: c++ + + task<int> coro(const int& a) { co_return a + 1; } + task<int> dangling_refs(int a) { + // `coro` captures reference to a temporary. `foo` would now contain a dangling reference to `a`. + auto foo = coro(1); + // `coro` captures reference to local variable `a` which is destroyed after the return. + return coro(a); + } + +Lifetime bound static analysis can be used to detect such instances when coroutines capture references +which may die earlier than the coroutine frame itself. In the above example, if the CRT `task` is annotated with +``[[clang::coro_lifetimebound]]``, then lifetime bound analysis would detect capturing reference to +temporaries or return address of a local variable. + +Both coroutines and coroutine wrappers are part of this analysis. + +.. code-block:: c++ + + template <typename T> struct [[clang::coro_return_type, clang::coro_lifetimebound]] Task { + using promise_type = some_promise_type; + }; + + Task<int> coro(const int& a) { co_return a + 1; } + [[clang::coro_wrapper]] Task<int> coro_wrapper(const int& a, const int& b) { + return a > b ? coro(a) : coro(b); + } + Task<int> temporary_reference() { + auto foo = coro(1); // warning: capturing reference to a temporary which would die after the expression. + + int a = 1; + auto bar = coro_wrapper(a, 0); // warning: `b` captures reference to a temporary. + + co_return co_await coro(1); // fine. + } + [[clang::coro_wrapper]] Task<int> stack_reference(int a) { + return coro(a); // warning: returning address of stack variable `a`. + } + +This analysis can be disabled for all calls to a particular function by annotating the function +with function attribute ``[[clang::coro_disable_lifetimebound]]``. +For example, this could be useful for coroutine wrappers which accept reference parameters +but do not pass them to the underlying coroutine or pass them by value. + +.. code-block:: c++ + + Task<int> coro(int a) { co_return a + 1; } + [[clang::coro_wrapper, clang::coro_disable_lifetimebound]] Task<int> coro_wrapper(const int& a) { + return coro(a + 1); + } + void use() { + auto task = coro_wrapper(1); // use of temporary is fine as the argument is not lifetime bound. + } + +.. _`documentation`: https://clang.llvm.org/docs/AttributeReference.html#lifetimebound +.. _`CRT`: https://clang.llvm.org/docs/AttributeReference.html#coro-return-type +}]; +} + +def CountedByDocs : Documentation { + let Category = DocCatField; + let Content = [{ +Clang supports the ``counted_by`` attribute on the flexible array member of a +structure in C. The argument for the attribute is the name of a field member +holding the count of elements in the flexible array. This information can be +used to improve the results of the array bound sanitizer and the +``__builtin_dynamic_object_size`` builtin. The ``count`` field member must be +within the same non-anonymous, enclosing struct as the flexible array member. + +This example specifies that the flexible array member ``array`` has the number +of elements allocated for it in ``count``: + +.. code-block:: c + + struct bar; + + struct foo { + size_t count; + char other; + struct bar *array[] __attribute__((counted_by(count))); + }; + +This establishes a relationship between ``array`` and ``count``. Specifically, +``array`` must have at least ``count`` number of elements available. It's the +user's responsibility to ensure that this relationship is maintained through +changes to the structure. + +In the following example, the allocated array erroneously has fewer elements +than what's specified by ``p->count``. This would result in an out-of-bounds +access not being detected. + +.. code-block:: c + + #define SIZE_INCR 42 + + struct foo *p; + + void foo_alloc(size_t count) { + p = malloc(MAX(sizeof(struct foo), + offsetof(struct foo, array[0]) + count * sizeof(struct bar *))); + p->count = count + SIZE_INCR; + } + +The next example updates ``p->count``, but breaks the relationship requirement +that ``p->array`` must have at least ``p->count`` number of elements available: + +.. code-block:: c + + #define SIZE_INCR 42 + + struct foo *p; + + void foo_alloc(size_t count) { + p = malloc(MAX(sizeof(struct foo), + offsetof(struct foo, array[0]) + count * sizeof(struct bar *))); + p->count = count; + } + + void use_foo(int index, int val) { + p->count += SIZE_INCR + 1; /* 'count' is now larger than the number of elements of 'array'. */ + p->array[index] = val; /* The sanitizer can't properly check this access. */ + } + +In this example, an update to ``p->count`` maintains the relationship +requirement: + +.. code-block:: c + + void use_foo(int index, int val) { + if (p->count == 0) + return; + --p->count; + p->array[index] = val; + } + }]; +} diff --git a/contrib/llvm-project/clang/include/clang/Basic/AttrSubjectMatchRules.h b/contrib/llvm-project/clang/include/clang/Basic/AttrSubjectMatchRules.h index 010cefcaf340..bec8122ea930 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/AttrSubjectMatchRules.h +++ b/contrib/llvm-project/clang/include/clang/Basic/AttrSubjectMatchRules.h @@ -6,19 +6,24 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_CLANG_BASIC_ATTR_SUBJECT_MATCH_RULES_H -#define LLVM_CLANG_BASIC_ATTR_SUBJECT_MATCH_RULES_H +#ifndef LLVM_CLANG_BASIC_ATTRSUBJECTMATCHRULES_H +#define LLVM_CLANG_BASIC_ATTRSUBJECTMATCHRULES_H -#include "clang/Basic/SourceLocation.h" #include "llvm/ADT/DenseMap.h" namespace clang { + +class SourceRange; + namespace attr { /// A list of all the recognized kinds of attributes. enum SubjectMatchRule { #define ATTR_MATCH_RULE(X, Spelling, IsAbstract) X, #include "clang/Basic/AttrSubMatchRulesList.inc" + SubjectMatchRule_Last = -1 +#define ATTR_MATCH_RULE(X, Spelling, IsAbstract) +1 +#include "clang/Basic/AttrSubMatchRulesList.inc" }; const char *getSubjectMatchRuleSpelling(SubjectMatchRule Rule); diff --git a/contrib/llvm-project/clang/include/clang/Basic/AttributeCommonInfo.h b/contrib/llvm-project/clang/include/clang/Basic/AttributeCommonInfo.h index 4be598e109fd..ef2ddf525c98 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/AttributeCommonInfo.h +++ b/contrib/llvm-project/clang/include/clang/Basic/AttributeCommonInfo.h @@ -13,24 +13,27 @@ #ifndef LLVM_CLANG_BASIC_ATTRIBUTECOMMONINFO_H #define LLVM_CLANG_BASIC_ATTRIBUTECOMMONINFO_H + #include "clang/Basic/SourceLocation.h" +#include "clang/Basic/TokenKinds.h" namespace clang { -class IdentifierInfo; + class ASTRecordWriter; +class IdentifierInfo; class AttributeCommonInfo { public: /// The style used to specify an attribute. enum Syntax { /// __attribute__((...)) - AS_GNU, + AS_GNU = 1, /// [[...]] AS_CXX11, /// [[...]] - AS_C2x, + AS_C23, /// __declspec(...) AS_Declspec, @@ -48,6 +51,13 @@ public: // without adding related code to TableGen/ClangAttrEmitter.cpp. /// Context-sensitive version of a keyword attribute. AS_ContextSensitiveKeyword, + + /// <vardecl> : <semantic> + AS_HLSLSemantic, + + /// The attibute has no source code manifestation and is only created + /// implicitly. + AS_Implicit }; enum Kind { #define PARSED_ATTR(NAME) AT_##NAME, @@ -64,68 +74,110 @@ private: SourceRange AttrRange; const SourceLocation ScopeLoc; // Corresponds to the Kind enum. + LLVM_PREFERRED_TYPE(Kind) unsigned AttrKind : 16; /// Corresponds to the Syntax enum. - unsigned SyntaxUsed : 3; + LLVM_PREFERRED_TYPE(Syntax) + unsigned SyntaxUsed : 4; + LLVM_PREFERRED_TYPE(bool) unsigned SpellingIndex : 4; + LLVM_PREFERRED_TYPE(bool) + unsigned IsAlignas : 1; + LLVM_PREFERRED_TYPE(bool) + unsigned IsRegularKeywordAttribute : 1; protected: static constexpr unsigned SpellingNotCalculated = 0xf; public: - AttributeCommonInfo(SourceRange AttrRange) - : AttrRange(AttrRange), ScopeLoc(), AttrKind(0), SyntaxUsed(0), - SpellingIndex(SpellingNotCalculated) {} - - AttributeCommonInfo(SourceLocation AttrLoc) - : AttrRange(AttrLoc), ScopeLoc(), AttrKind(0), SyntaxUsed(0), - SpellingIndex(SpellingNotCalculated) {} - - AttributeCommonInfo(const IdentifierInfo *AttrName, - const IdentifierInfo *ScopeName, SourceRange AttrRange, - SourceLocation ScopeLoc, Syntax SyntaxUsed) - : AttrName(AttrName), ScopeName(ScopeName), AttrRange(AttrRange), - ScopeLoc(ScopeLoc), - AttrKind(getParsedKind(AttrName, ScopeName, SyntaxUsed)), - SyntaxUsed(SyntaxUsed), SpellingIndex(SpellingNotCalculated) {} + /// Combines information about the source-code form of an attribute, + /// including its syntax and spelling. + class Form { + public: + constexpr Form(Syntax SyntaxUsed, unsigned SpellingIndex, bool IsAlignas, + bool IsRegularKeywordAttribute) + : SyntaxUsed(SyntaxUsed), SpellingIndex(SpellingIndex), + IsAlignas(IsAlignas), + IsRegularKeywordAttribute(IsRegularKeywordAttribute) {} + constexpr Form(tok::TokenKind Tok) + : SyntaxUsed(AS_Keyword), SpellingIndex(SpellingNotCalculated), + IsAlignas(Tok == tok::kw_alignas), + IsRegularKeywordAttribute(tok::isRegularKeywordAttribute(Tok)) {} + + Syntax getSyntax() const { return Syntax(SyntaxUsed); } + unsigned getSpellingIndex() const { return SpellingIndex; } + bool isAlignas() const { return IsAlignas; } + bool isRegularKeywordAttribute() const { return IsRegularKeywordAttribute; } + + static Form GNU() { return AS_GNU; } + static Form CXX11() { return AS_CXX11; } + static Form C23() { return AS_C23; } + static Form Declspec() { return AS_Declspec; } + static Form Microsoft() { return AS_Microsoft; } + static Form Keyword(bool IsAlignas, bool IsRegularKeywordAttribute) { + return Form(AS_Keyword, SpellingNotCalculated, IsAlignas, + IsRegularKeywordAttribute); + } + static Form Pragma() { return AS_Pragma; } + static Form ContextSensitiveKeyword() { return AS_ContextSensitiveKeyword; } + static Form HLSLSemantic() { return AS_HLSLSemantic; } + static Form Implicit() { return AS_Implicit; } + + private: + constexpr Form(Syntax SyntaxUsed) + : SyntaxUsed(SyntaxUsed), SpellingIndex(SpellingNotCalculated), + IsAlignas(0), IsRegularKeywordAttribute(0) {} + + LLVM_PREFERRED_TYPE(Syntax) + unsigned SyntaxUsed : 4; + unsigned SpellingIndex : 4; + LLVM_PREFERRED_TYPE(bool) + unsigned IsAlignas : 1; + LLVM_PREFERRED_TYPE(bool) + unsigned IsRegularKeywordAttribute : 1; + }; AttributeCommonInfo(const IdentifierInfo *AttrName, const IdentifierInfo *ScopeName, SourceRange AttrRange, - SourceLocation ScopeLoc, Kind AttrKind, Syntax SyntaxUsed) + SourceLocation ScopeLoc, Kind AttrKind, Form FormUsed) : AttrName(AttrName), ScopeName(ScopeName), AttrRange(AttrRange), - ScopeLoc(ScopeLoc), AttrKind(AttrKind), SyntaxUsed(SyntaxUsed), - SpellingIndex(SpellingNotCalculated) {} + ScopeLoc(ScopeLoc), AttrKind(AttrKind), + SyntaxUsed(FormUsed.getSyntax()), + SpellingIndex(FormUsed.getSpellingIndex()), + IsAlignas(FormUsed.isAlignas()), + IsRegularKeywordAttribute(FormUsed.isRegularKeywordAttribute()) { + assert(SyntaxUsed >= AS_GNU && SyntaxUsed <= AS_Implicit && + "Invalid syntax!"); + } AttributeCommonInfo(const IdentifierInfo *AttrName, const IdentifierInfo *ScopeName, SourceRange AttrRange, - SourceLocation ScopeLoc, Kind AttrKind, Syntax SyntaxUsed, - unsigned Spelling) - : AttrName(AttrName), ScopeName(ScopeName), AttrRange(AttrRange), - ScopeLoc(ScopeLoc), AttrKind(AttrKind), SyntaxUsed(SyntaxUsed), - SpellingIndex(Spelling) {} + SourceLocation ScopeLoc, Form FormUsed) + : AttributeCommonInfo( + AttrName, ScopeName, AttrRange, ScopeLoc, + getParsedKind(AttrName, ScopeName, FormUsed.getSyntax()), + FormUsed) {} AttributeCommonInfo(const IdentifierInfo *AttrName, SourceRange AttrRange, - Syntax SyntaxUsed) - : AttrName(AttrName), ScopeName(nullptr), AttrRange(AttrRange), - ScopeLoc(), AttrKind(getParsedKind(AttrName, ScopeName, SyntaxUsed)), - SyntaxUsed(SyntaxUsed), SpellingIndex(SpellingNotCalculated) {} - - AttributeCommonInfo(SourceRange AttrRange, Kind K, Syntax SyntaxUsed) - : AttrName(nullptr), ScopeName(nullptr), AttrRange(AttrRange), ScopeLoc(), - AttrKind(K), SyntaxUsed(SyntaxUsed), - SpellingIndex(SpellingNotCalculated) {} + Form FormUsed) + : AttributeCommonInfo(AttrName, nullptr, AttrRange, SourceLocation(), + FormUsed) {} - AttributeCommonInfo(SourceRange AttrRange, Kind K, Syntax SyntaxUsed, - unsigned Spelling) - : AttrName(nullptr), ScopeName(nullptr), AttrRange(AttrRange), ScopeLoc(), - AttrKind(K), SyntaxUsed(SyntaxUsed), SpellingIndex(Spelling) {} + AttributeCommonInfo(SourceRange AttrRange, Kind K, Form FormUsed) + : AttributeCommonInfo(nullptr, nullptr, AttrRange, SourceLocation(), K, + FormUsed) {} AttributeCommonInfo(AttributeCommonInfo &&) = default; AttributeCommonInfo(const AttributeCommonInfo &) = default; Kind getParsedKind() const { return Kind(AttrKind); } Syntax getSyntax() const { return Syntax(SyntaxUsed); } + Form getForm() const { + return Form(getSyntax(), SpellingIndex, IsAlignas, + IsRegularKeywordAttribute); + } const IdentifierInfo *getAttrName() const { return AttrName; } + void setAttrName(const IdentifierInfo *AttrNameII) { AttrName = AttrNameII; } SourceLocation getLoc() const { return AttrRange.getBegin(); } SourceRange getRange() const { return AttrRange; } void setRange(SourceRange R) { AttrRange = R; } @@ -143,28 +195,35 @@ public: bool isMicrosoftAttribute() const { return SyntaxUsed == AS_Microsoft; } bool isGNUScope() const; + bool isClangScope() const; - bool isAlignasAttribute() const { - // FIXME: Use a better mechanism to determine this. - return getParsedKind() == AT_Aligned && isKeywordAttribute(); - } + bool isCXX11Attribute() const { return SyntaxUsed == AS_CXX11 || IsAlignas; } - bool isCXX11Attribute() const { - return SyntaxUsed == AS_CXX11 || isAlignasAttribute(); - } + bool isC23Attribute() const { return SyntaxUsed == AS_C23; } - bool isC2xAttribute() const { return SyntaxUsed == AS_C2x; } + bool isAlignas() const { + // FIXME: In the current state, the IsAlignas member variable is only true + // with the C++ `alignas` keyword but not `_Alignas`. The following + // expression works around the otherwise lost information so it will return + // true for `alignas` or `_Alignas` while still returning false for things + // like `__attribute__((aligned))`. + return (getParsedKind() == AT_Aligned && isKeywordAttribute()); + } /// The attribute is spelled [[]] in either C or C++ mode, including standard /// attributes spelled with a keyword, like alignas. bool isStandardAttributeSyntax() const { - return isCXX11Attribute() || isC2xAttribute(); + return isCXX11Attribute() || isC23Attribute(); } + bool isGNUAttribute() const { return SyntaxUsed == AS_GNU; } + bool isKeywordAttribute() const { return SyntaxUsed == AS_Keyword || SyntaxUsed == AS_ContextSensitiveKeyword; } + bool isRegularKeywordAttribute() const { return IsRegularKeywordAttribute; } + bool isContextSensitiveKeywordAttribute() const { return SyntaxUsed == AS_ContextSensitiveKeyword; } @@ -196,6 +255,19 @@ protected: return SpellingIndex != SpellingNotCalculated; } }; + +inline bool doesKeywordAttributeTakeArgs(tok::TokenKind Kind) { + switch (Kind) { + default: + return false; +#define KEYWORD_ATTRIBUTE(NAME, HASARG, ...) \ + case tok::kw_##NAME: \ + return HASARG; +#include "clang/Basic/RegularKeywordAttrInfo.inc" +#undef KEYWORD_ATTRIBUTE + } +} + } // namespace clang #endif // LLVM_CLANG_BASIC_ATTRIBUTECOMMONINFO_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/Attributes.h b/contrib/llvm-project/clang/include/clang/Basic/Attributes.h index c69633decd57..61666a6f4d9a 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Attributes.h +++ b/contrib/llvm-project/clang/include/clang/Basic/Attributes.h @@ -9,33 +9,19 @@ #ifndef LLVM_CLANG_BASIC_ATTRIBUTES_H #define LLVM_CLANG_BASIC_ATTRIBUTES_H -#include "clang/Basic/LangOptions.h" -#include "clang/Basic/TargetInfo.h" +#include "clang/Basic/AttributeCommonInfo.h" namespace clang { class IdentifierInfo; - -enum class AttrSyntax { - /// Is the identifier known as a GNU-style attribute? - GNU, - /// Is the identifier known as a __declspec-style attribute? - Declspec, - /// Is the identifier known as a [] Microsoft-style attribute? - Microsoft, - // Is the identifier known as a C++-style attribute? - CXX, - // Is the identifier known as a C-style attribute? - C, - // Is the identifier known as a pragma attribute? - Pragma -}; +class LangOptions; +class TargetInfo; /// Return the version number associated with the attribute if we /// recognize and implement the attribute specified by the given information. -int hasAttribute(AttrSyntax Syntax, const IdentifierInfo *Scope, - const IdentifierInfo *Attr, const TargetInfo &Target, - const LangOptions &LangOpts); +int hasAttribute(AttributeCommonInfo::Syntax Syntax, + const IdentifierInfo *Scope, const IdentifierInfo *Attr, + const TargetInfo &Target, const LangOptions &LangOpts); } // end namespace clang diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinHeaders.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinHeaders.def new file mode 100644 index 000000000000..8e4a2f9bee9a --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinHeaders.def @@ -0,0 +1,43 @@ +//===--- BuiltinHeaders.def - Builtin header info database ------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the standard builtin function header locations. Users of +// this file must define the HEADER macro to make use of this information. +// +//===----------------------------------------------------------------------===// + +HEADER(NO_HEADER, nullptr) +HEADER(BLOCKS_H, "Blocks.h") +HEADER(COMPLEX_H, "complex.h") +HEADER(CTYPE_H, "ctype.h") +HEADER(EMMINTRIN_H, "emmintrin.h") +HEADER(FOUNDATION_NSOBJCRUNTIME_H, "Foundation/NSObjCRuntime.h") +HEADER(IMMINTRIN_H, "immintrin.h") +HEADER(INTRIN_H, "intrin.h") +HEADER(MALLOC_H, "malloc.h") +HEADER(MATH_H, "math.h") +HEADER(MEMORY, "memory") +HEADER(OBJC_MESSAGE_H, "objc/message.h") +HEADER(OBJC_OBJC_AUTO_H, "objc/objc-auto.h") +HEADER(OBJC_OBJC_EXCEPTION_H, "objc/objc-exception.h") +HEADER(OBJC_OBJC_SYNC_H, "objc/objc-sync.h") +HEADER(OBJC_RUNTIME_H, "objc/runtime.h") +HEADER(PTHREAD_H, "pthread.h") +HEADER(SETJMPEX_H, "setjmpex.h") +HEADER(SETJMP_H, "setjmp.h") +HEADER(STDARG_H, "stdarg.h") +HEADER(STDIO_H, "stdio.h") +HEADER(STDLIB_H, "stdlib.h") +HEADER(STRINGS_H, "strings.h") +HEADER(STRING_H, "string.h") +HEADER(UNISTD_H, "unistd.h") +HEADER(UTILITY, "utility") +HEADER(WCHAR_H, "wchar.h") +HEADER(XMMINTRIN_H, "xmmintrin.h") + +#undef HEADER diff --git a/contrib/llvm-project/clang/include/clang/Basic/Builtins.def b/contrib/llvm-project/clang/include/clang/Basic/Builtins.def index 0e3898537bcf..4dcbaf8a7bea 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Builtins.def +++ b/contrib/llvm-project/clang/include/clang/Basic/Builtins.def @@ -26,6 +26,7 @@ // i -> int // h -> half (__fp16, OpenCL) // x -> half (_Float16) +// y -> half (__bf16) // f -> float // d -> double // z -> size_t @@ -38,6 +39,8 @@ // A -> "reference" to __builtin_va_list // V -> Vector, followed by the number of elements and the base type. // q -> Scalable vector, followed by the number of elements and the base type. +// Q -> target builtin type, followed by a character to distinguish the builtin type +// Qa -> AArch64 svcount_t builtin type. // E -> ext_vector, followed by the number of elements and the base type. // X -> _Complex, followed by the base type. // Y -> ptrdiff_t @@ -80,9 +83,9 @@ // builtin even if type doesn't match signature, and don't warn if we // can't be sure the type is right // F -> this is a libc/libm function with a '__builtin_' prefix added. -// f -> this is a libc/libm function without the '__builtin_' prefix. It can -// be followed by ':headername:' to state which header this function -// comes from. +// f -> this is a libc/libm function without a '__builtin_' prefix, or with +// 'z', a C++ standard library function in namespace std::. This builtin +// is disableable by '-fno-builtin-foo' / '-fno-builtin-std-foo'. // h -> this function requires a specific header or an explicit declaration. // i -> this is a runtime library implemented function without the // '__builtin_' prefix. It will be implemented in compiler-rt or libgcc. @@ -96,12 +99,15 @@ // S:N: -> similar to the s:N: attribute, but the function is like vscanf // in that it accepts its arguments as a va_list rather than // through an ellipsis -// e -> const, but only when -fno-math-errno +// e -> const, but only when -fno-math-errno and FP exceptions are ignored +// g -> const when FP exceptions are ignored // j -> returns_twice (like setjmp) // u -> arguments are not evaluated for their side-effects // V:N: -> requires vectors of at least N bits to be legal // C<N,M_0,...,M_k> -> callback behavior: argument N is called with argument // M_0, ..., M_k as payload +// z -> this is a function in (possibly-versioned) namespace std +// E -> this function can be constant evaluated by Clang frontend // FIXME: gcc has nonnull #if defined(BUILTIN) && !defined(LIBBUILTIN) @@ -118,16 +124,16 @@ BUILTIN(__builtin_atan2f, "fff" , "Fne") BUILTIN(__builtin_atan2l, "LdLdLd", "Fne") BUILTIN(__builtin_atan2f128, "LLdLLdLLd", "Fne") BUILTIN(__builtin_abs , "ii" , "ncF") -BUILTIN(__builtin_copysign, "ddd", "ncF") -BUILTIN(__builtin_copysignf, "fff", "ncF") +BUILTIN(__builtin_copysign, "ddd", "ncFE") +BUILTIN(__builtin_copysignf, "fff", "ncFE") BUILTIN(__builtin_copysignf16, "hhh", "ncF") -BUILTIN(__builtin_copysignl, "LdLdLd", "ncF") -BUILTIN(__builtin_copysignf128, "LLdLLdLLd", "ncF") -BUILTIN(__builtin_fabs , "dd" , "ncF") -BUILTIN(__builtin_fabsf, "ff" , "ncF") -BUILTIN(__builtin_fabsl, "LdLd", "ncF") +BUILTIN(__builtin_copysignl, "LdLdLd", "ncFE") +BUILTIN(__builtin_copysignf128, "LLdLLdLLd", "ncFE") +BUILTIN(__builtin_fabs , "dd" , "ncFE") +BUILTIN(__builtin_fabsf, "ff" , "ncFE") +BUILTIN(__builtin_fabsl, "LdLd", "ncFE") BUILTIN(__builtin_fabsf16, "hh" , "ncF") -BUILTIN(__builtin_fabsf128, "LLdLLd", "ncF") +BUILTIN(__builtin_fabsf128, "LLdLLd", "ncFE") BUILTIN(__builtin_fmod , "ddd" , "Fne") BUILTIN(__builtin_fmodf, "fff" , "Fne") BUILTIN(__builtin_fmodf16, "hhh" , "Fne") @@ -137,32 +143,38 @@ BUILTIN(__builtin_frexp , "ddi*" , "Fn") BUILTIN(__builtin_frexpf, "ffi*" , "Fn") BUILTIN(__builtin_frexpl, "LdLdi*", "Fn") BUILTIN(__builtin_frexpf128, "LLdLLdi*", "Fn") -BUILTIN(__builtin_huge_val, "d", "nc") -BUILTIN(__builtin_huge_valf, "f", "nc") -BUILTIN(__builtin_huge_vall, "Ld", "nc") -BUILTIN(__builtin_huge_valf128, "LLd", "nc") -BUILTIN(__builtin_inf , "d" , "nc") -BUILTIN(__builtin_inff , "f" , "nc") -BUILTIN(__builtin_infl , "Ld" , "nc") -BUILTIN(__builtin_inff128 , "LLd" , "nc") +BUILTIN(__builtin_frexpf16, "hhi*" , "Fn") +BUILTIN(__builtin_huge_val, "d", "ncE") +BUILTIN(__builtin_huge_valf, "f", "ncE") +BUILTIN(__builtin_huge_vall, "Ld", "ncE") +BUILTIN(__builtin_huge_valf16, "x", "ncE") +BUILTIN(__builtin_huge_valf128, "LLd", "ncE") +BUILTIN(__builtin_inf , "d" , "ncE") +BUILTIN(__builtin_inff , "f" , "ncE") +BUILTIN(__builtin_infl , "Ld" , "ncE") +BUILTIN(__builtin_inff16 , "x" , "ncE") +BUILTIN(__builtin_inff128 , "LLd" , "ncE") BUILTIN(__builtin_labs , "LiLi" , "Fnc") BUILTIN(__builtin_llabs, "LLiLLi", "Fnc") BUILTIN(__builtin_ldexp , "ddi" , "Fne") BUILTIN(__builtin_ldexpf, "ffi" , "Fne") BUILTIN(__builtin_ldexpl, "LdLdi", "Fne") BUILTIN(__builtin_ldexpf128, "LLdLLdi", "Fne") +BUILTIN(__builtin_ldexpf16, "hhi", "Fne") BUILTIN(__builtin_modf , "ddd*" , "Fn") BUILTIN(__builtin_modff, "fff*" , "Fn") BUILTIN(__builtin_modfl, "LdLdLd*", "Fn") BUILTIN(__builtin_modff128, "LLdLLdLLd*", "Fn") -BUILTIN(__builtin_nan, "dcC*" , "FnU") -BUILTIN(__builtin_nanf, "fcC*" , "FnU") -BUILTIN(__builtin_nanl, "LdcC*", "FnU") -BUILTIN(__builtin_nanf128, "LLdcC*", "FnU") -BUILTIN(__builtin_nans, "dcC*" , "FnU") -BUILTIN(__builtin_nansf, "fcC*" , "FnU") -BUILTIN(__builtin_nansl, "LdcC*", "FnU") -BUILTIN(__builtin_nansf128, "LLdcC*", "FnU") +BUILTIN(__builtin_nan, "dcC*" , "FnUE") +BUILTIN(__builtin_nanf, "fcC*" , "FnUE") +BUILTIN(__builtin_nanl, "LdcC*", "FnUE") +BUILTIN(__builtin_nanf16, "xcC*", "FnUE") +BUILTIN(__builtin_nanf128, "LLdcC*", "FnUE") +BUILTIN(__builtin_nans, "dcC*" , "FnUE") +BUILTIN(__builtin_nansf, "fcC*" , "FnUE") +BUILTIN(__builtin_nansl, "LdcC*", "FnUE") +BUILTIN(__builtin_nansf16, "xcC*", "FnUE") +BUILTIN(__builtin_nansf128, "LLdcC*", "FnUE") BUILTIN(__builtin_powi , "ddi" , "Fnc") BUILTIN(__builtin_powif, "ffi" , "Fnc") BUILTIN(__builtin_powil, "LdLdi", "Fnc") @@ -233,6 +245,11 @@ BUILTIN(__builtin_exp2f, "ff" , "Fne") BUILTIN(__builtin_exp2f16, "hh" , "Fne") BUILTIN(__builtin_exp2l, "LdLd", "Fne") BUILTIN(__builtin_exp2f128, "LLdLLd" , "Fne") +BUILTIN(__builtin_exp10 , "dd" , "Fne") +BUILTIN(__builtin_exp10f, "ff" , "Fne") +BUILTIN(__builtin_exp10f16, "hh" , "Fne") +BUILTIN(__builtin_exp10l, "LdLd", "Fne") +BUILTIN(__builtin_exp10f128, "LLdLLd" , "Fne") BUILTIN(__builtin_expm1 , "dd", "Fne") BUILTIN(__builtin_expm1f, "ff", "Fne") BUILTIN(__builtin_expm1l, "LdLd", "Fne") @@ -251,16 +268,16 @@ BUILTIN(__builtin_fmaf, "ffff", "Fne") BUILTIN(__builtin_fmaf16, "hhhh", "Fne") BUILTIN(__builtin_fmal, "LdLdLdLd", "Fne") BUILTIN(__builtin_fmaf128, "LLdLLdLLdLLd", "Fne") -BUILTIN(__builtin_fmax, "ddd", "Fnc") -BUILTIN(__builtin_fmaxf, "fff", "Fnc") -BUILTIN(__builtin_fmaxf16, "hhh", "Fnc") -BUILTIN(__builtin_fmaxl, "LdLdLd", "Fnc") -BUILTIN(__builtin_fmaxf128, "LLdLLdLLd", "Fnc") -BUILTIN(__builtin_fmin, "ddd", "Fnc") -BUILTIN(__builtin_fminf, "fff", "Fnc") -BUILTIN(__builtin_fminf16, "hhh", "Fnc") -BUILTIN(__builtin_fminl, "LdLdLd", "Fnc") -BUILTIN(__builtin_fminf128, "LLdLLdLLd", "Fnc") +BUILTIN(__builtin_fmax, "ddd", "FncE") +BUILTIN(__builtin_fmaxf, "fff", "FncE") +BUILTIN(__builtin_fmaxf16, "hhh", "FncE") +BUILTIN(__builtin_fmaxl, "LdLdLd", "FncE") +BUILTIN(__builtin_fmaxf128, "LLdLLdLLd", "FncE") +BUILTIN(__builtin_fmin, "ddd", "FncE") +BUILTIN(__builtin_fminf, "fff", "FncE") +BUILTIN(__builtin_fminf16, "hhh", "FncE") +BUILTIN(__builtin_fminl, "LdLdLd", "FncE") +BUILTIN(__builtin_fminf128, "LLdLLdLLd", "FncE") BUILTIN(__builtin_hypot , "ddd" , "Fne") BUILTIN(__builtin_hypotf, "fff" , "Fne") BUILTIN(__builtin_hypotl, "LdLdLd", "Fne") @@ -342,6 +359,11 @@ BUILTIN(__builtin_roundf, "ff" , "Fnc") BUILTIN(__builtin_roundf16, "hh" , "Fnc") BUILTIN(__builtin_roundl, "LdLd" , "Fnc") BUILTIN(__builtin_roundf128, "LLdLLd" , "Fnc") +BUILTIN(__builtin_roundeven, "dd" , "Fnc") +BUILTIN(__builtin_roundevenf, "ff" , "Fnc") +BUILTIN(__builtin_roundevenf16, "hh" , "Fnc") +BUILTIN(__builtin_roundevenl, "LdLd" , "Fnc") +BUILTIN(__builtin_roundevenf128, "LLdLLd" , "Fnc") BUILTIN(__builtin_scalbln , "ddLi", "Fne") BUILTIN(__builtin_scalblnf, "ffLi", "Fne") BUILTIN(__builtin_scalblnl, "LdLdLi", "Fne") @@ -384,6 +406,7 @@ BUILTIN(__builtin_truncf16, "hh", "Fnc") // Access to floating point environment BUILTIN(__builtin_flt_rounds, "i", "n") +BUILTIN(__builtin_set_flt_rounds, "vi", "n") // C99 complex builtins BUILTIN(__builtin_cabs, "dXd", "Fne") @@ -454,7 +477,7 @@ BUILTIN(__builtin_ctanhf, "XfXf", "Fne") BUILTIN(__builtin_ctanhl, "XLdXLd", "Fne") // GCC-compatible C99 CMPLX implementation. -BUILTIN(__builtin_complex, "v.", "nct") +BUILTIN(__builtin_complex, "v.", "nctE") // FP Comparisons. BUILTIN(__builtin_isgreater , "i.", "Fnct") @@ -465,12 +488,16 @@ BUILTIN(__builtin_islessgreater , "i.", "Fnct") BUILTIN(__builtin_isunordered , "i.", "Fnct") // Unary FP classification -BUILTIN(__builtin_fpclassify, "iiiiii.", "Fnct") -BUILTIN(__builtin_isfinite, "i.", "Fnct") -BUILTIN(__builtin_isinf, "i.", "Fnct") -BUILTIN(__builtin_isinf_sign, "i.", "Fnct") -BUILTIN(__builtin_isnan, "i.", "Fnct") -BUILTIN(__builtin_isnormal, "i.", "Fnct") +BUILTIN(__builtin_fpclassify, "iiiiii.", "FnctE") +BUILTIN(__builtin_isfinite, "i.", "FnctE") +BUILTIN(__builtin_isinf, "i.", "FnctE") +BUILTIN(__builtin_isinf_sign, "i.", "FnctE") +BUILTIN(__builtin_isnan, "i.", "FnctE") +BUILTIN(__builtin_isnormal, "i.", "FnctE") +BUILTIN(__builtin_issubnormal,"i.", "FnctE") +BUILTIN(__builtin_iszero, "i.", "FnctE") +BUILTIN(__builtin_issignaling,"i.", "FnctE") +BUILTIN(__builtin_isfpclass, "i.", "nctE") // FP signbit builtins BUILTIN(__builtin_signbit, "i.", "Fnct") @@ -484,103 +511,102 @@ BUILTIN(__builtin_canonicalizef16, "hh", "nc") BUILTIN(__builtin_canonicalizel, "LdLd", "nc") // Builtins for arithmetic. -BUILTIN(__builtin_clzs , "iUs" , "nc") -BUILTIN(__builtin_clz , "iUi" , "nc") -BUILTIN(__builtin_clzl , "iULi" , "nc") -BUILTIN(__builtin_clzll, "iULLi", "nc") +BUILTIN(__builtin_clzs , "iUs" , "ncE") +BUILTIN(__builtin_clz , "iUi" , "ncE") +BUILTIN(__builtin_clzl , "iULi" , "ncE") +BUILTIN(__builtin_clzll, "iULLi", "ncE") // TODO: int clzimax(uintmax_t) -BUILTIN(__builtin_ctzs , "iUs" , "nc") -BUILTIN(__builtin_ctz , "iUi" , "nc") -BUILTIN(__builtin_ctzl , "iULi" , "nc") -BUILTIN(__builtin_ctzll, "iULLi", "nc") +BUILTIN(__builtin_ctzs , "iUs" , "ncE") +BUILTIN(__builtin_ctz , "iUi" , "ncE") +BUILTIN(__builtin_ctzl , "iULi" , "ncE") +BUILTIN(__builtin_ctzll, "iULLi", "ncE") // TODO: int ctzimax(uintmax_t) -BUILTIN(__builtin_ffs , "ii" , "Fnc") -BUILTIN(__builtin_ffsl , "iLi" , "Fnc") -BUILTIN(__builtin_ffsll, "iLLi", "Fnc") -BUILTIN(__builtin_parity , "iUi" , "nc") -BUILTIN(__builtin_parityl , "iULi" , "nc") -BUILTIN(__builtin_parityll, "iULLi", "nc") -BUILTIN(__builtin_popcount , "iUi" , "nc") -BUILTIN(__builtin_popcountl , "iULi" , "nc") -BUILTIN(__builtin_popcountll, "iULLi", "nc") -BUILTIN(__builtin_clrsb , "ii" , "nc") -BUILTIN(__builtin_clrsbl , "iLi" , "nc") -BUILTIN(__builtin_clrsbll, "iLLi", "nc") +BUILTIN(__builtin_ffs , "ii" , "FncE") +BUILTIN(__builtin_ffsl , "iLi" , "FncE") +BUILTIN(__builtin_ffsll, "iLLi", "FncE") +BUILTIN(__builtin_parity , "iUi" , "ncE") +BUILTIN(__builtin_parityl , "iULi" , "ncE") +BUILTIN(__builtin_parityll, "iULLi", "ncE") +BUILTIN(__builtin_popcount , "iUi" , "ncE") +BUILTIN(__builtin_popcountl , "iULi" , "ncE") +BUILTIN(__builtin_popcountll, "iULLi", "ncE") +BUILTIN(__builtin_clrsb , "ii" , "ncE") +BUILTIN(__builtin_clrsbl , "iLi" , "ncE") +BUILTIN(__builtin_clrsbll, "iLLi", "ncE") // The following builtins rely on that char == 8 bits, short == 16 bits and that // there exists native types on the target that are 32- and 64-bits wide, unless // these conditions are fulfilled these builtins will operate on a not intended // bitwidth. -BUILTIN(__builtin_bswap16, "UsUs", "nc") -BUILTIN(__builtin_bswap32, "UZiUZi", "nc") -BUILTIN(__builtin_bswap64, "UWiUWi", "nc") - -BUILTIN(__builtin_bitreverse8, "UcUc", "nc") -BUILTIN(__builtin_bitreverse16, "UsUs", "nc") -BUILTIN(__builtin_bitreverse32, "UZiUZi", "nc") -BUILTIN(__builtin_bitreverse64, "UWiUWi", "nc") - -BUILTIN(__builtin_rotateleft8, "UcUcUc", "nc") -BUILTIN(__builtin_rotateleft16, "UsUsUs", "nc") -BUILTIN(__builtin_rotateleft32, "UZiUZiUZi", "nc") -BUILTIN(__builtin_rotateleft64, "UWiUWiUWi", "nc") -BUILTIN(__builtin_rotateright8, "UcUcUc", "nc") -BUILTIN(__builtin_rotateright16, "UsUsUs", "nc") -BUILTIN(__builtin_rotateright32, "UZiUZiUZi", "nc") -BUILTIN(__builtin_rotateright64, "UWiUWiUWi", "nc") +BUILTIN(__builtin_bswap16, "UsUs", "ncE") +BUILTIN(__builtin_bswap32, "UZiUZi", "ncE") +BUILTIN(__builtin_bswap64, "UWiUWi", "ncE") + +BUILTIN(__builtin_bitreverse8, "UcUc", "ncE") +BUILTIN(__builtin_bitreverse16, "UsUs", "ncE") +BUILTIN(__builtin_bitreverse32, "UZiUZi", "ncE") +BUILTIN(__builtin_bitreverse64, "UWiUWi", "ncE") + +BUILTIN(__builtin_rotateleft8, "UcUcUc", "ncE") +BUILTIN(__builtin_rotateleft16, "UsUsUs", "ncE") +BUILTIN(__builtin_rotateleft32, "UZiUZiUZi", "ncE") +BUILTIN(__builtin_rotateleft64, "UWiUWiUWi", "ncE") +BUILTIN(__builtin_rotateright8, "UcUcUc", "ncE") +BUILTIN(__builtin_rotateright16, "UsUsUs", "ncE") +BUILTIN(__builtin_rotateright32, "UZiUZiUZi", "ncE") +BUILTIN(__builtin_rotateright64, "UWiUWiUWi", "ncE") // Random GCC builtins BUILTIN(__builtin_calloc, "v*zz", "nF") -BUILTIN(__builtin_constant_p, "i.", "nctu") -BUILTIN(__builtin_classify_type, "i.", "nctu") -BUILTIN(__builtin___CFStringMakeConstantString, "FC*cC*", "nc") -BUILTIN(__builtin___NSStringMakeConstantString, "FC*cC*", "nc") +BUILTIN(__builtin_constant_p, "i.", "nctuE") +BUILTIN(__builtin_classify_type, "i.", "nctuE") +BUILTIN(__builtin___CFStringMakeConstantString, "FC*cC*", "ncE") +BUILTIN(__builtin___NSStringMakeConstantString, "FC*cC*", "ncE") BUILTIN(__builtin_va_start, "vA.", "nt") BUILTIN(__builtin_va_end, "vA", "n") BUILTIN(__builtin_va_copy, "vAA", "n") BUILTIN(__builtin_stdarg_start, "vA.", "nt") -BUILTIN(__builtin_assume_aligned, "v*vC*z.", "nc") -BUILTIN(__builtin_bcmp, "ivC*vC*z", "Fn") -BUILTIN(__builtin_bcopy, "vv*v*z", "n") +BUILTIN(__builtin_assume_aligned, "v*vC*z.", "nctE") +BUILTIN(__builtin_bcmp, "ivC*vC*z", "FnE") +BUILTIN(__builtin_bcopy, "vvC*v*z", "nF") BUILTIN(__builtin_bzero, "vv*z", "nF") -BUILTIN(__builtin_fprintf, "iP*cC*.", "Fp:1:") BUILTIN(__builtin_free, "vv*", "nF") BUILTIN(__builtin_malloc, "v*z", "nF") -BUILTIN(__builtin_memchr, "v*vC*iz", "nF") -BUILTIN(__builtin_memcmp, "ivC*vC*z", "nF") -BUILTIN(__builtin_memcpy, "v*v*vC*z", "nF") -BUILTIN(__builtin_memcpy_inline, "vv*vC*Iz", "nt") -BUILTIN(__builtin_memmove, "v*v*vC*z", "nF") +BUILTIN(__builtin_memchr, "v*vC*iz", "nFE") +BUILTIN(__builtin_memcmp, "ivC*vC*z", "nFE") +BUILTIN(__builtin_memcpy, "v*v*vC*z", "nFE") +BUILTIN(__builtin_memcpy_inline, "vv*vC*Iz", "n") +BUILTIN(__builtin_memmove, "v*v*vC*z", "nFE") BUILTIN(__builtin_mempcpy, "v*v*vC*z", "nF") BUILTIN(__builtin_memset, "v*v*iz", "nF") -BUILTIN(__builtin_printf, "icC*.", "Fp:0:") +BUILTIN(__builtin_memset_inline, "vv*iIz", "n") BUILTIN(__builtin_stpcpy, "c*c*cC*", "nF") BUILTIN(__builtin_stpncpy, "c*c*cC*z", "nF") BUILTIN(__builtin_strcasecmp, "icC*cC*", "nF") BUILTIN(__builtin_strcat, "c*c*cC*", "nF") -BUILTIN(__builtin_strchr, "c*cC*i", "nF") -BUILTIN(__builtin_strcmp, "icC*cC*", "nF") +BUILTIN(__builtin_strchr, "c*cC*i", "nFE") +BUILTIN(__builtin_strcmp, "icC*cC*", "nFE") BUILTIN(__builtin_strcpy, "c*c*cC*", "nF") BUILTIN(__builtin_strcspn, "zcC*cC*", "nF") BUILTIN(__builtin_strdup, "c*cC*", "nF") -BUILTIN(__builtin_strlen, "zcC*", "nF") +BUILTIN(__builtin_strlen, "zcC*", "nFE") BUILTIN(__builtin_strncasecmp, "icC*cC*z", "nF") BUILTIN(__builtin_strncat, "c*c*cC*z", "nF") -BUILTIN(__builtin_strncmp, "icC*cC*z", "nF") +BUILTIN(__builtin_strncmp, "icC*cC*z", "nFE") BUILTIN(__builtin_strncpy, "c*c*cC*z", "nF") BUILTIN(__builtin_strndup, "c*cC*z", "nF") BUILTIN(__builtin_strpbrk, "c*cC*cC*", "nF") BUILTIN(__builtin_strrchr, "c*cC*i", "nF") BUILTIN(__builtin_strspn, "zcC*cC*", "nF") BUILTIN(__builtin_strstr, "c*cC*cC*", "nF") -BUILTIN(__builtin_wcschr, "w*wC*w", "nF") -BUILTIN(__builtin_wcscmp, "iwC*wC*", "nF") -BUILTIN(__builtin_wcslen, "zwC*", "nF") -BUILTIN(__builtin_wcsncmp, "iwC*wC*z", "nF") -BUILTIN(__builtin_wmemchr, "w*wC*wz", "nF") -BUILTIN(__builtin_wmemcmp, "iwC*wC*z", "nF") -BUILTIN(__builtin_wmemcpy, "w*w*wC*z", "nF") -BUILTIN(__builtin_wmemmove, "w*w*wC*z", "nF") +BUILTIN(__builtin_wcschr, "w*wC*w", "nFE") +BUILTIN(__builtin_wcscmp, "iwC*wC*", "nFE") +BUILTIN(__builtin_wcslen, "zwC*", "nFE") +BUILTIN(__builtin_wcsncmp, "iwC*wC*z", "nFE") +BUILTIN(__builtin_wmemchr, "w*wC*wz", "nFE") +BUILTIN(__builtin_wmemcmp, "iwC*wC*z", "nFE") +BUILTIN(__builtin_wmemcpy, "w*w*wC*z", "nFE") +BUILTIN(__builtin_wmemmove, "w*w*wC*z", "nFE") BUILTIN(__builtin_realloc, "v*v*z", "nF") BUILTIN(__builtin_return_address, "v*IUi", "n") BUILTIN(__builtin_extract_return_addr, "v*v*", "n") @@ -589,14 +615,24 @@ BUILTIN(__builtin___clear_cache, "vc*c*", "n") BUILTIN(__builtin_setjmp, "iv**", "j") BUILTIN(__builtin_longjmp, "vv**i", "r") BUILTIN(__builtin_unwind_init, "v", "") -BUILTIN(__builtin_eh_return_data_regno, "iIi", "nc") -BUILTIN(__builtin_snprintf, "ic*zcC*.", "nFp:2:") -BUILTIN(__builtin_sprintf, "ic*cC*.", "nFP:1:") -BUILTIN(__builtin_vsnprintf, "ic*zcC*a", "nFP:2:") -BUILTIN(__builtin_vsprintf, "ic*cC*a", "nFP:1:") +BUILTIN(__builtin_eh_return_data_regno, "iIi", "ncE") +BUILTIN(__builtin_fprintf, "iP*RcC*R.", "nFp:1:") +BUILTIN(__builtin_printf, "icC*R.", "nFp:0:") +BUILTIN(__builtin_sprintf, "ic*RcC*R.", "nFp:1:") +BUILTIN(__builtin_snprintf, "ic*RzcC*R.", "nFp:2:") +BUILTIN(__builtin_vprintf, "icC*Ra", "nFP:0:") +BUILTIN(__builtin_vfprintf, "iP*RcC*Ra", "nFP:1:") +BUILTIN(__builtin_vsprintf, "ic*RcC*Ra", "nFP:1:") +BUILTIN(__builtin_vsnprintf, "ic*RzcC*Ra", "nFP:2:") +BUILTIN(__builtin_fscanf, "iP*RcC*R.", "Fs:1:") +BUILTIN(__builtin_scanf, "icC*R.", "Fs:0:") +BUILTIN(__builtin_sscanf, "icC*RcC*R.", "Fs:1:") +BUILTIN(__builtin_vfscanf, "iP*RcC*Ra", "FS:1:") +BUILTIN(__builtin_vscanf, "icC*Ra", "FS:0:") +BUILTIN(__builtin_vsscanf, "icC*RcC*Ra", "FS:1:") BUILTIN(__builtin_thread_pointer, "v*", "nc") -BUILTIN(__builtin_launder, "v*v*", "nt") -LANGBUILTIN(__builtin_is_constant_evaluated, "b", "n", CXX_LANG) +BUILTIN(__builtin_launder, "v*v*", "ntE") +LANGBUILTIN(__builtin_is_constant_evaluated, "b", "nE", CXX_LANG) // GCC exception builtins BUILTIN(__builtin_eh_return, "vzv*", "r") // FIXME: Takes intptr_t, not size_t! @@ -607,8 +643,8 @@ BUILTIN(__builtin_dwarf_sp_column, "Ui", "n") BUILTIN(__builtin_extend_pointer, "ULLiv*", "n") // _Unwind_Word == uint64_t // GCC Object size checking builtins -BUILTIN(__builtin_object_size, "zvC*i", "nu") -BUILTIN(__builtin_dynamic_object_size, "zvC*i", "nu") // Clang only. +BUILTIN(__builtin_object_size, "zvC*i", "nuE") +BUILTIN(__builtin_dynamic_object_size, "zvC*i", "nuE") // Clang only. BUILTIN(__builtin___memcpy_chk, "v*v*vC*zz", "nF") BUILTIN(__builtin___memccpy_chk, "v*v*vC*izz", "nF") BUILTIN(__builtin___memmove_chk, "v*v*vC*zz", "nF") @@ -622,18 +658,18 @@ BUILTIN(__builtin___strlcpy_chk, "zc*cC*zz", "nF") BUILTIN(__builtin___strncat_chk, "c*c*cC*zz", "nF") BUILTIN(__builtin___strncpy_chk, "c*c*cC*zz", "nF") BUILTIN(__builtin___stpncpy_chk, "c*c*cC*zz", "nF") -BUILTIN(__builtin___snprintf_chk, "ic*zizcC*.", "Fp:4:") -BUILTIN(__builtin___sprintf_chk, "ic*izcC*.", "Fp:3:") -BUILTIN(__builtin___vsnprintf_chk, "ic*zizcC*a", "FP:4:") -BUILTIN(__builtin___vsprintf_chk, "ic*izcC*a", "FP:3:") -BUILTIN(__builtin___fprintf_chk, "iP*icC*.", "Fp:2:") -BUILTIN(__builtin___printf_chk, "iicC*.", "Fp:1:") -BUILTIN(__builtin___vfprintf_chk, "iP*icC*a", "FP:2:") -BUILTIN(__builtin___vprintf_chk, "iicC*a", "FP:1:") +BUILTIN(__builtin___snprintf_chk, "ic*RzizcC*R.", "Fp:4:") +BUILTIN(__builtin___sprintf_chk, "ic*RizcC*R.", "Fp:3:") +BUILTIN(__builtin___vsnprintf_chk, "ic*RzizcC*Ra", "FP:4:") +BUILTIN(__builtin___vsprintf_chk, "ic*RizcC*Ra", "FP:3:") +BUILTIN(__builtin___fprintf_chk, "iP*RicC*R.", "Fp:2:") +BUILTIN(__builtin___printf_chk, "iicC*R.", "Fp:1:") +BUILTIN(__builtin___vfprintf_chk, "iP*RicC*Ra", "FP:2:") +BUILTIN(__builtin___vprintf_chk, "iicC*Ra", "FP:1:") BUILTIN(__builtin_unpredictable, "LiLi" , "nc") -BUILTIN(__builtin_expect, "LiLiLi" , "nc") -BUILTIN(__builtin_expect_with_probability, "LiLiLid", "nc") +BUILTIN(__builtin_expect, "LiLiLi" , "ncE") +BUILTIN(__builtin_expect_with_probability, "LiLiLid", "ncE") BUILTIN(__builtin_prefetch, "vvC*.", "nc") BUILTIN(__builtin_readcyclecounter, "ULLi", "n") BUILTIN(__builtin_trap, "v", "nr") @@ -641,9 +677,46 @@ BUILTIN(__builtin_debugtrap, "v", "n") BUILTIN(__builtin_unreachable, "v", "nr") BUILTIN(__builtin_shufflevector, "v." , "nct") BUILTIN(__builtin_convertvector, "v." , "nct") +BUILTIN(__builtin_vectorelements, "v." , "nct") BUILTIN(__builtin_alloca, "v*z" , "Fn") +BUILTIN(__builtin_alloca_uninitialized, "v*z", "Fn") BUILTIN(__builtin_alloca_with_align, "v*zIz", "Fn") +BUILTIN(__builtin_alloca_with_align_uninitialized, "v*zIz", "Fn") BUILTIN(__builtin_call_with_static_chain, "v.", "nt") +BUILTIN(__builtin_nondeterministic_value, "v.", "nt") + +BUILTIN(__builtin_elementwise_abs, "v.", "nct") +BUILTIN(__builtin_elementwise_bitreverse, "v.", "nct") +BUILTIN(__builtin_elementwise_max, "v.", "nct") +BUILTIN(__builtin_elementwise_min, "v.", "nct") +BUILTIN(__builtin_elementwise_ceil, "v.", "nct") +BUILTIN(__builtin_elementwise_cos, "v.", "nct") +BUILTIN(__builtin_elementwise_exp, "v.", "nct") +BUILTIN(__builtin_elementwise_exp2, "v.", "nct") +BUILTIN(__builtin_elementwise_floor, "v.", "nct") +BUILTIN(__builtin_elementwise_log, "v.", "nct") +BUILTIN(__builtin_elementwise_log2, "v.", "nct") +BUILTIN(__builtin_elementwise_log10, "v.", "nct") +BUILTIN(__builtin_elementwise_pow, "v.", "nct") +BUILTIN(__builtin_elementwise_roundeven, "v.", "nct") +BUILTIN(__builtin_elementwise_round, "v.", "nct") +BUILTIN(__builtin_elementwise_rint, "v.", "nct") +BUILTIN(__builtin_elementwise_nearbyint, "v.", "nct") +BUILTIN(__builtin_elementwise_sin, "v.", "nct") +BUILTIN(__builtin_elementwise_sqrt, "v.", "nct") +BUILTIN(__builtin_elementwise_trunc, "v.", "nct") +BUILTIN(__builtin_elementwise_canonicalize, "v.", "nct") +BUILTIN(__builtin_elementwise_copysign, "v.", "nct") +BUILTIN(__builtin_elementwise_fma, "v.", "nct") +BUILTIN(__builtin_elementwise_add_sat, "v.", "nct") +BUILTIN(__builtin_elementwise_sub_sat, "v.", "nct") +BUILTIN(__builtin_reduce_max, "v.", "nct") +BUILTIN(__builtin_reduce_min, "v.", "nct") +BUILTIN(__builtin_reduce_xor, "v.", "nct") +BUILTIN(__builtin_reduce_or, "v.", "nct") +BUILTIN(__builtin_reduce_and, "v.", "nct") +BUILTIN(__builtin_reduce_add, "v.", "nct") +BUILTIN(__builtin_reduce_mul, "v.", "nct") BUILTIN(__builtin_matrix_transpose, "v.", "nFt") BUILTIN(__builtin_matrix_column_major_load, "v.", "nFt") @@ -794,11 +867,12 @@ ATOMIC_BUILTIN(__c11_atomic_fetch_sub, "v.", "t") ATOMIC_BUILTIN(__c11_atomic_fetch_and, "v.", "t") ATOMIC_BUILTIN(__c11_atomic_fetch_or, "v.", "t") ATOMIC_BUILTIN(__c11_atomic_fetch_xor, "v.", "t") +ATOMIC_BUILTIN(__c11_atomic_fetch_nand, "v.", "t") ATOMIC_BUILTIN(__c11_atomic_fetch_max, "v.", "t") ATOMIC_BUILTIN(__c11_atomic_fetch_min, "v.", "t") BUILTIN(__c11_atomic_thread_fence, "vi", "n") BUILTIN(__c11_atomic_signal_fence, "vi", "n") -BUILTIN(__c11_atomic_is_lock_free, "bz", "n") +BUILTIN(__c11_atomic_is_lock_free, "bz", "nE") // GNU atomic builtins. ATOMIC_BUILTIN(__atomic_load, "v.", "t") @@ -827,8 +901,34 @@ BUILTIN(__atomic_test_and_set, "bvD*i", "n") BUILTIN(__atomic_clear, "vvD*i", "n") BUILTIN(__atomic_thread_fence, "vi", "n") BUILTIN(__atomic_signal_fence, "vi", "n") -BUILTIN(__atomic_always_lock_free, "bzvCD*", "n") -BUILTIN(__atomic_is_lock_free, "bzvCD*", "n") +BUILTIN(__atomic_always_lock_free, "bzvCD*", "nE") +BUILTIN(__atomic_is_lock_free, "bzvCD*", "nE") + +// GNU atomic builtins with atomic scopes. +ATOMIC_BUILTIN(__scoped_atomic_load, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_load_n, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_store, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_store_n, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_exchange, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_exchange_n, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_compare_exchange, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_compare_exchange_n, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_fetch_add, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_fetch_sub, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_fetch_and, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_fetch_or, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_fetch_xor, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_fetch_nand, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_add_fetch, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_sub_fetch, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_and_fetch, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_or_fetch, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_xor_fetch, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_max_fetch, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_min_fetch, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_nand_fetch, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_fetch_min, "v.", "t") +ATOMIC_BUILTIN(__scoped_atomic_fetch_max, "v.", "t") // OpenCL 2.0 atomic builtins. ATOMIC_BUILTIN(__opencl_atomic_init, "v.", "t") @@ -849,6 +949,20 @@ ATOMIC_BUILTIN(__opencl_atomic_fetch_max, "v.", "t") ATOMIC_BUILTIN(__atomic_fetch_min, "v.", "t") ATOMIC_BUILTIN(__atomic_fetch_max, "v.", "t") +// HIP atomic builtins. +ATOMIC_BUILTIN(__hip_atomic_load, "v.", "t") +ATOMIC_BUILTIN(__hip_atomic_store, "v.", "t") +ATOMIC_BUILTIN(__hip_atomic_compare_exchange_weak, "v.", "t") +ATOMIC_BUILTIN(__hip_atomic_compare_exchange_strong, "v.", "t") +ATOMIC_BUILTIN(__hip_atomic_exchange, "v.", "t") +ATOMIC_BUILTIN(__hip_atomic_fetch_add, "v.", "t") +ATOMIC_BUILTIN(__hip_atomic_fetch_sub, "v.", "t") +ATOMIC_BUILTIN(__hip_atomic_fetch_and, "v.", "t") +ATOMIC_BUILTIN(__hip_atomic_fetch_or, "v.", "t") +ATOMIC_BUILTIN(__hip_atomic_fetch_xor, "v.", "t") +ATOMIC_BUILTIN(__hip_atomic_fetch_min, "v.", "t") +ATOMIC_BUILTIN(__hip_atomic_fetch_max, "v.", "t") + #undef ATOMIC_BUILTIN // Non-overloaded atomic builtins. @@ -870,7 +984,7 @@ BUILTIN(__warn_memset_zero_len, "v", "nU") // Microsoft builtins. These are only active with -fms-extensions. LANGBUILTIN(_alloca, "v*z", "n", ALL_MS_LANGUAGES) LANGBUILTIN(__annotation, "wC*.","n", ALL_MS_LANGUAGES) -LANGBUILTIN(__assume, "vb", "n", ALL_MS_LANGUAGES) +LANGBUILTIN(__assume, "vb", "nE", ALL_MS_LANGUAGES) LANGBUILTIN(_bittest, "UcNiC*Ni", "n", ALL_MS_LANGUAGES) LANGBUILTIN(_bittestandcomplement, "UcNi*Ni", "n", ALL_MS_LANGUAGES) LANGBUILTIN(_bittestandreset, "UcNi*Ni", "n", ALL_MS_LANGUAGES) @@ -879,9 +993,9 @@ LANGBUILTIN(_bittest64, "UcWiC*Wi", "n", ALL_MS_LANGUAGES) LANGBUILTIN(_bittestandcomplement64, "UcWi*Wi", "n", ALL_MS_LANGUAGES) LANGBUILTIN(_bittestandreset64, "UcWi*Wi", "n", ALL_MS_LANGUAGES) LANGBUILTIN(_bittestandset64, "UcWi*Wi", "n", ALL_MS_LANGUAGES) -LIBBUILTIN(_byteswap_ushort, "UsUs", "fnc", "stdlib.h", ALL_MS_LANGUAGES) -LIBBUILTIN(_byteswap_ulong, "UNiUNi", "fnc", "stdlib.h", ALL_MS_LANGUAGES) -LIBBUILTIN(_byteswap_uint64, "ULLiULLi", "fnc", "stdlib.h", ALL_MS_LANGUAGES) +LIBBUILTIN(_byteswap_ushort, "UsUs", "fnc", STDLIB_H, ALL_MS_LANGUAGES) +LIBBUILTIN(_byteswap_ulong, "UNiUNi", "fnc", STDLIB_H, ALL_MS_LANGUAGES) +LIBBUILTIN(_byteswap_uint64, "ULLiULLi", "fnc", STDLIB_H, ALL_MS_LANGUAGES) LANGBUILTIN(__debugbreak, "v", "n", ALL_MS_LANGUAGES) LANGBUILTIN(__exception_code, "UNi", "n", ALL_MS_LANGUAGES) LANGBUILTIN(_exception_code, "UNi", "n", ALL_MS_LANGUAGES) @@ -889,7 +1003,7 @@ LANGBUILTIN(__exception_info, "v*", "n", ALL_MS_LANGUAGES) LANGBUILTIN(_exception_info, "v*", "n", ALL_MS_LANGUAGES) LANGBUILTIN(__abnormal_termination, "i", "n", ALL_MS_LANGUAGES) LANGBUILTIN(_abnormal_termination, "i", "n", ALL_MS_LANGUAGES) -LANGBUILTIN(__GetExceptionInfo, "v*.", "ntu", ALL_MS_LANGUAGES) +LANGBUILTIN(__GetExceptionInfo, "v*.", "zntu", ALL_MS_LANGUAGES) LANGBUILTIN(_InterlockedAnd8, "ccD*c", "n", ALL_MS_LANGUAGES) LANGBUILTIN(_InterlockedAnd16, "ssD*s", "n", ALL_MS_LANGUAGES) LANGBUILTIN(_InterlockedAnd, "NiNiD*Ni", "n", ALL_MS_LANGUAGES) @@ -938,586 +1052,602 @@ LANGBUILTIN(__iso_volatile_store16, "vsD*s", "n", ALL_MS_LANGUAGES) LANGBUILTIN(__iso_volatile_store32, "viD*i", "n", ALL_MS_LANGUAGES) LANGBUILTIN(__iso_volatile_store64, "vLLiD*LLi", "n", ALL_MS_LANGUAGES) LANGBUILTIN(__noop, "i.", "n", ALL_MS_LANGUAGES) -LANGBUILTIN(__lzcnt16, "UsUs", "nc", ALL_MS_LANGUAGES) -LANGBUILTIN(__lzcnt, "UiUi", "nc", ALL_MS_LANGUAGES) -LANGBUILTIN(__lzcnt64, "UWiUWi", "nc", ALL_MS_LANGUAGES) -LANGBUILTIN(__popcnt16, "UsUs", "nc", ALL_MS_LANGUAGES) -LANGBUILTIN(__popcnt, "UiUi", "nc", ALL_MS_LANGUAGES) -LANGBUILTIN(__popcnt64, "UWiUWi", "nc", ALL_MS_LANGUAGES) +LANGBUILTIN(__lzcnt16, "UsUs", "ncE", ALL_MS_LANGUAGES) +LANGBUILTIN(__lzcnt, "UiUi", "ncE", ALL_MS_LANGUAGES) +LANGBUILTIN(__lzcnt64, "UWiUWi", "ncE", ALL_MS_LANGUAGES) +LANGBUILTIN(__popcnt16, "UsUs", "ncE", ALL_MS_LANGUAGES) +LANGBUILTIN(__popcnt, "UiUi", "ncE", ALL_MS_LANGUAGES) +LANGBUILTIN(__popcnt64, "UWiUWi", "ncE", ALL_MS_LANGUAGES) LANGBUILTIN(_ReturnAddress, "v*", "n", ALL_MS_LANGUAGES) -LANGBUILTIN(_rotl8, "UcUcUc", "n", ALL_MS_LANGUAGES) -LANGBUILTIN(_rotl16, "UsUsUc", "n", ALL_MS_LANGUAGES) -LANGBUILTIN(_rotl, "UiUii", "n", ALL_MS_LANGUAGES) -LANGBUILTIN(_lrotl, "ULiULii", "n", ALL_MS_LANGUAGES) -LANGBUILTIN(_rotl64, "UWiUWii", "n", ALL_MS_LANGUAGES) -LANGBUILTIN(_rotr8, "UcUcUc", "n", ALL_MS_LANGUAGES) -LANGBUILTIN(_rotr16, "UsUsUc", "n", ALL_MS_LANGUAGES) -LANGBUILTIN(_rotr, "UiUii", "n", ALL_MS_LANGUAGES) -LANGBUILTIN(_lrotr, "ULiULii", "n", ALL_MS_LANGUAGES) -LANGBUILTIN(_rotr64, "UWiUWii", "n", ALL_MS_LANGUAGES) +LANGBUILTIN(_rotl8, "UcUcUc", "nE", ALL_MS_LANGUAGES) +LANGBUILTIN(_rotl16, "UsUsUc", "nE", ALL_MS_LANGUAGES) +LANGBUILTIN(_rotl, "UiUii", "nE", ALL_MS_LANGUAGES) +LANGBUILTIN(_lrotl, "ULiULii", "nE", ALL_MS_LANGUAGES) +LANGBUILTIN(_rotl64, "UWiUWii", "nE", ALL_MS_LANGUAGES) +LANGBUILTIN(_rotr8, "UcUcUc", "nE", ALL_MS_LANGUAGES) +LANGBUILTIN(_rotr16, "UsUsUc", "nE", ALL_MS_LANGUAGES) +LANGBUILTIN(_rotr, "UiUii", "nE", ALL_MS_LANGUAGES) +LANGBUILTIN(_lrotr, "ULiULii", "nE", ALL_MS_LANGUAGES) +LANGBUILTIN(_rotr64, "UWiUWii", "nE", ALL_MS_LANGUAGES) LANGBUILTIN(__va_start, "vc**.", "nt", ALL_MS_LANGUAGES) LANGBUILTIN(__fastfail, "vUi", "nr", ALL_MS_LANGUAGES) // Microsoft library builtins. -LIBBUILTIN(_setjmpex, "iJ", "fjT", "setjmpex.h", ALL_MS_LANGUAGES) +LIBBUILTIN(_setjmpex, "iJ", "fjT", SETJMPEX_H, ALL_MS_LANGUAGES) // C99 library functions // C99 stdarg.h -LIBBUILTIN(va_start, "vA.", "fn", "stdarg.h", ALL_LANGUAGES) -LIBBUILTIN(va_end, "vA", "fn", "stdarg.h", ALL_LANGUAGES) -LIBBUILTIN(va_copy, "vAA", "fn", "stdarg.h", ALL_LANGUAGES) +LIBBUILTIN(va_start, "vA.", "fn", STDARG_H, ALL_LANGUAGES) +LIBBUILTIN(va_end, "vA", "fn", STDARG_H, ALL_LANGUAGES) +LIBBUILTIN(va_copy, "vAA", "fn", STDARG_H, ALL_LANGUAGES) // C99 stdlib.h -LIBBUILTIN(abort, "v", "fr", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(calloc, "v*zz", "f", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(exit, "vi", "fr", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(_Exit, "vi", "fr", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(malloc, "v*z", "f", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(realloc, "v*v*z", "f", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(free, "vv*", "f", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(strtod, "dcC*c**", "f", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(strtof, "fcC*c**", "f", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(strtold, "LdcC*c**", "f", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(strtol, "LicC*c**i", "f", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(strtoll, "LLicC*c**i", "f", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(strtoul, "ULicC*c**i", "f", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(strtoull, "ULLicC*c**i", "f", "stdlib.h", ALL_LANGUAGES) +LIBBUILTIN(abort, "v", "fr", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(calloc, "v*zz", "f", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(exit, "vi", "fr", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(_Exit, "vi", "fr", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(malloc, "v*z", "f", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(realloc, "v*v*z", "f", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(free, "vv*", "f", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(strtod, "dcC*c**", "f", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(strtof, "fcC*c**", "f", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(strtold, "LdcC*c**", "f", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(strtol, "LicC*c**i", "f", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(strtoll, "LLicC*c**i", "f", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(strtoul, "ULicC*c**i", "f", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(strtoull, "ULLicC*c**i", "f", STDLIB_H, ALL_LANGUAGES) // C11 stdlib.h -LIBBUILTIN(aligned_alloc, "v*zz", "f", "stdlib.h", ALL_LANGUAGES) +LIBBUILTIN(aligned_alloc, "v*zz", "f", STDLIB_H, ALL_LANGUAGES) // C99 string.h -LIBBUILTIN(memcpy, "v*v*vC*z", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(memcmp, "ivC*vC*z", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(memmove, "v*v*vC*z", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strcpy, "c*c*cC*", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strncpy, "c*c*cC*z", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strcmp, "icC*cC*", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strncmp, "icC*cC*z", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strcat, "c*c*cC*", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strncat, "c*c*cC*z", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strxfrm, "zc*cC*z", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(memchr, "v*vC*iz", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strchr, "c*cC*i", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strcspn, "zcC*cC*", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strpbrk, "c*cC*cC*", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strrchr, "c*cC*i", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strspn, "zcC*cC*", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strstr, "c*cC*cC*", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strtok, "c*c*cC*", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(memset, "v*v*iz", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strerror, "c*i", "f", "string.h", ALL_LANGUAGES) -LIBBUILTIN(strlen, "zcC*", "f", "string.h", ALL_LANGUAGES) +LIBBUILTIN(memcpy, "v*v*vC*z", "fE", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(memcmp, "ivC*vC*z", "fE", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(memmove, "v*v*vC*z", "fE", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strcpy, "c*c*cC*", "f", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strncpy, "c*c*cC*z", "f", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strcmp, "icC*cC*", "fE", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strncmp, "icC*cC*z", "fE", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strcat, "c*c*cC*", "f", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strncat, "c*c*cC*z", "f", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strxfrm, "zc*cC*z", "f", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(memchr, "v*vC*iz", "fE", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strchr, "c*cC*i", "fE", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strcspn, "zcC*cC*", "f", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strpbrk, "c*cC*cC*", "f", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strrchr, "c*cC*i", "f", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strspn, "zcC*cC*", "f", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strstr, "c*cC*cC*", "f", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strtok, "c*c*cC*", "f", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(memset, "v*v*iz", "f", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strerror, "c*i", "f", STRING_H, ALL_LANGUAGES) +LIBBUILTIN(strlen, "zcC*", "fE", STRING_H, ALL_LANGUAGES) // C99 stdio.h // FIXME: This list is incomplete. -LIBBUILTIN(printf, "icC*.", "fp:0:", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(fprintf, "iP*cC*.", "fp:1:", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(snprintf, "ic*zcC*.", "fp:2:", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(sprintf, "ic*cC*.", "fp:1:", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(vprintf, "icC*a", "fP:0:", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(vfprintf, "iP*cC*a", "fP:1:", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(vsnprintf, "ic*zcC*a", "fP:2:", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(vsprintf, "ic*cC*a", "fP:1:", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(scanf, "icC*R.", "fs:0:", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(fscanf, "iP*RcC*R.", "fs:1:", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(sscanf, "icC*RcC*R.", "fs:1:", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(vscanf, "icC*Ra", "fS:0:", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(vfscanf, "iP*RcC*Ra", "fS:1:", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(vsscanf, "icC*RcC*Ra", "fS:1:", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(fopen, "P*cC*cC*", "f", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(fread, "zv*zzP*", "f", "stdio.h", ALL_LANGUAGES) -LIBBUILTIN(fwrite, "zvC*zzP*", "f", "stdio.h", ALL_LANGUAGES) +LIBBUILTIN(printf, "icC*.", "fp:0:", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(fprintf, "iP*cC*.", "fp:1:", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(snprintf, "ic*zcC*.", "fp:2:", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(sprintf, "ic*cC*.", "fp:1:", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(vprintf, "icC*a", "fP:0:", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(vfprintf, "iP*cC*a", "fP:1:", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(vsnprintf, "ic*zcC*a", "fP:2:", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(vsprintf, "ic*cC*a", "fP:1:", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(scanf, "icC*R.", "fs:0:", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(fscanf, "iP*RcC*R.", "fs:1:", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(sscanf, "icC*RcC*R.", "fs:1:", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(vscanf, "icC*Ra", "fS:0:", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(vfscanf, "iP*RcC*Ra", "fS:1:", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(vsscanf, "icC*RcC*Ra", "fS:1:", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(fopen, "P*cC*cC*", "f", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(fread, "zv*zzP*", "f", STDIO_H, ALL_LANGUAGES) +LIBBUILTIN(fwrite, "zvC*zzP*", "f", STDIO_H, ALL_LANGUAGES) // C99 ctype.h -LIBBUILTIN(isalnum, "ii", "fnU", "ctype.h", ALL_LANGUAGES) -LIBBUILTIN(isalpha, "ii", "fnU", "ctype.h", ALL_LANGUAGES) -LIBBUILTIN(isblank, "ii", "fnU", "ctype.h", ALL_LANGUAGES) -LIBBUILTIN(iscntrl, "ii", "fnU", "ctype.h", ALL_LANGUAGES) -LIBBUILTIN(isdigit, "ii", "fnU", "ctype.h", ALL_LANGUAGES) -LIBBUILTIN(isgraph, "ii", "fnU", "ctype.h", ALL_LANGUAGES) -LIBBUILTIN(islower, "ii", "fnU", "ctype.h", ALL_LANGUAGES) -LIBBUILTIN(isprint, "ii", "fnU", "ctype.h", ALL_LANGUAGES) -LIBBUILTIN(ispunct, "ii", "fnU", "ctype.h", ALL_LANGUAGES) -LIBBUILTIN(isspace, "ii", "fnU", "ctype.h", ALL_LANGUAGES) -LIBBUILTIN(isupper, "ii", "fnU", "ctype.h", ALL_LANGUAGES) -LIBBUILTIN(isxdigit, "ii", "fnU", "ctype.h", ALL_LANGUAGES) -LIBBUILTIN(tolower, "ii", "fnU", "ctype.h", ALL_LANGUAGES) -LIBBUILTIN(toupper, "ii", "fnU", "ctype.h", ALL_LANGUAGES) +LIBBUILTIN(isalnum, "ii", "fnU", CTYPE_H, ALL_LANGUAGES) +LIBBUILTIN(isalpha, "ii", "fnU", CTYPE_H, ALL_LANGUAGES) +LIBBUILTIN(isblank, "ii", "fnU", CTYPE_H, ALL_LANGUAGES) +LIBBUILTIN(iscntrl, "ii", "fnU", CTYPE_H, ALL_LANGUAGES) +LIBBUILTIN(isdigit, "ii", "fnU", CTYPE_H, ALL_LANGUAGES) +LIBBUILTIN(isgraph, "ii", "fnU", CTYPE_H, ALL_LANGUAGES) +LIBBUILTIN(islower, "ii", "fnU", CTYPE_H, ALL_LANGUAGES) +LIBBUILTIN(isprint, "ii", "fnU", CTYPE_H, ALL_LANGUAGES) +LIBBUILTIN(ispunct, "ii", "fnU", CTYPE_H, ALL_LANGUAGES) +LIBBUILTIN(isspace, "ii", "fnU", CTYPE_H, ALL_LANGUAGES) +LIBBUILTIN(isupper, "ii", "fnU", CTYPE_H, ALL_LANGUAGES) +LIBBUILTIN(isxdigit, "ii", "fnU", CTYPE_H, ALL_LANGUAGES) +LIBBUILTIN(tolower, "ii", "fnU", CTYPE_H, ALL_LANGUAGES) +LIBBUILTIN(toupper, "ii", "fnU", CTYPE_H, ALL_LANGUAGES) // C99 wchar.h // FIXME: This list is incomplete. We should cover at least the functions that // take format strings. -LIBBUILTIN(wcschr, "w*wC*w", "f", "wchar.h", ALL_LANGUAGES) -LIBBUILTIN(wcscmp, "iwC*wC*", "f", "wchar.h", ALL_LANGUAGES) -LIBBUILTIN(wcslen, "zwC*", "f", "wchar.h", ALL_LANGUAGES) -LIBBUILTIN(wcsncmp, "iwC*wC*z", "f", "wchar.h", ALL_LANGUAGES) -LIBBUILTIN(wmemchr, "w*wC*wz", "f", "wchar.h", ALL_LANGUAGES) -LIBBUILTIN(wmemcmp, "iwC*wC*z", "f", "wchar.h", ALL_LANGUAGES) -LIBBUILTIN(wmemcpy, "w*w*wC*z", "f", "wchar.h", ALL_LANGUAGES) -LIBBUILTIN(wmemmove,"w*w*wC*z", "f", "wchar.h", ALL_LANGUAGES) +LIBBUILTIN(wcschr, "w*wC*w", "fE", WCHAR_H, ALL_LANGUAGES) +LIBBUILTIN(wcscmp, "iwC*wC*", "fE", WCHAR_H, ALL_LANGUAGES) +LIBBUILTIN(wcslen, "zwC*", "fE", WCHAR_H, ALL_LANGUAGES) +LIBBUILTIN(wcsncmp, "iwC*wC*z", "fE", WCHAR_H, ALL_LANGUAGES) +LIBBUILTIN(wmemchr, "w*wC*wz", "fE", WCHAR_H, ALL_LANGUAGES) +LIBBUILTIN(wmemcmp, "iwC*wC*z", "fE", WCHAR_H, ALL_LANGUAGES) +LIBBUILTIN(wmemcpy, "w*w*wC*z", "fE", WCHAR_H, ALL_LANGUAGES) +LIBBUILTIN(wmemmove,"w*w*wC*z", "fE", WCHAR_H, ALL_LANGUAGES) // C99 // In some systems setjmp is a macro that expands to _setjmp. We undefine // it here to avoid having two identical LIBBUILTIN entries. #undef setjmp -LIBBUILTIN(setjmp, "iJ", "fjT", "setjmp.h", ALL_LANGUAGES) -LIBBUILTIN(longjmp, "vJi", "frT", "setjmp.h", ALL_LANGUAGES) +LIBBUILTIN(setjmp, "iJ", "fjT", SETJMP_H, ALL_LANGUAGES) +LIBBUILTIN(longjmp, "vJi", "frT", SETJMP_H, ALL_LANGUAGES) // Non-C library functions, active in GNU mode only. // Functions with (returns_twice) attribute (marked as "j") are still active in // all languages, because losing this attribute would result in miscompilation // when these functions are used in non-GNU mode. PR16138. -LIBBUILTIN(alloca, "v*z", "f", "stdlib.h", ALL_GNU_LANGUAGES) +LIBBUILTIN(alloca, "v*z", "f", STDLIB_H, ALL_GNU_LANGUAGES) // POSIX malloc.h -LIBBUILTIN(memalign, "v*zz", "f", "malloc.h", ALL_GNU_LANGUAGES) +LIBBUILTIN(memalign, "v*zz", "f", MALLOC_H, ALL_GNU_LANGUAGES) // POSIX string.h -LIBBUILTIN(memccpy, "v*v*vC*iz", "f", "string.h", ALL_GNU_LANGUAGES) -LIBBUILTIN(mempcpy, "v*v*vC*z", "f", "string.h", ALL_GNU_LANGUAGES) -LIBBUILTIN(stpcpy, "c*c*cC*", "f", "string.h", ALL_GNU_LANGUAGES) -LIBBUILTIN(stpncpy, "c*c*cC*z", "f", "string.h", ALL_GNU_LANGUAGES) -LIBBUILTIN(strdup, "c*cC*", "f", "string.h", ALL_GNU_LANGUAGES) -LIBBUILTIN(strndup, "c*cC*z", "f", "string.h", ALL_GNU_LANGUAGES) +LIBBUILTIN(memccpy, "v*v*vC*iz", "f", STRING_H, ALL_GNU_LANGUAGES) +LIBBUILTIN(mempcpy, "v*v*vC*z", "f", STRING_H, ALL_GNU_LANGUAGES) +LIBBUILTIN(stpcpy, "c*c*cC*", "f", STRING_H, ALL_GNU_LANGUAGES) +LIBBUILTIN(stpncpy, "c*c*cC*z", "f", STRING_H, ALL_GNU_LANGUAGES) +LIBBUILTIN(strdup, "c*cC*", "f", STRING_H, ALL_GNU_LANGUAGES) +LIBBUILTIN(strndup, "c*cC*z", "f", STRING_H, ALL_GNU_LANGUAGES) // POSIX strings.h -LIBBUILTIN(index, "c*cC*i", "f", "strings.h", ALL_GNU_LANGUAGES) -LIBBUILTIN(rindex, "c*cC*i", "f", "strings.h", ALL_GNU_LANGUAGES) -LIBBUILTIN(bzero, "vv*z", "f", "strings.h", ALL_GNU_LANGUAGES) -LIBBUILTIN(bcmp, "ivC*vC*z", "f", "strings.h", ALL_GNU_LANGUAGES) +LIBBUILTIN(index, "c*cC*i", "f", STRINGS_H, ALL_GNU_LANGUAGES) +LIBBUILTIN(rindex, "c*cC*i", "f", STRINGS_H, ALL_GNU_LANGUAGES) +LIBBUILTIN(bzero, "vv*z", "f", STRINGS_H, ALL_GNU_LANGUAGES) +LIBBUILTIN(bcopy, "vvC*v*z", "f", STRINGS_H, ALL_GNU_LANGUAGES) +LIBBUILTIN(bcmp, "ivC*vC*z", "fE", STRINGS_H, ALL_GNU_LANGUAGES) // In some systems str[n]casejmp is a macro that expands to _str[n]icmp. // We undefine then here to avoid wrong name. #undef strcasecmp #undef strncasecmp -LIBBUILTIN(strcasecmp, "icC*cC*", "f", "strings.h", ALL_GNU_LANGUAGES) -LIBBUILTIN(strncasecmp, "icC*cC*z", "f", "strings.h", ALL_GNU_LANGUAGES) +LIBBUILTIN(strcasecmp, "icC*cC*", "f", STRINGS_H, ALL_GNU_LANGUAGES) +LIBBUILTIN(strncasecmp, "icC*cC*z", "f", STRINGS_H, ALL_GNU_LANGUAGES) // POSIX unistd.h -LIBBUILTIN(_exit, "vi", "fr", "unistd.h", ALL_GNU_LANGUAGES) -LIBBUILTIN(vfork, "p", "fjT", "unistd.h", ALL_LANGUAGES) +LIBBUILTIN(_exit, "vi", "fr", UNISTD_H, ALL_GNU_LANGUAGES) +LIBBUILTIN(vfork, "p", "fjT", UNISTD_H, ALL_LANGUAGES) // POSIX pthread.h // FIXME: Should specify argument types. -LIBBUILTIN(pthread_create, "", "fC<2,3>", "pthread.h", ALL_GNU_LANGUAGES) +LIBBUILTIN(pthread_create, "", "fC<2,3>", PTHREAD_H, ALL_GNU_LANGUAGES) // POSIX setjmp.h // FIXME: MinGW _setjmp has an additional void* parameter. -LIBBUILTIN(_setjmp, "iJ", "fjT", "setjmp.h", ALL_LANGUAGES) -LIBBUILTIN(__sigsetjmp, "iSJi", "fjT", "setjmp.h", ALL_LANGUAGES) -LIBBUILTIN(sigsetjmp, "iSJi", "fjT", "setjmp.h", ALL_LANGUAGES) -LIBBUILTIN(savectx, "iJ", "fjT", "setjmp.h", ALL_LANGUAGES) -LIBBUILTIN(getcontext, "iK*", "fjT", "setjmp.h", ALL_LANGUAGES) - -LIBBUILTIN(_longjmp, "vJi", "frT", "setjmp.h", ALL_GNU_LANGUAGES) -LIBBUILTIN(siglongjmp, "vSJi", "frT", "setjmp.h", ALL_GNU_LANGUAGES) +LIBBUILTIN(_setjmp, "iJ", "fjT", SETJMP_H, ALL_LANGUAGES) +LIBBUILTIN(__sigsetjmp, "iSJi", "fjT", SETJMP_H, ALL_LANGUAGES) +LIBBUILTIN(sigsetjmp, "iSJi", "fjT", SETJMP_H, ALL_LANGUAGES) +LIBBUILTIN(savectx, "iJ", "fjT", SETJMP_H, ALL_LANGUAGES) +LIBBUILTIN(getcontext, "iK*", "fjT", SETJMP_H, ALL_LANGUAGES) + +LIBBUILTIN(_longjmp, "vJi", "frT", SETJMP_H, ALL_GNU_LANGUAGES) +LIBBUILTIN(siglongjmp, "vSJi", "frT", SETJMP_H, ALL_GNU_LANGUAGES) // non-standard but very common -LIBBUILTIN(strlcpy, "zc*cC*z", "f", "string.h", ALL_GNU_LANGUAGES) -LIBBUILTIN(strlcat, "zc*cC*z", "f", "string.h", ALL_GNU_LANGUAGES) +LIBBUILTIN(strlcpy, "zc*cC*z", "f", STRING_H, ALL_GNU_LANGUAGES) +LIBBUILTIN(strlcat, "zc*cC*z", "f", STRING_H, ALL_GNU_LANGUAGES) // id objc_msgSend(id, SEL, ...) -LIBBUILTIN(objc_msgSend, "GGH.", "f", "objc/message.h", OBJC_LANG) +LIBBUILTIN(objc_msgSend, "GGH.", "f", OBJC_MESSAGE_H, OBJC_LANG) // long double objc_msgSend_fpret(id self, SEL op, ...) -LIBBUILTIN(objc_msgSend_fpret, "LdGH.", "f", "objc/message.h", OBJC_LANG) +LIBBUILTIN(objc_msgSend_fpret, "LdGH.", "f", OBJC_MESSAGE_H, OBJC_LANG) // _Complex long double objc_msgSend_fp2ret(id self, SEL op, ...) -LIBBUILTIN(objc_msgSend_fp2ret, "XLdGH.", "f", "objc/message.h", OBJC_LANG) +LIBBUILTIN(objc_msgSend_fp2ret, "XLdGH.", "f", OBJC_MESSAGE_H, OBJC_LANG) // void objc_msgSend_stret (id, SEL, ...) -LIBBUILTIN(objc_msgSend_stret, "vGH.", "f", "objc/message.h", OBJC_LANG) +LIBBUILTIN(objc_msgSend_stret, "vGH.", "f", OBJC_MESSAGE_H, OBJC_LANG) // id objc_msgSendSuper(struct objc_super *super, SEL op, ...) -LIBBUILTIN(objc_msgSendSuper, "GM*H.", "f", "objc/message.h", OBJC_LANG) +LIBBUILTIN(objc_msgSendSuper, "GM*H.", "f", OBJC_MESSAGE_H, OBJC_LANG) // void objc_msgSendSuper_stret(struct objc_super *super, SEL op, ...) -LIBBUILTIN(objc_msgSendSuper_stret, "vM*H.", "f", "objc/message.h", OBJC_LANG) +LIBBUILTIN(objc_msgSendSuper_stret, "vM*H.", "f", OBJC_MESSAGE_H, OBJC_LANG) // id objc_getClass(const char *name) -LIBBUILTIN(objc_getClass, "GcC*", "f", "objc/runtime.h", OBJC_LANG) +LIBBUILTIN(objc_getClass, "GcC*", "f", OBJC_RUNTIME_H, OBJC_LANG) // id objc_getMetaClass(const char *name) -LIBBUILTIN(objc_getMetaClass, "GcC*", "f", "objc/runtime.h", OBJC_LANG) +LIBBUILTIN(objc_getMetaClass, "GcC*", "f", OBJC_RUNTIME_H, OBJC_LANG) // void objc_enumerationMutation(id) -LIBBUILTIN(objc_enumerationMutation, "vG", "f", "objc/runtime.h", OBJC_LANG) +LIBBUILTIN(objc_enumerationMutation, "vG", "f", OBJC_RUNTIME_H, OBJC_LANG) // id objc_read_weak(id *location) -LIBBUILTIN(objc_read_weak, "GG*", "f", "objc/objc-auto.h", OBJC_LANG) +LIBBUILTIN(objc_read_weak, "GG*", "f", OBJC_OBJC_AUTO_H, OBJC_LANG) // id objc_assign_weak(id value, id *location) -LIBBUILTIN(objc_assign_weak, "GGG*", "f", "objc/objc-auto.h", OBJC_LANG) +LIBBUILTIN(objc_assign_weak, "GGG*", "f", OBJC_OBJC_AUTO_H, OBJC_LANG) // id objc_assign_ivar(id value, id dest, ptrdiff_t offset) -LIBBUILTIN(objc_assign_ivar, "GGGY", "f", "objc/objc-auto.h", OBJC_LANG) +LIBBUILTIN(objc_assign_ivar, "GGGY", "f", OBJC_OBJC_AUTO_H, OBJC_LANG) // id objc_assign_global(id val, id *dest) -LIBBUILTIN(objc_assign_global, "GGG*", "f", "objc/objc-auto.h", OBJC_LANG) +LIBBUILTIN(objc_assign_global, "GGG*", "f", OBJC_OBJC_AUTO_H, OBJC_LANG) // id objc_assign_strongCast(id val, id *dest -LIBBUILTIN(objc_assign_strongCast, "GGG*", "f", "objc/objc-auto.h", OBJC_LANG) +LIBBUILTIN(objc_assign_strongCast, "GGG*", "f", OBJC_OBJC_AUTO_H, OBJC_LANG) // id objc_exception_extract(void *localExceptionData) -LIBBUILTIN(objc_exception_extract, "Gv*", "f", "objc/objc-exception.h", OBJC_LANG) +LIBBUILTIN(objc_exception_extract, "Gv*", "f", OBJC_OBJC_EXCEPTION_H, OBJC_LANG) // void objc_exception_try_enter(void *localExceptionData) -LIBBUILTIN(objc_exception_try_enter, "vv*", "f", "objc/objc-exception.h", OBJC_LANG) +LIBBUILTIN(objc_exception_try_enter, "vv*", "f", OBJC_OBJC_EXCEPTION_H, OBJC_LANG) // void objc_exception_try_exit(void *localExceptionData) -LIBBUILTIN(objc_exception_try_exit, "vv*", "f", "objc/objc-exception.h", OBJC_LANG) +LIBBUILTIN(objc_exception_try_exit, "vv*", "f", OBJC_OBJC_EXCEPTION_H, OBJC_LANG) // int objc_exception_match(Class exceptionClass, id exception) -LIBBUILTIN(objc_exception_match, "iGG", "f", "objc/objc-exception.h", OBJC_LANG) +LIBBUILTIN(objc_exception_match, "iGG", "f", OBJC_OBJC_EXCEPTION_H, OBJC_LANG) // void objc_exception_throw(id exception) -LIBBUILTIN(objc_exception_throw, "vG", "f", "objc/objc-exception.h", OBJC_LANG) +LIBBUILTIN(objc_exception_throw, "vG", "f", OBJC_OBJC_EXCEPTION_H, OBJC_LANG) // int objc_sync_enter(id obj) -LIBBUILTIN(objc_sync_enter, "iG", "f", "objc/objc-sync.h", OBJC_LANG) +LIBBUILTIN(objc_sync_enter, "iG", "f", OBJC_OBJC_SYNC_H, OBJC_LANG) // int objc_sync_exit(id obj) -LIBBUILTIN(objc_sync_exit, "iG", "f", "objc/objc-sync.h", OBJC_LANG) +LIBBUILTIN(objc_sync_exit, "iG", "f", OBJC_OBJC_SYNC_H, OBJC_LANG) BUILTIN(__builtin_objc_memmove_collectable, "v*v*vC*z", "nF") // void NSLog(NSString *fmt, ...) -LIBBUILTIN(NSLog, "vG.", "fp:0:", "Foundation/NSObjCRuntime.h", OBJC_LANG) +LIBBUILTIN(NSLog, "vG.", "fp:0:", FOUNDATION_NSOBJCRUNTIME_H, OBJC_LANG) // void NSLogv(NSString *fmt, va_list args) -LIBBUILTIN(NSLogv, "vGa", "fP:0:", "Foundation/NSObjCRuntime.h", OBJC_LANG) +LIBBUILTIN(NSLogv, "vGa", "fP:0:", FOUNDATION_NSOBJCRUNTIME_H, OBJC_LANG) // Builtin math library functions -LIBBUILTIN(atan2, "ddd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(atan2f, "fff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(atan2l, "LdLdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(atan2, "ddd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(atan2f, "fff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(atan2l, "LdLdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(abs, "ii", "fnc", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(labs, "LiLi", "fnc", "stdlib.h", ALL_LANGUAGES) -LIBBUILTIN(llabs, "LLiLLi", "fnc", "stdlib.h", ALL_LANGUAGES) +LIBBUILTIN(abs, "ii", "fnc", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(labs, "LiLi", "fnc", STDLIB_H, ALL_LANGUAGES) +LIBBUILTIN(llabs, "LLiLLi", "fnc", STDLIB_H, ALL_LANGUAGES) -LIBBUILTIN(copysign, "ddd", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(copysignf, "fff", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(copysignl, "LdLdLd", "fnc", "math.h", ALL_LANGUAGES) +LIBBUILTIN(copysign, "ddd", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(copysignf, "fff", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(copysignl, "LdLdLd", "fnc", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(fabs, "dd", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(fabsf, "ff", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(fabsl, "LdLd", "fnc", "math.h", ALL_LANGUAGES) +LIBBUILTIN(fabs, "dd", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(fabsf, "ff", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(fabsl, "LdLd", "fnc", MATH_H, ALL_LANGUAGES) // Some systems define finitef as alias of _finitef. #if defined (finitef) #undef finitef #endif -LIBBUILTIN(finite, "id", "fnc", "math.h", GNU_LANG) -LIBBUILTIN(finitef, "if", "fnc", "math.h", GNU_LANG) -LIBBUILTIN(finitel, "iLd", "fnc", "math.h", GNU_LANG) +LIBBUILTIN(finite, "id", "fnc", MATH_H, GNU_LANG) +LIBBUILTIN(finitef, "if", "fnc", MATH_H, GNU_LANG) +LIBBUILTIN(finitel, "iLd", "fnc", MATH_H, GNU_LANG) // glibc's math.h generates calls to __finite -LIBBUILTIN(__finite, "id", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(__finitef, "if", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(__finitel, "iLd", "fnc", "math.h", ALL_LANGUAGES) +LIBBUILTIN(__finite, "id", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(__finitef, "if", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(__finitel, "iLd", "fnc", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(fmod, "ddd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(fmodf, "fff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(fmodl, "LdLdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(fmod, "ddd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(fmodf, "fff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(fmodl, "LdLdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(frexp, "ddi*", "fn", "math.h", ALL_LANGUAGES) -LIBBUILTIN(frexpf, "ffi*", "fn", "math.h", ALL_LANGUAGES) -LIBBUILTIN(frexpl, "LdLdi*", "fn", "math.h", ALL_LANGUAGES) +LIBBUILTIN(frexp, "ddi*", "fn", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(frexpf, "ffi*", "fn", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(frexpl, "LdLdi*", "fn", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(ldexp, "ddi", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(ldexpf, "ffi", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(ldexpl, "LdLdi", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(ldexp, "ddi", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(ldexpf, "ffi", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(ldexpl, "LdLdi", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(modf, "ddd*", "fn", "math.h", ALL_LANGUAGES) -LIBBUILTIN(modff, "fff*", "fn", "math.h", ALL_LANGUAGES) -LIBBUILTIN(modfl, "LdLdLd*", "fn", "math.h", ALL_LANGUAGES) +LIBBUILTIN(modf, "ddd*", "fn", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(modff, "fff*", "fn", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(modfl, "LdLdLd*", "fn", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(nan, "dcC*", "fUn", "math.h", ALL_LANGUAGES) -LIBBUILTIN(nanf, "fcC*", "fUn", "math.h", ALL_LANGUAGES) -LIBBUILTIN(nanl, "LdcC*", "fUn", "math.h", ALL_LANGUAGES) +LIBBUILTIN(nan, "dcC*", "fUn", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(nanf, "fcC*", "fUn", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(nanl, "LdcC*", "fUn", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(pow, "ddd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(powf, "fff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(powl, "LdLdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(pow, "ddd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(powf, "fff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(powl, "LdLdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(acos, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(acosf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(acosl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(acos, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(acosf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(acosl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(acosh, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(acoshf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(acoshl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(acosh, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(acoshf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(acoshl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(asin, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(asinf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(asinl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(asin, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(asinf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(asinl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(asinh, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(asinhf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(asinhl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(asinh, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(asinhf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(asinhl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(atan, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(atanf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(atanl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(atan, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(atanf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(atanl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(atanh, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(atanhf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(atanhl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(atanh, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(atanhf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(atanhl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(cbrt, "dd", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(cbrtf, "ff", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(cbrtl, "LdLd", "fnc", "math.h", ALL_LANGUAGES) +LIBBUILTIN(cbrt, "dd", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(cbrtf, "ff", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(cbrtl, "LdLd", "fnc", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(ceil, "dd", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(ceilf, "ff", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(ceill, "LdLd", "fnc", "math.h", ALL_LANGUAGES) +LIBBUILTIN(ceil, "dd", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(ceilf, "ff", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(ceill, "LdLd", "fnc", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(cos, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(cosf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(cosl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(cos, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(cosf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(cosl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(cosh, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(coshf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(coshl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(cosh, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(coshf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(coshl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(erf, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(erff, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(erfl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(erf, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(erff, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(erfl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(erfc, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(erfcf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(erfcl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(erfc, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(erfcf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(erfcl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(exp, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(expf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(expl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(exp, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(expf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(expl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(exp2, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(exp2f, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(exp2l, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(exp2, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(exp2f, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(exp2l, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(expm1, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(expm1f, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(expm1l, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(expm1, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(expm1f, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(expm1l, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(fdim, "ddd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(fdimf, "fff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(fdiml, "LdLdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(fdim, "ddd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(fdimf, "fff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(fdiml, "LdLdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(floor, "dd", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(floorf, "ff", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(floorl, "LdLd", "fnc", "math.h", ALL_LANGUAGES) +LIBBUILTIN(floor, "dd", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(floorf, "ff", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(floorl, "LdLd", "fnc", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(fma, "dddd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(fmaf, "ffff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(fmal, "LdLdLdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(fma, "dddd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(fmaf, "ffff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(fmal, "LdLdLdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(fmax, "ddd", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(fmaxf, "fff", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(fmaxl, "LdLdLd", "fnc", "math.h", ALL_LANGUAGES) +LIBBUILTIN(fmax, "ddd", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(fmaxf, "fff", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(fmaxl, "LdLdLd", "fnc", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(fmin, "ddd", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(fminf, "fff", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(fminl, "LdLdLd", "fnc", "math.h", ALL_LANGUAGES) +LIBBUILTIN(fmin, "ddd", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(fminf, "fff", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(fminl, "LdLdLd", "fnc", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(hypot, "ddd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(hypotf, "fff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(hypotl, "LdLdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(hypot, "ddd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(hypotf, "fff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(hypotl, "LdLdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(ilogb, "id", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(ilogbf, "if", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(ilogbl, "iLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(ilogb, "id", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(ilogbf, "if", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(ilogbl, "iLd", "fne", MATH_H, ALL_LANGUAGES) // POSIX math.h declares a global, signgam, that lgamma writes to, so these -// shouldn't have "e" or "c" attributes -LIBBUILTIN(lgamma, "dd", "fn", "math.h", ALL_LANGUAGES) -LIBBUILTIN(lgammaf, "ff", "fn", "math.h", ALL_LANGUAGES) -LIBBUILTIN(lgammal, "LdLd", "fn", "math.h", ALL_LANGUAGES) +// shouldn't have "e", "c" or "g" attributes +LIBBUILTIN(lgamma, "dd", "fn", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(lgammaf, "ff", "fn", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(lgammal, "LdLd", "fn", MATH_H, ALL_LANGUAGES) + +LIBBUILTIN(llrint, "LLid", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(llrintf, "LLif", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(llrintl, "LLiLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(llrint, "LLid", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(llrintf, "LLif", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(llrintl, "LLiLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(llround, "LLid", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(llroundf, "LLif", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(llroundl, "LLiLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(llround, "LLid", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(llroundf, "LLif", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(llroundl, "LLiLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(log, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(logf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(logl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(log, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(logf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(logl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(log10, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(log10f, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(log10l, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(log10, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(log10f, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(log10l, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(log1p, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(log1pf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(log1pl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(log1p, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(log1pf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(log1pl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(log2, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(log2f, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(log2l, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(log2, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(log2f, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(log2l, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(logb, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(logbf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(logbl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(logb, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(logbf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(logbl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(lrint, "Lid", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(lrintf, "Lif", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(lrintl, "LiLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(lrint, "Lid", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(lrintf, "Lif", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(lrintl, "LiLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(lround, "Lid", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(lroundf, "Lif", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(lroundl, "LiLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(lround, "Lid", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(lroundf, "Lif", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(lroundl, "LiLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(nearbyint, "dd", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(nearbyintf, "ff", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(nearbyintl, "LdLd", "fnc", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(nearbyint, "dd", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(nearbyintf, "ff", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(nearbyintl, "LdLd", "fnc", "math.h", ALL_LANGUAGES) +LIBBUILTIN(nextafter, "ddd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(nextafterf, "fff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(nextafterl, "LdLdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(nextafter, "ddd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(nextafterf, "fff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(nextafterl, "LdLdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(nexttoward, "ddLd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(nexttowardf, "ffLd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(nexttowardl, "LdLdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(nexttoward, "ddLd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(nexttowardf, "ffLd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(nexttowardl, "LdLdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(remainder, "ddd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(remainderf, "fff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(remainderl, "LdLdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(remainder, "ddd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(remainderf, "fff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(remainderl, "LdLdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(remquo, "dddi*", "fn", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(remquof, "fffi*", "fn", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(remquol, "LdLdLdi*", "fn", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(remquo, "dddi*", "fn", "math.h", ALL_LANGUAGES) -LIBBUILTIN(remquof, "fffi*", "fn", "math.h", ALL_LANGUAGES) -LIBBUILTIN(remquol, "LdLdLdi*", "fn", "math.h", ALL_LANGUAGES) +LIBBUILTIN(rint, "dd", "fng", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(rintf, "ff", "fng", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(rintl, "LdLd", "fng", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(rint, "dd", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(rintf, "ff", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(rintl, "LdLd", "fnc", "math.h", ALL_LANGUAGES) +LIBBUILTIN(round, "dd", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(roundf, "ff", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(roundl, "LdLd", "fnc", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(round, "dd", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(roundf, "ff", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(roundl, "LdLd", "fnc", "math.h", ALL_LANGUAGES) +LIBBUILTIN(roundeven, "dd", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(roundevenf, "ff", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(roundevenl, "LdLd", "fnc", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(scalbln, "ddLi", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(scalblnf, "ffLi", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(scalblnl, "LdLdLi", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(scalbln, "ddLi", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(scalblnf, "ffLi", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(scalblnl, "LdLdLi", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(scalbn, "ddi", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(scalbnf, "ffi", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(scalbnl, "LdLdi", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(scalbn, "ddi", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(scalbnf, "ffi", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(scalbnl, "LdLdi", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(sin, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(sinf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(sinl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(sin, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(sinf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(sinl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(sinh, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(sinhf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(sinhl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(sinh, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(sinhf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(sinhl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(sqrt, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(sqrtf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(sqrtl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(sqrt, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(sqrtf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(sqrtl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(tan, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(tanf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(tanl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(tan, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(tanf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(tanl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(tanh, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(tanhf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(tanhl, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(tanh, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(tanhf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(tanhl, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(tgamma, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(tgammaf, "ff", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(tgammal, "LdLd", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(tgamma, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(tgammaf, "ff", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(tgammal, "LdLd", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(trunc, "dd", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(truncf, "ff", "fnc", "math.h", ALL_LANGUAGES) -LIBBUILTIN(truncl, "LdLd", "fnc", "math.h", ALL_LANGUAGES) +LIBBUILTIN(trunc, "dd", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(truncf, "ff", "fnc", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(truncl, "LdLd", "fnc", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(cabs, "dXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cabsf, "fXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cabsl, "LdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(cabs, "dXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cabsf, "fXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cabsl, "LdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(cacos, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cacosf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cacosl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(cacos, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cacosf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cacosl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(cacosh, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cacoshf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cacoshl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(cacosh, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cacoshf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cacoshl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(carg, "dXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cargf, "fXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cargl, "LdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(carg, "dXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cargf, "fXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cargl, "LdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(casin, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(casinf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(casinl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(casin, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(casinf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(casinl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(casinh, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(casinhf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(casinhl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(casinh, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(casinhf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(casinhl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(catan, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(catanf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(catanl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(catan, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(catanf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(catanl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(catanh, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(catanhf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(catanhl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(catanh, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(catanhf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(catanhl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(ccos, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(ccosf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(ccosl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(ccos, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(ccosf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(ccosl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(ccosh, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(ccoshf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(ccoshl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(ccosh, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(ccoshf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(ccoshl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(cexp, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cexpf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cexpl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(cexp, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cexpf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cexpl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(cimag, "dXd", "fnc", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cimagf, "fXf", "fnc", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cimagl, "LdXLd", "fnc", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(cimag, "dXd", "fnc", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cimagf, "fXf", "fnc", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cimagl, "LdXLd", "fnc", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(conj, "XdXd", "fnc", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(conjf, "XfXf", "fnc", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(conjl, "XLdXLd", "fnc", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(conj, "XdXd", "fnc", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(conjf, "XfXf", "fnc", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(conjl, "XLdXLd", "fnc", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(clog, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(clogf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(clogl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(clog, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(clogf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(clogl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(cproj, "XdXd", "fnc", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cprojf, "XfXf", "fnc", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cprojl, "XLdXLd", "fnc", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(cproj, "XdXd", "fnc", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cprojf, "XfXf", "fnc", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cprojl, "XLdXLd", "fnc", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(cpow, "XdXdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cpowf, "XfXfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(cpowl, "XLdXLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(cpow, "XdXdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cpowf, "XfXfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(cpowl, "XLdXLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(creal, "dXd", "fnc", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(crealf, "fXf", "fnc", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(creall, "LdXLd", "fnc", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(creal, "dXd", "fnc", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(crealf, "fXf", "fnc", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(creall, "LdXLd", "fnc", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(csin, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(csinf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(csinl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(csin, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(csinf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(csinl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(csinh, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(csinhf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(csinhl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(csinh, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(csinhf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(csinhl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(csqrt, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(csqrtf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(csqrtl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(csqrt, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(csqrtf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(csqrtl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(ctan, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(ctanf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(ctanl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(ctan, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(ctanf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(ctanl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) -LIBBUILTIN(ctanh, "XdXd", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(ctanhf, "XfXf", "fne", "complex.h", ALL_LANGUAGES) -LIBBUILTIN(ctanhl, "XLdXLd", "fne", "complex.h", ALL_LANGUAGES) +LIBBUILTIN(ctanh, "XdXd", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(ctanhf, "XfXf", "fne", COMPLEX_H, ALL_LANGUAGES) +LIBBUILTIN(ctanhl, "XLdXLd", "fne", COMPLEX_H, ALL_LANGUAGES) // __sinpi and friends are OS X specific library functions, but otherwise much // like the standard (non-complex) sin (etc). -LIBBUILTIN(__sinpi, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(__sinpif, "ff", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(__sinpi, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(__sinpif, "ff", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(__cospi, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(__cospif, "ff", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(__cospi, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(__cospif, "ff", "fne", MATH_H, ALL_LANGUAGES) -LIBBUILTIN(__tanpi, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(__tanpif, "ff", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(__tanpi, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(__tanpif, "ff", "fne", MATH_H, ALL_LANGUAGES) // Similarly, __exp10 is OS X only -LIBBUILTIN(__exp10, "dd", "fne", "math.h", ALL_LANGUAGES) -LIBBUILTIN(__exp10f, "ff", "fne", "math.h", ALL_LANGUAGES) +LIBBUILTIN(__exp10, "dd", "fne", MATH_H, ALL_LANGUAGES) +LIBBUILTIN(__exp10f, "ff", "fne", MATH_H, ALL_LANGUAGES) // Blocks runtime Builtin math library functions -LIBBUILTIN(_Block_object_assign, "vv*vC*iC", "f", "Blocks.h", ALL_LANGUAGES) -LIBBUILTIN(_Block_object_dispose, "vvC*iC", "f", "Blocks.h", ALL_LANGUAGES) +LIBBUILTIN(_Block_object_assign, "vv*vC*iC", "f", BLOCKS_H, ALL_LANGUAGES) +LIBBUILTIN(_Block_object_dispose, "vvC*iC", "f", BLOCKS_H, ALL_LANGUAGES) // FIXME: Also declare NSConcreteGlobalBlock and NSConcreteStackBlock. +// C++ standard library builtins in namespace 'std'. +LIBBUILTIN(addressof, "v*v&", "zfncThE", MEMORY, CXX_LANG) +// Synonym for addressof used internally by libstdc++. +LANGBUILTIN(__addressof, "v*v&", "zfncTE", CXX_LANG) +LIBBUILTIN(as_const, "v&v&", "zfncThE", UTILITY, CXX_LANG) +LIBBUILTIN(forward, "v&v&", "zfncThE", UTILITY, CXX_LANG) +LIBBUILTIN(forward_like, "v&v&", "zfncThE", UTILITY, CXX_LANG) +LIBBUILTIN(move, "v&v&", "zfncThE", UTILITY, CXX_LANG) +LIBBUILTIN(move_if_noexcept, "v&v&", "zfncThE", UTILITY, CXX_LANG) + // Annotation function BUILTIN(__builtin_annotation, "v.", "tn") // Invariants -BUILTIN(__builtin_assume, "vb", "n") +BUILTIN(__builtin_assume, "vb", "nE") +BUILTIN(__builtin_assume_separate_storage, "vvCD*vCD*", "nE") // Multiprecision Arithmetic Builtins. BUILTIN(__builtin_addcb, "UcUcCUcCUcCUc*", "n") @@ -1532,40 +1662,41 @@ BUILTIN(__builtin_subcl, "ULiULiCULiCULiCULi*", "n") BUILTIN(__builtin_subcll, "ULLiULLiCULLiCULLiCULLi*", "n") // Checked Arithmetic Builtins for Security. -BUILTIN(__builtin_add_overflow, "b.", "nt") -BUILTIN(__builtin_sub_overflow, "b.", "nt") -BUILTIN(__builtin_mul_overflow, "b.", "nt") -BUILTIN(__builtin_uadd_overflow, "bUiCUiCUi*", "n") -BUILTIN(__builtin_uaddl_overflow, "bULiCULiCULi*", "n") -BUILTIN(__builtin_uaddll_overflow, "bULLiCULLiCULLi*", "n") -BUILTIN(__builtin_usub_overflow, "bUiCUiCUi*", "n") -BUILTIN(__builtin_usubl_overflow, "bULiCULiCULi*", "n") -BUILTIN(__builtin_usubll_overflow, "bULLiCULLiCULLi*", "n") -BUILTIN(__builtin_umul_overflow, "bUiCUiCUi*", "n") -BUILTIN(__builtin_umull_overflow, "bULiCULiCULi*", "n") -BUILTIN(__builtin_umulll_overflow, "bULLiCULLiCULLi*", "n") -BUILTIN(__builtin_sadd_overflow, "bSiCSiCSi*", "n") -BUILTIN(__builtin_saddl_overflow, "bSLiCSLiCSLi*", "n") -BUILTIN(__builtin_saddll_overflow, "bSLLiCSLLiCSLLi*", "n") -BUILTIN(__builtin_ssub_overflow, "bSiCSiCSi*", "n") -BUILTIN(__builtin_ssubl_overflow, "bSLiCSLiCSLi*", "n") -BUILTIN(__builtin_ssubll_overflow, "bSLLiCSLLiCSLLi*", "n") -BUILTIN(__builtin_smul_overflow, "bSiCSiCSi*", "n") -BUILTIN(__builtin_smull_overflow, "bSLiCSLiCSLi*", "n") -BUILTIN(__builtin_smulll_overflow, "bSLLiCSLLiCSLLi*", "n") +BUILTIN(__builtin_add_overflow, "b.", "ntE") +BUILTIN(__builtin_sub_overflow, "b.", "ntE") +BUILTIN(__builtin_mul_overflow, "b.", "ntE") +BUILTIN(__builtin_uadd_overflow, "bUiCUiCUi*", "nE") +BUILTIN(__builtin_uaddl_overflow, "bULiCULiCULi*", "nE") +BUILTIN(__builtin_uaddll_overflow, "bULLiCULLiCULLi*", "nE") +BUILTIN(__builtin_usub_overflow, "bUiCUiCUi*", "nE") +BUILTIN(__builtin_usubl_overflow, "bULiCULiCULi*", "nE") +BUILTIN(__builtin_usubll_overflow, "bULLiCULLiCULLi*", "nE") +BUILTIN(__builtin_umul_overflow, "bUiCUiCUi*", "nE") +BUILTIN(__builtin_umull_overflow, "bULiCULiCULi*", "nE") +BUILTIN(__builtin_umulll_overflow, "bULLiCULLiCULLi*", "nE") +BUILTIN(__builtin_sadd_overflow, "bSiCSiCSi*", "nE") +BUILTIN(__builtin_saddl_overflow, "bSLiCSLiCSLi*", "nE") +BUILTIN(__builtin_saddll_overflow, "bSLLiCSLLiCSLLi*", "nE") +BUILTIN(__builtin_ssub_overflow, "bSiCSiCSi*", "nE") +BUILTIN(__builtin_ssubl_overflow, "bSLiCSLiCSLi*", "nE") +BUILTIN(__builtin_ssubll_overflow, "bSLLiCSLLiCSLLi*", "nE") +BUILTIN(__builtin_smul_overflow, "bSiCSiCSi*", "nE") +BUILTIN(__builtin_smull_overflow, "bSLiCSLiCSLi*", "nE") +BUILTIN(__builtin_smulll_overflow, "bSLLiCSLLiCSLLi*", "nE") // Clang builtins (not available in GCC). -BUILTIN(__builtin_addressof, "v*v&", "nct") -BUILTIN(__builtin_operator_new, "v*z", "tc") -BUILTIN(__builtin_operator_delete, "vv*", "tn") -BUILTIN(__builtin_char_memchr, "c*cC*iz", "n") -BUILTIN(__builtin_dump_struct, "ivC*v*", "tn") +BUILTIN(__builtin_addressof, "v*v&", "nctE") +BUILTIN(__builtin_function_start, "v*v&", "nctE") +BUILTIN(__builtin_operator_new, "v*z", "tcE") +BUILTIN(__builtin_operator_delete, "vv*", "tnE") +BUILTIN(__builtin_char_memchr, "c*cC*iz", "nE") +BUILTIN(__builtin_dump_struct, "v.", "t") BUILTIN(__builtin_preserve_access_index, "v.", "t") // Alignment builtins (uses custom parsing to support pointers and integers) -BUILTIN(__builtin_is_aligned, "bvC*z", "nct") -BUILTIN(__builtin_align_up, "v*vC*z", "nct") -BUILTIN(__builtin_align_down, "v*vC*z", "nct") +BUILTIN(__builtin_is_aligned, "bvC*z", "nctE") +BUILTIN(__builtin_align_up, "v*vC*z", "nctE") +BUILTIN(__builtin_align_down, "v*vC*z", "nctE") // Safestack builtins BUILTIN(__builtin___get_unsafe_stack_start, "v*", "Fn") @@ -1584,6 +1715,7 @@ LANGBUILTIN(__builtin_coro_done, "bv*", "n", COR_LANG) LANGBUILTIN(__builtin_coro_promise, "v*v*IiIb", "n", COR_LANG) LANGBUILTIN(__builtin_coro_size, "z", "n", COR_LANG) +LANGBUILTIN(__builtin_coro_align, "z", "n", COR_LANG) LANGBUILTIN(__builtin_coro_frame, "v*", "n", COR_LANG) LANGBUILTIN(__builtin_coro_noop, "v*", "n", COR_LANG) LANGBUILTIN(__builtin_coro_free, "v*v*", "n", COR_LANG) @@ -1593,62 +1725,65 @@ LANGBUILTIN(__builtin_coro_alloc, "b", "n", COR_LANG) LANGBUILTIN(__builtin_coro_begin, "v*v*", "n", COR_LANG) LANGBUILTIN(__builtin_coro_end, "bv*Ib", "n", COR_LANG) LANGBUILTIN(__builtin_coro_suspend, "cIb", "n", COR_LANG) -LANGBUILTIN(__builtin_coro_param, "bv*v*", "n", COR_LANG) // OpenCL v2.0 s6.13.16, s9.17.3.5 - Pipe functions. // We need the generic prototype, since the packet type could be anything. -LANGBUILTIN(read_pipe, "i.", "tn", OCLC20_LANG) -LANGBUILTIN(write_pipe, "i.", "tn", OCLC20_LANG) +LANGBUILTIN(read_pipe, "i.", "tn", OCL_PIPE) +LANGBUILTIN(write_pipe, "i.", "tn", OCL_PIPE) -LANGBUILTIN(reserve_read_pipe, "i.", "tn", OCLC20_LANG) -LANGBUILTIN(reserve_write_pipe, "i.", "tn", OCLC20_LANG) +LANGBUILTIN(reserve_read_pipe, "i.", "tn", OCL_PIPE) +LANGBUILTIN(reserve_write_pipe, "i.", "tn", OCL_PIPE) -LANGBUILTIN(commit_write_pipe, "v.", "tn", OCLC20_LANG) -LANGBUILTIN(commit_read_pipe, "v.", "tn", OCLC20_LANG) +LANGBUILTIN(commit_write_pipe, "v.", "tn", OCL_PIPE) +LANGBUILTIN(commit_read_pipe, "v.", "tn", OCL_PIPE) -LANGBUILTIN(sub_group_reserve_read_pipe, "i.", "tn", OCLC20_LANG) -LANGBUILTIN(sub_group_reserve_write_pipe, "i.", "tn", OCLC20_LANG) +LANGBUILTIN(sub_group_reserve_read_pipe, "i.", "tn", OCL_PIPE) +LANGBUILTIN(sub_group_reserve_write_pipe, "i.", "tn", OCL_PIPE) -LANGBUILTIN(sub_group_commit_read_pipe, "v.", "tn", OCLC20_LANG) -LANGBUILTIN(sub_group_commit_write_pipe, "v.", "tn", OCLC20_LANG) +LANGBUILTIN(sub_group_commit_read_pipe, "v.", "tn", OCL_PIPE) +LANGBUILTIN(sub_group_commit_write_pipe, "v.", "tn", OCL_PIPE) -LANGBUILTIN(work_group_reserve_read_pipe, "i.", "tn", OCLC20_LANG) -LANGBUILTIN(work_group_reserve_write_pipe, "i.", "tn", OCLC20_LANG) +LANGBUILTIN(work_group_reserve_read_pipe, "i.", "tn", OCL_PIPE) +LANGBUILTIN(work_group_reserve_write_pipe, "i.", "tn", OCL_PIPE) -LANGBUILTIN(work_group_commit_read_pipe, "v.", "tn", OCLC20_LANG) -LANGBUILTIN(work_group_commit_write_pipe, "v.", "tn", OCLC20_LANG) +LANGBUILTIN(work_group_commit_read_pipe, "v.", "tn", OCL_PIPE) +LANGBUILTIN(work_group_commit_write_pipe, "v.", "tn", OCL_PIPE) -LANGBUILTIN(get_pipe_num_packets, "Ui.", "tn", OCLC20_LANG) -LANGBUILTIN(get_pipe_max_packets, "Ui.", "tn", OCLC20_LANG) +LANGBUILTIN(get_pipe_num_packets, "Ui.", "tn", OCL_PIPE) +LANGBUILTIN(get_pipe_max_packets, "Ui.", "tn", OCL_PIPE) // OpenCL v2.0 s6.13.17 - Enqueue kernel functions. // Custom builtin check allows to perform special check of passed block arguments. -LANGBUILTIN(enqueue_kernel, "i.", "tn", OCLC20_LANG) -LANGBUILTIN(get_kernel_work_group_size, "Ui.", "tn", OCLC20_LANG) -LANGBUILTIN(get_kernel_preferred_work_group_size_multiple, "Ui.", "tn", OCLC20_LANG) -LANGBUILTIN(get_kernel_max_sub_group_size_for_ndrange, "Ui.", "tn", OCLC20_LANG) -LANGBUILTIN(get_kernel_sub_group_count_for_ndrange, "Ui.", "tn", OCLC20_LANG) +LANGBUILTIN(enqueue_kernel, "i.", "tn", OCL_DSE) +LANGBUILTIN(get_kernel_work_group_size, "Ui.", "tn", OCL_DSE) +LANGBUILTIN(get_kernel_preferred_work_group_size_multiple, "Ui.", "tn", OCL_DSE) +LANGBUILTIN(get_kernel_max_sub_group_size_for_ndrange, "Ui.", "tn", OCL_DSE) +LANGBUILTIN(get_kernel_sub_group_count_for_ndrange, "Ui.", "tn", OCL_DSE) // OpenCL v2.0 s6.13.9 - Address space qualifier functions. // FIXME: Pointer parameters of OpenCL builtins should have their address space // requirement defined. -LANGBUILTIN(to_global, "v*v*", "tn", OCLC20_LANG) -LANGBUILTIN(to_local, "v*v*", "tn", OCLC20_LANG) -LANGBUILTIN(to_private, "v*v*", "tn", OCLC20_LANG) +LANGBUILTIN(to_global, "v*v*", "tn", OCL_GAS) +LANGBUILTIN(to_local, "v*v*", "tn", OCL_GAS) +LANGBUILTIN(to_private, "v*v*", "tn", OCL_GAS) // OpenCL half load/store builtin -LANGBUILTIN(__builtin_store_half, "vdh*", "n", ALL_OCLC_LANGUAGES) -LANGBUILTIN(__builtin_store_halff, "vfh*", "n", ALL_OCLC_LANGUAGES) -LANGBUILTIN(__builtin_load_half, "dhC*", "nc", ALL_OCLC_LANGUAGES) -LANGBUILTIN(__builtin_load_halff, "fhC*", "nc", ALL_OCLC_LANGUAGES) +LANGBUILTIN(__builtin_store_half, "vdh*", "n", ALL_OCL_LANGUAGES) +LANGBUILTIN(__builtin_store_halff, "vfh*", "n", ALL_OCL_LANGUAGES) +LANGBUILTIN(__builtin_load_half, "dhC*", "nc", ALL_OCL_LANGUAGES) +LANGBUILTIN(__builtin_load_halff, "fhC*", "nc", ALL_OCL_LANGUAGES) // Builtins for os_log/os_trace -BUILTIN(__builtin_os_log_format_buffer_size, "zcC*.", "p:0:nut") +BUILTIN(__builtin_os_log_format_buffer_size, "zcC*.", "p:0:nutE") BUILTIN(__builtin_os_log_format, "v*v*cC*.", "p:0:nt") // CUDA/HIP LANGBUILTIN(__builtin_get_device_side_mangled_name, "cC*.", "ncT", CUDA_LANG) +// HLSL +LANGBUILTIN(__builtin_hlsl_wave_active_count_bits, "Uib", "nc", HLSL_LANG) +LANGBUILTIN(__builtin_hlsl_create_handle, "v*Uc", "nc", HLSL_LANG) + // Builtins for XRay BUILTIN(__xray_customevent, "vcC*z", "") BUILTIN(__xray_typedevent, "vzcC*z", "") @@ -1659,7 +1794,7 @@ BUILTIN(__builtin_ms_va_end, "vc*&", "n") BUILTIN(__builtin_ms_va_copy, "vc*&c*&", "n") // Arithmetic Fence: to prevent FP reordering and reassociation optimizations -LANGBUILTIN(__arithmetic_fence, "v.", "t", ALL_LANGUAGES) +LANGBUILTIN(__arithmetic_fence, "v.", "tE", ALL_LANGUAGES) #undef BUILTIN #undef LIBBUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/Builtins.h b/contrib/llvm-project/clang/include/clang/Basic/Builtins.h index cdaaee48c32d..3fd5b02b5aa5 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Builtins.h +++ b/contrib/llvm-project/clang/include/clang/Basic/Builtins.h @@ -16,6 +16,8 @@ #define LLVM_CLANG_BASIC_BUILTINS_H #include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/StringMap.h" +#include "llvm/ADT/StringRef.h" #include <cstring> // VC++ defines 'alloca' as an object-like macro, which interferes with our @@ -27,21 +29,35 @@ class TargetInfo; class IdentifierTable; class LangOptions; -enum LanguageID { - GNU_LANG = 0x1, // builtin requires GNU mode. - C_LANG = 0x2, // builtin for c only. - CXX_LANG = 0x4, // builtin for cplusplus only. - OBJC_LANG = 0x8, // builtin for objective-c and objective-c++ - MS_LANG = 0x10, // builtin requires MS mode. - OCLC20_LANG = 0x20, // builtin for OpenCL C 2.0 only. - OCLC1X_LANG = 0x40, // builtin for OpenCL C 1.x only. - OMP_LANG = 0x80, // builtin requires OpenMP. - CUDA_LANG = 0x100, // builtin requires CUDA. - COR_LANG = 0x200, // builtin requires use of 'fcoroutine-ts' option. +enum LanguageID : uint16_t { + GNU_LANG = 0x1, // builtin requires GNU mode. + C_LANG = 0x2, // builtin for c only. + CXX_LANG = 0x4, // builtin for cplusplus only. + OBJC_LANG = 0x8, // builtin for objective-c and objective-c++ + MS_LANG = 0x10, // builtin requires MS mode. + OMP_LANG = 0x20, // builtin requires OpenMP. + CUDA_LANG = 0x40, // builtin requires CUDA. + COR_LANG = 0x80, // builtin requires use of 'fcoroutine-ts' option. + OCL_GAS = 0x100, // builtin requires OpenCL generic address space. + OCL_PIPE = 0x200, // builtin requires OpenCL pipe. + OCL_DSE = 0x400, // builtin requires OpenCL device side enqueue. + ALL_OCL_LANGUAGES = 0x800, // builtin for OCL languages. + HLSL_LANG = 0x1000, // builtin requires HLSL. ALL_LANGUAGES = C_LANG | CXX_LANG | OBJC_LANG, // builtin for all languages. ALL_GNU_LANGUAGES = ALL_LANGUAGES | GNU_LANG, // builtin requires GNU mode. - ALL_MS_LANGUAGES = ALL_LANGUAGES | MS_LANG, // builtin requires MS mode. - ALL_OCLC_LANGUAGES = OCLC1X_LANG | OCLC20_LANG // builtin for OCLC languages. + ALL_MS_LANGUAGES = ALL_LANGUAGES | MS_LANG // builtin requires MS mode. +}; + +struct HeaderDesc { + enum HeaderID : uint16_t { +#define HEADER(ID, NAME) ID, +#include "clang/Basic/BuiltinHeaders.def" +#undef HEADER + } ID; + + constexpr HeaderDesc(HeaderID ID) : ID(ID) {} + + const char *getName() const; }; namespace Builtin { @@ -53,9 +69,11 @@ enum ID { }; struct Info { - const char *Name, *Type, *Attributes, *HeaderName; - LanguageID Langs; + llvm::StringLiteral Name; + const char *Type, *Attributes; const char *Features; + HeaderDesc Header; + LanguageID Langs; }; /// Holds information about both target-independent and @@ -69,7 +87,7 @@ class Context { llvm::ArrayRef<Info> AuxTSRecords; public: - Context() {} + Context() = default; /// Perform target-specific initialization /// \param AuxTarget Target info to incorporate builtins from. May be nullptr. @@ -82,9 +100,7 @@ public: /// Return the identifier name for the specified builtin, /// e.g. "__builtin_abs". - const char *getName(unsigned ID) const { - return getRecord(ID).Name; - } + llvm::StringRef getName(unsigned ID) const { return getRecord(ID).Name; } /// Get the type descriptor string for the specified builtin. const char *getTypeString(unsigned ID) const { @@ -137,6 +153,10 @@ public: /// Determines whether this builtin is a predefined libc/libm /// function, such as "malloc", where we know the signature a /// priori. + /// In C, such functions behave as if they are predeclared, + /// possibly with a warning on first use. In Objective-C and C++, + /// they do not, but they are recognized as builtins once we see + /// a declaration. bool isPredefinedLibFunction(unsigned ID) const { return strchr(getRecord(ID).Attributes, 'f') != nullptr; } @@ -155,6 +175,23 @@ public: return strchr(getRecord(ID).Attributes, 'i') != nullptr; } + /// Determines whether this builtin is a C++ standard library function + /// that lives in (possibly-versioned) namespace std, possibly a template + /// specialization, where the signature is determined by the standard library + /// declaration. + bool isInStdNamespace(unsigned ID) const { + return strchr(getRecord(ID).Attributes, 'z') != nullptr; + } + + /// Determines whether this builtin can have its address taken with no + /// special action required. + bool isDirectlyAddressable(unsigned ID) const { + // Most standard library functions can have their addresses taken. C++ + // standard library functions formally cannot in C++20 onwards, and when + // we allow it, we need to ensure we instantiate a definition. + return isPredefinedLibFunction(ID) && !isInStdNamespace(ID); + } + /// Determines whether this builtin has custom typechecking. bool hasCustomTypechecking(unsigned ID) const { return strchr(getRecord(ID).Attributes, 't') != nullptr; @@ -183,7 +220,7 @@ public: /// If this is a library function that comes from a specific /// header, retrieve that header name. const char *getHeaderName(unsigned ID) const { - return getRecord(ID).HeaderName; + return getRecord(ID).Header.getName(); } /// Determine whether this builtin is like printf in its @@ -203,13 +240,18 @@ public: llvm::SmallVectorImpl<int> &Encoding) const; /// Return true if this function has no side effects and doesn't - /// read memory, except for possibly errno. + /// read memory, except for possibly errno or raising FP exceptions. /// - /// Such functions can be const when the MathErrno lang option is disabled. - bool isConstWithoutErrno(unsigned ID) const { + /// Such functions can be const when the MathErrno lang option and FP + /// exceptions are disabled. + bool isConstWithoutErrnoAndExceptions(unsigned ID) const { return strchr(getRecord(ID).Attributes, 'e') != nullptr; } + bool isConstWithoutExceptions(unsigned ID) const { + return strchr(getRecord(ID).Attributes, 'g') != nullptr; + } + const char *getRequiredFeatures(unsigned ID) const { return getRecord(ID).Features; } @@ -233,19 +275,28 @@ public: /// for non-builtins. bool canBeRedeclared(unsigned ID) const; + /// Return true if this function can be constant evaluated by Clang frontend. + bool isConstantEvaluated(unsigned ID) const { + return strchr(getRecord(ID).Attributes, 'E') != nullptr; + } + private: const Info &getRecord(unsigned ID) const; - /// Is this builtin supported according to the given language options? - bool builtinIsSupported(const Builtin::Info &BuiltinInfo, - const LangOptions &LangOpts); - /// Helper function for isPrintfLike and isScanfLike. bool isLike(unsigned ID, unsigned &FormatIdx, bool &HasVAListArg, const char *Fmt) const; }; -} +/// Returns true if the required target features of a builtin function are +/// enabled. +/// \p TargetFeatureMap maps a target feature to true if it is enabled and +/// false if it is disabled. +bool evaluateRequiredTargetFeatures( + llvm::StringRef RequiredFatures, + const llvm::StringMap<bool> &TargetFetureMap); + +} // namespace Builtin /// Kinds of BuiltinTemplateDecl. enum BuiltinTemplateKind : int { diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsAArch64.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsAArch64.def index 634bcaed20a6..31ec84143f65 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsAArch64.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsAArch64.def @@ -17,6 +17,10 @@ # define LANGBUILTIN(ID, TYPE, ATTRS, BUILTIN_LANG) BUILTIN(ID, TYPE, ATTRS) #endif +#if defined(BUILTIN) && !defined(TARGET_BUILTIN) +# define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) +#endif + #if defined(BUILTIN) && !defined(TARGET_HEADER_BUILTIN) # define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANG, FEATURE) BUILTIN(ID, TYPE, ATTRS) #endif @@ -35,6 +39,8 @@ BUILTIN(__builtin_arm_rbit, "UiUi", "nc") BUILTIN(__builtin_arm_rbit64, "WUiWUi", "nc") BUILTIN(__builtin_arm_cls, "UiZUi", "nc") BUILTIN(__builtin_arm_cls64, "UiWUi", "nc") +BUILTIN(__builtin_arm_clz, "UiZUi", "nc") +BUILTIN(__builtin_arm_clz64, "UiWUi", "nc") // HINT BUILTIN(__builtin_arm_nop, "v", "") @@ -45,29 +51,35 @@ BUILTIN(__builtin_arm_sev, "v", "") BUILTIN(__builtin_arm_sevl, "v", "") // CRC32 -BUILTIN(__builtin_arm_crc32b, "UiUiUc", "nc") -BUILTIN(__builtin_arm_crc32cb, "UiUiUc", "nc") -BUILTIN(__builtin_arm_crc32h, "UiUiUs", "nc") -BUILTIN(__builtin_arm_crc32ch, "UiUiUs", "nc") -BUILTIN(__builtin_arm_crc32w, "UiUiUi", "nc") -BUILTIN(__builtin_arm_crc32cw, "UiUiUi", "nc") -BUILTIN(__builtin_arm_crc32d, "UiUiWUi", "nc") -BUILTIN(__builtin_arm_crc32cd, "UiUiWUi", "nc") +TARGET_BUILTIN(__builtin_arm_crc32b, "UiUiUc", "nc", "crc") +TARGET_BUILTIN(__builtin_arm_crc32cb, "UiUiUc", "nc", "crc") +TARGET_BUILTIN(__builtin_arm_crc32h, "UiUiUs", "nc", "crc") +TARGET_BUILTIN(__builtin_arm_crc32ch, "UiUiUs", "nc", "crc") +TARGET_BUILTIN(__builtin_arm_crc32w, "UiUiUi", "nc", "crc") +TARGET_BUILTIN(__builtin_arm_crc32cw, "UiUiUi", "nc", "crc") +TARGET_BUILTIN(__builtin_arm_crc32d, "UiUiWUi", "nc", "crc") +TARGET_BUILTIN(__builtin_arm_crc32cd, "UiUiWUi", "nc", "crc") // Memory Tagging Extensions (MTE) -BUILTIN(__builtin_arm_irg, "v*v*Ui", "t") -BUILTIN(__builtin_arm_addg, "v*v*Ui", "t") -BUILTIN(__builtin_arm_gmi, "Uiv*Ui", "t") -BUILTIN(__builtin_arm_ldg, "v*v*", "t") -BUILTIN(__builtin_arm_stg, "vv*", "t") -BUILTIN(__builtin_arm_subp, "Uiv*v*", "t") +TARGET_BUILTIN(__builtin_arm_irg, "v*v*Ui", "t", "mte") +TARGET_BUILTIN(__builtin_arm_addg, "v*v*Ui", "t", "mte") +TARGET_BUILTIN(__builtin_arm_gmi, "Uiv*Ui", "t", "mte") +TARGET_BUILTIN(__builtin_arm_ldg, "v*v*", "t", "mte") +TARGET_BUILTIN(__builtin_arm_stg, "vv*", "t", "mte") +TARGET_BUILTIN(__builtin_arm_subp, "Uiv*v*", "t", "mte") + +// SME state function +BUILTIN(__builtin_arm_get_sme_state, "vULi*ULi*", "n") + +// Memory Operations +TARGET_BUILTIN(__builtin_arm_mops_memset_tag, "v*v*iz", "", "mte,mops") // Memory barrier BUILTIN(__builtin_arm_dmb, "vUi", "nc") BUILTIN(__builtin_arm_dsb, "vUi", "nc") BUILTIN(__builtin_arm_isb, "vUi", "nc") -BUILTIN(__builtin_arm_jcvt, "Zid", "nc") +TARGET_BUILTIN(__builtin_arm_jcvt, "Zid", "nc", "v8.3a") // Prefetch BUILTIN(__builtin_arm_prefetch, "vvC*UiUiUiUi", "nc") @@ -75,9 +87,11 @@ BUILTIN(__builtin_arm_prefetch, "vvC*UiUiUiUi", "nc") // System Registers BUILTIN(__builtin_arm_rsr, "UicC*", "nc") BUILTIN(__builtin_arm_rsr64, "WUicC*", "nc") +TARGET_BUILTIN(__builtin_arm_rsr128, "LLLUicC*", "nc", "d128") BUILTIN(__builtin_arm_rsrp, "v*cC*", "nc") BUILTIN(__builtin_arm_wsr, "vcC*Ui", "nc") BUILTIN(__builtin_arm_wsr64, "vcC*WUi", "nc") +TARGET_BUILTIN(__builtin_arm_wsr128, "vcC*LLLUi", "nc", "d128") BUILTIN(__builtin_arm_wsrp, "vcC*vC*", "nc") // MSVC @@ -100,152 +114,181 @@ BUILTIN(__builtin_arm_tcancel, "vWUIi", "n") BUILTIN(__builtin_arm_ttest, "WUi", "nc") // Armv8.5-A FP rounding intrinsics -BUILTIN(__builtin_arm_frint32zf, "ff", "") -BUILTIN(__builtin_arm_frint32z, "dd", "") -BUILTIN(__builtin_arm_frint64zf, "ff", "") -BUILTIN(__builtin_arm_frint64z, "dd", "") -BUILTIN(__builtin_arm_frint32xf, "ff", "") -BUILTIN(__builtin_arm_frint32x, "dd", "") -BUILTIN(__builtin_arm_frint64xf, "ff", "") -BUILTIN(__builtin_arm_frint64x, "dd", "") +TARGET_BUILTIN(__builtin_arm_rint32zf, "ff", "", "v8.5a") +TARGET_BUILTIN(__builtin_arm_rint32z, "dd", "", "v8.5a") +TARGET_BUILTIN(__builtin_arm_rint64zf, "ff", "", "v8.5a") +TARGET_BUILTIN(__builtin_arm_rint64z, "dd", "", "v8.5a") +TARGET_BUILTIN(__builtin_arm_rint32xf, "ff", "", "v8.5a") +TARGET_BUILTIN(__builtin_arm_rint32x, "dd", "", "v8.5a") +TARGET_BUILTIN(__builtin_arm_rint64xf, "ff", "", "v8.5a") +TARGET_BUILTIN(__builtin_arm_rint64x, "dd", "", "v8.5a") // Armv8.5-A Random number generation intrinsics -BUILTIN(__builtin_arm_rndr, "iWUi*", "n") -BUILTIN(__builtin_arm_rndrrs, "iWUi*", "n") +TARGET_BUILTIN(__builtin_arm_rndr, "iWUi*", "n", "rand") +TARGET_BUILTIN(__builtin_arm_rndrrs, "iWUi*", "n", "rand") // Armv8.7-A load/store 64-byte intrinsics -BUILTIN(__builtin_arm_ld64b, "vvC*WUi*", "n") -BUILTIN(__builtin_arm_st64b, "vv*WUiC*", "n") -BUILTIN(__builtin_arm_st64bv, "WUiv*WUiC*", "n") -BUILTIN(__builtin_arm_st64bv0, "WUiv*WUiC*", "n") - -TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_BitScanForward64, "UcUNi*ULLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_BitScanReverse64, "UcUNi*ULLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedAdd, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd64, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement64, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange64, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeSub64, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement64, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr64, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor64, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_acq, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_rel, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_nf, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_acq, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_rel, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_nf, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_acq, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_rel, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_nf, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_acq, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_rel, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_nf, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedExchange8_acq, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange8_nf, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange8_rel, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange16_acq, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange16_nf, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange16_rel, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange_acq, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange_nf, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange_rel, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange64_acq, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange64_nf, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange64_rel, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_acq, "ccD*cc", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_nf, "ccD*cc", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_rel, "ccD*cc", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_acq, "ssD*ss", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_nf, "ssD*ss", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_rel, "ssD*ss", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_acq, "NiNiD*NiNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_nf, "NiNiD*NiNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_rel, "NiNiD*NiNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_acq, "LLiLLiD*LLiLLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_nf, "LLiLLiD*LLiLLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_rel, "LLiLLiD*LLiLLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange128, "UcLLiD*LLiLLiLLi*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange128_acq,"UcLLiD*LLiLLiLLi*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange128_nf ,"UcLLiD*LLiLLiLLi*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange128_rel,"UcLLiD*LLiLLiLLi*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedOr8_acq, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr8_nf, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr8_rel, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr16_acq, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr16_nf, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr16_rel, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr_acq, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr_nf, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr_rel, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr64_acq, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr64_nf, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr64_rel, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedXor8_acq, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor8_nf, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor8_rel, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor16_acq, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor16_nf, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor16_rel, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor_acq, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor_nf, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor_rel, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor64_acq, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor64_nf, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor64_rel, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedAnd8_acq, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd8_nf, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd8_rel, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd16_acq, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd16_nf, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd16_rel, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd_acq, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd_nf, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd_rel, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd64_acq, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd64_nf, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd64_rel, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedIncrement16_acq, "ssD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement16_nf, "ssD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement16_rel, "ssD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement_acq, "NiNiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement_nf, "NiNiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement_rel, "NiNiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement64_acq, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement64_nf, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement64_rel, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedDecrement16_acq, "ssD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement16_nf, "ssD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement16_rel, "ssD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement_acq, "NiNiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement_nf, "NiNiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement_rel, "NiNiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement64_acq, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement64_nf, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement64_rel, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_ReadWriteBarrier, "v", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__getReg, "ULLii", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_ReadStatusReg, "LLii", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_WriteStatusReg, "viLLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_AddressOfReturnAddress, "v*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(__mulh, "SLLiSLLiSLLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__umulh, "ULLiULLiULLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") +TARGET_BUILTIN(__builtin_arm_ld64b, "vvC*WUi*", "n", "ls64") +TARGET_BUILTIN(__builtin_arm_st64b, "vv*WUiC*", "n", "ls64") +TARGET_BUILTIN(__builtin_arm_st64bv, "WUiv*WUiC*", "n", "ls64") +TARGET_BUILTIN(__builtin_arm_st64bv0, "WUiv*WUiC*", "n", "ls64") + +TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_BitScanForward64, "UcUNi*ULLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_BitScanReverse64, "UcUNi*ULLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedAdd, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement64, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeSub64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement64, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedExchange8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_acq, "ccD*cc", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_nf, "ccD*cc", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_rel, "ccD*cc", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_acq, "ssD*ss", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_nf, "ssD*ss", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_rel, "ssD*ss", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_acq, "NiNiD*NiNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_nf, "NiNiD*NiNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_rel, "NiNiD*NiNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_acq, "LLiLLiD*LLiLLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_nf, "LLiLLiD*LLiLLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_rel, "LLiLLiD*LLiLLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange128, "UcLLiD*LLiLLiLLi*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange128_acq,"UcLLiD*LLiLLiLLi*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange128_nf ,"UcLLiD*LLiLLiLLi*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange128_rel,"UcLLiD*LLiLLiLLi*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedOr8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedXor8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedAnd8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedIncrement16_acq, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement16_nf, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement16_rel, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement_acq, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement_nf, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement_rel, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement64_acq, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement64_nf, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement64_rel, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedDecrement16_acq, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement16_nf, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement16_rel, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement_acq, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement_nf, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement_rel, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement64_acq, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement64_nf, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement64_rel, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_ReadWriteBarrier, "v", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__getReg, "ULLii", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_ReadStatusReg, "LLii", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_WriteStatusReg, "viLLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_AddressOfReturnAddress, "v*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(__mulh, "SLLiSLLiSLLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__umulh, "ULLiULLiULLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(__break, "vi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(__writex18byte, "vUNiUc", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__writex18word, "vUNiUs", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__writex18dword, "vUNiUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__writex18qword, "vUNiULLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(__readx18byte, "UcUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__readx18word, "UsUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__readx18dword, "UNiUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__readx18qword, "ULLiUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_CopyDoubleFromInt64, "dSLLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_CopyFloatFromInt32, "fSi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_CopyInt32FromFloat, "Sif", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_CopyInt64FromDouble, "SLLid", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_CountLeadingOnes, "UiUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_CountLeadingOnes64, "UiULLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_CountLeadingSigns, "UiSNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_CountLeadingSigns64, "UiSLLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_CountLeadingZeros, "UiUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_CountLeadingZeros64, "UiULLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_CountOneBits, "UiUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_CountOneBits64, "UiULLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(__prefetch, "vv*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") #undef BUILTIN #undef LANGBUILTIN +#undef TARGET_BUILTIN #undef TARGET_HEADER_BUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsAArch64NeonSVEBridge.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsAArch64NeonSVEBridge.def new file mode 100644 index 000000000000..b8bb054d4cce --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsAArch64NeonSVEBridge.def @@ -0,0 +1,39 @@ +#ifdef GET_SVE_BUILTINS +TARGET_BUILTIN(__builtin_sve_svget_neonq_s8, "V16Scq16Sc", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svget_neonq_s16, "V8sq8s", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svget_neonq_s32, "V4iq4i", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svget_neonq_s64, "V2Wiq2Wi", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svget_neonq_u8, "V16Ucq16Uc", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svget_neonq_u16, "V16Usq16Us", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svget_neonq_u32, "V4Uiq4Ui", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svget_neonq_u64, "V2UWiq2UWi", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svget_neonq_f16, "V8hq8h", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svget_neonq_f32, "V4fq4f", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svget_neonq_f64, "V2dq2d", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svget_neonq_bf16, "V8yq8y", "n", "sve,bf16") +TARGET_BUILTIN(__builtin_sve_svset_neonq_s8, "q16Scq16ScV16Sc", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svset_neonq_s16, "q8sq8sV8s", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svset_neonq_s32, "q4iq4iV4i", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svset_neonq_s64, "q2Wiq2WiV2Wi", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svset_neonq_u8, "q16Ucq16UcV16Uc", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svset_neonq_u16, "q8Usq8UsV8s", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svset_neonq_u32, "q4Uiq4UiV4Ui", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svset_neonq_u64, "q2UWiq2UWiV2UWi", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svset_neonq_f16, "q8hq8hV8h", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svset_neonq_f32, "q4fq4fV4f", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svset_neonq_f64, "q2dq2dV2d", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svset_neonq_bf16, "q8yq8yV8y", "n", "sve,bf16") +TARGET_BUILTIN(__builtin_sve_svdup_neonq_s8, "q16ScV16Sc", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svdup_neonq_s16, "q8sV8s", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svdup_neonq_s32, "q4iV4i", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svdup_neonq_s64, "q4iV4i", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svdup_neonq_u8, "q16UcV16Uc", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svdup_neonq_u16, "q8UsV8Us", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svdup_neonq_u32, "q4UiV4Ui", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svdup_neonq_u64, "q2UWiV2UWi", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svdup_neonq_f16, "q8hV8h", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svdup_neonq_f32, "q4fV4f", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svdup_neonq_f64, "q2dV2d", "n", "sve") +TARGET_BUILTIN(__builtin_sve_svdup_neonq_bf16, "q8yV8y", "n", "sve,bf16") +#endif + diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsAArch64NeonSVEBridge_cg.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsAArch64NeonSVEBridge_cg.def new file mode 100644 index 000000000000..7717ba67b427 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsAArch64NeonSVEBridge_cg.def @@ -0,0 +1,39 @@ +#ifdef GET_SVE_LLVM_INTRINSIC_MAP +SVEMAP2(svget_neonq_s8, SVETypeFlags::EltTyInt8), +SVEMAP2(svget_neonq_s16, SVETypeFlags::EltTyInt16), +SVEMAP2(svget_neonq_s32, SVETypeFlags::EltTyInt32), +SVEMAP2(svget_neonq_s64, SVETypeFlags::EltTyInt64), +SVEMAP2(svget_neonq_u8, SVETypeFlags::EltTyInt8), +SVEMAP2(svget_neonq_u16, SVETypeFlags::EltTyInt16), +SVEMAP2(svget_neonq_u32, SVETypeFlags::EltTyInt32), +SVEMAP2(svget_neonq_u64, SVETypeFlags::EltTyInt64), +SVEMAP2(svget_neonq_f16, SVETypeFlags::EltTyFloat16), +SVEMAP2(svget_neonq_f32, SVETypeFlags::EltTyFloat32), +SVEMAP2(svget_neonq_f64, SVETypeFlags::EltTyFloat64), +SVEMAP2(svget_neonq_bf16, SVETypeFlags::EltTyBFloat16), +SVEMAP2(svset_neonq_s8, SVETypeFlags::EltTyInt8), +SVEMAP2(svset_neonq_s16, SVETypeFlags::EltTyInt16), +SVEMAP2(svset_neonq_s32, SVETypeFlags::EltTyInt32), +SVEMAP2(svset_neonq_s64, SVETypeFlags::EltTyInt64), +SVEMAP2(svset_neonq_u8, SVETypeFlags::EltTyInt8), +SVEMAP2(svset_neonq_u16, SVETypeFlags::EltTyInt16), +SVEMAP2(svset_neonq_u32, SVETypeFlags::EltTyInt32), +SVEMAP2(svset_neonq_u64, SVETypeFlags::EltTyInt64), +SVEMAP2(svset_neonq_f16, SVETypeFlags::EltTyFloat16), +SVEMAP2(svset_neonq_f32, SVETypeFlags::EltTyFloat32), +SVEMAP2(svset_neonq_f64, SVETypeFlags::EltTyFloat64), +SVEMAP2(svset_neonq_bf16, SVETypeFlags::EltTyBFloat16), +SVEMAP2(svdup_neonq_s8, SVETypeFlags::EltTyInt8), +SVEMAP2(svdup_neonq_s16, SVETypeFlags::EltTyInt16), +SVEMAP2(svdup_neonq_s32, SVETypeFlags::EltTyInt32), +SVEMAP2(svdup_neonq_s64, SVETypeFlags::EltTyInt64), +SVEMAP2(svdup_neonq_u8, SVETypeFlags::EltTyInt8), +SVEMAP2(svdup_neonq_u16, SVETypeFlags::EltTyInt16), +SVEMAP2(svdup_neonq_u32, SVETypeFlags::EltTyInt32), +SVEMAP2(svdup_neonq_u64, SVETypeFlags::EltTyInt64), +SVEMAP2(svdup_neonq_f16, SVETypeFlags::EltTyFloat16), +SVEMAP2(svdup_neonq_f32, SVETypeFlags::EltTyFloat32), +SVEMAP2(svdup_neonq_f64, SVETypeFlags::EltTyFloat64), +SVEMAP2(svdup_neonq_bf16, SVETypeFlags::EltTyBFloat16), +#endif + diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsAMDGPU.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsAMDGPU.def index 3570431d952c..74dfd1d214e8 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsAMDGPU.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsAMDGPU.def @@ -62,13 +62,11 @@ BUILTIN(__builtin_amdgcn_s_sendmsg, "vIiUi", "n") BUILTIN(__builtin_amdgcn_s_sendmsghalt, "vIiUi", "n") BUILTIN(__builtin_amdgcn_s_barrier, "v", "n") BUILTIN(__builtin_amdgcn_wave_barrier, "v", "n") +BUILTIN(__builtin_amdgcn_sched_barrier, "vIi", "n") +BUILTIN(__builtin_amdgcn_sched_group_barrier, "vIiIiIi", "n") +BUILTIN(__builtin_amdgcn_iglp_opt, "vIi", "n") BUILTIN(__builtin_amdgcn_s_dcache_inv, "v", "n") BUILTIN(__builtin_amdgcn_buffer_wbinvl1, "v", "n") -BUILTIN(__builtin_amdgcn_ds_gws_init, "vUiUi", "n") -BUILTIN(__builtin_amdgcn_ds_gws_barrier, "vUiUi", "n") -BUILTIN(__builtin_amdgcn_ds_gws_sema_v, "vUi", "n") -BUILTIN(__builtin_amdgcn_ds_gws_sema_br, "vUiUi", "n") -BUILTIN(__builtin_amdgcn_ds_gws_sema_p, "vUi", "n") BUILTIN(__builtin_amdgcn_fence, "vUicC*", "n") BUILTIN(__builtin_amdgcn_groupstaticsize, "Ui", "n") @@ -97,6 +95,8 @@ BUILTIN(__builtin_amdgcn_rsq_clamp, "dd", "nc") BUILTIN(__builtin_amdgcn_rsq_clampf, "ff", "nc") BUILTIN(__builtin_amdgcn_sinf, "ff", "nc") BUILTIN(__builtin_amdgcn_cosf, "ff", "nc") +BUILTIN(__builtin_amdgcn_logf, "ff", "nc") +BUILTIN(__builtin_amdgcn_exp2f, "ff", "nc") BUILTIN(__builtin_amdgcn_log_clampf, "ff", "nc") BUILTIN(__builtin_amdgcn_ldexp, "ddi", "nc") BUILTIN(__builtin_amdgcn_ldexpf, "ffi", "nc") @@ -116,12 +116,7 @@ BUILTIN(__builtin_amdgcn_cubema, "ffff", "nc") BUILTIN(__builtin_amdgcn_s_sleep, "vIi", "n") BUILTIN(__builtin_amdgcn_s_incperflevel, "vIi", "n") BUILTIN(__builtin_amdgcn_s_decperflevel, "vIi", "n") -BUILTIN(__builtin_amdgcn_uicmp, "WUiUiUiIi", "nc") -BUILTIN(__builtin_amdgcn_uicmpl, "WUiWUiWUiIi", "nc") -BUILTIN(__builtin_amdgcn_sicmp, "WUiiiIi", "nc") -BUILTIN(__builtin_amdgcn_sicmpl, "WUiWiWiIi", "nc") -BUILTIN(__builtin_amdgcn_fcmp, "WUiddIi", "nc") -BUILTIN(__builtin_amdgcn_fcmpf, "WUiffIi", "nc") +BUILTIN(__builtin_amdgcn_s_setprio, "vIs", "n") BUILTIN(__builtin_amdgcn_ds_swizzle, "iiIi", "nc") BUILTIN(__builtin_amdgcn_ds_permute, "iii", "nc") BUILTIN(__builtin_amdgcn_ds_bpermute, "iii", "nc") @@ -152,13 +147,41 @@ BUILTIN(__builtin_amdgcn_mqsad_pk_u16_u8, "WUiWUiUiWUi", "nc") BUILTIN(__builtin_amdgcn_mqsad_u32_u8, "V4UiWUiUiV4Ui", "nc") //===----------------------------------------------------------------------===// +// Ballot builtins. +//===----------------------------------------------------------------------===// + +TARGET_BUILTIN(__builtin_amdgcn_ballot_w32, "ZUib", "nc", "wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_ballot_w64, "WUib", "nc", "wavefrontsize64") + +// Deprecated intrinsics in favor of __builtin_amdgn_ballot_{w32|w64} +BUILTIN(__builtin_amdgcn_uicmp, "WUiUiUiIi", "nc") +BUILTIN(__builtin_amdgcn_uicmpl, "WUiWUiWUiIi", "nc") +BUILTIN(__builtin_amdgcn_sicmp, "WUiiiIi", "nc") +BUILTIN(__builtin_amdgcn_sicmpl, "WUiWiWiIi", "nc") +BUILTIN(__builtin_amdgcn_fcmp, "WUiddIi", "nc") +BUILTIN(__builtin_amdgcn_fcmpf, "WUiffIi", "nc") + +//===----------------------------------------------------------------------===// +// Flat addressing builtins. +//===----------------------------------------------------------------------===// +BUILTIN(__builtin_amdgcn_is_shared, "bvC*0", "nc") +BUILTIN(__builtin_amdgcn_is_private, "bvC*0", "nc") + +//===----------------------------------------------------------------------===// +// GWS builtins. +//===----------------------------------------------------------------------===// +TARGET_BUILTIN(__builtin_amdgcn_ds_gws_init, "vUiUi", "n", "gws") +TARGET_BUILTIN(__builtin_amdgcn_ds_gws_barrier, "vUiUi", "n", "gws") +TARGET_BUILTIN(__builtin_amdgcn_ds_gws_sema_v, "vUi", "n", "gws") +TARGET_BUILTIN(__builtin_amdgcn_ds_gws_sema_br, "vUiUi", "n", "gws") +TARGET_BUILTIN(__builtin_amdgcn_ds_gws_sema_p, "vUi", "n", "gws") + +//===----------------------------------------------------------------------===// // CI+ only builtins. //===----------------------------------------------------------------------===// TARGET_BUILTIN(__builtin_amdgcn_s_dcache_inv_vol, "v", "n", "ci-insts") TARGET_BUILTIN(__builtin_amdgcn_buffer_wbinvl1_vol, "v", "n", "ci-insts") TARGET_BUILTIN(__builtin_amdgcn_ds_gws_sema_release_all, "vUi", "n", "ci-insts") -TARGET_BUILTIN(__builtin_amdgcn_is_shared, "bvC*0", "nc", "flat-address-space") -TARGET_BUILTIN(__builtin_amdgcn_is_private, "bvC*0", "nc", "flat-address-space") //===----------------------------------------------------------------------===// // Interpolation builtins. @@ -196,17 +219,46 @@ TARGET_BUILTIN(__builtin_amdgcn_perm, "UiUiUiUi", "nc", "gfx8-insts") TARGET_BUILTIN(__builtin_amdgcn_fmed3h, "hhhh", "nc", "gfx9-insts") +TARGET_BUILTIN(__builtin_amdgcn_global_atomic_fadd_f64, "dd*1d", "t", "gfx90a-insts") +TARGET_BUILTIN(__builtin_amdgcn_global_atomic_fadd_f32, "ff*1f", "t", "atomic-fadd-rtn-insts") +TARGET_BUILTIN(__builtin_amdgcn_global_atomic_fadd_v2f16, "V2hV2h*1V2h", "t", "atomic-buffer-global-pk-add-f16-insts") +TARGET_BUILTIN(__builtin_amdgcn_global_atomic_fmin_f64, "dd*1d", "t", "gfx90a-insts") +TARGET_BUILTIN(__builtin_amdgcn_global_atomic_fmax_f64, "dd*1d", "t", "gfx90a-insts") + +TARGET_BUILTIN(__builtin_amdgcn_flat_atomic_fadd_f64, "dd*0d", "t", "gfx90a-insts") +TARGET_BUILTIN(__builtin_amdgcn_flat_atomic_fmin_f64, "dd*0d", "t", "gfx90a-insts") +TARGET_BUILTIN(__builtin_amdgcn_flat_atomic_fmax_f64, "dd*0d", "t", "gfx90a-insts") + +TARGET_BUILTIN(__builtin_amdgcn_ds_atomic_fadd_f64, "dd*3d", "t", "gfx90a-insts") +TARGET_BUILTIN(__builtin_amdgcn_ds_atomic_fadd_f32, "ff*3f", "t", "gfx8-insts") + +TARGET_BUILTIN(__builtin_amdgcn_flat_atomic_fadd_f32, "ff*0f", "t", "gfx940-insts") +TARGET_BUILTIN(__builtin_amdgcn_flat_atomic_fadd_v2f16, "V2hV2h*0V2h", "t", "atomic-flat-pk-add-16-insts") +TARGET_BUILTIN(__builtin_amdgcn_flat_atomic_fadd_v2bf16, "V2sV2s*0V2s", "t", "atomic-flat-pk-add-16-insts") +TARGET_BUILTIN(__builtin_amdgcn_global_atomic_fadd_v2bf16, "V2sV2s*1V2s", "t", "atomic-global-pk-add-bf16-inst") +TARGET_BUILTIN(__builtin_amdgcn_ds_atomic_fadd_v2bf16, "V2sV2s*3V2s", "t", "atomic-ds-pk-add-16-insts") +TARGET_BUILTIN(__builtin_amdgcn_ds_atomic_fadd_v2f16, "V2hV2h*3V2h", "t", "atomic-ds-pk-add-16-insts") + //===----------------------------------------------------------------------===// // Deep learning builtins. //===----------------------------------------------------------------------===// -TARGET_BUILTIN(__builtin_amdgcn_fdot2, "fV2hV2hfIb", "nc", "dot7-insts") +TARGET_BUILTIN(__builtin_amdgcn_fdot2, "fV2hV2hfIb", "nc", "dot10-insts") +TARGET_BUILTIN(__builtin_amdgcn_fdot2_f16_f16, "hV2hV2hh", "nc", "dot9-insts") +TARGET_BUILTIN(__builtin_amdgcn_fdot2_bf16_bf16, "sV2sV2ss", "nc", "dot9-insts") +TARGET_BUILTIN(__builtin_amdgcn_fdot2_f32_bf16, "fV2sV2sfIb", "nc", "dot9-insts") TARGET_BUILTIN(__builtin_amdgcn_sdot2, "SiV2SsV2SsSiIb", "nc", "dot2-insts") TARGET_BUILTIN(__builtin_amdgcn_udot2, "UiV2UsV2UsUiIb", "nc", "dot2-insts") TARGET_BUILTIN(__builtin_amdgcn_sdot4, "SiSiSiSiIb", "nc", "dot1-insts") TARGET_BUILTIN(__builtin_amdgcn_udot4, "UiUiUiUiIb", "nc", "dot7-insts") +TARGET_BUILTIN(__builtin_amdgcn_sudot4, "iIbiIbiiIb", "nc", "dot8-insts") TARGET_BUILTIN(__builtin_amdgcn_sdot8, "SiSiSiSiIb", "nc", "dot1-insts") TARGET_BUILTIN(__builtin_amdgcn_udot8, "UiUiUiUiIb", "nc", "dot7-insts") +TARGET_BUILTIN(__builtin_amdgcn_sudot8, "iIbiIbiiIb", "nc", "dot8-insts") +TARGET_BUILTIN(__builtin_amdgcn_dot4_f32_fp8_bf8, "fUiUif", "nc", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_dot4_f32_bf8_fp8, "fUiUif", "nc", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_dot4_f32_fp8_fp8, "fUiUif", "nc", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_dot4_f32_bf8_bf8, "fUiUif", "nc", "gfx12-insts") //===----------------------------------------------------------------------===// // GFX10+ only builtins. @@ -226,6 +278,43 @@ TARGET_BUILTIN(__builtin_amdgcn_image_bvh_intersect_ray_h, "V4UiUifV4fV4hV4hV4Ui TARGET_BUILTIN(__builtin_amdgcn_image_bvh_intersect_ray_l, "V4UiWUifV4fV4fV4fV4Ui", "nc", "gfx10-insts") TARGET_BUILTIN(__builtin_amdgcn_image_bvh_intersect_ray_lh, "V4UiWUifV4fV4hV4hV4Ui", "nc", "gfx10-insts") + +//===----------------------------------------------------------------------===// +// GFX11+ only builtins. +//===----------------------------------------------------------------------===// + +// TODO: This is a no-op in wave32. Should the builtin require wavefrontsize64? +TARGET_BUILTIN(__builtin_amdgcn_permlane64, "UiUi", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_s_wait_event_export_ready, "v", "n", "gfx11-insts") + +//===----------------------------------------------------------------------===// +// WMMA builtins. +// Postfix w32 indicates the builtin requires wavefront size of 32. +// Postfix w64 indicates the builtin requires wavefront size of 64. +//===----------------------------------------------------------------------===// +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_f16_w32, "V8fV16hV16hV8f", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_bf16_w32, "V8fV16sV16sV8f", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f16_16x16x16_f16_w32, "V16hV16hV16hV16hIb", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_wmma_bf16_16x16x16_bf16_w32, "V16sV16sV16sV16sIb", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f16_16x16x16_f16_tied_w32, "V16hV16hV16hV16hIb", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_wmma_bf16_16x16x16_bf16_tied_w32, "V16sV16sV16sV16sIb", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_wmma_i32_16x16x16_iu8_w32, "V8iIbV4iIbV4iV8iIb", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_wmma_i32_16x16x16_iu4_w32, "V8iIbV2iIbV2iV8iIb", "nc", "gfx11-insts") + +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_f16_w64, "V4fV16hV16hV4f", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_bf16_w64, "V4fV16sV16sV4f", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f16_16x16x16_f16_w64, "V8hV16hV16hV8hIb", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_wmma_bf16_16x16x16_bf16_w64, "V8sV16sV16sV8sIb", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f16_16x16x16_f16_tied_w64, "V8hV16hV16hV8hIb", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_wmma_bf16_16x16x16_bf16_tied_w64, "V8sV16sV16sV8sIb", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_wmma_i32_16x16x16_iu8_w64, "V4iIbV4iIbV4iV4iIb", "nc", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_wmma_i32_16x16x16_iu4_w64, "V4iIbV2iIbV2iV4iIb", "nc", "gfx11-insts") + +TARGET_BUILTIN(__builtin_amdgcn_s_sendmsg_rtn, "UiUIi", "n", "gfx11-insts") +TARGET_BUILTIN(__builtin_amdgcn_s_sendmsg_rtnl, "UWiUIi", "n", "gfx11-insts") + +TARGET_BUILTIN(__builtin_amdgcn_ds_bvh_stack_rtn, "V2UiUiUiV4UiIi", "n", "gfx11-insts") + //===----------------------------------------------------------------------===// // Special builtins. //===----------------------------------------------------------------------===// @@ -285,5 +374,129 @@ TARGET_BUILTIN(__builtin_amdgcn_mfma_f32_16x16x16bf16_1k, "V4fV4sV4sV4fIiIiIi", TARGET_BUILTIN(__builtin_amdgcn_mfma_f64_16x16x4f64, "V4dddV4dIiIiIi", "nc", "mai-insts") TARGET_BUILTIN(__builtin_amdgcn_mfma_f64_4x4x4f64, "ddddIiIiIi", "nc", "mai-insts") +TARGET_BUILTIN(__builtin_amdgcn_mfma_i32_16x16x32_i8, "V4iWiWiV4iIiIiIi", "nc", "mai-insts") +TARGET_BUILTIN(__builtin_amdgcn_mfma_i32_32x32x16_i8, "V16iWiWiV16iIiIiIi", "nc", "mai-insts") +TARGET_BUILTIN(__builtin_amdgcn_mfma_f32_16x16x8_xf32, "V4fV2fV2fV4fIiIiIi", "nc", "mai-insts") +TARGET_BUILTIN(__builtin_amdgcn_mfma_f32_32x32x4_xf32, "V16fV2fV2fV16fIiIiIi", "nc", "mai-insts") +TARGET_BUILTIN(__builtin_amdgcn_mfma_f32_16x16x32_bf8_bf8, "V4fWiWiV4fIiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_mfma_f32_16x16x32_bf8_fp8, "V4fWiWiV4fIiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_mfma_f32_16x16x32_fp8_bf8, "V4fWiWiV4fIiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_mfma_f32_16x16x32_fp8_fp8, "V4fWiWiV4fIiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_mfma_f32_32x32x16_bf8_bf8, "V16fWiWiV16fIiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_mfma_f32_32x32x16_bf8_fp8, "V16fWiWiV16fIiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_mfma_f32_32x32x16_fp8_bf8, "V16fWiWiV16fIiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_mfma_f32_32x32x16_fp8_fp8, "V16fWiWiV16fIiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_smfmac_f32_16x16x32_f16, "V4fV4hV8hV4fiIiIi", "nc", "mai-insts") +TARGET_BUILTIN(__builtin_amdgcn_smfmac_f32_32x32x16_f16, "V16fV4hV8hV16fiIiIi", "nc", "mai-insts") +TARGET_BUILTIN(__builtin_amdgcn_smfmac_f32_16x16x32_bf16, "V4fV4sV8sV4fiIiIi", "nc", "mai-insts") +TARGET_BUILTIN(__builtin_amdgcn_smfmac_f32_32x32x16_bf16, "V16fV4sV8sV16fiIiIi", "nc", "mai-insts") +TARGET_BUILTIN(__builtin_amdgcn_smfmac_i32_16x16x64_i8, "V4iV2iV4iV4iiIiIi", "nc", "mai-insts") +TARGET_BUILTIN(__builtin_amdgcn_smfmac_i32_32x32x32_i8, "V16iV2iV4iV16iiIiIi", "nc", "mai-insts") +TARGET_BUILTIN(__builtin_amdgcn_smfmac_f32_16x16x64_bf8_bf8, "V4fV2iV4iV4fiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_smfmac_f32_16x16x64_bf8_fp8, "V4fV2iV4iV4fiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_smfmac_f32_16x16x64_fp8_bf8, "V4fV2iV4iV4fiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_smfmac_f32_16x16x64_fp8_fp8, "V4fV2iV4iV4fiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_smfmac_f32_32x32x32_bf8_bf8, "V16fV2iV4iV16fiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_smfmac_f32_32x32x32_bf8_fp8, "V16fV2iV4iV16fiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_smfmac_f32_32x32x32_fp8_bf8, "V16fV2iV4iV16fiIiIi", "nc", "fp8-insts") +TARGET_BUILTIN(__builtin_amdgcn_smfmac_f32_32x32x32_fp8_fp8, "V16fV2iV4iV16fiIiIi", "nc", "fp8-insts") + +TARGET_BUILTIN(__builtin_amdgcn_cvt_f32_bf8, "fiIi", "nc", "fp8-conversion-insts") +TARGET_BUILTIN(__builtin_amdgcn_cvt_f32_fp8, "fiIi", "nc", "fp8-conversion-insts") +TARGET_BUILTIN(__builtin_amdgcn_cvt_pk_f32_bf8, "V2fiIb", "nc", "fp8-conversion-insts") +TARGET_BUILTIN(__builtin_amdgcn_cvt_pk_f32_fp8, "V2fiIb", "nc", "fp8-conversion-insts") +TARGET_BUILTIN(__builtin_amdgcn_cvt_pk_bf8_f32, "iffiIb", "nc", "fp8-conversion-insts") +TARGET_BUILTIN(__builtin_amdgcn_cvt_pk_fp8_f32, "iffiIb", "nc", "fp8-conversion-insts") +TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_bf8_f32, "ifiiIi", "nc", "fp8-conversion-insts") +TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_fp8_f32, "ifiiIi", "nc", "fp8-conversion-insts") + +//===----------------------------------------------------------------------===// +// GFX12+ only builtins. +//===----------------------------------------------------------------------===// + +TARGET_BUILTIN(__builtin_amdgcn_s_sleep_var, "vUi", "n", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_permlane16_var, "UiUiUiUiIbIb", "nc", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_permlanex16_var, "UiUiUiUiIbIb", "nc", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_s_barrier_signal, "vIi", "n", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_s_barrier_signal_var, "vi", "n", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_s_barrier_wait, "vIs", "n", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_s_barrier_signal_isfirst, "bIi", "n", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_s_barrier_signal_isfirst_var, "bi", "n", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_s_barrier_init, "vii", "n", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_s_barrier_join, "vi", "n", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_s_wakeup_barrier, "vi", "n", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_s_barrier_leave, "b", "n", "gfx12-insts") +TARGET_BUILTIN(__builtin_amdgcn_s_get_barrier_state, "Uii", "n", "gfx12-insts") + +TARGET_BUILTIN(__builtin_amdgcn_global_load_tr_v2i32, "V2iV2i*1", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_global_load_tr_v8i16, "V8sV8s*1", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_global_load_tr_v8f16, "V8hV8h*1", "nc", "gfx12-insts,wavefrontsize32") + +TARGET_BUILTIN(__builtin_amdgcn_global_load_tr_i32, "ii*1", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_global_load_tr_v4i16, "V4sV4s*1", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_global_load_tr_v4f16, "V4hV4h*1", "nc", "gfx12-insts,wavefrontsize64") + +//===----------------------------------------------------------------------===// +// WMMA builtins. +// Postfix w32 indicates the builtin requires wavefront size of 32. +// Postfix w64 indicates the builtin requires wavefront size of 64. +// +// Some of these are very similar to their GFX11 counterparts, but they don't +// require replication of the A,B matrices, so they use fewer vector elements. +// Therefore, we add an "_gfx12" suffix to distinguish them from the existing +// builtins. +//===----------------------------------------------------------------------===// +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_f16_w32_gfx12, "V8fV8hV8hV8f", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_bf16_w32_gfx12, "V8fV8sV8sV8f", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f16_16x16x16_f16_w32_gfx12, "V8hV8hV8hV8h", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_wmma_bf16_16x16x16_bf16_w32_gfx12, "V8sV8sV8sV8s", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_wmma_i32_16x16x16_iu8_w32_gfx12, "V8iIbV2iIbV2iV8iIb", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_wmma_i32_16x16x16_iu4_w32_gfx12, "V8iIbiIbiV8iIb", "nc", "gfx12-insts,wavefrontsize32") +// These are gfx12-only, but for consistency with the other WMMA variants we're +// keeping the "_gfx12" suffix. +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_fp8_fp8_w32_gfx12, "V8fV2iV2iV8f", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_fp8_bf8_w32_gfx12, "V8fV2iV2iV8f", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_bf8_fp8_w32_gfx12, "V8fV2iV2iV8f", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_bf8_bf8_w32_gfx12, "V8fV2iV2iV8f", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_wmma_i32_16x16x32_iu4_w32_gfx12, "V8iIbV2iIbV2iV8iIb", "nc", "gfx12-insts,wavefrontsize32") + +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_f16_w64_gfx12, "V4fV4hV4hV4f", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_bf16_w64_gfx12, "V4fV4sV4sV4f", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f16_16x16x16_f16_w64_gfx12, "V4hV4hV4hV4h", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_wmma_bf16_16x16x16_bf16_w64_gfx12, "V4sV4sV4sV4s", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_wmma_i32_16x16x16_iu8_w64_gfx12, "V4iIbiIbiV4iIb", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_wmma_i32_16x16x16_iu4_w64_gfx12, "V4iIbiIbiV4iIb", "nc", "gfx12-insts,wavefrontsize64") +// These are gfx12-only, but for consistency with the other WMMA variants we're +// keeping the "_gfx12" suffix. +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_fp8_fp8_w64_gfx12, "V4fiiV4f", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_fp8_bf8_w64_gfx12, "V4fiiV4f", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_bf8_fp8_w64_gfx12, "V4fiiV4f", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x16_bf8_bf8_w64_gfx12, "V4fiiV4f", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_wmma_i32_16x16x32_iu4_w64_gfx12, "V4iIbiIbiV4iIb", "nc", "gfx12-insts,wavefrontsize64") + +TARGET_BUILTIN(__builtin_amdgcn_swmmac_f32_16x16x32_f16_w32, "V8fV8hV16hV8fs", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_f32_16x16x32_bf16_w32, "V8fV8sV16sV8fs", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_f16_16x16x32_f16_w32, "V8hV8hV16hV8hs", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_bf16_16x16x32_bf16_w32, "V8sV8sV16sV8ss", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_i32_16x16x32_iu8_w32, "V8iIbV2iIbV4iV8isIb", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_i32_16x16x32_iu4_w32, "V8iIbiIbV2iV8isIb", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_i32_16x16x64_iu4_w32, "V8iIbV2iIbV4iV8isIb", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_f32_16x16x32_fp8_fp8_w32, "V8fV2iV4iV8fs", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_f32_16x16x32_fp8_bf8_w32, "V8fV2iV4iV8fs", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_f32_16x16x32_bf8_fp8_w32, "V8fV2iV4iV8fs", "nc", "gfx12-insts,wavefrontsize32") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_f32_16x16x32_bf8_bf8_w32, "V8fV2iV4iV8fs", "nc", "gfx12-insts,wavefrontsize32") + +TARGET_BUILTIN(__builtin_amdgcn_swmmac_f32_16x16x32_f16_w64, "V4fV4hV8hV4fs", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_f32_16x16x32_bf16_w64, "V4fV4sV8sV4fs", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_f16_16x16x32_f16_w64, "V4hV4hV8hV4hs", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_bf16_16x16x32_bf16_w64, "V4sV4sV8sV4ss", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_i32_16x16x32_iu8_w64, "V4iIbiIbV2iV4isIb", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_i32_16x16x32_iu4_w64, "V4iIbiIbiV4isIb", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_i32_16x16x64_iu4_w64, "V4iIbiIbV2iV4isIb", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_f32_16x16x32_fp8_fp8_w64, "V4fiV2iV4fs", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_f32_16x16x32_fp8_bf8_w64, "V4fiV2iV4fs", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_f32_16x16x32_bf8_fp8_w64, "V4fiV2iV4fs", "nc", "gfx12-insts,wavefrontsize64") +TARGET_BUILTIN(__builtin_amdgcn_swmmac_f32_16x16x32_bf8_bf8_w64, "V4fiV2iV4fs", "nc", "gfx12-insts,wavefrontsize64") + #undef BUILTIN #undef TARGET_BUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsARM.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsARM.def index be20c24aa28a..9ee918cb2147 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsARM.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsARM.def @@ -17,6 +17,10 @@ # define LANGBUILTIN(ID, TYPE, ATTRS, BUILTIN_LANG) BUILTIN(ID, TYPE, ATTRS) #endif +#if defined(BUILTIN) && !defined(TARGET_BUILTIN) +# define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) +#endif + #if defined(BUILTIN) && !defined(TARGET_HEADER_BUILTIN) # define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANG, FEATURE) BUILTIN(ID, TYPE, ATTRS) #endif @@ -115,6 +119,8 @@ BUILTIN(__builtin_arm_smusdx, "iii", "nc") // Bit manipulation BUILTIN(__builtin_arm_rbit, "UiUi", "nc") +BUILTIN(__builtin_arm_clz, "UiZUi", "nc") +BUILTIN(__builtin_arm_clz64, "UiWUi", "nc") BUILTIN(__builtin_arm_cls, "UiZUi", "nc") BUILTIN(__builtin_arm_cls64, "UiWUi", "nc") @@ -157,14 +163,14 @@ BUILTIN(__builtin_arm_mrrc, "LLUiUIiUIiUIi", "") BUILTIN(__builtin_arm_mrrc2, "LLUiUIiUIiUIi", "") // CRC32 -BUILTIN(__builtin_arm_crc32b, "UiUiUc", "nc") -BUILTIN(__builtin_arm_crc32cb, "UiUiUc", "nc") -BUILTIN(__builtin_arm_crc32h, "UiUiUs", "nc") -BUILTIN(__builtin_arm_crc32ch, "UiUiUs", "nc") -BUILTIN(__builtin_arm_crc32w, "UiUiUi", "nc") -BUILTIN(__builtin_arm_crc32cw, "UiUiUi", "nc") -BUILTIN(__builtin_arm_crc32d, "UiUiLLUi", "nc") -BUILTIN(__builtin_arm_crc32cd, "UiUiLLUi", "nc") +TARGET_BUILTIN(__builtin_arm_crc32b, "UiUiUc", "nc", "crc") +TARGET_BUILTIN(__builtin_arm_crc32cb, "UiUiUc", "nc", "crc") +TARGET_BUILTIN(__builtin_arm_crc32h, "UiUiUs", "nc", "crc") +TARGET_BUILTIN(__builtin_arm_crc32ch, "UiUiUs", "nc", "crc") +TARGET_BUILTIN(__builtin_arm_crc32w, "UiUiUi", "nc", "crc") +TARGET_BUILTIN(__builtin_arm_crc32cw, "UiUiUi", "nc", "crc") +TARGET_BUILTIN(__builtin_arm_crc32d, "UiUiLLUi", "nc", "crc") +TARGET_BUILTIN(__builtin_arm_crc32cd, "UiUiLLUi", "nc", "crc") // ARMv8-M Security Extensions a.k.a CMSE BUILTIN(__builtin_arm_cmse_TT, "Uiv*", "n") @@ -197,6 +203,9 @@ BUILTIN(__builtin_arm_wsr, "vcC*Ui", "nc") BUILTIN(__builtin_arm_wsr64, "vcC*LLUi", "nc") BUILTIN(__builtin_arm_wsrp, "vcC*vC*", "nc") +// Misc +BUILTIN(__builtin_sponentry, "v*", "c") + // Builtins for implementing ACLE MVE intrinsics. (Unlike NEON, these // don't need to live in a separate BuiltinsMVE.def, because they // aren't included from both here and BuiltinsAArch64.def.) @@ -222,118 +231,119 @@ LANGBUILTIN(_MoveFromCoprocessor2, "UiIUiIUiIUiIUiIUi", "", ALL_MS_LANGUAGES) LANGBUILTIN(_MoveToCoprocessor, "vUiIUiIUiIUiIUiIUi", "", ALL_MS_LANGUAGES) LANGBUILTIN(_MoveToCoprocessor2, "vUiIUiIUiIUiIUiIUi", "", ALL_MS_LANGUAGES) -TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_BitScanForward64, "UcUNi*ULLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_BitScanReverse64, "UcUNi*ULLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedAnd64, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement64, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange64, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeSub64, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement64, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr64, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor64, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_acq, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_rel, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_nf, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_acq, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_rel, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_nf, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_acq, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_rel, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_nf, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_acq, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_rel, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_nf, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedExchange8_acq, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange8_nf, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange8_rel, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange16_acq, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange16_nf, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange16_rel, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange_acq, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange_nf, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange_rel, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange64_acq, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange64_nf, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange64_rel, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_acq, "ccD*cc", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_nf, "ccD*cc", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_rel, "ccD*cc", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_acq, "ssD*ss", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_nf, "ssD*ss", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_rel, "ssD*ss", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_acq, "NiNiD*NiNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_nf, "NiNiD*NiNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_rel, "NiNiD*NiNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_acq, "LLiLLiD*LLiLLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_nf, "LLiLLiD*LLiLLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_rel, "LLiLLiD*LLiLLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedOr8_acq, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr8_nf, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr8_rel, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr16_acq, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr16_nf, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr16_rel, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr_acq, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr_nf, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr_rel, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr64_acq, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr64_nf, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr64_rel, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedXor8_acq, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor8_nf, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor8_rel, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor16_acq, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor16_nf, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor16_rel, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor_acq, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor_nf, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor_rel, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor64_acq, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor64_nf, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor64_rel, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedAnd8_acq, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd8_nf, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd8_rel, "ccD*c", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd16_acq, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd16_nf, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd16_rel, "ssD*s", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd_acq, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd_nf, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd_rel, "NiNiD*Ni", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd64_acq, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd64_nf, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd64_rel, "LLiLLiD*LLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedIncrement16_acq, "ssD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement16_nf, "ssD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement16_rel, "ssD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement_acq, "NiNiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement_nf, "NiNiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement_rel, "NiNiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement64_acq, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement64_nf, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement64_rel, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedDecrement16_acq, "ssD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement16_nf, "ssD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement16_rel, "ssD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement_acq, "NiNiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement_nf, "NiNiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement_rel, "NiNiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement64_acq, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement64_nf, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement64_rel, "LLiLLiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_BitScanForward64, "UcUNi*ULLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_BitScanReverse64, "UcUNi*ULLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedAnd64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement64, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeSub64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement64, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedExchange8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_acq, "ccD*cc", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_nf, "ccD*cc", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_rel, "ccD*cc", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_acq, "ssD*ss", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_nf, "ssD*ss", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_rel, "ssD*ss", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_acq, "NiNiD*NiNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_nf, "NiNiD*NiNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_rel, "NiNiD*NiNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_acq, "LLiLLiD*LLiLLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_nf, "LLiLLiD*LLiLLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_rel, "LLiLLiD*LLiLLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedOr8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedXor8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedAnd8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedAnd64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedIncrement16_acq, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement16_nf, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement16_rel, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement_acq, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement_nf, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement_rel, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement64_acq, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement64_nf, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement64_rel, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_InterlockedDecrement16_acq, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement16_nf, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement16_rel, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement_acq, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement_nf, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement_rel, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement64_acq, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement64_nf, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement64_rel, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") #undef BUILTIN #undef LANGBUILTIN +#undef TARGET_BUILTIN #undef TARGET_HEADER_BUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsHexagon.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsHexagon.def index 0001bd556117..0dc0f4567dd4 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsHexagon.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsHexagon.def @@ -17,8 +17,14 @@ # define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) #endif +#pragma push_macro("V73") +#define V73 "v73" +#pragma push_macro("V71") +#define V71 "v71|" V73 +#pragma push_macro("V69") +#define V69 "v69|" V71 #pragma push_macro("V68") -#define V68 "v68" +#define V68 "v68|" V69 #pragma push_macro("V67") #define V67 "v67|" V68 #pragma push_macro("V66") @@ -34,8 +40,14 @@ #pragma push_macro("V5") #define V5 "v5|" V55 +#pragma push_macro("HVXV73") +#define HVXV73 "hvxv73" +#pragma push_macro("HVXV71") +#define HVXV71 "hvxv71|" HVXV73 +#pragma push_macro("HVXV69") +#define HVXV69 "hvxv69|" HVXV71 #pragma push_macro("HVXV68") -#define HVXV68 "hvxv68" +#define HVXV68 "hvxv68|" HVXV69 #pragma push_macro("HVXV67") #define HVXV67 "hvxv67|" HVXV68 #pragma push_macro("HVXV66") @@ -128,6 +140,9 @@ TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_rtt_acc_128B,"V64iV64iV32iLLi","", " #pragma pop_macro("HVXV66") #pragma pop_macro("HVXV67") #pragma pop_macro("HVXV68") +#pragma pop_macro("HVXV69") +#pragma pop_macro("HVXV71") +#pragma pop_macro("HVXV73") #pragma pop_macro("V5") #pragma pop_macro("V55") @@ -137,6 +152,9 @@ TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_rtt_acc_128B,"V64iV64iV32iLLi","", " #pragma pop_macro("V66") #pragma pop_macro("V67") #pragma pop_macro("V68") +#pragma pop_macro("V69") +#pragma pop_macro("V71") +#pragma pop_macro("V73") #undef BUILTIN #undef TARGET_BUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsHexagonDep.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsHexagonDep.def index 152c9c4dd8ad..6f1ae69037e3 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsHexagonDep.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsHexagonDep.def @@ -1720,6 +1720,8 @@ TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermwq_128B, "vV128biiV32iV32i", "", HV // V66 HVX Instructions. +TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddcarryo, "V16iV16iV16iv*", "", HVXV66) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddcarryo_128B, "V32iV32iV32iv*", "", HVXV66) TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddcarrysat, "V16iV16iV16iV64b", "", HVXV66) TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddcarrysat_128B, "V32iV32iV32iV128b", "", HVXV66) TARGET_BUILTIN(__builtin_HEXAGON_V6_vasr_into, "V32iV32iV16iV16i", "", HVXV66) @@ -1728,6 +1730,8 @@ TARGET_BUILTIN(__builtin_HEXAGON_V6_vrotr, "V16iV16iV16i", "", HVXV66) TARGET_BUILTIN(__builtin_HEXAGON_V6_vrotr_128B, "V32iV32iV32i", "", HVXV66) TARGET_BUILTIN(__builtin_HEXAGON_V6_vsatdw, "V16iV16iV16i", "", HVXV66) TARGET_BUILTIN(__builtin_HEXAGON_V6_vsatdw_128B, "V32iV32iV32i", "", HVXV66) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubcarryo, "V16iV16iV16iv*", "", HVXV66) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubcarryo_128B, "V32iV32iV32iv*", "", HVXV66) // V68 HVX Instructions. @@ -1739,3 +1743,183 @@ TARGET_BUILTIN(__builtin_HEXAGON_V6_v6mpyvubs10, "V32iV32iV32iUIi", "", HVXV68) TARGET_BUILTIN(__builtin_HEXAGON_V6_v6mpyvubs10_128B, "V64iV64iV64iUIi", "", HVXV68) TARGET_BUILTIN(__builtin_HEXAGON_V6_v6mpyvubs10_vxx, "V32iV32iV32iV32iUIi", "", HVXV68) TARGET_BUILTIN(__builtin_HEXAGON_V6_v6mpyvubs10_vxx_128B, "V64iV64iV64iV64iUIi", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vabs_hf, "V16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vabs_hf_128B, "V32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vabs_sf, "V16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vabs_sf_128B, "V32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_hf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_hf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_hf_hf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_hf_hf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf16, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf16_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf16_mix, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf16_mix_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf32, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf32_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf32_mix, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf32_mix_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf_hf, "V32iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf_hf_128B, "V64iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf_sf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf_sf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vassign_fp, "V16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vassign_fp_128B, "V32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_hf_qf16, "V16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_hf_qf16_128B, "V32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_hf_qf32, "V16iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_hf_qf32_128B, "V32iV64i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_sf_qf32, "V16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_sf_qf32_128B, "V32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_b_hf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_b_hf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_h_hf, "V16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_h_hf_128B, "V32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_b, "V32iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_b_128B, "V64iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_h, "V16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_h_128B, "V32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_sf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_sf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_ub, "V32iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_ub_128B, "V64iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_uh, "V16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_uh_128B, "V32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_sf_hf, "V32iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_sf_hf_128B, "V64iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_ub_hf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_ub_hf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_uh_hf, "V16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_uh_hf_128B, "V32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpy_sf_hf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpy_sf_hf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpy_sf_hf_acc, "V16iV16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpy_sf_hf_acc_128B, "V32iV32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmax_hf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmax_hf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmax_sf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmax_sf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmin_hf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmin_hf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmin_sf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmin_sf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vfneg_hf, "V16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vfneg_hf_128B, "V32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vfneg_sf, "V16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vfneg_sf_128B, "V32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf, "V64bV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf_128B, "V128bV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf_and, "V64bV64bV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf_and_128B, "V128bV128bV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf_or, "V64bV64bV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf_or_128B, "V128bV128bV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf_xor, "V64bV64bV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf_xor_128B, "V128bV128bV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf, "V64bV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf_128B, "V128bV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf_and, "V64bV64bV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf_and_128B, "V128bV128bV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf_or, "V64bV64bV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf_or_128B, "V128bV128bV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf_xor, "V64bV64bV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf_xor_128B, "V128bV128bV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmax_hf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmax_hf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmax_sf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmax_sf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmin_hf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmin_hf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmin_sf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmin_sf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_hf_hf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_hf_hf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_hf_hf_acc, "V16iV16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_hf_hf_acc_128B, "V32iV32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf16, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf16_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf16_hf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf16_hf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf16_mix_hf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf16_mix_hf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_hf, "V32iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_hf_128B, "V64iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_mix_hf, "V32iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_mix_hf_128B, "V64iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_qf16, "V32iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_qf16_128B, "V64iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_sf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_sf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_hf, "V32iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_hf_128B, "V64iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_hf_acc, "V32iV32iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_hf_acc_128B, "V64iV64iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_sf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_sf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_hf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_hf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_hf_hf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_hf_hf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf16, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf16_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf16_mix, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf16_mix_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf32, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf32_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf32_mix, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf32_mix_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf_128B, "V32iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf_hf, "V32iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf_hf_128B, "V64iV32iV32i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf_sf, "V16iV16iV16i", "", HVXV68) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf_sf_128B, "V32iV32iV32i", "", HVXV68) + +// V69 HVX Instructions. + +TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvuhubrndsat, "V16iV32iV16i", "", HVXV69) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvuhubrndsat_128B, "V32iV64iV32i", "", HVXV69) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvuhubsat, "V16iV32iV16i", "", HVXV69) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvuhubsat_128B, "V32iV64iV32i", "", HVXV69) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvwuhrndsat, "V16iV32iV16i", "", HVXV69) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvwuhrndsat_128B, "V32iV64iV32i", "", HVXV69) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvwuhsat, "V16iV32iV16i", "", HVXV69) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvwuhsat_128B, "V32iV64iV32i", "", HVXV69) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuhvs, "V16iV16iV16i", "", HVXV69) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuhvs_128B, "V32iV32iV32i", "", HVXV69) + +// V73 HVX Instructions. + +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf_bf, "V32iV16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf_bf_128B, "V64iV32iV32i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_h_hf, "V16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_h_hf_128B, "V32iV32i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_hf_h, "V16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_hf_h_128B, "V32iV32i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_sf_w, "V16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_sf_w_128B, "V32iV32i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_w_sf, "V16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_w_sf_128B, "V32iV32i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_bf_sf, "V16iV16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_bf_sf_128B, "V32iV32iV32i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf, "V64bV16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf_128B, "V128bV32iV32i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf_and, "V64bV64bV16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf_and_128B, "V128bV128bV32iV32i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf_or, "V64bV64bV16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf_or_128B, "V128bV128bV32iV32i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf_xor, "V64bV64bV16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf_xor_128B, "V128bV128bV32iV32i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmax_bf, "V16iV16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmax_bf_128B, "V32iV32iV32i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmin_bf, "V16iV16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmin_bf_128B, "V32iV32iV32i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_bf, "V32iV16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_bf_128B, "V64iV32iV32i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_bf_acc, "V32iV32iV16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_bf_acc_128B, "V64iV64iV32iV32i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf_bf, "V32iV16iV16i", "", HVXV73) +TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf_bf_128B, "V64iV32iV32i", "", HVXV73) diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsHexagonMapCustomDep.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsHexagonMapCustomDep.def index 93f560fc5adc..9390d54e0847 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsHexagonMapCustomDep.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsHexagonMapCustomDep.def @@ -8,199 +8,11 @@ // Automatically generated file, do not edit! //===----------------------------------------------------------------------===// -CUSTOM_BUILTIN_MAPPING(A2_add, 0) -CUSTOM_BUILTIN_MAPPING(A2_addi, 0) -CUSTOM_BUILTIN_MAPPING(A2_addp, 0) -CUSTOM_BUILTIN_MAPPING(A2_and, 0) -CUSTOM_BUILTIN_MAPPING(A2_andir, 0) -CUSTOM_BUILTIN_MAPPING(A2_neg, 0) -CUSTOM_BUILTIN_MAPPING(A2_not, 0) -CUSTOM_BUILTIN_MAPPING(A2_or, 0) -CUSTOM_BUILTIN_MAPPING(A2_orir, 0) -CUSTOM_BUILTIN_MAPPING(A2_sub, 0) -CUSTOM_BUILTIN_MAPPING(A2_subp, 0) -CUSTOM_BUILTIN_MAPPING(A2_subri, 0) -CUSTOM_BUILTIN_MAPPING(A2_sxtb, 0) -CUSTOM_BUILTIN_MAPPING(A2_sxth, 0) -CUSTOM_BUILTIN_MAPPING(A2_xor, 0) -CUSTOM_BUILTIN_MAPPING(A2_zxtb, 0) -CUSTOM_BUILTIN_MAPPING(A2_zxth, 0) -CUSTOM_BUILTIN_MAPPING(M2_dpmpyss_s0, 0) -CUSTOM_BUILTIN_MAPPING(M2_dpmpyuu_s0, 0) -CUSTOM_BUILTIN_MAPPING(M2_mpyi, 0) -CUSTOM_BUILTIN_MAPPING(M2_mpysmi, 0) -CUSTOM_BUILTIN_MAPPING(M2_mpyui, 0) -CUSTOM_BUILTIN_MAPPING(S2_asl_i_p, 0) -CUSTOM_BUILTIN_MAPPING(S2_asl_i_r, 0) -CUSTOM_BUILTIN_MAPPING(S2_asr_i_p, 0) -CUSTOM_BUILTIN_MAPPING(S2_asr_i_r, 0) -CUSTOM_BUILTIN_MAPPING(S2_lsr_i_p, 0) -CUSTOM_BUILTIN_MAPPING(S2_lsr_i_r, 0) -CUSTOM_BUILTIN_MAPPING(V6_pred_and, 64) -CUSTOM_BUILTIN_MAPPING(V6_pred_and_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_pred_and_n, 64) -CUSTOM_BUILTIN_MAPPING(V6_pred_and_n_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_pred_not, 64) -CUSTOM_BUILTIN_MAPPING(V6_pred_not_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_pred_or, 64) -CUSTOM_BUILTIN_MAPPING(V6_pred_or_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_pred_or_n, 64) -CUSTOM_BUILTIN_MAPPING(V6_pred_or_n_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_pred_scalar2, 64) -CUSTOM_BUILTIN_MAPPING(V6_pred_scalar2_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_pred_xor, 64) -CUSTOM_BUILTIN_MAPPING(V6_pred_xor_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vS32b_nqpred_ai, 64) -CUSTOM_BUILTIN_MAPPING(V6_vS32b_nqpred_ai_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vS32b_nt_nqpred_ai, 64) -CUSTOM_BUILTIN_MAPPING(V6_vS32b_nt_nqpred_ai_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vS32b_nt_qpred_ai, 64) -CUSTOM_BUILTIN_MAPPING(V6_vS32b_nt_qpred_ai_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vS32b_qpred_ai, 64) -CUSTOM_BUILTIN_MAPPING(V6_vS32b_qpred_ai_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vaddbnq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vaddbnq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vaddbq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vaddbq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vaddhnq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vaddhnq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vaddhq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vaddhq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vaddwnq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vaddwnq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vaddwq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vaddwq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vandqrt, 64) -CUSTOM_BUILTIN_MAPPING(V6_vandqrt_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vandqrt_acc, 64) -CUSTOM_BUILTIN_MAPPING(V6_vandqrt_acc_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vandvrt, 64) -CUSTOM_BUILTIN_MAPPING(V6_vandvrt_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vandvrt_acc, 64) -CUSTOM_BUILTIN_MAPPING(V6_vandvrt_acc_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_veqb, 64) -CUSTOM_BUILTIN_MAPPING(V6_veqb_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_veqb_and, 64) -CUSTOM_BUILTIN_MAPPING(V6_veqb_and_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_veqb_or, 64) -CUSTOM_BUILTIN_MAPPING(V6_veqb_or_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_veqb_xor, 64) -CUSTOM_BUILTIN_MAPPING(V6_veqb_xor_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_veqh, 64) -CUSTOM_BUILTIN_MAPPING(V6_veqh_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_veqh_and, 64) -CUSTOM_BUILTIN_MAPPING(V6_veqh_and_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_veqh_or, 64) -CUSTOM_BUILTIN_MAPPING(V6_veqh_or_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_veqh_xor, 64) -CUSTOM_BUILTIN_MAPPING(V6_veqh_xor_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_veqw, 64) -CUSTOM_BUILTIN_MAPPING(V6_veqw_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_veqw_and, 64) -CUSTOM_BUILTIN_MAPPING(V6_veqw_and_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_veqw_or, 64) -CUSTOM_BUILTIN_MAPPING(V6_veqw_or_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_veqw_xor, 64) -CUSTOM_BUILTIN_MAPPING(V6_veqw_xor_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtb, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtb_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtb_and, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtb_and_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtb_or, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtb_or_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtb_xor, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtb_xor_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgth, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgth_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgth_and, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgth_and_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgth_or, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgth_or_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgth_xor, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgth_xor_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtub, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtub_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtub_and, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtub_and_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtub_or, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtub_or_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtub_xor, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtub_xor_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtuh, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtuh_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtuh_and, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtuh_and_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtuh_or, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtuh_or_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtuh_xor, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtuh_xor_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtuw, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtuw_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtuw_and, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtuw_and_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtuw_or, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtuw_or_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtuw_xor, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtuw_xor_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtw, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtw_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtw_and, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtw_and_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtw_or, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtw_or_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgtw_xor, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgtw_xor_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vmux, 64) -CUSTOM_BUILTIN_MAPPING(V6_vmux_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vsubbnq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vsubbnq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vsubbq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vsubbq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vsubhnq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vsubhnq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vsubhq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vsubhq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vsubwnq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vsubwnq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vsubwq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vsubwq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vswap, 64) -CUSTOM_BUILTIN_MAPPING(V6_vswap_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_pred_scalar2v2, 64) -CUSTOM_BUILTIN_MAPPING(V6_pred_scalar2v2_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_shuffeqh, 64) -CUSTOM_BUILTIN_MAPPING(V6_shuffeqh_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_shuffeqw, 64) -CUSTOM_BUILTIN_MAPPING(V6_shuffeqw_128B, 128) CUSTOM_BUILTIN_MAPPING(V6_vaddcarry, 64) CUSTOM_BUILTIN_MAPPING(V6_vaddcarry_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vandnqrt, 64) -CUSTOM_BUILTIN_MAPPING(V6_vandnqrt_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vandnqrt_acc, 64) -CUSTOM_BUILTIN_MAPPING(V6_vandnqrt_acc_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vandvnqv, 64) -CUSTOM_BUILTIN_MAPPING(V6_vandvnqv_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vandvqv, 64) -CUSTOM_BUILTIN_MAPPING(V6_vandvqv_128B, 128) CUSTOM_BUILTIN_MAPPING(V6_vsubcarry, 64) CUSTOM_BUILTIN_MAPPING(V6_vsubcarry_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgathermhq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgathermhq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgathermhwq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgathermhwq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vgathermwq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vgathermwq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vprefixqb, 64) -CUSTOM_BUILTIN_MAPPING(V6_vprefixqb_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vprefixqh, 64) -CUSTOM_BUILTIN_MAPPING(V6_vprefixqh_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vprefixqw, 64) -CUSTOM_BUILTIN_MAPPING(V6_vprefixqw_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vscattermhq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vscattermhq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vscattermhwq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vscattermhwq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vscattermwq, 64) -CUSTOM_BUILTIN_MAPPING(V6_vscattermwq_128B, 128) -CUSTOM_BUILTIN_MAPPING(V6_vaddcarrysat, 64) -CUSTOM_BUILTIN_MAPPING(V6_vaddcarrysat_128B, 128) +CUSTOM_BUILTIN_MAPPING(V6_vaddcarryo, 64) +CUSTOM_BUILTIN_MAPPING(V6_vaddcarryo_128B, 128) +CUSTOM_BUILTIN_MAPPING(V6_vsubcarryo, 64) +CUSTOM_BUILTIN_MAPPING(V6_vsubcarryo_128B, 128) diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsLoongArch.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsLoongArch.def new file mode 100644 index 000000000000..95359a3fdc71 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsLoongArch.def @@ -0,0 +1,28 @@ +//==- BuiltinsLoongArch.def - LoongArch Builtin function database -- C++ -*-==// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the LoongArch-specific builtin function database. Users of +// this file must define the BUILTIN macro to make use of this information. +// +//===----------------------------------------------------------------------===// + +#if defined(BUILTIN) && !defined(TARGET_BUILTIN) +# define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) +#endif + +// Definition of LoongArch basic builtins. +#include "clang/Basic/BuiltinsLoongArchBase.def" + +// Definition of LSX builtins. +#include "clang/Basic/BuiltinsLoongArchLSX.def" + +// Definition of LASX builtins. +#include "clang/Basic/BuiltinsLoongArchLASX.def" + +#undef BUILTIN +#undef TARGET_BUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsLoongArchBase.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsLoongArchBase.def new file mode 100644 index 000000000000..a5a07c167908 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsLoongArchBase.def @@ -0,0 +1,58 @@ +//============------------ BuiltinsLoongArchBase.def -------------*- C++ -*-==// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the LoongArch-specific basic builtin function database. +// Users of this file must define the BUILTIN macro to make use of this +// information. +// +//===----------------------------------------------------------------------===// + +TARGET_BUILTIN(__builtin_loongarch_cacop_d, "vWiUWiWi", "nc", "64bit") +TARGET_BUILTIN(__builtin_loongarch_cacop_w, "viUii", "nc", "32bit") +TARGET_BUILTIN(__builtin_loongarch_dbar, "vIUi", "nc", "") +TARGET_BUILTIN(__builtin_loongarch_ibar, "vIUi", "nc", "") +TARGET_BUILTIN(__builtin_loongarch_movfcsr2gr, "UiIUi", "nc", "f") +TARGET_BUILTIN(__builtin_loongarch_movgr2fcsr, "vIUiUi", "nc", "f") +TARGET_BUILTIN(__builtin_loongarch_break, "vIUi", "nc", "") +TARGET_BUILTIN(__builtin_loongarch_syscall, "vIUi", "nc", "") +TARGET_BUILTIN(__builtin_loongarch_cpucfg, "UiUi", "nc", "") +TARGET_BUILTIN(__builtin_loongarch_asrtle_d, "vWiWi", "nc", "64bit") +TARGET_BUILTIN(__builtin_loongarch_asrtgt_d, "vWiWi", "nc", "64bit") + +TARGET_BUILTIN(__builtin_loongarch_crc_w_b_w, "iii", "nc", "64bit") +TARGET_BUILTIN(__builtin_loongarch_crc_w_h_w, "iii", "nc", "64bit") +TARGET_BUILTIN(__builtin_loongarch_crc_w_w_w, "iii", "nc", "64bit") +TARGET_BUILTIN(__builtin_loongarch_crc_w_d_w, "iWii", "nc", "64bit") +TARGET_BUILTIN(__builtin_loongarch_crcc_w_b_w, "iii", "nc", "64bit") +TARGET_BUILTIN(__builtin_loongarch_crcc_w_h_w, "iii", "nc", "64bit") +TARGET_BUILTIN(__builtin_loongarch_crcc_w_w_w, "iii", "nc", "64bit") +TARGET_BUILTIN(__builtin_loongarch_crcc_w_d_w, "iWii", "nc", "64bit") + +TARGET_BUILTIN(__builtin_loongarch_csrrd_w, "UiIUi", "nc", "") +TARGET_BUILTIN(__builtin_loongarch_csrrd_d, "UWiIUi", "nc", "64bit") +TARGET_BUILTIN(__builtin_loongarch_csrwr_w, "UiUiIUi", "nc", "") +TARGET_BUILTIN(__builtin_loongarch_csrwr_d, "UWiUWiIUi", "nc", "64bit") +TARGET_BUILTIN(__builtin_loongarch_csrxchg_w, "UiUiUiIUi", "nc", "") +TARGET_BUILTIN(__builtin_loongarch_csrxchg_d, "UWiUWiUWiIUi", "nc", "64bit") + +TARGET_BUILTIN(__builtin_loongarch_iocsrrd_b, "UiUi", "nc", "") +TARGET_BUILTIN(__builtin_loongarch_iocsrrd_h, "UiUi", "nc", "") +TARGET_BUILTIN(__builtin_loongarch_iocsrrd_w, "UiUi", "nc", "") +TARGET_BUILTIN(__builtin_loongarch_iocsrrd_d, "UWiUi", "nc", "64bit") +TARGET_BUILTIN(__builtin_loongarch_iocsrwr_b, "vUiUi", "nc", "") +TARGET_BUILTIN(__builtin_loongarch_iocsrwr_h, "vUiUi", "nc", "") +TARGET_BUILTIN(__builtin_loongarch_iocsrwr_w, "vUiUi", "nc", "") +TARGET_BUILTIN(__builtin_loongarch_iocsrwr_d, "vUWiUi", "nc", "64bit") + +TARGET_BUILTIN(__builtin_loongarch_lddir_d, "WiWiIUWi", "nc", "64bit") +TARGET_BUILTIN(__builtin_loongarch_ldpte_d, "vWiIUWi", "nc", "64bit") + +TARGET_BUILTIN(__builtin_loongarch_frecipe_s, "ff", "nc", "f,frecipe") +TARGET_BUILTIN(__builtin_loongarch_frecipe_d, "dd", "nc", "d,frecipe") +TARGET_BUILTIN(__builtin_loongarch_frsqrte_s, "ff", "nc", "f,frecipe") +TARGET_BUILTIN(__builtin_loongarch_frsqrte_d, "dd", "nc", "d,frecipe") diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsLoongArchLASX.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsLoongArchLASX.def new file mode 100644 index 000000000000..4cf51cc000f6 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsLoongArchLASX.def @@ -0,0 +1,988 @@ +//=BuiltinsLoongArchLASX.def - LoongArch Builtin function database -- C++ -*-=// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the LoongArch-specific LASX builtin function database. +// Users of this file must define the BUILTIN macro to make use of this +// information. +// +//===----------------------------------------------------------------------===// + +TARGET_BUILTIN(__builtin_lasx_xvadd_b, "V32cV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvadd_h, "V16sV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvadd_w, "V8iV8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvadd_d, "V4LLiV4LLiV4LLi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvadd_q, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsub_b, "V32cV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsub_h, "V16sV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsub_w, "V8iV8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsub_d, "V4LLiV4LLiV4LLi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsub_q, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvaddi_bu, "V32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddi_hu, "V16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddi_wu, "V8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddi_du, "V4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsubi_bu, "V32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsubi_hu, "V16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsubi_wu, "V8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsubi_du, "V4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvneg_b, "V32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvneg_h, "V16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvneg_w, "V8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvneg_d, "V4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsadd_b, "V32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsadd_h, "V16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsadd_w, "V8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsadd_d, "V4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsadd_bu, "V32UcV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsadd_hu, "V16UsV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsadd_wu, "V8UiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsadd_du, "V4ULLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvssub_b, "V32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssub_h, "V16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssub_w, "V8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssub_d, "V4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvssub_bu, "V32UcV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssub_hu, "V16UsV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssub_wu, "V8UiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssub_du, "V4ULLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvhaddw_h_b, "V16SsV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvhaddw_w_h, "V8SiV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvhaddw_d_w, "V4SLLiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvhaddw_q_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvhaddw_hu_bu, "V16UsV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvhaddw_wu_hu, "V8UiV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvhaddw_du_wu, "V4ULLiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvhaddw_qu_du, "V4ULLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvhsubw_h_b, "V16SsV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvhsubw_w_h, "V8SiV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvhsubw_d_w, "V4SLLiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvhsubw_q_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvhsubw_hu_bu, "V16UsV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvhsubw_wu_hu, "V8UiV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvhsubw_du_wu, "V4ULLiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvhsubw_qu_du, "V4ULLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvaddwev_h_b, "V16sV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddwev_w_h, "V8SiV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddwev_d_w, "V4LLiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddwev_q_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvaddwod_h_b, "V16sV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddwod_w_h, "V8SiV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddwod_d_w, "V4LLiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddwod_q_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsubwev_h_b, "V16sV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsubwev_w_h, "V8SiV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsubwev_d_w, "V4LLiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsubwev_q_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsubwod_h_b, "V16sV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsubwod_w_h, "V8SiV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsubwod_d_w, "V4LLiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsubwod_q_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvaddwev_h_bu, "V16sV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddwev_w_hu, "V8SiV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddwev_d_wu, "V4LLiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddwev_q_du, "V4LLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvaddwod_h_bu, "V16sV32UcV32Uc", "nc", "lasx") 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"V8SiV16UsV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddwev_d_wu_w, "V4LLiV8UiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddwev_q_du_d, "V4LLiV4ULLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvaddwod_h_bu_b, "V16sV32UcV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddwod_w_hu_h, "V8SiV16UsV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddwod_d_wu_w, "V4LLiV8UiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvaddwod_q_du_d, "V4LLiV4ULLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvavg_b, "V32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvavg_h, "V16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvavg_w, "V8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvavg_d, "V4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvavg_bu, "V32UcV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvavg_hu, "V16UsV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvavg_wu, "V8UiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvavg_du, "V4ULLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvavgr_b, "V32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvavgr_h, "V16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvavgr_w, "V8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvavgr_d, "V4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvavgr_bu, "V32UcV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvavgr_hu, "V16UsV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvavgr_wu, "V8UiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvavgr_du, "V4ULLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvabsd_b, "V32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvabsd_h, "V16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvabsd_w, "V8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvabsd_d, "V4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvabsd_bu, "V32UcV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvabsd_hu, "V16UsV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvabsd_wu, "V8UiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvabsd_du, "V4ULLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvadda_b, "V32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvadda_h, "V16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvadda_w, "V8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvadda_d, "V4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmax_b, "V32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmax_h, "V16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmax_w, "V8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmax_d, "V4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmaxi_b, "V32ScV32ScIi", "nc", "lasx") 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"V8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmin_d, "V4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmini_b, "V32ScV32ScIi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmini_h, "V16SsV16SsIi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmini_w, "V8SiV8SiIi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmini_d, "V4SLLiV4SLLiIi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmin_bu, "V32UcV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmin_hu, "V16UsV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmin_wu, "V8UiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmin_du, "V4ULLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmini_bu, "V32UcV32UcIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmini_hu, "V16UsV16UsIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmini_wu, "V8UiV8UiIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmini_du, "V4ULLiV4ULLiIUi", "nc", "lasx") + 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"V8SiV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwev_d_w, "V4LLiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwev_q_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmulwod_h_b, "V16sV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwod_w_h, "V8SiV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwod_d_w, "V4LLiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwod_q_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmulwev_h_bu, "V16sV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwev_w_hu, "V8SiV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwev_d_wu, "V4LLiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwev_q_du, "V4LLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmulwod_h_bu, "V16sV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwod_w_hu, "V8SiV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwod_d_wu, "V4LLiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwod_q_du, "V4LLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmulwev_h_bu_b, "V16sV32UcV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwev_w_hu_h, "V8SiV16UsV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwev_d_wu_w, "V4LLiV8UiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwev_q_du_d, "V4LLiV4ULLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmulwod_h_bu_b, "V16sV32UcV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwod_w_hu_h, "V8SiV16UsV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwod_d_wu_w, "V4LLiV8UiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmulwod_q_du_d, "V4LLiV4ULLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmadd_b, "V32ScV32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmadd_h, "V16SsV16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmadd_w, "V8SiV8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmadd_d, "V4SLLiV4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmsub_b, "V32ScV32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmsub_h, "V16SsV16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmsub_w, "V8SiV8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmsub_d, "V4SLLiV4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmaddwev_h_b, "V16sV16sV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwev_w_h, "V8SiV8SiV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwev_d_w, "V4LLiV4LLiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwev_q_d, "V4LLiV4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmaddwod_h_b, "V16sV16sV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwod_w_h, "V8SiV8SiV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwod_d_w, "V4LLiV4LLiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwod_q_d, "V4LLiV4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmaddwev_h_bu, "V16UsV16UsV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwev_w_hu, "V8UiV8UiV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwev_d_wu, "V4ULLiV4ULLiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwev_q_du, "V4ULLiV4ULLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmaddwod_h_bu, "V16UsV16UsV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwod_w_hu, "V8UiV8UiV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwod_d_wu, "V4ULLiV4ULLiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwod_q_du, "V4ULLiV4ULLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmaddwev_h_bu_b, "V16sV16sV32UcV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwev_w_hu_h, "V8SiV8SiV16UsV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwev_d_wu_w, "V4LLiV4LLiV8UiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwev_q_du_d, "V4LLiV4LLiV4ULLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmaddwod_h_bu_b, "V16sV16sV32UcV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwod_w_hu_h, "V8SiV8SiV16UsV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwod_d_wu_w, "V4LLiV4LLiV8UiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmaddwod_q_du_d, "V4LLiV4LLiV4ULLiV4LLi", "nc", "lasx") + + +TARGET_BUILTIN(__builtin_lasx_xvdiv_b, "V32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvdiv_h, "V16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvdiv_w, "V8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvdiv_d, "V4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvdiv_bu, "V32UcV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvdiv_hu, "V16UsV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvdiv_wu, "V8UiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvdiv_du, "V4ULLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmod_b, "V32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmod_h, "V16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmod_w, "V8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmod_d, "V4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmod_bu, "V32UcV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmod_hu, "V16UsV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmod_wu, "V8UiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmod_du, "V4ULLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsat_b, "V32ScV32ScIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsat_h, "V16SsV16SsIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsat_w, "V8SiV8SiIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsat_d, "V4SLLiV4SLLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsat_bu, "V32UcV32UcIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsat_hu, "V16UsV16UsIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsat_wu, "V8UiV8UiIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsat_du, "V4ULLiV4ULLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvexth_h_b, "V16sV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvexth_w_h, "V8SiV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvexth_d_w, "V4LLiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvexth_q_d, "V4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvexth_hu_bu, "V16UsV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvexth_wu_hu, "V8UiV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvexth_du_wu, "V4ULLiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvexth_qu_du, "V4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_vext2xv_h_b, "V16sV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_vext2xv_w_b, "V8SiV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_vext2xv_d_b, "V4LLiV32c", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_vext2xv_w_h, "V8SiV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_vext2xv_d_h, "V4LLiV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_vext2xv_d_w, "V4LLiV8Si", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_vext2xv_hu_bu, "V16sV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_vext2xv_wu_bu, "V8SiV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_vext2xv_du_bu, "V4LLiV32c", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_vext2xv_wu_hu, "V8SiV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_vext2xv_du_hu, "V4LLiV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_vext2xv_du_wu, "V4LLiV8Si", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsigncov_b, "V32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsigncov_h, "V16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsigncov_w, "V8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsigncov_d, "V4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmskltz_b, "V32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmskltz_h, "V16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmskltz_w, "V8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmskltz_d, "V4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvmskgez_b, "V32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvmsknz_b, "V16sV16s", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvldi, "V4LLiIi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvrepli_b, "V32cIi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvrepli_h, "V16sIi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvrepli_w, "V8iIi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvrepli_d, "V4LLiIi", "nc", "lasx") + + +TARGET_BUILTIN(__builtin_lasx_xvand_v, "V32UcV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvor_v, "V32UcV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvxor_v, "V32cV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvnor_v, "V32UcV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvandn_v, "V32UcV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvorn_v, "V32ScV32ScV32Sc", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvandi_b, "V32UcV32UcIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvori_b, "V32UcV32UcIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvxori_b, "V32UcV32UcIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvnori_b, "V32UcV32UcIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsll_b, "V32cV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsll_h, "V16sV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsll_w, "V8iV8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsll_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvslli_b, "V32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslli_h, "V16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslli_w, "V8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslli_d, "V4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsrl_b, "V32cV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrl_h, "V16sV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrl_w, "V8iV8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrl_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsrli_b, "V32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrli_h, "V16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrli_w, "V8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrli_d, "V4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsra_b, "V32cV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsra_h, "V16sV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsra_w, "V8iV8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsra_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsrai_b, "V32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrai_h, "V16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrai_w, "V8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrai_d, "V4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvrotr_b, "V32cV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvrotr_h, "V16sV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvrotr_w, "V8iV8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvrotr_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvrotri_b, "V32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvrotri_h, "V16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvrotri_w, "V8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvrotri_d, "V4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsllwil_h_b, "V16sV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsllwil_w_h, "V8SiV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsllwil_d_w, "V4LLiV8SiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvextl_q_d, "V4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsllwil_hu_bu, "V16UsV32UcIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsllwil_wu_hu, "V8UiV16UsIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsllwil_du_wu, "V4ULLiV8UiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvextl_qu_du, "V4LLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsrlr_b, "V32cV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrlr_h, "V16sV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrlr_w, "V8iV8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrlr_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsrlri_b, "V32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrlri_h, "V16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrlri_w, "V8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrlri_d, "V4LLiV4LLiIUi", "nc", "lasx") + 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"V8SiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsrlni_b_h, "V32cV32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrlni_h_w, "V16sV16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrlni_w_d, "V8iV8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrlni_d_q, "V4LLiV4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsrani_b_h, "V32cV32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrani_h_w, "V16sV16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrani_w_d, "V8iV8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrani_d_q, "V4LLiV4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsrlrn_b_h, "V32ScV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrlrn_h_w, "V16sV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrlrn_w_d, "V8SiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsrarn_b_h, "V32ScV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrarn_h_w, "V16sV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrarn_w_d, "V8SiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsrlrni_b_h, "V32cV32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrlrni_h_w, "V16sV16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrlrni_w_d, "V8iV8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrlrni_d_q, "V4LLiV4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsrarni_b_h, "V32cV32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrarni_h_w, "V16sV16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrarni_w_d, "V8iV8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsrarni_d_q, "V4LLiV4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvssrln_b_h, "V32ScV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrln_h_w, "V16sV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrln_w_d, "V8SiV4LLiV4LLi", "nc", "lasx") + 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"lasx") + +TARGET_BUILTIN(__builtin_lasx_xvssrani_b_h, "V32cV32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrani_h_w, "V16sV16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrani_w_d, "V8iV8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrani_d_q, "V4LLiV4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvssrlrni_bu_h, "V32cV32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrlrni_hu_w, "V16sV16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrlrni_wu_d, "V8iV8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrlrni_du_q, "V4LLiV4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvssrani_bu_h, "V32cV32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrani_hu_w, "V16sV16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrani_wu_d, "V8iV8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrani_du_q, "V4LLiV4LLiV4LLiIUi", "nc", "lasx") + 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"nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrlrni_h_w, "V16sV16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrlrni_w_d, "V8iV8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrlrni_d_q, "V4LLiV4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvssrarni_b_h, "V32cV32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrarni_h_w, "V16sV16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrarni_w_d, "V8iV8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrarni_d_q, "V4LLiV4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvssrlni_bu_h, "V32cV32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrlni_hu_w, "V16sV16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrlni_wu_d, "V8iV8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvssrlni_du_q, "V4LLiV4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvssrarni_bu_h, "V32cV32cV32cIUi", "nc", "lasx") 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"lasx") +TARGET_BUILTIN(__builtin_lasx_xvfmsub_d, "V4dV4dV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfnmadd_s, "V8fV8fV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfnmadd_d, "V4dV4dV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfnmsub_s, "V8fV8fV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfnmsub_d, "V4dV4dV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfmax_s, "V8fV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfmax_d, "V4dV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfmin_s, "V8fV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfmin_d, "V4dV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfmaxa_s, "V8fV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfmaxa_d, "V4dV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfmina_s, "V8fV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfmina_d, "V4dV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvflogb_s, "V8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvflogb_d, "V4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfclass_s, "V8iV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfclass_d, "V4LLiV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfsqrt_s, "V8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfsqrt_d, "V4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfrecip_s, "V8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfrecip_d, "V4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfrecipe_s, "V8fV8f", "nc", "lasx,frecipe") +TARGET_BUILTIN(__builtin_lasx_xvfrecipe_d, "V4dV4d", "nc", "lasx,frecipe") + +TARGET_BUILTIN(__builtin_lasx_xvfrsqrt_s, "V8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfrsqrt_d, "V4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfrsqrte_s, "V8fV8f", "nc", "lasx,frecipe") +TARGET_BUILTIN(__builtin_lasx_xvfrsqrte_d, "V4dV4d", "nc", "lasx,frecipe") + +TARGET_BUILTIN(__builtin_lasx_xvfcvtl_s_h, "V8fV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcvth_s_h, "V8fV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcvtl_d_s, "V4dV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcvth_d_s, "V4dV8f", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcvt_h_s, "V16sV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcvt_s_d, "V8fV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfrintrne_s, "V8SiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfrintrne_d, "V4LLiV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfrintrz_s, "V8SiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfrintrz_d, "V4LLiV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfrintrp_s, "V8SiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfrintrp_d, "V4LLiV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfrintrm_s, "V8SiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfrintrm_d, "V4LLiV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfrint_s, "V8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfrint_d, "V4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvftintrne_w_s, "V8SiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftintrne_l_d, "V4LLiV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvftintrz_w_s, "V8SiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftintrz_l_d, "V4LLiV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvftintrp_w_s, "V8SiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftintrp_l_d, "V4LLiV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvftintrm_w_s, "V8SiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftintrm_l_d, "V4LLiV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvftint_w_s, "V8SiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftint_l_d, "V4SLLiV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvftintrz_wu_s, "V8UiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftintrz_lu_d, "V4ULLiV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvftint_wu_s, "V8UiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftint_lu_d, "V4ULLiV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvftintrne_w_d, "V8SiV4dV4d", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftintrz_w_d, "V8SiV4dV4d", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftintrp_w_d, "V8SiV4dV4d", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftintrm_w_d, "V8SiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvftint_w_d, "V8SiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvftintrnel_l_s, "V4LLiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftintrneh_l_s, "V4LLiV8f", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvftintrzl_l_s, "V4LLiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftintrzh_l_s, "V4LLiV8f", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvftintrpl_l_s, "V4LLiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftintrph_l_s, "V4LLiV8f", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvftintrml_l_s, "V4LLiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftintrmh_l_s, "V4LLiV8f", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvftintl_l_s, "V4LLiV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvftinth_l_s, "V4LLiV8f", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvffint_s_w, "V8fV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvffint_d_l, "V4dV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvffint_s_wu, "V8fV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvffint_d_lu, "V4dV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvffintl_d_w, "V4dV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvffinth_d_w, "V4dV8Si", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvffint_s_l, "V8fV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvseq_b, "V32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvseq_h, "V16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvseq_w, "V8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvseq_d, "V4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvseqi_b, "V32ScV32ScISi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvseqi_h, "V16SsV16SsISi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvseqi_w, "V8SiV8SiISi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvseqi_d, "V4SLLiV4SLLiISi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsle_b, "V32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsle_h, "V16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsle_w, "V8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsle_d, "V4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvslei_b, "V32ScV32ScISi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslei_h, "V16SsV16SsISi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslei_w, "V8SiV8SiISi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslei_d, "V4SLLiV4SLLiISi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvsle_bu, "V32ScV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsle_hu, "V16SsV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsle_wu, "V8SiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvsle_du, "V4SLLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvslei_bu, "V32ScV32UcIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslei_hu, "V16SsV16UsIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslei_wu, "V8SiV8UiIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslei_du, "V4SLLiV4ULLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvslt_b, "V32ScV32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslt_h, "V16SsV16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslt_w, "V8SiV8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslt_d, "V4SLLiV4SLLiV4SLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvslti_b, "V32ScV32ScISi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslti_h, "V16SsV16SsISi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslti_w, "V8SiV8SiISi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslti_d, "V4SLLiV4SLLiISi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvslt_bu, "V32ScV32UcV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslt_hu, "V16SsV16UsV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslt_wu, "V8SiV8UiV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslt_du, "V4SLLiV4ULLiV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvslti_bu, "V32ScV32UcIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslti_hu, "V16SsV16UsIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslti_wu, "V8SiV8UiIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvslti_du, "V4SLLiV4ULLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_caf_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_caf_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cun_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cun_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_ceq_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_ceq_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cueq_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cueq_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_clt_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_clt_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cult_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cult_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cle_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cle_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cule_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cule_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cne_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cne_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cor_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cor_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cune_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_cune_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_saf_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_saf_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sun_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sun_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_seq_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_seq_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sueq_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sueq_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_slt_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_slt_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sult_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sult_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sle_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sle_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sule_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sule_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sne_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sne_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sor_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sor_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sune_s, "V8SiV8fV8f", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvfcmp_sune_d, "V4SLLiV4dV4d", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvbitsel_v, "V32UcV32UcV32UcV32Uc", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvbitseli_b, "V32UcV32UcV32UcIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvreplgr2vr_b, "V32Sci", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvreplgr2vr_h, "V16Ssi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvreplgr2vr_w, "V8Sii", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvreplgr2vr_d, "V4SLLiLLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvinsgr2vr_w, "V8SiV8SiiIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvinsgr2vr_d, "V4SLLiV4SLLiLLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvpickve2gr_w, "iV8SiIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpickve2gr_d, "LLiV4SLLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvpickve2gr_wu, "iV8UiIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpickve2gr_du, "LLiV4ULLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvreplve_b, "V32cV32cUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvreplve_h, "V16sV16sUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvreplve_w, "V8iV8iUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvreplve_d, "V4LLiV4LLiUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvrepl128vei_b, "V32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvrepl128vei_h, "V16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvrepl128vei_w, "V8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvrepl128vei_d, "V4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvreplve0_b, "V32ScV32Sc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvreplve0_h, "V16SsV16Ss", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvreplve0_w, "V8SiV8Si", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvreplve0_d, "V4SLLiV4SLLi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvreplve0_q, "V32ScV32Sc", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvinsve0_w, "V8iV8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvinsve0_d, "V4LLiV4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvpickve_w, "V8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpickve_d, "V4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvpickve_w_f, "V8fV8fIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpickve_d_f, "V4dV4dIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvbsll_v, "V32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvbsrl_v, "V32cV32cIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvpackev_b, "V32cV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpackev_h, "V16sV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpackev_w, "V8iV8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpackev_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvpackod_b, "V32cV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpackod_h, "V16sV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpackod_w, "V8iV8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpackod_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvpickev_b, "V32cV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpickev_h, "V16sV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpickev_w, "V8iV8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpickev_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvpickod_b, "V32cV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpickod_h, "V16sV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpickod_w, "V8iV8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpickod_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvilvl_b, "V32cV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvilvl_h, "V16sV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvilvl_w, "V8iV8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvilvl_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvilvh_b, "V32cV32cV32c", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvilvh_h, "V16sV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvilvh_w, "V8iV8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvilvh_d, "V4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvshuf_b, "V32UcV32UcV32UcV32Uc", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvshuf_h, "V16sV16sV16sV16s", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvshuf_w, "V8iV8iV8iV8i", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvshuf_d, "V4LLiV4LLiV4LLiV4LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvperm_w, "V8iV8iV8i", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvshuf4i_b, "V32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvshuf4i_h, "V16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvshuf4i_w, "V8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvshuf4i_d, "V4LLiV4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvpermi_w, "V8iV8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpermi_d, "V4LLiV4LLiIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvpermi_q, "V32cV32cV32cIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvextrins_b, "V32cV32cV32cIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvextrins_h, "V16sV16sV16sIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvextrins_w, "V8iV8iV8iIUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvextrins_d, "V4LLiV4LLiV4LLiIUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvld, "V32ScvC*Ii", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvst, "vV32Scv*Ii", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvldx, "V32ScvC*LLi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvstx, "vV32Scv*LLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvldrepl_b, "V32cvC*Ii", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvldrepl_h, "V16svC*Ii", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvldrepl_w, "V8ivC*Ii", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvldrepl_d, "V4LLivC*Ii", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xvstelm_b, "vV32Scv*IiUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvstelm_h, "vV16Ssv*IiUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvstelm_w, "vV8Siv*IiUi", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xvstelm_d, "vV4SLLiv*IiUi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xbz_v, "iV32Uc", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xbnz_v, "iV32Uc", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xbz_b, "iV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xbz_h, "iV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xbz_w, "iV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xbz_d, "iV4ULLi", "nc", "lasx") + +TARGET_BUILTIN(__builtin_lasx_xbnz_b, "iV32Uc", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xbnz_h, "iV16Us", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xbnz_w, "iV8Ui", "nc", "lasx") +TARGET_BUILTIN(__builtin_lasx_xbnz_d, "iV4ULLi", "nc", "lasx") diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsLoongArchLSX.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsLoongArchLSX.def new file mode 100644 index 000000000000..c90f4dc5458f --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsLoongArchLSX.def @@ -0,0 +1,959 @@ +//=============------------- BuiltinsLoongArchLSX.def --------------- C++ -*-=// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the LoongArch-specific LSX builtin function database. +// Users of this file must define the BUILTIN macro to make use of this +// information. +// +//===----------------------------------------------------------------------===// + +TARGET_BUILTIN(__builtin_lsx_vadd_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vadd_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vadd_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vadd_d, "V2LLiV2LLiV2LLi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vadd_q, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsub_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsub_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsub_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsub_d, "V2LLiV2LLiV2LLi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsub_q, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vaddi_bu, "V16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddi_hu, "V8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddi_wu, "V4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddi_du, "V2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsubi_bu, "V16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubi_hu, "V8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubi_wu, "V4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubi_du, "V2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vneg_b, "V16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vneg_h, "V8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vneg_w, "V4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vneg_d, "V2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsadd_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsadd_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsadd_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsadd_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsadd_bu, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsadd_hu, "V8UsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsadd_wu, "V4UiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsadd_du, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssub_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssub_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssub_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssub_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssub_bu, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssub_hu, "V8UsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssub_wu, "V4UiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssub_du, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vhaddw_h_b, "V8SsV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vhaddw_w_h, "V4SiV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vhaddw_d_w, "V2SLLiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vhaddw_q_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vhaddw_hu_bu, "V8UsV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vhaddw_wu_hu, "V4UiV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vhaddw_du_wu, "V2ULLiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vhaddw_qu_du, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vhsubw_h_b, "V8SsV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vhsubw_w_h, "V4SiV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vhsubw_d_w, "V2SLLiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vhsubw_q_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vhsubw_hu_bu, "V8UsV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vhsubw_wu_hu, "V4UiV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vhsubw_du_wu, "V2ULLiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vhsubw_qu_du, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vaddwev_h_b, "V8sV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwev_w_h, "V4SiV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwev_d_w, "V2LLiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwev_q_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vaddwod_h_b, "V8sV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwod_w_h, "V4SiV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwod_d_w, "V2LLiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwod_q_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsubwev_h_b, "V8sV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubwev_w_h, "V4SiV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubwev_d_w, "V2LLiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubwev_q_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsubwod_h_b, "V8sV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubwod_w_h, "V4SiV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubwod_d_w, "V2LLiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubwod_q_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vaddwev_h_bu, "V8sV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwev_w_hu, "V4SiV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwev_d_wu, "V2LLiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwev_q_du, "V2LLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vaddwod_h_bu, "V8sV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwod_w_hu, "V4SiV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwod_d_wu, "V2LLiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwod_q_du, "V2LLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsubwev_h_bu, "V8sV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubwev_w_hu, "V4SiV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubwev_d_wu, "V2LLiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubwev_q_du, "V2LLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsubwod_h_bu, "V8sV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubwod_w_hu, "V4SiV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubwod_d_wu, "V2LLiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsubwod_q_du, "V2LLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vaddwev_h_bu_b, "V8sV16UcV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwev_w_hu_h, "V4SiV8UsV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwev_d_wu_w, "V2LLiV4UiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwev_q_du_d, "V2LLiV2ULLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vaddwod_h_bu_b, "V8sV16UcV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwod_w_hu_h, "V4SiV8UsV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwod_d_wu_w, "V2LLiV4UiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vaddwod_q_du_d, "V2LLiV2ULLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vavg_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vavg_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vavg_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vavg_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vavg_bu, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vavg_hu, "V8UsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vavg_wu, "V4UiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vavg_du, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vavgr_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vavgr_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vavgr_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vavgr_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vavgr_bu, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vavgr_hu, "V8UsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vavgr_wu, "V4UiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vavgr_du, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vabsd_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vabsd_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vabsd_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vabsd_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vabsd_bu, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vabsd_hu, "V8UsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vabsd_wu, "V4UiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vabsd_du, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vadda_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vadda_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vadda_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vadda_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmax_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmax_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmax_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmax_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmaxi_b, "V16ScV16ScIi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaxi_h, "V8SsV8SsIi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaxi_w, "V4SiV4SiIi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaxi_d, "V2SLLiV2SLLiIi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmax_bu, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmax_hu, "V8UsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmax_wu, "V4UiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmax_du, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmaxi_bu, "V16UcV16UcIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaxi_hu, "V8UsV8UsIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaxi_wu, "V4UiV4UiIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaxi_du, "V2ULLiV2ULLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmin_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmin_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmin_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmin_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmini_b, "V16ScV16ScIi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmini_h, "V8SsV8SsIi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmini_w, "V4SiV4SiIi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmini_d, "V2SLLiV2SLLiIi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmin_bu, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmin_hu, "V8UsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmin_wu, "V4UiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmin_du, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmini_bu, "V16UcV16UcIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmini_hu, "V8UsV8UsIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmini_wu, "V4UiV4UiIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmini_du, "V2ULLiV2ULLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmul_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmul_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmul_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmul_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmuh_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmuh_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmuh_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmuh_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmuh_bu, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmuh_hu, "V8UsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmuh_wu, "V4UiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmuh_du, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmulwev_h_b, "V8sV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwev_w_h, "V4SiV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwev_d_w, "V2LLiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwev_q_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmulwod_h_b, "V8sV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwod_w_h, "V4SiV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwod_d_w, "V2LLiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwod_q_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmulwev_h_bu, "V8sV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwev_w_hu, "V4SiV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwev_d_wu, "V2LLiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwev_q_du, "V2LLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmulwod_h_bu, "V8sV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwod_w_hu, "V4SiV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwod_d_wu, "V2LLiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwod_q_du, "V2LLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmulwev_h_bu_b, "V8sV16UcV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwev_w_hu_h, "V4SiV8UsV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwev_d_wu_w, "V2LLiV4UiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwev_q_du_d, "V2LLiV2ULLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmulwod_h_bu_b, "V8sV16UcV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwod_w_hu_h, "V4SiV8UsV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwod_d_wu_w, "V2LLiV4UiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmulwod_q_du_d, "V2LLiV2ULLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmadd_b, "V16ScV16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmadd_h, "V8SsV8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmadd_w, "V4SiV4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmadd_d, "V2SLLiV2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmsub_b, "V16ScV16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmsub_h, "V8SsV8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmsub_w, "V4SiV4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmsub_d, "V2SLLiV2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmaddwev_h_b, "V8sV8sV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwev_w_h, "V4SiV4SiV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwev_d_w, "V2LLiV2LLiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwev_q_d, "V2LLiV2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmaddwod_h_b, "V8sV8sV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwod_w_h, "V4SiV4SiV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwod_d_w, "V2LLiV2LLiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwod_q_d, "V2LLiV2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmaddwev_h_bu, "V8UsV8UsV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwev_w_hu, "V4UiV4UiV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwev_d_wu, "V2ULLiV2ULLiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwev_q_du, "V2ULLiV2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmaddwod_h_bu, "V8UsV8UsV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwod_w_hu, "V4UiV4UiV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwod_d_wu, "V2ULLiV2ULLiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwod_q_du, "V2ULLiV2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmaddwev_h_bu_b, "V8sV8sV16UcV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwev_w_hu_h, "V4SiV4SiV8UsV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwev_d_wu_w, "V2LLiV2LLiV4UiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwev_q_du_d, "V2LLiV2LLiV2ULLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmaddwod_h_bu_b, "V8sV8sV16UcV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwod_w_hu_h, "V4SiV4SiV8UsV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwod_d_wu_w, "V2LLiV2LLiV4UiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmaddwod_q_du_d, "V2LLiV2LLiV2ULLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vdiv_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vdiv_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vdiv_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vdiv_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vdiv_bu, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vdiv_hu, "V8UsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vdiv_wu, "V4UiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vdiv_du, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmod_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmod_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmod_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmod_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + + +TARGET_BUILTIN(__builtin_lsx_vmod_bu, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmod_hu, "V8UsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmod_wu, "V4UiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmod_du, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsat_b, "V16ScV16ScIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsat_h, "V8SsV8SsIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsat_w, "V4SiV4SiIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsat_d, "V2SLLiV2SLLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsat_bu, "V16UcV16UcIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsat_hu, "V8UsV8UsIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsat_wu, "V4UiV4UiIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsat_du, "V2ULLiV2ULLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vexth_h_b, "V8sV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vexth_w_h, "V4SiV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vexth_d_w, "V2LLiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vexth_q_d, "V2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vexth_hu_bu, "V8UsV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vexth_wu_hu, "V4UiV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vexth_du_wu, "V2ULLiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vexth_qu_du, "V2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsigncov_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsigncov_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsigncov_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsigncov_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmskltz_b, "V16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmskltz_h, "V8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmskltz_w, "V4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmskltz_d, "V2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vmskgez_b, "V16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vmsknz_b, "V8sV8s", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vldi, "V2LLiIi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vrepli_b, "V16cIi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vrepli_h, "V8sIi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vrepli_w, "V4iIi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vrepli_d, "V2LLiIi", "nc", "lsx") + + +TARGET_BUILTIN(__builtin_lsx_vand_v, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vor_v, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vxor_v, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vnor_v, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vandn_v, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vorn_v, "V16ScV16ScV16Sc", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vandi_b, "V16UcV16UcIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vori_b, "V16UcV16UcIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vxori_b, "V16UcV16UcIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vnori_b, "V16UcV16UcIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsll_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsll_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsll_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsll_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vslli_b, "V16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslli_h, "V8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslli_w, "V4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslli_d, "V2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsrl_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrl_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrl_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrl_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsrli_b, "V16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrli_h, "V8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrli_w, "V4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrli_d, "V2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsra_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsra_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsra_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsra_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsrai_b, "V16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrai_h, "V8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrai_w, "V4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrai_d, "V2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vrotr_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vrotr_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vrotr_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vrotr_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vrotri_b, "V16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vrotri_h, "V8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vrotri_w, "V4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vrotri_d, "V2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsllwil_h_b, "V8sV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsllwil_w_h, "V4SiV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsllwil_d_w, "V2LLiV4SiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vextl_q_d, "V2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsllwil_hu_bu, "V8UsV16UcIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsllwil_wu_hu, "V4UiV8UsIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsllwil_du_wu, "V2ULLiV4UiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vextl_qu_du, "V2LLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsrlr_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrlr_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrlr_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrlr_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsrlri_b, "V16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrlri_h, "V8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrlri_w, "V4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrlri_d, "V2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsrar_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrar_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrar_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrar_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsrari_b, "V16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrari_h, "V8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrari_w, "V4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrari_d, "V2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsrln_b_h, "V16ScV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrln_h_w, "V8sV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrln_w_d, "V4SiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsran_b_h, "V16ScV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsran_h_w, "V8sV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsran_w_d, "V4SiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsrlni_b_h, "V16cV16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrlni_h_w, "V8sV8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrlni_w_d, "V4iV4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrlni_d_q, "V2LLiV2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsrani_b_h, "V16cV16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrani_h_w, "V8sV8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrani_w_d, "V4iV4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrani_d_q, "V2LLiV2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsrlrn_b_h, "V16ScV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrlrn_h_w, "V8sV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrlrn_w_d, "V4SiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsrarn_b_h, "V16ScV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrarn_h_w, "V8sV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrarn_w_d, "V4SiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsrlrni_b_h, "V16cV16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrlrni_h_w, "V8sV8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrlrni_w_d, "V4iV4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrlrni_d_q, "V2LLiV2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsrarni_b_h, "V16cV16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrarni_h_w, "V8sV8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrarni_w_d, "V4iV4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsrarni_d_q, "V2LLiV2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssrln_b_h, "V16ScV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrln_h_w, "V8sV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrln_w_d, "V4SiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssran_b_h, "V16ScV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssran_h_w, "V8sV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssran_w_d, "V4SiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssrln_bu_h, "V16UcV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrln_hu_w, "V8UsV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrln_wu_d, "V4UiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssran_bu_h, "V16UcV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssran_hu_w, "V8UsV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssran_wu_d, "V4UiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssrlni_b_h, "V16cV16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlni_h_w, "V8sV8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlni_w_d, "V4iV4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlni_d_q, "V2LLiV2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssrani_b_h, "V16cV16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrani_h_w, "V8sV8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrani_w_d, "V4iV4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrani_d_q, "V2LLiV2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssrlrni_bu_h, "V16cV16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlrni_hu_w, "V8sV8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlrni_wu_d, "V4iV4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlrni_du_q, "V2LLiV2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssrani_bu_h, "V16cV16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrani_hu_w, "V8sV8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrani_wu_d, "V4iV4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrani_du_q, "V2LLiV2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssrlrn_b_h, "V16ScV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlrn_h_w, "V8sV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlrn_w_d, "V4SiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssrarn_b_h, "V16ScV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrarn_h_w, "V8sV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrarn_w_d, "V4SiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssrlrn_bu_h, "V16UcV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlrn_hu_w, "V8UsV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlrn_wu_d, "V4UiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssrarn_bu_h, "V16UcV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrarn_hu_w, "V8UsV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrarn_wu_d, "V4UiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssrlrni_b_h, "V16cV16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlrni_h_w, "V8sV8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlrni_w_d, "V4iV4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlrni_d_q, "V2LLiV2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssrarni_b_h, "V16cV16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrarni_h_w, "V8sV8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrarni_w_d, "V4iV4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrarni_d_q, "V2LLiV2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssrlni_bu_h, "V16cV16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlni_hu_w, "V8sV8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlni_wu_d, "V4iV4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrlni_du_q, "V2LLiV2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vssrarni_bu_h, "V16cV16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrarni_hu_w, "V8sV8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrarni_wu_d, "V4iV4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vssrarni_du_q, "V2LLiV2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vclo_b, "V16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vclo_h, "V8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vclo_w, "V4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vclo_d, "V2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vclz_b, "V16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vclz_h, "V8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vclz_w, "V4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vclz_d, "V2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vpcnt_b, "V16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpcnt_h, "V8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpcnt_w, "V4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpcnt_d, "V2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vbitclr_b, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitclr_h, "V8UsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitclr_w, "V4UiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitclr_d, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vbitclri_b, "V16UcV16UcIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitclri_h, "V8UsV8UsIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitclri_w, "V4UiV4UiIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitclri_d, "V2ULLiV2ULLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vbitset_b, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitset_h, "V8UsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitset_w, "V4UiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitset_d, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vbitseti_b, "V16UcV16UcIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitseti_h, "V8UsV8UsIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitseti_w, "V4UiV4UiIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitseti_d, "V2ULLiV2ULLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vbitrev_b, "V16UcV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitrev_h, "V8UsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitrev_w, "V4UiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitrev_d, "V2ULLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vbitrevi_b, "V16UcV16UcIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitrevi_h, "V8UsV8UsIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitrevi_w, "V4UiV4UiIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbitrevi_d, "V2ULLiV2ULLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfrstp_b, "V16ScV16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfrstp_h, "V8SsV8SsV8SsV8Ss", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfrstpi_b, "V16cV16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfrstpi_h, "V8sV8sV8sIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfadd_s, "V4fV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfadd_d, "V2dV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfsub_s, "V4fV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfsub_d, "V2dV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfmul_s, "V4fV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfmul_d, "V2dV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfdiv_s, "V4fV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfdiv_d, "V2dV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfmadd_s, "V4fV4fV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfmadd_d, "V2dV2dV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfmsub_s, "V4fV4fV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfmsub_d, "V2dV2dV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfnmadd_s, "V4fV4fV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfnmadd_d, "V2dV2dV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfnmsub_s, "V4fV4fV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfnmsub_d, "V2dV2dV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfmax_s, "V4fV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfmax_d, "V2dV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfmin_s, "V4fV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfmin_d, "V2dV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfmaxa_s, "V4fV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfmaxa_d, "V2dV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfmina_s, "V4fV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfmina_d, "V2dV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vflogb_s, "V4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vflogb_d, "V2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfclass_s, "V4iV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfclass_d, "V2LLiV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfsqrt_s, "V4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfsqrt_d, "V2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfrecip_s, "V4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfrecip_d, "V2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfrecipe_s, "V4fV4f", "nc", "lsx,frecipe") +TARGET_BUILTIN(__builtin_lsx_vfrecipe_d, "V2dV2d", "nc", "lsx,frecipe") + +TARGET_BUILTIN(__builtin_lsx_vfrsqrt_s, "V4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfrsqrt_d, "V2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfrsqrte_s, "V4fV4f", "nc", "lsx,frecipe") +TARGET_BUILTIN(__builtin_lsx_vfrsqrte_d, "V2dV2d", "nc", "lsx,frecipe") + +TARGET_BUILTIN(__builtin_lsx_vfcvtl_s_h, "V4fV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcvtl_d_s, "V2dV4f", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcvth_s_h, "V4fV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcvth_d_s, "V2dV4f", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcvt_h_s, "V8sV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcvt_s_d, "V4fV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfrintrne_s, "V4SiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfrintrne_d, "V2LLiV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfrintrz_s, "V4SiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfrintrz_d, "V2LLiV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfrintrp_s, "V4SiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfrintrp_d, "V2LLiV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfrintrm_s, "V4SiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfrintrm_d, "V2LLiV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfrint_s, "V4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfrint_d, "V2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vftintrne_w_s, "V4SiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftintrne_l_d, "V2LLiV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vftintrz_w_s, "V4SiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftintrz_l_d, "V2LLiV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vftintrp_w_s, "V4SiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftintrp_l_d, "V2LLiV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vftintrm_w_s, "V4SiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftintrm_l_d, "V2LLiV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vftint_w_s, "V4SiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftint_l_d, "V2SLLiV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vftintrz_wu_s, "V4UiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftintrz_lu_d, "V2ULLiV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vftint_wu_s, "V4UiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftint_lu_d, "V2ULLiV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vftintrne_w_d, "V4SiV2dV2d", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftintrz_w_d, "V4SiV2dV2d", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftintrp_w_d, "V4SiV2dV2d", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftintrm_w_d, "V4SiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vftint_w_d, "V4SiV2dV2d", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftintrnel_l_s, "V2LLiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftintrneh_l_s, "V2LLiV4f", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vftintrzl_l_s, "V2LLiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftintrzh_l_s, "V2LLiV4f", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vftintrpl_l_s, "V2LLiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftintrph_l_s, "V2LLiV4f", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vftintrml_l_s, "V2LLiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftintrmh_l_s, "V2LLiV4f", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vftintl_l_s, "V2LLiV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vftinth_l_s, "V2LLiV4f", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vffint_s_w, "V4fV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vffint_d_l, "V2dV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vffint_s_wu, "V4fV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vffint_d_lu, "V2dV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vffintl_d_w, "V2dV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vffinth_d_w, "V2dV4Si", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vffint_s_l, "V4fV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vseq_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vseq_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vseq_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vseq_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vseqi_b, "V16ScV16ScISi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vseqi_h, "V8SsV8SsISi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vseqi_w, "V4SiV4SiISi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vseqi_d, "V2SLLiV2SLLiISi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsle_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsle_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsle_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsle_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vslei_b, "V16ScV16ScISi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslei_h, "V8SsV8SsISi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslei_w, "V4SiV4SiISi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslei_d, "V2SLLiV2SLLiISi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vsle_bu, "V16ScV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsle_hu, "V8SsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsle_wu, "V4SiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vsle_du, "V2SLLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vslei_bu, "V16ScV16UcIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslei_hu, "V8SsV8UsIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslei_wu, "V4SiV4UiIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslei_du, "V2SLLiV2ULLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vslt_b, "V16ScV16ScV16Sc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslt_h, "V8SsV8SsV8Ss", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslt_w, "V4SiV4SiV4Si", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslt_d, "V2SLLiV2SLLiV2SLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vslti_b, "V16ScV16ScISi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslti_h, "V8SsV8SsISi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslti_w, "V4SiV4SiISi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslti_d, "V2SLLiV2SLLiISi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vslt_bu, "V16ScV16UcV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslt_hu, "V8SsV8UsV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslt_wu, "V4SiV4UiV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslt_du, "V2SLLiV2ULLiV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vslti_bu, "V16ScV16UcIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslti_hu, "V8SsV8UsIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslti_wu, "V4SiV4UiIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vslti_du, "V2SLLiV2ULLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_caf_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_caf_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_cun_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_cun_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_ceq_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_ceq_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_cueq_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_cueq_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_clt_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_clt_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_cult_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_cult_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_cle_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_cle_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_cule_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_cule_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_cne_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_cne_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_cor_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_cor_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_cune_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_cune_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_saf_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_saf_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_sun_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_sun_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_seq_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_seq_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_sueq_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_sueq_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_slt_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_slt_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_sult_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_sult_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_sle_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_sle_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_sule_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_sule_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_sne_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_sne_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_sor_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_sor_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vfcmp_sune_s, "V4SiV4fV4f", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vfcmp_sune_d, "V2SLLiV2dV2d", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vbitsel_v, "V16UcV16UcV16UcV16Uc", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vbitseli_b, "V16UcV16UcV16UcIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vreplgr2vr_b, "V16Sci", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vreplgr2vr_h, "V8Ssi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vreplgr2vr_w, "V4Sii", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vreplgr2vr_d, "V2SLLiLLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vinsgr2vr_b, "V16ScV16SciIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vinsgr2vr_h, "V8SsV8SsiIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vinsgr2vr_w, "V4SiV4SiiIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vinsgr2vr_d, "V2SLLiV2SLLiLLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vpickve2gr_b, "iV16ScIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpickve2gr_h, "iV8SsIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpickve2gr_w, "iV4SiIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpickve2gr_d, "LLiV2SLLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vpickve2gr_bu, "iV16UcIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpickve2gr_hu, "iV8UsIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpickve2gr_wu, "iV4UiIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpickve2gr_du, "LLiV2ULLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vreplve_b, "V16cV16cUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vreplve_h, "V8sV8sUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vreplve_w, "V4iV4iUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vreplve_d, "V2LLiV2LLiUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vreplvei_b, "V16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vreplvei_h, "V8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vreplvei_w, "V4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vreplvei_d, "V2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vbsll_v, "V16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vbsrl_v, "V16cV16cIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vpackev_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpackev_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpackev_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpackev_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vpackod_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpackod_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpackod_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpackod_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vpickev_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpickev_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpickev_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpickev_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vpickod_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpickod_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpickod_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vpickod_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vilvl_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vilvl_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vilvl_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vilvl_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vilvh_b, "V16cV16cV16c", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vilvh_h, "V8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vilvh_w, "V4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vilvh_d, "V2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vshuf_b, "V16UcV16UcV16UcV16Uc", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vshuf_h, "V8sV8sV8sV8s", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vshuf_w, "V4iV4iV4iV4i", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vshuf_d, "V2LLiV2LLiV2LLiV2LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vshuf4i_b, "V16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vshuf4i_h, "V8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vshuf4i_w, "V4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vshuf4i_d, "V2LLiV2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vpermi_w, "V4iV4iV4iIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vextrins_b, "V16cV16cV16cIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vextrins_h, "V8sV8sV8sIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vextrins_w, "V4iV4iV4iIUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vextrins_d, "V2LLiV2LLiV2LLiIUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vld, "V16ScvC*Ii", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vst, "vV16Scv*Ii", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vldx, "V16ScvC*LLi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vstx, "vV16Scv*LLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vldrepl_b, "V16cvC*Ii", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vldrepl_h, "V8svC*Ii", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vldrepl_w, "V4ivC*Ii", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vldrepl_d, "V2LLivC*Ii", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_vstelm_b, "vV16Scv*IiUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vstelm_h, "vV8Ssv*IiUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vstelm_w, "vV4Siv*IiUi", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_vstelm_d, "vV2SLLiv*IiUi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_bz_v, "iV16Uc", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_bnz_v, "iV16Uc", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_bz_b, "iV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_bz_h, "iV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_bz_w, "iV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_bz_d, "iV2ULLi", "nc", "lsx") + +TARGET_BUILTIN(__builtin_lsx_bnz_b, "iV16Uc", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_bnz_h, "iV8Us", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_bnz_w, "iV4Ui", "nc", "lsx") +TARGET_BUILTIN(__builtin_lsx_bnz_d, "iV2ULLi", "nc", "lsx") diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsNEON.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsNEON.def index b8eb5a7b6173..9627005ba982 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsNEON.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsNEON.def @@ -19,3 +19,4 @@ #undef GET_NEON_BUILTINS #undef BUILTIN +#undef TARGET_BUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsNVPTX.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsNVPTX.def index 3c96900136a4..0f2e8260143b 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsNVPTX.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsNVPTX.def @@ -17,12 +17,21 @@ # define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) #endif +#pragma push_macro("SM_53") #pragma push_macro("SM_70") #pragma push_macro("SM_72") #pragma push_macro("SM_75") #pragma push_macro("SM_80") #pragma push_macro("SM_86") -#define SM_86 "sm_86" +#pragma push_macro("SM_87") +#pragma push_macro("SM_89") +#pragma push_macro("SM_90") +#pragma push_macro("SM_90a") +#define SM_90a "sm_90a" +#define SM_90 "sm_90|" SM_90a +#define SM_89 "sm_89|" SM_90 +#define SM_87 "sm_87|" SM_89 +#define SM_86 "sm_86|" SM_87 #define SM_80 "sm_80|" SM_86 #define SM_75 "sm_75|" SM_80 #define SM_72 "sm_72|" SM_75 @@ -30,7 +39,9 @@ #pragma push_macro("SM_60") #define SM_60 "sm_60|sm_61|sm_62|" SM_70 +#define SM_53 "sm_53|" SM_60 +#pragma push_macro("PTX42") #pragma push_macro("PTX60") #pragma push_macro("PTX61") #pragma push_macro("PTX63") @@ -39,7 +50,27 @@ #pragma push_macro("PTX70") #pragma push_macro("PTX71") #pragma push_macro("PTX72") -#define PTX72 "ptx72" +#pragma push_macro("PTX73") +#pragma push_macro("PTX74") +#pragma push_macro("PTX75") +#pragma push_macro("PTX76") +#pragma push_macro("PTX77") +#pragma push_macro("PTX78") +#pragma push_macro("PTX80") +#pragma push_macro("PTX81") +#pragma push_macro("PTX82") +#pragma push_macro("PTX83") +#define PTX83 "ptx83" +#define PTX82 "ptx82|" PTX83 +#define PTX81 "ptx81|" PTX82 +#define PTX80 "ptx80|" PTX81 +#define PTX78 "ptx78|" PTX80 +#define PTX77 "ptx77|" PTX78 +#define PTX76 "ptx76|" PTX77 +#define PTX75 "ptx75|" PTX76 +#define PTX74 "ptx74|" PTX75 +#define PTX73 "ptx73|" PTX74 +#define PTX72 "ptx72|" PTX73 #define PTX71 "ptx71|" PTX72 #define PTX70 "ptx70|" PTX71 #define PTX65 "ptx65|" PTX70 @@ -47,6 +78,7 @@ #define PTX63 "ptx63|" PTX64 #define PTX61 "ptx61|" PTX63 #define PTX60 "ptx60|" PTX61 +#define PTX42 "ptx42|" PTX60 #pragma push_macro("AND") #define AND(a, b) "(" a "),(" b ")" @@ -73,6 +105,31 @@ BUILTIN(__nvvm_read_ptx_sreg_nctaid_y, "i", "nc") BUILTIN(__nvvm_read_ptx_sreg_nctaid_z, "i", "nc") BUILTIN(__nvvm_read_ptx_sreg_nctaid_w, "i", "nc") +TARGET_BUILTIN(__nvvm_read_ptx_sreg_clusterid_x, "i", "nc", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_read_ptx_sreg_clusterid_y, "i", "nc", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_read_ptx_sreg_clusterid_z, "i", "nc", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_read_ptx_sreg_clusterid_w, "i", "nc", AND(SM_90, PTX78)) + +TARGET_BUILTIN(__nvvm_read_ptx_sreg_nclusterid_x, "i", "nc", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_read_ptx_sreg_nclusterid_y, "i", "nc", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_read_ptx_sreg_nclusterid_z, "i", "nc", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_read_ptx_sreg_nclusterid_w, "i", "nc", AND(SM_90, PTX78)) + +TARGET_BUILTIN(__nvvm_read_ptx_sreg_cluster_ctaid_x, "i", "nc", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_read_ptx_sreg_cluster_ctaid_y, "i", "nc", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_read_ptx_sreg_cluster_ctaid_z, "i", "nc", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_read_ptx_sreg_cluster_ctaid_w, "i", "nc", AND(SM_90, PTX78)) + +TARGET_BUILTIN(__nvvm_read_ptx_sreg_cluster_nctaid_x, "i", "nc", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_read_ptx_sreg_cluster_nctaid_y, "i", "nc", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_read_ptx_sreg_cluster_nctaid_z, "i", "nc", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_read_ptx_sreg_cluster_nctaid_w, "i", "nc", AND(SM_90, PTX78)) + +TARGET_BUILTIN(__nvvm_read_ptx_sreg_cluster_ctarank, "i", "nc", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_read_ptx_sreg_cluster_nctarank, "i", "nc", AND(SM_90, PTX78)) + +TARGET_BUILTIN(__nvvm_is_explicit_cluster, "b", "nc", AND(SM_90, PTX78)) + BUILTIN(__nvvm_read_ptx_sreg_laneid, "i", "nc") BUILTIN(__nvvm_read_ptx_sreg_warpid, "i", "nc") BUILTIN(__nvvm_read_ptx_sreg_nwarpid, "i", "nc") @@ -101,13 +158,97 @@ BUILTIN(__nvvm_prmt, "UiUiUiUi", "") // Min Max -BUILTIN(__nvvm_fmax_ftz_f, "fff", "") -BUILTIN(__nvvm_fmax_f, "fff", "") -BUILTIN(__nvvm_fmin_ftz_f, "fff", "") -BUILTIN(__nvvm_fmin_f, "fff", "") +TARGET_BUILTIN(__nvvm_fmin_f16, "hhh", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_ftz_f16, "hhh", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_nan_f16, "hhh", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_ftz_nan_f16, "hhh", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_xorsign_abs_f16, "hhh", "", AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmin_ftz_xorsign_abs_f16, "hhh", "", AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmin_nan_xorsign_abs_f16, "hhh", "", AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmin_ftz_nan_xorsign_abs_f16, "hhh", "", + AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmin_f16x2, "V2hV2hV2h", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_ftz_f16x2, "V2hV2hV2h", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_nan_f16x2, "V2hV2hV2h", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_ftz_nan_f16x2, "V2hV2hV2h", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_xorsign_abs_f16x2, "V2hV2hV2h", "", + AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmin_ftz_xorsign_abs_f16x2, "V2hV2hV2h", "", + AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmin_nan_xorsign_abs_f16x2, "V2hV2hV2h", "", + AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmin_ftz_nan_xorsign_abs_f16x2, "V2hV2hV2h", "", + AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmin_bf16, "yyy", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_ftz_bf16, "yyy", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_nan_bf16, "yyy", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_ftz_nan_bf16, "yyy", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_xorsign_abs_bf16, "yyy", "", AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmin_nan_xorsign_abs_bf16, "yyy", "", + AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmin_bf16x2, "V2yV2yV2y", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_ftz_bf16x2, "V2yV2yV2y", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_nan_bf16x2, "V2yV2yV2y", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_ftz_nan_bf16x2, "V2yV2yV2y", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_xorsign_abs_bf16x2, "V2yV2yV2y", "", + AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmin_nan_xorsign_abs_bf16x2, "V2yV2yV2y", "", + AND(SM_86, PTX72)) +BUILTIN(__nvvm_fmin_f, "fff", "") +BUILTIN(__nvvm_fmin_ftz_f, "fff", "") +TARGET_BUILTIN(__nvvm_fmin_nan_f, "fff", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_ftz_nan_f, "fff", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmin_xorsign_abs_f, "fff", "", AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmin_ftz_xorsign_abs_f, "fff", "", AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmin_nan_xorsign_abs_f, "fff", "", AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmin_ftz_nan_xorsign_abs_f, "fff", "", AND(SM_86, PTX72)) +BUILTIN(__nvvm_fmin_d, "ddd", "") +TARGET_BUILTIN(__nvvm_fmax_f16, "hhh", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_ftz_f16, "hhh", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_nan_f16, "hhh", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_ftz_nan_f16, "hhh", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_xorsign_abs_f16, "hhh", "", AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmax_ftz_xorsign_abs_f16, "hhh", "", AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmax_nan_xorsign_abs_f16, "hhh", "", AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmax_ftz_nan_xorsign_abs_f16, "hhh", "", + AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmax_f16x2, "V2hV2hV2h", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_ftz_f16x2, "V2hV2hV2h", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_nan_f16x2, "V2hV2hV2h", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_ftz_nan_f16x2, "V2hV2hV2h", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_xorsign_abs_f16x2, "V2hV2hV2h", "", + AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmax_ftz_xorsign_abs_f16x2, "V2hV2hV2h", "", + AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmax_nan_xorsign_abs_f16x2, "V2hV2hV2h", "", + AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmax_ftz_nan_xorsign_abs_f16x2, "V2hV2hV2h", "", + AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmax_bf16, "yyy", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_ftz_bf16, "yyy", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_nan_bf16, "yyy", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_ftz_nan_bf16, "yyy", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_xorsign_abs_bf16, "yyy", "", AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmax_nan_xorsign_abs_bf16, "yyy", "", + AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmax_bf16x2, "V2yV2yV2y", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_ftz_bf16x2, "V2yV2yV2y", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_nan_bf16x2, "V2yV2yV2y", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_ftz_nan_bf16x2, "V2yV2yV2y", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_xorsign_abs_bf16x2, "V2yV2yV2y", "", + AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmax_nan_xorsign_abs_bf16x2, "V2yV2yV2y", "", + AND(SM_86, PTX72)) +BUILTIN(__nvvm_fmax_f, "fff", "") +BUILTIN(__nvvm_fmax_ftz_f, "fff", "") +TARGET_BUILTIN(__nvvm_fmax_nan_f, "fff", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_ftz_nan_f, "fff", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fmax_xorsign_abs_f, "fff", "", AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmax_ftz_xorsign_abs_f, "fff", "", AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmax_nan_xorsign_abs_f, "fff", "", AND(SM_86, PTX72)) +TARGET_BUILTIN(__nvvm_fmax_ftz_nan_xorsign_abs_f, "fff", "", AND(SM_86, PTX72)) BUILTIN(__nvvm_fmax_d, "ddd", "") -BUILTIN(__nvvm_fmin_d, "ddd", "") // Multiplication @@ -196,6 +337,8 @@ BUILTIN(__nvvm_saturate_d, "dd", "") BUILTIN(__nvvm_ex2_approx_ftz_f, "ff", "") BUILTIN(__nvvm_ex2_approx_f, "ff", "") BUILTIN(__nvvm_ex2_approx_d, "dd", "") +TARGET_BUILTIN(__nvvm_ex2_approx_f16, "hh", "", AND(SM_75, PTX70)) +TARGET_BUILTIN(__nvvm_ex2_approx_f16x2, "V2hV2h", "", AND(SM_75, PTX70)) BUILTIN(__nvvm_lg2_approx_ftz_f, "ff", "") BUILTIN(__nvvm_lg2_approx_f, "ff", "") @@ -211,6 +354,22 @@ BUILTIN(__nvvm_cos_approx_f, "ff", "") // Fma +TARGET_BUILTIN(__nvvm_fma_rn_f16, "hhhh", "", AND(SM_53, PTX42)) +TARGET_BUILTIN(__nvvm_fma_rn_ftz_f16, "hhhh", "", AND(SM_53, PTX42)) +TARGET_BUILTIN(__nvvm_fma_rn_sat_f16, "hhhh", "", AND(SM_53, PTX42)) +TARGET_BUILTIN(__nvvm_fma_rn_ftz_sat_f16, "hhhh", "", AND(SM_53, PTX42)) +TARGET_BUILTIN(__nvvm_fma_rn_relu_f16, "hhhh", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fma_rn_ftz_relu_f16, "hhhh", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fma_rn_f16x2, "V2hV2hV2hV2h", "", AND(SM_53, PTX42)) +TARGET_BUILTIN(__nvvm_fma_rn_ftz_f16x2, "V2hV2hV2hV2h", "", AND(SM_53, PTX42)) +TARGET_BUILTIN(__nvvm_fma_rn_sat_f16x2, "V2hV2hV2hV2h", "", AND(SM_53, PTX42)) +TARGET_BUILTIN(__nvvm_fma_rn_ftz_sat_f16x2, "V2hV2hV2hV2h", "", AND(SM_53, PTX42)) +TARGET_BUILTIN(__nvvm_fma_rn_relu_f16x2, "V2hV2hV2hV2h", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fma_rn_ftz_relu_f16x2, "V2hV2hV2hV2h", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fma_rn_bf16, "yyyy", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fma_rn_relu_bf16, "yyyy", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fma_rn_bf16x2, "V2yV2yV2yV2y", "", AND(SM_80, PTX70)) +TARGET_BUILTIN(__nvvm_fma_rn_relu_bf16x2, "V2yV2yV2yV2y", "", AND(SM_80, PTX70)) BUILTIN(__nvvm_fma_rn_ftz_f, "ffff", "") BUILTIN(__nvvm_fma_rn_f, "ffff", "") BUILTIN(__nvvm_fma_rz_ftz_f, "ffff", "") @@ -239,6 +398,8 @@ BUILTIN(__nvvm_rcp_rn_d, "dd", "") BUILTIN(__nvvm_rcp_rz_d, "dd", "") BUILTIN(__nvvm_rcp_rm_d, "dd", "") BUILTIN(__nvvm_rcp_rp_d, "dd", "") + +BUILTIN(__nvvm_rcp_approx_ftz_f, "ff", "") BUILTIN(__nvvm_rcp_approx_ftz_d, "dd", "") // Sqrt @@ -396,6 +557,23 @@ BUILTIN(__nvvm_ull2d_rp, "dULLi", "") BUILTIN(__nvvm_f2h_rn_ftz, "Usf", "") BUILTIN(__nvvm_f2h_rn, "Usf", "") +TARGET_BUILTIN(__nvvm_ff2bf16x2_rn, "V2yff", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_ff2bf16x2_rn_relu, "V2yff", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_ff2bf16x2_rz, "V2yff", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_ff2bf16x2_rz_relu, "V2yff", "", AND(SM_80,PTX70)) + +TARGET_BUILTIN(__nvvm_ff2f16x2_rn, "V2hff", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_ff2f16x2_rn_relu, "V2hff", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_ff2f16x2_rz, "V2hff", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_ff2f16x2_rz_relu, "V2hff", "", AND(SM_80,PTX70)) + +TARGET_BUILTIN(__nvvm_f2bf16_rn, "yf", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_f2bf16_rn_relu, "yf", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_f2bf16_rz, "yf", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_f2bf16_rz_relu, "yf", "", AND(SM_80,PTX70)) + +TARGET_BUILTIN(__nvvm_f2tf32_rna, "ZUif", "", AND(SM_80,PTX70)) + // Bitcast BUILTIN(__nvvm_bitcast_f2i, "if", "") @@ -418,6 +596,11 @@ TARGET_BUILTIN(__nvvm_bar_warp_sync, "vUi", "n", PTX60) TARGET_BUILTIN(__nvvm_barrier_sync, "vUi", "n", PTX60) TARGET_BUILTIN(__nvvm_barrier_sync_cnt, "vUiUi", "n", PTX60) +TARGET_BUILTIN(__nvvm_barrier_cluster_arrive, "v", "n", AND(SM_90,PTX78)) +TARGET_BUILTIN(__nvvm_barrier_cluster_arrive_relaxed, "v", "n", AND(SM_90,PTX80)) +TARGET_BUILTIN(__nvvm_barrier_cluster_wait, "v", "n", AND(SM_90,PTX78)) +TARGET_BUILTIN(__nvvm_fence_sc_cluster, "v", "n", AND(SM_90,PTX78)) + // Shuffle BUILTIN(__nvvm_shfl_down_i32, "iiii", "") @@ -450,11 +633,11 @@ TARGET_BUILTIN(__nvvm_vote_uni_sync, "bUib", "", PTX60) TARGET_BUILTIN(__nvvm_vote_ballot_sync, "UiUib", "", PTX60) // Match -TARGET_BUILTIN(__nvvm_match_any_sync_i32, "UiUiUi", "", PTX60) -TARGET_BUILTIN(__nvvm_match_any_sync_i64, "WiUiWi", "", PTX60) +TARGET_BUILTIN(__nvvm_match_any_sync_i32, "UiUiUi", "", AND(SM_70,PTX60)) +TARGET_BUILTIN(__nvvm_match_any_sync_i64, "UiUiWi", "", AND(SM_70,PTX60)) // These return a pair {value, predicate}, which requires custom lowering. -TARGET_BUILTIN(__nvvm_match_all_sync_i32p, "UiUiUii*", "", PTX60) -TARGET_BUILTIN(__nvvm_match_all_sync_i64p, "WiUiWii*", "", PTX60) +TARGET_BUILTIN(__nvvm_match_all_sync_i32p, "UiUiUii*", "", AND(SM_70,PTX60)) +TARGET_BUILTIN(__nvvm_match_all_sync_i64p, "UiUiWii*", "", AND(SM_70,PTX60)) // Redux TARGET_BUILTIN(__nvvm_redux_sync_add, "iii", "", AND(SM_80,PTX70)) @@ -647,8 +830,50 @@ TARGET_BUILTIN(__nvvm_atom_sys_cas_gen_ll, "LLiLLiD*LLiLLi", "n", SM_60) BUILTIN(__nvvm_compiler_error, "vcC*4", "n") BUILTIN(__nvvm_compiler_warn, "vcC*4", "n") -// __ldg. This is not implemented as a builtin by nvcc. +BUILTIN(__nvvm_ldu_c, "ccC*", "") +BUILTIN(__nvvm_ldu_sc, "ScScC*", "") +BUILTIN(__nvvm_ldu_s, "ssC*", "") +BUILTIN(__nvvm_ldu_i, "iiC*", "") +BUILTIN(__nvvm_ldu_l, "LiLiC*", "") +BUILTIN(__nvvm_ldu_ll, "LLiLLiC*", "") + +BUILTIN(__nvvm_ldu_uc, "UcUcC*", "") +BUILTIN(__nvvm_ldu_us, "UsUsC*", "") +BUILTIN(__nvvm_ldu_ui, "UiUiC*", "") +BUILTIN(__nvvm_ldu_ul, "ULiULiC*", "") +BUILTIN(__nvvm_ldu_ull, "ULLiULLiC*", "") + +BUILTIN(__nvvm_ldu_h, "hhC*", "") +BUILTIN(__nvvm_ldu_f, "ffC*", "") +BUILTIN(__nvvm_ldu_d, "ddC*", "") + +BUILTIN(__nvvm_ldu_c2, "E2cE2cC*", "") +BUILTIN(__nvvm_ldu_sc2, "E2ScE2ScC*", "") +BUILTIN(__nvvm_ldu_c4, "E4cE4cC*", "") +BUILTIN(__nvvm_ldu_sc4, "E4ScE4ScC*", "") +BUILTIN(__nvvm_ldu_s2, "E2sE2sC*", "") +BUILTIN(__nvvm_ldu_s4, "E4sE4sC*", "") +BUILTIN(__nvvm_ldu_i2, "E2iE2iC*", "") +BUILTIN(__nvvm_ldu_i4, "E4iE4iC*", "") +BUILTIN(__nvvm_ldu_l2, "E2LiE2LiC*", "") +BUILTIN(__nvvm_ldu_ll2, "E2LLiE2LLiC*", "") + +BUILTIN(__nvvm_ldu_uc2, "E2UcE2UcC*", "") +BUILTIN(__nvvm_ldu_uc4, "E4UcE4UcC*", "") +BUILTIN(__nvvm_ldu_us2, "E2UsE2UsC*", "") +BUILTIN(__nvvm_ldu_us4, "E4UsE4UsC*", "") +BUILTIN(__nvvm_ldu_ui2, "E2UiE2UiC*", "") +BUILTIN(__nvvm_ldu_ui4, "E4UiE4UiC*", "") +BUILTIN(__nvvm_ldu_ul2, "E2ULiE2ULiC*", "") +BUILTIN(__nvvm_ldu_ull2, "E2ULLiE2ULLiC*", "") + +BUILTIN(__nvvm_ldu_h2, "E2hE2hC*", "") +BUILTIN(__nvvm_ldu_f2, "E2fE2fC*", "") +BUILTIN(__nvvm_ldu_f4, "E4fE4fC*", "") +BUILTIN(__nvvm_ldu_d2, "E2dE2dC*", "") + BUILTIN(__nvvm_ldg_c, "ccC*", "") +BUILTIN(__nvvm_ldg_sc, "ScScC*", "") BUILTIN(__nvvm_ldg_s, "ssC*", "") BUILTIN(__nvvm_ldg_i, "iiC*", "") BUILTIN(__nvvm_ldg_l, "LiLiC*", "") @@ -660,15 +885,19 @@ BUILTIN(__nvvm_ldg_ui, "UiUiC*", "") BUILTIN(__nvvm_ldg_ul, "ULiULiC*", "") BUILTIN(__nvvm_ldg_ull, "ULLiULLiC*", "") +BUILTIN(__nvvm_ldg_h, "hhC*", "") BUILTIN(__nvvm_ldg_f, "ffC*", "") BUILTIN(__nvvm_ldg_d, "ddC*", "") BUILTIN(__nvvm_ldg_c2, "E2cE2cC*", "") +BUILTIN(__nvvm_ldg_sc2, "E2ScE2ScC*", "") BUILTIN(__nvvm_ldg_c4, "E4cE4cC*", "") +BUILTIN(__nvvm_ldg_sc4, "E4ScE4ScC*", "") BUILTIN(__nvvm_ldg_s2, "E2sE2sC*", "") BUILTIN(__nvvm_ldg_s4, "E4sE4sC*", "") BUILTIN(__nvvm_ldg_i2, "E2iE2iC*", "") BUILTIN(__nvvm_ldg_i4, "E4iE4iC*", "") +BUILTIN(__nvvm_ldg_l2, "E2LiE2LiC*", "") BUILTIN(__nvvm_ldg_ll2, "E2LLiE2LLiC*", "") BUILTIN(__nvvm_ldg_uc2, "E2UcE2UcC*", "") @@ -677,33 +906,42 @@ BUILTIN(__nvvm_ldg_us2, "E2UsE2UsC*", "") BUILTIN(__nvvm_ldg_us4, "E4UsE4UsC*", "") BUILTIN(__nvvm_ldg_ui2, "E2UiE2UiC*", "") BUILTIN(__nvvm_ldg_ui4, "E4UiE4UiC*", "") +BUILTIN(__nvvm_ldg_ul2, "E2ULiE2ULiC*", "") BUILTIN(__nvvm_ldg_ull2, "E2ULLiE2ULLiC*", "") +BUILTIN(__nvvm_ldg_h2, "E2hE2hC*", "") BUILTIN(__nvvm_ldg_f2, "E2fE2fC*", "") BUILTIN(__nvvm_ldg_f4, "E4fE4fC*", "") BUILTIN(__nvvm_ldg_d2, "E2dE2dC*", "") +// Address space predicates. +BUILTIN(__nvvm_isspacep_const, "bvC*", "nc") +BUILTIN(__nvvm_isspacep_global, "bvC*", "nc") +BUILTIN(__nvvm_isspacep_local, "bvC*", "nc") +BUILTIN(__nvvm_isspacep_shared, "bvC*", "nc") +TARGET_BUILTIN(__nvvm_isspacep_shared_cluster,"bvC*", "nc", AND(SM_90,PTX78)) + // Builtins to support WMMA instructions on sm_70 TARGET_BUILTIN(__hmma_m16n16k16_ld_a, "vi*iC*UiIi", "", AND(SM_70,PTX60)) TARGET_BUILTIN(__hmma_m16n16k16_ld_b, "vi*iC*UiIi", "", AND(SM_70,PTX60)) TARGET_BUILTIN(__hmma_m16n16k16_ld_c_f16, "vi*iC*UiIi", "", AND(SM_70,PTX60)) TARGET_BUILTIN(__hmma_m16n16k16_ld_c_f32, "vf*fC*UiIi", "", AND(SM_70,PTX60)) -TARGET_BUILTIN(__hmma_m16n16k16_st_c_f16, "vi*i*UiIi", "", AND(SM_70,PTX60)) -TARGET_BUILTIN(__hmma_m16n16k16_st_c_f32, "vf*f*UiIi", "", AND(SM_70,PTX60)) +TARGET_BUILTIN(__hmma_m16n16k16_st_c_f16, "vi*iC*UiIi", "", AND(SM_70,PTX60)) +TARGET_BUILTIN(__hmma_m16n16k16_st_c_f32, "vf*fC*UiIi", "", AND(SM_70,PTX60)) TARGET_BUILTIN(__hmma_m32n8k16_ld_a, "vi*iC*UiIi", "", AND(SM_70,PTX61)) TARGET_BUILTIN(__hmma_m32n8k16_ld_b, "vi*iC*UiIi", "", AND(SM_70,PTX61)) TARGET_BUILTIN(__hmma_m32n8k16_ld_c_f16, "vi*iC*UiIi", "", AND(SM_70,PTX61)) TARGET_BUILTIN(__hmma_m32n8k16_ld_c_f32, "vf*fC*UiIi", "", AND(SM_70,PTX61)) -TARGET_BUILTIN(__hmma_m32n8k16_st_c_f16, "vi*i*UiIi", "", AND(SM_70,PTX61)) -TARGET_BUILTIN(__hmma_m32n8k16_st_c_f32, "vf*f*UiIi", "", AND(SM_70,PTX61)) +TARGET_BUILTIN(__hmma_m32n8k16_st_c_f16, "vi*iC*UiIi", "", AND(SM_70,PTX61)) +TARGET_BUILTIN(__hmma_m32n8k16_st_c_f32, "vf*fC*UiIi", "", AND(SM_70,PTX61)) TARGET_BUILTIN(__hmma_m8n32k16_ld_a, "vi*iC*UiIi", "", AND(SM_70,PTX61)) TARGET_BUILTIN(__hmma_m8n32k16_ld_b, "vi*iC*UiIi", "", AND(SM_70,PTX61)) TARGET_BUILTIN(__hmma_m8n32k16_ld_c_f16, "vi*iC*UiIi", "", AND(SM_70,PTX61)) TARGET_BUILTIN(__hmma_m8n32k16_ld_c_f32, "vf*fC*UiIi", "", AND(SM_70,PTX61)) -TARGET_BUILTIN(__hmma_m8n32k16_st_c_f16, "vi*i*UiIi", "", AND(SM_70,PTX61)) -TARGET_BUILTIN(__hmma_m8n32k16_st_c_f32, "vf*f*UiIi", "", AND(SM_70,PTX61)) +TARGET_BUILTIN(__hmma_m8n32k16_st_c_f16, "vi*iC*UiIi", "", AND(SM_70,PTX61)) +TARGET_BUILTIN(__hmma_m8n32k16_st_c_f32, "vf*fC*UiIi", "", AND(SM_70,PTX61)) TARGET_BUILTIN(__hmma_m16n16k16_mma_f16f16, "vi*iC*iC*iC*IiIi", "", AND(SM_70,PTX60)) TARGET_BUILTIN(__hmma_m16n16k16_mma_f32f16, "vf*iC*iC*iC*IiIi", "", AND(SM_70,PTX60)) @@ -724,7 +962,7 @@ TARGET_BUILTIN(__hmma_m8n32k16_mma_f16f32, "vi*iC*iC*fC*IiIi", "", AND(SM_70,PTX TARGET_BUILTIN(__bmma_m8n8k128_ld_a_b1, "vi*iC*UiIi", "", AND(SM_75,PTX63)) TARGET_BUILTIN(__bmma_m8n8k128_ld_b_b1, "vi*iC*UiIi", "", AND(SM_75,PTX63)) TARGET_BUILTIN(__bmma_m8n8k128_ld_c, "vi*iC*UiIi", "", AND(SM_75,PTX63)) -TARGET_BUILTIN(__bmma_m8n8k128_mma_and_popc_b1, "vi*iC*iC*iC*Ii", "", AND(SM_75,PTX71)) +TARGET_BUILTIN(__bmma_m8n8k128_mma_and_popc_b1, "vi*iC*iC*iC*Ii", "", AND(SM_80,PTX71)) TARGET_BUILTIN(__bmma_m8n8k128_mma_xor_popc_b1, "vi*iC*iC*iC*Ii", "", AND(SM_75,PTX63)) TARGET_BUILTIN(__bmma_m8n8k128_st_c_i32, "vi*iC*UiIi", "", AND(SM_75,PTX63)) TARGET_BUILTIN(__imma_m16n16k16_ld_a_s8, "vi*iC*UiIi", "", AND(SM_72,PTX63)) @@ -789,24 +1027,42 @@ TARGET_BUILTIN(__nvvm_cp_async_mbarrier_arrive_shared, "vWi*3", "", AND(SM_80,PT TARGET_BUILTIN(__nvvm_cp_async_mbarrier_arrive_noinc, "vWi*", "", AND(SM_80,PTX70)) TARGET_BUILTIN(__nvvm_cp_async_mbarrier_arrive_noinc_shared, "vWi*3", "", AND(SM_80,PTX70)) -TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_4, "vv*3vC*1", "", AND(SM_80,PTX70)) -TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_8, "vv*3vC*1", "", AND(SM_80,PTX70)) -TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_16, "vv*3vC*1", "", AND(SM_80,PTX70)) -TARGET_BUILTIN(__nvvm_cp_async_cg_shared_global_16, "vv*3vC*1", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_4, "vv*3vC*1.", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_8, "vv*3vC*1.", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_16, "vv*3vC*1.", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_cp_async_cg_shared_global_16, "vv*3vC*1.", "", AND(SM_80,PTX70)) TARGET_BUILTIN(__nvvm_cp_async_commit_group, "v", "", AND(SM_80,PTX70)) TARGET_BUILTIN(__nvvm_cp_async_wait_group, "vIi", "", AND(SM_80,PTX70)) TARGET_BUILTIN(__nvvm_cp_async_wait_all, "v", "", AND(SM_80,PTX70)) + +// bf16, bf16x2 abs, neg +TARGET_BUILTIN(__nvvm_abs_bf16, "yy", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_abs_bf16x2, "V2yV2y", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_neg_bf16, "yy", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__nvvm_neg_bf16x2, "V2yV2y", "", AND(SM_80,PTX70)) + +TARGET_BUILTIN(__nvvm_mapa, "v*v*i", "", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_mapa_shared_cluster, "v*3v*3i", "", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_getctarank, "iv*", "", AND(SM_90, PTX78)) +TARGET_BUILTIN(__nvvm_getctarank_shared_cluster, "iv*3", "", AND(SM_90,PTX78)) + #undef BUILTIN #undef TARGET_BUILTIN #pragma pop_macro("AND") +#pragma pop_macro("SM_53") #pragma pop_macro("SM_60") #pragma pop_macro("SM_70") #pragma pop_macro("SM_72") #pragma pop_macro("SM_75") #pragma pop_macro("SM_80") #pragma pop_macro("SM_86") +#pragma pop_macro("SM_87") +#pragma pop_macro("SM_89") +#pragma pop_macro("SM_90") +#pragma pop_macro("SM_90a") +#pragma pop_macro("PTX42") #pragma pop_macro("PTX60") #pragma pop_macro("PTX61") #pragma pop_macro("PTX63") @@ -815,3 +1071,13 @@ TARGET_BUILTIN(__nvvm_cp_async_wait_all, "v", "", AND(SM_80,PTX70)) #pragma pop_macro("PTX70") #pragma pop_macro("PTX71") #pragma pop_macro("PTX72") +#pragma pop_macro("PTX73") +#pragma pop_macro("PTX74") +#pragma pop_macro("PTX75") +#pragma pop_macro("PTX76") +#pragma pop_macro("PTX77") +#pragma pop_macro("PTX78") +#pragma pop_macro("PTX80") +#pragma pop_macro("PTX81") +#pragma pop_macro("PTX82") +#pragma pop_macro("PTX83") diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsPPC.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsPPC.def index dfe97af300f4..88ae0ce94085 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsPPC.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsPPC.def @@ -19,15 +19,33 @@ // The format of this database matches clang/Basic/Builtins.def except for the // MMA builtins that are using their own format documented below. -#if defined(BUILTIN) && !defined(CUSTOM_BUILTIN) -# define CUSTOM_BUILTIN(ID, INTR, TYPES, ACCUMULATE) \ - BUILTIN(__builtin_##ID, "i.", "t") -#elif defined(CUSTOM_BUILTIN) && !defined(BUILTIN) -# define BUILTIN(ID, TYPES, ATTRS) +#ifndef BUILTIN +#define BUILTIN(ID, TYPE, ATTRS) #endif -#define UNALIASED_CUSTOM_BUILTIN(ID, TYPES, ACCUMULATE) \ - CUSTOM_BUILTIN(ID, ID, TYPES, ACCUMULATE) +#if defined(BUILTIN) && !defined(TARGET_BUILTIN) +#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) +#endif + +#ifndef CUSTOM_BUILTIN +#define CUSTOM_BUILTIN(ID, INTR, TYPES, ACCUMULATE, FEATURE) \ + TARGET_BUILTIN(__builtin_##ID, "i.", "t", FEATURE) +#endif + +#define UNALIASED_CUSTOM_BUILTIN(ID, TYPES, ACCUMULATE, FEATURE) \ + CUSTOM_BUILTIN(ID, ID, TYPES, ACCUMULATE, FEATURE) + +// GCC predefined macros to rename builtins, undef them to keep original names. +#if defined(__GNUC__) && !defined(__clang__) +#undef __builtin_vsx_xvnmaddadp +#undef __builtin_vsx_xvnmaddasp +#undef __builtin_vsx_xvmsubasp +#undef __builtin_vsx_xvmsubadp +#undef __builtin_vsx_xvmaddadp +#undef __builtin_vsx_xvnmsubasp +#undef __builtin_vsx_xvnmsubadp +#undef __builtin_vsx_xvmaddasp +#endif // XL Compatibility built-ins BUILTIN(__builtin_ppc_popcntb, "ULiULi", "") @@ -46,7 +64,7 @@ BUILTIN(__builtin_ppc_dcbst, "vvC*", "") BUILTIN(__builtin_ppc_dcbt, "vv*", "") BUILTIN(__builtin_ppc_dcbtst, "vv*", "") BUILTIN(__builtin_ppc_dcbz, "vv*", "") -BUILTIN(__builtin_ppc_icbt, "vv*", "") +TARGET_BUILTIN(__builtin_ppc_icbt, "vv*", "", "isa-v207-instructions") BUILTIN(__builtin_ppc_fric, "dd", "") BUILTIN(__builtin_ppc_frim, "dd", "") BUILTIN(__builtin_ppc_frims, "ff", "") @@ -74,12 +92,12 @@ BUILTIN(__builtin_ppc_fetch_and_swap, "UiUiD*Ui", "") BUILTIN(__builtin_ppc_fetch_and_swaplp, "ULiULiD*ULi", "") BUILTIN(__builtin_ppc_ldarx, "LiLiD*", "") BUILTIN(__builtin_ppc_lwarx, "iiD*", "") -BUILTIN(__builtin_ppc_lharx, "isD*", "") -BUILTIN(__builtin_ppc_lbarx, "UiUcD*", "") +TARGET_BUILTIN(__builtin_ppc_lharx, "ssD*", "", "isa-v207-instructions") +TARGET_BUILTIN(__builtin_ppc_lbarx, "ccD*", "", "isa-v207-instructions") BUILTIN(__builtin_ppc_stdcx, "iLiD*Li", "") BUILTIN(__builtin_ppc_stwcx, "iiD*i", "") -BUILTIN(__builtin_ppc_sthcx, "isD*s", "") -BUILTIN(__builtin_ppc_stbcx, "icD*i", "") +TARGET_BUILTIN(__builtin_ppc_sthcx, "isD*s", "", "isa-v207-instructions") +TARGET_BUILTIN(__builtin_ppc_stbcx, "icD*i", "", "isa-v207-instructions") BUILTIN(__builtin_ppc_tdw, "vLLiLLiIUi", "") BUILTIN(__builtin_ppc_tw, "viiIUi", "") BUILTIN(__builtin_ppc_trap, "vi", "") @@ -92,42 +110,57 @@ BUILTIN(__builtin_ppc_fctiw, "dd", "") BUILTIN(__builtin_ppc_fctiwz, "dd", "") BUILTIN(__builtin_ppc_fctudz, "dd", "") BUILTIN(__builtin_ppc_fctuwz, "dd", "") + +// fence builtin prevents all instructions moved across it +BUILTIN(__builtin_ppc_fence, "v", "") + BUILTIN(__builtin_ppc_swdiv_nochk, "ddd", "") BUILTIN(__builtin_ppc_swdivs_nochk, "fff", "") BUILTIN(__builtin_ppc_alignx, "vIivC*", "nc") BUILTIN(__builtin_ppc_rdlam, "UWiUWiUWiUWIi", "nc") +TARGET_BUILTIN(__builtin_ppc_compare_exp_uo, "idd", "", "isa-v30-instructions,vsx") +TARGET_BUILTIN(__builtin_ppc_compare_exp_lt, "idd", "", "isa-v30-instructions,vsx") +TARGET_BUILTIN(__builtin_ppc_compare_exp_gt, "idd", "", "isa-v30-instructions,vsx") +TARGET_BUILTIN(__builtin_ppc_compare_exp_eq, "idd", "", "isa-v30-instructions,vsx") +TARGET_BUILTIN(__builtin_ppc_test_data_class, "idIi", "t", "isa-v30-instructions,vsx") +BUILTIN(__builtin_ppc_swdiv, "ddd", "") +BUILTIN(__builtin_ppc_swdivs, "fff", "") // Compare -BUILTIN(__builtin_ppc_cmpeqb, "LLiLLiLLi", "") -BUILTIN(__builtin_ppc_cmprb, "iCIiii", "") -BUILTIN(__builtin_ppc_setb, "LLiLLiLLi", "") +TARGET_BUILTIN(__builtin_ppc_cmpeqb, "LLiLLiLLi", "", "isa-v30-instructions") +TARGET_BUILTIN(__builtin_ppc_cmprb, "iCIiii", "", "isa-v30-instructions") +TARGET_BUILTIN(__builtin_ppc_setb, "LLiLLiLLi", "", "isa-v30-instructions") BUILTIN(__builtin_ppc_cmpb, "LLiLLiLLi", "") // Multiply BUILTIN(__builtin_ppc_mulhd, "LLiLiLi", "") BUILTIN(__builtin_ppc_mulhdu, "ULLiULiULi", "") BUILTIN(__builtin_ppc_mulhw, "iii", "") BUILTIN(__builtin_ppc_mulhwu, "UiUiUi", "") -BUILTIN(__builtin_ppc_maddhd, "LLiLLiLLiLLi", "") -BUILTIN(__builtin_ppc_maddhdu, "ULLiULLiULLiULLi", "") -BUILTIN(__builtin_ppc_maddld, "LLiLLiLLiLLi", "") +TARGET_BUILTIN(__builtin_ppc_maddhd, "LLiLLiLLiLLi", "", "isa-v30-instructions") +TARGET_BUILTIN(__builtin_ppc_maddhdu, "ULLiULLiULLiULLi", "", + "isa-v30-instructions") +TARGET_BUILTIN(__builtin_ppc_maddld, "LLiLLiLLiLLi", "", "isa-v30-instructions") // Rotate -BUILTIN(__builtin_ppc_rlwnm, "UiUiIUiIUi", "") +BUILTIN(__builtin_ppc_rlwnm, "UiUiUiIUi", "") BUILTIN(__builtin_ppc_rlwimi, "UiUiUiIUiIUi", "") BUILTIN(__builtin_ppc_rldimi, "ULLiULLiULLiIUiIULLi", "") // load -BUILTIN(__builtin_ppc_load2r, "UiUs*", "") +BUILTIN(__builtin_ppc_load2r, "UsUs*", "") BUILTIN(__builtin_ppc_load4r, "UiUi*", "") -BUILTIN(__builtin_ppc_load8r, "ULLiULLi*", "") +TARGET_BUILTIN(__builtin_ppc_load8r, "ULLiULLi*", "", "isa-v206-instructions") // store BUILTIN(__builtin_ppc_store2r, "vUiUs*", "") BUILTIN(__builtin_ppc_store4r, "vUiUi*", "") -BUILTIN(__builtin_ppc_store8r, "vULLiULLi*", "") -BUILTIN(__builtin_ppc_extract_exp, "Uid", "") -BUILTIN(__builtin_ppc_extract_sig, "ULLid", "") +TARGET_BUILTIN(__builtin_ppc_store8r, "vULLiULLi*", "", "isa-v206-instructions") +TARGET_BUILTIN(__builtin_ppc_extract_exp, "Uid", "", "power9-vector") +TARGET_BUILTIN(__builtin_ppc_extract_sig, "ULLid", "", "power9-vector") BUILTIN(__builtin_ppc_mtfsb0, "vUIi", "") BUILTIN(__builtin_ppc_mtfsb1, "vUIi", "") +BUILTIN(__builtin_ppc_mffs, "d", "") +TARGET_BUILTIN(__builtin_ppc_mffsl, "d", "", "isa-v30-instructions") BUILTIN(__builtin_ppc_mtfsf, "vUIiUi", "") BUILTIN(__builtin_ppc_mtfsfi, "vUIiUIi", "") -BUILTIN(__builtin_ppc_insert_exp, "ddULLi", "") +BUILTIN(__builtin_ppc_set_fpscr_rn, "di", "") +TARGET_BUILTIN(__builtin_ppc_insert_exp, "ddULLi", "", "power9-vector") BUILTIN(__builtin_ppc_fmsub, "dddd", "") BUILTIN(__builtin_ppc_fmsubs, "ffff", "") BUILTIN(__builtin_ppc_fnmadd, "dddd", "") @@ -138,589 +171,717 @@ BUILTIN(__builtin_ppc_fre, "dd", "") BUILTIN(__builtin_ppc_fres, "ff", "") BUILTIN(__builtin_ppc_dcbtstt, "vv*", "") BUILTIN(__builtin_ppc_dcbtt, "vv*", "") -BUILTIN(__builtin_ppc_mftbu, "Ui","") +BUILTIN(__builtin_ppc_mftbu, "Ui", "") BUILTIN(__builtin_ppc_mfmsr, "Ui", "") BUILTIN(__builtin_ppc_mfspr, "ULiIi", "") BUILTIN(__builtin_ppc_mtmsr, "vUi", "") BUILTIN(__builtin_ppc_mtspr, "vIiULi", "") BUILTIN(__builtin_ppc_stfiw, "viC*d", "") +TARGET_BUILTIN(__builtin_ppc_addex, "LLiLLiLLiCIi", "", "isa-v30-instructions") +// select +BUILTIN(__builtin_ppc_maxfe, "LdLdLdLd.", "t") +BUILTIN(__builtin_ppc_maxfl, "dddd.", "t") +BUILTIN(__builtin_ppc_maxfs, "ffff.", "t") +BUILTIN(__builtin_ppc_minfe, "LdLdLdLd.", "t") +BUILTIN(__builtin_ppc_minfl, "dddd.", "t") +BUILTIN(__builtin_ppc_minfs, "ffff.", "t") +// Floating Negative Absolute Value +BUILTIN(__builtin_ppc_fnabs, "dd", "") +BUILTIN(__builtin_ppc_fnabss, "ff", "") BUILTIN(__builtin_ppc_get_timebase, "ULLi", "n") // This is just a placeholder, the types and attributes are wrong. -BUILTIN(__builtin_altivec_vaddcuw, "V4UiV4UiV4Ui", "") - -BUILTIN(__builtin_altivec_vaddsbs, "V16ScV16ScV16Sc", "") -BUILTIN(__builtin_altivec_vaddubs, "V16UcV16UcV16Uc", "") -BUILTIN(__builtin_altivec_vaddshs, "V8SsV8SsV8Ss", "") -BUILTIN(__builtin_altivec_vadduhs, "V8UsV8UsV8Us", "") -BUILTIN(__builtin_altivec_vaddsws, "V4SiV4SiV4Si", "") -BUILTIN(__builtin_altivec_vadduws, "V4UiV4UiV4Ui", "") -BUILTIN(__builtin_altivec_vaddeuqm, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","") -BUILTIN(__builtin_altivec_vaddcuq, "V1ULLLiV1ULLLiV1ULLLi","") -BUILTIN(__builtin_altivec_vaddecuq, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","") -BUILTIN(__builtin_altivec_vadduqm, "V1ULLLiV16UcV16Uc","") - -BUILTIN(__builtin_altivec_vsubsbs, "V16ScV16ScV16Sc", "") -BUILTIN(__builtin_altivec_vsububs, "V16UcV16UcV16Uc", "") -BUILTIN(__builtin_altivec_vsubshs, "V8SsV8SsV8Ss", "") -BUILTIN(__builtin_altivec_vsubuhs, "V8UsV8UsV8Us", "") -BUILTIN(__builtin_altivec_vsubsws, "V4SiV4SiV4Si", "") -BUILTIN(__builtin_altivec_vsubuws, "V4UiV4UiV4Ui", "") -BUILTIN(__builtin_altivec_vsubeuqm, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","") -BUILTIN(__builtin_altivec_vsubcuq, "V1ULLLiV1ULLLiV1ULLLi","") -BUILTIN(__builtin_altivec_vsubecuq, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","") -BUILTIN(__builtin_altivec_vsubuqm, "V1ULLLiV16UcV16Uc","") - -BUILTIN(__builtin_altivec_vavgsb, "V16ScV16ScV16Sc", "") -BUILTIN(__builtin_altivec_vavgub, "V16UcV16UcV16Uc", "") -BUILTIN(__builtin_altivec_vavgsh, "V8SsV8SsV8Ss", "") -BUILTIN(__builtin_altivec_vavguh, "V8UsV8UsV8Us", "") -BUILTIN(__builtin_altivec_vavgsw, "V4SiV4SiV4Si", "") -BUILTIN(__builtin_altivec_vavguw, "V4UiV4UiV4Ui", "") - -BUILTIN(__builtin_altivec_vrfip, "V4fV4f", "") - -BUILTIN(__builtin_altivec_vcfsx, "V4fV4SiIi", "") -BUILTIN(__builtin_altivec_vcfux, "V4fV4UiIi", "") -BUILTIN(__builtin_altivec_vctsxs, "V4SiV4fIi", "") -BUILTIN(__builtin_altivec_vctuxs, "V4UiV4fIi", "") - -BUILTIN(__builtin_altivec_dss, "vUIi", "") -BUILTIN(__builtin_altivec_dssall, "v", "") -BUILTIN(__builtin_altivec_dst, "vvC*iUIi", "") -BUILTIN(__builtin_altivec_dstt, "vvC*iUIi", "") -BUILTIN(__builtin_altivec_dstst, "vvC*iUIi", "") -BUILTIN(__builtin_altivec_dststt, "vvC*iUIi", "") - -BUILTIN(__builtin_altivec_vexptefp, "V4fV4f", "") - -BUILTIN(__builtin_altivec_vrfim, "V4fV4f", "") - -BUILTIN(__builtin_altivec_lvx, "V4iLivC*", "") -BUILTIN(__builtin_altivec_lvxl, "V4iLivC*", "") -BUILTIN(__builtin_altivec_lvebx, "V16cLivC*", "") -BUILTIN(__builtin_altivec_lvehx, "V8sLivC*", "") -BUILTIN(__builtin_altivec_lvewx, "V4iLivC*", "") - -BUILTIN(__builtin_altivec_vlogefp, "V4fV4f", "") - -BUILTIN(__builtin_altivec_lvsl, "V16cUcvC*", "") -BUILTIN(__builtin_altivec_lvsr, "V16cUcvC*", "") - -BUILTIN(__builtin_altivec_vmaddfp, "V4fV4fV4fV4f", "") -BUILTIN(__builtin_altivec_vmhaddshs, "V8sV8sV8sV8s", "") -BUILTIN(__builtin_altivec_vmhraddshs, "V8sV8sV8sV8s", "") - -BUILTIN(__builtin_altivec_vmsumubm, "V4UiV16UcV16UcV4Ui", "") -BUILTIN(__builtin_altivec_vmsummbm, "V4SiV16ScV16UcV4Si", "") -BUILTIN(__builtin_altivec_vmsumuhm, "V4UiV8UsV8UsV4Ui", "") -BUILTIN(__builtin_altivec_vmsumshm, "V4SiV8SsV8SsV4Si", "") -BUILTIN(__builtin_altivec_vmsumuhs, "V4UiV8UsV8UsV4Ui", "") -BUILTIN(__builtin_altivec_vmsumshs, "V4SiV8SsV8SsV4Si", "") - -BUILTIN(__builtin_altivec_vmuleub, "V8UsV16UcV16Uc", "") -BUILTIN(__builtin_altivec_vmulesb, "V8SsV16ScV16Sc", "") -BUILTIN(__builtin_altivec_vmuleuh, "V4UiV8UsV8Us", "") -BUILTIN(__builtin_altivec_vmulesh, "V4SiV8SsV8Ss", "") -BUILTIN(__builtin_altivec_vmuleuw, "V2ULLiV4UiV4Ui", "") -BUILTIN(__builtin_altivec_vmulesw, "V2SLLiV4SiV4Si", "") -BUILTIN(__builtin_altivec_vmuloub, "V8UsV16UcV16Uc", "") -BUILTIN(__builtin_altivec_vmulosb, "V8SsV16ScV16Sc", "") -BUILTIN(__builtin_altivec_vmulouh, "V4UiV8UsV8Us", "") -BUILTIN(__builtin_altivec_vmulosh, "V4SiV8SsV8Ss", "") -BUILTIN(__builtin_altivec_vmulouw, "V2ULLiV4UiV4Ui", "") -BUILTIN(__builtin_altivec_vmulosw, "V2SLLiV4SiV4Si", "") -BUILTIN(__builtin_altivec_vmuleud, "V1ULLLiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_vmulesd, "V1SLLLiV2SLLiV2SLLi", "") -BUILTIN(__builtin_altivec_vmuloud, "V1ULLLiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_vmulosd, "V1SLLLiV2SLLiV2SLLi", "") -BUILTIN(__builtin_altivec_vmsumcud, "V1ULLLiV2ULLiV2ULLiV1ULLLi", "") - -BUILTIN(__builtin_altivec_vnmsubfp, "V4fV4fV4fV4f", "") - -BUILTIN(__builtin_altivec_vpkpx, "V8sV4UiV4Ui", "") -BUILTIN(__builtin_altivec_vpkuhus, "V16UcV8UsV8Us", "") -BUILTIN(__builtin_altivec_vpkshss, "V16ScV8SsV8Ss", "") -BUILTIN(__builtin_altivec_vpkuwus, "V8UsV4UiV4Ui", "") -BUILTIN(__builtin_altivec_vpkswss, "V8SsV4SiV4Si", "") -BUILTIN(__builtin_altivec_vpkshus, "V16UcV8SsV8Ss", "") -BUILTIN(__builtin_altivec_vpkswus, "V8UsV4SiV4Si", "") -BUILTIN(__builtin_altivec_vpksdss, "V4SiV2SLLiV2SLLi", "") -BUILTIN(__builtin_altivec_vpksdus, "V4UiV2SLLiV2SLLi", "") -BUILTIN(__builtin_altivec_vpkudus, "V4UiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_vpkudum, "V4UiV2ULLiV2ULLi", "") - -BUILTIN(__builtin_altivec_vperm_4si, "V4iV4iV4iV16Uc", "") - -BUILTIN(__builtin_altivec_stvx, "vV4iLiv*", "") -BUILTIN(__builtin_altivec_stvxl, "vV4iLiv*", "") -BUILTIN(__builtin_altivec_stvebx, "vV16cLiv*", "") -BUILTIN(__builtin_altivec_stvehx, "vV8sLiv*", "") -BUILTIN(__builtin_altivec_stvewx, "vV4iLiv*", "") - -BUILTIN(__builtin_altivec_vcmpbfp, "V4iV4fV4f", "") - -BUILTIN(__builtin_altivec_vcmpgefp, "V4iV4fV4f", "") - -BUILTIN(__builtin_altivec_vcmpequb, "V16cV16cV16c", "") -BUILTIN(__builtin_altivec_vcmpequh, "V8sV8sV8s", "") -BUILTIN(__builtin_altivec_vcmpequw, "V4iV4iV4i", "") -BUILTIN(__builtin_altivec_vcmpequd, "V2LLiV2LLiV2LLi", "") -BUILTIN(__builtin_altivec_vcmpeqfp, "V4iV4fV4f", "") - -BUILTIN(__builtin_altivec_vcmpneb, "V16cV16cV16c", "") -BUILTIN(__builtin_altivec_vcmpneh, "V8sV8sV8s", "") -BUILTIN(__builtin_altivec_vcmpnew, "V4iV4iV4i", "") - -BUILTIN(__builtin_altivec_vcmpnezb, "V16cV16cV16c", "") -BUILTIN(__builtin_altivec_vcmpnezh, "V8sV8sV8s", "") -BUILTIN(__builtin_altivec_vcmpnezw, "V4iV4iV4i", "") - -BUILTIN(__builtin_altivec_vcmpgtsb, "V16cV16ScV16Sc", "") -BUILTIN(__builtin_altivec_vcmpgtub, "V16cV16UcV16Uc", "") -BUILTIN(__builtin_altivec_vcmpgtsh, "V8sV8SsV8Ss", "") -BUILTIN(__builtin_altivec_vcmpgtuh, "V8sV8UsV8Us", "") -BUILTIN(__builtin_altivec_vcmpgtsw, "V4iV4SiV4Si", "") -BUILTIN(__builtin_altivec_vcmpgtuw, "V4iV4UiV4Ui", "") -BUILTIN(__builtin_altivec_vcmpgtsd, "V2LLiV2LLiV2LLi", "") -BUILTIN(__builtin_altivec_vcmpgtud, "V2LLiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_vcmpgtfp, "V4iV4fV4f", "") +TARGET_BUILTIN(__builtin_altivec_vaddcuw, "V4UiV4UiV4Ui", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vaddsbs, "V16ScV16ScV16Sc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vaddubs, "V16UcV16UcV16Uc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vaddshs, "V8SsV8SsV8Ss", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vadduhs, "V8UsV8UsV8Us", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vaddsws, "V4SiV4SiV4Si", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vadduws, "V4UiV4UiV4Ui", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vaddeuqm, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vaddcuq, "V1ULLLiV1ULLLiV1ULLLi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vaddecuq, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vadduqm, "V1ULLLiV16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vaddeuqm_c, "V16UcV16UcV16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vaddcuq_c, "V16UcV16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vaddecuq_c, "V16UcV16UcV16UcV16Uc", "", + "power8-vector") + +TARGET_BUILTIN(__builtin_altivec_vsubsbs, "V16ScV16ScV16Sc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vsububs, "V16UcV16UcV16Uc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vsubshs, "V8SsV8SsV8Ss", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vsubuhs, "V8UsV8UsV8Us", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vsubsws, "V4SiV4SiV4Si", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vsubuws, "V4UiV4UiV4Ui", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vsubeuqm, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vsubcuq, "V1ULLLiV1ULLLiV1ULLLi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vsubecuq, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vsubuqm, "V1ULLLiV16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vsubeuqm_c, "V16UcV16UcV16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vsubcuq_c, "V16UcV16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vsubecuq_c, "V16UcV16UcV16UcV16Uc", "", + "power8-vector") + +TARGET_BUILTIN(__builtin_altivec_vavgsb, "V16ScV16ScV16Sc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vavgub, "V16UcV16UcV16Uc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vavgsh, "V8SsV8SsV8Ss", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vavguh, "V8UsV8UsV8Us", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vavgsw, "V4SiV4SiV4Si", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vavguw, "V4UiV4UiV4Ui", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vrfip, "V4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vcfsx, "V4fV4SiIi", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcfux, "V4fV4UiIi", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vctsxs, "V4SiV4fIi", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vctuxs, "V4UiV4fIi", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_dss, "vUIi", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_dssall, "v", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_dst, "vvC*iUIi", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_dstt, "vvC*iUIi", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_dstst, "vvC*iUIi", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_dststt, "vvC*iUIi", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vexptefp, "V4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vrfim, "V4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_lvx, "V4iLivC*", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_lvxl, "V4iLivC*", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_lvebx, "V16cLivC*", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_lvehx, "V8sLivC*", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_lvewx, "V4iLivC*", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vlogefp, "V4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_lvsl, "V16cUcvC*", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_lvsr, "V16cUcvC*", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vmaddfp, "V4fV4fV4fV4f", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmhaddshs, "V8sV8sV8sV8s", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmhraddshs, "V8sV8sV8sV8s", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vmsumubm, "V4UiV16UcV16UcV4Ui", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmsummbm, "V4SiV16ScV16UcV4Si", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmsumuhm, "V4UiV8UsV8UsV4Ui", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmsumshm, "V4SiV8SsV8SsV4Si", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmsumuhs, "V4UiV8UsV8UsV4Ui", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmsumshs, "V4SiV8SsV8SsV4Si", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vmuleub, "V8UsV16UcV16Uc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmulesb, "V8SsV16ScV16Sc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmuleuh, "V4UiV8UsV8Us", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmulesh, "V4SiV8SsV8Ss", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmuleuw, "V2ULLiV4UiV4Ui", "", "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vmulesw, "V2SLLiV4SiV4Si", "", "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vmuloub, "V8UsV16UcV16Uc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmulosb, "V8SsV16ScV16Sc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmulouh, "V4UiV8UsV8Us", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmulosh, "V4SiV8SsV8Ss", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmulouw, "V2ULLiV4UiV4Ui", "", "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vmulosw, "V2SLLiV4SiV4Si", "", "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vmuleud, "V1ULLLiV2ULLiV2ULLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vmulesd, "V1SLLLiV2SLLiV2SLLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vmuloud, "V1ULLLiV2ULLiV2ULLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vmulosd, "V1SLLLiV2SLLiV2SLLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vmsumcud, "V1ULLLiV2ULLiV2ULLiV1ULLLi", "", + "power10-vector") + +TARGET_BUILTIN(__builtin_altivec_vnmsubfp, "V4fV4fV4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vpkpx, "V8sV4UiV4Ui", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vpkuhus, "V16UcV8UsV8Us", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vpkshss, "V16ScV8SsV8Ss", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vpkuwus, "V8UsV4UiV4Ui", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vpkswss, "V8SsV4SiV4Si", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vpkshus, "V16UcV8SsV8Ss", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vpkswus, "V8UsV4SiV4Si", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vpksdss, "V4SiV2SLLiV2SLLi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vpksdus, "V4UiV2SLLiV2SLLi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vpkudus, "V4UiV2ULLiV2ULLi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vpkudum, "V4UiV2ULLiV2ULLi", "", + "power8-vector") + +TARGET_BUILTIN(__builtin_altivec_vperm_4si, "V4iV4iV4iV16Uc", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_stvx, "vV4iLiv*", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_stvxl, "vV4iLiv*", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_stvebx, "vV16cLiv*", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_stvehx, "vV8sLiv*", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_stvewx, "vV4iLiv*", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vcmpbfp, "V4iV4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vcmpgefp, "V4iV4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vcmpequb, "V16cV16cV16c", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpequh, "V8sV8sV8s", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpequw, "V4iV4iV4i", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpequd, "V2LLiV2LLiV2LLi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vcmpeqfp, "V4iV4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vcmpneb, "V16cV16cV16c", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vcmpneh, "V8sV8sV8s", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vcmpnew, "V4iV4iV4i", "", "power9-vector") + +TARGET_BUILTIN(__builtin_altivec_vcmpnezb, "V16cV16cV16c", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vcmpnezh, "V8sV8sV8s", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vcmpnezw, "V4iV4iV4i", "", "power9-vector") + +TARGET_BUILTIN(__builtin_altivec_vcmpgtsb, "V16cV16ScV16Sc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpgtub, "V16cV16UcV16Uc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpgtsh, "V8sV8SsV8Ss", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpgtuh, "V8sV8UsV8Us", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpgtsw, "V4iV4SiV4Si", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpgtuw, "V4iV4UiV4Ui", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpgtsd, "V2LLiV2LLiV2LLi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vcmpgtud, "V2LLiV2ULLiV2ULLi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vcmpgtfp, "V4iV4fV4f", "", "altivec") // P10 Vector compare builtins. -BUILTIN(__builtin_altivec_vcmpequq, "V1LLLiV1ULLLiV1ULLLi", "") -BUILTIN(__builtin_altivec_vcmpgtsq, "V1LLLiV1SLLLiV1SLLLi", "") -BUILTIN(__builtin_altivec_vcmpgtuq, "V1LLLiV1ULLLiV1ULLLi", "") -BUILTIN(__builtin_altivec_vcmpequq_p, "iiV1ULLLiV1LLLi", "") -BUILTIN(__builtin_altivec_vcmpgtsq_p, "iiV1SLLLiV1SLLLi", "") -BUILTIN(__builtin_altivec_vcmpgtuq_p, "iiV1ULLLiV1ULLLi", "") - -BUILTIN(__builtin_altivec_vmaxsb, "V16ScV16ScV16Sc", "") -BUILTIN(__builtin_altivec_vmaxub, "V16UcV16UcV16Uc", "") -BUILTIN(__builtin_altivec_vmaxsh, "V8SsV8SsV8Ss", "") -BUILTIN(__builtin_altivec_vmaxuh, "V8UsV8UsV8Us", "") -BUILTIN(__builtin_altivec_vmaxsw, "V4SiV4SiV4Si", "") -BUILTIN(__builtin_altivec_vmaxuw, "V4UiV4UiV4Ui", "") -BUILTIN(__builtin_altivec_vmaxsd, "V2LLiV2LLiV2LLi", "") -BUILTIN(__builtin_altivec_vmaxud, "V2ULLiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_vmaxfp, "V4fV4fV4f", "") - -BUILTIN(__builtin_altivec_mfvscr, "V8Us", "") - -BUILTIN(__builtin_altivec_vminsb, "V16ScV16ScV16Sc", "") -BUILTIN(__builtin_altivec_vminub, "V16UcV16UcV16Uc", "") -BUILTIN(__builtin_altivec_vminsh, "V8SsV8SsV8Ss", "") -BUILTIN(__builtin_altivec_vminuh, "V8UsV8UsV8Us", "") -BUILTIN(__builtin_altivec_vminsw, "V4SiV4SiV4Si", "") -BUILTIN(__builtin_altivec_vminuw, "V4UiV4UiV4Ui", "") -BUILTIN(__builtin_altivec_vminsd, "V2LLiV2LLiV2LLi", "") -BUILTIN(__builtin_altivec_vminud, "V2ULLiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_vminfp, "V4fV4fV4f", "") - -BUILTIN(__builtin_altivec_mtvscr, "vV4i", "") - -BUILTIN(__builtin_altivec_vrefp, "V4fV4f", "") - -BUILTIN(__builtin_altivec_vrlb, "V16cV16cV16Uc", "") -BUILTIN(__builtin_altivec_vrlh, "V8sV8sV8Us", "") -BUILTIN(__builtin_altivec_vrlw, "V4iV4iV4Ui", "") -BUILTIN(__builtin_altivec_vrld, "V2LLiV2LLiV2ULLi", "") - -BUILTIN(__builtin_altivec_vsel_4si, "V4iV4iV4iV4Ui", "") - -BUILTIN(__builtin_altivec_vsl, "V4iV4iV4i", "") -BUILTIN(__builtin_altivec_vslo, "V4iV4iV4i", "") - -BUILTIN(__builtin_altivec_vsrab, "V16cV16cV16Uc", "") -BUILTIN(__builtin_altivec_vsrah, "V8sV8sV8Us", "") -BUILTIN(__builtin_altivec_vsraw, "V4iV4iV4Ui", "") - -BUILTIN(__builtin_altivec_vsr, "V4iV4iV4i", "") -BUILTIN(__builtin_altivec_vsro, "V4iV4iV4i", "") - -BUILTIN(__builtin_altivec_vrfin, "V4fV4f", "") - -BUILTIN(__builtin_altivec_vrsqrtefp, "V4fV4f", "") - -BUILTIN(__builtin_altivec_vsubcuw, "V4UiV4UiV4Ui", "") - -BUILTIN(__builtin_altivec_vsum4sbs, "V4SiV16ScV4Si", "") -BUILTIN(__builtin_altivec_vsum4ubs, "V4UiV16UcV4Ui", "") -BUILTIN(__builtin_altivec_vsum4shs, "V4SiV8SsV4Si", "") - -BUILTIN(__builtin_altivec_vsum2sws, "V4SiV4SiV4Si", "") - -BUILTIN(__builtin_altivec_vsumsws, "V4SiV4SiV4Si", "") - -BUILTIN(__builtin_altivec_vrfiz, "V4fV4f", "") - -BUILTIN(__builtin_altivec_vupkhsb, "V8sV16c", "") -BUILTIN(__builtin_altivec_vupkhpx, "V4UiV8s", "") -BUILTIN(__builtin_altivec_vupkhsh, "V4iV8s", "") -BUILTIN(__builtin_altivec_vupkhsw, "V2LLiV4i", "") - -BUILTIN(__builtin_altivec_vupklsb, "V8sV16c", "") -BUILTIN(__builtin_altivec_vupklpx, "V4UiV8s", "") -BUILTIN(__builtin_altivec_vupklsh, "V4iV8s", "") -BUILTIN(__builtin_altivec_vupklsw, "V2LLiV4i", "") - -BUILTIN(__builtin_altivec_vcmpbfp_p, "iiV4fV4f", "") - -BUILTIN(__builtin_altivec_vcmpgefp_p, "iiV4fV4f", "") - -BUILTIN(__builtin_altivec_vcmpequb_p, "iiV16cV16c", "") -BUILTIN(__builtin_altivec_vcmpequh_p, "iiV8sV8s", "") -BUILTIN(__builtin_altivec_vcmpequw_p, "iiV4iV4i", "") -BUILTIN(__builtin_altivec_vcmpequd_p, "iiV2LLiV2LLi", "") -BUILTIN(__builtin_altivec_vcmpeqfp_p, "iiV4fV4f", "") - -BUILTIN(__builtin_altivec_vcmpneb_p, "iiV16cV16c", "") -BUILTIN(__builtin_altivec_vcmpneh_p, "iiV8sV8s", "") -BUILTIN(__builtin_altivec_vcmpnew_p, "iiV4iV4i", "") -BUILTIN(__builtin_altivec_vcmpned_p, "iiV2LLiV2LLi", "") - -BUILTIN(__builtin_altivec_vcmpgtsb_p, "iiV16ScV16Sc", "") -BUILTIN(__builtin_altivec_vcmpgtub_p, "iiV16UcV16Uc", "") -BUILTIN(__builtin_altivec_vcmpgtsh_p, "iiV8SsV8Ss", "") -BUILTIN(__builtin_altivec_vcmpgtuh_p, "iiV8UsV8Us", "") -BUILTIN(__builtin_altivec_vcmpgtsw_p, "iiV4SiV4Si", "") -BUILTIN(__builtin_altivec_vcmpgtuw_p, "iiV4UiV4Ui", "") -BUILTIN(__builtin_altivec_vcmpgtsd_p, "iiV2LLiV2LLi", "") -BUILTIN(__builtin_altivec_vcmpgtud_p, "iiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_vcmpgtfp_p, "iiV4fV4f", "") +TARGET_BUILTIN(__builtin_altivec_vcmpequq, "V1LLLiV1ULLLiV1ULLLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vcmpgtsq, "V1LLLiV1SLLLiV1SLLLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vcmpgtuq, "V1LLLiV1ULLLiV1ULLLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vcmpequq_p, "iiV1ULLLiV1LLLi", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpgtsq_p, "iiV1SLLLiV1SLLLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vcmpgtuq_p, "iiV1ULLLiV1ULLLi", "", + "power10-vector") + +TARGET_BUILTIN(__builtin_altivec_vmaxsb, "V16ScV16ScV16Sc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmaxub, "V16UcV16UcV16Uc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmaxsh, "V8SsV8SsV8Ss", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmaxuh, "V8UsV8UsV8Us", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmaxsw, "V4SiV4SiV4Si", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmaxuw, "V4UiV4UiV4Ui", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vmaxsd, "V2LLiV2LLiV2LLi", "", "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vmaxud, "V2ULLiV2ULLiV2ULLi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vmaxfp, "V4fV4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_mfvscr, "V8Us", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vminsb, "V16ScV16ScV16Sc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vminub, "V16UcV16UcV16Uc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vminsh, "V8SsV8SsV8Ss", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vminuh, "V8UsV8UsV8Us", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vminsw, "V4SiV4SiV4Si", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vminuw, "V4UiV4UiV4Ui", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vminsd, "V2LLiV2LLiV2LLi", "", "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vminud, "V2ULLiV2ULLiV2ULLi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vminfp, "V4fV4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_mtvscr, "vV4i", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vrefp, "V4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vrlb, "V16cV16cV16Uc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vrlh, "V8sV8sV8Us", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vrlw, "V4iV4iV4Ui", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vrld, "V2LLiV2LLiV2ULLi", "", "power8-vector") + +TARGET_BUILTIN(__builtin_altivec_vsel_4si, "V4iV4iV4iV4Ui", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vsl, "V4iV4iV4i", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vslo, "V4iV4iV4i", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vsrab, "V16cV16cV16Uc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vsrah, "V8sV8sV8Us", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vsraw, "V4iV4iV4Ui", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vsr, "V4iV4iV4i", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vsro, "V4iV4iV4i", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vrfin, "V4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vrsqrtefp, "V4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vsubcuw, "V4UiV4UiV4Ui", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vsum4sbs, "V4SiV16ScV4Si", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vsum4ubs, "V4UiV16UcV4Ui", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vsum4shs, "V4SiV8SsV4Si", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vsum2sws, "V4SiV4SiV4Si", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vsumsws, "V4SiV4SiV4Si", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vrfiz, "V4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vupkhsb, "V8sV16c", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vupkhpx, "V4UiV8s", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vupkhsh, "V4iV8s", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vupkhsw, "V2LLiV4i", "", "power8-vector") + +TARGET_BUILTIN(__builtin_altivec_vupklsb, "V8sV16c", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vupklpx, "V4UiV8s", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vupklsh, "V4iV8s", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vupklsw, "V2LLiV4i", "", "power8-vector") + +TARGET_BUILTIN(__builtin_altivec_vcmpbfp_p, "iiV4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vcmpgefp_p, "iiV4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vcmpequb_p, "iiV16cV16c", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpequh_p, "iiV8sV8s", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpequw_p, "iiV4iV4i", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpequd_p, "iiV2LLiV2LLi", "", "vsx") +TARGET_BUILTIN(__builtin_altivec_vcmpeqfp_p, "iiV4fV4f", "", "altivec") + +TARGET_BUILTIN(__builtin_altivec_vcmpneb_p, "iiV16cV16c", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vcmpneh_p, "iiV8sV8s", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vcmpnew_p, "iiV4iV4i", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vcmpned_p, "iiV2LLiV2LLi", "", "vsx") + +TARGET_BUILTIN(__builtin_altivec_vcmpgtsb_p, "iiV16ScV16Sc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpgtub_p, "iiV16UcV16Uc", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpgtsh_p, "iiV8SsV8Ss", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpgtuh_p, "iiV8UsV8Us", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpgtsw_p, "iiV4SiV4Si", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpgtuw_p, "iiV4UiV4Ui", "", "altivec") +TARGET_BUILTIN(__builtin_altivec_vcmpgtsd_p, "iiV2LLiV2LLi", "", "vsx") +TARGET_BUILTIN(__builtin_altivec_vcmpgtud_p, "iiV2ULLiV2ULLi", "", "vsx") +TARGET_BUILTIN(__builtin_altivec_vcmpgtfp_p, "iiV4fV4f", "", "altivec") -BUILTIN(__builtin_altivec_vgbbd, "V16UcV16Uc", "") -BUILTIN(__builtin_altivec_vbpermq, "V2ULLiV16UcV16Uc", "") +TARGET_BUILTIN(__builtin_altivec_vgbbd, "V16UcV16Uc", "", "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vbpermq, "V2ULLiV16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vbpermd, "V2ULLiV2ULLiV16Uc", "", + "power9-vector") // P8 Crypto built-ins. -BUILTIN(__builtin_altivec_crypto_vsbox, "V2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_crypto_vpermxor, "V16UcV16UcV16UcV16Uc", "") -BUILTIN(__builtin_altivec_crypto_vshasigmaw, "V4UiV4UiIiIi", "") -BUILTIN(__builtin_altivec_crypto_vshasigmad, "V2ULLiV2ULLiIiIi", "") -BUILTIN(__builtin_altivec_crypto_vcipher, "V2ULLiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_crypto_vcipherlast, "V2ULLiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_crypto_vncipher, "V2ULLiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_crypto_vncipherlast, "V2ULLiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_crypto_vpmsumb, "V16UcV16UcV16Uc", "") -BUILTIN(__builtin_altivec_crypto_vpmsumh, "V8UsV8UsV8Us", "") -BUILTIN(__builtin_altivec_crypto_vpmsumw, "V4UiV4UiV4Ui", "") -BUILTIN(__builtin_altivec_crypto_vpmsumd, "V2ULLiV2ULLiV2ULLi", "") - -BUILTIN(__builtin_altivec_vclzb, "V16UcV16Uc", "") -BUILTIN(__builtin_altivec_vclzh, "V8UsV8Us", "") -BUILTIN(__builtin_altivec_vclzw, "V4UiV4Ui", "") -BUILTIN(__builtin_altivec_vclzd, "V2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_vctzb, "V16UcV16Uc", "") -BUILTIN(__builtin_altivec_vctzh, "V8UsV8Us", "") -BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "") -BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "") - -BUILTIN(__builtin_altivec_vclzlsbb, "SiV16Uc", "") -BUILTIN(__builtin_altivec_vctzlsbb, "SiV16Uc", "") -BUILTIN(__builtin_altivec_vprtybw, "V4UiV4Ui", "") -BUILTIN(__builtin_altivec_vprtybd, "V2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_vprtybq, "V1ULLLiV1ULLLi", "") +TARGET_BUILTIN(__builtin_altivec_crypto_vsbox, "V16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_crypto_vpermxor, "V16UcV16UcV16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_crypto_vpermxor_be, "V16UcV16UcV16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_crypto_vshasigmaw, "V4UiV4UiIiIi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_crypto_vshasigmad, "V2ULLiV2ULLiIiIi", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_crypto_vcipher, "V16UcV16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_crypto_vcipherlast, "V16UcV16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_crypto_vncipher, "V16UcV16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_crypto_vncipherlast, "V16UcV16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_crypto_vpmsumb, "V16UcV16UcV16Uc", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_crypto_vpmsumh, "V8UsV8UsV8Us", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_crypto_vpmsumw, "V4UiV4UiV4Ui", "", + "power8-vector") +TARGET_BUILTIN(__builtin_altivec_crypto_vpmsumd, "V2ULLiV2ULLiV2ULLi", "", + "power8-vector") + +TARGET_BUILTIN(__builtin_altivec_vclzb, "V16UcV16Uc", "", "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vclzh, "V8UsV8Us", "", "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vclzw, "V4UiV4Ui", "", "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vclzd, "V2ULLiV2ULLi", "", "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vctzb, "V16UcV16Uc", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vctzh, "V8UsV8Us", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "", "power9-vector") + +// P8 BCD builtins. +TARGET_BUILTIN(__builtin_ppc_bcdadd, "V16UcV16UcV16UcIi", "", + "isa-v207-instructions") +TARGET_BUILTIN(__builtin_ppc_bcdsub, "V16UcV16UcV16UcIi", "", + "isa-v207-instructions") +TARGET_BUILTIN(__builtin_ppc_bcdadd_p, "iiV16UcV16Uc", "", + "isa-v207-instructions") +TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "", + "isa-v207-instructions") + +TARGET_BUILTIN(__builtin_altivec_vclzlsbb, "SiV16Uc", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vctzlsbb, "SiV16Uc", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vprtybw, "V4UiV4Ui", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vprtybd, "V2ULLiV2ULLi", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vprtybq, "V1ULLLiV1ULLLi", "", "power9-vector") // Vector population count built-ins -BUILTIN(__builtin_altivec_vpopcntb, "V16UcV16Uc", "") -BUILTIN(__builtin_altivec_vpopcnth, "V8UsV8Us", "") -BUILTIN(__builtin_altivec_vpopcntw, "V4UiV4Ui", "") -BUILTIN(__builtin_altivec_vpopcntd, "V2ULLiV2ULLi", "") +TARGET_BUILTIN(__builtin_altivec_vpopcntb, "V16UcV16Uc", "", "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vpopcnth, "V8UsV8Us", "", "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vpopcntw, "V4UiV4Ui", "", "power8-vector") +TARGET_BUILTIN(__builtin_altivec_vpopcntd, "V2ULLiV2ULLi", "", "power8-vector") // Absolute difference built-ins -BUILTIN(__builtin_altivec_vabsdub, "V16UcV16UcV16Uc", "") -BUILTIN(__builtin_altivec_vabsduh, "V8UsV8UsV8Us", "") -BUILTIN(__builtin_altivec_vabsduw, "V4UiV4UiV4Ui", "") +TARGET_BUILTIN(__builtin_altivec_vabsdub, "V16UcV16UcV16Uc", "", + "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vabsduh, "V8UsV8UsV8Us", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vabsduw, "V4UiV4UiV4Ui", "", "power9-vector") // P9 Shift built-ins. -BUILTIN(__builtin_altivec_vslv, "V16UcV16UcV16Uc", "") -BUILTIN(__builtin_altivec_vsrv, "V16UcV16UcV16Uc", "") +TARGET_BUILTIN(__builtin_altivec_vslv, "V16UcV16UcV16Uc", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vsrv, "V16UcV16UcV16Uc", "", "power9-vector") // P9 Vector rotate built-ins -BUILTIN(__builtin_altivec_vrlwmi, "V4UiV4UiV4UiV4Ui", "") -BUILTIN(__builtin_altivec_vrldmi, "V2ULLiV2ULLiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_vrlwnm, "V4UiV4UiV4Ui", "") -BUILTIN(__builtin_altivec_vrldnm, "V2ULLiV2ULLiV2ULLi", "") +TARGET_BUILTIN(__builtin_altivec_vrlwmi, "V4UiV4UiV4UiV4Ui", "", + "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vrldmi, "V2ULLiV2ULLiV2ULLiV2ULLi", "", + "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vrlwnm, "V4UiV4UiV4Ui", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vrldnm, "V2ULLiV2ULLiV2ULLi", "", + "power9-vector") // P9 Vector extend sign builtins. -BUILTIN(__builtin_altivec_vextsb2w, "V4SiV16Sc", "") -BUILTIN(__builtin_altivec_vextsb2d, "V2SLLiV16Sc", "") -BUILTIN(__builtin_altivec_vextsh2w, "V4SiV8Ss", "") -BUILTIN(__builtin_altivec_vextsh2d, "V2SLLiV8Ss", "") -BUILTIN(__builtin_altivec_vextsw2d, "V2SLLiV4Si", "") +TARGET_BUILTIN(__builtin_altivec_vextsb2w, "V4SiV16Sc", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vextsb2d, "V2SLLiV16Sc", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vextsh2w, "V4SiV8Ss", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vextsh2d, "V2SLLiV8Ss", "", "power9-vector") +TARGET_BUILTIN(__builtin_altivec_vextsw2d, "V2SLLiV4Si", "", "power9-vector") // P10 Vector extend sign builtins. -BUILTIN(__builtin_altivec_vextsd2q, "V1SLLLiV2SLLi", "") +TARGET_BUILTIN(__builtin_altivec_vextsd2q, "V1SLLLiV2SLLi", "", + "power10-vector") // P10 Vector Extract with Mask built-ins. -BUILTIN(__builtin_altivec_vextractbm, "UiV16Uc", "") -BUILTIN(__builtin_altivec_vextracthm, "UiV8Us", "") -BUILTIN(__builtin_altivec_vextractwm, "UiV4Ui", "") -BUILTIN(__builtin_altivec_vextractdm, "UiV2ULLi", "") -BUILTIN(__builtin_altivec_vextractqm, "UiV1ULLLi", "") +TARGET_BUILTIN(__builtin_altivec_vextractbm, "UiV16Uc", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vextracthm, "UiV8Us", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vextractwm, "UiV4Ui", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vextractdm, "UiV2ULLi", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vextractqm, "UiV1ULLLi", "", "power10-vector") // P10 Vector Divide Extended built-ins. -BUILTIN(__builtin_altivec_vdivesw, "V4SiV4SiV4Si", "") -BUILTIN(__builtin_altivec_vdiveuw, "V4UiV4UiV4Ui", "") -BUILTIN(__builtin_altivec_vdivesd, "V2LLiV2LLiV2LLi", "") -BUILTIN(__builtin_altivec_vdiveud, "V2ULLiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_vdivesq, "V1SLLLiV1SLLLiV1SLLLi", "") -BUILTIN(__builtin_altivec_vdiveuq, "V1ULLLiV1ULLLiV1ULLLi", "") +TARGET_BUILTIN(__builtin_altivec_vdivesw, "V4SiV4SiV4Si", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vdiveuw, "V4UiV4UiV4Ui", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vdivesd, "V2LLiV2LLiV2LLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vdiveud, "V2ULLiV2ULLiV2ULLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vdivesq, "V1SLLLiV1SLLLiV1SLLLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vdiveuq, "V1ULLLiV1ULLLiV1ULLLi", "", + "power10-vector") // P10 Vector Multiply High built-ins. -BUILTIN(__builtin_altivec_vmulhsw, "V4SiV4SiV4Si", "") -BUILTIN(__builtin_altivec_vmulhuw, "V4UiV4UiV4Ui", "") -BUILTIN(__builtin_altivec_vmulhsd, "V2LLiV2LLiV2LLi", "") -BUILTIN(__builtin_altivec_vmulhud, "V2ULLiV2ULLiV2ULLi", "") +TARGET_BUILTIN(__builtin_altivec_vmulhsw, "V4SiV4SiV4Si", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vmulhuw, "V4UiV4UiV4Ui", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vmulhsd, "V2LLiV2LLiV2LLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vmulhud, "V2ULLiV2ULLiV2ULLi", "", + "power10-vector") // P10 Vector Expand with Mask built-ins. -BUILTIN(__builtin_altivec_vexpandbm, "V16UcV16Uc", "") -BUILTIN(__builtin_altivec_vexpandhm, "V8UsV8Us", "") -BUILTIN(__builtin_altivec_vexpandwm, "V4UiV4Ui", "") -BUILTIN(__builtin_altivec_vexpanddm, "V2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_vexpandqm, "V1ULLLiV1ULLLi", "") +TARGET_BUILTIN(__builtin_altivec_vexpandbm, "V16UcV16Uc", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vexpandhm, "V8UsV8Us", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vexpandwm, "V4UiV4Ui", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vexpanddm, "V2ULLiV2ULLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vexpandqm, "V1ULLLiV1ULLLi", "", + "power10-vector") // P10 Vector Count with Mask built-ins. -BUILTIN(__builtin_altivec_vcntmbb, "ULLiV16UcUi", "") -BUILTIN(__builtin_altivec_vcntmbh, "ULLiV8UsUi", "") -BUILTIN(__builtin_altivec_vcntmbw, "ULLiV4UiUi", "") -BUILTIN(__builtin_altivec_vcntmbd, "ULLiV2ULLiUi", "") +TARGET_BUILTIN(__builtin_altivec_vcntmbb, "ULLiV16UcUi", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vcntmbh, "ULLiV8UsUi", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vcntmbw, "ULLiV4UiUi", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vcntmbd, "ULLiV2ULLiUi", "", "power10-vector") // P10 Move to VSR with Mask built-ins. -BUILTIN(__builtin_altivec_mtvsrbm, "V16UcULLi", "") -BUILTIN(__builtin_altivec_mtvsrhm, "V8UsULLi", "") -BUILTIN(__builtin_altivec_mtvsrwm, "V4UiULLi", "") -BUILTIN(__builtin_altivec_mtvsrdm, "V2ULLiULLi", "") -BUILTIN(__builtin_altivec_mtvsrqm, "V1ULLLiULLi", "") +TARGET_BUILTIN(__builtin_altivec_mtvsrbm, "V16UcULLi", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_mtvsrhm, "V8UsULLi", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_mtvsrwm, "V4UiULLi", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_mtvsrdm, "V2ULLiULLi", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_mtvsrqm, "V1ULLLiULLi", "", "power10-vector") // P10 Vector Parallel Bits built-ins. -BUILTIN(__builtin_altivec_vpdepd, "V2ULLiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_vpextd, "V2ULLiV2ULLiV2ULLi", "") +TARGET_BUILTIN(__builtin_altivec_vpdepd, "V2ULLiV2ULLiV2ULLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vpextd, "V2ULLiV2ULLiV2ULLi", "", + "power10-vector") // P10 Vector String Isolate Built-ins. -BUILTIN(__builtin_altivec_vstribr, "V16cV16c", "") -BUILTIN(__builtin_altivec_vstribl, "V16cV16c", "") -BUILTIN(__builtin_altivec_vstrihr, "V8sV8s", "") -BUILTIN(__builtin_altivec_vstrihl, "V8sV8s", "") -BUILTIN(__builtin_altivec_vstribr_p, "iiV16c", "") -BUILTIN(__builtin_altivec_vstribl_p, "iiV16c", "") -BUILTIN(__builtin_altivec_vstrihr_p, "iiV8s", "") -BUILTIN(__builtin_altivec_vstrihl_p, "iiV8s", "") +TARGET_BUILTIN(__builtin_altivec_vstribr, "V16UcV16Uc", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vstribl, "V16UcV16Uc", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vstrihr, "V8sV8s", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vstrihl, "V8sV8s", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vstribr_p, "iiV16Uc", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vstribl_p, "iiV16Uc", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vstrihr_p, "iiV8s", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vstrihl_p, "iiV8s", "", "power10-vector") // P10 Vector Centrifuge built-in. -BUILTIN(__builtin_altivec_vcfuged, "V2ULLiV2ULLiV2ULLi", "") +TARGET_BUILTIN(__builtin_altivec_vcfuged, "V2ULLiV2ULLiV2ULLi", "", + "power10-vector") // P10 Vector Gather Every N-th Bit built-in. -BUILTIN(__builtin_altivec_vgnb, "ULLiV1ULLLiIi", "") +TARGET_BUILTIN(__builtin_altivec_vgnb, "ULLiV1ULLLiIi", "", "power10-vector") // P10 Vector Clear Bytes built-ins. -BUILTIN(__builtin_altivec_vclrlb, "V16cV16cUi", "") -BUILTIN(__builtin_altivec_vclrrb, "V16cV16cUi", "") +TARGET_BUILTIN(__builtin_altivec_vclrlb, "V16UcV16UcUi", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vclrrb, "V16UcV16UcUi", "", "power10-vector") // P10 Vector Count Leading / Trailing Zeroes under bit Mask built-ins. -BUILTIN(__builtin_altivec_vclzdm, "V2ULLiV2ULLiV2ULLi", "") -BUILTIN(__builtin_altivec_vctzdm, "V2ULLiV2ULLiV2ULLi", "") +TARGET_BUILTIN(__builtin_altivec_vclzdm, "V2ULLiV2ULLiV2ULLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vctzdm, "V2ULLiV2ULLiV2ULLi", "", + "power10-vector") // P10 Vector Shift built-ins. -BUILTIN(__builtin_altivec_vsldbi, "V16UcV16UcV16UcIi", "") -BUILTIN(__builtin_altivec_vsrdbi, "V16UcV16UcV16UcIi", "") +TARGET_BUILTIN(__builtin_altivec_vsldbi, "V16UcV16UcV16UcIi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vsrdbi, "V16UcV16UcV16UcIi", "", + "power10-vector") // P10 Vector Insert built-ins. -BUILTIN(__builtin_altivec_vinsblx, "V16UcV16UcUiUi", "") -BUILTIN(__builtin_altivec_vinsbrx, "V16UcV16UcUiUi", "") -BUILTIN(__builtin_altivec_vinshlx, "V8UsV8UsUiUi", "") -BUILTIN(__builtin_altivec_vinshrx, "V8UsV8UsUiUi", "") -BUILTIN(__builtin_altivec_vinswlx, "V4UiV4UiUiUi", "") -BUILTIN(__builtin_altivec_vinswrx, "V4UiV4UiUiUi", "") -BUILTIN(__builtin_altivec_vinsdlx, "V2ULLiV2ULLiULLiULLi", "") -BUILTIN(__builtin_altivec_vinsdrx, "V2ULLiV2ULLiULLiULLi", "") -BUILTIN(__builtin_altivec_vinsbvlx, "V16UcV16UcUiV16Uc", "") -BUILTIN(__builtin_altivec_vinsbvrx, "V16UcV16UcUiV16Uc", "") -BUILTIN(__builtin_altivec_vinshvlx, "V8UsV8UsUiV8Us", "") -BUILTIN(__builtin_altivec_vinshvrx, "V8UsV8UsUiV8Us", "") -BUILTIN(__builtin_altivec_vinswvlx, "V4UiV4UiUiV4Ui", "") -BUILTIN(__builtin_altivec_vinswvrx, "V4UiV4UiUiV4Ui", "") -BUILTIN(__builtin_altivec_vec_replace_elt, "V4UiV4UiUiIi", "t") -BUILTIN(__builtin_altivec_vec_replace_unaligned, "V4UiV4UiUiIi", "t") +TARGET_BUILTIN(__builtin_altivec_vinsblx, "V16UcV16UcUiUi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinsbrx, "V16UcV16UcUiUi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinshlx, "V8UsV8UsUiUi", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinshrx, "V8UsV8UsUiUi", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinswlx, "V4UiV4UiUiUi", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinswrx, "V4UiV4UiUiUi", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinsdlx, "V2ULLiV2ULLiULLiULLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinsdrx, "V2ULLiV2ULLiULLiULLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinsbvlx, "V16UcV16UcUiV16Uc", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinsbvrx, "V16UcV16UcUiV16Uc", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinshvlx, "V8UsV8UsUiV8Us", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinshvrx, "V8UsV8UsUiV8Us", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinswvlx, "V4UiV4UiUiV4Ui", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinswvrx, "V4UiV4UiUiV4Ui", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinsw, "V16UcV16UcUiIi", "", "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinsd, "V16UcV16UcULLiIi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinsw_elt, "V16UcV16UcUiiC", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vinsd_elt, "V16UcV16UcULLiiC", "", + "power10-vector") // P10 Vector Extract built-ins. -BUILTIN(__builtin_altivec_vextdubvlx, "V2ULLiV16UcV16UcUi", "") -BUILTIN(__builtin_altivec_vextdubvrx, "V2ULLiV16UcV16UcUi", "") -BUILTIN(__builtin_altivec_vextduhvlx, "V2ULLiV8UsV8UsUi", "") -BUILTIN(__builtin_altivec_vextduhvrx, "V2ULLiV8UsV8UsUi", "") -BUILTIN(__builtin_altivec_vextduwvlx, "V2ULLiV4UiV4UiUi", "") -BUILTIN(__builtin_altivec_vextduwvrx, "V2ULLiV4UiV4UiUi", "") -BUILTIN(__builtin_altivec_vextddvlx, "V2ULLiV2ULLiV2ULLiUi", "") -BUILTIN(__builtin_altivec_vextddvrx, "V2ULLiV2ULLiV2ULLiUi", "") +TARGET_BUILTIN(__builtin_altivec_vextdubvlx, "V2ULLiV16UcV16UcUi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vextdubvrx, "V2ULLiV16UcV16UcUi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vextduhvlx, "V2ULLiV8UsV8UsUi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vextduhvrx, "V2ULLiV8UsV8UsUi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vextduwvlx, "V2ULLiV4UiV4UiUi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vextduwvrx, "V2ULLiV4UiV4UiUi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vextddvlx, "V2ULLiV2ULLiV2ULLiUi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vextddvrx, "V2ULLiV2ULLiV2ULLiUi", "", + "power10-vector") // P10 Vector rotate built-ins. -BUILTIN(__builtin_altivec_vrlqmi, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi", "") -BUILTIN(__builtin_altivec_vrlqnm, "V1ULLLiV1ULLLiV1ULLLi", "") +TARGET_BUILTIN(__builtin_altivec_vrlqmi, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi", "", + "power10-vector") +TARGET_BUILTIN(__builtin_altivec_vrlqnm, "V1ULLLiV1ULLLiV1ULLLi", "", + "power10-vector") // VSX built-ins. -BUILTIN(__builtin_vsx_lxvd2x, "V2dLivC*", "") -BUILTIN(__builtin_vsx_lxvw4x, "V4iLivC*", "") -BUILTIN(__builtin_vsx_lxvd2x_be, "V2dSLLivC*", "") -BUILTIN(__builtin_vsx_lxvw4x_be, "V4iSLLivC*", "") +TARGET_BUILTIN(__builtin_vsx_lxvd2x, "V2dLivC*", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_lxvw4x, "V4iLivC*", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_lxvd2x_be, "V2dSLLivC*", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_lxvw4x_be, "V4iSLLivC*", "", "vsx") -BUILTIN(__builtin_vsx_stxvd2x, "vV2dLiv*", "") -BUILTIN(__builtin_vsx_stxvw4x, "vV4iLiv*", "") -BUILTIN(__builtin_vsx_stxvd2x_be, "vV2dSLLivC*", "") -BUILTIN(__builtin_vsx_stxvw4x_be, "vV4iSLLivC*", "") +TARGET_BUILTIN(__builtin_vsx_stxvd2x, "vV2dLiv*", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_stxvw4x, "vV4iLiv*", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_stxvd2x_be, "vV2dSLLivC*", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_stxvw4x_be, "vV4iSLLivC*", "", "vsx") -BUILTIN(__builtin_vsx_lxvl, "V4ivC*ULLi", "") -BUILTIN(__builtin_vsx_lxvll, "V4ivC*ULLi", "") -BUILTIN(__builtin_vsx_stxvl, "vV4iv*ULLi", "") -BUILTIN(__builtin_vsx_stxvll, "vV4iv*ULLi", "") -BUILTIN(__builtin_vsx_ldrmb, "V16UcCc*Ii", "") -BUILTIN(__builtin_vsx_strmb, "vCc*IiV16Uc", "") +TARGET_BUILTIN(__builtin_vsx_lxvl, "V4ivC*ULLi", "", "power9-vector") +TARGET_BUILTIN(__builtin_vsx_lxvll, "V4ivC*ULLi", "", "power9-vector") +TARGET_BUILTIN(__builtin_vsx_stxvl, "vV4iv*ULLi", "", "power9-vector") +TARGET_BUILTIN(__builtin_vsx_stxvll, "vV4iv*ULLi", "", "power9-vector") +TARGET_BUILTIN(__builtin_vsx_ldrmb, "V16UcCc*Ii", "", "isa-v207-instructions") +TARGET_BUILTIN(__builtin_vsx_strmb, "vCc*IiV16Uc", "", "isa-v207-instructions") -BUILTIN(__builtin_vsx_xvmaxdp, "V2dV2dV2d", "") -BUILTIN(__builtin_vsx_xvmaxsp, "V4fV4fV4f", "") -BUILTIN(__builtin_vsx_xsmaxdp, "ddd", "") +TARGET_BUILTIN(__builtin_vsx_xvmaxdp, "V2dV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvmaxsp, "V4fV4fV4f", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xsmaxdp, "ddd", "", "vsx") -BUILTIN(__builtin_vsx_xvmindp, "V2dV2dV2d", "") -BUILTIN(__builtin_vsx_xvminsp, "V4fV4fV4f", "") -BUILTIN(__builtin_vsx_xsmindp, "ddd", "") +TARGET_BUILTIN(__builtin_vsx_xvmindp, "V2dV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvminsp, "V4fV4fV4f", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xsmindp, "ddd", "", "vsx") -BUILTIN(__builtin_vsx_xvdivdp, "V2dV2dV2d", "") -BUILTIN(__builtin_vsx_xvdivsp, "V4fV4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvdivdp, "V2dV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvdivsp, "V4fV4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvrdpip, "V2dV2d", "") -BUILTIN(__builtin_vsx_xvrspip, "V4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvrdpip, "V2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvrspip, "V4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvcmpeqdp, "V2ULLiV2dV2d", "") -BUILTIN(__builtin_vsx_xvcmpeqsp, "V4UiV4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvcmpeqdp, "V2ULLiV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcmpeqsp, "V4UiV4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvcmpeqdp_p, "iiV2dV2d", "") -BUILTIN(__builtin_vsx_xvcmpeqsp_p, "iiV4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvcmpeqdp_p, "iiV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcmpeqsp_p, "iiV4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvcmpgedp, "V2ULLiV2dV2d", "") -BUILTIN(__builtin_vsx_xvcmpgesp, "V4UiV4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvcmpgedp, "V2ULLiV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcmpgesp, "V4UiV4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvcmpgedp_p, "iiV2dV2d", "") -BUILTIN(__builtin_vsx_xvcmpgesp_p, "iiV4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvcmpgedp_p, "iiV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcmpgesp_p, "iiV4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvcmpgtdp, "V2ULLiV2dV2d", "") -BUILTIN(__builtin_vsx_xvcmpgtsp, "V4UiV4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvcmpgtdp, "V2ULLiV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcmpgtsp, "V4UiV4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvcmpgtdp_p, "iiV2dV2d", "") -BUILTIN(__builtin_vsx_xvcmpgtsp_p, "iiV4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvcmpgtdp_p, "iiV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcmpgtsp_p, "iiV4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvrdpim, "V2dV2d", "") -BUILTIN(__builtin_vsx_xvrspim, "V4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvrdpim, "V2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvrspim, "V4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvrdpi, "V2dV2d", "") -BUILTIN(__builtin_vsx_xvrspi, "V4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvrdpi, "V2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvrspi, "V4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvrdpic, "V2dV2d", "") -BUILTIN(__builtin_vsx_xvrspic, "V4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvrdpic, "V2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvrspic, "V4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvrdpiz, "V2dV2d", "") -BUILTIN(__builtin_vsx_xvrspiz, "V4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvrdpiz, "V2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvrspiz, "V4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvmaddadp, "V2dV2dV2dV2d", "") -BUILTIN(__builtin_vsx_xvmaddasp, "V4fV4fV4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvmaddadp, "V2dV2dV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvmaddasp, "V4fV4fV4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvmsubadp, "V2dV2dV2dV2d", "") -BUILTIN(__builtin_vsx_xvmsubasp, "V4fV4fV4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvmsubadp, "V2dV2dV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvmsubasp, "V4fV4fV4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvmuldp, "V2dV2dV2d", "") -BUILTIN(__builtin_vsx_xvmulsp, "V4fV4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvmuldp, "V2dV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvmulsp, "V4fV4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvnmaddadp, "V2dV2dV2dV2d", "") -BUILTIN(__builtin_vsx_xvnmaddasp, "V4fV4fV4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvnmaddadp, "V2dV2dV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvnmaddasp, "V4fV4fV4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvnmsubadp, "V2dV2dV2dV2d", "") -BUILTIN(__builtin_vsx_xvnmsubasp, "V4fV4fV4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvnmsubadp, "V2dV2dV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvnmsubasp, "V4fV4fV4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvredp, "V2dV2d", "") -BUILTIN(__builtin_vsx_xvresp, "V4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvredp, "V2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvresp, "V4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvrsqrtedp, "V2dV2d", "") -BUILTIN(__builtin_vsx_xvrsqrtesp, "V4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvrsqrtedp, "V2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvrsqrtesp, "V4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvsqrtdp, "V2dV2d", "") -BUILTIN(__builtin_vsx_xvsqrtsp, "V4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvsqrtdp, "V2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvsqrtsp, "V4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xxleqv, "V4UiV4UiV4Ui", "") +TARGET_BUILTIN(__builtin_vsx_xxleqv, "V4UiV4UiV4Ui", "", "power8-vector") -BUILTIN(__builtin_vsx_xvcpsgndp, "V2dV2dV2d", "") -BUILTIN(__builtin_vsx_xvcpsgnsp, "V4fV4fV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvcpsgndp, "V2dV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcpsgnsp, "V4fV4fV4f", "", "vsx") -BUILTIN(__builtin_vsx_xvabssp, "V4fV4f", "") -BUILTIN(__builtin_vsx_xvabsdp, "V2dV2d", "") +TARGET_BUILTIN(__builtin_vsx_xvabssp, "V4fV4f", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvabsdp, "V2dV2d", "", "vsx") -BUILTIN(__builtin_vsx_xxgenpcvbm, "V16UcV16Uci", "") -BUILTIN(__builtin_vsx_xxgenpcvhm, "V8UsV8Usi", "") -BUILTIN(__builtin_vsx_xxgenpcvwm, "V4UiV4Uii", "") -BUILTIN(__builtin_vsx_xxgenpcvdm, "V2ULLiV2ULLii", "") +TARGET_BUILTIN(__builtin_vsx_xxgenpcvbm, "V16UcV16Uci", "", "power10-vector") +TARGET_BUILTIN(__builtin_vsx_xxgenpcvhm, "V8UsV8Usi", "", "power10-vector") +TARGET_BUILTIN(__builtin_vsx_xxgenpcvwm, "V4UiV4Uii", "", "power10-vector") +TARGET_BUILTIN(__builtin_vsx_xxgenpcvdm, "V2ULLiV2ULLii", "", "power10-vector") // vector Insert/Extract exponent/significand builtins -BUILTIN(__builtin_vsx_xviexpdp, "V2dV2ULLiV2ULLi", "") -BUILTIN(__builtin_vsx_xviexpsp, "V4fV4UiV4Ui", "") -BUILTIN(__builtin_vsx_xvxexpdp, "V2ULLiV2d", "") -BUILTIN(__builtin_vsx_xvxexpsp, "V4UiV4f", "") -BUILTIN(__builtin_vsx_xvxsigdp, "V2ULLiV2d", "") -BUILTIN(__builtin_vsx_xvxsigsp, "V4UiV4f", "") +TARGET_BUILTIN(__builtin_vsx_xviexpdp, "V2dV2ULLiV2ULLi", "", "power9-vector") +TARGET_BUILTIN(__builtin_vsx_xviexpsp, "V4fV4UiV4Ui", "", "power9-vector") +TARGET_BUILTIN(__builtin_vsx_xvxexpdp, "V2ULLiV2d", "", "power9-vector") +TARGET_BUILTIN(__builtin_vsx_xvxexpsp, "V4UiV4f", "", "power9-vector") +TARGET_BUILTIN(__builtin_vsx_xvxsigdp, "V2ULLiV2d", "", "power9-vector") +TARGET_BUILTIN(__builtin_vsx_xvxsigsp, "V4UiV4f", "", "power9-vector") // Conversion builtins -BUILTIN(__builtin_vsx_xvcvdpsxws, "V4SiV2d", "") -BUILTIN(__builtin_vsx_xvcvdpuxws, "V4UiV2d", "") -BUILTIN(__builtin_vsx_xvcvspsxds, "V2SLLiV4f", "") -BUILTIN(__builtin_vsx_xvcvspuxds, "V2ULLiV4f", "") -BUILTIN(__builtin_vsx_xvcvsxwdp, "V2dV4Si", "") -BUILTIN(__builtin_vsx_xvcvuxwdp, "V2dV4Ui", "") -BUILTIN(__builtin_vsx_xvcvspdp, "V2dV4f", "") -BUILTIN(__builtin_vsx_xvcvsxdsp, "V4fV2SLLi", "") -BUILTIN(__builtin_vsx_xvcvuxdsp, "V4fV2ULLi", "") -BUILTIN(__builtin_vsx_xvcvdpsp, "V4fV2d", "") - -BUILTIN(__builtin_vsx_xvcvsphp, "V4fV4f", "") -BUILTIN(__builtin_vsx_xvcvhpsp, "V4fV8Us", "") - -BUILTIN(__builtin_vsx_xvcvspbf16, "V16UcV16Uc", "") -BUILTIN(__builtin_vsx_xvcvbf16spn, "V16UcV16Uc", "") +TARGET_BUILTIN(__builtin_vsx_xvcvdpsxws, "V4SiV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcvdpuxws, "V4UiV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcvspsxds, "V2SLLiV4f", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcvspuxds, "V2ULLiV4f", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcvsxwdp, "V2dV4Si", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcvuxwdp, "V2dV4Ui", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcvspdp, "V2dV4f", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcvsxdsp, "V4fV2SLLi", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcvuxdsp, "V4fV2ULLi", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvcvdpsp, "V4fV2d", "", "vsx") + +TARGET_BUILTIN(__builtin_vsx_xvcvsphp, "V4fV4f", "", "power9-vector") +TARGET_BUILTIN(__builtin_vsx_xvcvhpsp, "V4fV8Us", "", "power9-vector") + +TARGET_BUILTIN(__builtin_vsx_xvcvspbf16, "V16UcV16Uc", "", "power10-vector") +TARGET_BUILTIN(__builtin_vsx_xvcvbf16spn, "V16UcV16Uc", "", "power10-vector") // Vector Test Data Class builtins -BUILTIN(__builtin_vsx_xvtstdcdp, "V2ULLiV2dIi", "") -BUILTIN(__builtin_vsx_xvtstdcsp, "V4UiV4fIi", "") +TARGET_BUILTIN(__builtin_vsx_xvtstdcdp, "V2ULLiV2dIi", "", "power9-vector") +TARGET_BUILTIN(__builtin_vsx_xvtstdcsp, "V4UiV4fIi", "", "power9-vector") -BUILTIN(__builtin_vsx_insertword, "V16UcV4UiV16UcIi", "") -BUILTIN(__builtin_vsx_extractuword, "V2ULLiV16UcIi", "") +TARGET_BUILTIN(__builtin_vsx_insertword, "V16UcV4UiV16UcIi", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_extractuword, "V2ULLiV16UcIi", "", "vsx") -BUILTIN(__builtin_vsx_xxpermdi, "v.", "t") -BUILTIN(__builtin_vsx_xxsldwi, "v.", "t") +TARGET_BUILTIN(__builtin_vsx_xxpermdi, "v.", "t", "vsx") +TARGET_BUILTIN(__builtin_vsx_xxsldwi, "v.", "t", "vsx") -BUILTIN(__builtin_vsx_xxeval, "V2ULLiV2ULLiV2ULLiV2ULLiIi", "") +TARGET_BUILTIN(__builtin_vsx_xxeval, "V2ULLiV2ULLiV2ULLiV2ULLiIi", "", + "power10-vector") -BUILTIN(__builtin_vsx_xvtlsbb, "iV16UcUi", "") +TARGET_BUILTIN(__builtin_vsx_xvtlsbb, "iV16UcUi", "", "power10-vector") -BUILTIN(__builtin_vsx_xvtdivdp, "iV2dV2d", "") -BUILTIN(__builtin_vsx_xvtdivsp, "iV4fV4f", "") -BUILTIN(__builtin_vsx_xvtsqrtdp, "iV2d", "") -BUILTIN(__builtin_vsx_xvtsqrtsp, "iV4f", "") +TARGET_BUILTIN(__builtin_vsx_xvtdivdp, "iV2dV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvtdivsp, "iV4fV4f", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvtsqrtdp, "iV2d", "", "vsx") +TARGET_BUILTIN(__builtin_vsx_xvtsqrtsp, "iV4f", "", "vsx") // P10 Vector Permute Extended built-in. -BUILTIN(__builtin_vsx_xxpermx, "V16UcV16UcV16UcV16UcIi", "") +TARGET_BUILTIN(__builtin_vsx_xxpermx, "V16UcV16UcV16UcV16UcIi", "", + "power10-vector") // P10 Vector Blend built-ins. -BUILTIN(__builtin_vsx_xxblendvb, "V16UcV16UcV16UcV16Uc", "") -BUILTIN(__builtin_vsx_xxblendvh, "V8UsV8UsV8UsV8Us", "") -BUILTIN(__builtin_vsx_xxblendvw, "V4UiV4UiV4UiV4Ui", "") -BUILTIN(__builtin_vsx_xxblendvd, "V2ULLiV2ULLiV2ULLiV2ULLi", "") +TARGET_BUILTIN(__builtin_vsx_xxblendvb, "V16UcV16UcV16UcV16Uc", "", + "power10-vector") +TARGET_BUILTIN(__builtin_vsx_xxblendvh, "V8UsV8UsV8UsV8Us", "", + "power10-vector") +TARGET_BUILTIN(__builtin_vsx_xxblendvw, "V4UiV4UiV4UiV4Ui", "", + "power10-vector") +TARGET_BUILTIN(__builtin_vsx_xxblendvd, "V2ULLiV2ULLiV2ULLiV2ULLi", "", + "power10-vector") // Float 128 built-ins -BUILTIN(__builtin_sqrtf128_round_to_odd, "LLdLLd", "") -BUILTIN(__builtin_addf128_round_to_odd, "LLdLLdLLd", "") -BUILTIN(__builtin_subf128_round_to_odd, "LLdLLdLLd", "") -BUILTIN(__builtin_mulf128_round_to_odd, "LLdLLdLLd", "") -BUILTIN(__builtin_divf128_round_to_odd, "LLdLLdLLd", "") -BUILTIN(__builtin_fmaf128_round_to_odd, "LLdLLdLLdLLd", "") -BUILTIN(__builtin_truncf128_round_to_odd, "dLLd", "") -BUILTIN(__builtin_vsx_scalar_extract_expq, "ULLiLLd", "") -BUILTIN(__builtin_vsx_scalar_insert_exp_qp, "LLdLLdULLi", "") +TARGET_BUILTIN(__builtin_sqrtf128_round_to_odd, "LLdLLd", "", "float128") +TARGET_BUILTIN(__builtin_addf128_round_to_odd, "LLdLLdLLd", "", "float128") +TARGET_BUILTIN(__builtin_subf128_round_to_odd, "LLdLLdLLd", "", "float128") +TARGET_BUILTIN(__builtin_mulf128_round_to_odd, "LLdLLdLLd", "", "float128") +TARGET_BUILTIN(__builtin_divf128_round_to_odd, "LLdLLdLLd", "", "float128") +TARGET_BUILTIN(__builtin_fmaf128_round_to_odd, "LLdLLdLLdLLd", "", "float128") +TARGET_BUILTIN(__builtin_truncf128_round_to_odd, "dLLd", "", "float128") +TARGET_BUILTIN(__builtin_vsx_scalar_extract_expq, "ULLiLLd", "", "float128") +TARGET_BUILTIN(__builtin_vsx_scalar_insert_exp_qp, "LLdLLdULLi", "", "float128") // Fastmath by default builtins BUILTIN(__builtin_ppc_rsqrtf, "V4fV4f", "") @@ -729,56 +890,60 @@ BUILTIN(__builtin_ppc_recipdivf, "V4fV4fV4f", "") BUILTIN(__builtin_ppc_recipdivd, "V2dV2dV2d", "") // HTM builtins -BUILTIN(__builtin_tbegin, "UiUIi", "") -BUILTIN(__builtin_tend, "UiUIi", "") +TARGET_BUILTIN(__builtin_tbegin, "UiUIi", "", "htm") +TARGET_BUILTIN(__builtin_tend, "UiUIi", "", "htm") -BUILTIN(__builtin_tabort, "UiUi", "") -BUILTIN(__builtin_tabortdc, "UiUiUiUi", "") -BUILTIN(__builtin_tabortdci, "UiUiUii", "") -BUILTIN(__builtin_tabortwc, "UiUiUiUi", "") -BUILTIN(__builtin_tabortwci, "UiUiUii", "") +TARGET_BUILTIN(__builtin_tabort, "UiUi", "", "htm") +TARGET_BUILTIN(__builtin_tabortdc, "UiUiUiUi", "", "htm") +TARGET_BUILTIN(__builtin_tabortdci, "UiUiUii", "", "htm") +TARGET_BUILTIN(__builtin_tabortwc, "UiUiUiUi", "", "htm") +TARGET_BUILTIN(__builtin_tabortwci, "UiUiUii", "", "htm") -BUILTIN(__builtin_tcheck, "Ui", "") -BUILTIN(__builtin_treclaim, "UiUi", "") -BUILTIN(__builtin_trechkpt, "Ui", "") -BUILTIN(__builtin_tsr, "UiUi", "") +TARGET_BUILTIN(__builtin_tcheck, "Ui", "", "htm") +TARGET_BUILTIN(__builtin_treclaim, "UiUi", "", "htm") +TARGET_BUILTIN(__builtin_trechkpt, "Ui", "", "htm") +TARGET_BUILTIN(__builtin_tsr, "UiUi", "", "htm") -BUILTIN(__builtin_tendall, "Ui", "") -BUILTIN(__builtin_tresume, "Ui", "") -BUILTIN(__builtin_tsuspend, "Ui", "") +TARGET_BUILTIN(__builtin_tendall, "Ui", "", "htm") +TARGET_BUILTIN(__builtin_tresume, "Ui", "", "htm") +TARGET_BUILTIN(__builtin_tsuspend, "Ui", "", "htm") -BUILTIN(__builtin_get_texasr, "LUi", "c") -BUILTIN(__builtin_get_texasru, "LUi", "c") -BUILTIN(__builtin_get_tfhar, "LUi", "c") -BUILTIN(__builtin_get_tfiar, "LUi", "c") +TARGET_BUILTIN(__builtin_get_texasr, "LUi", "c", "htm") +TARGET_BUILTIN(__builtin_get_texasru, "LUi", "c", "htm") +TARGET_BUILTIN(__builtin_get_tfhar, "LUi", "c", "htm") +TARGET_BUILTIN(__builtin_get_tfiar, "LUi", "c", "htm") -BUILTIN(__builtin_set_texasr, "vLUi", "c") -BUILTIN(__builtin_set_texasru, "vLUi", "c") -BUILTIN(__builtin_set_tfhar, "vLUi", "c") -BUILTIN(__builtin_set_tfiar, "vLUi", "c") +TARGET_BUILTIN(__builtin_set_texasr, "vLUi", "c", "htm") +TARGET_BUILTIN(__builtin_set_texasru, "vLUi", "c", "htm") +TARGET_BUILTIN(__builtin_set_tfhar, "vLUi", "c", "htm") +TARGET_BUILTIN(__builtin_set_tfiar, "vLUi", "c", "htm") -BUILTIN(__builtin_ttest, "LUi", "") +TARGET_BUILTIN(__builtin_ttest, "LUi", "", "htm") // Scalar built-ins -BUILTIN(__builtin_divwe, "SiSiSi", "") -BUILTIN(__builtin_divweu, "UiUiUi", "") -BUILTIN(__builtin_divde, "SLLiSLLiSLLi", "") -BUILTIN(__builtin_divdeu, "ULLiULLiULLi", "") -BUILTIN(__builtin_bpermd, "SLLiSLLiSLLi", "") -BUILTIN(__builtin_pdepd, "ULLiULLiULLi", "") -BUILTIN(__builtin_pextd, "ULLiULLiULLi", "") -BUILTIN(__builtin_cfuged, "ULLiULLiULLi", "") -BUILTIN(__builtin_cntlzdm, "ULLiULLiULLi", "") -BUILTIN(__builtin_cnttzdm, "ULLiULLiULLi", "") +TARGET_BUILTIN(__builtin_divwe, "SiSiSi", "", "extdiv") +TARGET_BUILTIN(__builtin_divweu, "UiUiUi", "", "extdiv") +TARGET_BUILTIN(__builtin_divde, "SLLiSLLiSLLi", "", "extdiv") +TARGET_BUILTIN(__builtin_divdeu, "ULLiULLiULLi", "", "extdiv") +TARGET_BUILTIN(__builtin_bpermd, "SLLiSLLiSLLi", "", "bpermd") +TARGET_BUILTIN(__builtin_pdepd, "ULLiULLiULLi", "", "isa-v31-instructions") +TARGET_BUILTIN(__builtin_pextd, "ULLiULLiULLi", "", "isa-v31-instructions") +TARGET_BUILTIN(__builtin_cfuged, "ULLiULLiULLi", "", "isa-v31-instructions") +TARGET_BUILTIN(__builtin_cntlzdm, "ULLiULLiULLi", "", "isa-v31-instructions") +TARGET_BUILTIN(__builtin_cnttzdm, "ULLiULLiULLi", "", "isa-v31-instructions") + +// Double-double (un)pack +BUILTIN(__builtin_unpack_longdouble, "dLdIi", "") +BUILTIN(__builtin_pack_longdouble, "Lddd", "") // Generate random number -BUILTIN(__builtin_darn, "LLi", "") -BUILTIN(__builtin_darn_raw, "LLi", "") -BUILTIN(__builtin_darn_32, "i", "") +TARGET_BUILTIN(__builtin_darn, "LLi", "", "isa-v30-instructions") +TARGET_BUILTIN(__builtin_darn_raw, "LLi", "", "isa-v30-instructions") +TARGET_BUILTIN(__builtin_darn_32, "i", "", "isa-v30-instructions") // Vector int128 (un)pack -BUILTIN(__builtin_unpack_vector_int128, "ULLiV1LLLii", "") -BUILTIN(__builtin_pack_vector_int128, "V1LLLiULLiULLi", "") +TARGET_BUILTIN(__builtin_unpack_vector_int128, "ULLiV1LLLii", "", "vsx") +TARGET_BUILTIN(__builtin_pack_vector_int128, "V1LLLiULLiULLi", "", "vsx") // Set the floating point rounding mode BUILTIN(__builtin_setrnd, "di", "") @@ -812,84 +977,159 @@ BUILTIN(__builtin_dcbf, "vvC*", "") // its given accumulator. // Provided builtins with _mma_ prefix for compatibility. -CUSTOM_BUILTIN(mma_lxvp, vsx_lxvp, "W256SLLiW256C*", false) -CUSTOM_BUILTIN(mma_stxvp, vsx_stxvp, "vW256SLLiW256C*", false) -CUSTOM_BUILTIN(mma_assemble_pair, vsx_assemble_pair, "vW256*VV", false) -CUSTOM_BUILTIN(mma_disassemble_pair, vsx_disassemble_pair, "vv*W256*", false) +CUSTOM_BUILTIN(mma_lxvp, vsx_lxvp, "W256SLiW256C*", false, + "paired-vector-memops") +CUSTOM_BUILTIN(mma_stxvp, vsx_stxvp, "vW256SLiW256*", false, + "paired-vector-memops") +CUSTOM_BUILTIN(mma_assemble_pair, vsx_assemble_pair, "vW256*VV", false, + "paired-vector-memops") +CUSTOM_BUILTIN(mma_disassemble_pair, vsx_disassemble_pair, "vv*W256*", false, + "paired-vector-memops") +CUSTOM_BUILTIN(vsx_build_pair, vsx_assemble_pair, "vW256*VV", false, + "paired-vector-memops") +CUSTOM_BUILTIN(mma_build_acc, mma_assemble_acc, "vW512*VVVV", false, "mma") // UNALIASED_CUSTOM_BUILTIN macro is used for built-ins that have // the same name as that of the intrinsic they generate, i.e. the // ID and INTR are the same. // This avoids repeating the ID and INTR in the macro expression. -UNALIASED_CUSTOM_BUILTIN(vsx_lxvp, "W256SLLiW256C*", false) -UNALIASED_CUSTOM_BUILTIN(vsx_stxvp, "vW256SLLiW256C*", false) -UNALIASED_CUSTOM_BUILTIN(vsx_assemble_pair, "vW256*VV", false) -UNALIASED_CUSTOM_BUILTIN(vsx_disassemble_pair, "vv*W256*", false) - -UNALIASED_CUSTOM_BUILTIN(mma_assemble_acc, "vW512*VVVV", false) -UNALIASED_CUSTOM_BUILTIN(mma_disassemble_acc, "vv*W512*", false) -UNALIASED_CUSTOM_BUILTIN(mma_xxmtacc, "vW512*", true) -UNALIASED_CUSTOM_BUILTIN(mma_xxmfacc, "vW512*", true) -UNALIASED_CUSTOM_BUILTIN(mma_xxsetaccz, "vW512*", false) -UNALIASED_CUSTOM_BUILTIN(mma_xvi4ger8, "vW512*VV", false) -UNALIASED_CUSTOM_BUILTIN(mma_xvi8ger4, "vW512*VV", false) -UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2, "vW512*VV", false) -UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2s, "vW512*VV", false) -UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2, "vW512*VV", false) -UNALIASED_CUSTOM_BUILTIN(mma_xvf32ger, "vW512*VV", false) -UNALIASED_CUSTOM_BUILTIN(mma_xvf64ger, "vW512*W256V", false) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvi4ger8, "vW512*VVi15i15i255", false) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvi8ger4, "vW512*VVi15i15i15", false) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2, "vW512*VVi15i15i3", false) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2s, "vW512*VVi15i15i3", false) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2, "vW512*VVi15i15i3", false) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32ger, "vW512*VVi15i15", false) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64ger, "vW512*W256Vi15i3", false) -UNALIASED_CUSTOM_BUILTIN(mma_xvi4ger8pp, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvi8ger4pp, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvi8ger4spp, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2pp, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2spp, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvi4ger8pp, "vW512*VVi15i15i255", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvi8ger4pp, "vW512*VVi15i15i15", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvi8ger4spp, "vW512*VVi15i15i15", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2pp, "vW512*VVi15i15i3", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2spp, "vW512*VVi15i15i3", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2pp, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2pn, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2np, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2nn, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2pp, "vW512*VVi15i15i3", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2pn, "vW512*VVi15i15i3", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2np, "vW512*VVi15i15i3", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2nn, "vW512*VVi15i15i3", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvf32gerpp, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvf32gerpn, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvf32gernp, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvf32gernn, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gerpp, "vW512*VVi15i15", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gerpn, "vW512*VVi15i15", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gernp, "vW512*VVi15i15", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gernn, "vW512*VVi15i15", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvf64gerpp, "vW512*W256V", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvf64gerpn, "vW512*W256V", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvf64gernp, "vW512*W256V", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvf64gernn, "vW512*W256V", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gerpp, "vW512*W256Vi15i3", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gerpn, "vW512*W256Vi15i3", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gernp, "vW512*W256Vi15i3", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gernn, "vW512*W256Vi15i3", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2, "vW512*VV", false) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2, "vW512*VVi15i15i3", false) -UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2pp, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2pn, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2np, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2nn, "vW512*VV", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2pp, "vW512*VVi15i15i3", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2pn, "vW512*VVi15i15i3", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2np, "vW512*VVi15i15i3", true) -UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2nn, "vW512*VVi15i15i3", true) +UNALIASED_CUSTOM_BUILTIN(vsx_lxvp, "W256SLiW256C*", false, + "paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(vsx_stxvp, "vW256SLiW256*", false, + "paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(vsx_assemble_pair, "vW256*VV", false, + "paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(vsx_disassemble_pair, "vv*W256*", false, + "paired-vector-memops") + +// TODO: Require only mma after backend supports these without paired memops +UNALIASED_CUSTOM_BUILTIN(mma_assemble_acc, "vW512*VVVV", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_disassemble_acc, "vv*W512*", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xxmtacc, "vW512*", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xxmfacc, "vW512*", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xxsetaccz, "vW512*", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvi4ger8, "vW512*VV", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvi8ger4, "vW512*VV", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2, "vW512*VV", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2s, "vW512*VV", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2, "vW512*VV", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf32ger, "vW512*VV", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf64ger, "vW512*W256V", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvi4ger8, "vW512*VVi15i15i255", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvi8ger4, "vW512*VVi15i15i15", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2, "vW512*VVi15i15i3", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2s, "vW512*VVi15i15i3", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2, "vW512*VVi15i15i3", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32ger, "vW512*VVi15i15", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64ger, "vW512*W256Vi15i3", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvi4ger8pp, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvi8ger4pp, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvi8ger4spp, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2pp, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2spp, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvi4ger8pp, "vW512*VVi15i15i255", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvi8ger4pp, "vW512*VVi15i15i15", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvi8ger4spp, "vW512*VVi15i15i15", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2pp, "vW512*VVi15i15i3", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2spp, "vW512*VVi15i15i3", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2pp, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2pn, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2np, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2nn, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2pp, "vW512*VVi15i15i3", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2pn, "vW512*VVi15i15i3", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2np, "vW512*VVi15i15i3", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2nn, "vW512*VVi15i15i3", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf32gerpp, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf32gerpn, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf32gernp, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf32gernn, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gerpp, "vW512*VVi15i15", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gerpn, "vW512*VVi15i15", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gernp, "vW512*VVi15i15", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gernn, "vW512*VVi15i15", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf64gerpp, "vW512*W256V", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf64gerpn, "vW512*W256V", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf64gernp, "vW512*W256V", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvf64gernn, "vW512*W256V", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gerpp, "vW512*W256Vi15i3", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gerpn, "vW512*W256Vi15i3", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gernp, "vW512*W256Vi15i3", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gernn, "vW512*W256Vi15i3", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2, "vW512*VV", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2, "vW512*VVi15i15i3", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2pp, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2pn, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2np, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2nn, "vW512*VV", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2pp, "vW512*VVi15i15i3", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2pn, "vW512*VVi15i15i3", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2np, "vW512*VVi15i15i3", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2nn, "vW512*VVi15i15i3", true, + "mma,paired-vector-memops") // FIXME: Obviously incomplete. diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsRISCV.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsRISCV.def index b2b4950f92bd..1528b18c82ea 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsRISCV.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsRISCV.def @@ -15,49 +15,79 @@ # define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) #endif -#include "clang/Basic/riscv_vector_builtins.inc" - // Zbb extension -TARGET_BUILTIN(__builtin_riscv_orc_b_32, "ZiZi", "nc", "experimental-zbb") -TARGET_BUILTIN(__builtin_riscv_orc_b_64, "WiWi", "nc", "experimental-zbb,64bit") - -// Zbc extension -TARGET_BUILTIN(__builtin_riscv_clmul, "LiLiLi", "nc", "experimental-zbc") -TARGET_BUILTIN(__builtin_riscv_clmulh, "LiLiLi", "nc", "experimental-zbc") -TARGET_BUILTIN(__builtin_riscv_clmulr, "LiLiLi", "nc", "experimental-zbc") - -// Zbe extension -TARGET_BUILTIN(__builtin_riscv_bcompress_32, "ZiZiZi", "nc", "experimental-zbe") -TARGET_BUILTIN(__builtin_riscv_bcompress_64, "WiWiWi", "nc", - "experimental-zbe,64bit") -TARGET_BUILTIN(__builtin_riscv_bdecompress_32, "ZiZiZi", "nc", - "experimental-zbe") -TARGET_BUILTIN(__builtin_riscv_bdecompress_64, "WiWiWi", "nc", - "experimental-zbe,64bit") - -// Zbp extension -TARGET_BUILTIN(__builtin_riscv_grev_32, "ZiZiZi", "nc", "experimental-zbp") -TARGET_BUILTIN(__builtin_riscv_grev_64, "WiWiWi", "nc", "experimental-zbp,64bit") -TARGET_BUILTIN(__builtin_riscv_gorc_32, "ZiZiZi", "nc", "experimental-zbp") -TARGET_BUILTIN(__builtin_riscv_gorc_64, "WiWiWi", "nc", "experimental-zbp,64bit") -TARGET_BUILTIN(__builtin_riscv_shfl_32, "ZiZiZi", "nc", "experimental-zbp") -TARGET_BUILTIN(__builtin_riscv_shfl_64, "WiWiWi", "nc", "experimental-zbp,64bit") -TARGET_BUILTIN(__builtin_riscv_unshfl_32, "ZiZiZi", "nc", "experimental-zbp") -TARGET_BUILTIN(__builtin_riscv_unshfl_64, "WiWiWi", "nc", "experimental-zbp,64bit") -TARGET_BUILTIN(__builtin_riscv_xperm_n, "LiLiLi", "nc", "experimental-zbp") -TARGET_BUILTIN(__builtin_riscv_xperm_b, "LiLiLi", "nc", "experimental-zbp") -TARGET_BUILTIN(__builtin_riscv_xperm_h, "LiLiLi", "nc", "experimental-zbp") -TARGET_BUILTIN(__builtin_riscv_xperm_w, "WiWiWi", "nc", "experimental-zbp,64bit") - -// Zbr extension -TARGET_BUILTIN(__builtin_riscv_crc32_b, "LiLi", "nc", "experimental-zbr") -TARGET_BUILTIN(__builtin_riscv_crc32_h, "LiLi", "nc", "experimental-zbr") -TARGET_BUILTIN(__builtin_riscv_crc32_w, "LiLi", "nc", "experimental-zbr") -TARGET_BUILTIN(__builtin_riscv_crc32c_b, "LiLi", "nc", "experimental-zbr") -TARGET_BUILTIN(__builtin_riscv_crc32c_h, "LiLi", "nc", "experimental-zbr") -TARGET_BUILTIN(__builtin_riscv_crc32c_w, "LiLi", "nc", "experimental-zbr") -TARGET_BUILTIN(__builtin_riscv_crc32_d, "LiLi", "nc", "experimental-zbr") -TARGET_BUILTIN(__builtin_riscv_crc32c_d, "LiLi", "nc", "experimental-zbr") +TARGET_BUILTIN(__builtin_riscv_orc_b_32, "UiUi", "nc", "zbb") +TARGET_BUILTIN(__builtin_riscv_orc_b_64, "UWiUWi", "nc", "zbb,64bit") +TARGET_BUILTIN(__builtin_riscv_clz_32, "UiUi", "nc", "zbb|xtheadbb") +TARGET_BUILTIN(__builtin_riscv_clz_64, "UiUWi", "nc", "zbb|xtheadbb,64bit") +TARGET_BUILTIN(__builtin_riscv_ctz_32, "UiUi", "nc", "zbb") +TARGET_BUILTIN(__builtin_riscv_ctz_64, "UiUWi", "nc", "zbb,64bit") + +// Zbc or Zbkc extension +TARGET_BUILTIN(__builtin_riscv_clmul_32, "UiUiUi", "nc", "zbc|zbkc") +TARGET_BUILTIN(__builtin_riscv_clmul_64, "UWiUWiUWi", "nc", "zbc|zbkc,64bit") +TARGET_BUILTIN(__builtin_riscv_clmulh_32, "UiUiUi", "nc", "zbc|zbkc,32bit") +TARGET_BUILTIN(__builtin_riscv_clmulh_64, "UWiUWiUWi", "nc", "zbc|zbkc,64bit") +TARGET_BUILTIN(__builtin_riscv_clmulr_32, "UiUiUi", "nc", "zbc,32bit") +TARGET_BUILTIN(__builtin_riscv_clmulr_64, "UWiUWiUWi", "nc", "zbc,64bit") + +// Zbkx +TARGET_BUILTIN(__builtin_riscv_xperm4_32, "UiUiUi", "nc", "zbkx,32bit") +TARGET_BUILTIN(__builtin_riscv_xperm4_64, "UWiUWiUWi", "nc", "zbkx,64bit") +TARGET_BUILTIN(__builtin_riscv_xperm8_32, "UiUiUi", "nc", "zbkx,32bit") +TARGET_BUILTIN(__builtin_riscv_xperm8_64, "UWiUWiUWi", "nc", "zbkx,64bit") + +// Zbkb extension +TARGET_BUILTIN(__builtin_riscv_brev8_32, "UiUi", "nc", "zbkb") +TARGET_BUILTIN(__builtin_riscv_brev8_64, "UWiUWi", "nc", "zbkb,64bit") +TARGET_BUILTIN(__builtin_riscv_zip_32, "UiUi", "nc", "zbkb,32bit") +TARGET_BUILTIN(__builtin_riscv_unzip_32, "UiUi", "nc", "zbkb,32bit") + +// Zknd extension +TARGET_BUILTIN(__builtin_riscv_aes32dsi, "UiUiUiIUi", "nc", "zknd,32bit") +TARGET_BUILTIN(__builtin_riscv_aes32dsmi, "UiUiUiIUi", "nc", "zknd,32bit") +TARGET_BUILTIN(__builtin_riscv_aes64ds, "UWiUWiUWi", "nc", "zknd,64bit") +TARGET_BUILTIN(__builtin_riscv_aes64dsm, "UWiUWiUWi", "nc", "zknd,64bit") +TARGET_BUILTIN(__builtin_riscv_aes64im, "UWiUWi", "nc", "zknd,64bit") + +// Zknd & Zkne +TARGET_BUILTIN(__builtin_riscv_aes64ks1i, "UWiUWiIUi", "nc", "zknd|zkne,64bit") +TARGET_BUILTIN(__builtin_riscv_aes64ks2, "UWiUWiUWi", "nc", "zknd|zkne,64bit") + +// Zkne extension +TARGET_BUILTIN(__builtin_riscv_aes32esi, "UiUiUiIUi", "nc", "zkne,32bit") +TARGET_BUILTIN(__builtin_riscv_aes32esmi, "UiUiUiIUi", "nc", "zkne,32bit") +TARGET_BUILTIN(__builtin_riscv_aes64es, "UWiUWiUWi", "nc", "zkne,64bit") +TARGET_BUILTIN(__builtin_riscv_aes64esm, "UWiUWiUWi", "nc", "zkne,64bit") + +// Zknh extension +TARGET_BUILTIN(__builtin_riscv_sha256sig0, "UiUi", "nc", "zknh") +TARGET_BUILTIN(__builtin_riscv_sha256sig1, "UiUi", "nc", "zknh") +TARGET_BUILTIN(__builtin_riscv_sha256sum0, "UiUi", "nc", "zknh") +TARGET_BUILTIN(__builtin_riscv_sha256sum1, "UiUi", "nc", "zknh") + +TARGET_BUILTIN(__builtin_riscv_sha512sig0h, "UiUiUi", "nc", "zknh,32bit") +TARGET_BUILTIN(__builtin_riscv_sha512sig0l, "UiUiUi", "nc", "zknh,32bit") +TARGET_BUILTIN(__builtin_riscv_sha512sig1h, "UiUiUi", "nc", "zknh,32bit") +TARGET_BUILTIN(__builtin_riscv_sha512sig1l, "UiUiUi", "nc", "zknh,32bit") +TARGET_BUILTIN(__builtin_riscv_sha512sum0r, "UiUiUi", "nc", "zknh,32bit") +TARGET_BUILTIN(__builtin_riscv_sha512sum1r, "UiUiUi", "nc", "zknh,32bit") +TARGET_BUILTIN(__builtin_riscv_sha512sig0, "UWiUWi", "nc", "zknh,64bit") +TARGET_BUILTIN(__builtin_riscv_sha512sig1, "UWiUWi", "nc", "zknh,64bit") +TARGET_BUILTIN(__builtin_riscv_sha512sum0, "UWiUWi", "nc", "zknh,64bit") +TARGET_BUILTIN(__builtin_riscv_sha512sum1, "UWiUWi", "nc", "zknh,64bit") + +// Zksed extension +TARGET_BUILTIN(__builtin_riscv_sm4ed, "UiUiUiIUi", "nc", "zksed") +TARGET_BUILTIN(__builtin_riscv_sm4ks, "UiUiUiIUi", "nc", "zksed") + +// Zksh extension +TARGET_BUILTIN(__builtin_riscv_sm3p0, "UiUi", "nc", "zksh") +TARGET_BUILTIN(__builtin_riscv_sm3p1, "UiUi", "nc", "zksh") + +// Zihintntl extension +TARGET_BUILTIN(__builtin_riscv_ntl_load, "v.", "t", "zihintntl") +TARGET_BUILTIN(__builtin_riscv_ntl_store, "v.", "t", "zihintntl") #undef BUILTIN #undef TARGET_BUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsRISCVVector.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsRISCVVector.def new file mode 100644 index 000000000000..6dfa87a1a1d3 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsRISCVVector.def @@ -0,0 +1,22 @@ +//==- BuiltinsRISCVVector.def - RISC-V Vector Builtin Database ---*- C++ -*-==// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the RISC-V-specific builtin function database. Users of +// this file must define the BUILTIN macro to make use of this information. +// +//===----------------------------------------------------------------------===// + +#if defined(BUILTIN) && !defined(TARGET_BUILTIN) +# define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) +#endif + +#include "clang/Basic/riscv_vector_builtins.inc" +#include "clang/Basic/riscv_sifive_vector_builtins.inc" + +#undef BUILTIN +#undef TARGET_BUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsSME.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsSME.def new file mode 100644 index 000000000000..180ee20295cc --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsSME.def @@ -0,0 +1,21 @@ +//===--- BuiltinsSME.def - SME Builtin function database --------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the SME-specific builtin function database. Users of +// this file must define the BUILTIN macro to make use of this information. +// +//===----------------------------------------------------------------------===// + +// The format of this database matches clang/Basic/Builtins.def. + +#define GET_SME_BUILTINS +#include "clang/Basic/arm_sme_builtins.inc" +#undef GET_SME_BUILTINS + +#undef BUILTIN +#undef TARGET_BUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsSVE.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsSVE.def index 2839ca992d98..a83f1c8f82dd 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsSVE.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsSVE.def @@ -15,6 +15,8 @@ #define GET_SVE_BUILTINS #include "clang/Basic/arm_sve_builtins.inc" +#include "clang/Basic/BuiltinsAArch64NeonSVEBridge.def" #undef GET_SVE_BUILTINS #undef BUILTIN +#undef TARGET_BUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsSystemZ.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsSystemZ.def index 079e41136488..f0c0ebfa622a 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsSystemZ.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsSystemZ.def @@ -64,14 +64,14 @@ TARGET_BUILTIN(__builtin_s390_vupllh, "V4UiV8Us", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vupllf, "V2ULLiV4Ui", "nc", "vector") // Vector integer instructions (chapter 22 of the PoP) -TARGET_BUILTIN(__builtin_s390_vaq, "V16UcV16UcV16Uc", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vacq, "V16UcV16UcV16UcV16Uc", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vaq, "SLLLiSLLLiSLLLi", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vacq, "ULLLiULLLiULLLiULLLi", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vaccb, "V16UcV16UcV16Uc", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vacch, "V8UsV8UsV8Us", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vaccf, "V4UiV4UiV4Ui", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vaccg, "V2ULLiV2ULLiV2ULLi", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vaccq, "V16UcV16UcV16Uc", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vacccq, "V16UcV16UcV16UcV16Uc", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vaccq, "ULLLiULLLiULLLi", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vacccq, "ULLLiULLLiULLLiULLLi", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vavgb, "V16ScV16ScV16Sc", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vavgh, "V8SsV8SsV8Ss", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vavgf, "V4SiV4SiV4Si", "nc", "vector") @@ -80,10 +80,10 @@ TARGET_BUILTIN(__builtin_s390_vavglb, "V16UcV16UcV16Uc", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vavglh, "V8UsV8UsV8Us", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vavglf, "V4UiV4UiV4Ui", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vavglg, "V2ULLiV2ULLiV2ULLi", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vceqbs, "V16ScV16ScV16Sci*", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vceqhs, "V8SsV8SsV8Ssi*", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vceqfs, "V4SiV4SiV4Sii*", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vceqgs, "V2SLLiV2SLLiV2SLLii*", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vceqbs, "V16ScV16UcV16Uci*", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vceqhs, "V8SsV8UsV8Usi*", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vceqfs, "V4SiV4UiV4Uii*", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vceqgs, "V2SLLiV2ULLiV2ULLii*", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vchbs, "V16ScV16ScV16Sci*", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vchhs, "V8SsV8SsV8Ssi*", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vchfs, "V4SiV4SiV4Sii*", "nc", "vector") @@ -105,10 +105,10 @@ TARGET_BUILTIN(__builtin_s390_verimb, "V16UcV16UcV16UcV16UcIi", "nc", "vector") TARGET_BUILTIN(__builtin_s390_verimh, "V8UsV8UsV8UsV8UsIi", "nc", "vector") TARGET_BUILTIN(__builtin_s390_verimf, "V4UiV4UiV4UiV4UiIi", "nc", "vector") TARGET_BUILTIN(__builtin_s390_verimg, "V2ULLiV2ULLiV2ULLiV2ULLiIi", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_verllb, "V16UcV16UcUi", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_verllh, "V8UsV8UsUi", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_verllf, "V4UiV4UiUi", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_verllg, "V2ULLiV2ULLiUi", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_verllb, "V16UcV16UcUc", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_verllh, "V8UsV8UsUc", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_verllf, "V4UiV4UiUc", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_verllg, "V2ULLiV2ULLiUc", "nc", "vector") TARGET_BUILTIN(__builtin_s390_verllvb, "V16UcV16UcV16Uc", "nc", "vector") TARGET_BUILTIN(__builtin_s390_verllvh, "V8UsV8UsV8Us", "nc", "vector") TARGET_BUILTIN(__builtin_s390_verllvf, "V4UiV4UiV4Ui", "nc", "vector") @@ -116,11 +116,11 @@ TARGET_BUILTIN(__builtin_s390_verllvg, "V2ULLiV2ULLiV2ULLi", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vgfmb, "V8UsV16UcV16Uc", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vgfmh, "V4UiV8UsV8Us", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vgfmf, "V2ULLiV4UiV4Ui", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vgfmg, "V16UcV2ULLiV2ULLi", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vgfmg, "ULLLiV2ULLiV2ULLi", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vgfmab, "V8UsV16UcV16UcV8Us", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vgfmah, "V4UiV8UsV8UsV4Ui", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vgfmaf, "V2ULLiV4UiV4UiV2ULLi", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vgfmag, "V16UcV2ULLiV2ULLiV16Uc", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vgfmag, "ULLLiV2ULLiV2ULLiULLLi", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vmahb, "V16ScV16ScV16ScV16Sc", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vmahh, "V8SsV8SsV8SsV8Ss", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vmahf, "V4SiV4SiV4SiV4Si", "nc", "vector") @@ -161,14 +161,14 @@ TARGET_BUILTIN(__builtin_s390_vpopctb, "V16UcV16Uc", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vpopcth, "V8UsV8Us", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vpopctf, "V4UiV4Ui", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vpopctg, "V2ULLiV2ULLi", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vsq, "V16UcV16UcV16Uc", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vsbcbiq, "V16UcV16UcV16UcV16Uc", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vsbiq, "V16UcV16UcV16UcV16Uc", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vsq, "SLLLiSLLLiSLLLi", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vsbcbiq, "ULLLiULLLiULLLiULLLi", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vsbiq, "ULLLiULLLiULLLiULLLi", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vscbib, "V16UcV16UcV16Uc", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vscbih, "V8UsV8UsV8Us", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vscbif, "V4UiV4UiV4Ui", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vscbig, "V2ULLiV2ULLiV2ULLi", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vscbiq, "V16UcV16UcV16Uc", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vscbiq, "ULLLiULLLiULLLi", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vsl, "V16UcV16UcV16Uc", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vslb, "V16UcV16UcV16Uc", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vsldb, "V16UcV16UcV16UcIi", "nc", "vector") @@ -180,8 +180,8 @@ TARGET_BUILTIN(__builtin_s390_vsumb, "V4UiV16UcV16Uc", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vsumh, "V4UiV8UsV8Us", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vsumgh, "V2ULLiV8UsV8Us", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vsumgf, "V2ULLiV4UiV4Ui", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vsumqf, "V16UcV4UiV4Ui", "nc", "vector") -TARGET_BUILTIN(__builtin_s390_vsumqg, "V16UcV2ULLiV2ULLi", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vsumqf, "ULLLiV4UiV4Ui", "nc", "vector") +TARGET_BUILTIN(__builtin_s390_vsumqg, "ULLLiV2ULLiV2ULLi", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vtm, "iV16UcV16Uc", "nc", "vector") // Vector string instructions (chapter 23 of the PoP) @@ -253,10 +253,10 @@ TARGET_BUILTIN(__builtin_s390_vfsqdb, "V2dV2d", "nc", "vector") TARGET_BUILTIN(__builtin_s390_vftcidb, "V2SLLiV2dIii*", "nc", "vector") // Vector-enhancements facility 1 intrinsics. -TARGET_BUILTIN(__builtin_s390_vlrl, "V16ScUivC*", "", "vector-enhancements-1") -TARGET_BUILTIN(__builtin_s390_vstrl, "vV16ScUiv*", "", "vector-enhancements-1") +TARGET_BUILTIN(__builtin_s390_vlrlr, "V16ScUivC*", "", "vector-enhancements-1") +TARGET_BUILTIN(__builtin_s390_vstrlr, "vV16ScUiv*", "", "vector-enhancements-1") TARGET_BUILTIN(__builtin_s390_vbperm, "V2ULLiV16UcV16Uc", "nc", "vector-enhancements-1") -TARGET_BUILTIN(__builtin_s390_vmslg, "V16UcV2ULLiV2ULLiV16UcIi", "nc", "vector-enhancements-1") +TARGET_BUILTIN(__builtin_s390_vmslg, "ULLLiV2ULLiV2ULLiULLLiIi", "nc", "vector-enhancements-1") TARGET_BUILTIN(__builtin_s390_vfmaxdb, "V2dV2dV2dIi", "nc", "vector-enhancements-1") TARGET_BUILTIN(__builtin_s390_vfmindb, "V2dV2dV2dIi", "nc", "vector-enhancements-1") TARGET_BUILTIN(__builtin_s390_vfnmadb, "V2dV2dV2dV2d", "nc", "vector-enhancements-1") diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsVE.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsVE.def new file mode 100644 index 000000000000..23bfb0e03aa7 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsVE.def @@ -0,0 +1,32 @@ +//===--- BuiltinsVE.def - VE Builtin function database ----------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the VE-specific builtin function database. Users of +// this file must define the BUILTIN macro to make use of this information. +// +//===----------------------------------------------------------------------===// + +#if defined(BUILTIN) && !defined(TARGET_BUILTIN) +# define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) +#endif + +// The format of this database is described in clang/Basic/Builtins.def. + +BUILTIN(__builtin_ve_vl_pack_f32p, "ULifC*fC*", "n") +BUILTIN(__builtin_ve_vl_pack_f32a, "ULifC*", "n") + +BUILTIN(__builtin_ve_vl_extract_vm512u, "V256bV512b", "n") +BUILTIN(__builtin_ve_vl_extract_vm512l, "V256bV512b", "n") +BUILTIN(__builtin_ve_vl_insert_vm512u, "V512bV512bV256b", "n") +BUILTIN(__builtin_ve_vl_insert_vm512l, "V512bV512bV256b", "n") + +// Use generated BUILTIN definitions +#include "clang/Basic/BuiltinsVEVL.gen.def" + +#undef BUILTIN +#undef TARGET_BUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsVEVL.gen.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsVEVL.gen.def new file mode 100644 index 000000000000..7b06e5c30e93 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsVEVL.gen.def @@ -0,0 +1,1257 @@ +BUILTIN(__builtin_ve_vl_vld_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vld_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vldnc_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vldnc_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vldu_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vldu_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vldunc_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vldunc_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vldlsx_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vldlsx_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vldlsxnc_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vldlsxnc_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vldlzx_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vldlzx_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vldlzxnc_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vldlzxnc_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vld2d_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vld2d_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vld2dnc_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vld2dnc_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vldu2d_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vldu2d_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vldu2dnc_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vldu2dnc_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vldl2dsx_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vldl2dsx_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vldl2dsxnc_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vldl2dsxnc_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vldl2dzx_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vldl2dzx_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vldl2dzxnc_vssl, "V256dLUivC*Ui", "n") +BUILTIN(__builtin_ve_vl_vldl2dzxnc_vssvl, "V256dLUivC*V256dUi", "n") +BUILTIN(__builtin_ve_vl_vst_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vst_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstnc_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstnc_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstot_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstot_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstncot_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstncot_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstu_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstu_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstunc_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstunc_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstuot_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstuot_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstuncot_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstuncot_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstl_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstl_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstlnc_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstlnc_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstlot_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstlot_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstlncot_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstlncot_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vst2d_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vst2d_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vst2dnc_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vst2dnc_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vst2dot_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vst2dot_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vst2dncot_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vst2dncot_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstu2d_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstu2d_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstu2dnc_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstu2dnc_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstu2dot_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstu2dot_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstu2dncot_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstu2dncot_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstl2d_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstl2d_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstl2dnc_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstl2dnc_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstl2dot_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstl2dot_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_vstl2dncot_vssl, "vV256dLUiv*Ui", "n") +BUILTIN(__builtin_ve_vl_vstl2dncot_vssml, "vV256dLUiv*V256bUi", "n") +BUILTIN(__builtin_ve_vl_pfchv_ssl, "vLivC*Ui", "n") +BUILTIN(__builtin_ve_vl_pfchvnc_ssl, "vLivC*Ui", "n") +BUILTIN(__builtin_ve_vl_lsv_vvss, "V256dV256dUiLUi", "n") +BUILTIN(__builtin_ve_vl_lvsl_svs, "LUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_lvsd_svs, "dV256dUi", "n") +BUILTIN(__builtin_ve_vl_lvss_svs, "fV256dUi", "n") +BUILTIN(__builtin_ve_vl_lvm_mmss, "V256bV256bLUiLUi", "n") +BUILTIN(__builtin_ve_vl_lvm_MMss, "V512bV512bLUiLUi", "n") +BUILTIN(__builtin_ve_vl_svm_sms, "LUiV256bLUi", "n") +BUILTIN(__builtin_ve_vl_svm_sMs, "LUiV512bLUi", "n") +BUILTIN(__builtin_ve_vl_vbrdd_vsl, "V256ddUi", "n") +BUILTIN(__builtin_ve_vl_vbrdd_vsvl, "V256ddV256dUi", "n") +BUILTIN(__builtin_ve_vl_vbrdd_vsmvl, "V256ddV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vbrdl_vsl, "V256dLiUi", "n") +BUILTIN(__builtin_ve_vl_vbrdl_vsvl, "V256dLiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vbrdl_vsmvl, "V256dLiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vbrds_vsl, "V256dfUi", "n") +BUILTIN(__builtin_ve_vl_vbrds_vsvl, "V256dfV256dUi", "n") +BUILTIN(__builtin_ve_vl_vbrds_vsmvl, "V256dfV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vbrdw_vsl, "V256diUi", "n") +BUILTIN(__builtin_ve_vl_vbrdw_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vbrdw_vsmvl, "V256diV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvbrd_vsl, "V256dLUiUi", "n") +BUILTIN(__builtin_ve_vl_pvbrd_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvbrd_vsMvl, "V256dLUiV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmv_vsvl, "V256dUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmv_vsvvl, "V256dUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmv_vsvmvl, "V256dUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddul_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddul_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddul_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddul_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddul_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddul_vsvmvl, "V256dLUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vadduw_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vadduw_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vadduw_vsvl, "V256dUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vadduw_vsvvl, "V256dUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vadduw_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vadduw_vsvmvl, "V256dUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvaddu_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvaddu_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvaddu_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvaddu_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvaddu_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvaddu_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddswsx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddswsx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddswsx_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddswsx_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddswsx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddswsx_vsvmvl, "V256diV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddswzx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddswzx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddswzx_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddswzx_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddswzx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddswzx_vsvmvl, "V256diV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvadds_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvadds_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvadds_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvadds_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvadds_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvadds_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddsl_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddsl_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddsl_vsvl, "V256dLiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddsl_vsvvl, "V256dLiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddsl_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vaddsl_vsvmvl, "V256dLiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubul_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubul_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubul_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubul_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubul_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubul_vsvmvl, "V256dLUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubuw_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubuw_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubuw_vsvl, "V256dUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubuw_vsvvl, "V256dUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubuw_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubuw_vsvmvl, "V256dUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsubu_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsubu_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsubu_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsubu_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsubu_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsubu_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubswsx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubswsx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubswsx_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubswsx_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubswsx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubswsx_vsvmvl, "V256diV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubswzx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubswzx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubswzx_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubswzx_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubswzx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubswzx_vsvmvl, "V256diV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsubs_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsubs_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsubs_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsubs_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsubs_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsubs_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubsl_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubsl_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubsl_vsvl, "V256dLiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubsl_vsvvl, "V256dLiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubsl_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsubsl_vsvmvl, "V256dLiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulul_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulul_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulul_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulul_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulul_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulul_vsvmvl, "V256dLUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmuluw_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmuluw_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmuluw_vsvl, "V256dUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmuluw_vsvvl, "V256dUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmuluw_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmuluw_vsvmvl, "V256dUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulswsx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulswsx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulswsx_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulswsx_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulswsx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulswsx_vsvmvl, "V256diV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulswzx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulswzx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulswzx_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulswzx_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulswzx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulswzx_vsvmvl, "V256diV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulsl_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulsl_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulsl_vsvl, "V256dLiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulsl_vsvvl, "V256dLiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulsl_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulsl_vsvmvl, "V256dLiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulslw_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulslw_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulslw_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmulslw_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivul_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivul_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivul_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivul_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivul_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivul_vsvmvl, "V256dLUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivuw_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivuw_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivuw_vsvl, "V256dUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivuw_vsvvl, "V256dUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivuw_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivuw_vsvmvl, "V256dUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivul_vvsl, "V256dV256dLUiUi", "n") +BUILTIN(__builtin_ve_vl_vdivul_vvsvl, "V256dV256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivul_vvsmvl, "V256dV256dLUiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivuw_vvsl, "V256dV256dUiUi", "n") +BUILTIN(__builtin_ve_vl_vdivuw_vvsvl, "V256dV256dUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivuw_vvsmvl, "V256dV256dUiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswsx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswsx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswsx_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswsx_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswsx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswsx_vsvmvl, "V256diV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswzx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswzx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswzx_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswzx_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswzx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswzx_vsvmvl, "V256diV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswsx_vvsl, "V256dV256diUi", "n") +BUILTIN(__builtin_ve_vl_vdivswsx_vvsvl, "V256dV256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswsx_vvsmvl, "V256dV256diV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswzx_vvsl, "V256dV256diUi", "n") +BUILTIN(__builtin_ve_vl_vdivswzx_vvsvl, "V256dV256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivswzx_vvsmvl, "V256dV256diV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivsl_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivsl_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivsl_vsvl, "V256dLiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivsl_vsvvl, "V256dLiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivsl_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivsl_vsvmvl, "V256dLiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivsl_vvsl, "V256dV256dLiUi", "n") +BUILTIN(__builtin_ve_vl_vdivsl_vvsvl, "V256dV256dLiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vdivsl_vvsmvl, "V256dV256dLiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpul_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpul_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpul_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpul_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpul_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpul_vsvmvl, "V256dLUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpuw_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpuw_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpuw_vsvl, "V256dUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpuw_vsvvl, "V256dUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpuw_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpuw_vsvmvl, "V256dUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcmpu_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcmpu_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcmpu_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcmpu_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcmpu_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcmpu_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpswsx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpswsx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpswsx_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpswsx_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpswsx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpswsx_vsvmvl, "V256diV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpswzx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpswzx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpswzx_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpswzx_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpswzx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpswzx_vsvmvl, "V256diV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcmps_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcmps_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcmps_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcmps_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcmps_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcmps_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpsl_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpsl_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpsl_vsvl, "V256dLiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpsl_vsvvl, "V256dLiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpsl_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcmpsl_vsvmvl, "V256dLiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxswsx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxswsx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxswsx_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxswsx_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxswsx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxswsx_vsvmvl, "V256diV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxswzx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxswzx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxswzx_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxswzx_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxswzx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxswzx_vsvmvl, "V256diV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvmaxs_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvmaxs_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvmaxs_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvmaxs_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvmaxs_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvmaxs_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminswsx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminswsx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminswsx_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminswsx_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminswsx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminswsx_vsvmvl, "V256diV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminswzx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminswzx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminswzx_vsvl, "V256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminswzx_vsvvl, "V256diV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminswzx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminswzx_vsvmvl, "V256diV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvmins_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvmins_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvmins_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvmins_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvmins_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvmins_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxsl_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxsl_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxsl_vsvl, "V256dLiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxsl_vsvvl, "V256dLiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxsl_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmaxsl_vsvmvl, "V256dLiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminsl_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminsl_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminsl_vsvl, "V256dLiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminsl_vsvvl, "V256dLiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminsl_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vminsl_vsvmvl, "V256dLiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vand_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vand_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vand_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vand_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vand_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vand_vsvmvl, "V256dLUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvand_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvand_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvand_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvand_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvand_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvand_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vor_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vor_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vor_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vor_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vor_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vor_vsvmvl, "V256dLUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvor_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvor_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvor_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvor_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvor_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvor_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vxor_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vxor_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vxor_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vxor_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vxor_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vxor_vsvmvl, "V256dLUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvxor_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvxor_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvxor_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvxor_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvxor_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvxor_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_veqv_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_veqv_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_veqv_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_veqv_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_veqv_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_veqv_vsvmvl, "V256dLUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pveqv_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pveqv_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pveqv_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pveqv_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pveqv_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pveqv_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vldz_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vldz_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vldz_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvldzlo_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvldzlo_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvldzlo_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvldzup_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvldzup_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvldzup_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvldz_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvldz_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvldz_vvMvl, "V256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vpcnt_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vpcnt_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vpcnt_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvpcntlo_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvpcntlo_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvpcntlo_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvpcntup_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvpcntup_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvpcntup_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvpcnt_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvpcnt_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvpcnt_vvMvl, "V256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vbrv_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vbrv_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vbrv_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvbrvlo_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvbrvlo_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvbrvlo_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvbrvup_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvbrvup_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvbrvup_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvbrv_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvbrv_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvbrv_vvMvl, "V256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vseq_vl, "V256dUi", "n") +BUILTIN(__builtin_ve_vl_vseq_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvseqlo_vl, "V256dUi", "n") +BUILTIN(__builtin_ve_vl_pvseqlo_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsequp_vl, "V256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsequp_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvseq_vl, "V256dUi", "n") +BUILTIN(__builtin_ve_vl_pvseq_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsll_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsll_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsll_vvsl, "V256dV256dLUiUi", "n") +BUILTIN(__builtin_ve_vl_vsll_vvsvl, "V256dV256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsll_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsll_vvsmvl, "V256dV256dLUiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsll_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsll_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsll_vvsl, "V256dV256dLUiUi", "n") +BUILTIN(__builtin_ve_vl_pvsll_vvsvl, "V256dV256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsll_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsll_vvsMvl, "V256dV256dLUiV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrl_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrl_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrl_vvsl, "V256dV256dLUiUi", "n") +BUILTIN(__builtin_ve_vl_vsrl_vvsvl, "V256dV256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrl_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrl_vvsmvl, "V256dV256dLUiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsrl_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsrl_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsrl_vvsl, "V256dV256dLUiUi", "n") +BUILTIN(__builtin_ve_vl_pvsrl_vvsvl, "V256dV256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsrl_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsrl_vvsMvl, "V256dV256dLUiV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslawsx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslawsx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslawsx_vvsl, "V256dV256diUi", "n") +BUILTIN(__builtin_ve_vl_vslawsx_vvsvl, "V256dV256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslawsx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslawsx_vvsmvl, "V256dV256diV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslawzx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslawzx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslawzx_vvsl, "V256dV256diUi", "n") +BUILTIN(__builtin_ve_vl_vslawzx_vvsvl, "V256dV256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslawzx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslawzx_vvsmvl, "V256dV256diV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsla_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsla_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsla_vvsl, "V256dV256dLUiUi", "n") +BUILTIN(__builtin_ve_vl_pvsla_vvsvl, "V256dV256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsla_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsla_vvsMvl, "V256dV256dLUiV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslal_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslal_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslal_vvsl, "V256dV256dLiUi", "n") +BUILTIN(__builtin_ve_vl_vslal_vvsvl, "V256dV256dLiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslal_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vslal_vvsmvl, "V256dV256dLiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrawsx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrawsx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrawsx_vvsl, "V256dV256diUi", "n") +BUILTIN(__builtin_ve_vl_vsrawsx_vvsvl, "V256dV256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrawsx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrawsx_vvsmvl, "V256dV256diV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrawzx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrawzx_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrawzx_vvsl, "V256dV256diUi", "n") +BUILTIN(__builtin_ve_vl_vsrawzx_vvsvl, "V256dV256diV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrawzx_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsrawzx_vvsmvl, "V256dV256diV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsra_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsra_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsra_vvsl, "V256dV256dLUiUi", "n") +BUILTIN(__builtin_ve_vl_pvsra_vvsvl, "V256dV256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsra_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvsra_vvsMvl, "V256dV256dLUiV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsral_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsral_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsral_vvsl, "V256dV256dLiUi", "n") +BUILTIN(__builtin_ve_vl_vsral_vvsvl, "V256dV256dLiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsral_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsral_vvsmvl, "V256dV256dLiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsfa_vvssl, "V256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vsfa_vvssvl, "V256dV256dLUiLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsfa_vvssmvl, "V256dV256dLUiLUiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfaddd_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfaddd_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfaddd_vsvl, "V256ddV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfaddd_vsvvl, "V256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfaddd_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfaddd_vsvmvl, "V256ddV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfadds_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfadds_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfadds_vsvl, "V256dfV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfadds_vsvvl, "V256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfadds_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfadds_vsvmvl, "V256dfV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfadd_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfadd_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfadd_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfadd_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfadd_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfadd_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsubd_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsubd_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsubd_vsvl, "V256ddV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsubd_vsvvl, "V256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsubd_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsubd_vsvmvl, "V256ddV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsubs_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsubs_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsubs_vsvl, "V256dfV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsubs_vsvvl, "V256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsubs_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsubs_vsvmvl, "V256dfV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfsub_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfsub_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfsub_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfsub_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfsub_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfsub_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmuld_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmuld_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmuld_vsvl, "V256ddV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmuld_vsvvl, "V256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmuld_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmuld_vsvmvl, "V256ddV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmuls_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmuls_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmuls_vsvl, "V256dfV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmuls_vsvvl, "V256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmuls_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmuls_vsvmvl, "V256dfV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmul_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmul_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmul_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmul_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmul_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmul_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfdivd_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfdivd_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfdivd_vsvl, "V256ddV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfdivd_vsvvl, "V256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfdivd_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfdivd_vsvmvl, "V256ddV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfdivs_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfdivs_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfdivs_vsvl, "V256dfV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfdivs_vsvvl, "V256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfdivs_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfdivs_vsvmvl, "V256dfV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsqrtd_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsqrtd_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsqrts_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsqrts_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfcmpd_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfcmpd_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfcmpd_vsvl, "V256ddV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfcmpd_vsvvl, "V256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfcmpd_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfcmpd_vsvmvl, "V256ddV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfcmps_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfcmps_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfcmps_vsvl, "V256dfV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfcmps_vsvvl, "V256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfcmps_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfcmps_vsvmvl, "V256dfV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfcmp_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfcmp_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfcmp_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfcmp_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfcmp_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfcmp_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmaxd_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmaxd_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmaxd_vsvl, "V256ddV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmaxd_vsvvl, "V256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmaxd_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmaxd_vsvmvl, "V256ddV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmaxs_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmaxs_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmaxs_vsvl, "V256dfV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmaxs_vsvvl, "V256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmaxs_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmaxs_vsvmvl, "V256dfV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmax_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmax_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmax_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmax_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmax_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmax_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmind_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmind_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmind_vsvl, "V256ddV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmind_vsvvl, "V256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmind_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmind_vsvmvl, "V256ddV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmins_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmins_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmins_vsvl, "V256dfV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmins_vsvvl, "V256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmins_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmins_vsvmvl, "V256dfV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmin_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmin_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmin_vsvl, "V256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmin_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmin_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmin_vsvMvl, "V256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmadd_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmadd_vvvvvl, "V256dV256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmadd_vsvvl, "V256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmadd_vsvvvl, "V256ddV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmadd_vvsvl, "V256dV256ddV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmadd_vvsvvl, "V256dV256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmadd_vvvvmvl, "V256dV256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmadd_vsvvmvl, "V256ddV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmadd_vvsvmvl, "V256dV256ddV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmads_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmads_vvvvvl, "V256dV256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmads_vsvvl, "V256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmads_vsvvvl, "V256dfV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmads_vvsvl, "V256dV256dfV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmads_vvsvvl, "V256dV256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmads_vvvvmvl, "V256dV256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmads_vsvvmvl, "V256dfV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmads_vvsvmvl, "V256dV256dfV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmad_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmad_vvvvvl, "V256dV256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmad_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmad_vsvvvl, "V256dLUiV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmad_vvsvl, "V256dV256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmad_vvsvvl, "V256dV256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmad_vvvvMvl, "V256dV256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmad_vsvvMvl, "V256dLUiV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmad_vvsvMvl, "V256dV256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbd_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbd_vvvvvl, "V256dV256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbd_vsvvl, "V256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbd_vsvvvl, "V256ddV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbd_vvsvl, "V256dV256ddV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbd_vvsvvl, "V256dV256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbd_vvvvmvl, "V256dV256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbd_vsvvmvl, "V256ddV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbd_vvsvmvl, "V256dV256ddV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbs_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbs_vvvvvl, "V256dV256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbs_vsvvl, "V256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbs_vsvvvl, "V256dfV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbs_vvsvl, "V256dV256dfV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbs_vvsvvl, "V256dV256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbs_vvvvmvl, "V256dV256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbs_vsvvmvl, "V256dfV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmsbs_vvsvmvl, "V256dV256dfV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmsb_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmsb_vvvvvl, "V256dV256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmsb_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmsb_vsvvvl, "V256dLUiV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmsb_vvsvl, "V256dV256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmsb_vvsvvl, "V256dV256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmsb_vvvvMvl, "V256dV256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmsb_vsvvMvl, "V256dLUiV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmsb_vvsvMvl, "V256dV256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmadd_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmadd_vvvvvl, "V256dV256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmadd_vsvvl, "V256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmadd_vsvvvl, "V256ddV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmadd_vvsvl, "V256dV256ddV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmadd_vvsvvl, "V256dV256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmadd_vvvvmvl, "V256dV256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmadd_vsvvmvl, "V256ddV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmadd_vvsvmvl, "V256dV256ddV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmads_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmads_vvvvvl, "V256dV256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmads_vsvvl, "V256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmads_vsvvvl, "V256dfV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmads_vvsvl, "V256dV256dfV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmads_vvsvvl, "V256dV256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmads_vvvvmvl, "V256dV256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmads_vsvvmvl, "V256dfV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmads_vvsvmvl, "V256dV256dfV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmad_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmad_vvvvvl, "V256dV256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmad_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmad_vsvvvl, "V256dLUiV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmad_vvsvl, "V256dV256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmad_vvsvvl, "V256dV256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmad_vvvvMvl, "V256dV256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmad_vsvvMvl, "V256dLUiV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmad_vvsvMvl, "V256dV256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbd_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbd_vvvvvl, "V256dV256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbd_vsvvl, "V256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbd_vsvvvl, "V256ddV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbd_vvsvl, "V256dV256ddV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbd_vvsvvl, "V256dV256ddV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbd_vvvvmvl, "V256dV256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbd_vsvvmvl, "V256ddV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbd_vvsvmvl, "V256dV256ddV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbs_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbs_vvvvvl, "V256dV256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbs_vsvvl, "V256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbs_vsvvvl, "V256dfV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbs_vvsvl, "V256dV256dfV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbs_vvsvvl, "V256dV256dfV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbs_vvvvmvl, "V256dV256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbs_vsvvmvl, "V256dfV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfnmsbs_vvsvmvl, "V256dV256dfV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmsb_vvvvl, "V256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmsb_vvvvvl, "V256dV256dV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmsb_vsvvl, "V256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmsb_vsvvvl, "V256dLUiV256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmsb_vvsvl, "V256dV256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmsb_vvsvvl, "V256dV256dLUiV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmsb_vvvvMvl, "V256dV256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmsb_vsvvMvl, "V256dLUiV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfnmsb_vvsvMvl, "V256dV256dLUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrcpd_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrcpd_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrcps_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrcps_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvrcp_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvrcp_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrsqrtd_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrsqrtd_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrsqrts_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrsqrts_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvrsqrt_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvrsqrt_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrsqrtdnex_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrsqrtdnex_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrsqrtsnex_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrsqrtsnex_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvrsqrtnex_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvrsqrtnex_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwdsx_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwdsx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwdsx_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwdsxrz_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwdsxrz_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwdsxrz_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwdzx_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwdzx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwdzx_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwdzxrz_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwdzxrz_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwdzxrz_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwssx_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwssx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwssx_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwssxrz_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwssxrz_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwssxrz_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwszx_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwszx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwszx_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwszxrz_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwszxrz_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtwszxrz_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcvtws_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcvtws_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcvtws_vvMvl, "V256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcvtwsrz_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcvtwsrz_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcvtwsrz_vvMvl, "V256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtld_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtld_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtld_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtldrz_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtldrz_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtldrz_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtdw_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtdw_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtsw_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtsw_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcvtsw_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvcvtsw_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtdl_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtdl_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtds_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtds_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtsd_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcvtsd_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmrg_vvvml, "V256dV256dV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vmrg_vvvmvl, "V256dV256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmrg_vsvml, "V256dLUiV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vmrg_vsvmvl, "V256dLUiV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmrgw_vvvMl, "V256dV256dV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_vmrgw_vvvMvl, "V256dV256dV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vmrgw_vsvMl, "V256dUiV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_vmrgw_vsvMvl, "V256dUiV256dV512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vshf_vvvsl, "V256dV256dV256dLUiUi", "n") +BUILTIN(__builtin_ve_vl_vshf_vvvsvl, "V256dV256dV256dLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vcp_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vex_vvmvl, "V256dV256dV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmklat_ml, "V256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmklaf_ml, "V256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkat_Ml, "V512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkaf_Ml, "V512bUi", "n") +BUILTIN(__builtin_ve_vl_vfmklgt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmklgt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkllt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkllt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmklne_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmklne_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkleq_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkleq_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmklge_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmklge_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmklle_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmklle_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmklnum_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmklnum_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmklnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmklnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmklgtnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmklgtnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmklltnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmklltnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmklnenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmklnenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkleqnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkleqnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmklgenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmklgenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkllenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkllenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwgt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwgt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwlt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwlt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwne_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwne_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkweq_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkweq_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwge_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwge_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwle_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwle_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwnum_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwnum_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwgtnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwgtnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwltnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwltnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwnenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwnenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkweqnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkweqnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwgenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwgenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwlenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkwlenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlogt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupgt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlogt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupgt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlolt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwuplt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlolt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwuplt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlone_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupne_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlone_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupne_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwloeq_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupeq_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwloeq_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupeq_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwloge_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupge_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwloge_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupge_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlole_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwuple_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlole_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwuple_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlonum_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupnum_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlonum_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupnum_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlonan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlonan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlogtnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupgtnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlogtnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupgtnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwloltnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupltnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwloltnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupltnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlonenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupnenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlonenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupnenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwloeqnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupeqnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwloeqnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupeqnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlogenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupgenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlogenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwupgenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlolenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwuplenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlolenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwuplenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwgt_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwgt_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlt_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlt_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwne_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwne_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkweq_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkweq_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwge_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwge_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwle_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwle_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwnum_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwnum_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwnan_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwnan_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwgtnan_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwgtnan_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwltnan_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwltnan_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwnenan_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwnenan_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkweqnan_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkweqnan_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwgenan_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwgenan_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlenan_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkwlenan_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdgt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdgt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdlt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdlt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdne_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdne_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdeq_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdeq_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdge_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdge_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdle_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdle_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdnum_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdnum_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdgtnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdgtnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdltnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdltnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdnenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdnenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdeqnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdeqnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdgenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdgenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdlenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkdlenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmksgt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmksgt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkslt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkslt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmksne_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmksne_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkseq_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkseq_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmksge_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmksge_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmksle_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmksle_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmksnum_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmksnum_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmksnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmksnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmksgtnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmksgtnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmksltnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmksltnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmksnenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmksnenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkseqnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkseqnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmksgenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmksgenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfmkslenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfmkslenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslogt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupgt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslogt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupgt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslolt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksuplt_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslolt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksuplt_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslone_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupne_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslone_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupne_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksloeq_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupeq_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksloeq_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupeq_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksloge_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupge_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksloge_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupge_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslole_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksuple_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslole_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksuple_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslonum_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupnum_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslonum_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupnum_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslonan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslonan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslogtnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupgtnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslogtnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupgtnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksloltnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupltnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksloltnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupltnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslonenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupnenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslonenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupnenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksloeqnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupeqnan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksloeqnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupeqnan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslogenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupgenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslogenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksupgenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslolenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksuplenan_mvl, "V256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslolenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksuplenan_mvml, "V256bV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksgt_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksgt_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslt_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslt_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksne_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksne_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkseq_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkseq_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksge_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksge_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksle_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksle_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksnum_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksnum_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksnan_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksnan_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksgtnan_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksgtnan_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksltnan_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksltnan_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksnenan_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksnenan_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkseqnan_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkseqnan_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksgenan_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmksgenan_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslenan_Mvl, "V512bV256dUi", "n") +BUILTIN(__builtin_ve_vl_pvfmkslenan_MvMl, "V512bV256dV512bUi", "n") +BUILTIN(__builtin_ve_vl_vsumwsx_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsumwsx_vvml, "V256dV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vsumwzx_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsumwzx_vvml, "V256dV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vsuml_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsuml_vvml, "V256dV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfsumd_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsumd_vvml, "V256dV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vfsums_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfsums_vvml, "V256dV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vrmaxswfstsx_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrmaxswfstsx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrmaxswlstsx_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrmaxswlstsx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrmaxswfstzx_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrmaxswfstzx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrmaxswlstzx_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrmaxswlstzx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrminswfstsx_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrminswfstsx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrminswlstsx_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrminswlstsx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrminswfstzx_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrminswfstzx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrminswlstzx_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrminswlstzx_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrmaxslfst_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrmaxslfst_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrmaxsllst_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrmaxsllst_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrminslfst_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrminslfst_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrminsllst_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrminsllst_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrmaxdfst_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrmaxdfst_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrmaxdlst_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrmaxdlst_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrmaxsfst_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrmaxsfst_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrmaxslst_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrmaxslst_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrmindfst_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrmindfst_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrmindlst_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrmindlst_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrminsfst_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrminsfst_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrminslst_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vfrminslst_vvvl, "V256dV256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrand_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrand_vvml, "V256dV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vror_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vror_vvml, "V256dV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vrxor_vvl, "V256dV256dUi", "n") +BUILTIN(__builtin_ve_vl_vrxor_vvml, "V256dV256dV256bUi", "n") +BUILTIN(__builtin_ve_vl_vgt_vvssl, "V256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vgt_vvssvl, "V256dV256dLUiLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgt_vvssml, "V256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vgt_vvssmvl, "V256dV256dLUiLUiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgtnc_vvssl, "V256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vgtnc_vvssvl, "V256dV256dLUiLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgtnc_vvssml, "V256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vgtnc_vvssmvl, "V256dV256dLUiLUiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgtu_vvssl, "V256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vgtu_vvssvl, "V256dV256dLUiLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgtu_vvssml, "V256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vgtu_vvssmvl, "V256dV256dLUiLUiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgtunc_vvssl, "V256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vgtunc_vvssvl, "V256dV256dLUiLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgtunc_vvssml, "V256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vgtunc_vvssmvl, "V256dV256dLUiLUiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgtlsx_vvssl, "V256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vgtlsx_vvssvl, "V256dV256dLUiLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgtlsx_vvssml, "V256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vgtlsx_vvssmvl, "V256dV256dLUiLUiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgtlsxnc_vvssl, "V256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vgtlsxnc_vvssvl, "V256dV256dLUiLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgtlsxnc_vvssml, "V256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vgtlsxnc_vvssmvl, "V256dV256dLUiLUiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgtlzx_vvssl, "V256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vgtlzx_vvssvl, "V256dV256dLUiLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgtlzx_vvssml, "V256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vgtlzx_vvssmvl, "V256dV256dLUiLUiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgtlzxnc_vvssl, "V256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vgtlzxnc_vvssvl, "V256dV256dLUiLUiV256dUi", "n") +BUILTIN(__builtin_ve_vl_vgtlzxnc_vvssml, "V256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vgtlzxnc_vvssmvl, "V256dV256dLUiLUiV256bV256dUi", "n") +BUILTIN(__builtin_ve_vl_vsc_vvssl, "vV256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vsc_vvssml, "vV256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vscnc_vvssl, "vV256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vscnc_vvssml, "vV256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vscot_vvssl, "vV256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vscot_vvssml, "vV256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vscncot_vvssl, "vV256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vscncot_vvssml, "vV256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vscu_vvssl, "vV256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vscu_vvssml, "vV256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vscunc_vvssl, "vV256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vscunc_vvssml, "vV256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vscuot_vvssl, "vV256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vscuot_vvssml, "vV256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vscuncot_vvssl, "vV256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vscuncot_vvssml, "vV256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vscl_vvssl, "vV256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vscl_vvssml, "vV256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vsclnc_vvssl, "vV256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vsclnc_vvssml, "vV256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vsclot_vvssl, "vV256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vsclot_vvssml, "vV256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_vsclncot_vvssl, "vV256dV256dLUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_vsclncot_vvssml, "vV256dV256dLUiLUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_andm_mmm, "V256bV256bV256b", "n") +BUILTIN(__builtin_ve_vl_andm_MMM, "V512bV512bV512b", "n") +BUILTIN(__builtin_ve_vl_orm_mmm, "V256bV256bV256b", "n") +BUILTIN(__builtin_ve_vl_orm_MMM, "V512bV512bV512b", "n") +BUILTIN(__builtin_ve_vl_xorm_mmm, "V256bV256bV256b", "n") +BUILTIN(__builtin_ve_vl_xorm_MMM, "V512bV512bV512b", "n") +BUILTIN(__builtin_ve_vl_eqvm_mmm, "V256bV256bV256b", "n") +BUILTIN(__builtin_ve_vl_eqvm_MMM, "V512bV512bV512b", "n") +BUILTIN(__builtin_ve_vl_nndm_mmm, "V256bV256bV256b", "n") +BUILTIN(__builtin_ve_vl_nndm_MMM, "V512bV512bV512b", "n") +BUILTIN(__builtin_ve_vl_negm_mm, "V256bV256b", "n") +BUILTIN(__builtin_ve_vl_negm_MM, "V512bV512b", "n") +BUILTIN(__builtin_ve_vl_pcvm_sml, "LUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_lzvm_sml, "LUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_tovm_sml, "LUiV256bUi", "n") +BUILTIN(__builtin_ve_vl_lcr_sss, "LUiLUiLUi", "n") +BUILTIN(__builtin_ve_vl_scr_sss, "vLUiLUiLUi", "n") +BUILTIN(__builtin_ve_vl_tscr_ssss, "LUiLUiLUiLUi", "n") +BUILTIN(__builtin_ve_vl_fidcr_sss, "LUiLUiUi", "n") +BUILTIN(__builtin_ve_vl_fencei, "v", "n") +BUILTIN(__builtin_ve_vl_fencem_s, "vUi", "n") +BUILTIN(__builtin_ve_vl_fencec_s, "vUi", "n") +BUILTIN(__builtin_ve_vl_svob, "v", "n") diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsWebAssembly.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsWebAssembly.def index 04ec45aa3b74..7e950914ad94 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsWebAssembly.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsWebAssembly.def @@ -119,18 +119,22 @@ TARGET_BUILTIN(__builtin_wasm_all_true_i16x8, "iV8s", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_all_true_i32x4, "iV4i", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_all_true_i64x2, "iV2LLi", "nc", "simd128") -TARGET_BUILTIN(__builtin_wasm_bitmask_i8x16, "iV16Sc", "nc", "simd128") -TARGET_BUILTIN(__builtin_wasm_bitmask_i16x8, "iV8s", "nc", "simd128") -TARGET_BUILTIN(__builtin_wasm_bitmask_i32x4, "iV4i", "nc", "simd128") -TARGET_BUILTIN(__builtin_wasm_bitmask_i64x2, "iV2LLi", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_bitmask_i8x16, "UiV16Sc", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_bitmask_i16x8, "UiV8s", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_bitmask_i32x4, "UiV4i", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_bitmask_i64x2, "UiV2LLi", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_abs_f32x4, "V4fV4f", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_abs_f64x2, "V2dV2d", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_min_f32x4, "V4fV4fV4f", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_max_f32x4, "V4fV4fV4f", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_pmin_f32x4, "V4fV4fV4f", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_pmax_f32x4, "V4fV4fV4f", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_min_f64x2, "V2dV2dV2d", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_max_f64x2, "V2dV2dV2d", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_pmin_f64x2, "V2dV2dV2d", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_pmax_f64x2, "V2dV2dV2d", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_ceil_f32x4, "V4fV4f", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_floor_f32x4, "V4fV4f", "nc", "simd128") @@ -154,8 +158,56 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, "V16UcV8sV8s", "nc", "simd12 TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8UsV4iV4i", "nc", "simd128") -TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4, "V4iV2d", "nc", "simd128") -TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4, "V4UiV2d", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_trunc_sat_s_zero_f64x2_i32x4, "V4iV2d", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_trunc_sat_u_zero_f64x2_i32x4, "V4UiV2d", "nc", "simd128") + +// Relaxed SIMD builtins +TARGET_BUILTIN(__builtin_wasm_relaxed_madd_f32x4, "V4fV4fV4fV4f", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_nmadd_f32x4, "V4fV4fV4fV4f", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_madd_f64x2, "V2dV2dV2dV2d", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_nmadd_f64x2, "V2dV2dV2dV2d", "nc", "relaxed-simd") + +TARGET_BUILTIN(__builtin_wasm_relaxed_laneselect_i8x16, "V16ScV16ScV16ScV16Sc", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_laneselect_i16x8, "V8sV8sV8sV8s", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_laneselect_i32x4, "V4iV4iV4iV4i", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_laneselect_i64x2, "V2LLiV2LLiV2LLiV2LLi", "nc", "relaxed-simd") + +TARGET_BUILTIN(__builtin_wasm_relaxed_swizzle_i8x16, "V16ScV16ScV16Sc", "nc", "relaxed-simd") + +TARGET_BUILTIN(__builtin_wasm_relaxed_min_f32x4, "V4fV4fV4f", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_max_f32x4, "V4fV4fV4f", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_min_f64x2, "V2dV2dV2d", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_max_f64x2, "V2dV2dV2d", "nc", "relaxed-simd") + +TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_s_i32x4_f32x4, "V4iV4f", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_u_i32x4_f32x4, "V4UiV4f", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_s_zero_i32x4_f64x2, "V4iV2d", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_u_zero_i32x4_f64x2, "V4UiV2d", "nc", "relaxed-simd") + +TARGET_BUILTIN(__builtin_wasm_relaxed_q15mulr_s_i16x8, "V8sV8sV8s", "nc", "relaxed-simd") + +TARGET_BUILTIN(__builtin_wasm_relaxed_dot_i8x16_i7x16_s_i16x8, "V8sV16ScV16Sc", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_dot_i8x16_i7x16_add_s_i32x4, "V4iV16ScV16ScV4i", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_dot_bf16x8_add_f32_f32x4, "V4fV8UsV8UsV4f", "nc", "relaxed-simd") + +// Reference Types builtins +// Some builtins are custom type-checked - see 't' as part of the third argument, +// in which case the argument spec (second argument) is unused. + +TARGET_BUILTIN(__builtin_wasm_ref_null_extern, "i", "nct", "reference-types") + +// A funcref represented as a function pointer with the funcref attribute +// attached to the type, therefore SemaChecking will check for the right +// return type. +TARGET_BUILTIN(__builtin_wasm_ref_null_func, "i", "nct", "reference-types") + +// Table builtins +TARGET_BUILTIN(__builtin_wasm_table_set, "viii", "t", "reference-types") +TARGET_BUILTIN(__builtin_wasm_table_get, "iii", "t", "reference-types") +TARGET_BUILTIN(__builtin_wasm_table_size, "zi", "nt", "reference-types") +TARGET_BUILTIN(__builtin_wasm_table_grow, "iiii", "nt", "reference-types") +TARGET_BUILTIN(__builtin_wasm_table_fill, "viiii", "t", "reference-types") +TARGET_BUILTIN(__builtin_wasm_table_copy, "viiiii", "t", "reference-types") #undef BUILTIN #undef TARGET_BUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsX86.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsX86.def index 18e541fe9cb5..60b752ad4854 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsX86.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsX86.def @@ -254,25 +254,14 @@ TARGET_BUILTIN(__builtin_ia32_minpd, "V2dV2dV2d", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_maxpd, "V2dV2dV2d", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_minsd, "V2dV2dV2d", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_maxsd, "V2dV2dV2d", "ncV:128:", "sse2") -TARGET_BUILTIN(__builtin_ia32_paddsb128, "V16cV16cV16c", "ncV:128:", "sse2") -TARGET_BUILTIN(__builtin_ia32_paddsw128, "V8sV8sV8s", "ncV:128:", "sse2") -TARGET_BUILTIN(__builtin_ia32_psubsb128, "V16cV16cV16c", "ncV:128:", "sse2") -TARGET_BUILTIN(__builtin_ia32_psubsw128, "V8sV8sV8s", "ncV:128:", "sse2") -TARGET_BUILTIN(__builtin_ia32_paddusb128, "V16cV16cV16c", "ncV:128:", "sse2") -TARGET_BUILTIN(__builtin_ia32_paddusw128, "V8sV8sV8s", "ncV:128:", "sse2") -TARGET_BUILTIN(__builtin_ia32_psubusb128, "V16cV16cV16c", "ncV:128:", "sse2") -TARGET_BUILTIN(__builtin_ia32_psubusw128, "V8sV8sV8s", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_pmulhw128, "V8sV8sV8s", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_pavgb128, "V16cV16cV16c", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_pavgw128, "V8sV8sV8s", "ncV:128:", "sse2") -TARGET_BUILTIN(__builtin_ia32_pmaxub128, "V16cV16cV16c", "ncV:128:", "sse2") -TARGET_BUILTIN(__builtin_ia32_pmaxsw128, "V8sV8sV8s", "ncV:128:", "sse2") -TARGET_BUILTIN(__builtin_ia32_pminub128, "V16cV16cV16c", "ncV:128:", "sse2") -TARGET_BUILTIN(__builtin_ia32_pminsw128, "V8sV8sV8s", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_packsswb128, "V16cV8sV8s", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_packssdw128, "V8sV4iV4i", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_packuswb128, "V16cV8sV8s", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_pmulhuw128, "V8sV8sV8s", "ncV:128:", "sse2") +TARGET_BUILTIN(__builtin_ia32_vec_ext_v2di, "OiV2OiIi", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_vec_ext_v4si, "iV4iIi", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_vec_ext_v4sf, "fV4fIi", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_vec_ext_v8hi, "sV8sIi", "ncV:128:", "sse2") @@ -296,19 +285,16 @@ TARGET_BUILTIN(__builtin_ia32_pshufb128, "V16cV16cV16c", "ncV:128:", "ssse3") TARGET_BUILTIN(__builtin_ia32_psignb128, "V16cV16cV16c", "ncV:128:", "ssse3") TARGET_BUILTIN(__builtin_ia32_psignw128, "V8sV8sV8s", "ncV:128:", "ssse3") TARGET_BUILTIN(__builtin_ia32_psignd128, "V4iV4iV4i", "ncV:128:", "ssse3") -TARGET_BUILTIN(__builtin_ia32_pabsb128, "V16cV16c", "ncV:128:", "ssse3") -TARGET_BUILTIN(__builtin_ia32_pabsw128, "V8sV8s", "ncV:128:", "ssse3") -TARGET_BUILTIN(__builtin_ia32_pabsd128, "V4iV4i", "ncV:128:", "ssse3") TARGET_BUILTIN(__builtin_ia32_ldmxcsr, "vUi", "n", "sse") -TARGET_HEADER_BUILTIN(_mm_setcsr, "vUi", "nh","xmmintrin.h", ALL_LANGUAGES, "sse") +TARGET_HEADER_BUILTIN(_mm_setcsr, "vUi", "nh",XMMINTRIN_H, ALL_LANGUAGES, "sse") TARGET_BUILTIN(__builtin_ia32_stmxcsr, "Ui", "n", "sse") -TARGET_HEADER_BUILTIN(_mm_getcsr, "Ui", "nh", "xmmintrin.h", ALL_LANGUAGES, "sse") +TARGET_HEADER_BUILTIN(_mm_getcsr, "Ui", "nh", XMMINTRIN_H, ALL_LANGUAGES, "sse") TARGET_BUILTIN(__builtin_ia32_cvtss2si, "iV4f", "ncV:128:", "sse") TARGET_BUILTIN(__builtin_ia32_cvttss2si, "iV4f", "ncV:128:", "sse") TARGET_BUILTIN(__builtin_ia32_movmskps, "iV4f", "nV:128:", "sse") TARGET_BUILTIN(__builtin_ia32_sfence, "v", "n", "sse") -TARGET_HEADER_BUILTIN(_mm_sfence, "v", "nh", "xmmintrin.h", ALL_LANGUAGES, "sse") +TARGET_HEADER_BUILTIN(_mm_sfence, "v", "nh", XMMINTRIN_H, ALL_LANGUAGES, "sse") TARGET_BUILTIN(__builtin_ia32_rcpps, "V4fV4f", "ncV:128:", "sse") TARGET_BUILTIN(__builtin_ia32_rcpss, "V4fV4f", "ncV:128:", "sse") TARGET_BUILTIN(__builtin_ia32_rsqrtps, "V4fV4f", "ncV:128:", "sse") @@ -337,13 +323,13 @@ TARGET_BUILTIN(__builtin_ia32_cvtsd2ss, "V4fV4fV2d", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_cvtps2dq, "V4iV4f", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_cvttps2dq, "V4iV4f", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_clflush, "vvC*", "n", "sse2") -TARGET_HEADER_BUILTIN(_mm_clflush, "vvC*", "nh", "emmintrin.h", ALL_LANGUAGES, "sse2") +TARGET_HEADER_BUILTIN(_mm_clflush, "vvC*", "nh", EMMINTRIN_H, ALL_LANGUAGES, "sse2") TARGET_BUILTIN(__builtin_ia32_lfence, "v", "n", "sse2") -TARGET_HEADER_BUILTIN(_mm_lfence, "v", "nh", "emmintrin.h", ALL_LANGUAGES, "sse2") +TARGET_HEADER_BUILTIN(_mm_lfence, "v", "nh", EMMINTRIN_H, ALL_LANGUAGES, "sse2") TARGET_BUILTIN(__builtin_ia32_mfence, "v", "n", "sse2") -TARGET_HEADER_BUILTIN(_mm_mfence, "v", "nh", "emmintrin.h", ALL_LANGUAGES, "sse2") +TARGET_HEADER_BUILTIN(_mm_mfence, "v", "nh", EMMINTRIN_H, ALL_LANGUAGES, "sse2") TARGET_BUILTIN(__builtin_ia32_pause, "v", "n", "") -TARGET_HEADER_BUILTIN(_mm_pause, "v", "nh", "emmintrin.h", ALL_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_mm_pause, "v", "nh", EMMINTRIN_H, ALL_LANGUAGES, "") TARGET_BUILTIN(__builtin_ia32_pmuludq128, "V2OiV4iV4i", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_psraw128, "V8sV8sV8s", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_psrad128, "V4iV4iV4i", "ncV:128:", "sse2") @@ -380,14 +366,6 @@ TARGET_BUILTIN(__builtin_ia32_blendvpd, "V2dV2dV2dV2d", "ncV:128:", "sse4.1") TARGET_BUILTIN(__builtin_ia32_blendvps, "V4fV4fV4fV4f", "ncV:128:", "sse4.1") TARGET_BUILTIN(__builtin_ia32_packusdw128, "V8sV4iV4i", "ncV:128:", "sse4.1") -TARGET_BUILTIN(__builtin_ia32_pmaxsb128, "V16cV16cV16c", "ncV:128:", "sse4.1") -TARGET_BUILTIN(__builtin_ia32_pmaxsd128, "V4iV4iV4i", "ncV:128:", "sse4.1") -TARGET_BUILTIN(__builtin_ia32_pmaxud128, "V4iV4iV4i", "ncV:128:", "sse4.1") -TARGET_BUILTIN(__builtin_ia32_pmaxuw128, "V8sV8sV8s", "ncV:128:", "sse4.1") -TARGET_BUILTIN(__builtin_ia32_pminsb128, "V16cV16cV16c", "ncV:128:", "sse4.1") -TARGET_BUILTIN(__builtin_ia32_pminsd128, "V4iV4iV4i", "ncV:128:", "sse4.1") -TARGET_BUILTIN(__builtin_ia32_pminud128, "V4iV4iV4i", "ncV:128:", "sse4.1") -TARGET_BUILTIN(__builtin_ia32_pminuw128, "V8sV8sV8s", "ncV:128:", "sse4.1") TARGET_BUILTIN(__builtin_ia32_pmuldq128, "V2OiV4iV4i", "ncV:128:", "sse4.1") TARGET_BUILTIN(__builtin_ia32_roundps, "V4fV4fIi", "ncV:128:", "sse4.1") TARGET_BUILTIN(__builtin_ia32_roundss, "V4fV4fV4fIi", "ncV:128:", "sse4.1") @@ -421,9 +399,9 @@ TARGET_BUILTIN(__builtin_ia32_pcmpestrio128, "iV16ciV16ciIc","ncV:128:", "sse4.2 TARGET_BUILTIN(__builtin_ia32_pcmpestris128, "iV16ciV16ciIc","ncV:128:", "sse4.2") TARGET_BUILTIN(__builtin_ia32_pcmpestriz128, "iV16ciV16ciIc","ncV:128:", "sse4.2") -TARGET_BUILTIN(__builtin_ia32_crc32qi, "UiUiUc", "nc", "sse4.2") -TARGET_BUILTIN(__builtin_ia32_crc32hi, "UiUiUs", "nc", "sse4.2") -TARGET_BUILTIN(__builtin_ia32_crc32si, "UiUiUi", "nc", "sse4.2") +TARGET_BUILTIN(__builtin_ia32_crc32qi, "UiUiUc", "nc", "crc32") +TARGET_BUILTIN(__builtin_ia32_crc32hi, "UiUiUs", "nc", "crc32") +TARGET_BUILTIN(__builtin_ia32_crc32si, "UiUiUi", "nc", "crc32") // SSE4a TARGET_BUILTIN(__builtin_ia32_extrqi, "V2OiV2OiIcIc", "ncV:128:", "sse4a") @@ -443,31 +421,31 @@ TARGET_BUILTIN(__builtin_ia32_aeskeygenassist128, "V2OiV2OiIc", "ncV:128:", "aes // VAES TARGET_BUILTIN(__builtin_ia32_aesenc256, "V4OiV4OiV4Oi", "ncV:256:", "vaes") -TARGET_BUILTIN(__builtin_ia32_aesenc512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f,vaes") +TARGET_BUILTIN(__builtin_ia32_aesenc512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f,evex512,vaes") TARGET_BUILTIN(__builtin_ia32_aesenclast256, "V4OiV4OiV4Oi", "ncV:256:", "vaes") -TARGET_BUILTIN(__builtin_ia32_aesenclast512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f,vaes") +TARGET_BUILTIN(__builtin_ia32_aesenclast512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f,evex512,vaes") TARGET_BUILTIN(__builtin_ia32_aesdec256, "V4OiV4OiV4Oi", "ncV:256:", "vaes") -TARGET_BUILTIN(__builtin_ia32_aesdec512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f,vaes") +TARGET_BUILTIN(__builtin_ia32_aesdec512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f,evex512,vaes") TARGET_BUILTIN(__builtin_ia32_aesdeclast256, "V4OiV4OiV4Oi", "ncV:256:", "vaes") -TARGET_BUILTIN(__builtin_ia32_aesdeclast512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f,vaes") +TARGET_BUILTIN(__builtin_ia32_aesdeclast512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f,evex512,vaes") // GFNI TARGET_BUILTIN(__builtin_ia32_vgf2p8affineinvqb_v16qi, "V16cV16cV16cIc", "ncV:128:", "gfni") TARGET_BUILTIN(__builtin_ia32_vgf2p8affineinvqb_v32qi, "V32cV32cV32cIc", "ncV:256:", "avx,gfni") -TARGET_BUILTIN(__builtin_ia32_vgf2p8affineinvqb_v64qi, "V64cV64cV64cIc", "ncV:512:", "avx512bw,gfni") +TARGET_BUILTIN(__builtin_ia32_vgf2p8affineinvqb_v64qi, "V64cV64cV64cIc", "ncV:512:", "avx512f,evex512,gfni") TARGET_BUILTIN(__builtin_ia32_vgf2p8affineqb_v16qi, "V16cV16cV16cIc", "ncV:128:", "gfni") TARGET_BUILTIN(__builtin_ia32_vgf2p8affineqb_v32qi, "V32cV32cV32cIc", "ncV:256:", "avx,gfni") -TARGET_BUILTIN(__builtin_ia32_vgf2p8affineqb_v64qi, "V64cV64cV64cIc", "ncV:512:", "avx512bw,gfni") +TARGET_BUILTIN(__builtin_ia32_vgf2p8affineqb_v64qi, "V64cV64cV64cIc", "ncV:512:", "avx512f,evex512,gfni") TARGET_BUILTIN(__builtin_ia32_vgf2p8mulb_v16qi, "V16cV16cV16c", "ncV:128:", "gfni") TARGET_BUILTIN(__builtin_ia32_vgf2p8mulb_v32qi, "V32cV32cV32c", "ncV:256:", "avx,gfni") -TARGET_BUILTIN(__builtin_ia32_vgf2p8mulb_v64qi, "V64cV64cV64c", "ncV:512:", "avx512bw,gfni") +TARGET_BUILTIN(__builtin_ia32_vgf2p8mulb_v64qi, "V64cV64cV64c", "ncV:512:", "avx512f,evex512,gfni") // CLMUL TARGET_BUILTIN(__builtin_ia32_pclmulqdq128, "V2OiV2OiV2OiIc", "ncV:128:", "pclmul") // VPCLMULQDQ TARGET_BUILTIN(__builtin_ia32_pclmulqdq256, "V4OiV4OiV4OiIc", "ncV:256:", "vpclmulqdq") -TARGET_BUILTIN(__builtin_ia32_pclmulqdq512, "V8OiV8OiV8OiIc", "ncV:512:", "avx512f,vpclmulqdq") +TARGET_BUILTIN(__builtin_ia32_pclmulqdq512, "V8OiV8OiV8OiIc", "ncV:512:", "avx512f,evex512,vpclmulqdq") // AVX TARGET_BUILTIN(__builtin_ia32_addsubpd256, "V4dV4dV4d", "ncV:256:", "avx") @@ -558,21 +536,10 @@ TARGET_BUILTIN(__builtin_ia32_vec_set_v8si, "V8iV8iiIi", "ncV:256:", "avx") // AVX2 TARGET_BUILTIN(__builtin_ia32_mpsadbw256, "V32cV32cV32cIc", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pabsb256, "V32cV32c", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pabsw256, "V16sV16s", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pabsd256, "V8iV8i", "ncV:256:", "avx2") TARGET_BUILTIN(__builtin_ia32_packsswb256, "V32cV16sV16s", "ncV:256:", "avx2") TARGET_BUILTIN(__builtin_ia32_packssdw256, "V16sV8iV8i", "ncV:256:", "avx2") TARGET_BUILTIN(__builtin_ia32_packuswb256, "V32cV16sV16s", "ncV:256:", "avx2") TARGET_BUILTIN(__builtin_ia32_packusdw256, "V16sV8iV8i", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_paddsb256, "V32cV32cV32c", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_paddsw256, "V16sV16sV16s", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_psubsb256, "V32cV32cV32c", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_psubsw256, "V16sV16sV16s", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_paddusb256, "V32cV32cV32c", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_paddusw256, "V16sV16sV16s", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_psubusb256, "V32cV32cV32c", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_psubusw256, "V16sV16sV16s", "ncV:256:", "avx2") TARGET_BUILTIN(__builtin_ia32_palignr256, "V32cV32cV32cIi", "ncV:256:", "avx2") TARGET_BUILTIN(__builtin_ia32_pavgb256, "V32cV32cV32c", "ncV:256:", "avx2") TARGET_BUILTIN(__builtin_ia32_pavgw256, "V16sV16sV16s", "ncV:256:", "avx2") @@ -586,18 +553,6 @@ TARGET_BUILTIN(__builtin_ia32_phsubd256, "V8iV8iV8i", "ncV:256:", "avx2") TARGET_BUILTIN(__builtin_ia32_phsubsw256, "V16sV16sV16s", "ncV:256:", "avx2") TARGET_BUILTIN(__builtin_ia32_pmaddubsw256, "V16sV32cV32c", "ncV:256:", "avx2") TARGET_BUILTIN(__builtin_ia32_pmaddwd256, "V8iV16sV16s", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pmaxub256, "V32cV32cV32c", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pmaxuw256, "V16sV16sV16s", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pmaxud256, "V8iV8iV8i", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pmaxsb256, "V32cV32cV32c", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pmaxsw256, "V16sV16sV16s", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pmaxsd256, "V8iV8iV8i", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pminub256, "V32cV32cV32c", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pminuw256, "V16sV16sV16s", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pminud256, "V8iV8iV8i", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pminsb256, "V32cV32cV32c", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pminsw256, "V16sV16sV16s", "ncV:256:", "avx2") -TARGET_BUILTIN(__builtin_ia32_pminsd256, "V8iV8iV8i", "ncV:256:", "avx2") TARGET_BUILTIN(__builtin_ia32_pmovmskb256, "iV32c", "ncV:256:", "avx2") TARGET_BUILTIN(__builtin_ia32_pmuldq256, "V4OiV8iV8i", "ncV:256:", "avx2") TARGET_BUILTIN(__builtin_ia32_pmulhrsw256, "V16sV16sV16s", "ncV:256:", "avx2") @@ -695,9 +650,9 @@ TARGET_BUILTIN(__builtin_ia32_fxsave, "vv*", "n", "fxsr") TARGET_BUILTIN(__builtin_ia32_xsave, "vv*UOi", "n", "xsave") TARGET_BUILTIN(__builtin_ia32_xrstor, "vv*UOi", "n", "xsave") TARGET_BUILTIN(__builtin_ia32_xgetbv, "UOiUi", "n", "xsave") -TARGET_HEADER_BUILTIN(_xgetbv, "UWiUi", "nh", "immintrin.h", ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_xgetbv, "UWiUi", "nh", IMMINTRIN_H, ALL_MS_LANGUAGES, "") TARGET_BUILTIN(__builtin_ia32_xsetbv, "vUiUOi", "n", "xsave") -TARGET_HEADER_BUILTIN(_xsetbv, "vUiUWi", "nh", "immintrin.h", ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_xsetbv, "vUiUWi", "nh", IMMINTRIN_H, ALL_MS_LANGUAGES, "") TARGET_BUILTIN(__builtin_ia32_xsaveopt, "vv*UOi", "n", "xsaveopt") TARGET_BUILTIN(__builtin_ia32_xrstors, "vv*UOi", "n", "xsaves") TARGET_BUILTIN(__builtin_ia32_xsavec, "vv*UOi", "n", "xsavec") @@ -777,22 +732,22 @@ TARGET_BUILTIN(__builtin_ia32_vfmaddpd256, "V4dV4dV4dV4d", "ncV:256:", "fma|fma4 TARGET_BUILTIN(__builtin_ia32_vfmaddsubps256, "V8fV8fV8fV8f", "ncV:256:", "fma|fma4") TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd256, "V4dV4dV4dV4d", "ncV:256:", "fma|fma4") -TARGET_BUILTIN(__builtin_ia32_vfmaddpd512_mask, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmaddpd512_maskz, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmaddpd512_mask3, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmsubpd512_mask3, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmaddps512_mask, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmaddps512_maskz, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmaddps512_mask3, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmsubps512_mask3, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd512_mask, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd512_maskz, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd512_mask3, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmsubaddpd512_mask3, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmaddsubps512_mask, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmaddsubps512_maskz, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmaddsubps512_mask3, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vfmsubaddps512_mask3, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_vfmaddpd512_mask, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddpd512_maskz, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddpd512_mask3, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmsubpd512_mask3, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddps512_mask, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddps512_maskz, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddps512_mask3, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmsubps512_mask3, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd512_mask, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd512_maskz, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd512_mask3, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmsubaddpd512_mask3, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddsubps512_mask, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddsubps512_maskz, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddsubps512_mask3, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmsubaddps512_mask3, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f,evex512") // XOP TARGET_BUILTIN(__builtin_ia32_vpmacssww, "V8sV8sV8sV8s", "ncV:128:", "xop") @@ -870,108 +825,114 @@ BUILTIN(__rdtsc, "UOi", "") BUILTIN(__builtin_ia32_rdtscp, "UOiUi*", "") TARGET_BUILTIN(__builtin_ia32_rdpid, "Ui", "n", "rdpid") +TARGET_BUILTIN(__builtin_ia32_rdpru, "ULLii", "n", "rdpru") // PKU TARGET_BUILTIN(__builtin_ia32_rdpkru, "Ui", "n", "pku") TARGET_BUILTIN(__builtin_ia32_wrpkru, "vUi", "n", "pku") // AVX-512 -TARGET_BUILTIN(__builtin_ia32_sqrtpd512, "V8dV8dIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_sqrtps512, "V16fV16fIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_sqrtpd512, "V8dV8dIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_sqrtps512, "V16fV16fIi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_rsqrt14sd_mask, "V2dV2dV2dV2dUc", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_rsqrt14ss_mask, "V4fV4fV4fV4fUc", "ncV:128:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_rsqrt14pd512_mask, "V8dV8dV8dUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_rsqrt14ps512_mask, "V16fV16fV16fUs", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_rsqrt14pd512_mask, "V8dV8dV8dUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_rsqrt14ps512_mask, "V16fV16fV16fUs", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_rsqrt28sd_round_mask, "V2dV2dV2dV2dUcIi", "ncV:128:", "avx512er") TARGET_BUILTIN(__builtin_ia32_rsqrt28ss_round_mask, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512er") -TARGET_BUILTIN(__builtin_ia32_rsqrt28pd_mask, "V8dV8dV8dUcIi", "ncV:512:", "avx512er") -TARGET_BUILTIN(__builtin_ia32_rsqrt28ps_mask, "V16fV16fV16fUsIi", "ncV:512:", "avx512er") +TARGET_BUILTIN(__builtin_ia32_rsqrt28pd_mask, "V8dV8dV8dUcIi", "ncV:512:", "avx512er,evex512") +TARGET_BUILTIN(__builtin_ia32_rsqrt28ps_mask, "V16fV16fV16fUsIi", "ncV:512:", "avx512er,evex512") TARGET_BUILTIN(__builtin_ia32_rcp14sd_mask, "V2dV2dV2dV2dUc", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_rcp14ss_mask, "V4fV4fV4fV4fUc", "ncV:128:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_rcp14pd512_mask, "V8dV8dV8dUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_rcp14ps512_mask, "V16fV16fV16fUs", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_rcp14pd512_mask, "V8dV8dV8dUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_rcp14ps512_mask, "V16fV16fV16fUs", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_rcp28sd_round_mask, "V2dV2dV2dV2dUcIi", "ncV:128:", "avx512er") TARGET_BUILTIN(__builtin_ia32_rcp28ss_round_mask, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512er") -TARGET_BUILTIN(__builtin_ia32_rcp28pd_mask, "V8dV8dV8dUcIi", "ncV:512:", "avx512er") -TARGET_BUILTIN(__builtin_ia32_rcp28ps_mask, "V16fV16fV16fUsIi", "ncV:512:", "avx512er") -TARGET_BUILTIN(__builtin_ia32_exp2pd_mask, "V8dV8dV8dUcIi", "ncV:512:", "avx512er") -TARGET_BUILTIN(__builtin_ia32_exp2ps_mask, "V16fV16fV16fUsIi", "ncV:512:", "avx512er") +TARGET_BUILTIN(__builtin_ia32_rcp28pd_mask, "V8dV8dV8dUcIi", "ncV:512:", "avx512er,evex512") +TARGET_BUILTIN(__builtin_ia32_rcp28ps_mask, "V16fV16fV16fUsIi", "ncV:512:", "avx512er,evex512") +TARGET_BUILTIN(__builtin_ia32_exp2pd_mask, "V8dV8dV8dUcIi", "ncV:512:", "avx512er,evex512") +TARGET_BUILTIN(__builtin_ia32_exp2ps_mask, "V16fV16fV16fUsIi", "ncV:512:", "avx512er,evex512") -TARGET_BUILTIN(__builtin_ia32_cvttps2dq512_mask, "V16iV16fV16iUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_cvttps2udq512_mask, "V16iV16fV16iUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_cvttpd2dq512_mask, "V8iV8dV8iUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_cvttpd2udq512_mask, "V8iV8dV8iUcIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_cvttps2dq512_mask, "V16iV16fV16iUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_cvttps2udq512_mask, "V16iV16fV16iUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_cvttpd2dq512_mask, "V8iV8dV8iUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_cvttpd2udq512_mask, "V8iV8dV8iUcIi", "ncV:512:", "avx512f,evex512") -TARGET_BUILTIN(__builtin_ia32_cmpps512_mask, "UsV16fV16fIiUsIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_cmpps512_mask, "UsV16fV16fIiUsIi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_cmpps256_mask, "UcV8fV8fIiUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_cmpps128_mask, "UcV4fV4fIiUc", "ncV:128:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_cmppd512_mask, "UcV8dV8dIiUcIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_cmppd512_mask, "UcV8dV8dIiUcIi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_cmppd256_mask, "UcV4dV4dIiUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_cmppd128_mask, "UcV2dV2dIiUc", "ncV:128:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_rndscaleps_mask, "V16fV16fIiV16fUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_rndscalepd_mask, "V8dV8dIiV8dUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_cvtps2dq512_mask, "V16iV16fV16iUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_cvtpd2dq512_mask, "V8iV8dV8iUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_cvtps2udq512_mask, "V16iV16fV16iUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_cvtpd2udq512_mask, "V8iV8dV8iUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_minps512, "V16fV16fV16fIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_minpd512, "V8dV8dV8dIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_maxps512, "V16fV16fV16fIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_maxpd512, "V8dV8dV8dIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_cvtdq2ps512_mask, "V16fV16iV16fUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_cvtudq2ps512_mask, "V16fV16iV16fUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_cvtpd2ps512_mask, "V8fV8dV8fUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vcvtps2ph512_mask, "V16sV16fIiV16sUs", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vcvtph2ps512_mask, "V16fV16sV16fUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pabsd512, "V16iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pabsq512, "V8OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmaxsd512, "V16iV16iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmaxsq512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmaxud512, "V16iV16iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmaxuq512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pminsd512, "V16iV16iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pminsq512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pminud512, "V16iV16iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pminuq512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmuldq512, "V8OiV16iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmuludq512, "V8OiV16iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_loaddqusi512_mask, "V16iiC*V16iUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_loaddqudi512_mask, "V8OiOiC*V8OiUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_loadups512_mask, "V16ffC*V16fUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_loadaps512_mask, "V16fV16fC*V16fUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_loadupd512_mask, "V8ddC*V8dUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_loadapd512_mask, "V8dV8dC*V8dUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_storedqudi512_mask, "vOi*V8OiUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_storedqusi512_mask, "vi*V16iUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_storeupd512_mask, "vd*V8dUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_storeapd512_mask, "vV8d*V8dUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_storeups512_mask, "vf*V16fUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_storeaps512_mask, "vV16f*V16fUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_alignq512, "V8OiV8OiV8OiIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_alignd512, "V16iV16iV16iIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_rndscaleps_mask, "V16fV16fIiV16fUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_rndscalepd_mask, "V8dV8dIiV8dUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtps2dq512_mask, "V16iV16fV16iUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtpd2dq512_mask, "V8iV8dV8iUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtps2udq512_mask, "V16iV16fV16iUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtpd2udq512_mask, "V8iV8dV8iUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_minps512, "V16fV16fV16fIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_minpd512, "V8dV8dV8dIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_maxps512, "V16fV16fV16fIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_maxpd512, "V8dV8dV8dIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtdq2ps512_mask, "V16fV16iV16fUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtudq2ps512_mask, "V16fV16iV16fUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtpd2ps512_mask, "V8fV8dV8fUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtps2ph512_mask, "V16sV16fIiV16sUs", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtph2ps512_mask, "V16fV16sV16fUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmuldq512, "V8OiV16iV16i", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmuludq512, "V8OiV16iV16i", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_loaddqusi512_mask, "V16iiC*V16iUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_loaddqudi512_mask, "V8OiOiC*V8OiUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_loadups512_mask, "V16ffC*V16fUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_loadaps512_mask, "V16fV16fC*V16fUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_loadupd512_mask, "V8ddC*V8dUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_loadapd512_mask, "V8dV8dC*V8dUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_storedqudi512_mask, "vOi*V8OiUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_storedqusi512_mask, "vi*V16iUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_storeupd512_mask, "vd*V8dUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_storeapd512_mask, "vV8d*V8dUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_storeups512_mask, "vf*V16fUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_storeaps512_mask, "vV16f*V16fUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_alignq512, "V8OiV8OiV8OiIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_alignd512, "V16iV16iV16iIi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_alignd128, "V4iV4iV4iIi", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_alignd256, "V8iV8iV8iIi", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_alignq128, "V2OiV2OiV2OiIi", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_alignq256, "V4OiV4OiV4OiIi", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_extractf64x4_mask, "V4dV8dIiV4dUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_extractf32x4_mask, "V4fV16fIiV4fUc", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_extractf64x4_mask, "V4dV8dIiV4dUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_extractf32x4_mask, "V4fV16fIiV4fUc", "ncV:512:", "avx512f,evex512") +// AVX-VNNI and AVX512-VNNI TARGET_BUILTIN(__builtin_ia32_vpdpbusd128, "V4iV4iV4iV4i", "ncV:128:", "avx512vl,avx512vnni|avxvnni") TARGET_BUILTIN(__builtin_ia32_vpdpbusd256, "V8iV8iV8iV8i", "ncV:256:", "avx512vl,avx512vnni|avxvnni") -TARGET_BUILTIN(__builtin_ia32_vpdpbusd512, "V16iV16iV16iV16i", "ncV:512:", "avx512vnni") +TARGET_BUILTIN(__builtin_ia32_vpdpbusd512, "V16iV16iV16iV16i", "ncV:512:", "avx512vnni,evex512") TARGET_BUILTIN(__builtin_ia32_vpdpbusds128, "V4iV4iV4iV4i", "ncV:128:", "avx512vl,avx512vnni|avxvnni") TARGET_BUILTIN(__builtin_ia32_vpdpbusds256, "V8iV8iV8iV8i", "ncV:256:", "avx512vl,avx512vnni|avxvnni") -TARGET_BUILTIN(__builtin_ia32_vpdpbusds512, "V16iV16iV16iV16i", "ncV:512:", "avx512vnni") +TARGET_BUILTIN(__builtin_ia32_vpdpbusds512, "V16iV16iV16iV16i", "ncV:512:", "avx512vnni,evex512") TARGET_BUILTIN(__builtin_ia32_vpdpwssd128, "V4iV4iV4iV4i", "ncV:128:", "avx512vl,avx512vnni|avxvnni") TARGET_BUILTIN(__builtin_ia32_vpdpwssd256, "V8iV8iV8iV8i", "ncV:256:", "avx512vl,avx512vnni|avxvnni") -TARGET_BUILTIN(__builtin_ia32_vpdpwssd512, "V16iV16iV16iV16i", "ncV:512:", "avx512vnni") +TARGET_BUILTIN(__builtin_ia32_vpdpwssd512, "V16iV16iV16iV16i", "ncV:512:", "avx512vnni,evex512") TARGET_BUILTIN(__builtin_ia32_vpdpwssds128, "V4iV4iV4iV4i", "ncV:128:", "avx512vl,avx512vnni|avxvnni") TARGET_BUILTIN(__builtin_ia32_vpdpwssds256, "V8iV8iV8iV8i", "ncV:256:", "avx512vl,avx512vnni|avxvnni") -TARGET_BUILTIN(__builtin_ia32_vpdpwssds512, "V16iV16iV16iV16i", "ncV:512:", "avx512vnni") +TARGET_BUILTIN(__builtin_ia32_vpdpwssds512, "V16iV16iV16iV16i", "ncV:512:", "avx512vnni,evex512") + +// AVX-VNNI-INT8 +TARGET_BUILTIN(__builtin_ia32_vpdpbssd128, "V4iV4iV4iV4i", "ncV:128:", "avxvnniint8") +TARGET_BUILTIN(__builtin_ia32_vpdpbssd256, "V8iV8iV8iV8i", "ncV:256:", "avxvnniint8") +TARGET_BUILTIN(__builtin_ia32_vpdpbssds128, "V4iV4iV4iV4i", "ncV:128:", "avxvnniint8") +TARGET_BUILTIN(__builtin_ia32_vpdpbssds256, "V8iV8iV8iV8i", "ncV:256:", "avxvnniint8") +TARGET_BUILTIN(__builtin_ia32_vpdpbsud128, "V4iV4iV4iV4i", "ncV:128:", "avxvnniint8") +TARGET_BUILTIN(__builtin_ia32_vpdpbsud256, "V8iV8iV8iV8i", "ncV:256:", "avxvnniint8") +TARGET_BUILTIN(__builtin_ia32_vpdpbsuds128, "V4iV4iV4iV4i", "ncV:128:", "avxvnniint8") +TARGET_BUILTIN(__builtin_ia32_vpdpbsuds256, "V8iV8iV8iV8i", "ncV:256:", "avxvnniint8") +TARGET_BUILTIN(__builtin_ia32_vpdpbuud128, "V4iV4iV4iV4i", "ncV:128:", "avxvnniint8") +TARGET_BUILTIN(__builtin_ia32_vpdpbuud256, "V8iV8iV8iV8i", "ncV:256:", "avxvnniint8") +TARGET_BUILTIN(__builtin_ia32_vpdpbuuds128, "V4iV4iV4iV4i", "ncV:128:", "avxvnniint8") +TARGET_BUILTIN(__builtin_ia32_vpdpbuuds256, "V8iV8iV8iV8i", "ncV:256:", "avxvnniint8") TARGET_BUILTIN(__builtin_ia32_gather3div2df, "V2dV2dvC*V2OiUcIi", "nV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_gather3div2di, "V2OiV2OivC*V2OiUcIi", "nV:128:", "avx512vl") @@ -989,31 +950,31 @@ TARGET_BUILTIN(__builtin_ia32_gather3siv4sf, "V4fV4fvC*V4iUcIi", "nV:128:", "avx TARGET_BUILTIN(__builtin_ia32_gather3siv4si, "V4iV4ivC*V4iUcIi", "nV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_gather3siv8sf, "V8fV8fvC*V8iUcIi", "nV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_gather3siv8si, "V8iV8ivC*V8iUcIi", "nV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_gathersiv8df, "V8dV8dvC*V8iUcIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_gathersiv16sf, "V16fV16fvC*V16iUsIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_gatherdiv8df, "V8dV8dvC*V8OiUcIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_gatherdiv16sf, "V8fV8fvC*V8OiUcIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_gathersiv8di, "V8OiV8OivC*V8iUcIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_gathersiv16si, "V16iV16ivC*V16iUsIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_gatherdiv8di, "V8OiV8OivC*V8OiUcIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_gatherdiv16si, "V8iV8ivC*V8OiUcIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_scattersiv8df, "vv*UcV8iV8dIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_scattersiv16sf, "vv*UsV16iV16fIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_scatterdiv8df, "vv*UcV8OiV8dIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_scatterdiv16sf, "vv*UcV8OiV8fIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_scattersiv8di, "vv*UcV8iV8OiIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_scattersiv16si, "vv*UsV16iV16iIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_scatterdiv8di, "vv*UcV8OiV8OiIi", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_scatterdiv16si, "vv*UcV8OiV8iIi", "nV:512:", "avx512f") - -TARGET_BUILTIN(__builtin_ia32_gatherpfdpd, "vUcV8ivC*IiIi", "nV:512:", "avx512pf") -TARGET_BUILTIN(__builtin_ia32_gatherpfdps, "vUsV16ivC*IiIi", "nV:512:", "avx512pf") -TARGET_BUILTIN(__builtin_ia32_gatherpfqpd, "vUcV8OivC*IiIi", "nV:512:", "avx512pf") -TARGET_BUILTIN(__builtin_ia32_gatherpfqps, "vUcV8OivC*IiIi", "nV:512:", "avx512pf") -TARGET_BUILTIN(__builtin_ia32_scatterpfdpd, "vUcV8iv*IiIi", "nV:512:", "avx512pf") -TARGET_BUILTIN(__builtin_ia32_scatterpfdps, "vUsV16iv*IiIi", "nV:512:", "avx512pf") -TARGET_BUILTIN(__builtin_ia32_scatterpfqpd, "vUcV8Oiv*IiIi", "nV:512:", "avx512pf") -TARGET_BUILTIN(__builtin_ia32_scatterpfqps, "vUcV8Oiv*IiIi", "nV:512:", "avx512pf") +TARGET_BUILTIN(__builtin_ia32_gathersiv8df, "V8dV8dvC*V8iUcIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_gathersiv16sf, "V16fV16fvC*V16iUsIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_gatherdiv8df, "V8dV8dvC*V8OiUcIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_gatherdiv16sf, "V8fV8fvC*V8OiUcIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_gathersiv8di, "V8OiV8OivC*V8iUcIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_gathersiv16si, "V16iV16ivC*V16iUsIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_gatherdiv8di, "V8OiV8OivC*V8OiUcIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_gatherdiv16si, "V8iV8ivC*V8OiUcIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_scattersiv8df, "vv*UcV8iV8dIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_scattersiv16sf, "vv*UsV16iV16fIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_scatterdiv8df, "vv*UcV8OiV8dIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_scatterdiv16sf, "vv*UcV8OiV8fIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_scattersiv8di, "vv*UcV8iV8OiIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_scattersiv16si, "vv*UsV16iV16iIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_scatterdiv8di, "vv*UcV8OiV8OiIi", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_scatterdiv16si, "vv*UcV8OiV8iIi", "nV:512:", "avx512f,evex512") + +TARGET_BUILTIN(__builtin_ia32_gatherpfdpd, "vUcV8ivC*IiIi", "nV:512:", "avx512pf,evex512") +TARGET_BUILTIN(__builtin_ia32_gatherpfdps, "vUsV16ivC*IiIi", "nV:512:", "avx512pf,evex512") +TARGET_BUILTIN(__builtin_ia32_gatherpfqpd, "vUcV8OivC*IiIi", "nV:512:", "avx512pf,evex512") +TARGET_BUILTIN(__builtin_ia32_gatherpfqps, "vUcV8OivC*IiIi", "nV:512:", "avx512pf,evex512") +TARGET_BUILTIN(__builtin_ia32_scatterpfdpd, "vUcV8iv*IiIi", "nV:512:", "avx512pf,evex512") +TARGET_BUILTIN(__builtin_ia32_scatterpfdps, "vUsV16iv*IiIi", "nV:512:", "avx512pf,evex512") +TARGET_BUILTIN(__builtin_ia32_scatterpfqpd, "vUcV8Oiv*IiIi", "nV:512:", "avx512pf,evex512") +TARGET_BUILTIN(__builtin_ia32_scatterpfqps, "vUcV8Oiv*IiIi", "nV:512:", "avx512pf,evex512") TARGET_BUILTIN(__builtin_ia32_knotqi, "UcUc", "nc", "avx512dq") TARGET_BUILTIN(__builtin_ia32_knothi, "UsUs", "nc", "avx512f") @@ -1028,10 +989,10 @@ TARGET_BUILTIN(__builtin_ia32_cmpb256_mask, "UiV32cV32cIiUi", "ncV:256:", "avx51 TARGET_BUILTIN(__builtin_ia32_cmpd256_mask, "UcV8iV8iIiUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_cmpq256_mask, "UcV4OiV4OiIiUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_cmpw256_mask, "UsV16sV16sIiUs", "ncV:256:", "avx512vl,avx512bw") -TARGET_BUILTIN(__builtin_ia32_cmpb512_mask, "UOiV64cV64cIiUOi", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_cmpd512_mask, "UsV16iV16iIiUs", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_cmpq512_mask, "UcV8OiV8OiIiUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_cmpw512_mask, "UiV32sV32sIiUi", "ncV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_cmpb512_mask, "UOiV64cV64cIiUOi", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_cmpd512_mask, "UsV16iV16iIiUs", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_cmpq512_mask, "UcV8OiV8OiIiUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_cmpw512_mask, "UiV32sV32sIiUi", "ncV:512:", "avx512bw,evex512") TARGET_BUILTIN(__builtin_ia32_ucmpb128_mask, "UsV16cV16cIiUs", "ncV:128:", "avx512vl,avx512bw") TARGET_BUILTIN(__builtin_ia32_ucmpd128_mask, "UcV4iV4iIiUc", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_ucmpq128_mask, "UcV2OiV2OiIiUc", "ncV:128:", "avx512vl") @@ -1040,79 +1001,61 @@ TARGET_BUILTIN(__builtin_ia32_ucmpb256_mask, "UiV32cV32cIiUi", "ncV:256:", "avx5 TARGET_BUILTIN(__builtin_ia32_ucmpd256_mask, "UcV8iV8iIiUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_ucmpq256_mask, "UcV4OiV4OiIiUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_ucmpw256_mask, "UsV16sV16sIiUs", "ncV:256:", "avx512vl,avx512bw") -TARGET_BUILTIN(__builtin_ia32_ucmpb512_mask, "UOiV64cV64cIiUOi", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_ucmpd512_mask, "UsV16iV16iIiUs", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_ucmpq512_mask, "UcV8OiV8OiIiUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_ucmpw512_mask, "UiV32sV32sIiUi", "ncV:512:", "avx512bw") - -TARGET_BUILTIN(__builtin_ia32_pabsb512, "V64cV64c", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pabsw512, "V32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_packssdw512, "V32sV16iV16i", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_packsswb512, "V64cV32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_packusdw512, "V32sV16iV16i", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_packuswb512, "V64cV32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_paddsb512, "V64cV64cV64c", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_paddsw512, "V32sV32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_paddusb512, "V64cV64cV64c", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_paddusw512, "V32sV32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pavgb512, "V64cV64cV64c", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pavgw512, "V32sV32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pmaxsb512, "V64cV64cV64c", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pmaxsw512, "V32sV32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pmaxub512, "V64cV64cV64c", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pmaxuw512, "V32sV32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pminsb512, "V64cV64cV64c", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pminsw512, "V32sV32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pminub512, "V64cV64cV64c", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pminuw512, "V32sV32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pshufb512, "V64cV64cV64c", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_psubsb512, "V64cV64cV64c", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_psubsw512, "V32sV32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_psubusb512, "V64cV64cV64c", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_psubusw512, "V32sV32sV32s", "ncV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_ucmpb512_mask, "UOiV64cV64cIiUOi", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_ucmpd512_mask, "UsV16iV16iIiUs", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_ucmpq512_mask, "UcV8OiV8OiIiUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_ucmpw512_mask, "UiV32sV32sIiUi", "ncV:512:", "avx512bw,evex512") + +TARGET_BUILTIN(__builtin_ia32_packssdw512, "V32sV16iV16i", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_packsswb512, "V64cV32sV32s", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_packusdw512, "V32sV16iV16i", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_packuswb512, "V64cV32sV32s", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_pavgb512, "V64cV64cV64c", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_pavgw512, "V32sV32sV32s", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_pshufb512, "V64cV64cV64c", "ncV:512:", "avx512bw,evex512") TARGET_BUILTIN(__builtin_ia32_vpconflictdi_128, "V2OiV2Oi", "ncV:128:", "avx512cd,avx512vl") TARGET_BUILTIN(__builtin_ia32_vpconflictdi_256, "V4OiV4Oi", "ncV:256:", "avx512cd,avx512vl") TARGET_BUILTIN(__builtin_ia32_vpconflictsi_128, "V4iV4i", "ncV:128:", "avx512cd,avx512vl") TARGET_BUILTIN(__builtin_ia32_vpconflictsi_256, "V8iV8i", "ncV:256:", "avx512cd,avx512vl") -TARGET_BUILTIN(__builtin_ia32_vpconflictdi_512, "V8OiV8Oi", "ncV:512:", "avx512cd") -TARGET_BUILTIN(__builtin_ia32_vpconflictsi_512, "V16iV16i", "ncV:512:", "avx512cd") -TARGET_BUILTIN(__builtin_ia32_vplzcntd_512, "V16iV16i", "ncV:512:", "avx512cd") -TARGET_BUILTIN(__builtin_ia32_vplzcntq_512, "V8OiV8Oi", "ncV:512:", "avx512cd") +TARGET_BUILTIN(__builtin_ia32_vpconflictdi_512, "V8OiV8Oi", "ncV:512:", "avx512cd,evex512") +TARGET_BUILTIN(__builtin_ia32_vpconflictsi_512, "V16iV16i", "ncV:512:", "avx512cd,evex512") +TARGET_BUILTIN(__builtin_ia32_vplzcntd_512, "V16iV16i", "ncV:512:", "avx512cd,evex512") +TARGET_BUILTIN(__builtin_ia32_vplzcntq_512, "V8OiV8Oi", "ncV:512:", "avx512cd,evex512") TARGET_BUILTIN(__builtin_ia32_vpopcntd_128, "V4iV4i", "ncV:128:", "avx512vpopcntdq,avx512vl") TARGET_BUILTIN(__builtin_ia32_vpopcntq_128, "V2OiV2Oi", "ncV:128:", "avx512vpopcntdq,avx512vl") TARGET_BUILTIN(__builtin_ia32_vpopcntd_256, "V8iV8i", "ncV:256:", "avx512vpopcntdq,avx512vl") TARGET_BUILTIN(__builtin_ia32_vpopcntq_256, "V4OiV4Oi", "ncV:256:", "avx512vpopcntdq,avx512vl") -TARGET_BUILTIN(__builtin_ia32_vpopcntd_512, "V16iV16i", "ncV:512:", "avx512vpopcntdq") -TARGET_BUILTIN(__builtin_ia32_vpopcntq_512, "V8OiV8Oi", "ncV:512:", "avx512vpopcntdq") +TARGET_BUILTIN(__builtin_ia32_vpopcntd_512, "V16iV16i", "ncV:512:", "avx512vpopcntdq,evex512") +TARGET_BUILTIN(__builtin_ia32_vpopcntq_512, "V8OiV8Oi", "ncV:512:", "avx512vpopcntdq,evex512") TARGET_BUILTIN(__builtin_ia32_vpopcntb_128, "V16cV16c", "ncV:128:", "avx512vl,avx512bitalg") TARGET_BUILTIN(__builtin_ia32_vpopcntw_128, "V8sV8s", "ncV:128:", "avx512vl,avx512bitalg") TARGET_BUILTIN(__builtin_ia32_vpopcntb_256, "V32cV32c", "ncV:256:", "avx512vl,avx512bitalg") TARGET_BUILTIN(__builtin_ia32_vpopcntw_256, "V16sV16s", "ncV:256:", "avx512vl,avx512bitalg") -TARGET_BUILTIN(__builtin_ia32_vpopcntb_512, "V64cV64c", "ncV:512:", "avx512bitalg") -TARGET_BUILTIN(__builtin_ia32_vpopcntw_512, "V32sV32s", "ncV:512:", "avx512bitalg") +TARGET_BUILTIN(__builtin_ia32_vpopcntb_512, "V64cV64c", "ncV:512:", "avx512bitalg,evex512") +TARGET_BUILTIN(__builtin_ia32_vpopcntw_512, "V32sV32s", "ncV:512:", "avx512bitalg,evex512") TARGET_BUILTIN(__builtin_ia32_vpshufbitqmb128_mask, "UsV16cV16cUs", "ncV:128:", "avx512vl,avx512bitalg") TARGET_BUILTIN(__builtin_ia32_vpshufbitqmb256_mask, "UiV32cV32cUi", "ncV:256:", "avx512vl,avx512bitalg") -TARGET_BUILTIN(__builtin_ia32_vpshufbitqmb512_mask, "UOiV64cV64cUOi", "ncV:512:", "avx512bitalg") +TARGET_BUILTIN(__builtin_ia32_vpshufbitqmb512_mask, "UOiV64cV64cUOi", "ncV:512:", "avx512bitalg,evex512") -TARGET_BUILTIN(__builtin_ia32_pmulhrsw512, "V32sV32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pmulhuw512, "V32sV32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pmulhw512, "V32sV32sV32s", "ncV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_pmulhrsw512, "V32sV32sV32s", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_pmulhuw512, "V32sV32sV32s", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_pmulhw512, "V32sV32sV32s", "ncV:512:", "avx512bw,evex512") -TARGET_BUILTIN(__builtin_ia32_addpd512, "V8dV8dV8dIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_addps512, "V16fV16fV16fIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_divpd512, "V8dV8dV8dIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_divps512, "V16fV16fV16fIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_mulpd512, "V8dV8dV8dIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_mulps512, "V16fV16fV16fIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_subpd512, "V8dV8dV8dIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_subps512, "V16fV16fV16fIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_addpd512, "V8dV8dV8dIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_addps512, "V16fV16fV16fIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_divpd512, "V8dV8dV8dIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_divps512, "V16fV16fV16fIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_mulpd512, "V8dV8dV8dIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_mulps512, "V16fV16fV16fIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_subpd512, "V8dV8dV8dIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_subps512, "V16fV16fV16fIi", "ncV:512:", "avx512f,evex512") -TARGET_BUILTIN(__builtin_ia32_pmaddubsw512, "V32sV64cV64c", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pmaddwd512, "V16iV32sV32s", "ncV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_pmaddubsw512, "V32sV64cV64c", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_pmaddwd512, "V16iV32sV32s", "ncV:512:", "avx512bw,evex512") TARGET_BUILTIN(__builtin_ia32_addss_round_mask, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_divss_round_mask, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512f") @@ -1198,16 +1141,6 @@ TARGET_BUILTIN(__builtin_ia32_getexppd128_mask, "V2dV2dV2dUc", "ncV:128:", "avx5 TARGET_BUILTIN(__builtin_ia32_getexppd256_mask, "V4dV4dV4dUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_getexpps128_mask, "V4fV4fV4fUc", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_getexpps256_mask, "V8fV8fV8fUc", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_pabsq128, "V2OiV2Oi", "ncV:128:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_pabsq256, "V4OiV4Oi", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_pmaxsq128, "V2OiV2OiV2Oi", "ncV:128:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_pmaxsq256, "V4OiV4OiV4Oi", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_pmaxuq128, "V2OiV2OiV2Oi", "ncV:128:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_pmaxuq256, "V4OiV4OiV4Oi", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_pminsq128, "V2OiV2OiV2Oi", "ncV:128:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_pminsq256, "V4OiV4OiV4Oi", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_pminuq128, "V2OiV2OiV2Oi", "ncV:128:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_pminuq256, "V4OiV4OiV4Oi", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_rndscalepd_128_mask, "V2dV2dIiV2dUc", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_rndscalepd_256_mask, "V4dV4dIiV4dUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_rndscaleps_128_mask, "V4fV4fIiV4fUc", "ncV:128:", "avx512vl") @@ -1236,66 +1169,66 @@ TARGET_BUILTIN(__builtin_ia32_scattersiv8si, "vv*UcV8iV8iIi", "nV:256:", "avx512 TARGET_BUILTIN(__builtin_ia32_vpermi2vard128, "V4iV4iV4iV4i", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_vpermi2vard256, "V8iV8iV8iV8i", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_vpermi2vard512, "V16iV16iV16iV16i", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_vpermi2vard512, "V16iV16iV16iV16i", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_vpermi2varpd128, "V2dV2dV2OiV2d", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_vpermi2varpd256, "V4dV4dV4OiV4d", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_vpermi2varpd512, "V8dV8dV8OiV8d", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_vpermi2varpd512, "V8dV8dV8OiV8d", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_vpermi2varps128, "V4fV4fV4iV4f", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_vpermi2varps256, "V8fV8fV8iV8f", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_vpermi2varps512, "V16fV16fV16iV16f", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_vpermi2varps512, "V16fV16fV16iV16f", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_vpermi2varq128, "V2OiV2OiV2OiV2Oi", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_vpermi2varq256, "V4OiV4OiV4OiV4Oi", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_vpermi2varq512, "V8OiV8OiV8OiV8Oi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_vpermi2varq512, "V8OiV8OiV8OiV8Oi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_vpermi2varqi128, "V16cV16cV16cV16c", "ncV:128:", "avx512vbmi,avx512vl") TARGET_BUILTIN(__builtin_ia32_vpermi2varqi256, "V32cV32cV32cV32c", "ncV:256:", "avx512vbmi,avx512vl") -TARGET_BUILTIN(__builtin_ia32_vpermi2varqi512, "V64cV64cV64cV64c", "ncV:512:", "avx512vbmi") +TARGET_BUILTIN(__builtin_ia32_vpermi2varqi512, "V64cV64cV64cV64c", "ncV:512:", "avx512vbmi,evex512") TARGET_BUILTIN(__builtin_ia32_vpermi2varhi128, "V8sV8sV8sV8s", "ncV:128:", "avx512vl,avx512bw") TARGET_BUILTIN(__builtin_ia32_vpermi2varhi256, "V16sV16sV16sV16s", "ncV:256:", "avx512vl,avx512bw") -TARGET_BUILTIN(__builtin_ia32_vpermi2varhi512, "V32sV32sV32sV32s", "ncV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_vpermi2varhi512, "V32sV32sV32sV32s", "ncV:512:", "avx512bw,evex512") TARGET_BUILTIN(__builtin_ia32_vpshldd128, "V4iV4iV4iIi", "ncV:128:", "avx512vl,avx512vbmi2") TARGET_BUILTIN(__builtin_ia32_vpshldd256, "V8iV8iV8iIi", "ncV:256:", "avx512vl,avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_vpshldd512, "V16iV16iV16iIi", "ncV:512:", "avx512vbmi2") +TARGET_BUILTIN(__builtin_ia32_vpshldd512, "V16iV16iV16iIi", "ncV:512:", "avx512vbmi2,evex512") TARGET_BUILTIN(__builtin_ia32_vpshldq128, "V2OiV2OiV2OiIi", "ncV:128:", "avx512vl,avx512vbmi2") TARGET_BUILTIN(__builtin_ia32_vpshldq256, "V4OiV4OiV4OiIi", "ncV:256:", "avx512vl,avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_vpshldq512, "V8OiV8OiV8OiIi", "ncV:512:", "avx512vbmi2") +TARGET_BUILTIN(__builtin_ia32_vpshldq512, "V8OiV8OiV8OiIi", "ncV:512:", "avx512vbmi2,evex512") TARGET_BUILTIN(__builtin_ia32_vpshldw128, "V8sV8sV8sIi", "ncV:128:", "avx512vl,avx512vbmi2") TARGET_BUILTIN(__builtin_ia32_vpshldw256, "V16sV16sV16sIi", "ncV:256:", "avx512vl,avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_vpshldw512, "V32sV32sV32sIi", "ncV:512:", "avx512vbmi2") +TARGET_BUILTIN(__builtin_ia32_vpshldw512, "V32sV32sV32sIi", "ncV:512:", "avx512vbmi2,evex512") TARGET_BUILTIN(__builtin_ia32_vpshldvd128, "V4iV4iV4iV4i", "ncV:128:", "avx512vl,avx512vbmi2") TARGET_BUILTIN(__builtin_ia32_vpshldvd256, "V8iV8iV8iV8i", "ncV:256:", "avx512vl,avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_vpshldvd512, "V16iV16iV16iV16i", "ncV:512:", "avx512vbmi2") +TARGET_BUILTIN(__builtin_ia32_vpshldvd512, "V16iV16iV16iV16i", "ncV:512:", "avx512vbmi2,evex512") TARGET_BUILTIN(__builtin_ia32_vpshldvq128, "V2OiV2OiV2OiV2Oi", "ncV:128:", "avx512vl,avx512vbmi2") TARGET_BUILTIN(__builtin_ia32_vpshldvq256, "V4OiV4OiV4OiV4Oi", "ncV:256:", "avx512vl,avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_vpshldvq512, "V8OiV8OiV8OiV8Oi", "ncV:512:", "avx512vbmi2") +TARGET_BUILTIN(__builtin_ia32_vpshldvq512, "V8OiV8OiV8OiV8Oi", "ncV:512:", "avx512vbmi2,evex512") TARGET_BUILTIN(__builtin_ia32_vpshldvw128, "V8sV8sV8sV8s", "ncV:128:", "avx512vl,avx512vbmi2") TARGET_BUILTIN(__builtin_ia32_vpshldvw256, "V16sV16sV16sV16s", "ncV:256:", "avx512vl,avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_vpshldvw512, "V32sV32sV32sV32s", "ncV:512:", "avx512vbmi2") +TARGET_BUILTIN(__builtin_ia32_vpshldvw512, "V32sV32sV32sV32s", "ncV:512:", "avx512vbmi2,evex512") TARGET_BUILTIN(__builtin_ia32_vpshrdvd128, "V4iV4iV4iV4i", "ncV:128:", "avx512vl,avx512vbmi2") TARGET_BUILTIN(__builtin_ia32_vpshrdvd256, "V8iV8iV8iV8i", "ncV:256:", "avx512vl,avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_vpshrdvd512, "V16iV16iV16iV16i", "ncV:512:", "avx512vbmi2") +TARGET_BUILTIN(__builtin_ia32_vpshrdvd512, "V16iV16iV16iV16i", "ncV:512:", "avx512vbmi2,evex512") TARGET_BUILTIN(__builtin_ia32_vpshrdvq128, "V2OiV2OiV2OiV2Oi", "ncV:128:", "avx512vl,avx512vbmi2") TARGET_BUILTIN(__builtin_ia32_vpshrdvq256, "V4OiV4OiV4OiV4Oi", "ncV:256:", "avx512vl,avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_vpshrdvq512, "V8OiV8OiV8OiV8Oi", "ncV:512:", "avx512vbmi2") +TARGET_BUILTIN(__builtin_ia32_vpshrdvq512, "V8OiV8OiV8OiV8Oi", "ncV:512:", "avx512vbmi2,evex512") TARGET_BUILTIN(__builtin_ia32_vpshrdvw128, "V8sV8sV8sV8s", "ncV:128:", "avx512vl,avx512vbmi2") TARGET_BUILTIN(__builtin_ia32_vpshrdvw256, "V16sV16sV16sV16s", "ncV:256:", "avx512vl,avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_vpshrdvw512, "V32sV32sV32sV32s", "ncV:512:", "avx512vbmi2") +TARGET_BUILTIN(__builtin_ia32_vpshrdvw512, "V32sV32sV32sV32s", "ncV:512:", "avx512vbmi2,evex512") TARGET_BUILTIN(__builtin_ia32_vpshrdd128, "V4iV4iV4iIi", "ncV:128:", "avx512vl,avx512vbmi2") TARGET_BUILTIN(__builtin_ia32_vpshrdd256, "V8iV8iV8iIi", "ncV:256:", "avx512vl,avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_vpshrdd512, "V16iV16iV16iIi", "ncV:512:", "avx512vbmi2") +TARGET_BUILTIN(__builtin_ia32_vpshrdd512, "V16iV16iV16iIi", "ncV:512:", "avx512vbmi2,evex512") TARGET_BUILTIN(__builtin_ia32_vpshrdq128, "V2OiV2OiV2OiIi", "ncV:128:", "avx512vl,avx512vbmi2") TARGET_BUILTIN(__builtin_ia32_vpshrdq256, "V4OiV4OiV4OiIi", "ncV:256:", "avx512vl,avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_vpshrdq512, "V8OiV8OiV8OiIi", "ncV:512:", "avx512vbmi2") +TARGET_BUILTIN(__builtin_ia32_vpshrdq512, "V8OiV8OiV8OiIi", "ncV:512:", "avx512vbmi2,evex512") TARGET_BUILTIN(__builtin_ia32_vpshrdw128, "V8sV8sV8sIi", "ncV:128:", "avx512vl,avx512vbmi2") TARGET_BUILTIN(__builtin_ia32_vpshrdw256, "V16sV16sV16sIi", "ncV:256:", "avx512vl,avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_vpshrdw512, "V32sV32sV32sIi", "ncV:512:", "avx512vbmi2") +TARGET_BUILTIN(__builtin_ia32_vpshrdw512, "V32sV32sV32sIi", "ncV:512:", "avx512vbmi2,evex512") -TARGET_BUILTIN(__builtin_ia32_pmovswb512_mask, "V32cV32sV32cUi", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pmovuswb512_mask, "V32cV32sV32cUi", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pmovwb512_mask, "V32cV32sV32cUi", "ncV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_pmovswb512_mask, "V32cV32sV32cUi", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovuswb512_mask, "V32cV32sV32cUi", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovwb512_mask, "V32cV32sV32cUi", "ncV:512:", "avx512bw,evex512") TARGET_BUILTIN(__builtin_ia32_cvtpd2qq128_mask, "V2OiV2dV2OiUc", "ncV:128:", "avx512vl,avx512dq") TARGET_BUILTIN(__builtin_ia32_cvtpd2qq256_mask, "V4OiV4dV4OiUc", "ncV:256:", "avx512vl,avx512dq") TARGET_BUILTIN(__builtin_ia32_cvtpd2uqq128_mask, "V2OiV2dV2OiUc", "ncV:128:", "avx512vl,avx512dq") @@ -1331,32 +1264,32 @@ TARGET_BUILTIN(__builtin_ia32_pmovswb256_mask, "V16cV16sV16cUs", "ncV:256:", "av TARGET_BUILTIN(__builtin_ia32_pmovuswb128_mask, "V16cV8sV16cUc", "ncV:128:", "avx512vl,avx512bw") TARGET_BUILTIN(__builtin_ia32_pmovuswb256_mask, "V16cV16sV16cUs", "ncV:256:", "avx512vl,avx512bw") TARGET_BUILTIN(__builtin_ia32_pmovwb128_mask, "V16cV8sV16cUc", "ncV:128:", "avx512vl,avx512bw") -TARGET_BUILTIN(__builtin_ia32_cvtpd2qq512_mask, "V8OiV8dV8OiUcIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_cvtpd2uqq512_mask, "V8OiV8dV8OiUcIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_cvtps2qq512_mask, "V8OiV8fV8OiUcIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_cvtps2uqq512_mask, "V8OiV8fV8OiUcIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_cvtqq2pd512_mask, "V8dV8OiV8dUcIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_cvtqq2ps512_mask, "V8fV8OiV8fUcIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_cvttpd2qq512_mask, "V8OiV8dV8OiUcIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_cvttpd2uqq512_mask, "V8OiV8dV8OiUcIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_cvttps2qq512_mask, "V8OiV8fV8OiUcIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_cvttps2uqq512_mask, "V8OiV8fV8OiUcIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_cvtuqq2pd512_mask, "V8dV8OiV8dUcIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_cvtuqq2ps512_mask, "V8fV8OiV8fUcIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_rangepd512_mask, "V8dV8dV8dIiV8dUcIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_rangeps512_mask, "V16fV16fV16fIiV16fUsIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_reducepd512_mask, "V8dV8dIiV8dUcIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_reduceps512_mask, "V16fV16fIiV16fUsIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_prold512, "V16iV16iIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_prolq512, "V8OiV8OiIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_cvtpd2qq512_mask, "V8OiV8dV8OiUcIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtpd2uqq512_mask, "V8OiV8dV8OiUcIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtps2qq512_mask, "V8OiV8fV8OiUcIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtps2uqq512_mask, "V8OiV8fV8OiUcIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtqq2pd512_mask, "V8dV8OiV8dUcIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtqq2ps512_mask, "V8fV8OiV8fUcIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_cvttpd2qq512_mask, "V8OiV8dV8OiUcIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_cvttpd2uqq512_mask, "V8OiV8dV8OiUcIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_cvttps2qq512_mask, "V8OiV8fV8OiUcIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_cvttps2uqq512_mask, "V8OiV8fV8OiUcIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtuqq2pd512_mask, "V8dV8OiV8dUcIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtuqq2ps512_mask, "V8fV8OiV8fUcIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_rangepd512_mask, "V8dV8dV8dIiV8dUcIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_rangeps512_mask, "V16fV16fV16fIiV16fUsIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_reducepd512_mask, "V8dV8dIiV8dUcIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_reduceps512_mask, "V16fV16fIiV16fUsIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_prold512, "V16iV16iIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_prolq512, "V8OiV8OiIi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_prold128, "V4iV4iIi", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_prold256, "V8iV8iIi", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_prolq128, "V2OiV2OiIi", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_prolq256, "V4OiV4OiIi", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_prolvd512, "V16iV16iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_prolvq512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_prord512, "V16iV16iIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_prorq512, "V8OiV8OiIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_prolvd512, "V16iV16iV16i", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_prolvq512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_prord512, "V16iV16iIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_prorq512, "V8OiV8OiIi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_prolvd128, "V4iV4iV4i", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_prolvd256, "V8iV8iV8i", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_prolvq128, "V2OiV2OiV2Oi", "ncV:128:", "avx512vl") @@ -1365,65 +1298,65 @@ TARGET_BUILTIN(__builtin_ia32_prord128, "V4iV4iIi", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_prord256, "V8iV8iIi", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_prorq128, "V2OiV2OiIi", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_prorq256, "V4OiV4OiIi", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_prorvd512, "V16iV16iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_prorvq512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_prorvd512, "V16iV16iV16i", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_prorvq512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_prorvd128, "V4iV4iV4i", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_prorvd256, "V8iV8iV8i", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_prorvq128, "V2OiV2OiV2Oi", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_prorvq256, "V4OiV4OiV4Oi", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_pshufhw512, "V32sV32sIi", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pshuflw512, "V32sV32sIi", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_psllv32hi, "V32sV32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_psllw512, "V32sV32sV8s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_psllwi512, "V32sV32si", "ncV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_pshufhw512, "V32sV32sIi", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_pshuflw512, "V32sV32sIi", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_psllv32hi, "V32sV32sV32s", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_psllw512, "V32sV32sV8s", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_psllwi512, "V32sV32si", "ncV:512:", "avx512bw,evex512") TARGET_BUILTIN(__builtin_ia32_psllv16hi, "V16sV16sV16s", "ncV:256:", "avx512bw,avx512vl") TARGET_BUILTIN(__builtin_ia32_psllv8hi, "V8sV8sV8s", "ncV:128:", "avx512bw,avx512vl") -TARGET_BUILTIN(__builtin_ia32_pslldi512, "V16iV16ii", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psllqi512, "V8OiV8Oii", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psrlv32hi, "V32sV32sV32s", "ncV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_pslldi512, "V16iV16ii", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psllqi512, "V8OiV8Oii", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psrlv32hi, "V32sV32sV32s", "ncV:512:", "avx512bw,evex512") TARGET_BUILTIN(__builtin_ia32_psrlv16hi, "V16sV16sV16s", "ncV:256:", "avx512bw,avx512vl") TARGET_BUILTIN(__builtin_ia32_psrlv8hi, "V8sV8sV8s", "ncV:128:", "avx512bw,avx512vl") -TARGET_BUILTIN(__builtin_ia32_psrldi512, "V16iV16ii", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psrlqi512, "V8OiV8Oii", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psrav32hi, "V32sV32sV32s", "ncV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_psrldi512, "V16iV16ii", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psrlqi512, "V8OiV8Oii", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psrav32hi, "V32sV32sV32s", "ncV:512:", "avx512bw,evex512") TARGET_BUILTIN(__builtin_ia32_psrav16hi, "V16sV16sV16s", "ncV:256:", "avx512bw,avx512vl") TARGET_BUILTIN(__builtin_ia32_psrav8hi, "V8sV8sV8s", "ncV:128:", "avx512bw,avx512vl") TARGET_BUILTIN(__builtin_ia32_psravq128, "V2OiV2OiV2Oi", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_psravq256, "V4OiV4OiV4Oi", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_psraw512, "V32sV32sV8s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_psrawi512, "V32sV32si", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_psrlw512, "V32sV32sV8s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_psrlwi512, "V32sV32si", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pslldqi512_byteshift, "V8OiV8OiIi", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_psrldqi512_byteshift, "V8OiV8OiIi", "ncV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_psraw512, "V32sV32sV8s", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_psrawi512, "V32sV32si", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_psrlw512, "V32sV32sV8s", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_psrlwi512, "V32sV32si", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_pslldqi512_byteshift, "V8OiV8OiIi", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_psrldqi512_byteshift, "V8OiV8OiIi", "ncV:512:", "avx512bw,evex512") TARGET_BUILTIN(__builtin_ia32_movdqa32load128_mask, "V4iV4iC*V4iUc", "nV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_movdqa32load256_mask, "V8iV8iC*V8iUc", "nV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_movdqa32load512_mask, "V16iV16iC*V16iUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_movdqa32store512_mask, "vV16i*V16iUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_movdqa64load512_mask, "V8OiV8OiC*V8OiUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_movdqa64store512_mask, "vV8Oi*V8OiUc", "nV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_movdqa32load512_mask, "V16iV16iC*V16iUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_movdqa32store512_mask, "vV16i*V16iUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_movdqa64load512_mask, "V8OiV8OiC*V8OiUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_movdqa64store512_mask, "vV8Oi*V8OiUc", "nV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_movdqa32store128_mask, "vV4i*V4iUc", "nV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_movdqa32store256_mask, "vV8i*V8iUc", "nV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_movdqa64load128_mask, "V2OiV2OiC*V2OiUc", "nV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_movdqa64load256_mask, "V4OiV4OiC*V4OiUc", "nV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_movdqa64store128_mask, "vV2Oi*V2OiUc", "nV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_movdqa64store256_mask, "vV4Oi*V4OiUc", "nV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_vpmadd52huq512, "V8OiV8OiV8OiV8Oi", "ncV:512:", "avx512ifma") -TARGET_BUILTIN(__builtin_ia32_vpmadd52luq512, "V8OiV8OiV8OiV8Oi", "ncV:512:", "avx512ifma") -TARGET_BUILTIN(__builtin_ia32_vpmadd52huq128, "V2OiV2OiV2OiV2Oi", "ncV:128:", "avx512ifma,avx512vl") -TARGET_BUILTIN(__builtin_ia32_vpmadd52huq256, "V4OiV4OiV4OiV4Oi", "ncV:256:", "avx512ifma,avx512vl") -TARGET_BUILTIN(__builtin_ia32_vpmadd52luq128, "V2OiV2OiV2OiV2Oi", "ncV:128:", "avx512ifma,avx512vl") -TARGET_BUILTIN(__builtin_ia32_vpmadd52luq256, "V4OiV4OiV4OiV4Oi", "ncV:256:", "avx512ifma,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vpmadd52huq512, "V8OiV8OiV8OiV8Oi", "ncV:512:", "avx512ifma,evex512") +TARGET_BUILTIN(__builtin_ia32_vpmadd52luq512, "V8OiV8OiV8OiV8Oi", "ncV:512:", "avx512ifma,evex512") +TARGET_BUILTIN(__builtin_ia32_vpmadd52huq128, "V2OiV2OiV2OiV2Oi", "ncV:128:", "avx512ifma,avx512vl|avxifma") +TARGET_BUILTIN(__builtin_ia32_vpmadd52huq256, "V4OiV4OiV4OiV4Oi", "ncV:256:", "avx512ifma,avx512vl|avxifma") +TARGET_BUILTIN(__builtin_ia32_vpmadd52luq128, "V2OiV2OiV2OiV2Oi", "ncV:128:", "avx512ifma,avx512vl|avxifma") +TARGET_BUILTIN(__builtin_ia32_vpmadd52luq256, "V4OiV4OiV4OiV4Oi", "ncV:256:", "avx512ifma,avx512vl|avxifma") TARGET_BUILTIN(__builtin_ia32_vcomisd, "iV2dV2dIiIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_vcomiss, "iV4fV4fIiIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_kunpckdi, "UOiUOiUOi", "nc", "avx512bw") TARGET_BUILTIN(__builtin_ia32_kunpcksi, "UiUiUi", "nc", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_loaddquhi512_mask, "V32sV32sC*V32sUi", "nV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_loaddquqi512_mask, "V64cV64cC*V64cUOi", "nV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_fixupimmpd512_mask, "V8dV8dV8dV8OiIiUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_fixupimmpd512_maskz, "V8dV8dV8dV8OiIiUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_fixupimmps512_mask, "V16fV16fV16fV16iIiUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_fixupimmps512_maskz, "V16fV16fV16fV16iIiUsIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_loaddquhi512_mask, "V32sV32sC*V32sUi", "nV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_loaddquqi512_mask, "V64cV64cC*V64cUOi", "nV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_fixupimmpd512_mask, "V8dV8dV8dV8OiIiUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_fixupimmpd512_maskz, "V8dV8dV8dV8OiIiUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_fixupimmps512_mask, "V16fV16fV16fV16iIiUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_fixupimmps512_maskz, "V16fV16fV16fV16iIiUsIi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_fixupimmsd_mask, "V2dV2dV2dV2OiIiUcIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_fixupimmsd_maskz, "V2dV2dV2dV2OiIiUcIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_fixupimmss_mask, "V4fV4fV4fV4iIiUcIi", "ncV:128:", "avx512f") @@ -1458,8 +1391,8 @@ TARGET_BUILTIN(__builtin_ia32_loadupd128_mask, "V2dV2dC*V2dUc", "nV:128:", "avx5 TARGET_BUILTIN(__builtin_ia32_loadupd256_mask, "V4dV4dC*V4dUc", "nV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_loadups128_mask, "V4fV4fC*V4fUc", "nV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_loadups256_mask, "V8fV8fC*V8fUc", "nV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_storedquhi512_mask, "vV32s*V32sUi", "nV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_storedquqi512_mask, "vV64c*V64cUOi", "nV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_storedquhi512_mask, "vV32s*V32sUi", "nV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_storedquqi512_mask, "vV64c*V64cUOi", "nV:512:", "avx512bw,evex512") TARGET_BUILTIN(__builtin_ia32_storedquhi128_mask, "vV8s*V8sUc", "nV:128:", "avx512vl,avx512bw") TARGET_BUILTIN(__builtin_ia32_storedquhi256_mask, "vV16s*V16sUs", "nV:256:", "avx512vl,avx512bw") TARGET_BUILTIN(__builtin_ia32_storedquqi128_mask, "vV16c*V16cUs", "nV:128:", "avx512vl,avx512bw") @@ -1494,38 +1427,38 @@ TARGET_BUILTIN(__builtin_ia32_vcvttsd2si32, "iV2dIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_vcvttsd2usi32, "UiV2dIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_vcvttss2si32, "iV4fIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_vcvttss2usi32, "UiV4fIi", "ncV:128:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vpermilpd512, "V8dV8dIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vpermilps512, "V16fV16fIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vpermilvarpd512, "V8dV8dV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vpermilvarps512, "V16fV16fV16i", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_vpermilpd512, "V8dV8dIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vpermilps512, "V16fV16fIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vpermilvarpd512, "V8dV8dV8Oi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_vpermilvarps512, "V16fV16fV16i", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_rndscalesd_round_mask, "V2dV2dV2dV2dUcIiIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_rndscaless_round_mask, "V4fV4fV4fV4fUcIiIi", "ncV:128:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_scalefpd512_mask, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_scalefps512_mask, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_scalefpd512_mask, "V8dV8dV8dV8dUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_scalefps512_mask, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_scalefsd_round_mask, "V2dV2dV2dV2dUcIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_scalefss_round_mask, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psradi512, "V16iV16ii", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psraqi512, "V8OiV8Oii", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_psradi512, "V16iV16ii", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psraqi512, "V8OiV8Oii", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_psraq128, "V2OiV2OiV2Oi", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_psraq256, "V4OiV4OiV2Oi", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_psraqi128, "V2OiV2Oii", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_psraqi256, "V4OiV4Oii", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_pslld512, "V16iV16iV4i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psllq512, "V8OiV8OiV2Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psllv16si, "V16iV16iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psllv8di, "V8OiV8OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psrad512, "V16iV16iV4i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psraq512, "V8OiV8OiV2Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psrav16si, "V16iV16iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psrav8di, "V8OiV8OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psrld512, "V16iV16iV4i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psrlq512, "V8OiV8OiV2Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psrlv16si, "V16iV16iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_psrlv8di, "V8OiV8OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pternlogd512_mask, "V16iV16iV16iV16iIiUs", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pternlogd512_maskz, "V16iV16iV16iV16iIiUs", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pternlogq512_mask, "V8OiV8OiV8OiV8OiIiUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pternlogq512_maskz, "V8OiV8OiV8OiV8OiIiUc", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_pslld512, "V16iV16iV4i", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psllq512, "V8OiV8OiV2Oi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psllv16si, "V16iV16iV16i", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psllv8di, "V8OiV8OiV8Oi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psrad512, "V16iV16iV4i", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psraq512, "V8OiV8OiV2Oi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psrav16si, "V16iV16iV16i", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psrav8di, "V8OiV8OiV8Oi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psrld512, "V16iV16iV4i", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psrlq512, "V8OiV8OiV2Oi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psrlv16si, "V16iV16iV16i", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_psrlv8di, "V8OiV8OiV8Oi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pternlogd512_mask, "V16iV16iV16iV16iIiUs", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pternlogd512_maskz, "V16iV16iV16iV16iIiUs", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pternlogq512_mask, "V8OiV8OiV8OiV8OiIiUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pternlogq512_maskz, "V8OiV8OiV8OiV8OiIiUc", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_pternlogd128_mask, "V4iV4iV4iV4iIiUc", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pternlogd128_maskz, "V4iV4iV4iV4iIiUc", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pternlogd256_mask, "V8iV8iV8iV8iIiUc", "ncV:256:", "avx512vl") @@ -1534,12 +1467,12 @@ TARGET_BUILTIN(__builtin_ia32_pternlogq128_mask, "V2OiV2OiV2OiV2OiIiUc", "ncV:12 TARGET_BUILTIN(__builtin_ia32_pternlogq128_maskz, "V2OiV2OiV2OiV2OiIiUc", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pternlogq256_mask, "V4OiV4OiV4OiV4OiIiUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pternlogq256_maskz, "V4OiV4OiV4OiV4OiIiUc", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_shuf_f32x4, "V16fV16fV16fIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_shuf_f64x2, "V8dV8dV8dIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_shuf_i32x4, "V16iV16iV16iIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_shuf_i64x2, "V8OiV8OiV8OiIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_shufpd512, "V8dV8dV8dIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_shufps512, "V16fV16fV16fIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_shuf_f32x4, "V16fV16fV16fIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_shuf_f64x2, "V8dV8dV8dIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_shuf_i32x4, "V16iV16iV16iIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_shuf_i64x2, "V8OiV8OiV8OiIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_shufpd512, "V8dV8dV8dIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_shufps512, "V16fV16fV16fIi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_shuf_f32x4_256, "V8fV8fV8fIi", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_shuf_f64x2_256, "V4dV4dV4dIi", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_shuf_i32x4_256, "V8iV8iV8iIi", "ncV:256:", "avx512vl") @@ -1550,13 +1483,13 @@ TARGET_BUILTIN(__builtin_ia32_rsqrt14pd128_mask, "V2dV2dV2dUc", "ncV:128:", "avx TARGET_BUILTIN(__builtin_ia32_rsqrt14pd256_mask, "V4dV4dV4dUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_rsqrt14ps128_mask, "V4fV4fV4fUc", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_rsqrt14ps256_mask, "V8fV8fV8fUc", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_cvtb2mask512, "UOiV64c", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_cvtmask2b512, "V64cUOi", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_cvtmask2w512, "V32sUi", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_cvtd2mask512, "UsV16i", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_cvtmask2d512, "V16iUs", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_cvtmask2q512, "V8OiUc", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_cvtq2mask512, "UcV8Oi", "ncV:512:", "avx512dq") +TARGET_BUILTIN(__builtin_ia32_cvtb2mask512, "UOiV64c", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtmask2b512, "V64cUOi", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtmask2w512, "V32sUi", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtd2mask512, "UsV16i", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtmask2d512, "V16iUs", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtmask2q512, "V8OiUc", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtq2mask512, "UcV8Oi", "ncV:512:", "avx512dq,evex512") TARGET_BUILTIN(__builtin_ia32_cvtb2mask128, "UsV16c", "ncV:128:", "avx512bw,avx512vl") TARGET_BUILTIN(__builtin_ia32_cvtb2mask256, "UiV32c", "ncV:256:", "avx512bw,avx512vl") TARGET_BUILTIN(__builtin_ia32_cvtmask2b128, "V16cUs", "ncV:128:", "avx512bw,avx512vl") @@ -1571,17 +1504,17 @@ TARGET_BUILTIN(__builtin_ia32_cvtmask2q128, "V2OiUc", "ncV:128:", "avx512dq,avx5 TARGET_BUILTIN(__builtin_ia32_cvtmask2q256, "V4OiUc", "ncV:256:", "avx512dq,avx512vl") TARGET_BUILTIN(__builtin_ia32_cvtq2mask128, "UcV2Oi", "ncV:128:", "avx512dq,avx512vl") TARGET_BUILTIN(__builtin_ia32_cvtq2mask256, "UcV4Oi", "ncV:256:", "avx512dq,avx512vl") -TARGET_BUILTIN(__builtin_ia32_pmovsdb512_mask, "V16cV16iV16cUs", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovsdb512mem_mask, "vV16c*V16iUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovswb512mem_mask, "vV32c*V32sUi", "nV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pmovsdw512_mask, "V16sV16iV16sUs", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovsdw512mem_mask, "vV16s*V16iUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovsqb512_mask, "V16cV8OiV16cUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovsqb512mem_mask, "vV16c*V8OiUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovsqd512_mask, "V8iV8OiV8iUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovsqd512mem_mask, "vV8i*V8OiUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovsqw512_mask, "V8sV8OiV8sUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovsqw512mem_mask, "vV8s*V8OiUc", "nV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_pmovsdb512_mask, "V16cV16iV16cUs", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovsdb512mem_mask, "vV16c*V16iUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovswb512mem_mask, "vV32c*V32sUi", "nV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovsdw512_mask, "V16sV16iV16sUs", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovsdw512mem_mask, "vV16s*V16iUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovsqb512_mask, "V16cV8OiV16cUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovsqb512mem_mask, "vV16c*V8OiUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovsqd512_mask, "V8iV8OiV8iUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovsqd512mem_mask, "vV8i*V8OiUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovsqw512_mask, "V8sV8OiV8sUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovsqw512mem_mask, "vV8s*V8OiUc", "nV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_pmovsdb128_mask, "V16cV4iV16cUc", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pmovsdb128mem_mask, "vV16c*V4iUc", "nV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pmovswb128mem_mask, "vV16c*V8sUc", "nV:128:", "avx512vl,avx512bw") @@ -1604,17 +1537,17 @@ TARGET_BUILTIN(__builtin_ia32_pmovsqw128_mask, "V8sV2OiV8sUc", "ncV:128:", "avx5 TARGET_BUILTIN(__builtin_ia32_pmovsqw128mem_mask, "vV8s*V2OiUc", "nV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pmovsqw256_mask, "V8sV4OiV8sUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pmovsqw256mem_mask, "vV8s*V4OiUc", "nV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_pmovusdb512_mask, "V16cV16iV16cUs", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovusdb512mem_mask, "vV16c*V16iUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovuswb512mem_mask, "vV32c*V32sUi", "nV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pmovusdw512_mask, "V16sV16iV16sUs", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovusdw512mem_mask, "vV16s*V16iUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovusqb512_mask, "V16cV8OiV16cUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovusqb512mem_mask, "vV16c*V8OiUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovusqd512_mask, "V8iV8OiV8iUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovusqd512mem_mask, "vV8i*V8OiUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovusqw512_mask, "V8sV8OiV8sUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovusqw512mem_mask, "vV8s*V8OiUc", "nV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_pmovusdb512_mask, "V16cV16iV16cUs", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovusdb512mem_mask, "vV16c*V16iUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovuswb512mem_mask, "vV32c*V32sUi", "nV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovusdw512_mask, "V16sV16iV16sUs", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovusdw512mem_mask, "vV16s*V16iUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovusqb512_mask, "V16cV8OiV16cUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovusqb512mem_mask, "vV16c*V8OiUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovusqd512_mask, "V8iV8OiV8iUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovusqd512mem_mask, "vV8i*V8OiUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovusqw512_mask, "V8sV8OiV8sUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovusqw512mem_mask, "vV8s*V8OiUc", "nV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_pmovusdb128_mask, "V16cV4iV16cUc", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pmovusdb128mem_mask, "vV16c*V4iUc", "nV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pmovuswb128mem_mask, "vV16c*V8sUc", "nV:128:", "avx512vl,avx512bw") @@ -1637,17 +1570,17 @@ TARGET_BUILTIN(__builtin_ia32_pmovusqw128_mask, "V8sV2OiV8sUc", "ncV:128:", "avx TARGET_BUILTIN(__builtin_ia32_pmovusqw128mem_mask, "vV8s*V2OiUc", "nV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pmovusqw256_mask, "V8sV4OiV8sUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pmovusqw256mem_mask, "vV8s*V4OiUc", "nV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_pmovdb512_mask, "V16cV16iV16cUs", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovdb512mem_mask, "vV16c*V16iUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovwb512mem_mask, "vV32c*V32sUi", "nV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_pmovdw512_mask, "V16sV16iV16sUs", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovdw512mem_mask, "vV16s*V16iUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovqb512_mask, "V16cV8OiV16cUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovqb512mem_mask, "vV16c*V8OiUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovqd512_mask, "V8iV8OiV8iUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovqd512mem_mask, "vV8i*V8OiUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovqw512_mask, "V8sV8OiV8sUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pmovqw512mem_mask, "vV8s*V8OiUc", "nV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_pmovdb512_mask, "V16cV16iV16cUs", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovdb512mem_mask, "vV16c*V16iUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovwb512mem_mask, "vV32c*V32sUi", "nV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovdw512_mask, "V16sV16iV16sUs", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovdw512mem_mask, "vV16s*V16iUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovqb512_mask, "V16cV8OiV16cUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovqb512mem_mask, "vV16c*V8OiUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovqd512_mask, "V8iV8OiV8iUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovqd512mem_mask, "vV8i*V8OiUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovqw512_mask, "V8sV8OiV8sUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_pmovqw512mem_mask, "vV8s*V8OiUc", "nV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_pmovdb128_mask, "V16cV4iV16cUc", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pmovwb128mem_mask, "vV16c*V8sUc", "nV:128:", "avx512vl,avx512bw") TARGET_BUILTIN(__builtin_ia32_pmovdb128mem_mask, "vV16c*V4iUc", "nV:128:", "avx512vl") @@ -1669,36 +1602,36 @@ TARGET_BUILTIN(__builtin_ia32_pmovqw128_mask, "V8sV2OiV8sUc", "ncV:128:", "avx51 TARGET_BUILTIN(__builtin_ia32_pmovqw128mem_mask, "vV8s*V2OiUc", "nV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pmovqw256_mask, "V8sV4OiV8sUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_pmovqw256mem_mask, "vV8s*V4OiUc", "nV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_extractf32x8_mask, "V8fV16fIiV8fUc", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_extractf64x2_512_mask, "V2dV8dIiV2dUc", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_extracti32x8_mask, "V8iV16iIiV8iUc", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_extracti64x2_512_mask, "V2OiV8OiIiV2OiUc", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_extracti32x4_mask, "V4iV16iIiV4iUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_extracti64x4_mask, "V4OiV8OiIiV4OiUc", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_extractf32x8_mask, "V8fV16fIiV8fUc", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_extractf64x2_512_mask, "V2dV8dIiV2dUc", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_extracti32x8_mask, "V8iV16iIiV8iUc", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_extracti64x2_512_mask, "V2OiV8OiIiV2OiUc", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_extracti32x4_mask, "V4iV16iIiV4iUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_extracti64x4_mask, "V4OiV8OiIiV4OiUc", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_extractf64x2_256_mask, "V2dV4dIiV2dUc", "ncV:256:", "avx512dq,avx512vl") TARGET_BUILTIN(__builtin_ia32_extracti64x2_256_mask, "V2OiV4OiIiV2OiUc", "ncV:256:", "avx512dq,avx512vl") TARGET_BUILTIN(__builtin_ia32_extractf32x4_256_mask, "V4fV8fIiV4fUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_extracti32x4_256_mask, "V4iV8iIiV4iUc", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_insertf32x8, "V16fV16fV8fIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_insertf64x2_512, "V8dV8dV2dIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_inserti32x8, "V16iV16iV8iIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_inserti64x2_512, "V8OiV8OiV2OiIi", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_insertf64x4, "V8dV8dV4dIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_inserti64x4, "V8OiV8OiV4OiIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_insertf32x8, "V16fV16fV8fIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_insertf64x2_512, "V8dV8dV2dIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_inserti32x8, "V16iV16iV8iIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_inserti64x2_512, "V8OiV8OiV2OiIi", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_insertf64x4, "V8dV8dV4dIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_inserti64x4, "V8OiV8OiV4OiIi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_insertf64x2_256, "V4dV4dV2dIi", "ncV:256:", "avx512dq,avx512vl") TARGET_BUILTIN(__builtin_ia32_inserti64x2_256, "V4OiV4OiV2OiIi", "ncV:256:", "avx512dq,avx512vl") TARGET_BUILTIN(__builtin_ia32_insertf32x4_256, "V8fV8fV4fIi", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_inserti32x4_256, "V8iV8iV4iIi", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_insertf32x4, "V16fV16fV4fIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_inserti32x4, "V16iV16iV4iIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_insertf32x4, "V16fV16fV4fIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_inserti32x4, "V16iV16iV4iIi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_getmantpd128_mask, "V2dV2dIiV2dUc", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_getmantpd256_mask, "V4dV4dIiV4dUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_getmantps128_mask, "V4fV4fIiV4fUc", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_getmantps256_mask, "V8fV8fIiV8fUc", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_getmantpd512_mask, "V8dV8dIiV8dUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_getmantps512_mask, "V16fV16fIiV16fUsIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_getexppd512_mask, "V8dV8dV8dUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_getexpps512_mask, "V16fV16fV16fUsIi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_getmantpd512_mask, "V8dV8dIiV8dUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_getmantps512_mask, "V16fV16fIiV16fUsIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_getexppd512_mask, "V8dV8dV8dUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_getexpps512_mask, "V16fV16fV16fUsIi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_vfmaddss3_mask, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_vfmaddss3_maskz, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_vfmaddss3_mask3, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512f") @@ -1707,14 +1640,14 @@ TARGET_BUILTIN(__builtin_ia32_vfmaddsd3_maskz, "V2dV2dV2dV2dUcIi", "ncV:128:", " TARGET_BUILTIN(__builtin_ia32_vfmaddsd3_mask3, "V2dV2dV2dV2dUcIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_vfmsubsd3_mask3, "V2dV2dV2dV2dUcIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_vfmsubss3_mask3, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_permdf512, "V8dV8dIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_permdi512, "V8OiV8OiIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_permvarhi512, "V32sV32sV32s", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_permvardf512, "V8dV8dV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_permvardi512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_permvarsf512, "V16fV16fV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_permvarsi512, "V16iV16iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_permvarqi512, "V64cV64cV64c", "ncV:512:", "avx512vbmi") +TARGET_BUILTIN(__builtin_ia32_permdf512, "V8dV8dIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_permdi512, "V8OiV8OiIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_permvarhi512, "V32sV32sV32s", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_permvardf512, "V8dV8dV8Oi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_permvardi512, "V8OiV8OiV8Oi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_permvarsf512, "V16fV16fV16i", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_permvarsi512, "V16iV16iV16i", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_permvarqi512, "V64cV64cV64c", "ncV:512:", "avx512vbmi,evex512") TARGET_BUILTIN(__builtin_ia32_permvarqi128, "V16cV16cV16c", "ncV:128:", "avx512vbmi,avx512vl") TARGET_BUILTIN(__builtin_ia32_permvarqi256, "V32cV32cV32c", "ncV:256:", "avx512vbmi,avx512vl") TARGET_BUILTIN(__builtin_ia32_permvarhi128, "V8sV8sV8s", "ncV:128:", "avx512bw,avx512vl") @@ -1725,8 +1658,8 @@ TARGET_BUILTIN(__builtin_ia32_fpclasspd128_mask, "UcV2dIiUc", "ncV:128:", "avx51 TARGET_BUILTIN(__builtin_ia32_fpclasspd256_mask, "UcV4dIiUc", "ncV:256:", "avx512dq,avx512vl") TARGET_BUILTIN(__builtin_ia32_fpclassps128_mask, "UcV4fIiUc", "ncV:128:", "avx512dq,avx512vl") TARGET_BUILTIN(__builtin_ia32_fpclassps256_mask, "UcV8fIiUc", "ncV:256:", "avx512dq,avx512vl") -TARGET_BUILTIN(__builtin_ia32_fpclassps512_mask, "UsV16fIiUs", "ncV:512:", "avx512dq") -TARGET_BUILTIN(__builtin_ia32_fpclasspd512_mask, "UcV8dIiUc", "ncV:512:", "avx512dq") +TARGET_BUILTIN(__builtin_ia32_fpclassps512_mask, "UsV16fIiUs", "ncV:512:", "avx512dq,evex512") +TARGET_BUILTIN(__builtin_ia32_fpclasspd512_mask, "UcV8dIiUc", "ncV:512:", "avx512dq,evex512") TARGET_BUILTIN(__builtin_ia32_fpclasssd_mask, "UcV2dIiUc", "ncV:128:", "avx512dq") TARGET_BUILTIN(__builtin_ia32_fpclassss_mask, "UcV4fIiUc", "ncV:128:", "avx512dq") TARGET_BUILTIN(__builtin_ia32_kaddqi, "UcUcUc", "nc", "avx512dq") @@ -1782,120 +1715,321 @@ TARGET_BUILTIN(__builtin_ia32_kmovb, "UcUc", "nc", "avx512dq") TARGET_BUILTIN(__builtin_ia32_kmovw, "UsUs", "nc", "avx512f") TARGET_BUILTIN(__builtin_ia32_kmovd, "UiUi", "nc", "avx512bw") TARGET_BUILTIN(__builtin_ia32_kmovq, "UOiUOi", "nc", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_palignr512, "V64cV64cV64cIi", "ncV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_palignr512, "V64cV64cV64cIi", "ncV:512:", "avx512bw,evex512") TARGET_BUILTIN(__builtin_ia32_dbpsadbw128, "V8sV16cV16cIi", "ncV:128:", "avx512bw,avx512vl") TARGET_BUILTIN(__builtin_ia32_dbpsadbw256, "V16sV32cV32cIi", "ncV:256:", "avx512bw,avx512vl") -TARGET_BUILTIN(__builtin_ia32_dbpsadbw512, "V32sV64cV64cIi", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_psadbw512, "V8OiV64cV64c", "ncV:512:", "avx512bw") -TARGET_BUILTIN(__builtin_ia32_compressdf512_mask, "V8dV8dV8dUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_compressdi512_mask, "V8OiV8OiV8OiUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_compresshi512_mask, "V32sV32sV32sUi", "ncV:512:", "avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_compressqi512_mask, "V64cV64cV64cUOi", "ncV:512:", "avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_compresssf512_mask, "V16fV16fV16fUs", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_compresssi512_mask, "V16iV16iV16iUs", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_dbpsadbw512, "V32sV64cV64cIi", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_psadbw512, "V8OiV64cV64c", "ncV:512:", "avx512bw,evex512") +TARGET_BUILTIN(__builtin_ia32_compressdf512_mask, "V8dV8dV8dUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_compressdi512_mask, "V8OiV8OiV8OiUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_compresshi512_mask, "V32sV32sV32sUi", "ncV:512:", "avx512vbmi2,evex512") +TARGET_BUILTIN(__builtin_ia32_compressqi512_mask, "V64cV64cV64cUOi", "ncV:512:", "avx512vbmi2,evex512") +TARGET_BUILTIN(__builtin_ia32_compresssf512_mask, "V16fV16fV16fUs", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_compresssi512_mask, "V16iV16iV16iUs", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_cmpsd_mask, "UcV2dV2dIiUcIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_cmpss_mask, "UcV4fV4fIiUcIi", "ncV:128:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pshufd512, "V16iV16iIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_expanddf512_mask, "V8dV8dV8dUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_expanddi512_mask, "V8OiV8OiV8OiUc", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_expandhi512_mask, "V32sV32sV32sUi", "ncV:512:", "avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_expandqi512_mask, "V64cV64cV64cUOi", "ncV:512:", "avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_expandloaddf512_mask, "V8dV8dC*V8dUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_expandloaddi512_mask, "V8OiV8OiC*V8OiUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_expandloadhi512_mask, "V32sV32sC*V32sUi", "nV:512:", "avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_expandloadqi512_mask, "V64cV64cC*V64cUOi", "nV:512:", "avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_expandloadsf512_mask, "V16fV16fC*V16fUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_expandloadsi512_mask, "V16iV16iC*V16iUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_expandsf512_mask, "V16fV16fV16fUs", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_expandsi512_mask, "V16iV16iV16iUs", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_cvtps2pd512_mask, "V8dV8fV8dUcIi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_compressstoredf512_mask, "vV8d*V8dUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_compressstoredi512_mask, "vV8Oi*V8OiUc", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_compressstorehi512_mask, "vV32s*V32sUi", "nV:512:", "avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_compressstoreqi512_mask, "vV64c*V64cUOi", "nV:512:", "avx512vbmi2") -TARGET_BUILTIN(__builtin_ia32_compressstoresf512_mask, "vV16f*V16fUs", "nV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_compressstoresi512_mask, "vV16i*V16iUs", "nV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_pshufd512, "V16iV16iIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_expanddf512_mask, "V8dV8dV8dUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_expanddi512_mask, "V8OiV8OiV8OiUc", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_expandhi512_mask, "V32sV32sV32sUi", "ncV:512:", "avx512vbmi2,evex512") +TARGET_BUILTIN(__builtin_ia32_expandqi512_mask, "V64cV64cV64cUOi", "ncV:512:", "avx512vbmi2,evex512") +TARGET_BUILTIN(__builtin_ia32_expandloaddf512_mask, "V8dV8dC*V8dUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_expandloaddi512_mask, "V8OiV8OiC*V8OiUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_expandloadhi512_mask, "V32sV32sC*V32sUi", "nV:512:", "avx512vbmi2,evex512") +TARGET_BUILTIN(__builtin_ia32_expandloadqi512_mask, "V64cV64cC*V64cUOi", "nV:512:", "avx512vbmi2,evex512") +TARGET_BUILTIN(__builtin_ia32_expandloadsf512_mask, "V16fV16fC*V16fUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_expandloadsi512_mask, "V16iV16iC*V16iUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_expandsf512_mask, "V16fV16fV16fUs", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_expandsi512_mask, "V16iV16iV16iUs", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtps2pd512_mask, "V8dV8fV8dUcIi", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_compressstoredf512_mask, "vV8d*V8dUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_compressstoredi512_mask, "vV8Oi*V8OiUc", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_compressstorehi512_mask, "vV32s*V32sUi", "nV:512:", "avx512vbmi2,evex512") +TARGET_BUILTIN(__builtin_ia32_compressstoreqi512_mask, "vV64c*V64cUOi", "nV:512:", "avx512vbmi2,evex512") +TARGET_BUILTIN(__builtin_ia32_compressstoresf512_mask, "vV16f*V16fUs", "nV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_compressstoresi512_mask, "vV16i*V16iUs", "nV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_vcvtph2ps_mask, "V4fV8sV4fUc", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_vcvtph2ps256_mask, "V8fV8sV8fUc", "ncV:256:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_vcvtps2ph_mask, "V8sV4fIiV8sUc", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_vcvtps2ph256_mask, "V8sV8fIiV8sUc", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_cvtw2mask512, "UiV32s", "ncV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_cvtw2mask512, "UiV32s", "ncV:512:", "avx512bw,evex512") TARGET_BUILTIN(__builtin_ia32_cvtw2mask128, "UcV8s", "ncV:128:", "avx512bw,avx512vl") TARGET_BUILTIN(__builtin_ia32_cvtw2mask256, "UsV16s", "ncV:256:", "avx512bw,avx512vl") TARGET_BUILTIN(__builtin_ia32_cvtsd2ss_round_mask, "V4fV4fV2dV4fUcIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_cvtsi2ss32, "V4fV4fiIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_cvtss2sd_round_mask, "V2dV2dV4fV2dUcIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_cvtusi2ss32, "V4fV4fUiIi", "ncV:128:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_vpmultishiftqb512, "V64cV64cV64c", "ncV:512:", "avx512vbmi") +TARGET_BUILTIN(__builtin_ia32_vpmultishiftqb512, "V64cV64cV64c", "ncV:512:", "avx512vbmi,evex512") TARGET_BUILTIN(__builtin_ia32_vpmultishiftqb128, "V16cV16cV16c", "ncV:128:", "avx512vbmi,avx512vl") TARGET_BUILTIN(__builtin_ia32_vpmultishiftqb256, "V32cV32cV32c", "ncV:256:", "avx512vbmi,avx512vl") // bf16 intrinsics -TARGET_BUILTIN(__builtin_ia32_cvtne2ps2bf16_128, "V8sV4fV4f", "ncV:128:", "avx512bf16,avx512vl") -TARGET_BUILTIN(__builtin_ia32_cvtne2ps2bf16_256, "V16sV8fV8f", "ncV:256:", "avx512bf16,avx512vl") -TARGET_BUILTIN(__builtin_ia32_cvtne2ps2bf16_512, "V32sV16fV16f", "ncV:512:", "avx512bf16") -TARGET_BUILTIN(__builtin_ia32_cvtneps2bf16_128_mask, "V8sV4fV8sUc", "ncV:128:", "avx512bf16,avx512vl") -TARGET_BUILTIN(__builtin_ia32_cvtneps2bf16_256_mask, "V8sV8fV8sUc", "ncV:256:", "avx512bf16,avx512vl") -TARGET_BUILTIN(__builtin_ia32_cvtneps2bf16_512_mask, "V16sV16fV16sUs", "ncV:512:", "avx512bf16") -TARGET_BUILTIN(__builtin_ia32_dpbf16ps_128, "V4fV4fV4iV4i", "ncV:128:", "avx512bf16,avx512vl") -TARGET_BUILTIN(__builtin_ia32_dpbf16ps_256, "V8fV8fV8iV8i", "ncV:256:", "avx512bf16,avx512vl") -TARGET_BUILTIN(__builtin_ia32_dpbf16ps_512, "V16fV16fV16iV16i", "ncV:512:", "avx512bf16") -TARGET_BUILTIN(__builtin_ia32_cvtsbf162ss_32, "fUs", "nc", "avx512bf16") - -TARGET_BUILTIN(__builtin_ia32_vp2intersect_q_512, "vV8OiV8OiUc*Uc*", "nV:512:", "avx512vp2intersect") +TARGET_BUILTIN(__builtin_ia32_cvtne2ps2bf16_128, "V8yV4fV4f", "ncV:128:", "avx512bf16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_cvtne2ps2bf16_256, "V16yV8fV8f", "ncV:256:", "avx512bf16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_cvtne2ps2bf16_512, "V32yV16fV16f", "ncV:512:", "avx512bf16,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtneps2bf16_128_mask, "V8yV4fV8yUc", "ncV:128:", "avx512bf16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_cvtneps2bf16_256_mask, "V8yV8fV8yUc", "ncV:256:", "avx512bf16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_cvtneps2bf16_512_mask, "V16yV16fV16yUs", "ncV:512:", "avx512bf16,evex512") +TARGET_BUILTIN(__builtin_ia32_dpbf16ps_128, "V4fV4fV8yV8y", "ncV:128:", "avx512bf16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_dpbf16ps_256, "V8fV8fV16yV16y", "ncV:256:", "avx512bf16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_dpbf16ps_512, "V16fV16fV32yV32y", "ncV:512:", "avx512bf16,evex512") +TARGET_BUILTIN(__builtin_ia32_cvtsbf162ss_32, "fy", "nc", "avx512bf16") + +TARGET_BUILTIN(__builtin_ia32_vp2intersect_q_512, "vV8OiV8OiUc*Uc*", "nV:512:", "avx512vp2intersect,evex512") TARGET_BUILTIN(__builtin_ia32_vp2intersect_q_256, "vV4OiV4OiUc*Uc*", "nV:256:", "avx512vp2intersect,avx512vl") TARGET_BUILTIN(__builtin_ia32_vp2intersect_q_128, "vV2OiV2OiUc*Uc*", "nV:128:", "avx512vp2intersect,avx512vl") -TARGET_BUILTIN(__builtin_ia32_vp2intersect_d_512, "vV16iV16iUs*Us*", "nV:512:", "avx512vp2intersect") +TARGET_BUILTIN(__builtin_ia32_vp2intersect_d_512, "vV16iV16iUs*Us*", "nV:512:", "avx512vp2intersect,evex512") TARGET_BUILTIN(__builtin_ia32_vp2intersect_d_256, "vV8iV8iUc*Uc*", "nV:256:", "avx512vp2intersect,avx512vl") TARGET_BUILTIN(__builtin_ia32_vp2intersect_d_128, "vV4iV4iUc*Uc*", "nV:128:", "avx512vp2intersect,avx512vl") +// AVX512 fp16 intrinsics +TARGET_BUILTIN(__builtin_ia32_vcomish, "iV8xV8xIiIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_addph512, "V32xV32xV32xIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_subph512, "V32xV32xV32xIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_mulph512, "V32xV32xV32xIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_divph512, "V32xV32xV32xIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_maxph512, "V32xV32xV32xIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_minph512, "V32xV32xV32xIi", "ncV:512:", "avx512fp16,evex512") + +TARGET_BUILTIN(__builtin_ia32_minph256, "V16xV16xV16x", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_minph128, "V8xV8xV8x", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_maxph256, "V16xV16xV16x", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_maxph128, "V8xV8xV8x", "ncV:128:", "avx512fp16,avx512vl") + +TARGET_BUILTIN(__builtin_ia32_addsh_round_mask, "V8xV8xV8xV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_divsh_round_mask, "V8xV8xV8xV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_mulsh_round_mask, "V8xV8xV8xV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_subsh_round_mask, "V8xV8xV8xV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_maxsh_round_mask, "V8xV8xV8xV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_minsh_round_mask, "V8xV8xV8xV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_cmpph512_mask, "UiV32xV32xIiUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_cmpph256_mask, "UsV16xV16xIiUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_cmpph128_mask, "UcV8xV8xIiUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_cmpsh_mask, "UcV8xV8xIiUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_loadsh128_mask, "V8xV8xC*V8xUc", "nV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_storesh128_mask, "vV8x*V8xUc", "nV:128:", "avx512fp16") + +TARGET_BUILTIN(__builtin_ia32_rcpph128_mask, "V8xV8xV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_rcpph256_mask, "V16xV16xV16xUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_rcpph512_mask, "V32xV32xV32xUi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_rsqrtph128_mask, "V8xV8xV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_rsqrtph256_mask, "V16xV16xV16xUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_rsqrtph512_mask, "V32xV32xV32xUi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_getmantph128_mask, "V8xV8xIiV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_getmantph256_mask, "V16xV16xIiV16xUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_getmantph512_mask, "V32xV32xIiV32xUiIi", "ncV:512:", "avx512fp16,evex512") + +TARGET_BUILTIN(__builtin_ia32_getexpph128_mask, "V8xV8xV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_getexpph256_mask, "V16xV16xV16xUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_getexpph512_mask, "V32xV32xV32xUiIi", "ncV:512:", "avx512fp16,evex512") + +TARGET_BUILTIN(__builtin_ia32_scalefph128_mask, "V8xV8xV8xV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_scalefph256_mask, "V16xV16xV16xV16xUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_scalefph512_mask, "V32xV32xV32xV32xUiIi", "ncV:512:", "avx512fp16,evex512") + +TARGET_BUILTIN(__builtin_ia32_rndscaleph_128_mask, "V8xV8xIiV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_rndscaleph_256_mask, "V16xV16xIiV16xUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_rndscaleph_mask, "V32xV32xIiV32xUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_reduceph128_mask, "V8xV8xIiV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_reduceph256_mask, "V16xV16xIiV16xUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_reduceph512_mask, "V32xV32xIiV32xUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_rcpsh_mask, "V8xV8xV8xV8xUc", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_rsqrtsh_mask, "V8xV8xV8xV8xUc", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_getmantsh_round_mask, "V8xV8xV8xIiV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_getexpsh128_round_mask, "V8xV8xV8xV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_scalefsh_round_mask, "V8xV8xV8xV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_rndscalesh_round_mask, "V8xV8xV8xV8xUcIiIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_reducesh_mask, "V8xV8xV8xV8xUcIiIi", "ncV:128:", "avx512fp16") + +TARGET_BUILTIN(__builtin_ia32_sqrtph, "V8xV8x", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_sqrtph256, "V16xV16x", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_sqrtph512, "V32xV32xIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_sqrtsh_round_mask, "V8xV8xV8xV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_fpclassph128_mask, "UcV8xIiUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_fpclassph256_mask, "UsV16xIiUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_fpclassph512_mask, "UiV32xIiUi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_fpclasssh_mask, "UcV8xIiUc", "ncV:128:", "avx512fp16") + +TARGET_BUILTIN(__builtin_ia32_vcvtpd2ph128_mask, "V8xV2dV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtpd2ph256_mask, "V8xV4dV8xUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtpd2ph512_mask, "V8xV8dV8xUcIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtph2pd128_mask, "V2dV8xV2dUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2pd256_mask, "V4dV8xV4dUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2pd512_mask, "V8dV8xV8dUcIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtsh2ss_round_mask, "V4fV4fV8xV4fUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vcvtss2sh_round_mask, "V8xV8xV4fV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vcvtsd2sh_round_mask, "V8xV8xV2dV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vcvtsh2sd_round_mask, "V2dV2dV8xV2dUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vcvtph2w128_mask, "V8sV8xV8sUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2w256_mask, "V16sV16xV16sUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2w512_mask, "V32sV32xV32sUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvttph2w128_mask, "V8sV8xV8sUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvttph2w256_mask, "V16sV16xV16sUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvttph2w512_mask, "V32sV32xV32sUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtw2ph128_mask, "V8xV8sV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtw2ph256_mask, "V16xV16sV16xUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtw2ph512_mask, "V32xV32sV32xUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtph2uw128_mask, "V8UsV8xV8UsUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2uw256_mask, "V16UsV16xV16UsUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2uw512_mask, "V32UsV32xV32UsUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvttph2uw128_mask, "V8UsV8xV8UsUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvttph2uw256_mask, "V16UsV16xV16UsUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvttph2uw512_mask, "V32UsV32xV32UsUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtuw2ph128_mask, "V8xV8UsV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtuw2ph256_mask, "V16xV16UsV16xUs", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtuw2ph512_mask, "V32xV32UsV32xUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtph2dq128_mask, "V4iV8xV4iUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2dq256_mask, "V8iV8xV8iUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2dq512_mask, "V16iV16xV16iUsIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtph2udq128_mask, "V4UiV8xV4UiUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2udq256_mask, "V8UiV8xV8UiUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2udq512_mask, "V16UiV16xV16UiUsIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtdq2ph128_mask, "V8xV4iV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtdq2ph256_mask, "V8xV8iV8xUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtdq2ph512_mask, "V16xV16iV16xUsIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtudq2ph128_mask, "V8xV4UiV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtudq2ph256_mask, "V8xV8UiV8xUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtudq2ph512_mask, "V16xV16UiV16xUsIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvttph2dq128_mask, "V4iV8xV4iUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvttph2dq256_mask, "V8iV8xV8iUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvttph2dq512_mask, "V16iV16xV16iUsIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvttph2udq128_mask, "V4UiV8xV4UiUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvttph2udq256_mask, "V8UiV8xV8UiUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvttph2udq512_mask, "V16UiV16xV16UiUsIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtqq2ph128_mask, "V8xV2OiV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtqq2ph256_mask, "V8xV4OiV8xUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtqq2ph512_mask, "V8xV8OiV8xUcIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtph2qq128_mask, "V2OiV8xV2OiUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2qq256_mask, "V4OiV8xV4OiUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2qq512_mask, "V8OiV8xV8OiUcIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtuqq2ph128_mask, "V8xV2UOiV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtuqq2ph256_mask, "V8xV4UOiV8xUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtuqq2ph512_mask, "V8xV8UOiV8xUcIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtph2uqq128_mask, "V2UOiV8xV2UOiUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2uqq256_mask, "V4UOiV8xV4UOiUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2uqq512_mask, "V8UOiV8xV8UOiUcIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvttph2qq128_mask, "V2OiV8xV2OiUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvttph2qq256_mask, "V4OiV8xV4OiUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvttph2qq512_mask, "V8OiV8xV8OiUcIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvttph2uqq128_mask, "V2UOiV8xV2UOiUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvttph2uqq256_mask, "V4UOiV8xV4UOiUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvttph2uqq512_mask, "V8UOiV8xV8UOiUcIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtsh2si32, "iV8xIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vcvtsh2usi32, "UiV8xIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vcvtusi2sh, "V8xV8xUiIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vcvtsi2sh, "V8xV8xiIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vcvttsh2si32, "iV8xIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vcvttsh2usi32, "UiV8xIi", "ncV:128:", "avx512fp16") + +TARGET_BUILTIN(__builtin_ia32_vcvtph2psx128_mask, "V4fV8xV4fUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2psx256_mask, "V8fV8xV8fUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2psx512_mask, "V16fV16xV16fUsIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vcvtps2phx128_mask, "V8xV4fV8xUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtps2phx256_mask, "V8xV8fV8xUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtps2phx512_mask, "V16xV16fV16xUsIi", "ncV:512:", "avx512fp16,evex512") + +TARGET_BUILTIN(__builtin_ia32_vfmaddph, "V8xV8xV8xV8x", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfmaddph256, "V16xV16xV16xV16x", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfmaddph512_mask, "V32xV32xV32xV32xUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddph512_mask3, "V32xV32xV32xV32xUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddph512_maskz, "V32xV32xV32xV32xUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddsubph, "V8xV8xV8xV8x", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfmaddsubph256, "V16xV16xV16xV16x", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfmaddsubph512_mask, "V32xV32xV32xV32xUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddsubph512_maskz, "V32xV32xV32xV32xUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddsubph512_mask3, "V32xV32xV32xV32xUiIi", "ncV:512:", "avx512fp16,evex512") + +TARGET_BUILTIN(__builtin_ia32_vfmsubaddph512_mask3, "V32xV32xV32xV32xUiIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmsubph512_mask3, "V32xV32xV32xV32xUiIi", "ncV:512:", "avx512fp16,evex512") + +TARGET_BUILTIN(__builtin_ia32_vfmaddsh3_mask, "V8xV8xV8xV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vfmaddsh3_maskz, "V8xV8xV8xV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vfmaddsh3_mask3, "V8xV8xV8xV8xUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vfmsubsh3_mask3, "V8xV8xV8xV8xUcIi", "ncV:128:", "avx512fp16") + +TARGET_BUILTIN(__builtin_ia32_vfmaddcph128_mask, "V4fV4fV4fV4fUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfmaddcph128_maskz, "V4fV4fV4fV4fUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfmaddcph256_mask, "V8fV8fV8fV8fUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfmaddcph256_maskz, "V8fV8fV8fV8fUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfmaddcph512_mask, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddcph512_maskz, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddcph512_mask3, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vfcmaddcph128_mask, "V4fV4fV4fV4fUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfcmaddcph128_maskz, "V4fV4fV4fV4fUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfcmaddcph256_mask, "V8fV8fV8fV8fUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfcmaddcph256_maskz, "V8fV8fV8fV8fUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfcmaddcph512_mask, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vfcmaddcph512_maskz, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vfcmaddcph512_mask3, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vfmaddcsh_mask, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vfmaddcsh_maskz, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vfcmaddcsh_mask, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vfcmaddcsh_maskz, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vfmaddcsh_round_mask, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vfmaddcsh_round_mask3, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vfcmaddcsh_round_mask, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vfcmaddcsh_round_mask3, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512fp16") + +TARGET_BUILTIN(__builtin_ia32_vfmulcsh_mask, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vfcmulcsh_mask, "V4fV4fV4fV4fUcIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vfmulcph128_mask, "V4fV4fV4fV4fUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfmulcph256_mask, "V8fV8fV8fV8fUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfmulcph512_mask, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_vfcmulcph128_mask, "V4fV4fV4fV4fUc", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfcmulcph256_mask, "V8fV8fV8fV8fUc", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfcmulcph512_mask, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512fp16,evex512") + // generic select intrinsics TARGET_BUILTIN(__builtin_ia32_selectb_128, "V16cUsV16cV16c", "ncV:128:", "avx512bw,avx512vl") TARGET_BUILTIN(__builtin_ia32_selectb_256, "V32cUiV32cV32c", "ncV:256:", "avx512bw,avx512vl") -TARGET_BUILTIN(__builtin_ia32_selectb_512, "V64cUOiV64cV64c", "ncV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_selectb_512, "V64cUOiV64cV64c", "ncV:512:", "avx512bw,evex512") TARGET_BUILTIN(__builtin_ia32_selectw_128, "V8sUcV8sV8s", "ncV:128:", "avx512bw,avx512vl") TARGET_BUILTIN(__builtin_ia32_selectw_256, "V16sUsV16sV16s", "ncV:256:", "avx512bw,avx512vl") -TARGET_BUILTIN(__builtin_ia32_selectw_512, "V32sUiV32sV32s", "ncV:512:", "avx512bw") +TARGET_BUILTIN(__builtin_ia32_selectw_512, "V32sUiV32sV32s", "ncV:512:", "avx512bw,evex512") TARGET_BUILTIN(__builtin_ia32_selectd_128, "V4iUcV4iV4i", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_selectd_256, "V8iUcV8iV8i", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_selectd_512, "V16iUsV16iV16i", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_selectd_512, "V16iUsV16iV16i", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_selectph_128, "V8xUcV8xV8x", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_selectph_256, "V16xUsV16xV16x", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_selectph_512, "V32xUiV32xV32x", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_selectpbf_128, "V8yUcV8yV8y", "ncV:128:", "avx512bf16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_selectpbf_256, "V16yUsV16yV16y", "ncV:256:", "avx512bf16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_selectpbf_512, "V32yUiV32yV32y", "ncV:512:", "avx512bf16,evex512") TARGET_BUILTIN(__builtin_ia32_selectq_128, "V2OiUcV2OiV2Oi", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_selectq_256, "V4OiUcV4OiV4Oi", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_selectq_512, "V8OiUcV8OiV8Oi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_selectq_512, "V8OiUcV8OiV8Oi", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_selectps_128, "V4fUcV4fV4f", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_selectps_256, "V8fUcV8fV8f", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_selectps_512, "V16fUsV16fV16f", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_selectps_512, "V16fUsV16fV16f", "ncV:512:", "avx512f,evex512") TARGET_BUILTIN(__builtin_ia32_selectpd_128, "V2dUcV2dV2d", "ncV:128:", "avx512vl") TARGET_BUILTIN(__builtin_ia32_selectpd_256, "V4dUcV4dV4d", "ncV:256:", "avx512vl") -TARGET_BUILTIN(__builtin_ia32_selectpd_512, "V8dUcV8dV8d", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_selectpd_512, "V8dUcV8dV8d", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_selectsh_128, "V8xUcV8xV8x", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_selectsbf_128, "V8yUcV8yV8y", "ncV:128:", "avx512bf16") TARGET_BUILTIN(__builtin_ia32_selectss_128, "V4fUcV4fV4f", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_selectsd_128, "V2dUcV2dV2d", "ncV:128:", "avx512f") // generic reduction intrinsics -TARGET_BUILTIN(__builtin_ia32_reduce_add_d512, "iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_add_q512, "OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_and_d512, "iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_and_q512, "OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_fadd_pd512, "ddV8d", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_fadd_ps512, "ffV16f", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_fmax_pd512, "dV8d", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_fmax_ps512, "fV16f", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_fmin_pd512, "dV8d", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_fmin_ps512, "fV16f", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_fmul_pd512, "ddV8d", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_fmul_ps512, "ffV16f", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_mul_d512, "iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_mul_q512, "OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_or_d512, "iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_or_q512, "OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_smax_d512, "iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_smax_q512, "OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_smin_d512, "iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_smin_q512, "OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_umax_d512, "iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_umax_q512, "OiV8Oi", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_umin_d512, "iV16i", "ncV:512:", "avx512f") -TARGET_BUILTIN(__builtin_ia32_reduce_umin_q512, "OiV8Oi", "ncV:512:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_reduce_fadd_pd512, "ddV8d", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_reduce_fadd_ps512, "ffV16f", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_reduce_fadd_ph512, "xxV32x", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_reduce_fadd_ph256, "xxV16x", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_reduce_fadd_ph128, "xxV8x", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_reduce_fmax_pd512, "dV8d", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_reduce_fmax_ps512, "fV16f", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_reduce_fmax_ph512, "xV32x", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_reduce_fmax_ph256, "xV16x", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_reduce_fmax_ph128, "xV8x", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_reduce_fmin_pd512, "dV8d", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_reduce_fmin_ps512, "fV16f", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_reduce_fmin_ph512, "xV32x", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_reduce_fmin_ph256, "xV16x", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_reduce_fmin_ph128, "xV8x", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_reduce_fmul_pd512, "ddV8d", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_reduce_fmul_ps512, "ffV16f", "ncV:512:", "avx512f,evex512") +TARGET_BUILTIN(__builtin_ia32_reduce_fmul_ph512, "xxV32x", "ncV:512:", "avx512fp16,evex512") +TARGET_BUILTIN(__builtin_ia32_reduce_fmul_ph256, "xxV16x", "ncV:256:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_reduce_fmul_ph128, "xxV8x", "ncV:128:", "avx512fp16,avx512vl") // MONITORX/MWAITX TARGET_BUILTIN(__builtin_ia32_monitorx, "vvC*UiUi", "n", "mwaitx") @@ -1946,41 +2080,96 @@ TARGET_BUILTIN(__builtin_ia32_serialize, "v", "n", "serialize") TARGET_BUILTIN(__builtin_ia32_xsusldtrk, "v", "n", "tsxldtrk") TARGET_BUILTIN(__builtin_ia32_xresldtrk, "v", "n", "tsxldtrk") +// RAO-INT +TARGET_BUILTIN(__builtin_ia32_aadd32, "vv*Si", "n", "raoint") +TARGET_BUILTIN(__builtin_ia32_aand32, "vv*Si", "n", "raoint") +TARGET_BUILTIN(__builtin_ia32_aor32, "vv*Si", "n", "raoint") +TARGET_BUILTIN(__builtin_ia32_axor32, "vv*Si", "n", "raoint") + // MSVC -TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_ReadWriteBarrier, "v", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_ReadBarrier, "v", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_WriteBarrier, "v", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(__emul, "LLiii", "nch", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__emulu, "ULLiUiUi", "nch", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_AddressOfReturnAddress, "v*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(__stosb, "vUc*Ucz", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__int2c, "v", "nhr", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__ud2, "v", "nhr", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(__readfsbyte, "UcUNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__readfsword, "UsUNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__readfsdword, "UNiUNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__readfsqword, "ULLiUNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(__readgsbyte, "UcUNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__readgsword, "UsUNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__readgsdword, "UNiUNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__readgsqword, "ULLiUNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedAnd64, "WiWiD*Wi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement64, "WiWiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange64, "WiWiD*Wi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64, "WiWiD*Wi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeSub64, "WiWiD*Wi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement64, "WiWiD*", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr64, "WiWiD*Wi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor64, "WiWiD*Wi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_ReadWriteBarrier, "v", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_ReadBarrier, "v", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_WriteBarrier, "v", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(__cpuid, "vi*i", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__cpuidex, "vi*ii", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(__emul, "LLiii", "nch", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__emulu, "ULLiUiUi", "nch", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(_AddressOfReturnAddress, "v*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(__stosb, "vUc*Ucz", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__int2c, "v", "nhr", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__ud2, "v", "nhr", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(__readfsbyte, "UcUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__readfsword, "UsUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__readfsdword, "UNiUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__readfsqword, "ULLiUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +TARGET_HEADER_BUILTIN(__readgsbyte, "UcUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__readgsword, "UsUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__readgsdword, "UNiUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__readgsqword, "ULLiUNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +// AVX-VNNI-INT16 +TARGET_BUILTIN(__builtin_ia32_vpdpwsud128, "V4iV4iV4iV4i", "nV:128:", "avxvnniint16") +TARGET_BUILTIN(__builtin_ia32_vpdpwsud256, "V8iV8iV8iV8i", "nV:256:", "avxvnniint16") +TARGET_BUILTIN(__builtin_ia32_vpdpwsuds128, "V4iV4iV4iV4i", "nV:128:", "avxvnniint16") +TARGET_BUILTIN(__builtin_ia32_vpdpwsuds256, "V8iV8iV8iV8i", "nV:256:", "avxvnniint16") +TARGET_BUILTIN(__builtin_ia32_vpdpwusd128, "V4iV4iV4iV4i", "nV:128:", "avxvnniint16") +TARGET_BUILTIN(__builtin_ia32_vpdpwusd256, "V8iV8iV8iV8i", "nV:256:", "avxvnniint16") +TARGET_BUILTIN(__builtin_ia32_vpdpwusds128, "V4iV4iV4iV4i", "nV:128:", "avxvnniint16") +TARGET_BUILTIN(__builtin_ia32_vpdpwusds256, "V8iV8iV8iV8i", "nV:256:", "avxvnniint16") +TARGET_BUILTIN(__builtin_ia32_vpdpwuud128, "V4iV4iV4iV4i", "nV:128:", "avxvnniint16") +TARGET_BUILTIN(__builtin_ia32_vpdpwuud256, "V8iV8iV8iV8i", "nV:256:", "avxvnniint16") +TARGET_BUILTIN(__builtin_ia32_vpdpwuuds128, "V4iV4iV4iV4i", "nV:128:", "avxvnniint16") +TARGET_BUILTIN(__builtin_ia32_vpdpwuuds256, "V8iV8iV8iV8i", "nV:256:", "avxvnniint16") + +// AVX-NE-CONVERT +TARGET_BUILTIN(__builtin_ia32_vbcstnebf162ps128, "V4fyC*", "nV:128:", "avxneconvert") +TARGET_BUILTIN(__builtin_ia32_vbcstnebf162ps256, "V8fyC*", "nV:256:", "avxneconvert") +TARGET_BUILTIN(__builtin_ia32_vbcstnesh2ps128, "V4fxC*", "nV:128:", "avxneconvert") +TARGET_BUILTIN(__builtin_ia32_vbcstnesh2ps256, "V8fxC*", "nV:256:", "avxneconvert") +TARGET_BUILTIN(__builtin_ia32_vcvtneebf162ps128, "V4fV8yC*", "nV:128:", "avxneconvert") +TARGET_BUILTIN(__builtin_ia32_vcvtneebf162ps256, "V8fV16yC*", "nV:256:", "avxneconvert") +TARGET_BUILTIN(__builtin_ia32_vcvtneeph2ps128, "V4fV8xC*", "nV:128:", "avxneconvert") +TARGET_BUILTIN(__builtin_ia32_vcvtneeph2ps256, "V8fV16xC*", "nV:256:", "avxneconvert") +TARGET_BUILTIN(__builtin_ia32_vcvtneobf162ps128, "V4fV8yC*", "nV:128:", "avxneconvert") +TARGET_BUILTIN(__builtin_ia32_vcvtneobf162ps256, "V8fV16yC*", "nV:256:", "avxneconvert") +TARGET_BUILTIN(__builtin_ia32_vcvtneoph2ps128, "V4fV8xC*", "nV:128:", "avxneconvert") +TARGET_BUILTIN(__builtin_ia32_vcvtneoph2ps256, "V8fV16xC*", "nV:256:", "avxneconvert") +TARGET_BUILTIN(__builtin_ia32_vcvtneps2bf16128, "V8yV4f", "nV:128:", "avx512bf16,avx512vl|avxneconvert") +TARGET_BUILTIN(__builtin_ia32_vcvtneps2bf16256, "V8yV8f", "nV:256:", "avx512bf16,avx512vl|avxneconvert") + +// SHA512 +TARGET_BUILTIN(__builtin_ia32_vsha512msg1, "V4ULLiV4ULLiV2ULLi", "nV:256:", "sha512") +TARGET_BUILTIN(__builtin_ia32_vsha512msg2, "V4ULLiV4ULLiV4ULLi", "nV:256:", "sha512") +TARGET_BUILTIN(__builtin_ia32_vsha512rnds2, "V4ULLiV4ULLiV4ULLiV2ULLi", "nV:256:", "sha512") + +TARGET_HEADER_BUILTIN(_InterlockedAnd64, "WiWiD*Wi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedDecrement64, "WiWiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchange64, "WiWiD*Wi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64, "WiWiD*Wi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedExchangeSub64, "WiWiD*Wi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedIncrement64, "WiWiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedOr64, "WiWiD*Wi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_InterlockedXor64, "WiWiD*Wi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") + +// SM3 +TARGET_BUILTIN(__builtin_ia32_vsm3msg1, "V4UiV4UiV4UiV4Ui", "nV:128:", "sm3") +TARGET_BUILTIN(__builtin_ia32_vsm3msg2, "V4UiV4UiV4UiV4Ui", "nV:128:", "sm3") +TARGET_BUILTIN(__builtin_ia32_vsm3rnds2, "V4UiV4UiV4UiV4UiIUi", "nV:128:", "sm3") + +// SM4 +TARGET_BUILTIN(__builtin_ia32_vsm4key4128, "V4UiV4UiV4Ui", "nV:128:", "sm4") +TARGET_BUILTIN(__builtin_ia32_vsm4key4256, "V8UiV8UiV8Ui", "nV:256:", "sm4") +TARGET_BUILTIN(__builtin_ia32_vsm4rnds4128, "V4UiV4UiV4Ui", "nV:128:", "sm4") +TARGET_BUILTIN(__builtin_ia32_vsm4rnds4256, "V8UiV8UiV8Ui", "nV:256:", "sm4") #undef BUILTIN #undef TARGET_BUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsX86_64.def b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsX86_64.def index ce2b1decdf6c..5e00916d4b25 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/BuiltinsX86_64.def +++ b/contrib/llvm-project/clang/include/clang/Basic/BuiltinsX86_64.def @@ -21,19 +21,19 @@ # define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANG, FEATURE) BUILTIN(ID, TYPE, ATTRS) #endif -TARGET_HEADER_BUILTIN(_BitScanForward64, "UcUNi*ULLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_BitScanReverse64, "UcUNi*ULLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_BitScanForward64, "UcUNi*ULLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_BitScanReverse64, "UcUNi*ULLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__mulh, "LLiLLiLLi", "nch", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__umulh, "ULLiULLiULLi", "nch", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_mul128, "LLiLLiLLiLLi*", "nch", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_umul128, "ULLiULLiULLiULLi*", "nch", "intrin.h", ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__mulh, "LLiLLiLLi", "nch", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__umulh, "ULLiULLiULLi", "nch", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_mul128, "LLiLLiLLiLLi*", "nch", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(_umul128, "ULLiULLiULLiULLi*", "nch", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__faststorefence, "v", "nh", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__shiftleft128, "ULLiULLiULLiUc", "nch", "intrin.h", ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__shiftright128, "ULLiULLiULLiUc", "nch", "intrin.h", ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__faststorefence, "v", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__shiftleft128, "ULLiULLiULLiUc", "nch", INTRIN_H, ALL_MS_LANGUAGES, "") +TARGET_HEADER_BUILTIN(__shiftright128, "ULLiULLiULLiUc", "nch", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange128, "UcLLiD*LLiLLiLLi*", "nh", "intrin.h", ALL_MS_LANGUAGES, "cx16") +TARGET_HEADER_BUILTIN(_InterlockedCompareExchange128, "UcLLiD*LLiLLiLLi*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "cx16") TARGET_BUILTIN(__builtin_ia32_readeflags_u64, "UOi", "n", "") TARGET_BUILTIN(__builtin_ia32_writeeflags_u64, "vUOi", "n", "") @@ -42,9 +42,8 @@ TARGET_BUILTIN(__builtin_ia32_cvttss2si64, "OiV4f", "ncV:128:", "sse") TARGET_BUILTIN(__builtin_ia32_cvtsd2si64, "OiV2d", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_cvttsd2si64, "OiV2d", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_movnti64, "vOi*Oi", "n", "sse2") -TARGET_BUILTIN(__builtin_ia32_vec_ext_v2di, "OiV2OiIi", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_vec_set_v2di, "V2OiV2OiOiIi", "ncV:128:", "sse4.1") -TARGET_BUILTIN(__builtin_ia32_crc32di, "UOiUOiUOi", "nc", "sse4.2") +TARGET_BUILTIN(__builtin_ia32_crc32di, "UOiUOiUOi", "nc", "crc32") TARGET_BUILTIN(__builtin_ia32_vec_ext_v4di, "OiV4OiIi", "ncV:256:", "avx") TARGET_BUILTIN(__builtin_ia32_vec_set_v4di, "V4OiV4OiOiIi", "ncV:256:", "avx") TARGET_BUILTIN(__builtin_ia32_rdfsbase32, "Ui", "n", "fsgsbase") @@ -92,6 +91,12 @@ TARGET_BUILTIN(__builtin_ia32_cvtsi2sd64, "V2dV2dOiIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_cvtsi2ss64, "V4fV4fOiIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_cvtusi2sd64, "V2dV2dUOiIi", "ncV:128:", "avx512f") TARGET_BUILTIN(__builtin_ia32_cvtusi2ss64, "V4fV4fUOiIi", "ncV:128:", "avx512f") +TARGET_BUILTIN(__builtin_ia32_vcvtsh2si64, "OiV8xIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vcvtsh2usi64, "UOiV8xIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vcvtusi642sh, "V8xV8xUOiIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vcvtsi642sh, "V8xV8xOiIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vcvttsh2si64, "OiV8xIi", "ncV:128:", "avx512fp16") +TARGET_BUILTIN(__builtin_ia32_vcvttsh2usi64, "UOiV8xIi", "ncV:128:", "avx512fp16") TARGET_BUILTIN(__builtin_ia32_directstore_u64, "vULi*ULi", "n", "movdiri") // UINTR @@ -99,6 +104,9 @@ TARGET_BUILTIN(__builtin_ia32_clui, "v", "n", "uintr") TARGET_BUILTIN(__builtin_ia32_stui, "v", "n", "uintr") TARGET_BUILTIN(__builtin_ia32_testui, "Uc", "n", "uintr") TARGET_BUILTIN(__builtin_ia32_senduipi, "vUWi", "n", "uintr") +// USERMSR +TARGET_BUILTIN(__builtin_ia32_urdmsr, "ULLiULLi", "n", "usermsr") +TARGET_BUILTIN(__builtin_ia32_uwrmsr, "vULLiULLi", "n", "usermsr") // AMX internal builtin TARGET_BUILTIN(__builtin_ia32_tile_loadconfig_internal, "vvC*", "n", "amx-tile") @@ -111,6 +119,9 @@ TARGET_BUILTIN(__builtin_ia32_tdpbuud_internal, "V256iUsUsUsV256iV256iV256i", "n TARGET_BUILTIN(__builtin_ia32_tilestored64_internal, "vUsUsv*zV256i", "n", "amx-tile") TARGET_BUILTIN(__builtin_ia32_tilezero_internal, "V256iUsUs", "n", "amx-tile") TARGET_BUILTIN(__builtin_ia32_tdpbf16ps_internal, "V256iUsUsUsV256iV256iV256i", "n", "amx-bf16") +TARGET_BUILTIN(__builtin_ia32_tdpfp16ps_internal, "V256iUsUsUsV256iV256iV256i", "n", "amx-fp16") +TARGET_BUILTIN(__builtin_ia32_tcmmimfp16ps_internal, "V256iUsUsUsV256iV256iV256i", "n", "amx-complex") +TARGET_BUILTIN(__builtin_ia32_tcmmrlfp16ps_internal, "V256iUsUsUsV256iV256iV256i", "n", "amx-complex") // AMX TARGET_BUILTIN(__builtin_ia32_tile_loadconfig, "vvC*", "n", "amx-tile") TARGET_BUILTIN(__builtin_ia32_tile_storeconfig, "vvC*", "n", "amx-tile") @@ -128,6 +139,22 @@ TARGET_BUILTIN(__builtin_ia32_tdpbuud, "vIUcIUcIUc", "n", "amx-int8") TARGET_BUILTIN(__builtin_ia32_tdpbf16ps, "vIUcIUcIUc", "n", "amx-bf16") TARGET_BUILTIN(__builtin_ia32_ptwrite64, "vUOi", "n", "ptwrite") +TARGET_BUILTIN(__builtin_ia32_tcmmimfp16ps, "vIUcIUcIUc", "n", "amx-complex") +TARGET_BUILTIN(__builtin_ia32_tcmmrlfp16ps, "vIUcIUcIUc", "n", "amx-complex") + +TARGET_BUILTIN(__builtin_ia32_prefetchi, "vvC*Ui", "nc", "prefetchi") +TARGET_BUILTIN(__builtin_ia32_cmpccxadd32, "Siv*SiSiIi", "n", "cmpccxadd") +TARGET_BUILTIN(__builtin_ia32_cmpccxadd64, "SLLiv*SLLiSLLiIi", "n", "cmpccxadd") + +// AMX_FP16 FP16 +TARGET_BUILTIN(__builtin_ia32_tdpfp16ps, "vIUcIUcIUc", "n", "amx-fp16") + +// RAO-INT +TARGET_BUILTIN(__builtin_ia32_aadd64, "vv*SOi", "n", "raoint") +TARGET_BUILTIN(__builtin_ia32_aand64, "vv*SOi", "n", "raoint") +TARGET_BUILTIN(__builtin_ia32_aor64, "vv*SOi", "n", "raoint") +TARGET_BUILTIN(__builtin_ia32_axor64, "vv*SOi", "n", "raoint") + #undef BUILTIN #undef TARGET_BUILTIN #undef TARGET_HEADER_BUILTIN diff --git a/contrib/llvm-project/clang/include/clang/Basic/CLWarnings.h b/contrib/llvm-project/clang/include/clang/Basic/CLWarnings.h new file mode 100644 index 000000000000..9b8be93bad3a --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/CLWarnings.h @@ -0,0 +1,26 @@ +//===--- CLWarnings.h - Maps some cl.exe warning ids -----------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CLANG_BASIC_CLWARNINGS_H +#define LLVM_CLANG_BASIC_CLWARNINGS_H + +#include <optional> + +namespace clang { + +namespace diag { +enum class Group; +} + +/// For cl.exe warning IDs that cleany map to clang diagnostic groups, +/// returns the corresponding group. Else, returns an empty Optional. +std::optional<diag::Group> diagGroupFromCLWarningID(unsigned); + +} // end namespace clang + +#endif // LLVM_CLANG_BASIC_CLWARNINGS_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/CharInfo.h b/contrib/llvm-project/clang/include/clang/Basic/CharInfo.h index 8577475fab06..7d4119383508 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/CharInfo.h +++ b/contrib/llvm-project/clang/include/clang/Basic/CharInfo.h @@ -38,15 +38,21 @@ namespace charinfo { }; } // end namespace charinfo -/// Returns true if this is an ASCII character. +/// Returns true if a byte is an ASCII character. LLVM_READNONE inline bool isASCII(char c) { return static_cast<unsigned char>(c) <= 127; } +LLVM_READNONE inline bool isASCII(unsigned char c) { return c <= 127; } + +/// Returns true if a codepoint is an ASCII character. +LLVM_READNONE inline bool isASCII(uint32_t c) { return c <= 127; } +LLVM_READNONE inline bool isASCII(int64_t c) { return 0 <= c && c <= 127; } + /// Returns true if this is a valid first character of a C identifier, /// which is [a-zA-Z_]. -LLVM_READONLY inline bool isIdentifierHead(unsigned char c, - bool AllowDollar = false) { +LLVM_READONLY inline bool isAsciiIdentifierStart(unsigned char c, + bool AllowDollar = false) { using namespace charinfo; if (InfoTable[c] & (CHAR_UPPER|CHAR_LOWER|CHAR_UNDER)) return true; @@ -55,8 +61,8 @@ LLVM_READONLY inline bool isIdentifierHead(unsigned char c, /// Returns true if this is a body character of a C identifier, /// which is [a-zA-Z0-9_]. -LLVM_READONLY inline bool isIdentifierBody(unsigned char c, - bool AllowDollar = false) { +LLVM_READONLY inline bool isAsciiIdentifierContinue(unsigned char c, + bool AllowDollar = false) { using namespace charinfo; if (InfoTable[c] & (CHAR_UPPER|CHAR_LOWER|CHAR_DIGIT|CHAR_UNDER)) return true; @@ -157,6 +163,44 @@ LLVM_READONLY inline bool isRawStringDelimBody(unsigned char c) { CHAR_DIGIT|CHAR_UNDER|CHAR_RAWDEL)) != 0; } +enum class EscapeChar { + Single = 1, + Double = 2, + SingleAndDouble = static_cast<int>(Single) | static_cast<int>(Double), +}; + +/// Return C-style escaped string for special characters, or an empty string if +/// there is no such mapping. +template <EscapeChar Opt, class CharT> +LLVM_READONLY inline auto escapeCStyle(CharT Ch) -> StringRef { + switch (Ch) { + case '\\': + return "\\\\"; + case '\'': + if ((static_cast<int>(Opt) & static_cast<int>(EscapeChar::Single)) == 0) + break; + return "\\'"; + case '"': + if ((static_cast<int>(Opt) & static_cast<int>(EscapeChar::Double)) == 0) + break; + return "\\\""; + case '\a': + return "\\a"; + case '\b': + return "\\b"; + case '\f': + return "\\f"; + case '\n': + return "\\n"; + case '\r': + return "\\r"; + case '\t': + return "\\t"; + case '\v': + return "\\v"; + } + return {}; +} /// Converts the given ASCII character to its lowercase equivalent. /// @@ -181,13 +225,13 @@ LLVM_READONLY inline char toUppercase(char c) { /// /// Note that this is a very simple check; it does not accept UCNs as valid /// identifier characters. -LLVM_READONLY inline bool isValidIdentifier(StringRef S, - bool AllowDollar = false) { - if (S.empty() || !isIdentifierHead(S[0], AllowDollar)) +LLVM_READONLY inline bool isValidAsciiIdentifier(StringRef S, + bool AllowDollar = false) { + if (S.empty() || !isAsciiIdentifierStart(S[0], AllowDollar)) return false; for (StringRef::iterator I = S.begin(), E = S.end(); I != E; ++I) - if (!isIdentifierBody(*I, AllowDollar)) + if (!isAsciiIdentifierContinue(*I, AllowDollar)) return false; return true; diff --git a/contrib/llvm-project/clang/include/clang/Basic/CodeGenOptions.def b/contrib/llvm-project/clang/include/clang/Basic/CodeGenOptions.def index e3202cf88756..7c0bfe328496 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/CodeGenOptions.def +++ b/contrib/llvm-project/clang/include/clang/Basic/CodeGenOptions.def @@ -12,6 +12,9 @@ // that have enumeration type and VALUE_CODEGENOPT is a code // generation option that describes a value rather than a flag. // +// AFFECTING_VALUE_CODEGENOPT is used for code generation options that can +// affect the AST. +// //===----------------------------------------------------------------------===// #ifndef CODEGENOPT # error Define the CODEGENOPT macro to handle language options @@ -27,16 +30,19 @@ CODEGENOPT(Name, Bits, Default) CODEGENOPT(Name, Bits, Default) #endif +#ifndef AFFECTING_VALUE_CODEGENOPT +# define AFFECTING_VALUE_CODEGENOPT(Name, Bits, Default) \ +VALUE_CODEGENOPT(Name, Bits, Default) +#endif + CODEGENOPT(DisableIntegratedAS, 1, 0) ///< -no-integrated-as -ENUM_CODEGENOPT(CompressDebugSections, llvm::DebugCompressionType, 2, - llvm::DebugCompressionType::None) -CODEGENOPT(RelaxELFRelocations, 1, 0) ///< -Wa,--mrelax-relocations +CODEGENOPT(RelaxELFRelocations, 1, 1) ///< -Wa,-mrelax-relocations={yes,no} CODEGENOPT(AsmVerbose , 1, 0) ///< -dA, -fverbose-asm. -CODEGENOPT(Dwarf64 , 1, 0) ///< -gdwarf64. -CODEGENOPT(Dwarf32 , 1, 1) ///< -gdwarf32. CODEGENOPT(PreserveAsmComments, 1, 1) ///< -dA, -fno-preserve-as-comments. CODEGENOPT(AssumeSaneOperatorNew , 1, 1) ///< implicit __attribute__((malloc)) operator new +CODEGENOPT(AssumeUniqueVTables , 1, 1) ///< Assume a class has only one vtable. CODEGENOPT(Autolink , 1, 1) ///< -fno-autolink +CODEGENOPT(AutoImport , 1, 1) ///< -fno-auto-import CODEGENOPT(ObjCAutoRefCountExceptions , 1, 0) ///< Whether ARC should be EH-safe. CODEGENOPT(Backchain , 1, 0) ///< -mbackchain CODEGENOPT(ControlFlowGuardNoChecks , 1, 0) ///< -cfguard-no-checks @@ -52,8 +58,10 @@ CODEGENOPT(UniqueBasicBlockSectionNames, 1, 1) ///< Set for -funique-basic-block ///< Produce unique section names with ///< basic block sections. CODEGENOPT(EnableAIXExtendedAltivecABI, 1, 0) ///< Set for -mabi=vec-extabi. Enables the extended Altivec ABI on AIX. +CODEGENOPT(XCOFFReadOnlyPointers, 1, 0) ///< Set for -mxcoff-roptr. ENUM_CODEGENOPT(FramePointer, FramePointerKind, 2, FramePointerKind::None) /// frame-pointer: all,non-leaf,none +CODEGENOPT(ClearASTBeforeBackend , 1, 0) ///< Free the AST before running backend code generation. Only works with -disable-free. CODEGENOPT(DisableFree , 1, 0) ///< Don't free memory. CODEGENOPT(DiscardValueNames , 1, 0) ///< Discard Value Names from the IR (LLVMContext flag) CODEGENOPT(DisableLLVMPasses , 1, 0) ///< Don't run any LLVM IR passes to get @@ -64,16 +72,11 @@ CODEGENOPT(DisableO0ImplyOptNone , 1, 0) ///< Don't annonate function with optno CODEGENOPT(ExperimentalStrictFloatingPoint, 1, 0) ///< Enables the new, experimental ///< strict floating point. CODEGENOPT(EnableNoundefAttrs, 1, 0) ///< Enable emitting `noundef` attributes on IR call arguments and return values -CODEGENOPT(LegacyPassManager, 1, 0) ///< Use the legacy pass manager. CODEGENOPT(DebugPassManager, 1, 0) ///< Prints debug information for the new ///< pass manager. CODEGENOPT(DisableRedZone , 1, 0) ///< Set when -mno-red-zone is enabled. CODEGENOPT(EmitCallSiteInfo, 1, 0) ///< Emit call site info only in the case of ///< '-g' + 'O>0' level. -CODEGENOPT(EnableDIPreservationVerify, 1, 0) ///< Enable di preservation verify - ///< each (it means check - ///< the original debug info - ///< metadata preservation). CODEGENOPT(IndirectTlsSegRefs, 1, 0) ///< Set when -mno-tls-direct-seg-refs ///< is specified. CODEGENOPT(DisableTailCalls , 1, 0) ///< Do not emit tail calls. @@ -84,13 +87,12 @@ CODEGENOPT(EmitDeclMetadata , 1, 0) ///< Emit special metadata indicating what ///< Only useful when running CodeGen as a ///< subroutine. CODEGENOPT(EmitVersionIdentMetadata , 1, 1) ///< Emit compiler version metadata. -CODEGENOPT(EmitGcovArcs , 1, 0) ///< Emit coverage data files, aka. GCDA. -CODEGENOPT(EmitGcovNotes , 1, 0) ///< Emit coverage "notes" files, aka GCNO. CODEGENOPT(EmitOpenCLArgMetadata , 1, 0) ///< Emit OpenCL kernel arg metadata. CODEGENOPT(EmulatedTLS , 1, 0) ///< Set by default or -f[no-]emulated-tls. -CODEGENOPT(ExplicitEmulatedTLS , 1, 0) ///< Set if -f[no-]emulated-tls is used. /// Embed Bitcode mode (off/all/bitcode/marker). ENUM_CODEGENOPT(EmbedBitcode, EmbedBitcodeKind, 2, Embed_Off) +/// Inline asm dialect, -masm=(att|intel) +ENUM_CODEGENOPT(InlineAsmDialect, InlineAsmDialectKind, 1, IAD_ATT) CODEGENOPT(ForbidGuardVariables , 1, 0) ///< Issue errors if C++ guard variables ///< are required. CODEGENOPT(FunctionSections , 1, 0) ///< Set when -ffunction-sections is enabled. @@ -104,11 +106,16 @@ CODEGENOPT(CFProtectionReturn , 1, 0) ///< if -fcf-protection is ///< set to full or return. CODEGENOPT(CFProtectionBranch , 1, 0) ///< if -fcf-protection is ///< set to full or branch. +CODEGENOPT(FunctionReturnThunks, 1, 0) ///< -mfunction-return={keep|thunk-extern} +CODEGENOPT(IndirectBranchCSPrefix, 1, 0) ///< if -mindirect-branch-cs-prefix + ///< is set. + CODEGENOPT(XRayInstrumentFunctions , 1, 0) ///< Set when -fxray-instrument is ///< enabled. CODEGENOPT(StackSizeSection , 1, 0) ///< Set when -fstack-size-section is enabled. -CODEGENOPT(ForceDwarfFrameSection , 1, 0) ///< Set when -fforce-dwarf-frame is - ///< enabled. + +///< Set when -femit-compact-unwind-non-canonical is enabled. +CODEGENOPT(EmitCompactUnwindNonCanonical, 1, 0) ///< Set when -fxray-always-emit-customevents is enabled. CODEGENOPT(XRayAlwaysEmitCustomEvents , 1, 0) @@ -119,8 +126,8 @@ CODEGENOPT(XRayAlwaysEmitTypedEvents , 1, 0) ///< Set when -fxray-ignore-loops is enabled. CODEGENOPT(XRayIgnoreLoops , 1, 0) -///< Set with -fno-xray-function-index to omit the index section. -CODEGENOPT(XRayOmitFunctionIndex , 1, 0) +///< Emit the XRay function index section. +CODEGENOPT(XRayFunctionIndex , 1, 1) ///< Set the minimum number of instructions in a function to determine selective @@ -136,6 +143,10 @@ VALUE_CODEGENOPT(XRaySelectedFunctionGroup, 32, 0) VALUE_CODEGENOPT(PatchableFunctionEntryCount , 32, 0) ///< Number of NOPs at function entry VALUE_CODEGENOPT(PatchableFunctionEntryOffset , 32, 0) +CODEGENOPT(HotPatch, 1, 0) ///< Supports the Microsoft /HOTPATCH flag and + ///< generates a 'patchable-function' attribute. + +CODEGENOPT(JMCInstrument, 1, 0) ///< Set when -fjmc is enabled. CODEGENOPT(InstrumentForProfiling , 1, 0) ///< Set when -pg is enabled. CODEGENOPT(CallFEntry , 1, 0) ///< Set when -mfentry is enabled. CODEGENOPT(MNopMCount , 1, 0) ///< Set when -mnop-mcount is enabled. @@ -149,58 +160,66 @@ CODEGENOPT(PrepareForThinLTO , 1, 0) ///< Set when -flto=thin is enabled on the ///< compile step. CODEGENOPT(LTOUnit, 1, 0) ///< Emit IR to support LTO unit features (CFI, whole ///< program vtable opt). +CODEGENOPT(FatLTO, 1, 0) ///< Set when -ffat-lto-objects is enabled. CODEGENOPT(EnableSplitLTOUnit, 1, 0) ///< Enable LTO unit splitting to support /// CFI and traditional whole program /// devirtualization that require whole /// program IR support. +CODEGENOPT(UnifiedLTO, 1, 0) ///< Use the unified LTO pipeline. CODEGENOPT(IncrementalLinkerCompatible, 1, 0) ///< Emit an object file which can ///< be used with an incremental ///< linker. CODEGENOPT(MergeAllConstants , 1, 1) ///< Merge identical constants. CODEGENOPT(MergeFunctions , 1, 0) ///< Set when -fmerge-functions is enabled. -CODEGENOPT(MSVolatile , 1, 0) ///< Set when /volatile:ms is enabled. CODEGENOPT(NoCommon , 1, 0) ///< Set when -fno-common or C++ is enabled. -CODEGENOPT(NoDwarfDirectoryAsm , 1, 0) ///< Set when -fno-dwarf-directory-asm is - ///< enabled. CODEGENOPT(NoExecStack , 1, 0) ///< Set when -Wa,--noexecstack is enabled. CODEGENOPT(FatalWarnings , 1, 0) ///< Set when -Wa,--fatal-warnings is ///< enabled. CODEGENOPT(NoWarn , 1, 0) ///< Set when -Wa,--no-warn is enabled. +CODEGENOPT(NoTypeCheck , 1, 0) ///< Set when -Wa,--no-type-check is enabled. +CODEGENOPT(MisExpect , 1, 0) ///< Set when -Wmisexpect is enabled CODEGENOPT(EnableSegmentedStacks , 1, 0) ///< Set when -fsplit-stack is enabled. -CODEGENOPT(NoInlineLineTables, 1, 0) ///< Whether debug info should contain - ///< inline line tables. CODEGENOPT(StackClashProtector, 1, 0) ///< Set when -fstack-clash-protection is enabled. CODEGENOPT(NoImplicitFloat , 1, 0) ///< Set when -mno-implicit-float is enabled. CODEGENOPT(NullPointerIsValid , 1, 0) ///< Assume Null pointer deference is defined. CODEGENOPT(OpenCLCorrectlyRoundedDivSqrt, 1, 0) ///< -cl-fp32-correctly-rounded-divide-sqrt CODEGENOPT(HIPCorrectlyRoundedDivSqrt, 1, 1) ///< -fno-hip-fp32-correctly-rounded-divide-sqrt +CODEGENOPT(HIPSaveKernelArgName, 1, 0) ///< Set when -fhip-kernel-arg-name is enabled. CODEGENOPT(UniqueInternalLinkageNames, 1, 0) ///< Internal Linkage symbols get unique names. CODEGENOPT(SplitMachineFunctions, 1, 0) ///< Split machine functions using profile information. +CODEGENOPT(PPCUseFullRegisterNames, 1, 0) ///< Print full register names in assembly /// When false, this attempts to generate code as if the result of an /// overflowing conversion matches the overflowing behavior of a target's native /// float-to-int conversion instructions. CODEGENOPT(StrictFloatCastOverflow, 1, 1) -CODEGENOPT(UniformWGSize , 1, 0) ///< -cl-uniform-work-group-size CODEGENOPT(NoZeroInitializedInBSS , 1, 0) ///< -fno-zero-initialized-in-bss. /// Method of Objective-C dispatch to use. ENUM_CODEGENOPT(ObjCDispatchMethod, ObjCDispatchMethodKind, 2, Legacy) /// Replace certain message sends with calls to ObjC runtime entrypoints CODEGENOPT(ObjCConvertMessagesToRuntimeCalls , 1, 1) +CODEGENOPT(ObjCAvoidHeapifyLocalBlocks, 1, 0) -VALUE_CODEGENOPT(OptimizationLevel, 2, 0) ///< The -O[0-3] option specified. -VALUE_CODEGENOPT(OptimizeSize, 2, 0) ///< If -Os (==1) or -Oz (==2) is specified. + +// The optimization options affect frontend options, whicn in turn do affect the AST. +AFFECTING_VALUE_CODEGENOPT(OptimizationLevel, 2, 0) ///< The -O[0-3] option specified. +AFFECTING_VALUE_CODEGENOPT(OptimizeSize, 2, 0) ///< If -Os (==1) or -Oz (==2) is specified. CODEGENOPT(AtomicProfileUpdate , 1, 0) ///< Set -fprofile-update=atomic /// Choose profile instrumenation kind or no instrumentation. ENUM_CODEGENOPT(ProfileInstr, ProfileInstrKind, 2, ProfileNone) /// Choose profile kind for PGO use compilation. ENUM_CODEGENOPT(ProfileUse, ProfileInstrKind, 2, ProfileNone) +/// Partition functions into N groups and select only functions in group i to be +/// instrumented. Selected group numbers can be 0 to N-1 inclusive. +VALUE_CODEGENOPT(ProfileTotalFunctionGroups, 32, 1) +VALUE_CODEGENOPT(ProfileSelectedFunctionGroup, 32, 0) CODEGENOPT(CoverageMapping , 1, 0) ///< Generate coverage mapping regions to ///< enable code coverage analysis. CODEGENOPT(DumpCoverageMapping , 1, 0) ///< Dump the generated coverage mapping ///< regions. +CODEGENOPT(MCDCCoverage , 1, 0) ///< Enable MC/DC code coverage criteria. /// If -fpcc-struct-return or -freg-struct-return is specified. ENUM_CODEGENOPT(StructReturnConvention, StructReturnConventionKind, 2, SRCK_Default) @@ -227,6 +246,9 @@ CODEGENOPT(SanitizeMemoryTrackOrigins, 2, 0) ///< Enable tracking origins in ENUM_CODEGENOPT(SanitizeAddressDtor, llvm::AsanDtorKind, 2, llvm::AsanDtorKind::Global) ///< Set how ASan global ///< destructors are emitted. +CODEGENOPT(SanitizeMemoryParamRetval, 1, 0) ///< Enable detection of uninitialized + ///< parameters and return values + ///< in MemorySanitizer CODEGENOPT(SanitizeMemoryUseAfterDtor, 1, 0) ///< Enable use-after-delete detection ///< in MemorySanitizer CODEGENOPT(SanitizeCfiCrossDso, 1, 0) ///< Enable cross-dso support in CFI. @@ -234,6 +256,8 @@ CODEGENOPT(SanitizeMinimalRuntime, 1, 0) ///< Use "_minimal" sanitizer runtime f ///< diagnostics. CODEGENOPT(SanitizeCfiICallGeneralizePointers, 1, 0) ///< Generalize pointer types in ///< CFI icall function signatures +CODEGENOPT(SanitizeCfiICallNormalizeIntegers, 1, 0) ///< Normalize integer types in + ///< CFI icall function signatures CODEGENOPT(SanitizeCfiCanonicalJumpTables, 1, 0) ///< Make jump table symbols canonical ///< instead of creating a local jump table. CODEGENOPT(SanitizeCoverageType, 2, 0) ///< Type of sanitizer coverage @@ -257,8 +281,15 @@ CODEGENOPT(SanitizeCoverageTracePCGuard, 1, 0) ///< Enable PC tracing with guard CODEGENOPT(SanitizeCoverageInline8bitCounters, 1, 0) ///< Use inline 8bit counters. CODEGENOPT(SanitizeCoverageInlineBoolFlag, 1, 0) ///< Use inline bool flag. CODEGENOPT(SanitizeCoveragePCTable, 1, 0) ///< Create a PC Table. +CODEGENOPT(SanitizeCoverageControlFlow, 1, 0) ///< Collect control flow CODEGENOPT(SanitizeCoverageNoPrune, 1, 0) ///< Disable coverage pruning. CODEGENOPT(SanitizeCoverageStackDepth, 1, 0) ///< Enable max stack depth tracing +CODEGENOPT(SanitizeCoverageTraceLoads, 1, 0) ///< Enable tracing of loads. +CODEGENOPT(SanitizeCoverageTraceStores, 1, 0) ///< Enable tracing of stores. +CODEGENOPT(SanitizeBinaryMetadataCovered, 1, 0) ///< Emit PCs for covered functions. +CODEGENOPT(SanitizeBinaryMetadataAtomics, 1, 0) ///< Emit PCs for atomic operations. +CODEGENOPT(SanitizeBinaryMetadataUAR, 1, 0) ///< Emit PCs for start of functions + ///< that are subject for use-after-return checking. CODEGENOPT(SanitizeStats , 1, 0) ///< Collect statistics for sanitizers. CODEGENOPT(SimplifyLibCalls , 1, 1) ///< Set when -fbuiltin is enabled. CODEGENOPT(SoftFloat , 1, 0) ///< -soft-float. @@ -274,7 +305,7 @@ VALUE_CODEGENOPT(TimeTraceGranularity, 32, 500) ///< Minimum time granularity (i CODEGENOPT(UnrollLoops , 1, 0) ///< Control whether loops are unrolled. CODEGENOPT(RerollLoops , 1, 0) ///< Control whether loops are rerolled. CODEGENOPT(NoUseJumpTables , 1, 0) ///< Set when -fno-jump-tables is enabled. -CODEGENOPT(UnwindTables , 1, 0) ///< Emit unwind tables. +VALUE_CODEGENOPT(UnwindTables, 2, 0) ///< Unwind tables (1) or asynchronous unwind tables (2) CODEGENOPT(VectorizeLoop , 1, 0) ///< Run loop vectorizer. CODEGENOPT(VectorizeSLP , 1, 0) ///< Run SLP vectorizer. CODEGENOPT(ProfileSampleAccurate, 1, 0) ///< Sample profile is accurate. @@ -288,35 +319,21 @@ CODEGENOPT(UseRegisterSizedBitfieldAccess , 1, 0) CODEGENOPT(VerifyModule , 1, 1) ///< Control whether the module should be run ///< through the LLVM Verifier. +CODEGENOPT(VerifyEach , 1, 1) ///< Control whether the LLVM verifier + ///< should run after every pass. CODEGENOPT(StackRealignment , 1, 0) ///< Control whether to force stack ///< realignment. CODEGENOPT(UseInitArray , 1, 0) ///< Control whether to use .init_array or ///< .ctors. +VALUE_CODEGENOPT(LoopAlignment , 32, 0) ///< Overrides default loop + ///< alignment, if not 0. VALUE_CODEGENOPT(StackAlignment , 32, 0) ///< Overrides default stack ///< alignment, if not 0. VALUE_CODEGENOPT(StackProbeSize , 32, 4096) ///< Overrides default stack ///< probe size, even if 0. VALUE_CODEGENOPT(WarnStackSize , 32, UINT_MAX) ///< Set via -fwarn-stack-size. CODEGENOPT(NoStackArgProbe, 1, 0) ///< Set when -mno-stack-arg-probe is used -CODEGENOPT(DebugStrictDwarf, 1, 1) ///< Whether or not to use strict DWARF info. -CODEGENOPT(DebugColumnInfo, 1, 0) ///< Whether or not to use column information - ///< in debug info. - -CODEGENOPT(DebugTypeExtRefs, 1, 0) ///< Whether or not debug info should contain - ///< external references to a PCH or module. - -CODEGENOPT(DebugExplicitImport, 1, 0) ///< Whether or not debug info should - ///< contain explicit imports for - ///< anonymous namespaces - -CODEGENOPT(SplitDwarfInlining, 1, 1) ///< Whether to include inlining info in the - ///< skeleton CU to allow for symbolication - ///< of inline stack frames without .dwo files. -CODEGENOPT(DebugFwdTemplateParams, 1, 0) ///< Whether to emit complete - ///< template parameter descriptions in - ///< forward declarations (versus just - ///< including them in the name). CODEGENOPT(EmitLLVMUseLists, 1, 0) ///< Control whether to serialize use-lists. CODEGENOPT(WholeProgramVTables, 1, 0) ///< Whether to apply whole-program @@ -340,39 +357,21 @@ VALUE_CODEGENOPT(SmallDataLimit, 32, 0) /// The lower bound for a buffer to be considered for stack protection. VALUE_CODEGENOPT(SSPBufferSize, 32, 0) -/// The kind of generated debug info. -ENUM_CODEGENOPT(DebugInfo, codegenoptions::DebugInfoKind, 4, codegenoptions::NoDebugInfo) - -/// Whether to generate macro debug info. -CODEGENOPT(MacroDebugInfo, 1, 0) - -/// Tune the debug info for this debugger. -ENUM_CODEGENOPT(DebuggerTuning, llvm::DebuggerKind, 3, - llvm::DebuggerKind::Default) - -/// Dwarf version. Version zero indicates to LLVM that no DWARF should be -/// emitted. -VALUE_CODEGENOPT(DwarfVersion, 3, 0) - -/// Whether to use experimental new variable location tracking. -CODEGENOPT(ValueTrackingVariableLocations, 1, 0) - -/// Whether we should emit CodeView debug information. It's possible to emit -/// CodeView and DWARF into the same object. -CODEGENOPT(EmitCodeView, 1, 0) - -/// Whether to emit the .debug$H section containing hashes of CodeView types. -CODEGENOPT(CodeViewGHash, 1, 0) - /// The kind of inlining to perform. ENUM_CODEGENOPT(Inlining, InliningMethod, 2, NormalInlining) +/// The maximum stack size a function can have to be considered for inlining. +VALUE_CODEGENOPT(InlineMaxStackSize, 32, UINT_MAX) + // Vector functions library to use. -ENUM_CODEGENOPT(VecLib, VectorLibrary, 3, NoLibrary) +ENUM_CODEGENOPT(VecLib, llvm::driver::VectorLibrary, 3, llvm::driver::VectorLibrary::NoLibrary) /// The default TLS model to use. ENUM_CODEGENOPT(DefaultTLSModel, TLSModel, 2, GeneralDynamicTLSModel) +/// Whether to enable TLSDESC. AArch64 enables TLSDESC regardless of this value. +CODEGENOPT(EnableTLSDESC, 1, 0) + /// Bit size of immediate TLS offsets (0 == use the default). VALUE_CODEGENOPT(TLSSize, 8, 0) @@ -393,26 +392,14 @@ CODEGENOPT(DirectAccessExternalData, 1, 0) /// paths that reach the end of a function without executing a required return. CODEGENOPT(StrictReturn, 1, 1) -/// Whether emit extra debug info for sample pgo profile collection. -CODEGENOPT(DebugInfoForProfiling, 1, 0) - /// Whether emit pseudo probes for sample pgo profile collection. CODEGENOPT(PseudoProbeForProfiling, 1, 0) /// Whether 3-component vector type is preserved. CODEGENOPT(PreserveVec3Type, 1, 0) -/// Whether to emit .debug_gnu_pubnames section instead of .debug_pubnames. -CODEGENOPT(DebugNameTable, 2, 0) - -/// Whether to use DWARF base address specifiers in .debug_ranges. -CODEGENOPT(DebugRangesBaseAddress, 1, 0) - CODEGENOPT(NoPLT, 1, 0) -/// Whether to embed source in DWARF debug line section. -CODEGENOPT(EmbedSource, 1, 0) - /// Whether to emit all vtables CODEGENOPT(ForceEmitVTables, 1, 0) @@ -422,6 +409,10 @@ CODEGENOPT(Addrsig, 1, 0) /// Whether to emit unused static constants. CODEGENOPT(KeepStaticConsts, 1, 0) +/// Whether to emit all variables that have a persistent storage duration, +/// including global, static and thread local variables. +CODEGENOPT(KeepPersistentStorageVariables, 1, 0) + /// Whether to follow the AAPCS enforcing at least one read before storing to a volatile bitfield CODEGENOPT(ForceAAPCSBitfieldLoad, 1, 0) @@ -437,6 +428,26 @@ CODEGENOPT(AAPCSBitfieldWidth, 1, 1) /// propagate signaling NaN inputs per IEEE 754-2008 (AMDGPU Only) CODEGENOPT(EmitIEEENaNCompliantInsts, 1, 1) +// Whether to emit Swift Async function extended frame information: auto, +// never, always. +ENUM_CODEGENOPT(SwiftAsyncFramePointer, SwiftAsyncFramePointerKind, 2, + SwiftAsyncFramePointerKind::Always) + +/// Whether to skip RAX setup when passing variable arguments (x86 only). +CODEGENOPT(SkipRaxSetup, 1, 0) + +/// Whether to zero out caller-used registers before returning. +ENUM_CODEGENOPT(ZeroCallUsedRegs, llvm::ZeroCallUsedRegs::ZeroCallUsedRegsKind, + 5, llvm::ZeroCallUsedRegs::ZeroCallUsedRegsKind::Skip) + +/// Modify C++ ABI to returning `this` pointer from constructors and +/// non-deleting destructors. (No effect on Microsoft ABI.) +CODEGENOPT(CtorDtorReturnThis, 1, 0) + +/// FIXME: Make DebugOptions its own top-level .def file. +#include "DebugOptions.def" + #undef CODEGENOPT #undef ENUM_CODEGENOPT #undef VALUE_CODEGENOPT +#undef AFFECTING_VALUE_CODEGENOPT diff --git a/contrib/llvm-project/clang/include/clang/Basic/CodeGenOptions.h b/contrib/llvm-project/clang/include/clang/Basic/CodeGenOptions.h index 617c255641ef..3f8fe385fef3 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/CodeGenOptions.h +++ b/contrib/llvm-project/clang/include/clang/Basic/CodeGenOptions.h @@ -13,10 +13,11 @@ #ifndef LLVM_CLANG_BASIC_CODEGENOPTIONS_H #define LLVM_CLANG_BASIC_CODEGENOPTIONS_H -#include "clang/Basic/DebugInfoOptions.h" #include "clang/Basic/Sanitizers.h" #include "clang/Basic/XRayInstr.h" #include "llvm/ADT/FloatingPointMode.h" +#include "llvm/Frontend/Debug/Options.h" +#include "llvm/Frontend/Driver/CodeGenOptions.h" #include "llvm/Support/CodeGen.h" #include "llvm/Support/Regex.h" #include "llvm/Target/TargetOptions.h" @@ -26,12 +27,16 @@ #include <string> #include <vector> +namespace llvm { +class PassBuilder; +} namespace clang { /// Bitfields of CodeGenOptions, split out from CodeGenOptions to ensure /// that this large collection of bitfields is a trivial class type. class CodeGenOptionsBase { friend class CompilerInvocation; + friend class CompilerInvocationBase; public: #define CODEGENOPT(Name, Bits, Default) unsigned Name : Bits; @@ -54,15 +59,6 @@ public: OnlyAlwaysInlining // Only run the always inlining pass. }; - enum VectorLibrary { - NoLibrary, // Don't use any vector library. - Accelerate, // Use the Accelerate framework. - LIBMVEC, // GLIBC vector math library. - MASSV, // IBM MASS vector library. - SVML, // Intel short vector math library. - Darwin_libsystem_m // Use Darwin's libsytem_m vector functions. - }; - enum ObjCDispatchMethodKind { Legacy = 0, NonLegacy = 1, @@ -97,6 +93,17 @@ public: Embed_Marker // Embed a marker as a placeholder for bitcode. }; + enum InlineAsmDialectKind { + IAD_ATT, + IAD_Intel, + }; + + enum DebugSrcHashKind { + DSH_MD5, + DSH_SHA1, + DSH_SHA256, + }; + // This field stores one of the allowed values for the option // -fbasic-block-sections=. The allowed values with this option are: // {"labels", "all", "list=<file>", "none"}. @@ -125,15 +132,45 @@ public: All, // Keep all frame pointers. }; + static StringRef getFramePointerKindName(FramePointerKind Kind) { + switch (Kind) { + case FramePointerKind::None: + return "none"; + case FramePointerKind::NonLeaf: + return "non-leaf"; + case FramePointerKind::All: + return "all"; + } + + llvm_unreachable("invalid FramePointerKind"); + } + + enum class SwiftAsyncFramePointerKind { + Auto, // Choose Swift async extended frame info based on deployment target. + Always, // Unconditionally emit Swift async extended frame info. + Never, // Don't emit Swift async extended frame info. + Default = Always, + }; + enum FiniteLoopsKind { Language, // Not specified, use language standard. Always, // All loops are assumed to be finite. Never, // No loop is assumed to be finite. }; + enum AssignmentTrackingOpts { + Disabled, + Enabled, + Forced, + }; + /// The code model to use (-mcmodel). std::string CodeModel; + /// The code model-specific large data threshold to use + /// (-mlarge-data-threshold). + uint64_t LargeDataThreshold; + /// The filename with path we use for coverage data files. The runtime /// allows further manipulation with the GCOV_PREFIX and GCOV_PREFIX_STRIP /// environment variables. @@ -168,8 +205,11 @@ public: /// if non-empty. std::string RecordCommandLine; - std::map<std::string, std::string> DebugPrefixMap; - std::map<std::string, std::string> CoveragePrefixMap; + llvm::SmallVector<std::pair<std::string, std::string>, 0> DebugPrefixMap; + + /// Prefix replacement map for source-based code coverage to remap source + /// file paths in coverage mapping. + llvm::SmallVector<std::pair<std::string, std::string>, 0> CoveragePrefixMap; /// The ABI to use for passing floating point arguments. std::string FloatABI; @@ -215,6 +255,9 @@ public: /// Output filename for the split debug info, not used in the skeleton CU. std::string SplitDwarfOutput; + /// Output filename used in the COFF debug information. + std::string ObjectFilenameForDebug; + /// The name of the relocation model to use. llvm::Reloc::Model RelocationModel; @@ -238,6 +281,9 @@ public: /// Name of the profile file to use as output for with -fmemory-profile. std::string MemoryProfileOutput; + /// Name of the profile file to use as input for -fmemory-profile-use. + std::string MemoryProfileUsePath; + /// Name of the profile file to use as input for -fprofile-instr-use std::string ProfileInstrumentUsePath; @@ -261,6 +307,10 @@ public: /// CUDA runtime back-end for incorporating them into host-side object file. std::string CudaGpuBinaryFileName; + /// List of filenames passed in using the -fembed-offload-object option. These + /// are offloading binaries containing device images and metadata. + std::vector<std::string> OffloadObjects; + /// The name of the file to which the backend should save YAML optimization /// records. std::string OptRecordFile; @@ -287,12 +337,12 @@ public: /// Optimization remark with an optional regular expression pattern. struct OptRemark { - RemarkKind Kind; + RemarkKind Kind = RK_Missing; std::string Pattern; std::shared_ptr<llvm::Regex> Regex; /// By default, optimization remark is missing. - OptRemark() : Kind(RK_Missing), Pattern(""), Regex(nullptr) {} + OptRemark() = default; /// Returns true iff the optimization remark holds a valid regular /// expression. @@ -323,9 +373,6 @@ public: /// transformation. OptRemark OptimizationRemarkAnalysis; - /// Set of files defining the rules for the symbol rewriting. - std::vector<std::string> RewriteMapFiles; - /// Set of sanitizer checks that are non-fatal (i.e. execution should be /// continued when possible). SanitizerSet SanitizeRecover; @@ -354,6 +401,9 @@ public: /// List of dynamic shared object files to be loaded as pass plugins. std::vector<std::string> PassPlugins; + /// List of pass builder callbacks. + std::vector<std::function<void(llvm::PassBuilder &)>> PassBuilderCallbacks; + /// Path to allowlist file specifying which objects /// (files, functions) should exclusively be instrumented /// by sanitizer coverage pass. @@ -370,11 +420,19 @@ public: /// On AArch64 this can only be "sp_el0". std::string StackProtectorGuardReg; + /// Specify a symbol to be the guard value. + std::string StackProtectorGuardSymbol; + /// Path to ignorelist file specifying which objects /// (files, functions) listed for instrumentation by sanitizer /// coverage pass should actually not be instrumented. std::vector<std::string> SanitizeCoverageIgnorelistFiles; + /// Path to ignorelist file specifying which objects + /// (files, functions) listed for instrumentation by sanitizer + /// binary metadata pass should not be instrumented. + std::vector<std::string> SanitizeMetadataIgnorelistFiles; + /// Name of the stack usage file (i.e., .su file) if user passes /// -fstack-usage. If empty, it can be implied that -fstack-usage is not /// passed on the command line. @@ -383,7 +441,7 @@ public: /// Executable and command-line used to create a given CompilerInvocation. /// Most of the time this will be the full -cc1 command. const char *Argv0 = nullptr; - ArrayRef<const char *> CommandLineArgs; + std::vector<std::string> CommandLineArgs; /// The minimum hotness value a diagnostic needs in order to be included in /// optimization diagnostics. @@ -398,7 +456,14 @@ public: /// compilation. /// /// If threshold option is not specified, it is disabled by default. - Optional<uint64_t> DiagnosticsHotnessThreshold = 0; + std::optional<uint64_t> DiagnosticsHotnessThreshold = 0; + + /// The maximum percentage profiling weights can deviate from the expected + /// values in order to be included in misexpect diagnostics. + std::optional<uint32_t> DiagnosticsMisExpectTolerance = 0; + + /// The name of a file to use with \c .secure_log_unique directives. + std::string AsSecureLogFile; public: // Define accessors/mutators for code generation options of enumeration type. @@ -429,6 +494,9 @@ public: return getProfileInstr() == ProfileCSIRInstr; } + /// Check if any form of instrumentation is on. + bool hasProfileInstr() const { return getProfileInstr() != ProfileNone; } + /// Check if Clang profile use is on. bool hasProfileClangUse() const { return getProfileUse() == ProfileClangInstr; @@ -445,19 +513,30 @@ public: /// Check if type and variable info should be emitted. bool hasReducedDebugInfo() const { - return getDebugInfo() >= codegenoptions::DebugInfoConstructor; + return getDebugInfo() >= llvm::codegenoptions::DebugInfoConstructor; } /// Check if maybe unused type info should be emitted. bool hasMaybeUnusedDebugInfo() const { - return getDebugInfo() >= codegenoptions::UnusedTypeInfo; + return getDebugInfo() >= llvm::codegenoptions::UnusedTypeInfo; } // Check if any one of SanitizeCoverage* is enabled. bool hasSanitizeCoverage() const { return SanitizeCoverageType || SanitizeCoverageIndirectCalls || - SanitizeCoverageTraceCmp; + SanitizeCoverageTraceCmp || SanitizeCoverageTraceLoads || + SanitizeCoverageTraceStores || SanitizeCoverageControlFlow; } + + // Check if any one of SanitizeBinaryMetadata* is enabled. + bool hasSanitizeBinaryMetadata() const { + return SanitizeBinaryMetadataCovered || SanitizeBinaryMetadataAtomics || + SanitizeBinaryMetadataUAR; + } + + /// Reset all of the options that are not considered when building a + /// module. + void resetNonModularOptions(StringRef ModuleFormat); }; } // end namespace clang diff --git a/contrib/llvm-project/clang/include/clang/Basic/Cuda.h b/contrib/llvm-project/clang/include/clang/Basic/Cuda.h index aa12724cbf0c..916cb4b7ef34 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Cuda.h +++ b/contrib/llvm-project/clang/include/clang/Basic/Cuda.h @@ -31,8 +31,20 @@ enum class CudaVersion { CUDA_110, CUDA_111, CUDA_112, - LATEST = CUDA_112, - LATEST_SUPPORTED = CUDA_101, + CUDA_113, + CUDA_114, + CUDA_115, + CUDA_116, + CUDA_117, + CUDA_118, + CUDA_120, + CUDA_121, + CUDA_122, + CUDA_123, + FULLY_SUPPORTED = CUDA_123, + PARTIALLY_SUPPORTED = + CUDA_123, // Partially supported. Proceed with a warning. + NEW = 10000, // Too new. Issue a warning, but allow using it. }; const char *CudaVersionToString(CudaVersion V); // Input is "Major.Minor" @@ -58,6 +70,10 @@ enum class CudaArch { SM_75, SM_80, SM_86, + SM_87, + SM_89, + SM_90, + SM_90a, GFX600, GFX601, GFX602, @@ -80,6 +96,9 @@ enum class CudaArch { GFX909, GFX90a, GFX90c, + GFX940, + GFX941, + GFX942, GFX1010, GFX1011, GFX1012, @@ -90,7 +109,21 @@ enum class CudaArch { GFX1033, GFX1034, GFX1035, + GFX1036, + GFX1100, + GFX1101, + GFX1102, + GFX1103, + GFX1150, + GFX1151, + GFX1200, + GFX1201, + Generic, // A processor model named 'generic' if the target backend defines a + // public one. LAST, + + CudaDefault = CudaArch::SM_52, + HIPDefault = CudaArch::GFX803, }; static inline bool IsNVIDIAGpuArch(CudaArch A) { @@ -98,7 +131,8 @@ static inline bool IsNVIDIAGpuArch(CudaArch A) { } static inline bool IsAMDGpuArch(CudaArch A) { - return A >= CudaArch::GFX600 && A < CudaArch::LAST; + // Generic processor model is for testing only. + return A >= CudaArch::GFX600 && A < CudaArch::Generic; } const char *CudaArchToString(CudaArch A); diff --git a/contrib/llvm-project/clang/include/clang/Basic/CustomizableOptional.h b/contrib/llvm-project/clang/include/clang/Basic/CustomizableOptional.h new file mode 100644 index 000000000000..84d40025ee41 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/CustomizableOptional.h @@ -0,0 +1,280 @@ +//===- CustomizableOptional.h - Optional with custom storage ----*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef CLANG_BASIC_CUSTOMIZABLEOPTIONAL_H +#define CLANG_BASIC_CUSTOMIZABLEOPTIONAL_H + +#include "llvm/ADT/Hashing.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/type_traits.h" +#include <cassert> +#include <new> +#include <optional> +#include <utility> + +namespace clang { + +namespace optional_detail { +template <typename> class OptionalStorage; +} // namespace optional_detail + +// Optional type which internal storage can be specialized by providing +// OptionalStorage. The interface follows std::optional. +template <typename T> class CustomizableOptional { + optional_detail::OptionalStorage<T> Storage; + +public: + using value_type = T; + + constexpr CustomizableOptional() = default; + constexpr CustomizableOptional(std::nullopt_t) {} + + constexpr CustomizableOptional(const T &y) : Storage(std::in_place, y) {} + constexpr CustomizableOptional(const CustomizableOptional &O) = default; + + constexpr CustomizableOptional(T &&y) + : Storage(std::in_place, std::move(y)) {} + constexpr CustomizableOptional(CustomizableOptional &&O) = default; + + template <typename... ArgTypes> + constexpr CustomizableOptional(std::in_place_t, ArgTypes &&...Args) + : Storage(std::in_place, std::forward<ArgTypes>(Args)...) {} + + // Allow conversion from std::optional<T>. + constexpr CustomizableOptional(const std::optional<T> &y) + : CustomizableOptional(y ? *y : CustomizableOptional()) {} + constexpr CustomizableOptional(std::optional<T> &&y) + : CustomizableOptional(y ? std::move(*y) : CustomizableOptional()) {} + + CustomizableOptional &operator=(T &&y) { + Storage = std::move(y); + return *this; + } + CustomizableOptional &operator=(CustomizableOptional &&O) = default; + + /// Create a new object by constructing it in place with the given arguments. + template <typename... ArgTypes> void emplace(ArgTypes &&...Args) { + Storage.emplace(std::forward<ArgTypes>(Args)...); + } + + CustomizableOptional &operator=(const T &y) { + Storage = y; + return *this; + } + CustomizableOptional &operator=(const CustomizableOptional &O) = default; + + void reset() { Storage.reset(); } + + LLVM_DEPRECATED("Use &*X instead.", "&*X") + constexpr const T *getPointer() const { return &Storage.value(); } + LLVM_DEPRECATED("Use &*X instead.", "&*X") + T *getPointer() { return &Storage.value(); } + LLVM_DEPRECATED("std::optional::value is throwing. Use *X instead", "*X") + constexpr const T &value() const & { return Storage.value(); } + LLVM_DEPRECATED("std::optional::value is throwing. Use *X instead", "*X") + T &value() & { return Storage.value(); } + + constexpr explicit operator bool() const { return has_value(); } + constexpr bool has_value() const { return Storage.has_value(); } + constexpr const T *operator->() const { return &Storage.value(); } + T *operator->() { return &Storage.value(); } + constexpr const T &operator*() const & { return Storage.value(); } + T &operator*() & { return Storage.value(); } + + template <typename U> constexpr T value_or(U &&alt) const & { + return has_value() ? operator*() : std::forward<U>(alt); + } + + LLVM_DEPRECATED("std::optional::value is throwing. Use *X instead", "*X") + T &&value() && { return std::move(Storage.value()); } + T &&operator*() && { return std::move(Storage.value()); } + + template <typename U> T value_or(U &&alt) && { + return has_value() ? std::move(operator*()) : std::forward<U>(alt); + } + + // Allow conversion to std::optional<T>. + explicit operator std::optional<T> &() const & { + return *this ? **this : std::optional<T>(); + } + explicit operator std::optional<T> &&() const && { + return *this ? std::move(**this) : std::optional<T>(); + } +}; + +template <typename T> +CustomizableOptional(const T &) -> CustomizableOptional<T>; + +template <class T> +llvm::hash_code hash_value(const CustomizableOptional<T> &O) { + return O ? llvm::hash_combine(true, *O) : llvm::hash_value(false); +} + +template <typename T, typename U> +constexpr bool operator==(const CustomizableOptional<T> &X, + const CustomizableOptional<U> &Y) { + if (X && Y) + return *X == *Y; + return X.has_value() == Y.has_value(); +} + +template <typename T, typename U> +constexpr bool operator!=(const CustomizableOptional<T> &X, + const CustomizableOptional<U> &Y) { + return !(X == Y); +} + +template <typename T, typename U> +constexpr bool operator<(const CustomizableOptional<T> &X, + const CustomizableOptional<U> &Y) { + if (X && Y) + return *X < *Y; + return X.has_value() < Y.has_value(); +} + +template <typename T, typename U> +constexpr bool operator<=(const CustomizableOptional<T> &X, + const CustomizableOptional<U> &Y) { + return !(Y < X); +} + +template <typename T, typename U> +constexpr bool operator>(const CustomizableOptional<T> &X, + const CustomizableOptional<U> &Y) { + return Y < X; +} + +template <typename T, typename U> +constexpr bool operator>=(const CustomizableOptional<T> &X, + const CustomizableOptional<U> &Y) { + return !(X < Y); +} + +template <typename T> +constexpr bool operator==(const CustomizableOptional<T> &X, std::nullopt_t) { + return !X; +} + +template <typename T> +constexpr bool operator==(std::nullopt_t, const CustomizableOptional<T> &X) { + return X == std::nullopt; +} + +template <typename T> +constexpr bool operator!=(const CustomizableOptional<T> &X, std::nullopt_t) { + return !(X == std::nullopt); +} + +template <typename T> +constexpr bool operator!=(std::nullopt_t, const CustomizableOptional<T> &X) { + return X != std::nullopt; +} + +template <typename T> +constexpr bool operator<(const CustomizableOptional<T> &, std::nullopt_t) { + return false; +} + +template <typename T> +constexpr bool operator<(std::nullopt_t, const CustomizableOptional<T> &X) { + return X.has_value(); +} + +template <typename T> +constexpr bool operator<=(const CustomizableOptional<T> &X, std::nullopt_t) { + return !(std::nullopt < X); +} + +template <typename T> +constexpr bool operator<=(std::nullopt_t, const CustomizableOptional<T> &X) { + return !(X < std::nullopt); +} + +template <typename T> +constexpr bool operator>(const CustomizableOptional<T> &X, std::nullopt_t) { + return std::nullopt < X; +} + +template <typename T> +constexpr bool operator>(std::nullopt_t, const CustomizableOptional<T> &X) { + return X < std::nullopt; +} + +template <typename T> +constexpr bool operator>=(const CustomizableOptional<T> &X, std::nullopt_t) { + return std::nullopt <= X; +} + +template <typename T> +constexpr bool operator>=(std::nullopt_t, const CustomizableOptional<T> &X) { + return X <= std::nullopt; +} + +template <typename T> +constexpr bool operator==(const CustomizableOptional<T> &X, const T &Y) { + return X && *X == Y; +} + +template <typename T> +constexpr bool operator==(const T &X, const CustomizableOptional<T> &Y) { + return Y && X == *Y; +} + +template <typename T> +constexpr bool operator!=(const CustomizableOptional<T> &X, const T &Y) { + return !(X == Y); +} + +template <typename T> +constexpr bool operator!=(const T &X, const CustomizableOptional<T> &Y) { + return !(X == Y); +} + +template <typename T> +constexpr bool operator<(const CustomizableOptional<T> &X, const T &Y) { + return !X || *X < Y; +} + +template <typename T> +constexpr bool operator<(const T &X, const CustomizableOptional<T> &Y) { + return Y && X < *Y; +} + +template <typename T> +constexpr bool operator<=(const CustomizableOptional<T> &X, const T &Y) { + return !(Y < X); +} + +template <typename T> +constexpr bool operator<=(const T &X, const CustomizableOptional<T> &Y) { + return !(Y < X); +} + +template <typename T> +constexpr bool operator>(const CustomizableOptional<T> &X, const T &Y) { + return Y < X; +} + +template <typename T> +constexpr bool operator>(const T &X, const CustomizableOptional<T> &Y) { + return Y < X; +} + +template <typename T> +constexpr bool operator>=(const CustomizableOptional<T> &X, const T &Y) { + return !(X < Y); +} + +template <typename T> +constexpr bool operator>=(const T &X, const CustomizableOptional<T> &Y) { + return !(X < Y); +} + +} // namespace clang + +#endif // CLANG_BASIC_CUSTOMIZABLEOPTIONAL_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/DarwinSDKInfo.h b/contrib/llvm-project/clang/include/clang/Basic/DarwinSDKInfo.h index 918dc7c8becc..dedfbd934a7b 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DarwinSDKInfo.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DarwinSDKInfo.h @@ -6,15 +6,16 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_CLANG_BASIC_DARWIN_SDK_INFO_H -#define LLVM_CLANG_BASIC_DARWIN_SDK_INFO_H +#ifndef LLVM_CLANG_BASIC_DARWINSDKINFO_H +#define LLVM_CLANG_BASIC_DARWINSDKINFO_H #include "clang/Basic/LLVM.h" #include "llvm/ADT/DenseMap.h" -#include "llvm/ADT/Triple.h" #include "llvm/Support/Error.h" #include "llvm/Support/VersionTuple.h" #include "llvm/Support/VirtualFileSystem.h" +#include "llvm/TargetParser/Triple.h" +#include <optional> namespace llvm { namespace json { @@ -57,6 +58,20 @@ public: llvm::Triple::MacOSX, llvm::Triple::UnknownEnvironment); } + /// Returns the os-environment mapping pair that's used to represent the + /// iOS -> watchOS version mapping. + static inline constexpr OSEnvPair iOStoWatchOSPair() { + return OSEnvPair(llvm::Triple::IOS, llvm::Triple::UnknownEnvironment, + llvm::Triple::WatchOS, llvm::Triple::UnknownEnvironment); + } + + /// Returns the os-environment mapping pair that's used to represent the + /// iOS -> tvOS version mapping. + static inline constexpr OSEnvPair iOStoTvOSPair() { + return OSEnvPair(llvm::Triple::IOS, llvm::Triple::UnknownEnvironment, + llvm::Triple::TvOS, llvm::Triple::UnknownEnvironment); + } + private: StorageType Value; @@ -85,12 +100,12 @@ public: /// Returns the mapped key, or the appropriate Minimum / MaximumValue if /// they key is outside of the mapping bounds. If they key isn't mapped, but - /// within the minimum and maximum bounds, None is returned. - Optional<VersionTuple> map(const VersionTuple &Key, - const VersionTuple &MinimumValue, - Optional<VersionTuple> MaximumValue) const; + /// within the minimum and maximum bounds, std::nullopt is returned. + std::optional<VersionTuple> + map(const VersionTuple &Key, const VersionTuple &MinimumValue, + std::optional<VersionTuple> MaximumValue) const; - static Optional<RelatedTargetVersionMapping> + static std::optional<RelatedTargetVersionMapping> parseJSON(const llvm::json::Object &Obj, VersionTuple MaximumDeploymentTarget); @@ -102,12 +117,13 @@ public: llvm::DenseMap<VersionTuple, VersionTuple> Mapping; }; - DarwinSDKInfo(VersionTuple Version, VersionTuple MaximumDeploymentTarget, - llvm::DenseMap<OSEnvPair::StorageType, - Optional<RelatedTargetVersionMapping>> - VersionMappings = - llvm::DenseMap<OSEnvPair::StorageType, - Optional<RelatedTargetVersionMapping>>()) + DarwinSDKInfo( + VersionTuple Version, VersionTuple MaximumDeploymentTarget, + llvm::DenseMap<OSEnvPair::StorageType, + std::optional<RelatedTargetVersionMapping>> + VersionMappings = + llvm::DenseMap<OSEnvPair::StorageType, + std::optional<RelatedTargetVersionMapping>>()) : Version(Version), MaximumDeploymentTarget(MaximumDeploymentTarget), VersionMappings(std::move(VersionMappings)) {} @@ -128,11 +144,10 @@ public: auto Mapping = VersionMappings.find(Kind.Value); if (Mapping == VersionMappings.end()) return nullptr; - return Mapping->getSecond().hasValue() ? Mapping->getSecond().getPointer() - : nullptr; + return Mapping->getSecond() ? &*Mapping->getSecond() : nullptr; } - static Optional<DarwinSDKInfo> + static std::optional<DarwinSDKInfo> parseDarwinSDKSettingsJSON(const llvm::json::Object *Obj); private: @@ -141,17 +156,18 @@ private: // Need to wrap the value in an optional here as the value has to be default // constructible, and std::unique_ptr doesn't like DarwinSDKInfo being // Optional as Optional is trying to copy it in emplace. - llvm::DenseMap<OSEnvPair::StorageType, Optional<RelatedTargetVersionMapping>> + llvm::DenseMap<OSEnvPair::StorageType, + std::optional<RelatedTargetVersionMapping>> VersionMappings; }; /// Parse the SDK information from the SDKSettings.json file. /// -/// \returns an error if the SDKSettings.json file is invalid, None if the -/// SDK has no SDKSettings.json, or a valid \c DarwinSDKInfo otherwise. -Expected<Optional<DarwinSDKInfo>> parseDarwinSDKInfo(llvm::vfs::FileSystem &VFS, - StringRef SDKRootPath); +/// \returns an error if the SDKSettings.json file is invalid, std::nullopt if +/// the SDK has no SDKSettings.json, or a valid \c DarwinSDKInfo otherwise. +Expected<std::optional<DarwinSDKInfo>> +parseDarwinSDKInfo(llvm::vfs::FileSystem &VFS, StringRef SDKRootPath); } // end namespace clang -#endif // LLVM_CLANG_BASIC_DARWIN_SDK_INFO_H +#endif // LLVM_CLANG_BASIC_DARWINSDKINFO_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/DebugInfoOptions.h b/contrib/llvm-project/clang/include/clang/Basic/DebugInfoOptions.h deleted file mode 100644 index c1259d7797db..000000000000 --- a/contrib/llvm-project/clang/include/clang/Basic/DebugInfoOptions.h +++ /dev/null @@ -1,60 +0,0 @@ -//===--- DebugInfoOptions.h - Debug Info Emission Types ---------*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_CLANG_BASIC_DEBUGINFOOPTIONS_H -#define LLVM_CLANG_BASIC_DEBUGINFOOPTIONS_H - -namespace clang { -namespace codegenoptions { - -enum DebugInfoFormat { - DIF_DWARF, - DIF_CodeView, -}; - -enum DebugInfoKind { - /// Don't generate debug info. - NoDebugInfo, - - /// Emit location information but do not generate debug info in the output. - /// This is useful in cases where the backend wants to track source - /// locations for instructions without actually emitting debug info for them - /// (e.g., when -Rpass is used). - LocTrackingOnly, - - /// Emit only debug directives with the line numbers data - DebugDirectivesOnly, - - /// Emit only debug info necessary for generating line number tables - /// (-gline-tables-only). - DebugLineTablesOnly, - - /// Limit generated debug info for classes to reduce size. This emits class - /// type info only where the constructor is emitted, if it is a class that - /// has a constructor. - /// FIXME: Consider combining this with LimitedDebugInfo. - DebugInfoConstructor, - - /// Limit generated debug info to reduce size (-fno-standalone-debug). This - /// emits forward decls for types that could be replaced with forward decls in - /// the source code. For dynamic C++ classes type info is only emitted into - /// the module that contains the classe's vtable. - LimitedDebugInfo, - - /// Generate complete debug info. - FullDebugInfo, - - /// Generate debug info for types that may be unused in the source - /// (-fno-eliminate-unused-debug-types). - UnusedTypeInfo, -}; - -} // end namespace codegenoptions -} // end namespace clang - -#endif diff --git a/contrib/llvm-project/clang/include/clang/Basic/DebugOptions.def b/contrib/llvm-project/clang/include/clang/Basic/DebugOptions.def new file mode 100644 index 000000000000..7cd3edf08a17 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/DebugOptions.def @@ -0,0 +1,146 @@ +//===--- DebugOptions.def - Debug option database ----------------- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines debug-specific codegen options. Users of this file +// must define the CODEGENOPT macro to make use of this information. +// Optionally, the user may also define DEBUGOPT (for flags), ENUM_DEBUGOPT (for +// options that have enumeration type), and VALUE_DEBUGOPT (is a debug option +// that describes a value rather than a flag). +// +// BENIGN_ variants of the macros are used to describe options that do not +// affect the generated PCM. +// +//===----------------------------------------------------------------------===// +#ifndef DEBUGOPT +#define DEBUGOPT(Name, Bits, Default) \ +CODEGENOPT(Name, Bits, Default) +#endif + +#ifndef VALUE_DEBUGOPT +# define VALUE_DEBUGOPT(Name, Bits, Default) \ +VALUE_CODEGENOPT(Name, Bits, Default) +#endif + +#ifndef ENUM_DEBUGOPT +# define ENUM_DEBUGOPT(Name, Type, Bits, Default) \ +ENUM_CODEGENOPT(Name, Type, Bits, Default) +#endif + +#ifndef BENIGN_DEBUGOPT +#define BENIGN_DEBUGOPT(Name, Bits, Default) \ +DEBUGOPT(Name, Bits, Default) +#endif + +#ifndef BENIGN_VALUE_DEBUGOPT +# define BENIGN_VALUE_DEBUGOPT(Name, Bits, Default) \ +VALUE_DEBUGOPT(Name, Bits, Default) +#endif + +#ifndef BENIGN_ENUM_DEBUGOPT +# define BENIGN_ENUM_DEBUGOPT(Name, Type, Bits, Default) \ +ENUM_DEBUGOPT(Name, Type, Bits, Default) +#endif + +BENIGN_ENUM_DEBUGOPT(CompressDebugSections, llvm::DebugCompressionType, 2, + llvm::DebugCompressionType::None) +DEBUGOPT(Dwarf64, 1, 0) ///< -gdwarf64. +BENIGN_DEBUGOPT(EnableDIPreservationVerify, 1, 0) ///< Enable di preservation + ///< verify each (it means + ///< check the original debug + ///< info metadata + ///< preservation). +BENIGN_DEBUGOPT(ForceDwarfFrameSection , 1, 0) ///< Set when -fforce-dwarf-frame + ///< is enabled. + +///< Set when -femit-dwarf-unwind is passed. +BENIGN_ENUM_DEBUGOPT(EmitDwarfUnwind, llvm::EmitDwarfUnwindType, 2, + llvm::EmitDwarfUnwindType::Default) + +BENIGN_DEBUGOPT(NoDwarfDirectoryAsm , 1, 0) ///< Set when -fno-dwarf-directory-asm + ///< is enabled. + +BENIGN_DEBUGOPT(NoInlineLineTables, 1, 0) ///< Whether debug info should contain + ///< inline line tables. + +DEBUGOPT(DebugStrictDwarf, 1, 1) ///< Whether or not to use strict DWARF info. + +/// Control the Assignment Tracking debug info feature. +BENIGN_ENUM_DEBUGOPT(AssignmentTrackingMode, AssignmentTrackingOpts, 2, + AssignmentTrackingOpts::Disabled) + +DEBUGOPT(DebugColumnInfo, 1, 0) ///< Whether or not to use column information + ///< in debug info. + +DEBUGOPT(DebugTypeExtRefs, 1, 0) ///< Whether or not debug info should contain + ///< external references to a PCH or module. + +DEBUGOPT(DebugExplicitImport, 1, 0) ///< Whether or not debug info should + ///< contain explicit imports for + ///< anonymous namespaces + +/// Set debug info source file hashing algorithm. +ENUM_DEBUGOPT(DebugSrcHash, DebugSrcHashKind, 2, DSH_MD5) + +DEBUGOPT(SplitDwarfInlining, 1, 1) ///< Whether to include inlining info in the + ///< skeleton CU to allow for symbolication + ///< of inline stack frames without .dwo files. +DEBUGOPT(DebugFwdTemplateParams, 1, 0) ///< Whether to emit complete + ///< template parameter descriptions in + ///< forward declarations (versus just + ///< including them in the name). +ENUM_DEBUGOPT(DebugSimpleTemplateNames, + llvm::codegenoptions::DebugTemplateNamesKind, 2, + llvm::codegenoptions::DebugTemplateNamesKind::Full) + ///< Whether to emit template parameters in the textual names of + ///< template specializations. + ///< Implies DebugFwdTemplateNames to allow decorated names to be + ///< reconstructed when needed. + +/// The kind of generated debug info. +ENUM_DEBUGOPT(DebugInfo, llvm::codegenoptions::DebugInfoKind, 4, + llvm::codegenoptions::NoDebugInfo) + +/// Whether to generate macro debug info. +DEBUGOPT(MacroDebugInfo, 1, 0) + +/// Tune the debug info for this debugger. +ENUM_DEBUGOPT(DebuggerTuning, llvm::DebuggerKind, 3, + llvm::DebuggerKind::Default) + +/// Dwarf version. Version zero indicates to LLVM that no DWARF should be +/// emitted. +VALUE_DEBUGOPT(DwarfVersion, 3, 0) + +/// Whether we should emit CodeView debug information. It's possible to emit +/// CodeView and DWARF into the same object. +DEBUGOPT(EmitCodeView, 1, 0) + +/// Whether to emit the .debug$H section containing hashes of CodeView types. +DEBUGOPT(CodeViewGHash, 1, 0) + +/// Whether to emit the compiler path and command line into the CodeView debug information. +DEBUGOPT(CodeViewCommandLine, 1, 0) + +/// Whether emit extra debug info for sample pgo profile collection. +DEBUGOPT(DebugInfoForProfiling, 1, 0) + +/// Whether to emit .debug_gnu_pubnames section instead of .debug_pubnames. +DEBUGOPT(DebugNameTable, 2, 0) + +/// Whether to use DWARF base address specifiers in .debug_ranges. +DEBUGOPT(DebugRangesBaseAddress, 1, 0) + +/// Whether to embed source in DWARF debug line section. +DEBUGOPT(EmbedSource, 1, 0) + +#undef DEBUGOPT +#undef ENUM_DEBUGOPT +#undef VALUE_DEBUGOPT +#undef BENIGN_DEBUGOPT +#undef BENIGN_ENUM_DEBUGOPT +#undef BENIGN_VALUE_DEBUGOPT diff --git a/contrib/llvm-project/clang/include/clang/Basic/DeclNodes.td b/contrib/llvm-project/clang/include/clang/Basic/DeclNodes.td index f8ad6cf5b262..8b1f415dd5fe 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DeclNodes.td +++ b/contrib/llvm-project/clang/include/clang/Basic/DeclNodes.td @@ -41,6 +41,7 @@ def Named : DeclNode<Decl, "named declarations", 1>; def OMPDeclareReduction : DeclNode<Value>, DeclContext; def OMPDeclareMapper : DeclNode<Value>, DeclContext; def MSGuid : DeclNode<Value>; + def UnnamedGlobalConstant : DeclNode<Value>; def TemplateParamObject : DeclNode<Value>; def Declarator : DeclNode<Value, "declarators", 1>; def Field : DeclNode<Declarator, "non-static data members">; @@ -89,17 +90,18 @@ def Named : DeclNode<Decl, "named declarations", 1>; def ObjCImplementation : DeclNode<ObjCImpl>; def ObjCProperty : DeclNode<Named, "Objective-C properties">; def ObjCCompatibleAlias : DeclNode<Named>; +def ImplicitConceptSpecialization : DeclNode<Decl>; def LinkageSpec : DeclNode<Decl>, DeclContext; def Export : DeclNode<Decl>, DeclContext; def ObjCPropertyImpl : DeclNode<Decl>; def FileScopeAsm : DeclNode<Decl>; +def TopLevelStmt : DeclNode<Decl>; def AccessSpec : DeclNode<Decl>; def Friend : DeclNode<Decl>; def FriendTemplate : DeclNode<Decl>; def StaticAssert : DeclNode<Decl>; def Block : DeclNode<Decl, "blocks">, DeclContext; def Captured : DeclNode<Decl>, DeclContext; -def ClassScopeFunctionSpecialization : DeclNode<Decl>; def Import : DeclNode<Decl>; def OMPThreadPrivate : DeclNode<Decl>; def OMPAllocate : DeclNode<Decl>; @@ -107,4 +109,4 @@ def OMPRequires : DeclNode<Decl>; def Empty : DeclNode<Decl>; def RequiresExprBody : DeclNode<Decl>, DeclContext; def LifetimeExtendedTemporary : DeclNode<Decl>; - +def HLSLBuffer : DeclNode<Named, "HLSLBuffer">, DeclContext; diff --git a/contrib/llvm-project/clang/include/clang/Basic/Diagnostic.h b/contrib/llvm-project/clang/include/clang/Basic/Diagnostic.h index 3b915fb15a89..0c7836c2ea56 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Diagnostic.h +++ b/contrib/llvm-project/clang/include/clang/Basic/Diagnostic.h @@ -21,7 +21,6 @@ #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/IntrusiveRefCntPtr.h" -#include "llvm/ADT/Optional.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringRef.h" #include "llvm/ADT/iterator_range.h" @@ -32,6 +31,7 @@ #include <list> #include <map> #include <memory> +#include <optional> #include <string> #include <type_traits> #include <utility> @@ -39,7 +39,8 @@ namespace llvm { class Error; -} +class raw_ostream; +} // namespace llvm namespace clang { @@ -164,9 +165,9 @@ struct DiagnosticStorage { /// The values for the various substitution positions. /// /// This is used when the argument is not an std::string. The specific value - /// is mangled into an intptr_t and the interpretation depends on exactly + /// is mangled into an uint64_t and the interpretation depends on exactly /// what sort of argument kind it is. - intptr_t DiagArgumentsVal[MaxArguments]; + uint64_t DiagArgumentsVal[MaxArguments]; /// The values for the various substitution positions that have /// string arguments. @@ -313,18 +314,23 @@ private: // "Global" configuration state that can actually vary between modules. // Ignore all warnings: -w + LLVM_PREFERRED_TYPE(bool) unsigned IgnoreAllWarnings : 1; // Enable all warnings. + LLVM_PREFERRED_TYPE(bool) unsigned EnableAllWarnings : 1; // Treat warnings like errors. + LLVM_PREFERRED_TYPE(bool) unsigned WarningsAsErrors : 1; // Treat errors like fatal errors. + LLVM_PREFERRED_TYPE(bool) unsigned ErrorsAsFatal : 1; // Suppress warnings in system headers. + LLVM_PREFERRED_TYPE(bool) unsigned SuppressSystemWarnings : 1; // Map extensions to warnings or errors? @@ -544,6 +550,7 @@ public: DiagnosticsEngine &operator=(const DiagnosticsEngine &) = delete; ~DiagnosticsEngine(); + friend void DiagnosticsTestHelper(DiagnosticsEngine &); LLVM_DUMP_METHOD void dump() const; LLVM_DUMP_METHOD void dump(StringRef DiagName) const; @@ -807,6 +814,9 @@ public: bool setSeverityForGroup(diag::Flavor Flavor, StringRef Group, diag::Severity Map, SourceLocation Loc = SourceLocation()); + bool setSeverityForGroup(diag::Flavor Flavor, diag::Group Group, + diag::Severity Map, + SourceLocation Loc = SourceLocation()); /// Set the warning-as-error flag for the given diagnostic group. /// @@ -887,9 +897,9 @@ public: LastDiagLevel = Other.LastDiagLevel; } - /// Reset the state of the diagnostic object to its initial - /// configuration. - void Reset(); + /// Reset the state of the diagnostic object to its initial configuration. + /// \param[in] soft - if true, doesn't reset the diagnostic mappings and state + void Reset(bool soft = false); //===--------------------------------------------------------------------===// // DiagnosticsEngine classification and reporting interfaces. @@ -1176,7 +1186,7 @@ public: DiagStorage = nullptr; } - void AddTaggedVal(intptr_t V, DiagnosticsEngine::ArgumentKind Kind) const { + void AddTaggedVal(uint64_t V, DiagnosticsEngine::ArgumentKind Kind) const { if (!DiagStorage) DiagStorage = getStorage(); @@ -1341,8 +1351,8 @@ public: // It is necessary to limit this to rvalue reference to avoid calling this // function with a bitfield lvalue argument since non-const reference to // bitfield is not allowed. - template <typename T, typename = typename std::enable_if< - !std::is_lvalue_reference<T>::value>::type> + template <typename T, + typename = std::enable_if_t<!std::is_lvalue_reference<T>::value>> const DiagnosticBuilder &operator<<(T &&V) const { assert(isActive() && "Clients must not add to cleared diagnostic!"); const StreamingDiagnostic &DB = *this; @@ -1399,6 +1409,18 @@ inline const StreamingDiagnostic &operator<<(const StreamingDiagnostic &DB, return DB; } +inline const StreamingDiagnostic &operator<<(const StreamingDiagnostic &DB, + long I) { + DB.AddTaggedVal(I, DiagnosticsEngine::ak_sint); + return DB; +} + +inline const StreamingDiagnostic &operator<<(const StreamingDiagnostic &DB, + long long I) { + DB.AddTaggedVal(I, DiagnosticsEngine::ak_sint); + return DB; +} + // We use enable_if here to prevent that this overload is selected for // pointers or other arguments that are implicitly convertible to bool. template <typename T> @@ -1416,6 +1438,18 @@ inline const StreamingDiagnostic &operator<<(const StreamingDiagnostic &DB, } inline const StreamingDiagnostic &operator<<(const StreamingDiagnostic &DB, + unsigned long I) { + DB.AddTaggedVal(I, DiagnosticsEngine::ak_uint); + return DB; +} + +inline const StreamingDiagnostic &operator<<(const StreamingDiagnostic &DB, + unsigned long long I) { + DB.AddTaggedVal(I, DiagnosticsEngine::ak_uint); + return DB; +} + +inline const StreamingDiagnostic &operator<<(const StreamingDiagnostic &DB, tok::TokenKind I) { DB.AddTaggedVal(static_cast<unsigned>(I), DiagnosticsEngine::ak_tokenkind); return DB; @@ -1443,6 +1477,12 @@ operator<<(const StreamingDiagnostic &DB, T *DC) { } inline const StreamingDiagnostic &operator<<(const StreamingDiagnostic &DB, + SourceLocation L) { + DB.AddSourceRange(CharSourceRange::getTokenRange(L)); + return DB; +} + +inline const StreamingDiagnostic &operator<<(const StreamingDiagnostic &DB, SourceRange R) { DB.AddSourceRange(CharSourceRange::getTokenRange(R)); return DB; @@ -1476,7 +1516,7 @@ inline const StreamingDiagnostic &operator<<(const StreamingDiagnostic &DB, inline const StreamingDiagnostic & operator<<(const StreamingDiagnostic &DB, - const llvm::Optional<SourceRange> &Opt) { + const std::optional<SourceRange> &Opt) { if (Opt) DB << *Opt; return DB; @@ -1484,15 +1524,14 @@ operator<<(const StreamingDiagnostic &DB, inline const StreamingDiagnostic & operator<<(const StreamingDiagnostic &DB, - const llvm::Optional<CharSourceRange> &Opt) { + const std::optional<CharSourceRange> &Opt) { if (Opt) DB << *Opt; return DB; } inline const StreamingDiagnostic & -operator<<(const StreamingDiagnostic &DB, - const llvm::Optional<FixItHint> &Opt) { +operator<<(const StreamingDiagnostic &DB, const std::optional<FixItHint> &Opt) { if (Opt) DB << *Opt; return DB; @@ -1531,7 +1570,7 @@ inline DiagnosticBuilder DiagnosticsEngine::Report(unsigned DiagID) { /// currently in-flight diagnostic. class Diagnostic { const DiagnosticsEngine *DiagObj; - StringRef StoredDiagMessage; + std::optional<StringRef> StoredDiagMessage; public: explicit Diagnostic(const DiagnosticsEngine *DO) : DiagObj(DO) {} @@ -1577,18 +1616,18 @@ public: /// Return the specified signed integer argument. /// \pre getArgKind(Idx) == DiagnosticsEngine::ak_sint - int getArgSInt(unsigned Idx) const { + int64_t getArgSInt(unsigned Idx) const { assert(getArgKind(Idx) == DiagnosticsEngine::ak_sint && "invalid argument accessor!"); - return (int)DiagObj->DiagStorage.DiagArgumentsVal[Idx]; + return (int64_t)DiagObj->DiagStorage.DiagArgumentsVal[Idx]; } /// Return the specified unsigned integer argument. /// \pre getArgKind(Idx) == DiagnosticsEngine::ak_uint - unsigned getArgUInt(unsigned Idx) const { + uint64_t getArgUInt(unsigned Idx) const { assert(getArgKind(Idx) == DiagnosticsEngine::ak_uint && "invalid argument accessor!"); - return (unsigned)DiagObj->DiagStorage.DiagArgumentsVal[Idx]; + return DiagObj->DiagStorage.DiagArgumentsVal[Idx]; } /// Return the specified IdentifierInfo argument. @@ -1602,7 +1641,7 @@ public: /// Return the specified non-string argument in an opaque form. /// \pre getArgKind(Idx) != DiagnosticsEngine::ak_std_string - intptr_t getRawArg(unsigned Idx) const { + uint64_t getRawArg(unsigned Idx) const { assert(getArgKind(Idx) != DiagnosticsEngine::ak_std_string && "invalid argument accessor!"); return DiagObj->DiagStorage.DiagArgumentsVal[Idx]; @@ -1687,9 +1726,7 @@ public: range_iterator range_end() const { return Ranges.end(); } unsigned range_size() const { return Ranges.size(); } - ArrayRef<CharSourceRange> getRanges() const { - return llvm::makeArrayRef(Ranges); - } + ArrayRef<CharSourceRange> getRanges() const { return llvm::ArrayRef(Ranges); } using fixit_iterator = std::vector<FixItHint>::const_iterator; @@ -1697,11 +1734,12 @@ public: fixit_iterator fixit_end() const { return FixIts.end(); } unsigned fixit_size() const { return FixIts.size(); } - ArrayRef<FixItHint> getFixIts() const { - return llvm::makeArrayRef(FixIts); - } + ArrayRef<FixItHint> getFixIts() const { return llvm::ArrayRef(FixIts); } }; +// Simple debug printing of StoredDiagnostic. +llvm::raw_ostream &operator<<(llvm::raw_ostream &OS, const StoredDiagnostic &); + /// Abstract interface, implemented by clients of the front-end, which /// formats and prints fully processed diagnostics. class DiagnosticConsumer { @@ -1789,12 +1827,17 @@ public: struct TemplateDiffTypes { intptr_t FromType; intptr_t ToType; + LLVM_PREFERRED_TYPE(bool) unsigned PrintTree : 1; + LLVM_PREFERRED_TYPE(bool) unsigned PrintFromType : 1; + LLVM_PREFERRED_TYPE(bool) unsigned ElideType : 1; + LLVM_PREFERRED_TYPE(bool) unsigned ShowColors : 1; // The printer sets this variable to true if the template diff was used. + LLVM_PREFERRED_TYPE(bool) unsigned TemplateDiffUsed : 1; }; @@ -1807,7 +1850,7 @@ const char ToggleHighlight = 127; void ProcessWarningOptions(DiagnosticsEngine &Diags, const DiagnosticOptions &Opts, bool ReportDiags = true); - +void EscapeStringForDiagnostic(StringRef Str, SmallVectorImpl<char> &OutStr); } // namespace clang #endif // LLVM_CLANG_BASIC_DIAGNOSTIC_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/Diagnostic.td b/contrib/llvm-project/clang/include/clang/Basic/Diagnostic.td index ab2c738a2ace..8d66e265fbae 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Diagnostic.td +++ b/contrib/llvm-project/clang/include/clang/Basic/Diagnostic.td @@ -55,11 +55,11 @@ class DiagCategory<string Name> { } // Diagnostic Groups. -class DiagGroup<string Name, list<DiagGroup> subgroups = []> { +class DiagGroup<string Name, list<DiagGroup> subgroups = [], code docs = [{}]> { string GroupName = Name; list<DiagGroup> SubGroups = subgroups; string CategoryName = ""; - code Documentation = [{}]; + code Documentation = docs; } class InGroup<DiagGroup G> { DiagGroup Group = G; } //class IsGroup<string Name> { DiagGroup Group = DiagGroup<Name>; } @@ -75,15 +75,16 @@ include "DiagnosticGroups.td" // All diagnostics emitted by the compiler are an indirect subclass of this. -class Diagnostic<string text, DiagClass DC, Severity defaultmapping> { +class Diagnostic<string summary, DiagClass DC, Severity defaultmapping> { /// Component is specified by the file with a big let directive. string Component = ?; - string Text = text; + string Summary = summary; DiagClass Class = DC; SFINAEResponse SFINAE = SFINAE_Suppress; bit AccessControl = 0; bit WarningNoWerror = 0; bit ShowInSystemHeader = 0; + bit ShowInSystemMacro = 1; bit Deferrable = 0; Severity DefaultSeverity = defaultmapping; DiagGroup Group; @@ -108,6 +109,14 @@ class SuppressInSystemHeader { bit ShowInSystemHeader = 0; } +class ShowInSystemMacro { + bit ShowInSystemMacro = 1; +} + +class SuppressInSystemMacro { + bit ShowInSystemMacro = 0; +} + class Deferrable { bit Deferrable = 1; } @@ -148,7 +157,6 @@ class DefaultRemark { Severity DefaultSeverity = SEV_Remark; } // Definitions for Diagnostics. include "DiagnosticASTKinds.td" -include "DiagnosticAnalysisKinds.td" include "DiagnosticCommentKinds.td" include "DiagnosticCommonKinds.td" include "DiagnosticCrossTUKinds.td" @@ -159,4 +167,3 @@ include "DiagnosticParseKinds.td" include "DiagnosticRefactoringKinds.td" include "DiagnosticSemaKinds.td" include "DiagnosticSerializationKinds.td" - diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticAST.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticAST.h index 76c31ad9508e..24ef2689eac0 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticAST.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticAST.h @@ -15,7 +15,7 @@ namespace clang { namespace diag { enum { #define DIAG(ENUM, FLAGS, DEFAULT_MAPPING, DESC, GROUP, SFINAE, NOWERROR, \ - SHOWINSYSHEADER, DEFERRABLE, CATEGORY) \ + SHOWINSYSHEADER, SHOWINSYSMACRO, DEFERRABLE, CATEGORY) \ ENUM, #define ASTSTART #include "clang/Basic/DiagnosticASTKinds.inc" diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticASTKinds.td b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticASTKinds.td index 496d86ee2fe7..c81d17ed6410 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticASTKinds.td +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticASTKinds.td @@ -11,9 +11,14 @@ let Component = "AST" in { // Constant expression diagnostics. These (and their users) belong in Sema. def note_expr_divide_by_zero : Note<"division by zero">; def note_constexpr_invalid_cast : Note< - "%select{reinterpret_cast|dynamic_cast|cast that performs the conversions of" - " a reinterpret_cast|cast from %1}0 is not allowed in a constant expression" + "%select{reinterpret_cast|dynamic_cast|%select{this conversion|cast that" + " performs the conversions of a reinterpret_cast}1|cast from %1}0" + " is not allowed in a constant expression" "%select{| in C++ standards before C++20||}0">; +def note_constexpr_invalid_void_star_cast : Note< + "cast from %0 is not allowed in a constant expression " + "%select{in C++ standards before C++2c|because the pointed object " + "type %2 is not similar to the target type %3}1">; def note_constexpr_invalid_downcast : Note< "cannot cast object of dynamic type %0 to type %1">; def note_constexpr_overflow : Note< @@ -64,7 +69,11 @@ def note_consteval_address_accessible : Note< "%select{pointer|reference}0 to a consteval declaration " "is not a constant expression">; def note_constexpr_uninitialized : Note< - "%select{|sub}0object of type %1 is not initialized">; + "subobject %select{of type |}0%1 is not initialized">; +def note_constexpr_uninitialized_base : Note< + "constructor of base class %0 is not called">; +def note_constexpr_static_local : Note< + "control flows through the definition of a %select{static|thread_local}0 variable">; def note_constexpr_subobject_declared_here : Note< "subobject declared here">; def note_constexpr_array_index : Note<"cannot refer to element %0 of " @@ -81,7 +90,23 @@ def note_constexpr_pointer_subtraction_not_same_array : Note< def note_constexpr_pointer_subtraction_zero_size : Note< "subtraction of pointers to type %0 of zero size">; def note_constexpr_pointer_comparison_unspecified : Note< - "comparison has unspecified value">; + "comparison between '%0' and '%1' has unspecified value">; +def note_constexpr_pointer_constant_comparison : Note< + "comparison of numeric address '%0' with pointer '%1' can only be performed " + "at runtime">; +def note_constexpr_literal_comparison : Note< + "comparison of addresses of literals has unspecified value">; +def note_constexpr_pointer_weak_comparison : Note< + "comparison against address of weak declaration '%0' can only be performed " + "at runtime">; +def note_constexpr_mem_pointer_weak_comparison : Note< + "comparison against pointer to weak member %q0 can only be performed " + "at runtime">; +def note_constexpr_pointer_comparison_past_end : Note< + "comparison against pointer '%0' that points past the end of a " + "complete object has unspecified value">; +def note_constexpr_pointer_comparison_zero_sized : Note< + "comparison of pointers '%0' and '%1' to unrelated zero-sized objects">; def note_constexpr_pointer_comparison_base_classes : Note< "comparison of addresses of subobjects of different base classes " "has unspecified value">; @@ -108,6 +133,8 @@ def note_constexpr_null_subobject : Note< "access array element of|perform pointer arithmetic on|" "access real component of|" "access imaginary component of}0 null pointer">; +def note_constexpr_null_callee : Note< + "'%0' evaluates to a null function pointer">; def note_constexpr_function_param_value_unknown : Note< "function parameter %0 with unknown value cannot be used in a constant " "expression">; @@ -290,7 +317,7 @@ def note_constexpr_memcpy_unsupported : Note< "source is not a contiguous array of at least %4 elements of type %3|" "destination is not a contiguous array of at least %4 elements of type %3}2">; def note_constexpr_bit_cast_unsupported_type : Note< - "constexpr bit_cast involving type %0 is not yet supported">; + "constexpr bit cast involving type %0 is not yet supported">; def note_constexpr_bit_cast_unsupported_bitfield : Note< "constexpr bit_cast involving bit-field is not yet supported">; def note_constexpr_bit_cast_invalid_type : Note< @@ -299,6 +326,9 @@ def note_constexpr_bit_cast_invalid_type : Note< "%select{type|member}1 is not allowed in a constant expression">; def note_constexpr_bit_cast_invalid_subtype : Note< "invalid type %0 is a %select{member|base}1 of %2">; +def note_constexpr_bit_cast_invalid_vector : Note< + "bit_cast involving type %0 is not allowed in a constant expression; " + "element size %1 * element count %2 is not a multiple of the byte size %3">; def note_constexpr_bit_cast_indet_dest : Note< "indeterminate value can only initialize an object of type 'unsigned char'" "%select{, 'char',|}1 or 'std::byte'; %0 is invalid">; @@ -326,6 +356,9 @@ def note_constexpr_new_negative : Note< "cannot allocate array; evaluated array bound %0 is negative">; def note_constexpr_new_too_large : Note< "cannot allocate array; evaluated array bound %0 is too large">; +def note_constexpr_new_exceeds_limits : Note< + "cannot allocate array; evaluated array bound %0 exceeds the limit (%1); " + "use '-fconstexpr-steps' to increase this limit">; def note_constexpr_new_too_small : Note< "cannot allocate array; evaluated array bound %0 is too small to hold " "%1 explicitly initialized elements">; @@ -362,6 +395,10 @@ def note_constexpr_memory_leak : Note< "%plural{0:|: (along with %0 other memory leak%s0)}0">; def note_constexpr_unsupported_layout : Note< "type %0 has unexpected layout">; +def note_constexpr_unsupported_flexible_array : Note< + "flexible array initialization is not yet supported">; +def note_constexpr_non_const_vectorelements : Note< + "cannot determine number of elements for sizeless vectors in a constant expression">; def err_experimental_clang_interp_failed : Error< "the experimental clang interpreter failed to evaluate an expression">; @@ -371,6 +408,10 @@ def warn_integer_constant_overflow : Warning< def warn_fixedpoint_constant_overflow : Warning< "overflow in expression; result is %0 with type %1">, InGroup<DiagGroup<"fixed-point-overflow">>; +def warn_constexpr_unscoped_enum_out_of_range : Warning< + "integer value %0 is outside the valid range of values [%1, %2] for the " + "enumeration type %3">, DefaultError, ShowInSystemHeader, ShowInSystemMacro, + InGroup<DiagGroup<"enum-constexpr-conversion">>; // This is a temporary diagnostic, and shall be removed once our // implementation is complete, and like the preceding constexpr notes belongs @@ -439,8 +480,6 @@ def note_odr_tag_kind_here: Note< def note_odr_field : Note<"field %0 has type %1 here">; def note_odr_field_name : Note<"field has name %0 here">; def note_odr_missing_field : Note<"no corresponding field here">; -def note_odr_bit_field : Note<"bit-field %0 with type %1 and length %2 here">; -def note_odr_not_bit_field : Note<"field %0 is not a bit-field">; def note_odr_base : Note<"class has base type %0">; def note_odr_virtual_base : Note< "%select{non-virtual|virtual}0 derivation here">; @@ -561,14 +600,397 @@ def warn_odr_non_type_parameter_type_inconsistent : Warning< InGroup<ODR>; def err_unsupported_ast_node: Error<"cannot import unsupported AST node %0">; +// Compare ODR hashes +def err_module_odr_violation_different_definitions : Error< + "%q0 has different definitions in different modules; " + "%select{definition in module '%2' is here|defined here}1">; +def note_first_module_difference : Note< + "in first definition, possible difference is here">; +def note_module_odr_violation_different_definitions : Note< + "definition in module '%0' is here">; +def note_second_module_difference : Note< + "in second definition, possible difference is here">; + +def err_module_odr_violation_definition_data : Error < + "%q0 has different definitions in different modules; first difference is " + "%select{definition in module '%2'|defined here}1 found " + "%select{" + "%4 base %plural{1:class|:classes}4|" + "%4 virtual base %plural{1:class|:classes}4|" + "%ordinal4 base class with type %5|" + "%ordinal4 %select{non-virtual|virtual}5 base class %6|" + "%ordinal4 base class %5 with " + "%select{public|protected|private|no}6 access specifier}3">; + +def note_module_odr_violation_definition_data : Note < + "but in '%0' found " + "%select{" + "%2 base %plural{1:class|:classes}2|" + "%2 virtual base %plural{1:class|:classes}2|" + "%ordinal2 base class with different type %3|" + "%ordinal2 %select{non-virtual|virtual}3 base class %4|" + "%ordinal2 base class %3 with " + "%select{public|protected|private|no}4 access specifier}1">; + +def err_module_odr_violation_objc_interface : Error < + "%0 has different definitions in different modules; first difference is " + "%select{definition in module '%2'|defined here}1 found " + "%select{" + "%select{no super class|super class with type %5}4|" + "instance variable '%4' access control is " + "%select{|@private|@protected|@public|@package}5" + "}3">; +def note_module_odr_violation_objc_interface : Note < + "but in %select{'%1'|definition here}0 found " + "%select{" + "%select{no super class|super class with type %4}3|" + "instance variable '%3' access control is " + "%select{|@private|@protected|@public|@package}4" + "}2">; + +def err_module_odr_violation_template_parameter : Error < + "%q0 has different definitions in different modules; first difference is " + "%select{definition in module '%2'|defined here}1 found " + "%select{" + "unnamed template parameter|" + "template parameter %5|" + "template parameter with %select{no |}4default argument|" + "template parameter with default argument}3">; + +def note_module_odr_violation_template_parameter : Note < + "but in '%0' found " + "%select{" + "unnamed template parameter %2|" + "template parameter %3|" + "template parameter with %select{no |}2default argument|" + "template parameter with different default argument}1">; + +def err_module_odr_violation_mismatch_decl : Error< + "%q0 has different definitions in different modules; first difference is " + "%select{definition in module '%2'|defined here}1 found " + "%select{end of class|public access specifier|private access specifier|" + "protected access specifier|static assert|field|method|type alias|typedef|" + "data member|friend declaration|function template|method|instance variable|" + "property}3">; +def note_module_odr_violation_mismatch_decl : Note< + "but in %select{'%1'|definition here}0 found " + "%select{end of class|public access specifier|private access specifier|" + "protected access specifier|static assert|field|method|type alias|typedef|" + "data member|friend declaration|function template|method|instance variable|" + "property}2">; + +def err_module_odr_violation_record : Error< + "%q0 has different definitions in different modules; first difference is " + "%select{definition in module '%2'|defined here}1 found " + "%select{" + "static assert with condition|" + "static assert with message|" + "static assert with %select{|no }4message|" + "%select{method %5|constructor|destructor}4|" + "%select{method %5|constructor|destructor}4 " + "is %select{not deleted|deleted}6|" + "%select{method %5|constructor|destructor}4 " + "is %select{not defaulted|defaulted}6|" + "%select{method %5|constructor|destructor}4 " + "is %select{|pure }6%select{not virtual|virtual}7|" + "%select{method %5|constructor|destructor}4 " + "is %select{not static|static}6|" + "%select{method %5|constructor|destructor}4 " + "is %select{not volatile|volatile}6|" + "%select{method %5|constructor|destructor}4 " + "is %select{not const|const}6|" + "%select{method %5|constructor|destructor}4 " + "is %select{not inline|inline}6|" + "%select{method %5|constructor|destructor}4 " + "with %ordinal6 parameter with%select{out|}7 a default argument|" + "%select{method %5|constructor|destructor}4 " + "with %ordinal6 parameter with a default argument|" + "%select{method %5|constructor|destructor}4 " + "with %select{no |}6template arguments|" + "%select{method %5|constructor|destructor}4 " + "with %6 template argument%s6|" + "%select{method %5|constructor|destructor}4 " + "with %6 for %ordinal7 template argument|" + "%select{method %5|constructor|destructor}4 " + "with %select{no body|body}6|" + "%select{method %5|constructor|destructor}4 " + "with body|" + "friend %select{class|function}4|" + "friend %4|" + "friend function %4|" + "function template %4 with %5 template parameter%s5|" + "function template %4 with %ordinal5 template parameter being a " + "%select{type|non-type|template}6 template parameter|" + "function template %4 with %ordinal5 template parameter " + "%select{with no name|named %7}6|" + "function template %4 with %ordinal5 template parameter with " + "%select{no |}6default argument|" + "function template %4 with %ordinal5 template parameter with " + "default argument %6|" + "function template %4 with %ordinal5 template parameter with one type|" + "function template %4 with %ordinal5 template parameter %select{not |}6" + "being a template parameter pack|" + "}3">; + +def note_module_odr_violation_record : Note<"but in '%0' found " + "%select{" + "static assert with different condition|" + "static assert with different message|" + "static assert with %select{|no }2message|" + "%select{method %3|constructor|destructor}2|" + "%select{method %3|constructor|destructor}2 " + "is %select{not deleted|deleted}4|" + "%select{method %3|constructor|destructor}2 " + "is %select{not defaulted|defaulted}4|" + "%select{method %3|constructor|destructor}2 " + "is %select{|pure }4%select{not virtual|virtual}5|" + "%select{method %3|constructor|destructor}2 " + "is %select{not static|static}4|" + "%select{method %3|constructor|destructor}2 " + "is %select{not volatile|volatile}4|" + "%select{method %3|constructor|destructor}2 " + "is %select{not const|const}4|" + "%select{method %3|constructor|destructor}2 " + "is %select{not inline|inline}4|" + "%select{method %3|constructor|destructor}2 " + "with %ordinal4 parameter with%select{out|}5 a default argument|" + "%select{method %3|constructor|destructor}2 " + "with %ordinal4 parameter with a different default argument|" + "%select{method %3|constructor|destructor}2 " + "with %select{no |}4template arguments|" + "%select{method %3|constructor|destructor}2 " + "with %4 template argument%s4|" + "%select{method %3|constructor|destructor}2 " + "with %4 for %ordinal5 template argument|" + "%select{method %3|constructor|destructor}2 " + "with %select{no body|body}4|" + "%select{method %3|constructor|destructor}2 " + "with different body|" + "friend %select{class|function}2|" + "friend %2|" + "friend function %2|" + "function template %2 with %3 template parameter%s3|" + "function template %2 with %ordinal3 template paramter being a " + "%select{type|non-type|template}4 template parameter|" + "function template %2 with %ordinal3 template parameter " + "%select{with no name|named %5}4|" + "function template %2 with %ordinal3 template parameter with " + "%select{no |}4default argument|" + "function template %2 with %ordinal3 template parameter with " + "default argument %4|" + "function template %2 with %ordinal3 template parameter with different type|" + "function template %2 with %ordinal3 template parameter %select{not |}4" + "being a template parameter pack|" + "}1">; + +def err_module_odr_violation_field : Error< + "%q0 has different definitions in different modules; first difference is " + "%select{definition in module '%2'|defined here}1 found " + "%select{" + "field %4|" + "field %4 with type %5|" + "%select{non-|}5bitfield %4|" + "bitfield %4 with one width expression|" + "%select{non-|}5mutable field %4|" + "field %4 with %select{no|an}5 initializer|" + "field %4 with an initializer" + "}3">; +def note_module_odr_violation_field : Note< + "but in %select{'%1'|definition here}0 found " + "%select{" + "field %3|" + "field %3 with type %4|" + "%select{non-|}4bitfield %3|" + "bitfield %3 with different width expression|" + "%select{non-|}4mutable field %3|" + "field %3 with %select{no|an}4 initializer|" + "field %3 with a different initializer" + "}2">; + +def err_module_odr_violation_typedef : Error< + "%q0 has different definitions in different modules; first difference is " + "%select{definition in module '%2'|defined here}1 found " + "%select{" + "%select{typedef|type alias}4 name %5|" + "%select{typedef|type alias}4 %5 with underlying type %6" + "}3">; +def note_module_odr_violation_typedef : Note<"but in '%0' found " + "%select{" + "%select{typedef|type alias}2 name %3|" + "%select{typedef|type alias}2 %3 with different underlying type %4" + "}1">; + +def err_module_odr_violation_variable : Error< + "%q0 has different definitions in different modules; first difference is " + "%select{definition in module '%2'|defined here}1 found " + "%select{" + "data member with name %4|" + "data member %4 with type %5|" + "data member %4 with%select{out|}5 an initializer|" + "data member %4 with an initializer|" + "data member %4 %select{is constexpr|is not constexpr}5" + "}3">; +def note_module_odr_violation_variable : Note<"but in '%0' found " + "%select{" + "data member with name %2|" + "data member %2 with different type %3|" + "data member %2 with%select{out|}3 an initializer|" + "data member %2 with a different initializer|" + "data member %2 %select{is constexpr|is not constexpr}3" + "}1">; + +def err_module_odr_violation_function : Error< + "%q0 has different definitions in different modules; " + "%select{definition in module '%2'|defined here}1 " + "first difference is " + "%select{" + "return type is %4|" + "%ordinal4 parameter with name %5|" + "%ordinal4 parameter with type %5%select{| decayed from %7}6|" + "%ordinal4 parameter with%select{out|}5 a default argument|" + "%ordinal4 parameter with a default argument|" + "function body" + "}3">; + +def note_module_odr_violation_function : Note<"but in '%0' found " + "%select{" + "different return type %2|" + "%ordinal2 parameter with name %3|" + "%ordinal2 parameter with type %3%select{| decayed from %5}4|" + "%ordinal2 parameter with%select{out|}3 a default argument|" + "%ordinal2 parameter with a different default argument|" + "a different body" + "}1">; + +def err_module_odr_violation_enum : Error< + "%q0 has different definitions in different modules; " + "%select{definition in module '%2'|defined here}1 " + "first difference is " + "%select{" + "enum that is %select{not scoped|scoped}4|" + "enum scoped with keyword %select{struct|class}4|" + "enum %select{without|with}4 specified type|" + "enum with specified type %4|" + "enum with %4 element%s4|" + "%ordinal4 element has name %5|" + "%ordinal4 element %5 %select{has|does not have}6 an initializer|" + "%ordinal4 element %5 has an initializer|" + "}3">; + +def note_module_odr_violation_enum : Note<"but in '%0' found " + "%select{" + "enum that is %select{not scoped|scoped}2|" + "enum scoped with keyword %select{struct|class}2|" + "enum %select{without|with}2 specified type|" + "enum with specified type %2|" + "enum with %2 element%s2|" + "%ordinal2 element has name %3|" + "%ordinal2 element %3 %select{has|does not have}4 an initializer|" + "%ordinal2 element %3 has different initializer|" + "}1">; + +def err_module_odr_violation_referenced_protocols : Error < + "%q0 has different definitions in different modules; first difference is " + "%select{definition in module '%2'|defined here}1 found " + "%select{" + "%4 referenced %plural{1:protocol|:protocols}4|" + "%ordinal4 referenced protocol with name %5" + "}3">; +def note_module_odr_violation_referenced_protocols : Note < + "but in %select{'%1'|definition here}0 found " + "%select{" + "%3 referenced %plural{1:protocol|:protocols}3|" + "%ordinal3 referenced protocol with different name %4" + "}2">; + +def err_module_odr_violation_objc_method : Error< + "%q0 has different definitions in different modules; first difference is " + "%select{definition in module '%2'|defined here}1 found " + "%select{" + "method %4 with return type %5|" + "%select{class|instance}5 method %4|" + "%select{no|'required'|'optional'}4 method control|" + "method %4 with %select{no designated initializer|designated initializer}5|" + "%select{regular|direct}5 method %4|" + "method %4" + "}3">; +def note_module_odr_violation_objc_method : Note< + "but in %select{'%1'|definition here}0 found " + "%select{" + "method %3 with different return type %4|" + "method %3 as %select{class|instance}4 method|" + "%select{no|'required'|'optional'}3 method control|" + "method %3 with %select{no designated initializer|designated initializer}4|" + "%select{regular|direct}4 method %3|" + "different method %3" + "}2">; + +def err_module_odr_violation_method_params : Error< + "%q0 has different definitions in different modules; first difference is " + "%select{definition in module '%2'|defined here}1 found " + "%select{" + "%select{method %5|constructor|destructor}4 " + "that has %6 parameter%s6|" + "%select{method %5|constructor|destructor}4 " + "with %ordinal6 parameter of type %7%select{| decayed from %9}8|" + "%select{method %5|constructor|destructor}4 " + "with %ordinal6 parameter named %7" + "}3">; +def note_module_odr_violation_method_params : Note< + "but in %select{'%1'|definition here}0 found " + "%select{" + "%select{method %4|constructor|destructor}3 " + "that has %5 parameter%s5|" + "%select{method %4|constructor|destructor}3 " + "with %ordinal5 parameter of type %6%select{| decayed from %8}7|" + "%select{method %4|constructor|destructor}3 " + "with %ordinal5 parameter named %6" + "}2">; + +def err_module_odr_violation_objc_property : Error< + "%q0 has different definitions in different modules; first difference is " + "%select{definition in module '%2'|defined here}1 found " + "%select{" + "property %4|" + "property %4 with type %5|" + "%select{no|'required'|'optional'}4 property control|" + "property %4 with %select{default |}6'%select{none|readonly|getter|assign|" + "readwrite|retain|copy|nonatomic|setter|atomic|weak|strong|" + "unsafe_unretained|nullability|null_resettable|class|direct}5' attribute" + "}3">; +def note_module_odr_violation_objc_property : Note< + "but in %select{'%1'|definition here}0 found " + "%select{" + "property %3|" + "property %3 with type %4|" + "%select{no|'required'|'optional'}3 property control|" + "property %3 with different '%select{none|readonly|getter|assign|" + "readwrite|retain|copy|nonatomic|setter|atomic|weak|strong|" + "unsafe_unretained|nullability|null_resettable|class|direct}4' attribute" + "}2">; + +def err_module_odr_violation_mismatch_decl_unknown : Error< + "%q0 %select{with definition in module '%2'|defined here}1 has different " + "definitions in different modules; first difference is this " + "%select{||||static assert|field|method|type alias|typedef|data member|" + "friend declaration|function template|method|instance variable|" + "property|unexpected decl}3">; +def note_module_odr_violation_mismatch_decl_unknown : Note< + "but in %select{'%1'|definition here}0 found " + "%select{||||different static assert|different field|different method|" + "different type alias|different typedef|different data member|" + "different friend declaration|different function template|different method|" + "different instance variable|different property|another unexpected decl}2">; + + def remark_sanitize_address_insert_extra_padding_accepted : Remark< "-fsanitize-address-field-padding applied to %0">, ShowInSystemHeader, InGroup<SanitizeAddressRemarks>; def remark_sanitize_address_insert_extra_padding_rejected : Remark< "-fsanitize-address-field-padding ignored for %0 because it " "%select{is not C++|is packed|is a union|is trivially copyable|" - "has trivial destructor|is standard layout|is in a blacklisted file|" - "is blacklisted}1">, ShowInSystemHeader, + "has trivial destructor|is standard layout|is in a ignorelisted file|" + "is ignorelisted}1">, ShowInSystemHeader, InGroup<SanitizeAddressRemarks>; def warn_npot_ms_struct : Warning< @@ -576,6 +998,16 @@ def warn_npot_ms_struct : Warning< "data types with sizes that aren't a power of two">, DefaultError, InGroup<IncompatibleMSStruct>; +// -Wpadded-bitfield +def warn_padded_struct_bitfield : Warning< + "padding %select{struct|interface|class}0 %1 with %2 " + "%select{byte|bit}3%s2 to align %4">, + InGroup<PaddedBitField>, DefaultIgnore; +def warn_padded_struct_anon_bitfield : Warning< + "padding %select{struct|interface|class}0 %1 with %2 " + "%select{byte|bit}3%s2 to align anonymous bit-field">, + InGroup<PaddedBitField>, DefaultIgnore; + // -Wpadded, -Wpacked def warn_padded_struct_field : Warning< "padding %select{struct|interface|class}0 %1 with %2 " @@ -583,11 +1015,21 @@ def warn_padded_struct_field : Warning< InGroup<Padded>, DefaultIgnore; def warn_padded_struct_anon_field : Warning< "padding %select{struct|interface|class}0 %1 with %2 " - "%select{byte|bit}3%s2 to align anonymous bit-field">, + "%select{byte|bit}3%s2 to align anonymous field">, InGroup<Padded>, DefaultIgnore; def warn_padded_struct_size : Warning< "padding size of %0 with %1 %select{byte|bit}2%s1 to alignment boundary">, InGroup<Padded>, DefaultIgnore; def warn_unnecessary_packed : Warning< "packed attribute is unnecessary for %0">, InGroup<Packed>, DefaultIgnore; +def warn_unpacked_field + : Warning< + "not packing field %0 as it is non-POD for the purposes of layout">, + InGroup<PackedNonPod>, + DefaultIgnore; + +// -Wunaligned-access +def warn_unaligned_access : Warning< + "field %1 within %0 is less aligned than %2 and is usually due to %0 being " + "packed, which can lead to unaligned accesses">, InGroup<UnalignedAccess>, DefaultIgnore; } diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticAnalysis.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticAnalysis.h index f9037cc8d75a..676b58f7d6ef 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticAnalysis.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticAnalysis.h @@ -15,7 +15,7 @@ namespace clang { namespace diag { enum { #define DIAG(ENUM, FLAGS, DEFAULT_MAPPING, DESC, GROUP, SFINAE, NOWERROR, \ - SHOWINSYSHEADER, DEFERRABLE, CATEGORY) \ + SHOWINSYSHEADER, SHOWINSYSMACRO, DEFERRABLE, CATEGORY) \ ENUM, #define ANALYSISSTART #include "clang/Basic/DiagnosticAnalysisKinds.inc" diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticAnalysisKinds.td b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticAnalysisKinds.td deleted file mode 100644 index 20efd96b85fd..000000000000 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticAnalysisKinds.td +++ /dev/null @@ -1,11 +0,0 @@ -//==--- DiagnosticAnalysisKinds.td - libanalysis diagnostics --------------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -let Component = "Analysis" in { - -} diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCategories.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCategories.h index 0decf15080a0..14be326f7515 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCategories.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCategories.h @@ -19,6 +19,14 @@ namespace clang { #undef GET_CATEGORY_TABLE DiagCat_NUM_CATEGORIES }; + + enum class Group { +#define DIAG_ENTRY(GroupName, FlagNameOffset, Members, SubGroups, Docs) \ + GroupName, +#include "clang/Basic/DiagnosticGroups.inc" +#undef CATEGORY +#undef DIAG_ENTRY + }; } // end namespace diag } // end namespace clang diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticComment.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticComment.h index 6e011bfcebab..17c0053e9a33 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticComment.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticComment.h @@ -15,7 +15,7 @@ namespace clang { namespace diag { enum { #define DIAG(ENUM, FLAGS, DEFAULT_MAPPING, DESC, GROUP, SFINAE, NOWERROR, \ - SHOWINSYSHEADER, DEFERRABLE, CATEGORY) \ + SHOWINSYSHEADER, SHOWINSYSMACRO, DEFERRABLE, CATEGORY) \ ENUM, #define COMMENTSTART #include "clang/Basic/DiagnosticCommentKinds.inc" diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCommentKinds.td b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCommentKinds.td index ae63bb623ed3..1122ace3027d 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCommentKinds.td +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCommentKinds.td @@ -155,8 +155,8 @@ def note_add_deprecation_attr : Note< // inline contents commands -def warn_doc_inline_contents_no_argument : Warning< - "'%select{\\|@}0%1' command does not have a valid word argument">, +def warn_doc_inline_command_not_enough_arguments : Warning< + "'%select{\\|@}0%1' command has %plural{0:no|:%2}2 word argument%s2, expected %3">, InGroup<Documentation>, DefaultIgnore; // verbatim block commands diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCommonKinds.td b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCommonKinds.td index 4dff3379ed35..08bb1d81ba29 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCommonKinds.td +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCommonKinds.td @@ -55,15 +55,25 @@ def err_expected_colon_after_setter_name : Error< def err_expected_string_literal : Error<"expected string literal " "%select{in %1|for diagnostic message in static_assert|" "for optional message in 'availability' attribute|" - "for %select{language|source container}1 name in " - "'external_source_symbol' attribute}0">; + "for %select{language name|source container name|USR}1 in " + "'external_source_symbol' attribute|" + "as argument of '%1' attribute}0">; + def err_invalid_string_udl : Error< "string literal with user-defined suffix cannot be used here">; def err_invalid_character_udl : Error< "character literal with user-defined suffix cannot be used here">; def err_invalid_numeric_udl : Error< "numeric literal with user-defined suffix cannot be used here">; - +def warn_pragma_debug_missing_argument : Warning< + "missing argument to debug command '%0'">, InGroup<IgnoredPragmas>; +def warn_pragma_debug_unexpected_argument : Warning< + "unexpected argument to debug command">, InGroup<IgnoredPragmas>; + +def warn_fp_nan_inf_when_disabled : Warning< + "use of %select{infinity|NaN}0%select{| via a macro}1 is undefined behavior " + "due to the currently enabled floating-point options">, + InGroup<DiagGroup<"nan-infinity-disabled", [], NanInfDisabledDocs>>; } // Parse && Sema @@ -117,13 +127,21 @@ def note_pragma_entered_here : Note<"#pragma entered here">; def note_decl_hiding_tag_type : Note< "%1 %0 is hidden by a non-type declaration of %0 here">; def err_attribute_not_type_attr : Error< - "%0 attribute cannot be applied to types">; + "%0%select{ attribute|}1 cannot be applied to types">; def err_enum_template : Error<"enumeration cannot be a template">; def warn_cxx20_compat_consteval : Warning< "'consteval' specifier is incompatible with C++ standards before C++20">, InGroup<CXX20Compat>, DefaultIgnore; - +def warn_missing_type_specifier : Warning< + "type specifier missing, defaults to 'int'">, + InGroup<ImplicitInt>, DefaultIgnore; + +def ext_c_empty_initializer : Extension< + "use of an empty initializer is a C23 extension">, InGroup<C23>; +def warn_c23_compat_empty_initializer : Warning< + "use of an empty initializer is incompatible with C standards before C23">, + InGroup<CPre23Compat>, DefaultIgnore; } let CategoryName = "Nullability Issue" in { @@ -145,15 +163,26 @@ def warn_conflicting_nullability_attr_overriding_param_types : Warning< def err_nullability_conflicting : Error< "nullability specifier %0 conflicts with existing specifier %1">; +def warn_incompatible_branch_protection_option: Warning < + "'-mbranch-protection=' option is incompatible with the '%0' architecture">, + InGroup<BranchProtection>; + +def warn_target_unsupported_branch_protection_attribute: Warning < + "ignoring the 'branch-protection' attribute because the '%0' architecture does not support it">, + InGroup<BranchProtection>; } // OpenCL Section 6.8.g def err_opencl_unknown_type_specifier : Error< - "%select{OpenCL C|C++ for OpenCL}0 version %1 does not support the " - "'%2' %select{type qualifier|storage class specifier}3">; + "%0 does not support the '%1' " + "%select{type qualifier|storage class specifier}2">; def warn_unknown_attribute_ignored : Warning< "unknown attribute %0 ignored">, InGroup<UnknownAttributes>; +def warn_attribute_ignored : Warning<"%0 attribute ignored">, + InGroup<IgnoredAttributes>; +def err_keyword_not_supported_on_target : Error< + "%0 is not supported on this target">; def err_use_of_tag_name_without_tag : Error< "must use '%1' tag to refer to type %0%select{| in this scope}2">; @@ -189,17 +218,23 @@ def ext_cxx11_longlong : Extension< def warn_cxx98_compat_longlong : Warning< "'long long' is incompatible with C++98">, InGroup<CXX98CompatPedantic>, DefaultIgnore; -def ext_cxx2b_size_t_suffix : ExtWarn< - "'size_t' suffix for literals is a C++2b extension">, - InGroup<CXX2b>; +def ext_cxx23_size_t_suffix : ExtWarn< + "'size_t' suffix for literals is a C++23 extension">, + InGroup<CXX23>; def warn_cxx20_compat_size_t_suffix : Warning< "'size_t' suffix for literals is incompatible with C++ standards before " - "C++2b">, InGroup<CXXPre2bCompat>, DefaultIgnore; -def err_cxx2b_size_t_suffix: Error< - "'size_t' suffix for literals is a C++2b feature">; + "C++23">, InGroup<CXXPre23Compat>, DefaultIgnore; +def err_cxx23_size_t_suffix: Error< + "'size_t' suffix for literals is a C++23 feature">; def err_size_t_literal_too_large: Error< "%select{signed |}0'size_t' literal is out of range of possible " "%select{signed |}0'size_t' values">; +def ext_c23_bitint_suffix : ExtWarn< + "'_BitInt' suffix for literals is a C23 extension">, + InGroup<C23>; +def warn_c23_compat_bitint_suffix : Warning< + "'_BitInt' suffix for literals is incompatible with C standards before C23">, + InGroup<CPre23Compat>, DefaultIgnore; def err_integer_literal_too_large : Error< "integer literal is too large to be represented in any %select{signed |}0" "integer type">; @@ -229,8 +264,6 @@ def ext_clang_diagnose_if : Extension<"'diagnose_if' is a clang extension">, InGroup<GccCompat>; def err_too_large_for_fixed_point : Error< "this value is too large for this fixed point type">; -def err_fixed_point_not_enabled : Error<"compile with " - "'-ffixed-point' to enable fixed point types">; def err_unimplemented_conversion_with_fixed_point_type : Error< "conversion between fixed point and %0 is not yet supported">; @@ -252,34 +285,37 @@ def note_constexpr_invalid_template_arg : Note< "%select{type_info object|string literal|temporary object|" "predefined '%3' variable}2 is not allowed in a template argument">; def err_constexpr_invalid_template_arg : Error< - note_constexpr_invalid_template_arg.Text>; + note_constexpr_invalid_template_arg.Summary>; // Sema && Frontend let CategoryName = "Inline Assembly Issue" in { - def err_asm_invalid_type_in_input : Error< - "invalid type %0 in asm input for constraint '%1'">; +def err_asm_invalid_type_in_input : Error< + "invalid type %0 in asm input for constraint '%1'">; - def err_asm_invalid_type : Error< - "invalid type %0 in asm %select{input|output}1">; +def err_asm_invalid_type : Error< + "invalid type %0 in asm %select{input|output}1">; - def warn_stack_clash_protection_inline_asm : Warning< - "Unable to protect inline asm that clobbers stack pointer against stack clash">, - InGroup<DiagGroup<"stack-protector">>; +def err_ms_asm_bitfield_unsupported : Error< + "an inline asm block cannot have an operand which is a bit-field">; - def warn_slh_does_not_support_asm_goto - : Warning<"Speculative load hardening does not protect functions with " - "asm goto">, - InGroup<DiagGroup<"slh-asm-goto">>; +def warn_stack_clash_protection_inline_asm : Warning< + "unable to protect inline asm that clobbers stack pointer against stack " + "clash">, InGroup<DiagGroup<"stack-protector">>; + +def warn_slh_does_not_support_asm_goto : Warning< + "speculative load hardening does not protect functions with asm goto">, + InGroup<DiagGroup<"slh-asm-goto">>; } // Sema && Serialization def warn_dup_category_def : Warning< - "duplicate definition of category %1 on interface %0">; + "duplicate definition of category %1 on interface %0">, + InGroup<DiagGroup<"objc-duplicate-category-definition">>; // Targets def err_target_unknown_triple : Error< - "unknown target triple '%0', please use -triple or -arch">; + "unknown target triple '%0'">; def err_target_unknown_cpu : Error<"unknown target CPU '%0'">; def note_valid_options : Note<"valid target CPU values are: %0">; def err_target_unsupported_cpu_for_micromips : Error< @@ -298,30 +334,54 @@ def err_target_unsupported_unaligned : Error< "the %0 sub-architecture does not support unaligned accesses">; def err_target_unsupported_execute_only : Error< "execute only is not supported for the %0 sub-architecture">; +def err_target_unsupported_tp_hard : Error< + "hardware TLS register is not supported for the %0 sub-architecture">; def err_target_unsupported_mcmse : Error< "-mcmse is not supported for %0">; def err_opt_not_valid_with_opt : Error< "option '%0' cannot be specified with '%1'">; +def err_opt_not_valid_with_opt_on_target : Error< + "option '%0' cannot be specified with '%1' for the %2 sub-architecture">; def err_opt_not_valid_without_opt : Error< "option '%0' cannot be specified without '%1'">; def err_opt_not_valid_on_target : Error< "option '%0' cannot be specified on this target">; +def err_invalid_feature_combination : Error< + "invalid feature combination: %0">; +def warn_invalid_feature_combination : Warning< + "invalid feature combination: %0">, InGroup<DiagGroup<"invalid-feature-combination">>; +def warn_target_unrecognized_env : Warning< + "mismatch between architecture and environment in target triple '%0'; did you mean '%1'?">, + InGroup<InvalidCommandLineArgument>; +def warn_knl_knm_isa_support_removed : Warning< + "KNL, KNM related Intel Xeon Phi CPU's specific ISA's supports will be removed in LLVM 19.">, + InGroup<DiagGroup<"knl-knm-isa-support-removed">>; // Source manager def err_cannot_open_file : Error<"cannot open file '%0': %1">, DefaultFatal; def err_file_modified : Error< "file '%0' modified since it was first processed">, DefaultFatal; def err_file_too_large : Error< - "sorry, unsupported: file '%0' is too large for Clang to process">; -def err_include_too_large : Error< - "sorry, this include generates a translation unit too large for" - " Clang to process.">, DefaultFatal; + "file '%0' is too large for Clang to process">; +def err_sloc_space_too_large : Error< + "translation unit is too large for Clang to process: ran out of source locations">, DefaultFatal; def err_unsupported_bom : Error<"%0 byte order mark detected in '%1', but " "encoding is not supported">, DefaultFatal; def err_unable_to_rename_temp : Error< "unable to rename temporary '%0' to output file '%1': '%2'">; def err_unable_to_make_temp : Error< "unable to make temporary file: %0">; +def remark_sloc_usage : Remark< + "source manager location address space usage:">, + InGroup<DiagGroup<"sloc-usage">>, DefaultRemark, ShowInSystemHeader; +def note_total_sloc_usage : Note< + "%0B in local locations, %1B in locations loaded from AST files, for a total " + "of %2B (%3%% of available space)">; +def note_file_sloc_usage : Note< + "file entered %0 time%s0 using %1B of space" + "%plural{0:|: plus %2B for macro expansions}2">; +def note_file_misc_sloc_usage : Note< + "%0 additional files entered using a total of %1B of space">; // Modules def err_module_format_unhandled : Error< @@ -337,6 +397,19 @@ def note_mt_message : Note<"[rewriter] %0">; def warn_arcmt_nsalloc_realloc : Warning<"[rewriter] call returns pointer to GC managed memory; it will become unmanaged in ARC">; def err_arcmt_nsinvocation_ownership : Error<"NSInvocation's %0 is not safe to be used with an object with ownership other than __unsafe_unretained">; +// API notes +def err_apinotes_message : Error<"%0">; +def warn_apinotes_message : Warning<"%0">, InGroup<DiagGroup<"apinotes">>; +def note_apinotes_message : Note<"%0">; + +class NonportablePrivateAPINotesPath : Warning< + "private API notes file for module '%0' should be named " + "'%0_private.apinotes', not '%1'">; +def warn_apinotes_private_case : NonportablePrivateAPINotesPath, + InGroup<DiagGroup<"nonportable-private-apinotes-path">>; +def warn_apinotes_private_case_system : NonportablePrivateAPINotesPath, + DefaultIgnore, InGroup<DiagGroup<"nonportable-private-system-apinotes-path">>; + // C++ for OpenCL. def err_openclcxx_not_supported : Error< "'%0' is not supported in C++ for OpenCL">; @@ -371,4 +444,13 @@ def err_opencl_extension_and_feature_differs : Error< "options %0 and %1 are set to different values">; def err_opencl_feature_requires : Error< "feature %0 requires support of %1 feature">; + +def warn_throw_not_valid_on_target : Warning< + "target '%0' does not support exception handling;" + " 'throw' is assumed to be never reached">, + InGroup<OpenMPTargetException>; +def warn_try_not_valid_on_target : Warning< + "target '%0' does not support exception handling;" + " 'catch' block is ignored">, + InGroup<OpenMPTargetException>; } diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCrossTU.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCrossTU.h index ded85ec3f840..4341bf327b69 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCrossTU.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCrossTU.h @@ -15,7 +15,7 @@ namespace clang { namespace diag { enum { #define DIAG(ENUM, FLAGS, DEFAULT_MAPPING, DESC, GROUP, SFINAE, NOWERROR, \ - SHOWINSYSHEADER, DEFERRABLE, CATEGORY) \ + SHOWINSYSHEADER, SHOWINSYSMACRO, DEFERRABLE, CATEGORY) \ ENUM, #define CROSSTUSTART #include "clang/Basic/DiagnosticCrossTUKinds.inc" diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCrossTUKinds.td b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCrossTUKinds.td index 4277a3173203..e6ea1956f98a 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCrossTUKinds.td +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticCrossTUKinds.td @@ -12,8 +12,8 @@ def err_ctu_error_opening : Error< "error opening '%0': required by the CrossTU functionality">; def err_extdefmap_parsing : Error< - "error parsing index file: '%0' line: %1 'UniqueID filename' format " - "expected">; + "error parsing index file: '%0' line: %1 '<USR-Length>:<USR> <File-Path>' " + "format expected">; def err_multiple_def_index : Error< "multiple definitions are found for the same key in index ">; diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticDocs.td b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticDocs.td index bf88d5d04567..8c024b5cad74 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticDocs.td +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticDocs.td @@ -81,3 +81,18 @@ Diagnostic flags }]; } +defvar GCCWriteStringsDocs = [{ +**Note:** enabling this warning in C will change the semantic behavior of the +program by treating all string literals as having type ``const char *`` +instead of ``char *``. This can cause unexpected behaviors with type-sensitive +constructs like ``_Generic``. +}]; + +defvar NanInfDisabledDocs = [{ +This warning is enabled when source code using the macros ``INFINITY`` or ``NAN`` +is compiled with floating-point options preventing these two values. This can +lead to undefined behavior. Check the order of command line arguments that modify +this behavior, such as ``-ffast-math``, ``-fhonor-infinities``, and +``-fhonor-nans`` (etc), as well as ``#pragma`` directives if this diagnostic is +generated unexpectedly. +}]; diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticDriver.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticDriver.h index cecd8fd6b4d5..6931bd46542e 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticDriver.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticDriver.h @@ -15,7 +15,7 @@ namespace clang { namespace diag { enum { #define DIAG(ENUM, FLAGS, DEFAULT_MAPPING, DESC, GROUP, SFINAE, NOWERROR, \ - SHOWINSYSHEADER, DEFERRABLE, CATEGORY) \ + SHOWINSYSHEADER, SHOWINSYSMACRO, DEFERRABLE, CATEGORY) \ ENUM, #define DRIVERSTART #include "clang/Basic/DiagnosticDriverKinds.inc" diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticDriverKinds.td b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticDriverKinds.td index fc3704303a95..094fe1950941 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticDriverKinds.td +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticDriverKinds.td @@ -16,8 +16,12 @@ def err_drv_unsupported_opt_with_suggestion : Error< "unsupported option '%0'; did you mean '%1'?">; def err_drv_unsupported_opt_for_target : Error< "unsupported option '%0' for target '%1'">; +def err_drv_unsupported_opt_for_language_mode : Error< + "unsupported option '%0' for language mode '%1'">; def err_drv_unsupported_option_argument : Error< "unsupported argument '%1' to option '%0'">; +def err_drv_unsupported_option_argument_for_target : Error< + "unsupported argument '%1' to option '%0' for target '%2'">; def err_drv_unknown_stdin_type : Error< "-E or -x required when input is from standard input">; def err_drv_unknown_stdin_type_clang_cl : Error< @@ -27,16 +31,15 @@ def err_drv_invalid_arch_name : Error< "invalid arch name '%0'">; def err_drv_invalid_riscv_arch_name : Error< "invalid arch name '%0', %1">; -def err_drv_invalid_riscv_ext_arch_name : Error< - "invalid arch name '%0', %1 '%2'">; +def err_drv_invalid_riscv_cpu_name_for_target : Error< + "cpu '%0' does not support rv%select{32|64}1">; +def warn_drv_invalid_arch_name_with_suggestion : Warning< + "ignoring invalid /arch: argument '%0'; for %select{64|32}1-bit expected one of %2">, + InGroup<UnusedCommandLineArgument>; def warn_drv_avr_mcu_not_specified : Warning< "no target microcontroller specified on command line, cannot " "link standard libraries, please pass -mmcu=<mcu name>">, InGroup<AVRRtlibLinkingQuirks>; -def warn_drv_avr_gcc_not_found: Warning< - "no avr-gcc installation can be found on the system, " - "cannot link standard libraries">, - InGroup<AVRRtlibLinkingQuirks>; def warn_drv_avr_libc_not_found: Warning< "no avr-libc installation can be found on the system, " "cannot link standard libraries">, @@ -52,38 +55,88 @@ def warn_drv_avr_stdlib_not_linked: Warning< "standard library not linked and so no interrupt vector table or " "compiler runtime routines will be linked">, InGroup<AVRRtlibLinkingQuirks>; -def err_drv_cuda_bad_gpu_arch : Error<"Unsupported CUDA gpu architecture: %0">; +def err_drv_cuda_bad_gpu_arch : Error<"unsupported CUDA gpu architecture: %0">; +def err_drv_offload_bad_gpu_arch : Error<"unsupported %0 gpu architecture: %1">; def err_drv_no_cuda_installation : Error< - "cannot find CUDA installation. Provide its path via --cuda-path, or pass " - "-nocudainc to build without CUDA includes.">; + "cannot find CUDA installation; provide its path via '--cuda-path', or pass " + "'-nocudainc' to build without CUDA includes">; def err_drv_no_cuda_libdevice : Error< - "cannot find libdevice for %0. Provide path to different CUDA installation " - "via --cuda-path, or pass -nocudalib to build without linking with libdevice.">; + "cannot find libdevice for %0; provide path to different CUDA installation " + "via '--cuda-path', or pass '-nocudalib' to build without linking with " + "libdevice">; def err_drv_no_rocm_device_lib : Error< - "cannot find ROCm device library%select{| for %1}0. Provide its path via --rocm-path or " - "--rocm-device-lib-path, or pass -nogpulib to build without ROCm device library.">; + "cannot find ROCm device library%select{| for %1|for ABI version %1}0; provide its path via " + "'--rocm-path' or '--rocm-device-lib-path', or pass '-nogpulib' to build " + "without ROCm device library">; def err_drv_no_hip_runtime : Error< - "cannot find HIP runtime. Provide its path via --rocm-path, or pass " - "-nogpuinc to build without HIP runtime.">; - -def err_drv_undetermined_amdgpu_arch : Error< - "Cannot determine AMDGPU architecture: %0. Consider passing it via --march.">; + "cannot find HIP runtime; provide its path via '--rocm-path', or pass " + "'-nogpuinc' to build without HIP runtime">; +def err_drv_no_hipstdpar_lib : Error< + "cannot find HIP Standard Parallelism Acceleration library; provide it via " + "'--hipstdpar-path'">; +def err_drv_no_hipstdpar_thrust_lib : Error< + "cannot find rocThrust, which is required by the HIP Standard Parallelism " + "Acceleration library; provide it via " + "'--hipstdpar-thrust-path'">; +def err_drv_no_hipstdpar_prim_lib : Error< + "cannot find rocPrim, which is required by the HIP Standard Parallelism " + "Acceleration library; provide it via '--hipstdpar-prim-path'">; + +def err_drv_no_hipspv_device_lib : Error< + "cannot find HIP device library%select{| for %1}0; provide its path via " + "'--hip-path' or '--hip-device-lib-path', or pass '-nogpulib' to build " + "without HIP device library">; +def err_drv_hipspv_no_hip_path : Error< + "'--hip-path' must be specified when offloading to " + "SPIR-V%select{| unless %1 is given}0.">; + +def err_drv_undetermined_gpu_arch : Error< + "cannot determine %0 architecture: %1; consider passing it via " + "'%2'">; +def warn_drv_multi_gpu_arch : Warning< + "multiple %0 architectures are detected: %1; only the first one is used for " + "'%2'">, InGroup<MultiGPU>; def err_drv_cuda_version_unsupported : Error< "GPU arch %0 is supported by CUDA versions between %1 and %2 (inclusive), " - "but installation at %3 is %4. Use --cuda-path to specify a different CUDA " - "install, pass a different GPU arch with --cuda-gpu-arch, or pass " - "--no-cuda-version-check.">; -def warn_drv_unknown_cuda_version: Warning< - "Unknown CUDA version. %0 Assuming the latest supported version %1">, + "but installation at %3 is %4; use '--cuda-path' to specify a different CUDA " + "install, pass a different GPU arch with '--cuda-gpu-arch', or pass " + "'--no-cuda-version-check'">; +def warn_drv_new_cuda_version: Warning< + "CUDA version%0 is newer than the latest%select{| partially}1 supported version %2">, + InGroup<CudaUnknownVersion>; +def warn_drv_partially_supported_cuda_version: Warning< + "CUDA version %0 is only partially supported">, InGroup<CudaUnknownVersion>; -def err_drv_cuda_host_arch : Error<"unsupported architecture '%0' for host compilation.">; -def err_drv_mix_cuda_hip : Error<"Mixed Cuda and HIP compilation is not supported.">; -def err_drv_bad_target_id : Error<"Invalid target ID: %0 (A target ID is a processor name " - "followed by an optional list of predefined features post-fixed by a plus or minus sign deliminated " - "by colon, e.g. 'gfx908:sramecc+:xnack-')">; -def err_drv_bad_offload_arch_combo : Error<"Invalid offload arch combinations: %0 and %1 (For a specific " - "processor, a feature should either exist in all offload archs, or not exist in any offload archs)">; +def err_drv_cuda_host_arch : Error< + "unsupported architecture '%0' for host compilation">; +def err_drv_mix_cuda_hip : Error< + "mixed CUDA and HIP compilation is not supported">; +def err_drv_bad_target_id : Error< + "invalid target ID '%0'; format is a processor name followed by an optional " + "colon-delimited list of features followed by an enable/disable sign (e.g., " + "'gfx908:sramecc+:xnack-')">; +def err_drv_bad_offload_arch_combo : Error< + "invalid offload arch combinations: '%0' and '%1' (for a specific processor, " + "a feature should either exist in all offload archs, or not exist in any " + "offload archs)">; +def warn_drv_unsupported_option_for_offload_arch_req_feature : Warning< + "ignoring '%0' option for offload arch '%1' as it is not currently supported " + "there. Use it with an offload arch containing '%2' instead">, + InGroup<OptionIgnored>; +def warn_drv_unsupported_option_for_target : Warning< + "ignoring '%0' option as it is not currently supported for target '%1'">, + InGroup<OptionIgnored>; +def warn_drv_unsupported_option_for_flang : Warning< + "the argument '%0' is not supported for option '%1'. Mapping to '%1%2'">, + InGroup<OptionIgnored>; +def warn_drv_unsupported_diag_option_for_flang : Warning< + "The warning option '-%0' is not supported">, + InGroup<OptionIgnored>; +def warn_drv_unsupported_option_for_processor : Warning< + "ignoring '%0' option as it is not currently supported for processor '%1'">, + InGroup<OptionIgnored>; + def err_drv_invalid_thread_model_for_target : Error< "invalid thread model '%0' in '%1' for this target">; def err_drv_invalid_linker_name : Error< @@ -96,13 +149,13 @@ def err_drv_invalid_unwindlib_name : Error< "invalid unwind library name in argument '%0'">; def err_drv_incompatible_unwindlib : Error< "--rtlib=libgcc requires --unwindlib=libgcc">; +def err_drv_incompatible_options : Error< + "the combination of '%0' and '%1' is incompatible">; def err_drv_invalid_stdlib_name : Error< "invalid library name in argument '%0'">; def err_drv_invalid_output_with_multiple_archs : Error< "cannot use '%0' output with multiple -arch options">; def err_drv_no_input_files : Error<"no input files">; -def err_drv_use_of_Z_option : Error< - "unsupported use of internal gcc -Z option '%0'">; def err_drv_output_argument_with_multiple_files : Error< "cannot specify -o when generating multiple output files">; def err_drv_out_file_argument_with_multiple_sources : Error< @@ -119,6 +172,8 @@ def err_drv_invalid_darwin_version : Error< "invalid Darwin version number: %0">; def err_drv_invalid_diagnotics_hotness_threshold : Error< "invalid argument in '%0', only integer or 'auto' is supported">; +def err_drv_invalid_diagnotics_misexpect_tolerance : Error< + "invalid argument in '%0', only integers are supported">; def err_drv_missing_argument : Error< "argument to '%0' is missing (expected %1 value%s1)">; def err_drv_invalid_Xarch_argument_with_args : Error< @@ -129,10 +184,14 @@ def err_drv_invalid_Xopenmp_target_with_args : Error< "invalid -Xopenmp-target argument: '%0', options requiring arguments are unsupported">; def err_drv_argument_only_allowed_with : Error< "invalid argument '%0' only allowed with '%1'">; +def err_drv_opt_unsupported_input_type : Error< + "'%0' invalid for input of type %1">; def err_drv_amdgpu_ieee_without_no_honor_nans : Error< "invalid argument '-mno-amdgpu-ieee' only allowed with relaxed NaN handling">; def err_drv_argument_not_allowed_with : Error< "invalid argument '%0' not allowed with '%1'">; +def err_drv_cannot_open_randomize_layout_seed_file : Error< + "cannot read randomize layout seed file '%0'">; def err_drv_invalid_version_number : Error< "invalid version number in '%0'">; def err_drv_no_linker_llvm_support : Error< @@ -163,28 +222,36 @@ def err_drv_invalid_mtp : Error< "invalid thread pointer reading mode '%0'">; def err_drv_missing_arg_mtp : Error< "missing argument to '%0'">; -def err_drv_invalid_libcxx_deployment : Error< - "invalid deployment target for -stdlib=libc++ (requires %0 or later)">; +def warn_drv_missing_plugin_name : Warning< + "missing plugin name in %0">, + InGroup<InvalidCommandLineArgument>; +def warn_drv_missing_plugin_arg : Warning< + "missing plugin argument for plugin %0 in %1">, + InGroup<InvalidCommandLineArgument>; def err_drv_invalid_argument_to_option : Error< "invalid argument '%0' to -%1">; +def err_drv_missing_sanitizer_ignorelist : Error< + "missing sanitizer ignorelist: '%0'">; def err_drv_malformed_sanitizer_ignorelist : Error< "malformed sanitizer ignorelist: '%0'">; -def err_drv_malformed_sanitizer_coverage_whitelist : Error< - "malformed sanitizer coverage whitelist: '%0'">; +def err_drv_malformed_sanitizer_coverage_allowlist : Error< + "malformed sanitizer coverage allowlist: '%0'">; def err_drv_malformed_sanitizer_coverage_ignorelist : Error< "malformed sanitizer coverage ignorelist: '%0'">; +def err_drv_malformed_sanitizer_metadata_ignorelist : Error< + "malformed sanitizer metadata ignorelist: '%0'">; +def err_drv_unsupported_static_sanitizer_darwin : Error< + "static %0 runtime is not supported on darwin">; def err_drv_duplicate_config : Error< "no more than one option '--config' is allowed">; -def err_drv_config_file_not_exist : Error< - "configuration file '%0' does not exist">; +def err_drv_cannot_open_config_file : Error< + "configuration file '%0' cannot be opened: %1">; def err_drv_config_file_not_found : Error< "configuration file '%0' cannot be found">; def note_drv_config_file_searched_in : Note< "was searched for in the directory: %0">; def err_drv_cannot_read_config_file : Error< - "cannot read configuration file '%0'">; -def err_drv_nested_config_file: Error< - "option '--config' is not allowed inside configuration file">; + "cannot read configuration file '%0': %1">; def err_drv_arg_requires_bitcode_input: Error< "option '%0' requires input to be LLVM bitcode">; @@ -193,7 +260,7 @@ def err_target_unsupported_arch def err_cpu_unsupported_isa : Error<"CPU '%0' does not support '%1' execution mode">; def err_arch_unsupported_isa - : Error<"Architecture '%0' does not support '%1' execution mode">; + : Error<"architecture '%0' does not support '%1' execution mode">; def err_drv_I_dash_not_supported : Error< "'%0' not supported, please use -iquote instead">; @@ -206,6 +273,7 @@ def warn_drv_unknown_argument_clang_cl : Warning< def warn_drv_unknown_argument_clang_cl_with_suggestion : Warning< "unknown argument ignored in clang-cl '%0'; did you mean '%1'?">, InGroup<UnknownArgument>; +def err_drv_unknown_target_triple : Error<"unknown target triple '%0'">; def warn_drv_ycyu_different_arg_clang_cl : Warning< "support for '/Yc' and '/Yu' with different filenames not implemented yet; flags ignored">, @@ -214,12 +282,17 @@ def warn_drv_yc_multiple_inputs_clang_cl : Warning< "support for '/Yc' with more than one source file not implemented yet; flag ignored">, InGroup<ClangClPch>; +def warn_drv_potentially_misspelled_joined_argument : Warning< + "joined argument treated as '%0'; did you mean '%1'?">, InGroup<UnknownArgument>; + def err_drv_invalid_value : Error<"invalid value '%1' in '%0'">; def err_drv_invalid_int_value : Error<"invalid integral value '%1' in '%0'">; def err_drv_invalid_value_with_suggestion : Error< "invalid value '%1' in '%0', expected one of: %2">; +def err_drv_alignment_not_power_of_two : Error<"alignment is not a power of 2 in '%0'">; def err_drv_invalid_remap_file : Error< "invalid option '%0' not of the form <from-file>;<to-file>">; +def err_drv_invalid_gcc_install_dir : Error<"'%0' does not contain a GCC installation">; def err_drv_invalid_gcc_output_type : Error< "invalid output type '%0' for use with gcc tool">; def err_drv_cc_print_options_failure : Error< @@ -227,12 +300,15 @@ def err_drv_cc_print_options_failure : Error< def err_drv_lto_without_lld : Error<"LTO requires -fuse-ld=lld">; def err_drv_preamble_format : Error< "incorrect format for -preamble-bytes=N,END">; +def err_drv_header_unit_extra_inputs : Error< + "multiple inputs are not valid for header units (first extra '%0')">; def warn_invalid_ios_deployment_target : Warning< "invalid iOS deployment version '%0', iOS 10 is the maximum deployment " "target for 32-bit targets">, InGroup<InvalidIOSDeploymentTarget>, DefaultError; def err_invalid_macos_32bit_deployment_target : Error< "32-bit targets are not supported when building for Mac Catalyst">; +def err_drv_invalid_os_in_arg : Error<"invalid OS value '%0' in '%1'">; def err_drv_conflicting_deployment_targets : Error< "conflicting deployment targets, both '%0' and '%1' are present in environment">; def err_arc_unsupported_on_runtime : Error< @@ -262,30 +338,45 @@ def err_drv_no_neon_modifier : Error<"[no]neon is not accepted as modifier, plea def err_drv_invalid_omp_target : Error<"OpenMP target is invalid: '%0'">; def err_drv_incompatible_omp_arch : Error<"OpenMP target architecture '%0' pointer size is incompatible with host '%1'">; def err_drv_omp_host_ir_file_not_found : Error< - "The provided host compiler IR file '%0' is required to generate code for OpenMP target regions but cannot be found.">; + "provided host compiler IR file '%0' is required to generate code for OpenMP " + "target regions but cannot be found">; def err_drv_omp_host_target_not_supported : Error< - "The target '%0' is not a supported OpenMP host target.">; + "target '%0' is not a supported OpenMP host target">; def err_drv_expecting_fopenmp_with_fopenmp_targets : Error< - "The option -fopenmp-targets must be used in conjunction with a -fopenmp option compatible with offloading, please use -fopenmp=libomp or -fopenmp=libiomp5.">; + "'-fopenmp-targets' must be used in conjunction with a '-fopenmp' option " + "compatible with offloading; e.g., '-fopenmp=libomp' or '-fopenmp=libiomp5'">; +def err_drv_failed_to_deduce_target_from_arch : Error< + "failed to deduce triple for target architecture '%0'; specify the triple " + "using '-fopenmp-targets' and '-Xopenmp-target' instead.">; def err_drv_omp_offload_target_missingbcruntime : Error< - "No library '%0' found in the default clang lib directory or in LIBRARY_PATH. Please use --libomptarget-%1-bc-path to specify %1 bitcode library.">; -def err_drv_omp_offload_target_bcruntime_not_found : Error<"Bitcode library '%0' does not exist.">; -def err_drv_omp_offload_target_cuda_version_not_support : Error<"NVPTX target requires CUDA 9.2 or above. CUDA %0 is detected.">; + "no library '%0' found in the default clang lib directory or in LIBRARY_PATH" + "; use '--libomptarget-%1-bc-path' to specify %1 bitcode library">; +def err_drv_omp_offload_target_bcruntime_not_found : Error< + "bitcode library '%0' does not exist">; +def err_drv_omp_offload_target_cuda_version_not_support : Error< + "NVPTX target requires CUDA 9.2 or above; CUDA %0 detected">; def warn_drv_omp_offload_target_duplicate : Warning< - "The OpenMP offloading target '%0' is similar to target '%1' already specified - will be ignored.">, - InGroup<OpenMPTarget>; + "OpenMP offloading target '%0' is similar to target '%1' already specified; " + "will be ignored">, InGroup<OpenMPTarget>; def err_drv_unsupported_embed_bitcode : Error<"%0 is not supported with -fembed-bitcode">; def err_drv_bitcode_unsupported_on_toolchain : Error< "-fembed-bitcode is not supported on versions of iOS prior to 6.0">; def err_drv_negative_columns : Error< - "invalid value '%1' in '%0', value must be 'none' or a positive integer">; + "invalid value '%1' in '%0', value must be 'none' or a positive integer">; def err_drv_small_columns : Error< - "invalid value '%1' in '%0', value must be '%2' or greater">; + "invalid value '%1' in '%0', value must be '%2' or greater">; def err_drv_invalid_malign_branch_EQ : Error< "invalid argument '%0' to -malign-branch=; each element must be one of: %1">; +def err_drv_print_header_env_var : Error< + "environment variable CC_PRINT_HEADERS_%select{FORMAT|FILTERING}0 has invalid value %1">; +def err_drv_print_header_env_var_combination : Error< + "unsupported combination: CC_PRINT_HEADERS_FORMAT=%0 and CC_PRINT_HEADERS_FILTERING=%1">; +def err_drv_print_header_env_var_combination_cc1 : Error< + "unsupported combination: -header-include-format=%0 and -header-include-filtering=%1">; + def warn_O4_is_O3 : Warning<"-O4 is equivalent to -O3">, InGroup<Deprecated>; def warn_drv_optimization_value : Warning<"optimization level '%0' is not supported; using '%1%2' instead">, InGroup<InvalidCommandLineArgument>; @@ -300,7 +391,8 @@ def warn_drv_unsupported_debug_info_opt_for_target : Warning< "debug information option '%0' is not supported for target '%1'">, InGroup<UnsupportedTargetOpt>; def warn_drv_dwarf_version_limited_by_target : Warning< - "debug information option '%0' is not supported. It needs DWARF-%2 but target '%1' only provides DWARF-%3.">, + "debug information option '%0' is not supported; requires DWARF-%2 but " + "target '%1' only provides DWARF-%3">, InGroup<UnsupportedTargetOpt>; def warn_c_kext : Warning< "ignoring -fapple-kext which is valid for C++ and Objective-C++ only">; @@ -319,33 +411,53 @@ def warn_drv_preprocessed_input_file_unused : Warning< def warn_drv_unused_argument : Warning< "argument unused during compilation: '%0'">, InGroup<UnusedCommandLineArgument>; +def warn_drv_unused_x : Warning< + "'-x %0' after last input file has no effect">, + InGroup<UnusedCommandLineArgument>; def warn_drv_empty_joined_argument : Warning< "joined argument expects additional value: '%0'">, InGroup<UnusedCommandLineArgument>; def warn_drv_diagnostics_hotness_requires_pgo : Warning< "argument '%0' requires profile-guided optimization information">, InGroup<UnusedCommandLineArgument>; +def warn_drv_diagnostics_misexpect_requires_pgo : Warning< + "argument '%0' requires profile-guided optimization information">, + InGroup<UnusedCommandLineArgument>; def warn_drv_clang_unsupported : Warning< "the clang compiler does not support '%0'">; def warn_drv_deprecated_arg : Warning< "argument '%0' is deprecated, use '%1' instead">, InGroup<Deprecated>; +def warn_drv_deprecated_custom : Warning< + "argument '%0' is deprecated, %1">, InGroup<Deprecated>; def warn_drv_assuming_mfloat_abi_is : Warning< "unknown platform, assuming -mfloat-abi=%0">; +def warn_drv_unsupported_float_abi_by_lib : Warning< + "float ABI '%0' is not supported by current library">, + InGroup<UnsupportedABI>; +def warn_drv_no_floating_point_registers: Warning< + "'%0': selected processor lacks floating point registers">, + InGroup<UnsupportedABI>; def warn_ignoring_ftabstop_value : Warning< "ignoring invalid -ftabstop value '%0', using default value %1">; -def warn_drv_overriding_flag_option : Warning< +def warn_drv_overriding_option : Warning< "overriding '%0' option with '%1'">, - InGroup<DiagGroup<"overriding-t-option">>; + InGroup<DiagGroup<"overriding-option">>; def warn_drv_treating_input_as_cxx : Warning< "treating '%0' input as '%1' when in C++ mode, this behavior is deprecated">, InGroup<Deprecated>; def warn_drv_pch_not_first_include : Warning< "precompiled header '%0' was ignored because '%1' is not first '-include'">; +def warn_drv_pch_ignoring_gch_file : Warning< + "precompiled header '%0' was ignored because it is not a clang PCH file">, + InGroup<IgnoredGCH>; +def warn_drv_pch_ignoring_gch_dir : Warning< + "precompiled header directory '%0' was ignored because it contains no clang PCH files">, + InGroup<IgnoredGCH>; def warn_missing_sysroot : Warning<"no such sysroot directory: '%0'">, InGroup<DiagGroup<"missing-sysroot">>; def warn_incompatible_sysroot : Warning<"using sysroot for '%0' but targeting '%1'">, InGroup<DiagGroup<"incompatible-sysroot">>; -def warn_debug_compression_unavailable : Warning<"cannot compress debug sections (zlib not installed)">, +def warn_debug_compression_unavailable : Warning<"cannot compress debug sections (%0 not enabled)">, InGroup<DiagGroup<"debug-compression-unavailable">>; def warn_drv_disabling_vptr_no_rtti_default : Warning< "implicitly disabling vptr sanitizer because rtti wasn't enabled">, @@ -357,17 +469,18 @@ def warn_ignoring_verify_debuginfo_preserve_export : Warning< "ignoring -fverify-debuginfo-preserve-export=%0 because " "-fverify-debuginfo-preserve wasn't enabled">, InGroup<UnusedCommandLineArgument>; -def err_invalid_branch_protection: Error < - "invalid branch protection option '%0' in '%1'">; -def err_invalid_sls_hardening : Error< - "invalid sls hardening option '%0' in '%1'">; +def warn_unsupported_branch_protection: Warning < + "invalid branch protection option '%0' in '%1'">, InGroup<BranchProtection>; def err_sls_hardening_arm_not_supported : Error< "-mharden-sls is only supported on armv7-a or later">; +def warn_drv_large_data_threshold_invalid_code_model: Warning< + "'%0' only applies to medium and large code models">, + InGroup<UnusedCommandLineArgument>; def note_drv_command_failed_diag_msg : Note< "diagnostic msg: %0">; def note_drv_t_option_is_global : Note< - "The last /TC or /TP option takes precedence over earlier instances">; + "the last '/TC' or '/TP' option takes precedence over earlier instances">; def note_drv_address_sanitizer_debug_runtime : Note< "AddressSanitizer doesn't support linking with debug runtime libraries yet">; def note_drv_use_standard : Note<"use '%0'" @@ -387,12 +500,25 @@ def err_analyzer_checker_option_invalid_input : Error< "invalid input for checker option '%0', that expects %1">; def err_analyzer_checker_incompatible_analyzer_option : Error< "checker cannot be enabled with analyzer option '%0' == %1">; - -def err_drv_invalid_hvx_length : Error< - "-mhvx-length is not supported without a -mhvx/-mhvx= flag">; -def warn_drv_vectorize_needs_hvx : Warning< - "auto-vectorization requires HVX, use -mhvx to enable it">, +def err_analyzer_not_built_with_z3 : Error< + "analyzer constraint manager 'z3' is only available if LLVM was built with " + "-DLLVM_ENABLE_Z3_SOLVER=ON">; +def warn_analyzer_deprecated_option : Warning< + "analyzer option '%0' is deprecated. This flag will be removed in %1, and " + "passing this option will be an error.">, + InGroup<DeprecatedStaticAnalyzerFlag>; +def warn_analyzer_deprecated_option_with_alternative : Warning< + "analyzer option '%0' is deprecated. This flag will be removed in %1, and " + "passing this option will be an error. Use '%2' instead.">, + InGroup<DeprecatedStaticAnalyzerFlag>; + +def warn_drv_needs_hvx : Warning< + "%0 requires HVX, use -mhvx/-mhvx= to enable it">, InGroup<OptionIgnored>; +def err_drv_needs_hvx : Error< + "%0 requires HVX, use -mhvx/-mhvx= to enable it">; +def err_drv_needs_hvx_version : Error< + "%0 is not supported on HVX %1">; def err_drv_module_header_wrong_kind : Error< "header file '%0' input type '%1' does not match type of prior input " @@ -405,9 +531,21 @@ def err_test_module_file_extension_format : Error< "-ftest-module-file-extension argument '%0' is not of the required form " "'blockname:major:minor:hashed:user info'">; +def err_drv_module_output_with_multiple_arch : Error< + "option '-fmodule-output' can't be used with multiple arch options">; + +def warn_drv_delayed_template_parsing_after_cxx20 : Warning< + "-fdelayed-template-parsing is deprecated after C++20">, + InGroup<DiagGroup<"delayed-template-parsing-in-cxx20">>; + +def err_drv_extract_api_wrong_kind : Error< + "header file '%0' input '%1' does not match the type of prior input " + "in api extraction; use '-x %2' to override">; + def warn_slash_u_filename : Warning<"'/U%0' treated as the '/U' option">, InGroup<DiagGroup<"slash-u-filename">>; -def note_use_dashdash : Note<"Use '--' to treat subsequent arguments as filenames">; +def note_use_dashdash : Note< + "use '--' to treat subsequent arguments as filenames">; def err_drv_ropi_rwpi_incompatible_with_pic : Error< "embedded and GOT-based position independence are incompatible">; @@ -415,7 +553,8 @@ def err_drv_ropi_incompatible_with_cxx : Error< "ROPI is not compatible with c++">; def err_stack_tagging_requires_hardware_feature : Error< - "'-fsanitize=memtag' requires hardware support (+memtag)">; + "'-fsanitize=memtag-stack' requires hardware support (+memtag). For Armv8 or " + "Armv9, try compiling with -march=armv8a+memtag or -march=armv9a+memtag">; def err_cmse_pi_are_incompatible : Error< "cmse is not compatible with %select{RWPI|ROPI}0">; @@ -463,27 +602,22 @@ def err_drv_unsupported_fpatchable_function_entry_argument : Error< "the second argument of '-fpatchable-function-entry' must be smaller than the first argument">; def warn_drv_unable_to_find_directory_expected : Warning< - "unable to find %0 directory, expected to be in '%1'">, + "unable to find %0 directory, expected to be in '%1' found via %2">, InGroup<InvalidOrNonExistentDirectory>, DefaultIgnore; -def warn_drv_ps4_force_pic : Warning< - "option '%0' was ignored by the PS4 toolchain, using '-fPIC'">, +def warn_drv_ps_force_pic : Warning< + "option '%0' was ignored by the %1 toolchain, using '-fPIC'">, InGroup<OptionIgnored>; -def warn_drv_ps4_sdk_dir : Warning< - "environment variable SCE_ORBIS_SDK_DIR is set, but points to invalid or nonexistent directory '%0'">, - InGroup<InvalidOrNonExistentDirectory>; - -def err_drv_unsupported_linker : Error<"unsupported value '%0' for -linker option">; def err_drv_defsym_invalid_format : Error<"defsym must be of the form: sym=value: %0">; -def err_drv_defsym_invalid_symval : Error<"Value is not an integer: %0">; +def err_drv_defsym_invalid_symval : Error<"value is not an integer: %0">; def warn_drv_msvc_not_found : Warning< "unable to find a Visual Studio installation; " "try running Clang from a developer command prompt">, InGroup<DiagGroup<"msvc-not-found">>; def warn_drv_fuse_ld_path : Warning< - "'-fuse-ld=' taking a path is deprecated. Use '--ld-path=' instead">, + "'-fuse-ld=' taking a path is deprecated; use '--ld-path=' instead">, InGroup<FUseLdPath>, DefaultIgnore; def warn_drv_fine_grained_bitfield_accesses_ignored : Warning< @@ -503,37 +637,45 @@ def warn_drv_global_isel_incomplete_opt : Warning< InGroup<GlobalISel>; def warn_drv_moutline_unsupported_opt : Warning< - "The '%0' architecture does not support -moutline; flag ignored">, + "'%0' does not support '-moutline'; flag ignored">, InGroup<OptionIgnored>; def warn_drv_moutline_atomics_unsupported_opt : Warning< - "The '%0' architecture does not support -moutline-atomics; flag ignored">, + "'%0' does not support '-%1'; flag ignored">, InGroup<OptionIgnored>; def warn_drv_darwin_sdk_invalid_settings : Warning< "SDK settings were ignored as 'SDKSettings.json' could not be parsed">, InGroup<DiagGroup<"darwin-sdk-settings">>; -def err_drv_trivial_auto_var_init_zero_disabled : Error< - "-ftrivial-auto-var-init=zero hasn't been enabled. Enable it at your own peril for benchmarking purpose only with " - "-enable-trivial-auto-var-init-zero-knowing-it-will-be-removed-from-clang">; +def err_drv_darwin_sdk_missing_arclite : Error< + "SDK does not contain 'libarclite' at the path '%0'; try increasing the minimum deployment target">; def err_drv_trivial_auto_var_init_stop_after_missing_dependency : Error< - "-ftrivial-auto-var-init-stop-after=* is used without -ftrivial-auto-var-init=zero or -ftrivial-auto-var-init=pattern.">; + "'-ftrivial-auto-var-init-stop-after=*' is used without " + "'-ftrivial-auto-var-init=zero' or '-ftrivial-auto-var-init=pattern'">; def err_drv_trivial_auto_var_init_stop_after_invalid_value : Error< - "-ftrivial-auto-var-init-stop-after=* only accepts positive integers.">; + "'-ftrivial-auto-var-init-stop-after=*' only accepts positive integers">; -def warn_drv_msp430_hwmult_unsupported : Warning<"the given MCU does not " - "support hardware multiply, but -mhwmult is set to %0.">, - InGroup<InvalidCommandLineArgument>; -def warn_drv_msp430_hwmult_mismatch : Warning<"the given MCU supports %0 " - "hardware multiply, but -mhwmult is set to %1.">, +def err_drv_trivial_auto_var_init_max_size_missing_dependency : Error< + "'-ftrivial-auto-var-init-max-size=*' is used without " + "'-ftrivial-auto-var-init=zero' or '-ftrivial-auto-var-init=pattern'">; + +def err_drv_trivial_auto_var_init_max_size_invalid_value : Error< + "'-ftrivial-auto-var-init-max-size=*' only accepts positive integers (in bytes)">; + +def warn_drv_msp430_hwmult_unsupported : Warning< + "the given MCU does not support hardware multiply, but '-mhwmult' is set to " + "%0">, InGroup<InvalidCommandLineArgument>; +def warn_drv_msp430_hwmult_mismatch : Warning< + "the given MCU supports %0 hardware multiply, but '-mhwmult' is set to %1">, InGroup<InvalidCommandLineArgument>; -def warn_drv_msp430_hwmult_no_device : Warning<"no MCU device specified, but " - "'-mhwmult' is set to 'auto', assuming no hardware multiply. Use -mmcu to " - "specify a MSP430 device, or -mhwmult to set hardware multiply type " - "explicitly.">, InGroup<InvalidCommandLineArgument>; +def warn_drv_msp430_hwmult_no_device : Warning< + "no MCU device specified, but '-mhwmult' is set to 'auto', assuming no " + "hardware multiply; use '-mmcu' to specify an MSP430 device, or '-mhwmult' " + "to set the hardware multiply type explicitly">, + InGroup<InvalidCommandLineArgument>; def warn_drv_libstdcxx_not_found : Warning< "include path for libstdc++ headers not found; pass '-stdlib=libc++' on the " @@ -542,17 +684,118 @@ def warn_drv_libstdcxx_not_found : Warning< def err_drv_cannot_mix_options : Error<"cannot specify '%1' along with '%0'">; -def err_drv_invalid_object_mode : Error<"OBJECT_MODE setting %0 is not recognized and is not a valid setting.">; +def err_drv_invalid_object_mode : Error< + "OBJECT_MODE setting %0 is not recognized and is not a valid setting">; def err_aix_unsupported_tls_model : Error<"TLS model '%0' is not yet supported on AIX">; +def err_roptr_requires_data_sections: Error<"-mxcoff-roptr is supported only with -fdata-sections">; +def err_roptr_cannot_build_shared: Error<"-mxcoff-roptr is not supported with -shared">; -def err_invalid_cxx_abi : Error<"Invalid C++ ABI name '%0'">; +def err_invalid_cxx_abi : Error<"invalid C++ ABI name '%0'">; def err_unsupported_cxx_abi : Error<"C++ ABI '%0' is not supported on target triple '%1'">; -def note_cc1_round_trip_original : Note<"Original arguments in round-trip: %0">; -def note_cc1_round_trip_generated : Note<"Generated arguments #%0 in round-trip: %1">; -def remark_cc1_round_trip_generated : Remark<"Generated arguments #%0 in round-trip: %1">, InGroup<RoundTripCC1Args>; -def err_cc1_round_trip_fail_then_ok : Error<"Original arguments parse failed, then succeeded in round-trip">; -def err_cc1_round_trip_ok_then_fail : Error<"Generated arguments parse failed in round-trip">; -def err_cc1_round_trip_mismatch : Error<"Generated arguments do not match in round-trip">; +def note_cc1_round_trip_original : Note<"original arguments in round-trip: %0">; +def note_cc1_round_trip_generated : Note< + "generated arguments #%0 in round-trip: %1">; +def remark_cc1_round_trip_generated : Remark< + "generated arguments #%0 in round-trip: %1">, InGroup<RoundTripCC1Args>; +def err_cc1_round_trip_fail_then_ok : Error< + "original arguments parse failed, then succeeded in round-trip">; +def err_cc1_round_trip_ok_then_fail : Error< + "generated arguments parse failed in round-trip">; +def err_cc1_round_trip_mismatch : Error< + "generated arguments do not match in round-trip">; +def err_cc1_unbounded_vscale_min : Error< + "minimum vscale must be an unsigned integer greater than 0">; + +def err_drv_using_omit_rtti_component_without_no_rtti : Error< + "-fexperimental-omit-vtable-rtti call only be used with -fno-rtti">; + +def err_drv_ssp_missing_offset_argument : Error< + "'%0' is used without '-mstack-protector-guard-offset', and there is no default">; + +def err_drv_only_one_offload_target_supported : Error< + "only one offload target is supported">; +def err_drv_invalid_or_unsupported_offload_target : Error< + "invalid or unsupported offload target: '%0'">; +def err_drv_cuda_offload_only_emit_bc : Error< + "CUDA offload target is supported only along with --emit-llvm">; + +def warn_drv_jmc_requires_debuginfo : Warning< + "%0 requires debug info. Use %1 or debug options that enable debugger's " + "stepping function; option ignored">, + InGroup<OptionIgnored>; + +def warn_drv_fjmc_for_elf_only : Warning< + "-fjmc works only for ELF; option ignored">, + InGroup<OptionIgnored>; + +def warn_target_override_arm64ec : Warning< + "/arm64EC has been overridden by specified target: %0; option ignored">, + InGroup<OptionIgnored>; + +def err_drv_target_variant_invalid : Error< + "unsupported '%0' value '%1'; use 'ios-macabi' instead">; + +def err_drv_invalid_directx_shader_module : Error< + "invalid profile : %0">; +def err_drv_dxc_missing_target_profile : Error< + "target profile option (-T) is missing">; +def err_drv_hlsl_unsupported_target : Error< + "HLSL code generation is unsupported for target '%0'">; +def err_drv_hlsl_bad_shader_required_in_target : Error< + "%select{shader model|Vulkan environment|shader stage}0 is required as %select{OS|environment}1 in target '%2' for HLSL code generation">; + +def err_drv_hlsl_bad_shader_unsupported : Error< + "%select{shader model|Vulkan environment|shader stage}0 '%1' in target '%2' is invalid for HLSL code generation">; +def warn_drv_dxc_missing_dxv : Warning<"dxv not found. " + "Resulting DXIL will not be validated or signed for use in release environments.">, + InGroup<DXILValidation>; + +def err_drv_invalid_range_dxil_validator_version : Error< + "invalid validator version : %0\n" + "Validator version must be less than or equal to current internal version.">; +def err_drv_invalid_format_dxil_validator_version : Error< + "invalid validator version : %0\n" + "Format of validator version is \"<major>.<minor>\" (ex:\"1.4\").">; +def err_drv_invalid_empty_dxil_validator_version : Error< + "invalid validator version : %0\n" + "If validator major version is 0, minor version must also be 0.">; + +def warn_drv_sarif_format_unstable : Warning< + "diagnostic formatting in SARIF mode is currently unstable">, + InGroup<DiagGroup<"sarif-format-unstable">>; + +def err_drv_riscv_unsupported_with_linker_relaxation : Error< + "%0 is unsupported with RISC-V linker relaxation (-mrelax)">; + +def warn_drv_loongarch_conflicting_implied_val : Warning< + "ignoring '%0' as it conflicts with that implied by '%1' (%2)">, + InGroup<OptionIgnored>; +def err_drv_loongarch_invalid_mfpu_EQ : Error< + "invalid argument '%0' to -mfpu=; must be one of: 64, 32, none, 0 (alias for none)">; +def err_drv_loongarch_wrong_fpu_width_for_lsx : Error< + "wrong fpu width; LSX depends on 64-bit FPU.">; +def err_drv_loongarch_wrong_fpu_width_for_lasx : Error< + "wrong fpu width; LASX depends on 64-bit FPU.">; +def err_drv_loongarch_invalid_simd_option_combination : Error< + "invalid option combination; LASX depends on LSX.">; + +def err_drv_expand_response_file : Error< + "failed to expand response file: %0">; + +def warn_drv_missing_multilib : Warning< + "no multilib found matching flags: %0">, + InGroup<DiagGroup<"missing-multilib">>; +def note_drv_available_multilibs : Note< + "available multilibs are:%0">; + +def warn_android_unversioned_fallback : Warning< + "Using unversioned Android target directory %0 for target %1. Unversioned" + " directories will not be used in Clang 19. Provide a versioned directory" + " for the target version or lower instead.">, + InGroup<DiagGroup<"android-unversioned-fallback">>; + +def err_drv_triple_version_invalid : Error< + "version '%0' in target triple '%1' is invalid">; } diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticError.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticError.h index 430da6f724ed..744f7fe19db7 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticError.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticError.h @@ -6,11 +6,12 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_CLANG_BASIC_DIAGNOSTIC_ERROR_H -#define LLVM_CLANG_BASIC_DIAGNOSTIC_ERROR_H +#ifndef LLVM_CLANG_BASIC_DIAGNOSTICERROR_H +#define LLVM_CLANG_BASIC_DIAGNOSTICERROR_H #include "clang/Basic/PartialDiagnostic.h" #include "llvm/Support/Error.h" +#include <optional> namespace clang { @@ -34,10 +35,10 @@ public: } /// Extracts and returns the diagnostic payload from the given \c Error if - /// the error is a \c DiagnosticError. Returns none if the given error is not - /// a \c DiagnosticError. - static Optional<PartialDiagnosticAt> take(llvm::Error &Err) { - Optional<PartialDiagnosticAt> Result; + /// the error is a \c DiagnosticError. Returns std::nullopt if the given error + /// is not a \c DiagnosticError. + static std::optional<PartialDiagnosticAt> take(llvm::Error &Err) { + std::optional<PartialDiagnosticAt> Result; Err = llvm::handleErrors(std::move(Err), [&](DiagnosticError &E) { Result = std::move(E.getDiagnostic()); }); @@ -57,4 +58,4 @@ private: } // end namespace clang -#endif // LLVM_CLANG_BASIC_DIAGNOSTIC_ERROR_H +#endif // LLVM_CLANG_BASIC_DIAGNOSTICERROR_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticFrontend.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticFrontend.h index f57c587fb469..ab4e855f2de0 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticFrontend.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticFrontend.h @@ -15,7 +15,7 @@ namespace clang { namespace diag { enum { #define DIAG(ENUM, FLAGS, DEFAULT_MAPPING, DESC, GROUP, SFINAE, NOWERROR, \ - SHOWINSYSHEADER, DEFERRABLE, CATEGORY) \ + SHOWINSYSHEADER, SHOWINSYSMACRO, DEFERRABLE, CATEGORY) \ ENUM, #define FRONTENDSTART #include "clang/Basic/DiagnosticFrontendKinds.inc" diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticFrontendKinds.td b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticFrontendKinds.td index 0f4ccec38550..85ecfdf9de62 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticFrontendKinds.td +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticFrontendKinds.td @@ -11,7 +11,7 @@ class BackendInfo : CatBackend, ShowInSystemHeader; let Component = "Frontend" in { def err_fe_error_opening : Error<"error opening '%0': %1">; -def err_fe_error_reading : Error<"error reading '%0'">; +def err_fe_error_reading : Error<"error reading '%0': %1">; def err_fe_error_reading_stdin : Error<"error reading stdin: %0">; def err_fe_error_backend : Error<"error in backend: %0">, DefaultFatal; @@ -22,10 +22,11 @@ def note_fe_inline_asm_here : Note<"instantiated into assembly here">; def err_fe_source_mgr : Error<"%0">, CatSourceMgr; def warn_fe_source_mgr : Warning<"%0">, CatSourceMgr, InGroup<BackendSourceMgr>; def note_fe_source_mgr : Note<"%0">, CatSourceMgr; -def err_fe_cannot_link_module : Error<"cannot link module '%0': %1">, - DefaultFatal; +def err_fe_linking_module : Error<"cannot link module '%0': %1">, DefaultFatal; +def warn_fe_linking_module : Warning<"linking module '%0': %1">, InGroup<LinkerWarnings>; +def note_fe_linking_module : Note<"linking module '%0': %1">; -def warn_fe_frame_larger_than : Warning<"stack frame size (%0) exceeds limit (%1) in %q2">, +def warn_fe_frame_larger_than : Warning<"stack frame size (%0) exceeds limit (%1) in '%2'">, BackendInfo, InGroup<BackendFrameLargerThan>; def warn_fe_backend_frame_larger_than: Warning<"%0">, BackendInfo, InGroup<BackendFrameLargerThan>; @@ -34,6 +35,11 @@ def note_fe_backend_frame_larger_than: Note<"%0">, BackendInfo; def warn_fe_backend_plugin: Warning<"%0">, BackendInfo, InGroup<BackendPlugin>; def err_fe_backend_plugin: Error<"%0">, BackendInfo; + +def warn_fe_backend_resource_limit: Warning<"%0 (%1) exceeds limit (%2) in '%3'">, BackendInfo, InGroup<BackendPlugin>; +def err_fe_backend_resource_limit: Error<"%0 (%1) exceeds limit (%2) in '%3'">, BackendInfo; +def note_fe_backend_resource_limit: Note<"%0 (%1) exceeds limit (%2) in '%3'">, BackendInfo; + def remark_fe_backend_plugin: Remark<"%0">, BackendInfo, InGroup<RemarkBackendPlugin>; def note_fe_backend_plugin: Note<"%0">, BackendInfo; @@ -46,6 +52,16 @@ def warn_fe_backend_unsupported_fp_rounding : Warning< def warn_fe_backend_unsupported_fp_exceptions : Warning< "overriding currently unsupported use of floating point exceptions " "on this target">, InGroup<UnsupportedFPOpt>; +def warn_fe_backend_invalid_feature_flag : Warning< + "feature flag '%0' must start with either '+' to enable the feature or '-'" + " to disable it; flag ignored">, InGroup<InvalidCommandLineArgument>; +def warn_fe_backend_readonly_feature_flag : Warning< + "feature flag '%0' is ignored since the feature is read only">, + InGroup<InvalidCommandLineArgument>; + +def err_incompatible_fp_eval_method_options : Error< + "option 'ffp-eval-method' cannot be used with option " + "%select{'fapprox-func'|'mreassociate'|'freciprocal'}0">; def remark_fe_backend_optimization_remark : Remark<"%0">, BackendInfo, InGroup<BackendOptimizationRemark>; @@ -64,6 +80,7 @@ def remark_fe_backend_optimization_remark_analysis_aliasing : Remark<"%0; " "the '__restrict__' qualifier with the independent array arguments. " "Erroneous results will occur if these options are incorrectly applied!">, BackendInfo, InGroup<BackendOptimizationRemarkAnalysis>; + def warn_fe_backend_optimization_failure : Warning<"%0">, BackendInfo, InGroup<BackendOptimizationFailure>, DefaultWarn; def note_fe_backend_invalid_loc : Note<"could " @@ -72,6 +89,12 @@ def note_fe_backend_invalid_loc : Note<"could " def err_fe_backend_unsupported : Error<"%0">, BackendInfo; def warn_fe_backend_unsupported : Warning<"%0">, BackendInfo; +def err_fe_backend_error_attr : + Error<"call to '%0' declared with 'error' attribute: %1">, BackendInfo; +def warn_fe_backend_warning_attr : + Warning<"call to '%0' declared with 'warning' attribute: %1">, BackendInfo, + InGroup<BackendWarningAttributes>; + def err_fe_invalid_code_complete_file : Error< "cannot locate code-completion file %0">, DefaultFatal; def err_fe_dependency_file_requires_MT : Error< @@ -113,9 +136,8 @@ def err_fe_invalid_alignment : Error< "invalid value '%1' in '%0'; alignment must be a power of 2">; def err_fe_invalid_exception_model : Error<"invalid exception model '%select{none|sjlj|seh|dwarf|wasm}0' for target '%1'">; -def warn_fe_concepts_ts_flag : Warning< - "-fconcepts-ts is deprecated - use '-std=c++20' for Concepts support">, - InGroup<Deprecated>; +def err_fe_invalid_source_date_epoch : Error< + "environment variable 'SOURCE_DATE_EPOCH' ('%0') must be a non-negative decimal integer <= %1">; def err_fe_unable_to_load_basic_block_sections_file : Error< "unable to load basic block sections function list: '%0'">; @@ -145,7 +167,7 @@ def err_verify_no_such_marker : Error< def err_verify_missing_start : Error< "cannot find start ('{{') of expected %0">; def err_verify_missing_end : Error< - "cannot find end ('}}') of expected %0">; + "cannot find end ('%1') of expected %0">; def err_verify_invalid_content : Error< "invalid expected %0: %1">; def err_verify_missing_regex : Error< @@ -191,10 +213,7 @@ def note_incompatible_analyzer_plugin_api : Note< def err_module_build_requires_fmodules : Error< "module compilation requires '-fmodules'">; def err_module_interface_requires_cpp_modules : Error< - "module interface compilation requires '-std=c++20' or '-fmodules-ts'">; -def err_header_module_requires_modules : Error< - "header module compilation requires '-fmodules', '-std=c++20', or " - "'-fmodules-ts'">; + "module interface compilation requires '-std=c++20'">; def warn_module_config_mismatch : Warning< "module file %0 cannot be loaded due to a configuration mismatch with the current " "compilation">, InGroup<DiagGroup<"module-file-config-mismatch">>, DefaultError; @@ -226,9 +245,13 @@ def warn_module_config_macro_undef : Warning< def note_module_def_undef_here : Note< "macro was %select{defined|#undef'd}0 here">; def remark_module_build : Remark<"building module '%0' as '%1'">, + ShowInSystemHeader, InGroup<ModuleBuild>; def remark_module_build_done : Remark<"finished building module '%0'">, + ShowInSystemHeader, InGroup<ModuleBuild>; +def remark_module_lock : Remark<"locking '%0' to build module '%1'">, + InGroup<ModuleLock>; def err_modules_embed_file_not_found : Error<"file '%0' specified by '-fmodules-embed-file=' not found">, DefaultFatal; @@ -239,13 +262,18 @@ def err_test_module_file_extension_version : Error< "test module file extension '%0' has different version (%1.%2) than expected " "(%3.%4)">; +def warn_eagerly_load_for_standard_cplusplus_modules : Warning< + "the form '-fmodule-file=<BMI-path>' is deprecated for standard C++ named modules;" + "consider to use '-fmodule-file=<module-name>=<BMI-path>' instead">, + InGroup<DiagGroup<"eager-load-cxx-named-modules">>; + def err_missing_vfs_overlay_file : Error< "virtual filesystem overlay file '%0' not found">, DefaultFatal; def err_invalid_vfs_overlay : Error< "invalid virtual filesystem overlay file '%0'">, DefaultFatal; def warn_option_invalid_ocl_version : Warning< - "OpenCL version %0 does not support the option '%1'">, InGroup<Deprecated>; + "%0 does not support the option '%1'">, InGroup<Deprecated>; def err_builtin_needs_feature : Error<"%0 needs target feature %1">; def err_function_needs_feature : Error< @@ -256,11 +284,17 @@ def warn_avx_calling_convention : Warning<"AVX vector %select{return|argument}0 of type %1 without '%2' " "enabled changes the ABI">, InGroup<DiagGroup<"psabi">>; -def err_avx_calling_convention : Error<warn_avx_calling_convention.Text>; +def err_avx_calling_convention : Error<warn_avx_calling_convention.Summary>; def err_alias_to_undefined : Error< "%select{alias|ifunc}0 must point to a defined " "%select{variable or |}1function">; +def err_alias_to_common : Error< + "alias to a variable in a common section is not allowed">; +def note_alias_requires_mangled_name : Note< + "the %select{function or variable|function}0 specified in an %select{alias|ifunc}1 must refer to its mangled name">; +def note_alias_mangled_name_alternative: Note< + "function by that name is mangled as \"%0\"">; def warn_alias_to_weak_alias : Warning< "%select{alias|ifunc}2 will always resolve to %0 even if weak definition of " "%1 is overridden">, @@ -269,6 +303,10 @@ def err_duplicate_mangled_name : Error< "definition with same mangled name '%0' as another definition">; def err_cyclic_alias : Error< "%select{alias|ifunc}0 definition is part of a cycle">; +def err_hidden_visibility_dllexport : Error< + "hidden visibility cannot be applied to 'dllexport' declaration">; +def err_non_default_visibility_dllimport : Error< + "non-default visibility cannot be applied to 'dllimport' declaration">; def err_ifunc_resolver_return : Error< "ifunc resolver function must return a pointer">; @@ -284,6 +322,10 @@ def warn_atomic_op_oversized : Warning< "; the access size (%0 bytes) exceeds the max lock-free size (%1 bytes)">, InGroup<AtomicAlignment>; +def warn_sync_op_misaligned : Warning< + "__sync builtin operation MUST have natural alignment (consider using __atomic).">, + InGroup<SyncAlignment>; + def warn_alias_with_section : Warning< "%select{alias|ifunc}1 will not be in section '%0' but in the same section " "as the %select{aliasee|resolver}2">, @@ -302,6 +344,14 @@ def warn_profile_data_missing : Warning< def warn_profile_data_unprofiled : Warning< "no profile data available for file \"%0\"">, InGroup<ProfileInstrUnprofiled>; +def warn_profile_data_misexpect : Warning< + "Potential performance regression from use of __builtin_expect(): " + "Annotation was correct on %0 of profiled executions.">, + BackendInfo, + InGroup<MisExpect>; } // end of instrumentation issue category +def err_extract_api_ignores_file_not_found : + Error<"file '%0' specified by '--extract-api-ignores=' not found">, DefaultFatal; + } diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticGroups.td b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticGroups.td index 4b4928a7a00e..6765721ae700 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticGroups.td +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticGroups.td @@ -15,9 +15,12 @@ def Implicit : DiagGroup<"implicit", [ ImplicitInt ]>; +def DeprecatedStaticAnalyzerFlag : DiagGroup<"deprecated-static-analyzer-flag">; + // Empty DiagGroups are recognized by clang but ignored. def ODR : DiagGroup<"odr">; def : DiagGroup<"abi">; +def : DiagGroup<"gnu-empty-initializer">; // Now a C extension, not GNU. def AbsoluteValue : DiagGroup<"absolute-value">; def MisspelledAssumption : DiagGroup<"misspelled-assumption">; def UnknownAssumption : DiagGroup<"unknown-assumption">; @@ -29,13 +32,15 @@ def GNUAnonymousStruct : DiagGroup<"gnu-anonymous-struct">; def GNUAutoType : DiagGroup<"gnu-auto-type">; def ArrayBounds : DiagGroup<"array-bounds">; def ArrayBoundsPointerArithmetic : DiagGroup<"array-bounds-pointer-arithmetic">; +def ArrayParameter : DiagGroup<"array-parameter">; def AutoDisableVptrSanitizer : DiagGroup<"auto-disable-vptr-sanitizer">; def Availability : DiagGroup<"availability">; def Section : DiagGroup<"section">; -def AutoImport : DiagGroup<"auto-import">; +def : DiagGroup<"auto-import">; def FrameworkHdrQuotedInclude : DiagGroup<"quoted-include-in-framework-header">; def FrameworkIncludePrivateFromPublic : DiagGroup<"framework-include-private-from-public">; +def DeprecatedModuleDotMap : DiagGroup<"deprecated-module-dot-map">; def FrameworkHdrAtImport : DiagGroup<"atimport-in-framework-header">; def CXX14BinaryLiteral : DiagGroup<"c++14-binary-literal">; def CXXPre14CompatBinaryLiteral : DiagGroup<"c++98-c++11-compat-binary-literal">; @@ -44,7 +49,10 @@ def BinaryLiteral : DiagGroup<"binary-literal", [CXX14BinaryLiteral, CXXPre14CompatBinaryLiteral, GNUBinaryLiteral]>; def GNUCompoundLiteralInitializer : DiagGroup<"gnu-compound-literal-initializer">; -def BitFieldConstantConversion : DiagGroup<"bitfield-constant-conversion">; +def SingleBitBitFieldConstantConversion : + DiagGroup<"single-bit-bitfield-constant-conversion">; +def BitFieldConstantConversion : DiagGroup<"bitfield-constant-conversion", + [SingleBitBitFieldConstantConversion]>; def BitFieldEnumConversion : DiagGroup<"bitfield-enum-conversion">; def BitFieldWidth : DiagGroup<"bitfield-width">; def CompoundTokenSplitByMacro : DiagGroup<"compound-token-split-by-macro">; @@ -54,7 +62,14 @@ def CompoundTokenSplit : DiagGroup<"compound-token-split", CompoundTokenSplitBySpace]>; def CoroutineMissingUnhandledException : DiagGroup<"coroutine-missing-unhandled-exception">; -def Coroutine : DiagGroup<"coroutine", [CoroutineMissingUnhandledException]>; +def DeprecatedCoroutine : + DiagGroup<"deprecated-coroutine">; +def AlwaysInlineCoroutine : + DiagGroup<"always-inline-coroutine">; +def CoroNonAlignedAllocationFunction : + DiagGroup<"coro-non-aligned-allocation-function">; +def Coroutine : DiagGroup<"coroutine", [CoroutineMissingUnhandledException, DeprecatedCoroutine, + AlwaysInlineCoroutine, CoroNonAlignedAllocationFunction]>; def ObjCBoolConstantConversion : DiagGroup<"objc-bool-constant-conversion">; def ConstantConversion : DiagGroup<"constant-conversion", [BitFieldConstantConversion, @@ -64,6 +79,8 @@ def StringConversion : DiagGroup<"string-conversion">; def SignConversion : DiagGroup<"sign-conversion">; def PointerBoolConversion : DiagGroup<"pointer-bool-conversion">; def UndefinedBoolConversion : DiagGroup<"undefined-bool-conversion">; +def BitwiseInsteadOfLogical : DiagGroup<"bitwise-instead-of-logical">; +def BoolOperation : DiagGroup<"bool-operation", [BitwiseInsteadOfLogical]>; def BoolConversion : DiagGroup<"bool-conversion", [PointerBoolConversion, UndefinedBoolConversion]>; def IntConversion : DiagGroup<"int-conversion">; @@ -128,6 +145,9 @@ def MacroRedefined : DiagGroup<"macro-redefined">; def BuiltinMacroRedefined : DiagGroup<"builtin-macro-redefined">; def BuiltinRequiresHeader : DiagGroup<"builtin-requires-header">; def C99Compat : DiagGroup<"c99-compat">; +def C23Compat : DiagGroup<"c23-compat">; +def : DiagGroup<"c2x-compat", [C23Compat]>; + def CXXCompat: DiagGroup<"c++-compat">; def ExternCCompat : DiagGroup<"extern-c-compat">; def KeywordCompat : DiagGroup<"keyword-compat">; @@ -155,6 +175,7 @@ def DeleteNonVirtualDtor : DiagGroup<"delete-non-virtual-dtor", DeleteAbstractNonVirtualDtor]>; def AbstractFinalClass : DiagGroup<"abstract-final-class">; def FinalDtorNonFinalClass : DiagGroup<"final-dtor-non-final-class">; +def GNUOffsetofExtensions : DiagGroup<"gnu-offsetof-extensions">; def CXX11CompatDeprecatedWritableStr : DiagGroup<"c++11-compat-deprecated-writable-strings">; @@ -166,9 +187,11 @@ def DeprecatedCopyWithUserProvidedCopy : DiagGroup<"deprecated-copy-with-user-pr def DeprecatedCopyWithUserProvidedDtor : DiagGroup<"deprecated-copy-with-user-provided-dtor">; def DeprecatedCopy : DiagGroup<"deprecated-copy", [DeprecatedCopyWithUserProvidedCopy]>; def DeprecatedCopyWithDtor : DiagGroup<"deprecated-copy-with-dtor", [DeprecatedCopyWithUserProvidedDtor]>; +def DeprecatedLiteralOperator : DiagGroup<"deprecated-literal-operator">; // For compatibility with GCC. def : DiagGroup<"deprecated-copy-dtor", [DeprecatedCopyWithDtor]>; def DeprecatedDeclarations : DiagGroup<"deprecated-declarations">; +def DeprecatedRedundantConstexprStaticDef : DiagGroup<"deprecated-redundant-constexpr-static-def">; def UnavailableDeclarations : DiagGroup<"unavailable-declarations">; def UnguardedAvailabilityNew : DiagGroup<"unguarded-availability-new">; def UnguardedAvailability : DiagGroup<"unguarded-availability", @@ -177,6 +200,7 @@ def UnguardedAvailability : DiagGroup<"unguarded-availability", def : DiagGroup<"partial-availability", [UnguardedAvailability]>; def DeprecatedDynamicExceptionSpec : DiagGroup<"deprecated-dynamic-exception-spec">; +def DeprecatedBuiltins : DiagGroup<"deprecated-builtins">; def DeprecatedImplementations :DiagGroup<"deprecated-implementations">; def DeprecatedIncrementBool : DiagGroup<"deprecated-increment-bool">; def DeprecatedRegister : DiagGroup<"deprecated-register">; @@ -184,6 +208,8 @@ def DeprecatedThisCapture : DiagGroup<"deprecated-this-capture">; def DeprecatedVolatile : DiagGroup<"deprecated-volatile">; def DeprecatedWritableStr : DiagGroup<"deprecated-writable-strings", [CXX11CompatDeprecatedWritableStr]>; +def DeprecatedPragma : DiagGroup<"deprecated-pragma">; +def DeprecatedType : DiagGroup<"deprecated-type">; // FIXME: Why is DeprecatedImplementations not in this group? def Deprecated : DiagGroup<"deprecated", [DeprecatedAnonEnumEnumConversion, DeprecatedArrayCompare, @@ -197,11 +223,17 @@ def Deprecated : DiagGroup<"deprecated", [DeprecatedAnonEnumEnumConversion, DeprecatedEnumCompareConditional, DeprecatedEnumEnumConversion, DeprecatedEnumFloatConversion, + DeprecatedBuiltins, DeprecatedIncrementBool, + DeprecatedLiteralOperator, + DeprecatedPragma, DeprecatedRegister, DeprecatedThisCapture, + DeprecatedType, DeprecatedVolatile, - DeprecatedWritableStr]>, + DeprecatedWritableStr, + DeprecatedRedundantConstexprStaticDef + ]>, DiagCategory<"Deprecations">; def CXX20Designator : DiagGroup<"c++20-designator">; @@ -231,8 +263,8 @@ def Documentation : DiagGroup<"documentation", def EmptyBody : DiagGroup<"empty-body">; def Exceptions : DiagGroup<"exceptions">; +def DeclarationAfterStatement : DiagGroup<"declaration-after-statement">; -def GNUEmptyInitializer : DiagGroup<"gnu-empty-initializer">; def GNUEmptyStruct : DiagGroup<"gnu-empty-struct">; def ExtraTokens : DiagGroup<"extra-tokens">; def CXX98CompatExtraSemi : DiagGroup<"c++98-compat-extra-semi">; @@ -258,9 +290,11 @@ def : DiagGroup<"c++1z-compat-mangling", [CXX17CompatMangling]>; def NoexceptType : DiagGroup<"noexcept-type", [CXX17CompatMangling]>; // Warnings for C code which is not compatible with previous C standards. -def CPre2xCompat : DiagGroup<"pre-c2x-compat">; -def CPre2xCompatPedantic : DiagGroup<"pre-c2x-compat-pedantic", - [CPre2xCompat]>; +def CPre23Compat : DiagGroup<"pre-c23-compat">; +def CPre23CompatPedantic : DiagGroup<"pre-c23-compat-pedantic", + [CPre23Compat]>; +def : DiagGroup<"pre-c2x-compat", [CPre23Compat]>; +def : DiagGroup<"pre-c2x-compat-pedantic", [CPre23CompatPedantic]>; // Warnings for C++ code which is not compatible with previous C++ standards. def CXXPre14Compat : DiagGroup<"pre-c++14-compat">; @@ -281,9 +315,14 @@ def CXXPre20CompatPedantic : DiagGroup<"pre-c++20-compat-pedantic", [CXXPre20Compat]>; def : DiagGroup<"c++98-c++11-c++14-c++17-compat-pedantic", [CXXPre20CompatPedantic]>; -def CXXPre2bCompat : DiagGroup<"pre-c++2b-compat">; -def CXXPre2bCompatPedantic : - DiagGroup<"pre-c++2b-compat-pedantic", [CXXPre2bCompat]>; +def CXXPre23Compat : DiagGroup<"pre-c++23-compat">; +def CXXPre23CompatPedantic : + DiagGroup<"pre-c++23-compat-pedantic", [CXXPre23Compat]>; +def CXXPre26Compat : DiagGroup<"pre-c++26-compat">; +def CXXPre26CompatPedantic : + DiagGroup<"pre-c++26-compat-pedantic", [CXXPre26Compat]>; +def : DiagGroup<"pre-c++2c-compat", [CXXPre26Compat]>; +def : DiagGroup<"pre-c++2c-compat-pedantic", [CXXPre26CompatPedantic]>; def CXX98CompatBindToTemporaryCopy : DiagGroup<"c++98-compat-bind-to-temporary-copy">; @@ -298,7 +337,7 @@ def CXX98Compat : DiagGroup<"c++98-compat", CXXPre14Compat, CXXPre17Compat, CXXPre20Compat, - CXXPre2bCompat]>; + CXXPre23Compat]>; // Warnings for C++11 features which are Extensions in C++98 mode. def CXX98CompatPedantic : DiagGroup<"c++98-compat-pedantic", [CXX98Compat, @@ -307,9 +346,10 @@ def CXX98CompatPedantic : DiagGroup<"c++98-compat-pedantic", CXXPre14CompatPedantic, CXXPre17CompatPedantic, CXXPre20CompatPedantic, - CXXPre2bCompatPedantic]>; + CXXPre23CompatPedantic]>; -def CXX11Narrowing : DiagGroup<"c++11-narrowing">; +def CXX11NarrowingConstReference : DiagGroup<"c++11-narrowing-const-reference">; +def CXX11Narrowing : DiagGroup<"c++11-narrowing", [CXX11NarrowingConstReference]>; def CXX11WarnInconsistentOverrideDestructor : DiagGroup<"inconsistent-missing-destructor-override">; @@ -337,46 +377,50 @@ def CXX11Compat : DiagGroup<"c++11-compat", CXXPre14Compat, CXXPre17Compat, CXXPre20Compat, - CXXPre2bCompat]>; + CXXPre23Compat]>; def : DiagGroup<"c++0x-compat", [CXX11Compat]>; def CXX11CompatPedantic : DiagGroup<"c++11-compat-pedantic", [CXX11Compat, CXXPre14CompatPedantic, CXXPre17CompatPedantic, CXXPre20CompatPedantic, - CXXPre2bCompatPedantic]>; + CXXPre23CompatPedantic]>; def CXX14Compat : DiagGroup<"c++14-compat", [CXXPre17Compat, CXXPre20Compat, - CXXPre2bCompat]>; + CXXPre23Compat]>; def CXX14CompatPedantic : DiagGroup<"c++14-compat-pedantic", [CXX14Compat, CXXPre17CompatPedantic, CXXPre20CompatPedantic, - CXXPre2bCompatPedantic]>; + CXXPre23CompatPedantic]>; def CXX17Compat : DiagGroup<"c++17-compat", [DeprecatedRegister, DeprecatedIncrementBool, CXX17CompatMangling, CXXPre20Compat, - CXXPre2bCompat]>; + CXXPre23Compat]>; def CXX17CompatPedantic : DiagGroup<"c++17-compat-pedantic", [CXX17Compat, CXXPre20CompatPedantic, - CXXPre2bCompatPedantic]>; + CXXPre23CompatPedantic]>; def : DiagGroup<"c++1z-compat", [CXX17Compat]>; -def CXX20Compat : DiagGroup<"c++20-compat", [CXXPre2bCompat]>; +def CXX20Compat : DiagGroup<"c++20-compat", [CXXPre23Compat]>; def CXX20CompatPedantic : DiagGroup<"c++20-compat-pedantic", [CXX20Compat, - CXXPre2bCompatPedantic]>; + CXXPre23CompatPedantic]>; def : DiagGroup<"c++2a-compat", [CXX20Compat]>; def : DiagGroup<"c++2a-compat-pedantic", [CXX20CompatPedantic]>; def ExitTimeDestructors : DiagGroup<"exit-time-destructors">; def FlexibleArrayExtensions : DiagGroup<"flexible-array-extensions">; def FourByteMultiChar : DiagGroup<"four-char-constants">; -def GlobalConstructors : DiagGroup<"global-constructors">; +def GlobalConstructors : DiagGroup<"global-constructors"> { + code Documentation = [{ +Emit a warning for each variable declaration that generates code run at startup. + }]; +} def BitwiseConditionalParentheses: DiagGroup<"bitwise-conditional-parentheses">; def BitwiseOpParentheses: DiagGroup<"bitwise-op-parentheses">; def LogicalOpParentheses: DiagGroup<"logical-op-parentheses">; @@ -388,11 +432,14 @@ def DanglingField : DiagGroup<"dangling-field">; def DanglingInitializerList : DiagGroup<"dangling-initializer-list">; def DanglingGsl : DiagGroup<"dangling-gsl">; def ReturnStackAddress : DiagGroup<"return-stack-address">; +// Name of this warning in GCC +def : DiagGroup<"return-local-addr", [ReturnStackAddress]>; def Dangling : DiagGroup<"dangling", [DanglingField, DanglingInitializerList, DanglingGsl, ReturnStackAddress]>; def DistributedObjectModifiers : DiagGroup<"distributed-object-modifiers">; +def DllexportExplicitInstantiationDecl : DiagGroup<"dllexport-explicit-instantiation-decl">; def ExcessInitializers : DiagGroup<"excess-initializers">; def ExpansionToDefined : DiagGroup<"expansion-to-defined">; def FlagEnum : DiagGroup<"flag-enum">; @@ -400,10 +447,13 @@ def IncrementBool : DiagGroup<"increment-bool", [DeprecatedIncrementBool]>; def InfiniteRecursion : DiagGroup<"infinite-recursion">; def PureVirtualCallFromCtorDtor: DiagGroup<"call-to-pure-virtual-from-ctor-dtor">; def GNUImaginaryConstant : DiagGroup<"gnu-imaginary-constant">; -def IgnoredQualifiers : DiagGroup<"ignored-qualifiers">; +def IgnoredGCH : DiagGroup<"ignored-gch">; +def IgnoredReferenceQualifiers : DiagGroup<"ignored-reference-qualifiers">; +def IgnoredQualifiers : DiagGroup<"ignored-qualifiers", [IgnoredReferenceQualifiers]>; def : DiagGroup<"import">; def GNUIncludeNext : DiagGroup<"gnu-include-next">; def IncompatibleMSStruct : DiagGroup<"incompatible-ms-struct">; +def IncompatibleMSPragmaSection : DiagGroup<"incompatible-ms-pragma-section">; def IncompatiblePointerTypesDiscardsQualifiers : DiagGroup<"incompatible-pointer-types-discards-qualifiers">; def IncompatibleFunctionPointerTypes @@ -429,10 +479,13 @@ def InlineNamespaceReopenedNoninline def InvalidNoreturn : DiagGroup<"invalid-noreturn">; def InvalidSourceEncoding : DiagGroup<"invalid-source-encoding">; def KNRPromotedParameter : DiagGroup<"knr-promoted-parameter">; +def DeprecatedNonPrototype : DiagGroup<"deprecated-non-prototype">; +def StrictPrototypes : DiagGroup<"strict-prototypes", [DeprecatedNonPrototype]>; def : DiagGroup<"init-self">; def : DiagGroup<"inline">; def : DiagGroup<"invalid-pch">; def GNULabelsAsValue : DiagGroup<"gnu-label-as-value">; +def GNULineMarker : DiagGroup<"gnu-line-marker">; def LiteralRange : DiagGroup<"literal-range">; def LocalTypeTemplateArgs : DiagGroup<"local-type-template-args", [CXX98CompatLocalTypeTemplateArgs]>; @@ -462,10 +515,12 @@ def MismatchedParameterTypes : DiagGroup<"mismatched-parameter-types">; def MismatchedReturnTypes : DiagGroup<"mismatched-return-types">; def MismatchedTags : DiagGroup<"mismatched-tags">; def MissingFieldInitializers : DiagGroup<"missing-field-initializers">; +def ModuleLock : DiagGroup<"module-lock">; def ModuleBuild : DiagGroup<"module-build">; def ModuleImport : DiagGroup<"module-import">; def ModuleConflict : DiagGroup<"module-conflict">; def ModuleFileExtension : DiagGroup<"module-file-extension">; +def ModuleIncludeDirectiveTranslation : DiagGroup<"module-include-translation">; def RoundTripCC1Args : DiagGroup<"round-trip-cc1-args">; def NewlineEOF : DiagGroup<"newline-eof">; def Nullability : DiagGroup<"nullability">; @@ -486,7 +541,9 @@ def NonPODVarargs : DiagGroup<"non-pod-varargs">; def ClassVarargs : DiagGroup<"class-varargs", [NonPODVarargs]>; def : DiagGroup<"nonportable-cfstrings">; def NonVirtualDtor : DiagGroup<"non-virtual-dtor">; -def NullPointerArithmetic : DiagGroup<"null-pointer-arithmetic">; +def GNUNullPointerArithmetic : DiagGroup<"gnu-null-pointer-arithmetic">; +def NullPointerArithmetic + : DiagGroup<"null-pointer-arithmetic", [GNUNullPointerArithmetic]>; def NullPointerSubtraction : DiagGroup<"null-pointer-subtraction">; def : DiagGroup<"effc++", [NonVirtualDtor]>; def OveralignedType : DiagGroup<"over-aligned">; @@ -504,7 +561,8 @@ def PrivateExtern : DiagGroup<"private-extern">; def SelTypeCast : DiagGroup<"cast-of-sel-type">; def FunctionDefInObjCContainer : DiagGroup<"function-def-in-objc-container">; def BadFunctionCast : DiagGroup<"bad-function-cast">; -def CastFunctionType : DiagGroup<"cast-function-type">; +def CastFunctionTypeStrict : DiagGroup<"cast-function-type-strict">; +def CastFunctionType : DiagGroup<"cast-function-type", [CastFunctionTypeStrict]>; def ObjCPropertyImpl : DiagGroup<"objc-property-implementation">; def ObjCPropertyNoAttribute : DiagGroup<"objc-property-no-attribute">; def ObjCPropertyAssignOnObjectType : DiagGroup<"objc-property-assign-on-object-type">; @@ -527,13 +585,18 @@ def UnderalignedExceptionObject : DiagGroup<"underaligned-exception-object">; def DeprecatedObjCIsaUsage : DiagGroup<"deprecated-objc-isa-usage">; def ExplicitInitializeCall : DiagGroup<"explicit-initialize-call">; def OrderedCompareFunctionPointers : DiagGroup<"ordered-compare-function-pointers">; -def Packed : DiagGroup<"packed">; -def Padded : DiagGroup<"padded">; +def PackedNonPod : DiagGroup<"packed-non-pod">; +def Packed : DiagGroup<"packed", [PackedNonPod]>; +def PaddedBitField : DiagGroup<"padded-bitfield">; +def Padded : DiagGroup<"padded", [PaddedBitField]>; +def UnalignedAccess : DiagGroup<"unaligned-access">; def PessimizingMove : DiagGroup<"pessimizing-move">; def ReturnStdMove : DiagGroup<"return-std-move">; -def PointerArith : DiagGroup<"pointer-arith">; +def GNUPointerArith : DiagGroup<"gnu-pointer-arith">; +def PointerArith : DiagGroup<"pointer-arith", [GNUPointerArith]>; + def PoundWarning : DiagGroup<"#warnings">; def PoundPragmaMessage : DiagGroup<"#pragma-messages">, DiagCategory<"#pragma message Directive">; @@ -571,7 +634,7 @@ def ShadowAll : DiagGroup<"shadow-all", [Shadow, ShadowFieldInConstructor, def Shorten64To32 : DiagGroup<"shorten-64-to-32">; def : DiagGroup<"sign-promo">; def SignCompare : DiagGroup<"sign-compare">; -def : DiagGroup<"switch-default">; +def SwitchDefault : DiagGroup<"switch-default">; def : DiagGroup<"synth">; def SizeofArrayArgument : DiagGroup<"sizeof-array-argument">; def SizeofArrayDecay : DiagGroup<"sizeof-array-decay">; @@ -587,7 +650,12 @@ def StaticInInline : DiagGroup<"static-in-inline">; def StaticLocalInInline : DiagGroup<"static-local-in-inline">; def GNUStaticFloatInit : DiagGroup<"gnu-static-float-init">; def StaticFloatInit : DiagGroup<"static-float-init", [GNUStaticFloatInit]>; -def GNUStatementExpression : DiagGroup<"gnu-statement-expression">; +// Allow differentiation between GNU statement expressions in a macro versus +// written directly in source. +def GNUStatementExpressionFromMacroExpansion : + DiagGroup<"gnu-statement-expression-from-macro-expansion">; +def GNUStatementExpression : DiagGroup<"gnu-statement-expression", + [GNUStatementExpressionFromMacroExpansion]>; def StringConcatation : DiagGroup<"string-concatenation">; def StringCompare : DiagGroup<"string-compare">; def StringPlusInt : DiagGroup<"string-plus-int">; @@ -618,13 +686,15 @@ def TautologicalOverlapCompare : DiagGroup<"tautological-overlap-compare">; def TautologicalBitwiseCompare : DiagGroup<"tautological-bitwise-compare">; def TautologicalUndefinedCompare : DiagGroup<"tautological-undefined-compare">; def TautologicalObjCBoolCompare : DiagGroup<"tautological-objc-bool-compare">; +def TautologicalNegationCompare : DiagGroup<"tautological-negation-compare">; def TautologicalCompare : DiagGroup<"tautological-compare", [TautologicalConstantCompare, TautologicalPointerCompare, TautologicalOverlapCompare, TautologicalBitwiseCompare, TautologicalUndefinedCompare, - TautologicalObjCBoolCompare]>; + TautologicalObjCBoolCompare, + TautologicalNegationCompare]>; def HeaderHygiene : DiagGroup<"header-hygiene">; def DuplicateDeclSpecifier : DiagGroup<"duplicate-decl-specifier">; def CompareDistinctPointerType : DiagGroup<"compare-distinct-pointer-types">; @@ -642,6 +712,8 @@ def AmbiguousMacro : DiagGroup<"ambiguous-macro">; def KeywordAsMacro : DiagGroup<"keyword-macro">; def ReservedIdAsMacro : DiagGroup<"reserved-macro-identifier">; def ReservedIdAsMacroAlias : DiagGroup<"reserved-id-macro", [ReservedIdAsMacro]>; +def RestrictExpansionMacro : DiagGroup<"restrict-expansion">; +def FinalMacro : DiagGroup<"final-macro">; // Just silence warnings about -Wstrict-aliasing for now. def : DiagGroup<"strict-aliasing=0">; @@ -742,6 +814,7 @@ def UnusedLocalTypedef : DiagGroup<"unused-local-typedef">; def UnusedPropertyIvar : DiagGroup<"unused-property-ivar">; def UnusedGetterReturnValue : DiagGroup<"unused-getter-return-value">; def UsedButMarkedUnused : DiagGroup<"used-but-marked-unused">; +def UsedSearchPath : DiagGroup<"search-path-usage">; def UserDefinedLiterals : DiagGroup<"user-defined-literals">; def UserDefinedWarnings : DiagGroup<"user-defined-warnings">; def ReorderCtor : DiagGroup<"reorder-ctor">; @@ -753,6 +826,7 @@ def AtomicAlignment : DiagGroup<"atomic-alignment">; def CustomAtomic : DiagGroup<"custom-atomic-properties">; def AtomicProperties : DiagGroup<"atomic-properties", [ImplicitAtomic, CustomAtomic]>; +def SyncAlignment : DiagGroup<"sync-alignment">; def ARCUnsafeRetainedAssign : DiagGroup<"arc-unsafe-retained-assign">; def ARCRetainCycles : DiagGroup<"arc-retain-cycles">; def ARCNonPodMemAccess : DiagGroup<"arc-non-pod-memaccess">; @@ -779,7 +853,9 @@ def OverridingMethodMismatch : DiagGroup<"overriding-method-mismatch">; def VariadicMacros : DiagGroup<"variadic-macros">; def VectorConversion : DiagGroup<"vector-conversion">; // clang specific def VexingParse : DiagGroup<"vexing-parse">; -def VLAExtension : DiagGroup<"vla-extension">; +def VLAUseStaticAssert : DiagGroup<"vla-extension-static-assert">; +def VLACxxExtension : DiagGroup<"vla-cxx-extension", [VLAUseStaticAssert]>; +def VLAExtension : DiagGroup<"vla-extension", [VLACxxExtension]>; def VLA : DiagGroup<"vla", [VLAExtension]>; def VolatileRegisterVar : DiagGroup<"volatile-register-var">; def Visibility : DiagGroup<"visibility">; @@ -799,15 +875,17 @@ def WritableStrings : DiagGroup<"writable-strings", [DeprecatedWritableStr]>; // // FIXME: Should this affect C++11 (where this is an error, // not just deprecated) or not? -def GCCWriteStrings : DiagGroup<"write-strings" , [WritableStrings]>; +def GCCWriteStrings : DiagGroup<"write-strings" , [WritableStrings], + GCCWriteStringsDocs>; def CharSubscript : DiagGroup<"char-subscripts">; def LargeByValueCopy : DiagGroup<"large-by-value-copy">; def DuplicateArgDecl : DiagGroup<"duplicate-method-arg">; def SignedEnumBitfield : DiagGroup<"signed-enum-bitfield">; +def ReservedModuleIdentifier : DiagGroup<"reserved-module-identifier">; def ReservedIdentifier : DiagGroup<"reserved-identifier", - [ReservedIdAsMacro]>; + [ReservedIdAsMacro, ReservedModuleIdentifier, UserDefinedLiterals]>; // Unreachable code warning groups. // @@ -816,8 +894,12 @@ def ReservedIdentifier : DiagGroup<"reserved-identifier", // under separate flags. // def UnreachableCodeLoopIncrement : DiagGroup<"unreachable-code-loop-increment">; +def UnreachableCodeFallthrough : DiagGroup<"unreachable-code-fallthrough">; +def UnreachableCodeGenericAssoc : DiagGroup<"unreachable-code-generic-assoc">; def UnreachableCode : DiagGroup<"unreachable-code", - [UnreachableCodeLoopIncrement]>; + [UnreachableCodeLoopIncrement, + UnreachableCodeFallthrough, + UnreachableCodeGenericAssoc]>; def UnreachableCodeBreak : DiagGroup<"unreachable-code-break">; def UnreachableCodeReturn : DiagGroup<"unreachable-code-return">; def UnreachableCodeAggressive : DiagGroup<"unreachable-code-aggressive", @@ -889,10 +971,16 @@ def FormatNonStandard : DiagGroup<"format-non-iso">; def FormatY2K : DiagGroup<"format-y2k">; def FormatPedantic : DiagGroup<"format-pedantic">; def FormatTypeConfusion : DiagGroup<"format-type-confusion">; + +def FormatOverflowNonKprintf: DiagGroup<"format-overflow-non-kprintf">; +def FormatOverflow: DiagGroup<"format-overflow", [FormatOverflowNonKprintf]>; +def FormatTruncationNonKprintf: DiagGroup<"format-truncation-non-kprintf">; +def FormatTruncation: DiagGroup<"format-truncation", [FormatTruncationNonKprintf]>; + def Format : DiagGroup<"format", [FormatExtraArgs, FormatZeroLength, NonNull, FormatSecurity, FormatY2K, FormatInvalidSpecifier, - FormatInsufficientArgs]>, + FormatInsufficientArgs, FormatOverflow, FormatTruncation]>, DiagCategory<"Format String Issue">; def FormatNonLiteral : DiagGroup<"format-nonliteral">; def Format2 : DiagGroup<"format=2", @@ -912,6 +1000,7 @@ def PointerToEnumCast : DiagGroup<"pointer-to-enum-cast", [VoidPointerToEnumCast]>; def PointerToIntCast : DiagGroup<"pointer-to-int-cast", [PointerToEnumCast, VoidPointerToIntCast]>; +def VoidPointerDeref : DiagGroup<"void-ptr-dereference">; def FUseLdPath : DiagGroup<"fuse-ld-path">; @@ -940,6 +1029,8 @@ def Extra : DiagGroup<"extra", [ ]>; def Most : DiagGroup<"most", [ + ArrayParameter, + BoolOperation, CharSubscript, Comment, DeleteNonVirtualDtor, @@ -981,7 +1072,9 @@ def Most : DiagGroup<"most", [ def ThreadSafetyAttributes : DiagGroup<"thread-safety-attributes">; def ThreadSafetyAnalysis : DiagGroup<"thread-safety-analysis">; def ThreadSafetyPrecise : DiagGroup<"thread-safety-precise">; -def ThreadSafetyReference : DiagGroup<"thread-safety-reference">; +def ThreadSafetyReferenceReturn : DiagGroup<"thread-safety-reference-return">; +def ThreadSafetyReference : DiagGroup<"thread-safety-reference", + [ThreadSafetyReferenceReturn]>; def ThreadSafetyNegative : DiagGroup<"thread-safety-negative">; def ThreadSafety : DiagGroup<"thread-safety", [ThreadSafetyAttributes, @@ -998,7 +1091,8 @@ def Consumed : DiagGroup<"consumed">; // warning should be active _only_ when -Wall is passed in, mark it as // DefaultIgnore in addition to putting it here. def All : DiagGroup<"all", [Most, Parentheses, Switch, SwitchBool, - MisleadingIndentation]>; + MisleadingIndentation, PackedNonPod, + VLACxxExtension]>; // Warnings that should be in clang-cl /w4. def : DiagGroup<"CL4", [All, Extra]>; @@ -1027,6 +1121,15 @@ def : DiagGroup<"unused-local-typedefs", [UnusedLocalTypedef]>; def NonGCC : DiagGroup<"non-gcc", [SignCompare, Conversion, LiteralRange]>; +def CXX14Attrs : DiagGroup<"c++14-attribute-extensions">; +def CXX17Attrs : DiagGroup<"c++17-attribute-extensions">; +def CXX20Attrs : DiagGroup<"c++20-attribute-extensions">; +def FutureAttrs : DiagGroup<"future-attribute-extensions", [CXX14Attrs, + CXX17Attrs, + CXX20Attrs]>; + +def CXX23AttrsOnLambda : DiagGroup<"c++23-lambda-attributes">; + // A warning group for warnings about using C++11 features as extensions in // earlier C++ versions. def CXX11 : DiagGroup<"c++11-extensions", [CXX11ExtraSemi, CXX11InlineNamespace, @@ -1034,24 +1137,30 @@ def CXX11 : DiagGroup<"c++11-extensions", [CXX11ExtraSemi, CXX11InlineNamespace, // A warning group for warnings about using C++14 features as extensions in // earlier C++ versions. -def CXX14 : DiagGroup<"c++14-extensions", [CXX14BinaryLiteral]>; +def CXX14 : DiagGroup<"c++14-extensions", [CXX14BinaryLiteral, CXX14Attrs]>; // A warning group for warnings about using C++17 features as extensions in // earlier C++ versions. -def CXX17 : DiagGroup<"c++17-extensions">; +def CXX17 : DiagGroup<"c++17-extensions", [CXX17Attrs]>; // A warning group for warnings about using C++20 features as extensions in // earlier C++ versions. -def CXX20 : DiagGroup<"c++20-extensions", [CXX20Designator]>; +def CXX20 : DiagGroup<"c++20-extensions", [CXX20Designator, CXX20Attrs]>; -// A warning group for warnings about using C++2b features as extensions in +// A warning group for warnings about using C++23 features as extensions in // earlier C++ versions. -def CXX2b : DiagGroup<"c++2b-extensions">; +def CXX23 : DiagGroup<"c++23-extensions", [CXX23AttrsOnLambda]>; + +// A warning group for warnings about using C++26 features as extensions in +// earlier C++ versions. +def CXX26 : DiagGroup<"c++26-extensions">; def : DiagGroup<"c++0x-extensions", [CXX11]>; def : DiagGroup<"c++1y-extensions", [CXX14]>; def : DiagGroup<"c++1z-extensions", [CXX17]>; def : DiagGroup<"c++2a-extensions", [CXX20]>; +def : DiagGroup<"c++2b-extensions", [CXX23]>; +def : DiagGroup<"c++2c-extensions", [CXX26]>; def DelegatingCtorCycles : DiagGroup<"delegating-ctor-cycles">; @@ -1062,8 +1171,10 @@ def C11 : DiagGroup<"c11-extensions">; // A warning group for warnings about using C99 features as extensions. def C99 : DiagGroup<"c99-extensions", [C99Designator]>; -// A warning group for warnings about using C2x features as extensions. -def C2x : DiagGroup<"c2x-extensions">; +// A warning group for warnings about using C23 features as extensions. +def C23 : DiagGroup<"c23-extensions">; + +def : DiagGroup<"c2x-extensions", [C23]>; // A warning group for warnings about GCC extensions. def GNU : DiagGroup<"gnu", [GNUAlignofExpression, GNUAnonymousStruct, @@ -1071,16 +1182,17 @@ def GNU : DiagGroup<"gnu", [GNUAlignofExpression, GNUAnonymousStruct, GNUBinaryLiteral, GNUCaseRange, GNUComplexInteger, GNUCompoundLiteralInitializer, GNUConditionalOmittedOperand, GNUDesignator, - GNUEmptyInitializer, GNUEmptyStruct, + GNUEmptyStruct, VLAExtension, GNUFlexibleArrayInitializer, GNUFlexibleArrayUnionMember, GNUFoldingConstant, GNUImaginaryConstant, GNUIncludeNext, - GNULabelsAsValue, + GNULabelsAsValue, GNULineMarker, GNUNullPointerArithmetic, + GNUOffsetofExtensions, GNUPointerArith, RedeclaredClassMember, GNURedeclaredEnum, GNUStatementExpression, GNUStaticFloatInit, - GNUStringLiteralOperatorTemplate, - GNUUnionCast, GNUVariableSizedTypeNotAtEnd, - ZeroLengthArray, GNUZeroLineDirective, + GNUStringLiteralOperatorTemplate, GNUUnionCast, + GNUVariableSizedTypeNotAtEnd, ZeroLengthArray, + GNUZeroLineDirective, GNUZeroVariadicMacroArguments]>; // A warning group for warnings about code that clang accepts but gcc doesn't. def GccCompat : DiagGroup<"gcc-compat">; @@ -1125,6 +1237,9 @@ def MicrosoftCommentPaste : DiagGroup<"microsoft-comment-paste">; def MicrosoftEndOfFile : DiagGroup<"microsoft-end-of-file">; def MicrosoftInaccessibleBase : DiagGroup<"microsoft-inaccessible-base">; def MicrosoftStaticAssert : DiagGroup<"microsoft-static-assert">; +def MicrosoftInitFromPredefined : DiagGroup<"microsoft-init-from-predefined">; +def MicrosoftStringLiteralFromPredefined : DiagGroup< + "microsoft-string-literal-from-predefined">; // Aliases. def : DiagGroup<"msvc-include", [MicrosoftInclude]>; @@ -1142,6 +1257,7 @@ def Microsoft : DiagGroup<"microsoft", MicrosoftFlexibleArray, MicrosoftExtraQualification, MicrosoftCast, MicrosoftConstInit, MicrosoftVoidPseudoDtor, MicrosoftAnonTag, MicrosoftCommentPaste, MicrosoftEndOfFile, MicrosoftStaticAssert, + MicrosoftInitFromPredefined, MicrosoftStringLiteralFromPredefined, MicrosoftInconsistentDllImport]>; def ClangClPch : DiagGroup<"clang-cl-pch">; @@ -1185,6 +1301,9 @@ def ASM : DiagGroup<"asm", [ ASMOperandWidths ]>; +// Linker warnings. +def LinkerWarnings : DiagGroup<"linker-warnings">; + // OpenMP warnings. def SourceUsesOpenMP : DiagGroup<"source-uses-openmp">; def OpenMPClauses : DiagGroup<"openmp-clauses">; @@ -1193,15 +1312,41 @@ def OpenMPMapping : DiagGroup<"openmp-mapping">; def OpenMPTarget : DiagGroup<"openmp-target", [OpenMPMapping]>; def OpenMPPre51Compat : DiagGroup<"pre-openmp-51-compat">; def OpenMP51Ext : DiagGroup<"openmp-51-extensions">; +def OpenMPExtensions : DiagGroup<"openmp-extensions">; +def OpenMPTargetException : DiagGroup<"openmp-target-exception">; def OpenMP : DiagGroup<"openmp", [ SourceUsesOpenMP, OpenMPClauses, OpenMPLoopForm, OpenMPTarget, - OpenMPMapping, OpenMP51Ext + OpenMPMapping, OpenMP51Ext, OpenMPExtensions, OpenMPTargetException ]>; +// OpenACC warnings. +def SourceUsesOpenACC : DiagGroup<"source-uses-openacc">; +def OpenACC : DiagGroup<"openacc", [SourceUsesOpenACC]>; + // Backend warnings. def BackendInlineAsm : DiagGroup<"inline-asm">; def BackendSourceMgr : DiagGroup<"source-mgr">; -def BackendFrameLargerThan : DiagGroup<"frame-larger-than">; +def BackendFrameLargerThan : DiagGroup<"frame-larger-than">{ + code Documentation = [{ +More fine grained information about the stack layout is available by adding the +`-Rpass-analysis=stack-frame-layout` command-line flag to the compiler +invocation. + +The diagnostic information can be saved to a file in a machine readable format, +like YAML by adding the `-foptimization-record-file=<file>` command-line flag. + +Results can be filtered by function name by passing +`-mllvm -filter-print-funcs=foo`, where `foo` is the target function's name. + + .. code-block:: console + + clang -c a.cpp -Rpass-analysis=stack-frame-layout -mllvm -filter-print-funcs=foo + + .. code-block:: console + + clang -c a.cpp -Rpass-analysis=stack-frame-layout -foptimization-record-file=<file> +}]; +} // Compatibility flag name from old versions of Clang. def : DiagGroup<"frame-larger-than=", [BackendFrameLargerThan]>; def BackendPlugin : DiagGroup<"backend-plugin">; @@ -1210,11 +1355,13 @@ def BackendOptimizationRemark : DiagGroup<"pass">; def BackendOptimizationRemarkMissed : DiagGroup<"pass-missed">; def BackendOptimizationRemarkAnalysis : DiagGroup<"pass-analysis">; def BackendOptimizationFailure : DiagGroup<"pass-failed">; +def BackendWarningAttributes : DiagGroup<"attribute-warning">; // Instrumentation based profiling warnings. def ProfileInstrMissing : DiagGroup<"profile-instr-missing">; def ProfileInstrOutOfDate : DiagGroup<"profile-instr-out-of-date">; def ProfileInstrUnprofiled : DiagGroup<"profile-instr-unprofiled">; +def MisExpect : DiagGroup<"misexpect">; // AddressSanitizer frontend instrumentation remarks. def SanitizeAddressRemarks : DiagGroup<"sanitize-address">; @@ -1233,6 +1380,12 @@ def CudaUnknownVersion: DiagGroup<"unknown-cuda-version">; // ignored by CUDA. def HIPOnly : DiagGroup<"hip-only">; +// Warning about mixed HIP and OpenMP compilation / target offloading. +def HIPOpenMPOffloading: DiagGroup<"hip-omp-target-directives">; + +// Warning about multiple GPUs are detected. +def MultiGPU: DiagGroup<"multi-gpu">; + // Warnings which cause linking of the runtime libraries like // libc and the CRT to be skipped. def AVRRtlibLinkingQuirks : DiagGroup<"avr-rtlib-linking-quirks">; @@ -1246,16 +1399,24 @@ def OptionIgnored : DiagGroup<"option-ignored">; def UnknownArgument : DiagGroup<"unknown-argument">; +def UnsupportedABI : DiagGroup<"unsupported-abi">; + // A warning group for warnings about code that clang accepts when -// compiling OpenCL C/C++ but which is not compatible with the SPIR spec. +// compiling OpenCL C/C++ but which is not compatible with the SPIR(-V) spec. def SpirCompat : DiagGroup<"spir-compat">; +def : DiagGroup<"spirv-compat", [SpirCompat]>; // Alias. // Warning for the GlobalISel options. def GlobalISel : DiagGroup<"global-isel">; +// A warning group for the GNU extension to allow mixed specifier types for +// target-clones multiversioning. +def TargetClonesMixedSpecifiers : DiagGroup<"target-clones-mixed-specifiers">; + // A warning group specifically for warnings related to function // multiversioning. -def FunctionMultiVersioning : DiagGroup<"function-multiversion">; +def FunctionMultiVersioning + : DiagGroup<"function-multiversion", [TargetClonesMixedSpecifiers]>; def NoDeref : DiagGroup<"noderef">; @@ -1264,7 +1425,7 @@ def CrossTU : DiagGroup<"ctu">; def CTADMaybeUnsupported : DiagGroup<"ctad-maybe-unsupported">; -def FortifySource : DiagGroup<"fortify-source">; +def FortifySource : DiagGroup<"fortify-source", [FormatOverflow, FormatTruncation]>; def MaxTokens : DiagGroup<"max-tokens"> { code Documentation = [{ @@ -1274,19 +1435,22 @@ the token limit, which can be set in three ways: 1. As a limit at a specific point in a file, using the ``clang max_tokens_here`` pragma: - .. code-block: c++ + .. code-block:: c++ + #pragma clang max_tokens_here 1234 2. As a per-translation unit limit, using the ``-fmax-tokens=`` command-line flag: - .. code-block: console + .. code-block:: console + clang -c a.cpp -fmax-tokens=1234 3. As a per-translation unit limit using the ``clang max_tokens_total`` pragma, which works like and overrides the ``-fmax-tokens=`` flag: - .. code-block: c++ + .. code-block:: c++ + #pragma clang max_tokens_total 1234 These limits can be helpful in limiting code growth through included files. @@ -1303,3 +1467,27 @@ def WebAssemblyExceptionSpec : DiagGroup<"wasm-exception-spec">; def RTTI : DiagGroup<"rtti">; def OpenCLCoreFeaturesDiagGroup : DiagGroup<"pedantic-core-features">; + +// Warnings and extensions to make preprocessor macro usage pedantic. +def PedanticMacros : DiagGroup<"pedantic-macros", + [DeprecatedPragma, + MacroRedefined, + BuiltinMacroRedefined, + RestrictExpansionMacro, + FinalMacro]>; + +def BranchProtection : DiagGroup<"branch-protection">; + +// HLSL diagnostic groups +// Warnings for HLSL Clang extensions +def HLSLExtension : DiagGroup<"hlsl-extensions">; + +// Warnings for DXIL validation +def DXILValidation : DiagGroup<"dxil-validation">; + +// Warnings and notes related to const_var_decl_type attribute checks +def ReadOnlyPlacementChecks : DiagGroup<"read-only-types">; + +// Warnings and fixes to support the "safe buffers" programming model. +def UnsafeBufferUsageInContainer : DiagGroup<"unsafe-buffer-usage-in-container">; +def UnsafeBufferUsage : DiagGroup<"unsafe-buffer-usage", [UnsafeBufferUsageInContainer]>; diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticIDs.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticIDs.h index 288504def5eb..0cdda42793f6 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticIDs.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticIDs.h @@ -17,6 +17,7 @@ #include "clang/Basic/LLVM.h" #include "llvm/ADT/IntrusiveRefCntPtr.h" #include "llvm/ADT/StringRef.h" +#include <optional> #include <vector> namespace clang { @@ -25,15 +26,17 @@ namespace clang { // Import the diagnostic enums themselves. namespace diag { + enum class Group; + // Size of each of the diagnostic categories. enum { DIAG_SIZE_COMMON = 300, - DIAG_SIZE_DRIVER = 250, + DIAG_SIZE_DRIVER = 400, DIAG_SIZE_FRONTEND = 150, DIAG_SIZE_SERIALIZATION = 120, DIAG_SIZE_LEX = 400, - DIAG_SIZE_PARSE = 600, - DIAG_SIZE_AST = 250, + DIAG_SIZE_PARSE = 700, + DIAG_SIZE_AST = 300, DIAG_SIZE_COMMENT = 100, DIAG_SIZE_CROSSTU = 100, DIAG_SIZE_SEMA = 4500, @@ -43,18 +46,18 @@ namespace clang { // Start position for diagnostics. enum { DIAG_START_COMMON = 0, - DIAG_START_DRIVER = DIAG_START_COMMON + DIAG_SIZE_COMMON, - DIAG_START_FRONTEND = DIAG_START_DRIVER + DIAG_SIZE_DRIVER, - DIAG_START_SERIALIZATION = DIAG_START_FRONTEND + DIAG_SIZE_FRONTEND, - DIAG_START_LEX = DIAG_START_SERIALIZATION + DIAG_SIZE_SERIALIZATION, - DIAG_START_PARSE = DIAG_START_LEX + DIAG_SIZE_LEX, - DIAG_START_AST = DIAG_START_PARSE + DIAG_SIZE_PARSE, - DIAG_START_COMMENT = DIAG_START_AST + DIAG_SIZE_AST, - DIAG_START_CROSSTU = DIAG_START_COMMENT + DIAG_SIZE_COMMENT, - DIAG_START_SEMA = DIAG_START_CROSSTU + DIAG_SIZE_CROSSTU, - DIAG_START_ANALYSIS = DIAG_START_SEMA + DIAG_SIZE_SEMA, - DIAG_START_REFACTORING = DIAG_START_ANALYSIS + DIAG_SIZE_ANALYSIS, - DIAG_UPPER_LIMIT = DIAG_START_REFACTORING + DIAG_SIZE_REFACTORING + DIAG_START_DRIVER = DIAG_START_COMMON + static_cast<int>(DIAG_SIZE_COMMON), + DIAG_START_FRONTEND = DIAG_START_DRIVER + static_cast<int>(DIAG_SIZE_DRIVER), + DIAG_START_SERIALIZATION = DIAG_START_FRONTEND + static_cast<int>(DIAG_SIZE_FRONTEND), + DIAG_START_LEX = DIAG_START_SERIALIZATION + static_cast<int>(DIAG_SIZE_SERIALIZATION), + DIAG_START_PARSE = DIAG_START_LEX + static_cast<int>(DIAG_SIZE_LEX), + DIAG_START_AST = DIAG_START_PARSE + static_cast<int>(DIAG_SIZE_PARSE), + DIAG_START_COMMENT = DIAG_START_AST + static_cast<int>(DIAG_SIZE_AST), + DIAG_START_CROSSTU = DIAG_START_COMMENT + static_cast<int>(DIAG_SIZE_COMMENT), + DIAG_START_SEMA = DIAG_START_CROSSTU + static_cast<int>(DIAG_SIZE_CROSSTU), + DIAG_START_ANALYSIS = DIAG_START_SEMA + static_cast<int>(DIAG_SIZE_SEMA), + DIAG_START_REFACTORING = DIAG_START_ANALYSIS + static_cast<int>(DIAG_SIZE_ANALYSIS), + DIAG_UPPER_LIMIT = DIAG_START_REFACTORING + static_cast<int>(DIAG_SIZE_REFACTORING) }; class CustomDiagInfo; @@ -65,7 +68,7 @@ namespace clang { // Get typedefs for common diagnostics. enum { #define DIAG(ENUM, FLAGS, DEFAULT_MAPPING, DESC, GROUP, SFINAE, CATEGORY, \ - NOWERROR, SHOWINSYSHEADER, DEFFERABLE) \ + NOWERROR, SHOWINSYSHEADER, SHOWINSYSMACRO, DEFFERABLE) \ ENUM, #define COMMONSTART #include "clang/Basic/DiagnosticCommonKinds.inc" @@ -97,11 +100,17 @@ namespace clang { } class DiagnosticMapping { + LLVM_PREFERRED_TYPE(diag::Severity) unsigned Severity : 3; + LLVM_PREFERRED_TYPE(bool) unsigned IsUser : 1; + LLVM_PREFERRED_TYPE(bool) unsigned IsPragma : 1; + LLVM_PREFERRED_TYPE(bool) unsigned HasNoWarningAsError : 1; + LLVM_PREFERRED_TYPE(bool) unsigned HasNoErrorAsFatal : 1; + LLVM_PREFERRED_TYPE(bool) unsigned WasUpgradedFromWarning : 1; public: @@ -156,6 +165,10 @@ public: Result.Severity = Bits & 0x7; return Result; } + + bool operator==(DiagnosticMapping Other) const { + return serialize() == Other.serialize(); + } }; /// Used for handling and querying diagnostic IDs. @@ -205,6 +218,9 @@ public: /// default. static bool isDefaultMappingAsError(unsigned DiagID); + /// Get the default mapping for this diagnostic. + static DiagnosticMapping getDefaultMapping(unsigned DiagID); + /// Determine whether the given built-in diagnostic ID is a Note. static bool isBuiltinNote(unsigned DiagID); @@ -224,6 +240,21 @@ public: /// static bool isBuiltinExtensionDiag(unsigned DiagID, bool &EnabledByDefault); + /// Given a group ID, returns the flag that toggles the group. + /// For example, for Group::DeprecatedDeclarations, returns + /// "deprecated-declarations". + static StringRef getWarningOptionForGroup(diag::Group); + + /// Given a diagnostic group ID, return its documentation. + static StringRef getWarningOptionDocumentation(diag::Group GroupID); + + /// Given a group ID, returns the flag that toggles the group. + /// For example, for "deprecated-declarations", returns + /// Group::DeprecatedDeclarations. + static std::optional<diag::Group> getGroupForWarningOption(StringRef); + + /// Return the lowest-level group that contains the specified diagnostic. + static std::optional<diag::Group> getGroupForDiag(unsigned DiagID); /// Return the lowest-level warning option that enables the specified /// diagnostic. diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticLex.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticLex.h index 7a3128de3b82..5f237085ae03 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticLex.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticLex.h @@ -15,7 +15,7 @@ namespace clang { namespace diag { enum { #define DIAG(ENUM, FLAGS, DEFAULT_MAPPING, DESC, GROUP, SFINAE, NOWERROR, \ - SHOWINSYSHEADER, DEFERRABLE, CATEGORY) \ + SHOWINSYSHEADER, SHOWINSYSMACRO, DEFERRABLE, CATEGORY) \ ENUM, #define LEXSTART #include "clang/Basic/DiagnosticLexKinds.inc" diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticLexKinds.td b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticLexKinds.td index bdf5d263fa92..75ca2fa16d34 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticLexKinds.td +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticLexKinds.td @@ -80,6 +80,10 @@ def warn_cxx11_keyword : Warning<"'%0' is a keyword in C++11">, InGroup<CXX11Compat>, DefaultIgnore; def warn_cxx20_keyword : Warning<"'%0' is a keyword in C++20">, InGroup<CXX20Compat>, DefaultIgnore; +def warn_c99_keyword : Warning<"'%0' is a keyword in C99">, + InGroup<C99Compat>, DefaultIgnore; +def warn_c23_keyword : Warning<"'%0' is a keyword in C23">, + InGroup<C23Compat>, DefaultIgnore; def ext_unterminated_char_or_string : ExtWarn< "missing terminating %select{'|'\"'}0 character">, InGroup<InvalidPPToken>; @@ -113,25 +117,61 @@ def warn_four_char_character_literal : Warning< // Unicode and UCNs def err_invalid_utf8 : Error< "source file is not valid UTF-8">; -def err_non_ascii : Error< - "non-ASCII characters are not allowed outside of literals and identifiers">; +def warn_invalid_utf8_in_comment : Extension< + "invalid UTF-8 in comment">, InGroup<DiagGroup<"invalid-utf8">>; +def err_character_not_allowed : Error< + "unexpected character <U+%0>">; +def err_character_not_allowed_identifier : Error< + "character <U+%0> not allowed %select{in|at the start of}1 an identifier">; def ext_unicode_whitespace : ExtWarn< "treating Unicode character as whitespace">, InGroup<DiagGroup<"unicode-whitespace">>; def warn_utf8_symbol_homoglyph : Warning< - "treating Unicode character <U+%0> as identifier character rather than " + "treating Unicode character <U+%0> as an identifier character rather than " "as '%1' symbol">, InGroup<DiagGroup<"unicode-homoglyph">>; def warn_utf8_symbol_zero_width : Warning< "identifier contains Unicode character <U+%0> that is invisible in " "some environments">, InGroup<DiagGroup<"unicode-zero-width">>; - +def ext_mathematical_notation : ExtWarn< + "mathematical notation character <U+%0> in an identifier is a Clang extension">, + InGroup<DiagGroup<"mathematical-notation-identifier-extension">>; + +def ext_delimited_escape_sequence : Extension< + "%select{delimited|named}0 escape sequences are a " + "%select{Clang|C++23}1 extension">, + InGroup<DiagGroup<"delimited-escape-sequence-extension">>; + +def warn_cxx23_delimited_escape_sequence : Warning< + "%select{delimited|named}0 escape sequences are " + "incompatible with C++ standards before C++23">, + InGroup<CXXPre23Compat>, DefaultIgnore; + +def err_delimited_escape_empty : Error< + "delimited escape sequence cannot be empty">; +def err_delimited_escape_missing_brace: Error< + "expected '{' after '\\%0' escape sequence">; +def err_delimited_escape_invalid : Error< + "invalid digit '%0' in escape sequence">; def err_hex_escape_no_digits : Error< "\\%0 used with no following hex digits">; +def err_invalid_ucn_name : Error< + "'%0' is not a valid Unicode character name">; +def note_invalid_ucn_name_loose_matching : Note< + "characters names in Unicode escape sequences are sensitive to case and whitespaces">; +def note_invalid_ucn_name_candidate : Note< + "did you mean %0 ('%2' U+%1)?">; + def warn_ucn_escape_no_digits : Warning< "\\%0 used with no following hex digits; " "treating as '\\' followed by identifier">, InGroup<Unicode>; def err_ucn_escape_incomplete : Error< "incomplete universal character name">; +def warn_delimited_ucn_incomplete : Warning< + "incomplete delimited universal character name; " + "treating as '\\' '%0' '{' identifier">, InGroup<Unicode>; +def warn_delimited_ucn_empty : Warning< + "empty delimited universal character name; " + "treating as '\\' '%0' '{' '}'">, InGroup<Unicode>; def warn_ucn_escape_incomplete : Warning< "incomplete universal character name; " "treating as '\\' followed by identifier">, InGroup<Unicode>; @@ -150,9 +190,6 @@ def warn_c99_compat_unicode_id : Warning< "%select{using this character in an identifier|starting an identifier with " "this character}0 is incompatible with C99">, InGroup<C99Compat>, DefaultIgnore; -def warn_cxx98_compat_unicode_id : Warning< - "using this character in an identifier is incompatible with C++98">, - InGroup<CXX98Compat>, DefaultIgnore; def warn_cxx98_compat_literal_ucn_escape_basic_scs : Warning< "specifying character '%0' with a universal character name " @@ -160,6 +197,14 @@ def warn_cxx98_compat_literal_ucn_escape_basic_scs : Warning< def warn_cxx98_compat_literal_ucn_control_character : Warning< "universal character name referring to a control character " "is incompatible with C++98">, InGroup<CXX98Compat>, DefaultIgnore; +def warn_c23_compat_literal_ucn_escape_basic_scs : Warning< + "specifying character '%0' with a universal character name is " + "incompatible with C standards before C23">, + InGroup<CPre23Compat>, DefaultIgnore; +def warn_c23_compat_literal_ucn_control_character : Warning< + "universal character name referring to a control character " + "is incompatible with C standards before C23">, + InGroup<CPre23Compat>, DefaultIgnore; def warn_ucn_not_valid_in_c89 : Warning< "universal character names are only valid in C99 or C++; " "treating as '\\' followed by identifier">, InGroup<Unicode>; @@ -179,17 +224,15 @@ def err_invalid_suffix_constant : Error< def warn_cxx11_compat_digit_separator : Warning< "digit separators are incompatible with C++ standards before C++14">, InGroup<CXXPre14Compat>, DefaultIgnore; -def warn_c2x_compat_digit_separator : Warning< - "digit separators are incompatible with C standards before C2x">, - InGroup<CPre2xCompat>, DefaultIgnore; +def warn_c23_compat_digit_separator : Warning< + "digit separators are incompatible with C standards before C23">, + InGroup<CPre23Compat>, DefaultIgnore; def err_digit_separator_not_between_digits : Error< "digit separator cannot appear at %select{start|end}0 of digit sequence">; -def warn_extraneous_char_constant : Warning< - "extraneous characters in character constant ignored">; def warn_char_constant_too_large : Warning< "character constant too long for its type">; -def err_multichar_utf_character_literal : Error< - "Unicode character literals may not contain multiple characters">; +def err_multichar_character_literal : Error< + "%select{wide|Unicode}0 character literals may not contain multiple characters">; def err_exponent_has_no_digits : Error<"exponent has no digits">; def err_hex_constant_requires : Error< "hexadecimal floating %select{constant|literal}0 requires " @@ -241,6 +284,17 @@ def ext_ms_reserved_user_defined_literal : ExtWarn< "identifier">, InGroup<ReservedUserDefinedLiteral>; def err_unsupported_string_concat : Error< "unsupported non-standard concatenation of string literals">; + +def warn_unevaluated_string_prefix : Warning< + "encoding prefix '%0' on an unevaluated string literal has no effect" + "%select{| and is incompatible with c++2c}1">, + InGroup<DiagGroup<"invalid-unevaluated-string">>; +def err_unevaluated_string_prefix : Error< + "an unevaluated string literal cannot have an encoding prefix">; +def err_unevaluated_string_udl : Error< + "an unevaluated string literal cannot be a user-defined literal">; +def err_unevaluated_string_invalid_escape_sequence : Error< + "invalid escape sequence '%0' in an unevaluated string literal">; def err_string_concat_mixed_suffix : Error< "differing user-defined suffixes ('%0' and '%1') in string literal " "concatenation">; @@ -257,7 +311,9 @@ def err_bad_character_encoding : Error< def warn_bad_character_encoding : ExtWarn< "illegal character encoding in character literal">, InGroup<InvalidSourceEncoding>; -def err_lexing_string : Error<"failure when lexing a string">; +def err_lexing_string : Error<"failure when lexing a string literal">; +def err_lexing_char : Error<"failure when lexing a character literal">; +def err_lexing_numeric : Error<"failure when lexing a numeric literal">; def err_placeholder_in_source : Error<"editor placeholder in source file">; //===----------------------------------------------------------------------===// @@ -301,11 +357,9 @@ def pp_pragma_sysheader_in_main_file : Warning< "#pragma system_header ignored in main file">, InGroup<DiagGroup<"pragma-system-header-outside-header">>; -def err_pragma_include_instead_not_sysheader : Error< - "'#pragma clang include_instead' cannot be used outside of system headers">; -def err_pragma_include_instead_system_reserved : Error< - "header '%0' is an implementation detail; #include %select{'%2'|either '%2' " - "or '%3'|one of %2}1 instead">; +def err_illegal_use_of_flt_eval_macro : Error< + "'__FLT_EVAL_METHOD__' cannot be expanded inside a scope containing " + "'#pragma clang fp eval_method'">; def pp_poisoning_existing_macro : Warning<"poisoning existing macro">; def pp_out_of_date_dependency : Warning< @@ -359,7 +413,15 @@ def ext_pp_include_search_ms : ExtWarn< def ext_pp_ident_directive : Extension<"#ident is a language extension">; def ext_pp_include_next_directive : Extension< "#include_next is a language extension">, InGroup<GNUIncludeNext>; -def ext_pp_warning_directive : Extension<"#warning is a language extension">; + +def ext_pp_warning_directive : Extension< + "#warning is a %select{C23|C++23}0 extension">; +def warn_cxx23_compat_warning_directive : Warning< + "#warning is incompatible with C++ standards before C++23">, + InGroup<CXXPre23Compat>, DefaultIgnore; +def warn_c23_compat_warning_directive : Warning< + "#warning is incompatible with C standards before C23">, + InGroup<CPre23Compat>, DefaultIgnore; def ext_pp_extra_tokens_at_eol : ExtWarn< "extra tokens at end of #%0 directive">, InGroup<ExtraTokens>; @@ -400,6 +462,10 @@ def ext_embedded_directive : Extension< def ext_missing_varargs_arg : Extension< "must specify at least one argument for '...' parameter of variadic macro">, InGroup<GNUZeroVariadicMacroArguments>; +def warn_cxx17_compat_missing_varargs_arg : Warning< + "passing no argument for the '...' parameter of a variadic macro is " + "incompatible with C++ standards before C++20">, + InGroup<CXXPre20Compat>, DefaultIgnore; def ext_empty_fnmacro_arg : Extension< "empty macro arguments are a C99 feature">, InGroup<C99>; def warn_cxx98_compat_empty_fnmacro_arg : Warning< @@ -411,7 +477,13 @@ def note_macro_expansion_here : Note<"expansion of macro %0 requested here">; def ext_pp_opencl_variadic_macros : Extension< "variadic macros are a Clang extension in OpenCL">; -def err_pp_invalid_directive : Error<"invalid preprocessing directive">; +def ext_pp_gnu_line_directive : Extension< + "this style of line directive is a GNU extension">, + InGroup<GNULineMarker>; +def err_pp_invalid_directive : Error< + "invalid preprocessing directive%select{|, did you mean '#%1'?}0">; +def warn_pp_invalid_directive : Warning< + err_pp_invalid_directive.Summary>, InGroup<DiagGroup<"unknown-directives">>; def err_pp_directive_required : Error< "%0 must be used within a preprocessing directive">; def err_pp_file_not_found : Error<"'%0' file not found">, DefaultFatal; @@ -430,6 +502,9 @@ def warn_pp_hdrstop_filename_ignored : Warning< "#pragma hdrstop filename not supported, " "/Fp can be used to specify precompiled header filename">, InGroup<ClangClPch>; +def remark_pp_search_path_usage : Remark< + "search path used: '%0'">, + InGroup<UsedSearchPath>; def err_pp_file_not_found_angled_include_not_fatal : Error< "'%0' file not found with <angled> %select{include|import}1; " "use \"quotes\" instead">; @@ -526,6 +601,27 @@ def warn_pragma_warning_expected_number : ExtWarn<"#pragma warning expected a warning number">, InGroup<UnknownPragmas>; +// - #pragma deprecated(...) +def warn_pragma_deprecated_macro_use : + ExtWarn<"macro %0 has been marked as deprecated%select{|: %2}1">, + InGroup<DeprecatedPragma>; + +// - #pragma clang restrict_expansion(...) +def warn_pragma_restrict_expansion_macro_use : + ExtWarn<"macro %0 has been marked as unsafe for use in headers" + "%select{|: %2}1">, + InGroup<RestrictExpansionMacro>; + +// - Note for macro annotations. +def note_pp_macro_annotation : + Note<"macro marked '%select{deprecated|restrict_expansion|final}0' here">; + +// - #pragma clang final(...) +def warn_pragma_final_macro : + ExtWarn<"macro %0 has been marked as final and should not be " + "%select{undefined|redefined}1">, + InGroup<FinalMacro>, ShowInSystemHeader; + // - #pragma execution_character_set(...) def warn_pragma_exec_charset_expected : ExtWarn<"#pragma execution_character_set expected '%0'">, @@ -574,10 +670,10 @@ def warn_pragma_diagnostic_unknown_warning : ExtWarn<"unknown warning group '%0', ignored">, InGroup<UnknownWarningOption>; // - #pragma __debug +def warn_pragma_debug_missing_command : Warning< + "missing debug command">, InGroup<IgnoredPragmas>; def warn_pragma_debug_unexpected_command : Warning< "unexpected debug command '%0'">, InGroup<IgnoredPragmas>; -def warn_pragma_debug_missing_argument : Warning< - "missing argument to debug command '%0'">, InGroup<IgnoredPragmas>; def warn_pragma_debug_unknown_module : Warning< "unknown module '%0'">, InGroup<IgnoredPragmas>; // #pragma module @@ -626,7 +722,7 @@ def ext_pp_bad_paste_ms : ExtWarn< def err_pp_operator_used_as_macro_name : Error< "C++ operator %0 (aka %1) used as a macro name">; def ext_pp_operator_used_as_macro_name : Extension< - err_pp_operator_used_as_macro_name.Text>, InGroup<MicrosoftCppMacro>; + err_pp_operator_used_as_macro_name.Summary>, InGroup<MicrosoftCppMacro>; def err_pp_illegal_floating_literal : Error< "floating point literal in preprocessor expression">; def err_pp_line_requires_integer : Error< @@ -654,6 +750,23 @@ def warn_cxx98_compat_pp_line_too_big : Warning< "#line number greater than 32767 is incompatible with C++98">, InGroup<CXX98CompatPedantic>, DefaultIgnore; +def warn_c23_compat_pp_directive : Warning< + "use of a '#%select{<BUG IF SEEN>|elifdef|elifndef}0' directive " + "is incompatible with C standards before C23">, + InGroup<CPre23Compat>, DefaultIgnore; +def ext_c23_pp_directive : ExtWarn< + "use of a '#%select{<BUG IF SEEN>|elifdef|elifndef}0' directive " + "is a C23 extension">, + InGroup<C23>; +def warn_cxx23_compat_pp_directive : Warning< + "use of a '#%select{<BUG IF SEEN>|elifdef|elifndef}0' directive " + "is incompatible with C++ standards before C++23">, + InGroup<CXXPre23Compat>, DefaultIgnore; +def ext_cxx23_pp_directive : ExtWarn< + "use of a '#%select{<BUG IF SEEN>|elifdef|elifndef}0' directive " + "is a C++23 extension">, + InGroup<CXX23>; + def err_pp_visibility_non_macro : Error<"no macro named %0">; def err_pp_arc_cf_code_audited_syntax : Error<"expected 'begin' or 'end'">; @@ -771,10 +884,13 @@ def warn_quoted_include_in_framework_header : Warning< def warn_framework_include_private_from_public : Warning< "public framework header includes private framework header '%0'" >, InGroup<FrameworkIncludePrivateFromPublic>; +def warn_deprecated_module_dot_map : Warning< + "'%0' as a module map name is deprecated, rename it to %select{module.modulemap|module.private.modulemap}1%select{| in the 'Modules' directory of the framework}2">, + InGroup<DeprecatedModuleDotMap>; -def warn_auto_module_import : Warning< +def remark_pp_include_directive_modular_translation : Remark< "treating #%select{include|import|include_next|__include_macros}0 as an " - "import of module '%1'">, InGroup<AutoImport>, DefaultIgnore; + "import of module '%1'">, InGroup<ModuleIncludeDirectiveTranslation>; def note_implicit_top_level_module_import_here : Note< "submodule of top-level module '%0' implicitly imported here">; def warn_uncovered_module_header : Warning< @@ -790,6 +906,8 @@ def warn_use_of_private_header_outside_module : Warning< InGroup<DiagGroup<"private-header">>, DefaultError; def err_undeclared_use_of_module : Error< "module %0 does not depend on a module exporting '%1'">; +def err_undeclared_use_of_module_indirect : Error< + "module %0 does not directly depend on a module exporting '%1', which is part of indirectly-used module %2">; def warn_non_modular_include_in_framework_module : Warning< "include of non-modular header inside framework module '%0': '%1'">, InGroup<NonModularIncludeInFrameworkModule>, DefaultIgnore; @@ -807,6 +925,11 @@ def err_header_import_semi_in_macro : Error< def err_header_import_not_header_unit : Error< "header file %0 (aka '%1') cannot be imported because " "it is not known to be a header unit">; +def warn_pp_include_angled_in_module_purview : Warning< + "'#include <filename>' attaches the declarations to the named module '%0'" + ", which is not usually intended; consider moving that directive before " + "the module declaration">, + InGroup<DiagGroup<"include-angled-in-module-purview">>; def warn_header_guard : Warning< "%0 is used as a header guard here, followed by #define of a different macro">, @@ -836,13 +959,24 @@ def err_pp_eof_in_assume_nonnull : Error< } -let CategoryName = "Dependency Directive Source Minimization Issue" in { +let CategoryName = "Dependency Directive Source Scanner Issue" in { -def err_dep_source_minimizer_missing_sema_after_at_import : Error< +def err_dep_source_scanner_missing_semi_after_at_import : Error< "could not find ';' after @import">; -def err_dep_source_minimizer_unexpected_tokens_at_import : Error< +def err_dep_source_scanner_unexpected_tokens_at_import : Error< "unexpected extra tokens at end of @import declaration">; } +def err_pp_double_begin_pragma_unsafe_buffer_usage : +Error<"already inside '#pragma unsafe_buffer_usage'">; + +def err_pp_unmatched_end_begin_pragma_unsafe_buffer_usage : +Error<"not currently inside '#pragma unsafe_buffer_usage'">; + +def err_pp_unclosed_pragma_unsafe_buffer_usage : +Error<"'#pragma unsafe_buffer_usage' was not ended">; + +def err_pp_pragma_unsafe_buffer_usage_syntax : +Error<"Expected 'begin' or 'end'">; } diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticOptions.def b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticOptions.def index 7be81f6b6a95..6d0c1b14acc1 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticOptions.def +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticOptions.def @@ -90,11 +90,15 @@ VALUE_DIAGOPT(ConstexprBacktraceLimit, 32, DefaultConstexprBacktraceLimit) VALUE_DIAGOPT(SpellCheckingLimit, 32, DefaultSpellCheckingLimit) /// Limit number of lines shown in a snippet. VALUE_DIAGOPT(SnippetLineLimit, 32, DefaultSnippetLineLimit) +/// Show line number column on the left of snippets. +VALUE_DIAGOPT(ShowLineNumbers, 1, DefaultShowLineNumbers) VALUE_DIAGOPT(TabStop, 32, DefaultTabStop) /// The distance between tab stops. /// Column limit for formatting message diagnostics, or 0 if unused. VALUE_DIAGOPT(MessageLength, 32, 0) +DIAGOPT(ShowSafeBufferUsageSuggestions, 1, 0) + #undef DIAGOPT #undef ENUM_DIAGOPT #undef VALUE_DIAGOPT diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticOptions.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticOptions.h index 17533b38ff5f..099982c3bdd5 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticOptions.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticOptions.h @@ -46,20 +46,20 @@ enum class DiagnosticLevelMask : unsigned { }; inline DiagnosticLevelMask operator~(DiagnosticLevelMask M) { - using UT = std::underlying_type<DiagnosticLevelMask>::type; + using UT = std::underlying_type_t<DiagnosticLevelMask>; return static_cast<DiagnosticLevelMask>(~static_cast<UT>(M)); } inline DiagnosticLevelMask operator|(DiagnosticLevelMask LHS, DiagnosticLevelMask RHS) { - using UT = std::underlying_type<DiagnosticLevelMask>::type; + using UT = std::underlying_type_t<DiagnosticLevelMask>; return static_cast<DiagnosticLevelMask>( static_cast<UT>(LHS) | static_cast<UT>(RHS)); } inline DiagnosticLevelMask operator&(DiagnosticLevelMask LHS, DiagnosticLevelMask RHS) { - using UT = std::underlying_type<DiagnosticLevelMask>::type; + using UT = std::underlying_type_t<DiagnosticLevelMask>; return static_cast<DiagnosticLevelMask>( static_cast<UT>(LHS) & static_cast<UT>(RHS)); } @@ -72,9 +72,10 @@ class DiagnosticOptions : public RefCountedBase<DiagnosticOptions>{ clang::DiagnosticsEngine *, bool); friend class CompilerInvocation; + friend class CompilerInvocationBase; public: - enum TextDiagnosticFormat { Clang, MSVC, Vi }; + enum TextDiagnosticFormat { Clang, MSVC, Vi, SARIF }; // Default values. enum { @@ -84,7 +85,8 @@ public: DefaultTemplateBacktraceLimit = 10, DefaultConstexprBacktraceLimit = 10, DefaultSpellCheckingLimit = 50, - DefaultSnippetLineLimit = 1, + DefaultSnippetLineLimit = 16, + DefaultShowLineNumbers = 1, }; // Define simple diagnostic options (with no accessors). @@ -122,6 +124,10 @@ public: /// default). std::vector<std::string> VerifyPrefixes; + /// The list of -Wsystem-header-in-module=... options used to override + /// whether -Wsystem-headers is enabled on a per-module basis. + std::vector<std::string> SystemHeaderWarningsModules; + public: // Define accessors/mutators for diagnostic options of enumeration type. #define DIAGOPT(Name, Bits, Default) diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticParse.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticParse.h index d066d3f71a25..81a8185d25fb 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticParse.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticParse.h @@ -15,7 +15,7 @@ namespace clang { namespace diag { enum { #define DIAG(ENUM, FLAGS, DEFAULT_MAPPING, DESC, GROUP, SFINAE, NOWERROR, \ - SHOWINSYSHEADER, DEFERRABLE, CATEGORY) \ + SHOWINSYSHEADER, SHOWINSYSMACRO, DEFERRABLE, CATEGORY) \ ENUM, #define PARSESTART #include "clang/Basic/DiagnosticParseKinds.inc" diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticParseKinds.td b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticParseKinds.td index 7e4b0841e06b..a30ab27566ec 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticParseKinds.td +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticParseKinds.td @@ -157,11 +157,17 @@ def err_duplicate_default_assoc : Error< "duplicate default generic association">; def note_previous_default_assoc : Note< "previous default generic association is here">; +def ext_generic_with_type_arg : Extension< + "passing a type argument as the first operand to '_Generic' is a Clang " + "extension">, InGroup<DiagGroup<"generic-type-extension">>; def ext_c99_feature : Extension< "'%0' is a C99 extension">, InGroup<C99>; def ext_c11_feature : Extension< "'%0' is a C11 extension">, InGroup<C11>; +def warn_c23_compat_keyword : Warning< + "'%0' is incompatible with C standards before C23">, + InGroup<CPre23Compat>, DefaultIgnore; def err_c11_noreturn_misplaced : Error< "'_Noreturn' keyword must precede function declarator">; @@ -174,10 +180,11 @@ def err_stmtexpr_file_scope : Error< "statement expression not allowed at file scope">; def ext_gnu_statement_expr : Extension< "use of GNU statement expression extension">, InGroup<GNUStatementExpression>; +def ext_gnu_statement_expr_macro : Extension< + "use of GNU statement expression extension from macro expansion">, + InGroup<GNUStatementExpressionFromMacroExpansion>; def ext_gnu_conditional_expr : Extension< "use of GNU ?: conditional expression extension, omitting middle operand">, InGroup<GNUConditionalOmittedOperand>; -def ext_gnu_empty_initializer : Extension< - "use of GNU empty initializer extension">, InGroup<GNUEmptyInitializer>; def ext_gnu_array_range : Extension<"use of GNU array range extension">, InGroup<GNUDesignator>; def ext_gnu_missing_equal_designator : ExtWarn< @@ -279,7 +286,7 @@ def err_inline_nested_namespace_definition : Error< def err_expected_semi_after_attribute_list : Error< "expected ';' after attribute list">; def err_expected_semi_after_static_assert : Error< - "expected ';' after static_assert">; + "expected ';' after '%0'">; def err_expected_semi_for : Error<"expected ';' in 'for' statement specifier">; def err_single_decl_assign_in_for_range : Error< "range-based 'for' statement uses ':', not '='">; @@ -292,8 +299,24 @@ def note_missing_selector_name : Note< def note_force_empty_selector_name : Note< "or insert whitespace before ':' to use %0 as parameter name " "and have an empty entry in the selector">; -def err_label_end_of_compound_statement : Error< - "label at end of compound statement: expected statement">; +def ext_c_label_followed_by_declaration : ExtWarn< + "label followed by a declaration is a C23 extension">, + InGroup<C23>; +def warn_c23_compat_label_followed_by_declaration : Warning< + "label followed by a declaration is incompatible with C standards before " + "C23">, InGroup<CPre23Compat>, DefaultIgnore; +def ext_c_label_end_of_compound_statement : ExtWarn< + "label at end of compound statement is a C23 extension">, + InGroup<C23>; +def ext_cxx_label_end_of_compound_statement : ExtWarn< + "label at end of compound statement is a C++23 extension">, + InGroup<CXX23>; +def warn_c23_compat_label_end_of_compound_statement : Warning< + "label at end of compound statement is incompatible with C standards before C23">, + InGroup<CPre23Compat>, DefaultIgnore; +def warn_cxx20_compat_label_end_of_compound_statement : Warning< + "label at end of compound statement is incompatible with C++ standards before C++23">, + InGroup<CXXPre23Compat>, DefaultIgnore; def err_address_of_label_outside_fn : Error< "use of address-of-label extension outside of a function body">; def err_asm_operand_wide_string_literal : Error< @@ -422,7 +445,7 @@ def err_unexpected_token_in_nested_name_spec : Error< def err_bool_redeclaration : Error< "redeclaration of C++ built-in type 'bool'">; def warn_cxx98_compat_static_assert : Warning< - "static_assert declarations are incompatible with C++98">, + "'static_assert' declarations are incompatible with C++98">, InGroup<CXX98Compat>, DefaultIgnore; def ext_ms_static_assert : ExtWarn< "use of 'static_assert' without inclusion of <assert.h> is a Microsoft " @@ -430,15 +453,15 @@ def ext_ms_static_assert : ExtWarn< def ext_cxx_static_assert_no_message : ExtWarn< "'static_assert' with no message is a C++17 extension">, InGroup<CXX17>; def ext_c_static_assert_no_message : ExtWarn< - "'_Static_assert' with no message is a C2x extension">, InGroup<C2x>; + "'_Static_assert' with no message is a C23 extension">, InGroup<C23>; def warn_cxx14_compat_static_assert_no_message : Warning< "'static_assert' with no message is incompatible with C++ standards before " "C++17">, DefaultIgnore, InGroup<CXXPre17Compat>; def warn_c17_compat_static_assert_no_message : Warning< "'_Static_assert' with no message is incompatible with C standards before " - "C2x">, - DefaultIgnore, InGroup<CPre2xCompat>; + "C23">, + DefaultIgnore, InGroup<CPre23Compat>; def err_function_definition_not_allowed : Error< "function definition is not allowed here">; def err_expected_end_of_enumerator : Error< @@ -535,6 +558,8 @@ def err_invalid_operator_on_type : Error< "cannot use %select{dot|arrow}0 operator on a type">; def err_expected_unqualified_id : Error< "expected %select{identifier|unqualified-id}0">; +def err_while_loop_outside_of_a_function : Error< + "while loop outside of a function">; def err_brackets_go_after_unqualified_id : Error< "brackets are not allowed here; to declare an array, " "place the brackets after the %select{identifier|name}0">; @@ -549,6 +574,12 @@ def err_expected_init_in_condition_lparen : Error< "variable declaration in condition cannot have a parenthesized initializer">; def err_extraneous_rparen_in_condition : Error< "extraneous ')' after condition, expected a statement">; +def ext_alias_in_init_statement : ExtWarn< + "alias declaration in this context is a C++23 extension">, + InGroup<CXX23>; +def warn_cxx20_alias_in_init_statement : Warning< + "alias declaration in this context is incompatible with C++ standards before C++23">, + DefaultIgnore, InGroup<CXXPre23Compat>; def warn_dangling_else : Warning< "add explicit braces to avoid dangling else">, InGroup<DanglingElse>; @@ -586,6 +617,9 @@ def warn_cxx17_compat_using_enum_declaration : Warning< def ext_using_enum_declaration : ExtWarn< "using enum declaration is a C++20 extension">, InGroup<CXX20>; +def err_using_enum_expect_identifier : Error< + "using enum %select{requires an enum or typedef name|" + "does not permit an elaborated enum specifier}0">; def err_constructor_bad_name : Error< "missing return type for function %0; did you mean the constructor name %1?">; def err_destructor_tilde_identifier : Error< @@ -626,6 +660,13 @@ def ext_constexpr_if : ExtWarn< def warn_cxx14_compat_constexpr_if : Warning< "constexpr if is incompatible with C++ standards before C++17">, DefaultIgnore, InGroup<CXXPre17Compat>; +def ext_consteval_if : ExtWarn< + "consteval if is a C++23 extension">, + InGroup<CXX23>; +def warn_cxx20_compat_consteval_if : Warning< + "consteval if is incompatible with C++ standards before C++23">, + InGroup<CXXPre23Compat>, DefaultIgnore; + def ext_init_statement : ExtWarn< "'%select{if|switch}0' initialization statements are a C++17 extension">, InGroup<CXX17>; @@ -668,6 +709,8 @@ def warn_cxx98_compat_noexcept_expr : Warning< InGroup<CXX98Compat>, DefaultIgnore; def warn_cxx98_compat_nullptr : Warning< "'nullptr' is incompatible with C++98">, InGroup<CXX98Compat>, DefaultIgnore; +def ext_c_nullptr : Extension< + "'nullptr' is a C23 extension">, InGroup<C23>; def warn_wrong_clang_attr_namespace : Warning< "'__clang__' is a predefined macro name, not an attribute scope specifier; " @@ -682,8 +725,17 @@ def warn_cxx14_compat_ns_enum_attribute : Warning< def warn_cxx98_compat_alignas : Warning<"'alignas' is incompatible with C++98">, InGroup<CXX98Compat>, DefaultIgnore; def warn_cxx98_compat_attribute : Warning< - "C++11 attribute syntax is incompatible with C++98">, + "[[]] attributes are incompatible with C++ standards before C++11">, InGroup<CXX98Compat>, DefaultIgnore; +def warn_ext_cxx11_attributes : Extension< + "[[]] attributes are a C++11 extension">, + InGroup<CXX11>; +def warn_pre_c23_compat_attributes : Warning< + "[[]] attributes are incompatible with C standards before C23">, + DefaultIgnore, InGroup<CPre23Compat>; +def warn_ext_c23_attributes : Extension< + "[[]] attributes are a C23 extension">, + InGroup<C23>; def err_cxx11_attribute_forbids_arguments : Error< "attribute %0 cannot have an argument list">; def err_attribute_requires_arguments : Error< @@ -699,13 +751,17 @@ def ext_using_attribute_ns : ExtWarn< def err_using_attribute_ns_conflict : Error< "attribute with scope specifier cannot follow default scope specifier">; def err_attributes_not_allowed : Error<"an attribute list cannot appear here">; +def err_keyword_not_allowed : Error<"%0 cannot appear here">; def ext_cxx11_attr_placement : ExtWarn< - "ISO C++ does not allow an attribute list to appear here">, + "ISO C++ does not allow %select{an attribute list|%0}1 to appear here">, InGroup<DiagGroup<"cxx-attribute-extension">>; def err_attributes_misplaced : Error<"misplaced attributes; expected attributes here">; +def err_keyword_misplaced : Error<"misplaced %0; expected %0 here">; def err_l_square_l_square_not_attribute : Error< "C++11 only allows consecutive left square brackets when " "introducing an attribute">; +def err_attribute_argument_parm_pack_not_supported : Error< + "attribute %0 does not support argument pack expansion">; def err_ms_declspec_type : Error< "__declspec attributes must be an identifier or string literal">; def err_ms_property_no_getter_or_putter : Error< @@ -742,8 +798,9 @@ def err_unknown_template_name : Error< "unknown template name %0">; def err_expected_comma_greater : Error< "expected ',' or '>' in template-parameter-list">; -def err_class_on_template_template_param : Error< - "template template parameter requires 'class' after the parameter list">; +def err_class_on_template_template_param + : Error<"template template parameter requires 'class'%select{| or " + "'typename'}0 after the parameter list">; def ext_template_template_param_typename : ExtWarn< "template template parameter using 'typename' is a C++17 extension">, InGroup<CXX17>; @@ -754,7 +811,8 @@ def warn_cxx14_compat_template_template_param_typename : Warning< def err_template_spec_syntax_non_template : Error< "identifier followed by '<' indicates a class template specialization but " "%0 %select{does not refer to a template|refers to a function template|" - "<unused>|refers to a variable template|<unused>|refers to a concept}1">; + "<unused>|refers to a variable template|<unused>|<unused>|" + "refers to a concept}1">; def err_id_after_template_in_nested_name_spec : Error< "expected template name after 'template' keyword in nested name specifier">; def err_unexpected_template_in_unqualified_id : Error< @@ -806,10 +864,10 @@ def err_requires_expr_expected_type_constraint : Error< def err_requires_expr_simple_requirement_noexcept : Error< "'noexcept' can only be used in a compound requirement (with '{' '}' around " "the expression)">; -def warn_requires_expr_in_simple_requirement : Warning< - "this requires expression will only be checked for syntactic validity; did " +def err_requires_expr_in_simple_requirement : Error< + "requires expression in requirement body; did " "you intend to place it in a nested requirement? (add another 'requires' " - "before the expression)">, InGroup<DiagGroup<"requires-expression">>; + "before the expression)">; def err_missing_dependent_template_keyword : Error< "use 'template' keyword to treat '%0' as a dependent template name">; @@ -944,6 +1002,9 @@ def err_duplicate_class_virt_specifier : Error< def err_duplicate_virt_specifier : Error< "class member already marked '%0'">; +def err_virt_specifier_outside_class : Error< + "'%0' specifier is not allowed outside a class definition">; + def err_expected_parameter_pack : Error< "expected the name of a parameter pack">; def err_paren_sizeof_parameter_pack : Error< @@ -963,7 +1024,8 @@ def warn_cxx98_compat_lambda : Warning< "lambda expressions are incompatible with C++98">, InGroup<CXX98Compat>, DefaultIgnore; def err_lambda_decl_specifier_repeated : Error< - "%select{'mutable'|'constexpr'|'consteval'}0 cannot appear multiple times in a lambda declarator">; + "%select{'mutable'|'static'|'constexpr'|'consteval'}0 cannot " + "appear multiple times in a lambda declarator">; def err_lambda_capture_misplaced_ellipsis : Error< "ellipsis in pack %select{|init-}0capture must appear %select{after|before}0 " "the name of the capture">; @@ -972,14 +1034,15 @@ def err_lambda_capture_multiple_ellipses : Error< def err_capture_default_first : Error< "capture default must be first">; def ext_decl_attrs_on_lambda : ExtWarn< - "an attribute specifier sequence in this position is a C++2b extension">, - InGroup<CXX2b>; + "%select{an attribute specifier sequence|%0}1 in this position " + "is a C++23 extension">, InGroup<CXX23AttrsOnLambda>; def ext_lambda_missing_parens : ExtWarn< - "lambda without a parameter clause is a C++2b extension">, - InGroup<CXX2b>; + "lambda without a parameter clause is a C++23 extension">, + InGroup<CXX23>; def warn_cxx20_compat_decl_attrs_on_lambda : Warning< - "an attribute specifier sequence in this position is incompatible with C++ " - "standards before C++2b">, InGroup<CXXPre2bCompat>, DefaultIgnore; + "%select{an attribute specifier sequence|%1}0 in this position " + "is incompatible with C++ standards before C++23">, + InGroup<CXXPre23Compat>, DefaultIgnore; // C++17 lambda expressions def err_expected_star_this_capture : Error< @@ -1002,6 +1065,17 @@ def warn_cxx17_compat_lambda_template_parameter_list: Warning< def err_lambda_template_parameter_list_empty : Error< "lambda template parameter list cannot be empty">; +// C++23 static lambdas +def err_static_lambda: ExtWarn< + "static lambdas are a C++23 extension">, InGroup<CXX23>; +def warn_cxx20_compat_static_lambda : Warning< + "static lambdas are incompatible with C++ standards before C++23">, + InGroup<CXXPre23Compat>, DefaultIgnore; +def err_static_mutable_lambda : Error< + "lambda cannot be both mutable and static">; +def err_static_lambda_captures : Error< + "a static lambda cannot have any captures">; + // Availability attribute def err_expected_version : Error< "expected a version of the form 'major[.minor[.subminor]]'">; @@ -1046,7 +1120,7 @@ def err_availability_query_repeated_star : Error< // External source symbol attribute def err_external_source_symbol_expected_keyword : Error< - "expected 'language', 'defined_in', or 'generated_declaration'">; + "expected 'language', 'defined_in', 'generated_declaration', or 'USR'">; def err_external_source_symbol_duplicate_clause : Error< "duplicate %0 clause in an 'external_source_symbol' attribute">; @@ -1102,6 +1176,9 @@ def warn_pragma_expected_integer : Warning< def warn_pragma_ms_struct : Warning< "incorrect use of '#pragma ms_struct on|off' - ignored">, InGroup<IgnoredPragmas>; +def warn_pragma_ms_fenv_access : Warning< + "incorrect use of '#pragma fenv_access (on|off)' - ignored">, + InGroup<IgnoredPragmas>; def warn_pragma_extra_tokens_at_eol : Warning< "extra tokens at end of '#pragma %0' - ignored">, InGroup<IgnoredPragmas>; @@ -1144,10 +1221,6 @@ def warn_pragma_pack_malformed : Warning< def warn_pragma_intrinsic_builtin : Warning< "%0 is not a recognized builtin%select{|; consider including <intrin.h> to access non-builtin intrinsics}1">, InGroup<IgnoredPragmaIntrinsic>; -// - #pragma optimize -def warn_pragma_optimize : Warning< - "'#pragma optimize' is not supported">, - InGroup<IgnoredPragmaOptimize>; // - #pragma unused def warn_pragma_unused_expected_var : Warning< "expected '#pragma unused' argument to be a variable name">, @@ -1167,9 +1240,6 @@ def ext_stdc_pragma_ignored : ExtWarn<"unknown pragma in STDC namespace">, // The C standard 7.6.1p2 says "The [FENV_ACCESS] pragma shall occur either // outside external declarations or preceding all explicit declarations and // statements inside a compound statement. -def err_pragma_stdc_fenv_access_scope : Error< - "'#pragma STDC FENV_ACCESS' can only appear at file scope or at the start of" - " a compound statement">; def warn_stdc_fenv_round_not_supported : Warning<"pragma STDC FENV_ROUND is not supported">, InGroup<UnknownPragmas>; @@ -1218,8 +1288,6 @@ def err_pragma_attribute_extra_tokens_after_attribute : Error< "extra tokens after attribute in a '#pragma clang attribute push'">; def err_pragma_attribute_unsupported_attribute : Error< "attribute %0 is not supported by '#pragma clang attribute'">; -def err_pragma_attribute_multiple_attributes : Error< - "more than one attribute specified in '#pragma clang attribute push'">; def err_pragma_attribute_expected_attribute_syntax : Error< "expected an attribute that is specified using the GNU, C++11 or '__declspec'" " syntax">; @@ -1248,6 +1316,13 @@ def err_pragma_attribute_namespace_on_attribute : Error< def note_pragma_attribute_namespace_on_attribute : Note< "omit the namespace to add attributes to the most-recently" " pushed attribute group">; +def warn_no_support_for_eval_method_source_on_m32 : Warning< + "Setting the floating point evaluation method to `source` on a target" + " without SSE is not supported.">, InGroup<Pragmas>; +// - #pragma __debug +def warn_pragma_debug_dependent_argument : Warning< + "%select{value|type}0-dependent expression passed as an argument to debug " + "command">, InGroup<IgnoredPragmas>; // OpenCL EXTENSION pragma (OpenCL 1.1 [9.1]) def warn_pragma_expected_colon : Warning< @@ -1255,12 +1330,13 @@ def warn_pragma_expected_colon : Warning< def warn_pragma_expected_predicate : Warning< "expected %select{'enable', 'disable', 'begin' or 'end'|'disable'}0 - ignoring">, InGroup<IgnoredPragmas>; def warn_pragma_unknown_extension : Warning< - "unknown OpenCL extension %0 - ignoring">, InGroup<IgnoredPragmas>; + "OpenCL extension %0 unknown or does not require pragma - ignoring">, InGroup<IgnoredPragmas>; def warn_pragma_unsupported_extension : Warning< "unsupported OpenCL extension %0 - ignoring">, InGroup<IgnoredPragmas>; def warn_pragma_extension_is_core : Warning< "OpenCL extension %0 is core feature or supported optional core feature - ignoring">, InGroup<OpenCLCoreFeaturesDiagGroup>, DefaultIgnore; +def err_modifier_expected_colon : Error<"missing ':' after %0 modifier">; // OpenCL errors. def err_opencl_taking_function_address_parser : Error< @@ -1272,12 +1348,44 @@ def err_opencl_logical_exclusive_or : Error< def err_openclcxx_virtual_function : Error< "virtual functions are not supported in C++ for OpenCL">; +// OpenACC Support. +def warn_pragma_acc_ignored + : Warning<"unexpected '#pragma acc ...' in program">, + InGroup<SourceUsesOpenACC>, + DefaultIgnore; +def err_acc_unexpected_directive + : Error<"unexpected OpenACC directive %select{|'#pragma acc %1'}0">; +def warn_pragma_acc_unimplemented + : Warning<"OpenACC directives not yet implemented, pragma ignored">, + InGroup<SourceUsesOpenACC>; +def err_acc_invalid_directive + : Error<"invalid OpenACC directive %select{%1|'%1 %2'}0">; +def err_acc_invalid_clause : Error<"invalid OpenACC clause %0">; +def err_acc_missing_directive : Error<"expected OpenACC directive">; +def err_acc_invalid_open_paren + : Error<"expected clause-list or newline in OpenACC directive">; +def err_acc_invalid_default_clause_kind + : Error<"invalid value for 'default' clause; expected 'present' or 'none'">; +def err_acc_invalid_tag_kind + : Error<"invalid tag %0 on '%1' %select{directive|clause}2">; +def err_acc_expected_reduction_operator + : Error<"missing reduction operator, expected '+', '*', 'max', 'min', '&', " + "'|', '^', '&&', or '||', follwed by a ':'">; +def err_acc_invalid_reduction_operator + : Error<"invalid reduction operator, expected '+', '*', 'max', 'min', " + "'&', '|', '^', '&&', or '||'">; +def err_acc_incorrect_bind_arg : Error<"expected identifier or string literal">; + // OpenMP support. def warn_pragma_omp_ignored : Warning< "unexpected '#pragma omp ...' in program">, InGroup<SourceUsesOpenMP>, DefaultIgnore; def warn_omp_extra_tokens_at_eol : Warning< "extra tokens at the end of '#pragma omp %0' are ignored">, InGroup<ExtraTokens>; +def err_omp_multiple_step_or_linear_modifier : Error< + "multiple %select{'step size'|'linear modifier'}0 found in linear clause">; +def err_omp_deprecate_old_syntax: Error< + "old syntax '%0' on '%1' clause was deprecated, use new syntax '%2'">; def warn_pragma_expected_colon_r_paren : Warning< "missing ':' or ')' after %0 - ignoring">, InGroup<IgnoredPragmas>; def err_omp_unknown_directive : Error< @@ -1286,8 +1394,12 @@ def err_omp_unexpected_directive : Error< "unexpected OpenMP directive %select{|'#pragma omp %1'}0">; def err_omp_expected_punc : Error< "expected ',' or ')' in '%0' %select{clause|directive}1">; +def warn_clause_expected_string : Warning< + "expected string literal in 'clause %0' - ignoring">, InGroup<IgnoredPragmas>; def err_omp_unexpected_clause : Error< "unexpected OpenMP clause '%0' in directive '#pragma omp %1'">; +def err_omp_unexpected_clause_extension_only : Error< + "OpenMP clause '%0' is only available as extension, use '-fopenmp-extensions'">; def err_omp_immediate_directive : Error< "'#pragma omp %0' %select{|with '%2' clause }1cannot be an immediate substatement">; def err_omp_expected_identifier_for_critical : Error< @@ -1300,17 +1412,21 @@ def err_omp_expected_punc_after_iterator : Error< "expected ',' or ')' after iterator specifier">; def err_omp_decl_in_declare_simd_variant : Error< "function declaration is expected after 'declare %select{simd|variant}0' directive">; +def err_omp_sink_and_source_iteration_not_allowd: Error<" '%0 %select{sink:|source:}1' must be with '%select{omp_cur_iteration - 1|omp_cur_iteration}1'">; def err_omp_unknown_map_type : Error< "incorrect map type, expected one of 'to', 'from', 'tofrom', 'alloc', 'release', or 'delete'">; def err_omp_unknown_map_type_modifier : Error< - "incorrect map type modifier, expected 'always', 'close', " - "%select{or 'mapper'|'mapper', or 'present'}0">; + "incorrect map type modifier, expected one of: 'always', 'close', 'mapper'" + "%select{|, 'present'|, 'present', 'iterator'}0%select{|, 'ompx_hold'}1">; def err_omp_map_type_missing : Error< "missing map type">; def err_omp_map_type_modifier_missing : Error< "missing map type modifier">; def err_omp_declare_simd_inbranch_notinbranch : Error< "unexpected '%0' clause, '%1' is specified already">; +def err_omp_expected_clause_argument + : Error<"expected '%0' clause with an argument on '#pragma omp %1' " + "construct">; def err_expected_end_declare_target_or_variant : Error< "expected '#pragma omp end declare %select{target|variant}0'">; def err_expected_begin_declare_variant @@ -1327,23 +1443,40 @@ def warn_omp_unknown_assumption_clause_without_args def note_omp_assumption_clause_continue_here : Note<"the ignored tokens spans until here">; def err_omp_declare_target_unexpected_clause: Error< - "unexpected '%0' clause, only %select{'device_type'|'to' or 'link'|'to', 'link' or 'device_type'}1 clauses expected">; + "unexpected '%0' clause, only %select{'device_type'|'to' or 'link'|'to', 'link' or 'device_type'|'device_type', 'indirect'|'to', 'link', 'device_type' or 'indirect'}1 clauses expected">; +def err_omp_declare_target_unexpected_clause_52: Error< + "unexpected '%0' clause, only %select{'device_type'|'enter' or 'link'|'enter', 'link' or 'device_type'|'device_type', 'indirect'|'enter', 'link', 'device_type' or 'indirect'}1 clauses expected">; def err_omp_begin_declare_target_unexpected_implicit_to_clause: Error< "unexpected '(', only 'to', 'link' or 'device_type' clauses expected for 'begin declare target' directive">; -def err_omp_declare_target_unexpected_clause_after_implicit_to: Error< +def err_omp_declare_target_wrong_clause_after_implicit_to: Error< "unexpected clause after an implicit 'to' clause">; +def err_omp_declare_target_wrong_clause_after_implicit_enter: Error< + "unexpected clause after an implicit 'enter' clause">; def err_omp_declare_target_missing_to_or_link_clause: Error< - "expected at least one 'to' or 'link' clause">; + "expected at least one %select{'to' or 'link'|'to', 'link' or 'indirect'}0 clause">; +def err_omp_declare_target_missing_enter_or_link_clause: Error< + "expected at least one %select{'enter' or 'link'|'enter', 'link' or 'indirect'}0 clause">; +def err_omp_declare_target_unexpected_to_clause: Error< + "unexpected 'to' clause, use 'enter' instead">; +def err_omp_declare_target_unexpected_enter_clause: Error< + "unexpected 'enter' clause, use 'to' instead">; def err_omp_declare_target_multiple : Error< "%0 appears multiple times in clauses on the same declare target directive">; +def err_omp_declare_target_indirect_device_type: Error< + "only 'device_type(any)' clause is allowed with indirect clause">; def err_omp_expected_clause: Error< "expected at least one clause on '#pragma omp %0' directive">; def err_omp_mapper_illegal_identifier : Error< "illegal OpenMP user-defined mapper identifier">; def err_omp_mapper_expected_declarator : Error< "expected declarator on 'omp declare mapper' directive">; +def err_omp_unexpected_append_op : Error< + "unexpected operation specified in 'append_args' clause, expected 'interop'">; +def err_omp_unexpected_execution_modifier : Error< + "unexpected 'execution' modifier in non-executable context">; def err_omp_declare_variant_wrong_clause : Error< - "expected '%0' clause on 'omp declare variant' directive">; + "expected %select{'match'|'match', 'adjust_args', or 'append_args'}0 clause " + "on 'omp declare variant' directive">; def err_omp_declare_variant_duplicate_nested_trait : Error< "nested OpenMP context selector contains duplicated trait '%0'" " in selector '%1' and set '%2' with different score">; @@ -1354,11 +1487,13 @@ def warn_omp_declare_variant_string_literal_or_identifier "%select{set|selector|property}0; " "%select{set|selector|property}0 skipped">, InGroup<OpenMPClauses>; -def warn_unknown_begin_declare_variant_isa_trait +def warn_unknown_declare_variant_isa_trait : Warning<"isa trait '%0' is not known to the current target; verify the " "spelling or consider restricting the context selector with the " "'arch' selector further">, InGroup<SourceUsesOpenMP>; +def note_ompx_bare_clause : Note< + "OpenMP extension clause '%0' only allowed with '#pragma omp %1'">; def note_omp_declare_variant_ctx_options : Note<"context %select{set|selector|property}0 options are: %1">; def warn_omp_declare_variant_expected @@ -1436,6 +1571,21 @@ def warn_omp51_compat_attributes : Warning< "specifying OpenMP directives with [[]] is incompatible with OpenMP " "standards before OpenMP 5.1">, InGroup<OpenMPPre51Compat>, DefaultIgnore; +def err_omp_expected_colon : Error<"missing ':' in %0">; +def err_omp_missing_comma : Error< "missing ',' after %0">; +def err_omp_expected_context_selector + : Error<"expected valid context selector in %0">; +def err_omp_requires_out_inout_depend_type : Error< + "reserved locator 'omp_all_memory' requires 'out' or 'inout' " + "dependency types">; +def warn_omp_more_one_omp_all_memory : Warning< + "reserved locator 'omp_all_memory' cannot be specified more than once">, + InGroup<OpenMPClauses>; +def warn_omp_depend_in_ordered_deprecated : Warning<"'depend' clause for" + " 'ordered' is deprecated; use 'doacross' instead">, InGroup<Deprecated>; +def warn_omp_invalid_attribute_for_ompx_attributes : Warning<"'ompx_attribute' clause only allows " + "'amdgpu_flat_work_group_size', 'amdgpu_waves_per_eu', and 'launch_bounds'; " + "%0 is ignored">, InGroup<OpenMPExtensions>; // Pragma loop support. def err_pragma_loop_missing_argument : Error< @@ -1453,26 +1603,31 @@ def note_pragma_loop_invalid_vectorize_option : Note< "vectorize_width(X, scalable) where X is an integer, or vectorize_width('fixed' or 'scalable')">; def err_pragma_fp_invalid_option : Error< - "%select{invalid|missing}0 option%select{ %1|}0; expected 'contract', 'reassociate' or 'exceptions'">; + "%select{invalid|missing}0 option%select{ %1|}0; expected 'contract', 'reassociate', 'reciprocal', or 'exceptions'">; def err_pragma_fp_invalid_argument : Error< "unexpected argument '%0' to '#pragma clang fp %1'; expected " "%select{" "'fast' or 'on' or 'off'|" "'on' or 'off'|" - "'ignore', 'maytrap' or 'strict'}2">; + "'on' or 'off'|" + "'ignore', 'maytrap' or 'strict'|" + "'source', 'double' or 'extended'}2">; def err_pragma_invalid_keyword : Error< "invalid argument; expected 'enable'%select{|, 'full'}0%select{|, 'assume_safety'}1 or 'disable'">; def err_pragma_pipeline_invalid_keyword : Error< "invalid argument; expected 'disable'">; +// API notes. +def err_type_unparsed : Error<"unparsed tokens following type">; + // Pragma unroll support. def warn_pragma_unroll_cuda_value_in_parens : Warning< "argument to '#pragma unroll' should not be in parentheses in CUDA C/C++">, InGroup<CudaCompat>; def warn_cuda_attr_lambda_position : Warning< - "nvcc does not allow '__%0__' to appear after '()' in lambdas">, + "nvcc does not allow '__%0__' to appear after the parameter list in lambdas">, InGroup<CudaCompat>; def warn_pragma_force_cuda_host_device_bad_arg : Warning< "incorrect use of #pragma clang force_cuda_host_device begin|end">, @@ -1480,6 +1635,12 @@ def warn_pragma_force_cuda_host_device_bad_arg : Warning< def err_pragma_cannot_end_force_cuda_host_device : Error< "force_cuda_host_device end pragma without matching " "force_cuda_host_device begin">; + +def warn_ext_int_deprecated : Warning< + "'_ExtInt' is deprecated; use '_BitInt' instead">, InGroup<DeprecatedType>; +def ext_bit_int : Extension< + "'_BitInt' in %select{C17 and earlier|C++}0 is a Clang extension">, + InGroup<DiagGroup<"bit-int-extension">>; } // end of Parse Issue category. let CategoryName = "Modules Issue" in { @@ -1489,8 +1650,12 @@ def err_module_expected_ident : Error< "expected a module name after '%select{module|import}0'">; def err_attribute_not_module_attr : Error< "%0 attribute cannot be applied to a module">; +def err_keyword_not_module_attr : Error< + "%0 cannot be applied to a module">; def err_attribute_not_import_attr : Error< "%0 attribute cannot be applied to a module import">; +def err_keyword_not_import_attr : Error< + "%0 cannot be applied to a module import">; def err_module_expected_semi : Error< "expected ';' after module name">; def err_global_module_introducer_not_at_start : Error< @@ -1502,7 +1667,13 @@ def err_private_module_fragment_expected_semi : Error< "expected ';' after private module fragment declaration">; def err_missing_before_module_end : Error<"expected %0 at end of module">; def err_unsupported_module_partition : Error< - "sorry, module partitions are not yet supported">; + "module partitions are only supported for C++20 onwards">; +def err_import_not_allowed_here : Error< + "imports must immediately follow the module declaration">; +def err_partition_import_outside_module : Error< + "module partition imports must be within a module purview">; +def err_import_in_wrong_fragment : Error< + "module%select{| partition}0 imports cannot be in the %select{global|private}1 module fragment">; def err_export_empty : Error<"export declaration cannot be empty">; } @@ -1525,14 +1696,16 @@ def note_meant_to_use_typename : Note< let CategoryName = "Coroutines Issue" in { def err_for_co_await_not_range_for : Error< "'co_await' modifier can only be applied to range-based for loop">; +def warn_deprecated_for_co_await : Warning< + "'for co_await' belongs to CoroutineTS instead of C++20, which is deprecated">, + InGroup<DeprecatedCoroutine>; } let CategoryName = "Concepts Issue" in { def err_concept_definition_not_identifier : Error< "name defined in concept definition must be an identifier">; -def ext_concept_legacy_bool_keyword : ExtWarn< - "ISO C++20 does not permit the 'bool' keyword after 'concept'">, - InGroup<DiagGroup<"concepts-ts-compat">>; +def err_concept_legacy_bool_keyword : Error< + "ISO C++ does not permit the 'bool' keyword after 'concept'">; def err_placeholder_expected_auto_or_decltype_auto : Error< "expected 'auto' or 'decltype(auto)' after concept name">; } @@ -1547,4 +1720,16 @@ def warn_max_tokens_total : Warning< def note_max_tokens_total_override : Note<"total token limit set here">; +// HLSL Parser Diagnostics + +def err_expected_semantic_identifier : Error< + "expected HLSL Semantic identifier">; +def err_invalid_declaration_in_hlsl_buffer : Error< + "invalid declaration inside %select{tbuffer|cbuffer}0">; +def err_unknown_hlsl_semantic : Error<"unknown HLSL semantic %0">; +def err_hlsl_separate_attr_arg_and_number : Error<"wrong argument format for hlsl attribute, use %0 instead">; +def ext_hlsl_access_specifiers : ExtWarn< + "access specifiers are a clang HLSL extension">, + InGroup<HLSLExtension>; + } // end of Parser diagnostics diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticRefactoring.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticRefactoring.h index fc7564047a24..9b628dbeb7c2 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticRefactoring.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticRefactoring.h @@ -15,7 +15,7 @@ namespace clang { namespace diag { enum { #define DIAG(ENUM, FLAGS, DEFAULT_MAPPING, DESC, GROUP, SFINAE, NOWERROR, \ - SHOWINSYSHEADER, DEFERRABLE, CATEGORY) \ + SHOWINSYSHEADER, SHOWINSYSMACRO, DEFERRABLE, CATEGORY) \ ENUM, #define REFACTORINGSTART #include "clang/Basic/DiagnosticRefactoringKinds.inc" diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSema.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSema.h index 7323167aeee8..45014fe21271 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSema.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSema.h @@ -15,7 +15,7 @@ namespace clang { namespace diag { enum { #define DIAG(ENUM, FLAGS, DEFAULT_MAPPING, DESC, GROUP, SFINAE, NOWERROR, \ - SHOWINSYSHEADER, DEFERRABLE, CATEGORY) \ + SHOWINSYSHEADER, SHOWINSYSMACRO, DEFERRABLE, CATEGORY) \ ENUM, #define SEMASTART #include "clang/Basic/DiagnosticSemaKinds.inc" diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSemaKinds.td b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSemaKinds.td index c57b8eca7deb..07ba4ecf7e12 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSemaKinds.td +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSemaKinds.td @@ -66,6 +66,7 @@ def warn_infinite_recursive_function : Warning< def warn_comma_operator : Warning<"possible misuse of comma operator here">, InGroup<DiagGroup<"comma">>, DefaultIgnore; def note_cast_to_void : Note<"cast expression to void to silence warning">; +def note_cast_operand_to_int : Note<"cast one or both operands to int to silence this warning">; // Constant expressions def err_expr_not_ice : Error< @@ -82,11 +83,11 @@ def err_typecheck_converted_constant_expression_indirect : Error< "bind reference to a temporary">; def err_expr_not_cce : Error< "%select{case value|enumerator value|non-type template argument|" - "array size|explicit specifier argument}0 " - "is not a constant expression">; + "array size|explicit specifier argument|noexcept specifier argument|" + "call to 'size()'|call to 'data()'}0 is not a constant expression">; def ext_cce_narrowing : ExtWarn< "%select{case value|enumerator value|non-type template argument|" - "array size|explicit specifier argument}0 " + "array size|explicit specifier argument|noexcept specifier argument}0 " "%select{cannot be narrowed from type %2 to %3|" "evaluates to %2, which cannot be narrowed to type %3}1">, InGroup<CXX11Narrowing>, DefaultError, SFINAEFailure; @@ -111,12 +112,22 @@ def err_expr_not_string_literal : Error<"expression is not a string literal">; def ext_predef_outside_function : Warning< "predefined identifier is only valid inside function">, InGroup<DiagGroup<"predefined-identifier-outside-function">>; +def ext_init_from_predefined : ExtWarn< + "initializing an array from a '%0' predefined identifier is a Microsoft extension">, + InGroup<MicrosoftInitFromPredefined>; +def ext_string_literal_from_predefined : ExtWarn< + "expansion of predefined identifier '%0' to a string literal is a Microsoft extension">, + InGroup<MicrosoftStringLiteralFromPredefined>; def warn_float_overflow : Warning< "magnitude of floating-point constant too large for type %0; maximum is %1">, InGroup<LiteralRange>; def warn_float_underflow : Warning< "magnitude of floating-point constant too small for type %0; minimum is %1">, InGroup<LiteralRange>; +def warn_float_compare_literal : Warning< + "floating-point comparison is always %select{true|false}0; " + "constant cannot be represented exactly in type %1">, + InGroup<LiteralRange>; def warn_double_const_requires_fp64 : Warning< "double precision constant requires %select{cl_khr_fp64|cl_khr_fp64 and __opencl_c_fp64}0, " "casting to single precision">; @@ -126,6 +137,18 @@ def err_half_const_requires_fp16 : Error< // C99 variable-length arrays def ext_vla : Extension<"variable length arrays are a C99 feature">, InGroup<VLAExtension>; +// In C++ language modes, we warn by default as an extension, while in GNU++ +// language modes, we warn as an extension but add the warning group to -Wall. +def ext_vla_cxx : ExtWarn< + "variable length arrays in C++ are a Clang extension">, + InGroup<VLACxxExtension>; +def ext_vla_cxx_in_gnu_mode : Extension<ext_vla_cxx.Summary>, + InGroup<VLACxxExtension>; +def ext_vla_cxx_static_assert : ExtWarn< + "variable length arrays in C++ are a Clang extension; did you mean to use " + "'static_assert'?">, InGroup<VLAUseStaticAssert>; +def ext_vla_cxx_in_gnu_mode_static_assert : Extension< + ext_vla_cxx_static_assert.Summary>, InGroup<VLAUseStaticAssert>; def warn_vla_used : Warning<"variable length array used">, InGroup<VLA>, DefaultIgnore; def err_vla_in_sfinae : Error< @@ -142,7 +165,9 @@ def ext_vla_folded_to_constant : ExtWarn< "variable length array folded to constant array as an extension">, InGroup<GNUFoldingConstant>; def err_vla_unsupported : Error< - "variable length arrays are not supported for the current target">; + "variable length arrays are not supported for %select{the current target|'%1'}0">; +def err_vla_in_coroutine_unsupported : Error< + "variable length arrays in a coroutine are not supported">; def note_vla_unsupported : Note< "variable length arrays are not supported for the current target">; @@ -179,8 +204,10 @@ def err_designator_for_scalar_or_sizeless_init : Error< def warn_initializer_overrides : Warning< "initializer %select{partially |}0overrides prior initialization of " "this subobject">, InGroup<InitializerOverrides>; -def ext_initializer_overrides : ExtWarn<warn_initializer_overrides.Text>, +def ext_initializer_overrides : ExtWarn<warn_initializer_overrides.Summary>, InGroup<InitializerOverrides>, SFINAEFailure; +def ext_initializer_union_overrides : ExtWarn<warn_initializer_overrides.Summary>, + InGroup<InitializerOverrides>, DefaultError, SFINAEFailure; def err_initializer_overrides_destructed : Error< "initializer would partially override prior initialization of object of " "type %1 with non-trivial destruction">; @@ -196,7 +223,8 @@ def ext_flexible_array_init : Extension< // C++20 designated initializers def ext_cxx_designated_init : Extension< - "designated initializers are a C++20 extension">, InGroup<CXX20Designator>; + "designated initializers are a C++20 extension">, InGroup<CXX20Designator>, + SuppressInSystemMacro; def warn_cxx17_compat_designated_init : Warning< "designated initializers are incompatible with C++ standards before C++20">, InGroup<CXXPre20CompatPedantic>, DefaultIgnore; @@ -226,6 +254,10 @@ def ext_imaginary_constant : Extension< "imaginary constants are a GNU extension">, InGroup<GNUImaginaryConstant>; def ext_integer_complex : Extension< "complex integer types are a GNU extension">, InGroup<GNUComplexInteger>; +def ext_c23_auto_non_plain_identifier : Extension< + "type inference of a declaration other than a plain identifier with optional " + "trailing attributes is a Clang extension">, + InGroup<DiagGroup<"auto-decl-extensions">>; def err_invalid_saturation_spec : Error<"'_Sat' specifier is only valid on " "'_Fract' or '_Accum', not '%0'">; @@ -267,10 +299,12 @@ def err_invalid_vector_double_decl_spec : Error < def err_invalid_vector_bool_int128_decl_spec : Error < "use of '__int128' with '__vector bool' requires VSX support enabled (on " "POWER10 or later)">; +def err_invalid_vector_int128_decl_spec : Error< + "use of '__int128' with '__vector' requires extended Altivec support" + " (available on POWER8 or later)">; def err_invalid_vector_long_long_decl_spec : Error < - "use of 'long long' with '__vector bool' requires VSX support (available on " - "POWER7 or later) or extended Altivec support (available on POWER8 or later) " - "to be enabled">; + "use of 'long long' with '__vector' requires VSX support (available on " + "POWER7 or later) to be enabled">; def err_invalid_vector_long_double_decl_spec : Error< "cannot use 'long double' with '__vector'">; def warn_vector_long_decl_spec_combination : Warning< @@ -284,9 +318,9 @@ def err_bad_parameter_name : Error< "%0 cannot be the name of a parameter">; def err_bad_parameter_name_template_id : Error< "parameter name cannot have template arguments">; -def ext_parameter_name_omitted_c2x : ExtWarn< - "omitting the parameter name in a function definition is a C2x extension">, - InGroup<C2x>; +def ext_parameter_name_omitted_c23 : ExtWarn< + "omitting the parameter name in a function definition is a C23 extension">, + InGroup<C23>; def err_anyx86_interrupt_attribute : Error< "%select{x86|x86-64}0 'interrupt' attribute only applies to functions that " "have %select{a 'void' return type|" @@ -294,10 +328,12 @@ def err_anyx86_interrupt_attribute : Error< "a pointer as the first parameter|a %2 type as the second parameter}1">; def err_anyx86_interrupt_called : Error< "interrupt service routine cannot be called directly">; -def warn_anyx86_interrupt_regsave : Warning< - "interrupt service routine should only call a function" - " with attribute 'no_caller_saved_registers'">, - InGroup<DiagGroup<"interrupt-service-routine">>; +def warn_anyx86_excessive_regsave : Warning< + "%select{interrupt service routine|function with attribute" + " 'no_caller_saved_registers'}0 should only call a function" + " with attribute 'no_caller_saved_registers'" + " or be compiled with '-mgeneral-regs-only'">, + InGroup<DiagGroup<"excessive-regsave">>; def warn_arm_interrupt_calling_convention : Warning< "call to function without interrupt attribute could clobber interruptee's VFP registers">, InGroup<Extra>; @@ -388,10 +424,16 @@ def warn_reserved_extern_symbol: Warning< "identifier %0 is reserved because %select{" "<ERROR>|" // ReservedIdentifierStatus::NotReserved "it starts with '_' at global scope|" + "it starts with '_' and has C language linkage|" "it starts with '__'|" "it starts with '_' followed by a capital letter|" "it contains '__'}1">, InGroup<ReservedIdentifier>, DefaultIgnore; +def warn_deprecated_literal_operator_id: Warning< + "identifier %0 preceded by whitespace in a literal operator declaration " + "is deprecated">, InGroup<DeprecatedLiteralOperator>, DefaultIgnore; +def warn_reserved_module_name : Warning< + "%0 is a reserved name for a module">, InGroup<ReservedModuleIdentifier>; def warn_parameter_size: Warning< "%0 is a large (%1 bytes) pass-by-value argument; " @@ -408,18 +450,15 @@ def warn_return_value_udt_incomplete: Warning< def warn_implicit_function_decl : Warning< "implicit declaration of function %0">, InGroup<ImplicitFunctionDeclare>, DefaultIgnore; -def ext_implicit_function_decl : ExtWarn< - "implicit declaration of function %0 is invalid in C99">, - InGroup<ImplicitFunctionDeclare>; +def ext_implicit_function_decl_c99 : ExtWarn< + "call to undeclared function %0; ISO C99 and later do not support implicit " + "function declarations">, InGroup<ImplicitFunctionDeclare>; def note_function_suggestion : Note<"did you mean %0?">; def err_ellipsis_first_param : Error< "ISO C requires a named parameter before '...'">; def err_declarator_need_ident : Error<"declarator requires an identifier">; def err_language_linkage_spec_unknown : Error<"unknown linkage language">; -def err_language_linkage_spec_not_ascii : Error< - "string literal in language linkage specifier cannot have an " - "encoding-prefix">; def ext_use_out_of_scope_declaration : ExtWarn< "use of out-of-scope declaration of %0%select{| whose type is not " "compatible with that of an implicit declaration}1">, @@ -434,7 +473,7 @@ def warn_qual_return_type : Warning< def warn_deprecated_redundant_constexpr_static_def : Warning< "out-of-line definition of constexpr static data member is redundant " "in C++17 and is deprecated">, - InGroup<Deprecated>, DefaultIgnore; + InGroup<DeprecatedRedundantConstexprStaticDef>, DefaultIgnore; def warn_decl_shadow : Warning<"declaration shadows a %select{" @@ -445,9 +484,9 @@ def warn_decl_shadow : "typedef in %2|" "type alias in %2|" "structured binding}1">, - InGroup<Shadow>, DefaultIgnore; + InGroup<Shadow>, DefaultIgnore, SuppressInSystemMacro; def warn_decl_shadow_uncaptured_local : - Warning<warn_decl_shadow.Text>, + Warning<warn_decl_shadow.Summary>, InGroup<ShadowUncapturedLocal>, DefaultIgnore; def warn_ctor_parm_shadows_field: Warning<"constructor parameter %0 shadows the field %1 of %2">, @@ -483,6 +522,8 @@ def warn_cxx17_compat_decomp_decl_spec : Warning< def err_decomp_decl_type : Error< "decomposition declaration cannot be declared with type %0; " "declared type must be 'auto' or reference to 'auto'">; +def err_decomp_decl_constraint : Error< + "decomposition declaration cannot be declared with constrained 'auto'">; def err_decomp_decl_parens : Error< "decomposition declaration cannot be declared with parentheses">; def err_decomp_decl_template : Error< @@ -551,11 +592,10 @@ def err_using_decl_can_not_refer_to_class_member : Error< def warn_cxx17_compat_using_decl_class_member_enumerator : Warning< "member using declaration naming a non-member enumerator is incompatible " "with C++ standards before C++20">, InGroup<CXXPre20Compat>, DefaultIgnore; -def ext_using_decl_class_member_enumerator : ExtWarn< - "member using declaration naming a non-member enumerator is " - "a C++20 extension">, InGroup<CXX20>; def err_using_enum_is_dependent : Error< "using-enum cannot name a dependent type">; +def err_using_enum_not_enum : Error< + "%0 is not an enumerated type">; def err_ambiguous_inherited_constructor : Error< "constructor of %0 inherited from multiple base class subobjects">; def note_ambiguous_inherited_constructor_using : Note< @@ -652,6 +692,13 @@ def warn_maybe_falloff_nonvoid_function : Warning< def warn_falloff_nonvoid_function : Warning< "non-void function does not return a value">, InGroup<ReturnType>; +def warn_const_attr_with_pure_attr : Warning< + "'const' attribute imposes more restrictions; 'pure' attribute ignored">, + InGroup<IgnoredAttributes>; +def warn_pure_function_returns_void : Warning< + "'%select{pure|const}0' attribute on function returning 'void'; attribute ignored">, + InGroup<IgnoredAttributes>; + def err_maybe_falloff_nonvoid_block : Error< "non-void block does not return a value in all control paths">; def err_falloff_nonvoid_block : Error< @@ -682,13 +729,24 @@ def warn_unreachable_return : Warning< def warn_unreachable_loop_increment : Warning< "loop will run at most once (loop increment never executed)">, InGroup<UnreachableCodeLoopIncrement>, DefaultIgnore; +def warn_unreachable_fallthrough_attr : Warning< + "fallthrough annotation in unreachable code">, + InGroup<UnreachableCodeFallthrough>, DefaultIgnore; def note_unreachable_silence : Note< "silence by adding parentheses to mark code as explicitly dead">; +def warn_unreachable_association : Warning< + "due to lvalue conversion of the controlling expression, association of type " + "%0 will never be selected because it is %select{of array type|qualified}1">, + InGroup<UnreachableCodeGenericAssoc>; /// Built-in functions. def ext_implicit_lib_function_decl : ExtWarn< "implicitly declaring library function '%0' with type %1">, InGroup<ImplicitFunctionDeclare>; +def ext_implicit_lib_function_decl_c99 : ExtWarn< + "call to undeclared library function '%0' with type %1; ISO C99 and later " + "do not support implicit function declarations">, + InGroup<ImplicitFunctionDeclare>; def note_include_header_or_declare : Note< "include the header <%0> or explicitly provide a declaration for '%1'">; def note_previous_builtin_declaration : Note<"%0 is a builtin with type %1">; @@ -811,16 +869,47 @@ def warn_builtin_chk_overflow : Warning< InGroup<DiagGroup<"builtin-memcpy-chk-size">>; def warn_fortify_source_overflow - : Warning<warn_builtin_chk_overflow.Text>, InGroup<FortifySource>; + : Warning<warn_builtin_chk_overflow.Summary>, InGroup<FortifySource>; def warn_fortify_source_size_mismatch : Warning< "'%0' size argument is too large; destination buffer has size %1," " but size argument is %2">, InGroup<FortifySource>; -def warn_fortify_source_format_overflow : Warning< +def warn_fortify_strlen_overflow: Warning< + "'%0' will always overflow; destination buffer has size %1," + " but the source string has length %2 (including NUL byte)">, + InGroup<FortifySource>; + +def subst_format_overflow : TextSubstitution< "'%0' will always overflow; destination buffer has size %1," - " but format string expands to at least %2">, + " but format string expands to at least %2">; + +def warn_format_overflow : Warning< + "%sub{subst_format_overflow}0,1,2">, + InGroup<FormatOverflow>; + +def warn_format_overflow_non_kprintf : Warning< + "%sub{subst_format_overflow}0,1,2">, + InGroup<FormatOverflowNonKprintf>; + +def subst_format_truncation: TextSubstitution< + "'%0' will always be truncated; specified size is %1," + " but format string expands to at least %2">; + +def warn_format_truncation: Warning< + "%sub{subst_format_truncation}0,1,2">, + InGroup<FormatTruncation>; + +def warn_format_truncation_non_kprintf: Warning< + "%sub{subst_format_truncation}0,1,2">, + InGroup<FormatTruncationNonKprintf>; + +def warn_fortify_scanf_overflow : Warning< + "'%0' may overflow; destination buffer in argument %1 has size " + "%2, but the corresponding specifier may require size %3">, InGroup<FortifySource>; +def err_function_start_invalid_type: Error< + "argument must be a function">; /// main() // static main() is not an error in C, just in C++. @@ -908,11 +997,14 @@ def warn_pragma_options_align_reset_failed : Warning< InGroup<IgnoredPragmas>; def err_pragma_options_align_mac68k_target_unsupported : Error< "mac68k alignment pragma is not supported on this target">; +def warn_pragma_align_not_xl_compatible : Warning< + "#pragma align(packed) may not be compatible with objects generated with AIX XL C/C++">, + InGroup<AIXCompat>; def warn_pragma_pack_invalid_alignment : Warning< "expected #pragma pack parameter to be '1', '2', '4', '8', or '16'">, InGroup<IgnoredPragmas>; def err_pragma_pack_invalid_alignment : Error< - warn_pragma_pack_invalid_alignment.Text>; + warn_pragma_pack_invalid_alignment.Summary>; def warn_pragma_pack_non_default_at_include : Warning< "non-default #pragma pack value changes the alignment of struct or union " "members in the included file">, InGroup<PragmaPackSuspiciousInclude>, @@ -933,7 +1025,8 @@ def warn_pragma_pack_pop_identifier_and_alignment : Warning< def warn_pragma_pop_failed : Warning<"#pragma %0(pop, ...) failed: %1">, InGroup<IgnoredPragmas>; def err_pragma_fc_pp_scope : Error< - "'#pragma float_control push/pop' can only appear at file scope or namespace scope">; + "'#pragma float_control push/pop' can only appear at file or namespace scope " + "or within a language linkage specification">; def err_pragma_fc_noprecise_requires_nofenv : Error< "'#pragma float_control(precise, off)' is illegal when fenv_access is enabled">; def err_pragma_fc_except_requires_precise : Error< @@ -949,12 +1042,22 @@ def warn_cxx_ms_struct : def err_pragma_pack_identifer_not_supported : Error< "specifying an identifier within `#pragma pack` is not supported on this target">; def err_section_conflict : Error<"%0 causes a section type conflict with %1">; +def warn_section_msvc_compat : Warning<"`#pragma const_seg` for section %1 will" + " not apply to %0 due to the presence of a %select{mutable field||non-trivial constructor|non-trivial destructor}2">, + InGroup<IncompatibleMSPragmaSection>; def err_no_base_classes : Error<"invalid use of '__super', %0 has no base classes">; def err_invalid_super_scope : Error<"invalid use of '__super', " "this keyword can only be used inside class or member function scope">; def err_super_in_lambda_unsupported : Error< "use of '__super' inside a lambda is unsupported">; +def err_pragma_expected_file_scope : Error< + "'#pragma %0' can only appear at file scope">; +def err_pragma_alloc_text_c_linkage: Error< + "'#pragma alloc_text' is applicable only to functions with C linkage">; +def err_pragma_alloc_text_not_function: Error< + "'#pragma alloc_text' is applicable only to functions">; + def warn_pragma_unused_undeclared_var : Warning< "undeclared variable %0 used as an argument for '#pragma unused'">, InGroup<IgnoredPragmas>; @@ -1041,7 +1144,7 @@ def warn_protocol_property_mismatch : Warning< "property %select{of type %1|with attribute '%1'|without attribute '%1'|with " "getter %1|with setter %1}0 was selected for synthesis">, InGroup<DiagGroup<"protocol-property-synthesis-ambiguity">>; -def err_protocol_property_mismatch: Error<warn_protocol_property_mismatch.Text>; +def err_protocol_property_mismatch: Error<warn_protocol_property_mismatch.Summary>; def err_undef_interface : Error<"cannot find interface declaration for %0">; def err_category_forward_interface : Error< "cannot define %select{category|class extension}0 for undefined class %1">; @@ -1258,7 +1361,7 @@ def warn_objc_pointer_masking : Warning< "bitmasking for introspection of Objective-C object pointers is strongly " "discouraged">, InGroup<ObjCPointerIntrospect>; -def warn_objc_pointer_masking_performSelector : Warning<warn_objc_pointer_masking.Text>, +def warn_objc_pointer_masking_performSelector : Warning<warn_objc_pointer_masking.Summary>, InGroup<ObjCPointerIntrospectPerformSelector>; def warn_objc_property_default_assign_on_object : Warning< "default property attribute 'assign' not appropriate for object">, @@ -1284,7 +1387,7 @@ def warn_atomic_property_rule : Warning< "with a user defined %select{getter|setter}2">, InGroup<DiagGroup<"atomic-property-with-user-defined-accessor">>; def note_atomic_property_fixup_suggest : Note<"setter and getter must both be " - "synthesized, or both be user defined,or the property must be nonatomic">; + "synthesized, or both be user defined, or the property must be nonatomic">; def err_atomic_property_nontrivial_assign_op : Error< "atomic property of reference type %0 cannot have non-trivial assignment" " operator">; @@ -1462,7 +1565,7 @@ def warn_potentially_direct_selector_expression : Warning< "@selector expression formed with potentially direct selector %0">, InGroup<ObjCPotentiallyDirectSelector>; def warn_strict_potentially_direct_selector_expression : Warning< - warn_potentially_direct_selector_expression.Text>, + warn_potentially_direct_selector_expression.Summary>, InGroup<ObjCStrictPotentiallyDirectSelector>, DefaultIgnore; def err_objc_kindof_nonobject : Error< @@ -1486,12 +1589,36 @@ def err_messaging_class_with_direct_method : Error< // C++ declarations def err_static_assert_expression_is_not_constant : Error< - "static_assert expression is not an integral constant expression">; + "static assertion expression is not an integral constant expression">; def err_constexpr_if_condition_expression_is_not_constant : Error< "constexpr if condition is not a constant expression">; -def err_static_assert_failed : Error<"static_assert failed%select{ %1|}0">; +def err_static_assert_failed : Error<"static assertion failed%select{: %1|}0">; def err_static_assert_requirement_failed : Error< - "static_assert failed due to requirement '%0'%select{ %2|}1">; + "static assertion failed due to requirement '%0'%select{: %2|}1">; +def note_expr_evaluates_to : Note< + "expression evaluates to '%0 %1 %2'">; +def err_static_assert_invalid_message : Error< + "the message in a static assertion must be a string literal or an " + "object with 'data()' and 'size()' member functions">; +def err_static_assert_missing_member_function : Error< + "the message object in this static assertion is missing %select{" + "a 'size()' member function|" + "a 'data()' member function|" + "'data()' and 'size()' member functions}0">; +def err_static_assert_invalid_mem_fn_ret_ty : Error< + "the message in a static assertion must have a '%select{size|data}0()' member " + "function returning an object convertible to '%select{std::size_t|const char *}0'">; +def warn_static_assert_message_constexpr : Warning< + "the message in this static assertion is not a " + "constant expression">, + DefaultError, InGroup<DiagGroup<"invalid-static-assert-message">>; +def err_static_assert_message_constexpr : Error< + "the message in a static assertion must be produced by a " + "constant expression">; + +def warn_consteval_if_always_true : Warning< + "consteval if is always true in an %select{unevaluated|immediate}0 context">, + InGroup<DiagGroup<"redundant-consteval-if">>; def ext_inline_variable : ExtWarn< "inline variables are a C++17 extension">, InGroup<CXX17>; @@ -1504,6 +1631,8 @@ def warn_inline_namespace_reopened_noninline : Warning< InGroup<InlineNamespaceReopenedNoninline>; def err_inline_namespace_mismatch : Error< "non-inline namespace cannot be reopened as inline">; +def err_inline_namespace_std : Error< + "cannot declare the namespace 'std' to be inline">; def err_unexpected_friend : Error< "friends can only be classes or functions">; @@ -1547,6 +1676,8 @@ def err_qualified_friend_def : Error< "friend function definition cannot be qualified with '%0'">; def err_friend_def_in_local_class : Error< "friend function cannot be defined in a local class">; +def err_friend_specialization_def : Error< + "friend function specialization cannot be defined">; def err_friend_not_first_in_declaration : Error< "'friend' must appear first in a non-function declaration">; def err_using_decl_friend : Error< @@ -1600,6 +1731,9 @@ def err_type_defined_in_condition : Error< "%0 cannot be defined in a condition">; def err_type_defined_in_enum : Error< "%0 cannot be defined in an enumeration">; +def ext_type_defined_in_offsetof : Extension< + "defining a type within '%select{__builtin_offsetof|offsetof}0' is a Clang " + "extension">, InGroup<GNUOffsetofExtensions>; def note_pure_virtual_function : Note< "unimplemented pure virtual method %0 in %1">; @@ -1624,8 +1758,7 @@ def warn_weak_vtable : Warning< "emitted in every translation unit">, InGroup<DiagGroup<"weak-vtables">>, DefaultIgnore; def warn_weak_template_vtable : Warning< - "explicit template instantiation %0 will emit a vtable in every " - "translation unit">, + "this warning is no longer in use and will be removed in the next release">, InGroup<DiagGroup<"weak-template-vtables">>, DefaultIgnore; def ext_using_undefined_std : ExtWarn< @@ -1643,37 +1776,32 @@ def err_incomplete_in_exception_spec : Error< def err_sizeless_in_exception_spec : Error< "%select{|reference to }0sizeless type %1 is not allowed " "in exception specification">; -def ext_incomplete_in_exception_spec : ExtWarn<err_incomplete_in_exception_spec.Text>, +def ext_incomplete_in_exception_spec : ExtWarn<err_incomplete_in_exception_spec.Summary>, InGroup<MicrosoftExceptionSpec>; def err_rref_in_exception_spec : Error< "rvalue reference type %0 is not allowed in exception specification">; def err_mismatched_exception_spec : Error< "exception specification in declaration does not match previous declaration">; -def ext_mismatched_exception_spec : ExtWarn<err_mismatched_exception_spec.Text>, +def ext_mismatched_exception_spec : ExtWarn<err_mismatched_exception_spec.Summary>, InGroup<MicrosoftExceptionSpec>; def err_override_exception_spec : Error< "exception specification of overriding function is more lax than " "base version">; -def ext_override_exception_spec : ExtWarn<err_override_exception_spec.Text>, +def ext_override_exception_spec : ExtWarn<err_override_exception_spec.Summary>, InGroup<MicrosoftExceptionSpec>; def err_incompatible_exception_specs : Error< "target exception specification is not superset of source">; def warn_incompatible_exception_specs : Warning< - err_incompatible_exception_specs.Text>, InGroup<IncompatibleExceptionSpec>; + err_incompatible_exception_specs.Summary>, InGroup<IncompatibleExceptionSpec>; def err_deep_exception_specs_differ : Error< "exception specifications of %select{return|argument}0 types differ">; def warn_deep_exception_specs_differ : Warning< - err_deep_exception_specs_differ.Text>, InGroup<IncompatibleExceptionSpec>; + err_deep_exception_specs_differ.Summary>, InGroup<IncompatibleExceptionSpec>; def err_missing_exception_specification : Error< "%0 is missing exception specification '%1'">; def ext_missing_exception_specification : ExtWarn< - err_missing_exception_specification.Text>, + err_missing_exception_specification.Summary>, InGroup<DiagGroup<"missing-exception-spec">>; -def ext_ms_missing_exception_specification : ExtWarn< - err_missing_exception_specification.Text>, - InGroup<MicrosoftExceptionSpec>; -def err_noexcept_needs_constant_expression : Error< - "argument to noexcept specifier must be a constant expression">; def err_exception_spec_not_parsed : Error< "exception specification is not available until end of class definition">; def err_exception_spec_cycle : Error< @@ -1833,7 +1961,7 @@ def err_static_not_bitfield : Error<"static member %0 cannot be a bit-field">; def err_static_out_of_line : Error< "'static' can only be specified inside the class definition">; def ext_static_out_of_line : ExtWarn< - err_static_out_of_line.Text>, + err_static_out_of_line.Summary>, InGroup<MicrosoftTemplate>; def err_storage_class_for_static_member : Error< "static data member definition cannot specify a storage class">; @@ -1961,6 +2089,10 @@ def err_different_return_type_for_overriding_virtual_function : Error< "than the function it overrides}1,2">; def note_overridden_virtual_function : Note< "overridden virtual function is here">; +def err_conflicting_overriding_attributes : Error< + "virtual function %0 has different attributes " + "%diff{($) than the function it overrides (which has $)|" + "than the function it overrides}1,2">; def err_conflicting_overriding_cc_attributes : Error< "virtual function %0 has different calling convention attributes " "%diff{($) than the function it overrides (which has calling convention $)|" @@ -2077,7 +2209,8 @@ def err_init_conversion_failed : Error< "exception object|a member subobject|an array element|a new value|a value|a " "base class|a constructor delegation|a vector element|a block element|a " "block element|a complex element|a lambda capture|a compound literal " - "initializer|a related result|a parameter of CF audited function}0 " + "initializer|a related result|a parameter of CF audited function|a " + "structured binding|a member subobject}0 " "%diff{of type $ with an %select{rvalue|lvalue}2 of type $|" "with an %select{rvalue|lvalue}2 of incompatible type}1,3" "%select{|: different classes%diff{ ($ vs $)|}5,6" @@ -2120,10 +2253,15 @@ def err_init_list_bad_dest_type : Error< def warn_cxx20_compat_aggregate_init_with_ctors : Warning< "aggregate initialization of type %0 with user-declared constructors " "is incompatible with C++20">, DefaultIgnore, InGroup<CXX20Compat>; +def warn_cxx17_compat_aggregate_init_paren_list : Warning< + "aggregate initialization of type %0 from a parenthesized list of values " + "is a C++20 extension">, DefaultIgnore, InGroup<CXX20>; def err_reference_bind_to_bitfield : Error< "%select{non-const|volatile}0 reference cannot bind to " "bit-field%select{| %1}2">; +def err_reference_bind_to_bitfield_in_cce : Error< + "reference cannot bind to bit-field in converted constant expression">; def err_reference_bind_to_vector_element : Error< "%select{non-const|volatile}0 reference cannot bind to vector element">; def err_reference_bind_to_matrix_element : Error< @@ -2138,6 +2276,8 @@ def err_reference_has_multiple_inits : Error< "reference cannot be initialized with multiple values">; def err_init_non_aggr_init_list : Error< "initialization of non-aggregate type %0 with an initializer list">; +def err_designated_init_for_non_aggregate : Error< + "initialization of non-aggregate type %0 with a designated initializer list">; def err_init_reference_member_uninitialized : Error< "reference member of type %0 uninitialized">; def note_uninit_reference_member : Note< @@ -2260,8 +2400,6 @@ def err_auto_variable_cannot_appear_in_own_initializer : Error< def err_binding_cannot_appear_in_own_initializer : Error< "binding %0 cannot appear in the initializer of its own " "decomposition declaration">; -def err_illegal_decl_array_of_auto : Error< - "'%0' declared as array of %1">; def err_new_array_of_auto : Error< "cannot allocate array of 'auto'">; def err_auto_not_allowed : Error< @@ -2279,7 +2417,9 @@ def err_auto_not_allowed : Error< "|in conversion function type|here|in lambda parameter" "|in type allocated by 'new'|in K&R-style function parameter" "|in template parameter|in friend declaration|in function prototype that is " - "not a function declaration|in requires expression parameter}1">; + "not a function declaration|in requires expression parameter" + "|in array declaration" + "|in declaration of conversion function template}1">; def err_dependent_deduced_tst : Error< "typename specifier refers to " "%select{class template|function template|variable template|alias template|" @@ -2301,13 +2441,23 @@ def ext_auto_new_list_init : Extension< "type %0 to use list-initialization">, InGroup<CXX17>; def err_auto_var_init_no_expression : Error< "initializer for variable %0 with type %1 is empty">; +def err_auto_expr_init_no_expression : Error< + "initializer for functional-style cast to %0 is empty">; def err_auto_var_init_multiple_expressions : Error< "initializer for variable %0 with type %1 contains multiple expressions">; +def err_auto_expr_init_multiple_expressions : Error< + "initializer for functional-style cast to %0 contains multiple expressions">; def err_auto_var_init_paren_braces : Error< "cannot deduce type for variable %1 with type %2 from " "%select{parenthesized|nested}0 initializer list">; def err_auto_new_ctor_multiple_expressions : Error< "new expression for type %0 contains multiple constructor arguments">; +def err_auto_expr_init_paren_braces : Error< + "cannot deduce actual type for %1 from " + "%select{parenthesized|nested}0 initializer list">; +def warn_cxx20_compat_auto_expr : Warning< + "'auto' as a functional-style cast is incompatible with C++ standards " + "before C++23">, InGroup<CXXPre23Compat>, DefaultIgnore; def err_auto_missing_trailing_return : Error< "'auto' return without trailing return type; deduced return types are a " "C++14 extension">; @@ -2321,6 +2471,8 @@ def err_auto_var_deduction_failure : Error< "variable %0 with type %1 has incompatible initializer of type %2">; def err_auto_var_deduction_failure_from_init_list : Error< "cannot deduce actual type for variable %0 with type %1 from initializer list">; +def err_auto_expr_deduction_failure : Error< + "functional-style cast to %0 has incompatible initializer of type %1">; def err_auto_new_deduction_failure : Error< "new expression for type %0 has incompatible constructor argument of type %1">; def err_auto_inconsistent_deduction : Error< @@ -2340,7 +2492,8 @@ def err_implied_std_initializer_list_not_found : Error< def err_malformed_std_initializer_list : Error< "std::initializer_list must be a class template with a single type parameter">; def err_auto_init_list_from_c : Error< - "cannot use __auto_type with initializer list in C">; + "cannot use %select{'auto'|<ERROR>|'__auto_type'}0 with " + "%select{initializer list|array}1 in C">; def err_auto_bitfield : Error< "cannot pass bit-field as __auto_type initializer in C">; @@ -2486,7 +2639,7 @@ def err_final_function_overridden : Error< // C++11 scoped enumerations def err_enum_invalid_underlying : Error< - "non-integral type %0 is an invalid underlying type">; + "%select{non-integral type %0|%0}1 is an invalid underlying type">; def err_enumerator_too_large : Error< "enumerator value is not representable in the underlying type %0">; def ext_enumerator_too_large : Extension< @@ -2586,10 +2739,28 @@ def warn_cxx14_compat_constexpr_not_const : Warning< "in C++14; add 'const' to avoid a change in behavior">, InGroup<DiagGroup<"constexpr-not-const">>; def err_invalid_consteval_take_address : Error< - "cannot take address of consteval function %0 outside" + "cannot take address of %select{immediate|consteval}2 " + "%select{function|call operator of}1 %0 outside" " of an immediate invocation">; def err_invalid_consteval_call : Error< - "call to consteval function %q0 is not a constant expression">; + "call to %select{immediate|consteval}1 function " + "%q0 is not a constant expression">; + +def err_immediate_function_used_before_definition : Error< + "immediate function %0 used before it is defined">; + +def note_immediate_function_reason : Note< + "%0 is an immediate %select{function|constructor}5 because " + "%select{its body|the%select{| default}7 initializer of %8}6 " + "%select{evaluates the address of %select{an immediate|a consteval}2 " + "function %1|contains a call to %select{an immediate|a consteval}2 " + "%select{function|constructor}4 %1 and that call is not a constant " + "expression}3">; + +def note_invalid_consteval_initializer : Note< + "in the default initializer of %0">; +def note_invalid_consteval_initializer_here : Note< + "initialized here %0">; def err_invalid_consteval_decl_kind : Error< "%0 cannot be declared consteval">; def err_invalid_constexpr : Error< @@ -2598,7 +2769,7 @@ def err_invalid_constexpr : Error< def err_invalid_constexpr_member : Error<"non-static data member cannot be " "constexpr%select{; did you intend to make it %select{const|static}0?|}1">; def err_constexpr_tag : Error< - "%select{class|struct|interface|union|enum}0 " + "%select{class|struct|interface|union|enum|enum class|enum struct}0 " "cannot be marked %sub{select_constexpr_spec_kind}1">; def err_constexpr_dtor : Error< "destructor cannot be declared %sub{select_constexpr_spec_kind}0">; @@ -2658,6 +2829,13 @@ def warn_cxx17_compat_constexpr_body_invalid_stmt : Warning< "use of this statement in a constexpr %select{function|constructor}0 " "is incompatible with C++ standards before C++20">, InGroup<CXXPre20Compat>, DefaultIgnore; +def ext_constexpr_body_invalid_stmt_cxx23 : ExtWarn< + "use of this statement in a constexpr %select{function|constructor}0 " + "is a C++23 extension">, InGroup<CXX23>; +def warn_cxx20_compat_constexpr_body_invalid_stmt : Warning< + "use of this statement in a constexpr %select{function|constructor}0 " + "is incompatible with C++ standards before C++23">, + InGroup<CXXPre23Compat>, DefaultIgnore; def ext_constexpr_type_definition : ExtWarn< "type definition in a constexpr %select{function|constructor}0 " "is a C++14 extension">, InGroup<CXX14>; @@ -2675,12 +2853,18 @@ def warn_cxx11_compat_constexpr_local_var : Warning< "variable declaration in a constexpr %select{function|constructor}0 " "is incompatible with C++ standards before C++14">, InGroup<CXXPre14Compat>, DefaultIgnore; -def err_constexpr_local_var_static : Error< - "%select{static|thread_local}1 variable not permitted in a constexpr " - "%select{function|constructor}0">; +def ext_constexpr_static_var : ExtWarn< + "definition of a %select{static|thread_local}1 variable " + "in a constexpr %select{function|constructor}0 " + "is a C++23 extension">, InGroup<CXX23>; +def warn_cxx20_compat_constexpr_var : Warning< + "definition of a %select{static variable|thread_local variable|variable " + "of non-literal type}1 in a constexpr %select{function|constructor}0 " + "is incompatible with C++ standards before C++23">, + InGroup<CXXPre23Compat>, DefaultIgnore; def err_constexpr_local_var_non_literal_type : Error< "variable of non-literal type %1 cannot be defined in a constexpr " - "%select{function|constructor}0">; + "%select{function|constructor}0 before C++23">; def ext_constexpr_local_var_no_init : ExtWarn< "uninitialized variable in a constexpr %select{function|constructor}0 " "is a C++20 extension">, InGroup<CXX20>; @@ -2712,6 +2896,8 @@ def warn_cxx11_compat_constexpr_body_multiple_return : Warning< InGroup<CXXPre14Compat>, DefaultIgnore; def note_constexpr_body_previous_return : Note< "previous return statement is here">; +def err_ms_constexpr_cannot_be_applied : Error< + "attribute 'msvc::constexpr' cannot be applied to the %select{constexpr|consteval|virtual}0 function %1">; // C++20 function try blocks in constexpr def ext_constexpr_function_try_block_cxx20 : ExtWarn< @@ -2780,6 +2966,8 @@ def err_template_arg_list_constraints_not_satisfied : Error< "template template parameter|template}0 %1%2">; def note_substituted_constraint_expr_is_ill_formed : Note< "because substituted constraint expression is ill-formed%0">; +def note_constraint_references_error + : Note<"constraint depends on a previously diagnosed expression">; def note_atomic_constraint_evaluated_to_false : Note< "%select{and|because}0 '%1' evaluated to false">; def note_concept_specialization_constraint_evaluated_to_false : Note< @@ -2792,6 +2980,8 @@ def err_constrained_virtual_method : Error< "virtual function cannot have a requires clause">; def err_trailing_requires_clause_on_deduction_guide : Error< "deduction guide cannot have a requires clause">; +def err_constrained_non_templated_function + : Error<"non-templated function cannot have a requires clause">; def err_reference_to_function_with_unsatisfied_constraints : Error< "invalid reference to function %0: constraints not satisfied">; def err_requires_expr_local_parameter_default_argument : Error< @@ -2817,7 +3007,7 @@ def note_type_requirement_substitution_error : Note< def note_type_requirement_unknown_substitution_error : Note< "%select{and|because}0 '%1' would be invalid">; def note_nested_requirement_substitution_error : Note< - "%select{and|because}0 '%1' would be invalid: %2">; + "%select{and|because}0 '%1' would be invalid%2">; def note_nested_requirement_unknown_substitution_error : Note< "%select{and|because}0 '%1' would be invalid">; def note_ambiguous_atomic_constraints : Note< @@ -2872,11 +3062,20 @@ def warn_auto_var_is_id : Warning< InGroup<DiagGroup<"auto-var-id">>; // Attributes -def warn_nomerge_attribute_ignored_in_stmt: Warning< +def warn_attribute_ignored_no_calls_in_stmt: Warning< "%0 attribute is ignored because there exists no call expression inside the " "statement">, InGroup<IgnoredAttributes>; +def warn_attribute_ignored_non_function_pointer: Warning< + "%0 attribute is ignored because %1 is not a function pointer">, + InGroup<IgnoredAttributes>; + +def warn_function_attribute_ignored_in_stmt : Warning< + "attribute is ignored on this statement as it only applies to functions; " + "use '%0' on statements">, + InGroup<IgnoredAttributes>; + def err_musttail_needs_trivial_args : Error< "tail call requires that the return value, all parameters, and any " "temporaries created by the expression are trivially destructible">; @@ -2922,22 +3121,38 @@ def err_musttail_scope : Error< "cannot perform a tail call from this return statement">; def err_musttail_no_variadic : Error< "%0 attribute may not be used with variadic functions">; +def err_musttail_no_return : Error< + "%0 attribute may not be used with no-return-attribute functions">; def err_nsobject_attribute : Error< "'NSObject' attribute is for pointer types only">; def err_attributes_are_not_compatible : Error< - "%0 and %1 attributes are not compatible">; + "%0 and %1%select{ attributes|}2 are not compatible">; def err_attribute_invalid_argument : Error< "%select{a reference type|an array type|a non-vector or " "non-vectorizable scalar type}0 is an invalid argument to attribute %1">; def err_attribute_wrong_number_arguments : Error< "%0 attribute %plural{0:takes no arguments|1:takes one argument|" ":requires exactly %1 arguments}1">; +def err_attribute_wrong_number_arguments_for : Error < + "%0 attribute references function %1, which %plural{0:takes no arguments|1:takes one argument|" + ":takes exactly %2 arguments}2">; +def err_attribute_bounds_for_function : Error< + "%0 attribute references parameter %1, but the function %2 has only %3 parameters">; +def err_attribute_no_member_function : Error< + "%0 attribute cannot be applied to non-static member functions">; +def err_attribute_parameter_types : Error< + "%0 attribute parameter types do not match: parameter %1 of function %2 has type %3, " + "but parameter %4 of function %5 has type %6">; + def err_attribute_too_many_arguments : Error< "%0 attribute takes no more than %1 argument%s1">; def err_attribute_too_few_arguments : Error< "%0 attribute takes at least %1 argument%s1">; def err_attribute_invalid_vector_type : Error<"invalid vector element type %0">; +def err_attribute_invalid_bitint_vector_type : Error< + "'_BitInt' vector element width must be %select{a power of 2|" + "at least as wide as 'CHAR_BIT'}0">; def err_attribute_invalid_matrix_type : Error<"invalid matrix element type %0">; def err_attribute_bad_neon_vector_size : Error< "Neon vector size must be 64 or 128 bits">; @@ -2949,21 +3164,48 @@ def err_attribute_bad_sve_vector_size : Error< def err_attribute_arm_feature_sve_bits_unsupported : Error< "%0 is only supported when '-msve-vector-bits=<bits>' is specified with a " "value of 128, 256, 512, 1024 or 2048.">; +def warn_attribute_arm_sm_incompat_builtin : Warning< + "builtin call has undefined behaviour when called from a %0 function">, + InGroup<DiagGroup<"undefined-arm-streaming">>; +def warn_attribute_arm_za_builtin_no_za_state : Warning< + "builtin call is not valid when calling from a function without active ZA state">, + InGroup<DiagGroup<"undefined-arm-za">>; +def warn_attribute_arm_zt0_builtin_no_zt0_state : Warning< + "builtin call is not valid when calling from a function without active ZT0 state">, + InGroup<DiagGroup<"undefined-arm-zt0">>; +def err_sve_vector_in_non_sve_target : Error< + "SVE vector type %0 cannot be used in a target without sve">; +def err_attribute_riscv_rvv_bits_unsupported : Error< + "%0 is only supported when '-mrvv-vector-bits=<bits>' is specified with a " + "value of \"zvl\" or a power 2 in the range [64,65536]">; +def err_attribute_bad_rvv_vector_size : Error< + "invalid RVV vector size '%0', expected size is '%1' based on LMUL of type " + "and '-mrvv-vector-bits'">; +def err_attribute_invalid_rvv_type : Error< + "%0 attribute applied to non-RVV type %1">; def err_attribute_requires_positive_integer : Error< "%0 attribute requires a %select{positive|non-negative}1 " "integral compile time constant expression">; def err_attribute_requires_opencl_version : Error< - "%0 attribute requires OpenCL version %1%select{| or above}2">; + "attribute %0 is supported in the OpenCL version %1%select{| onwards}2">; def err_invalid_branch_protection_spec : Error< "invalid or misplaced branch protection specification '%0'">; +def warn_unsupported_branch_protection_spec : Warning< + "unsupported branch protection specification '%0'">, InGroup<BranchProtection>; + def warn_unsupported_target_attribute - : Warning<"%select{unsupported|duplicate|unknown}0%select{| architecture|" - " tune CPU}1 '%2' in the 'target' attribute string; 'target' " + : Warning<"%select{unsupported|duplicate|unknown}0%select{| CPU|" + " tune CPU}1 '%2' in the '%select{target|target_clones|target_version}3' " + "attribute string; '%select{target|target_clones|target_version}3' " "attribute ignored">, InGroup<IgnoredAttributes>; def err_attribute_unsupported : Error<"%0 attribute is not supported on targets missing %1;" " specify an appropriate -march= or -mcpu=">; +def err_duplicate_target_attribute + : Error<"%select{unsupported|duplicate|unknown}0%select{| CPU|" + " tune CPU}1 '%2' in the '%select{target|target_clones|target_version}3' " + "attribute string; ">; // The err_*_attribute_argument_not_int are separate because they're used by // VerifyIntegerConstantExpression. def err_aligned_attribute_argument_not_int : Error< @@ -2971,8 +3213,9 @@ def err_aligned_attribute_argument_not_int : Error< def err_align_value_attribute_argument_not_int : Error< "'align_value' attribute requires integer constant">; def err_alignas_attribute_wrong_decl_type : Error< - "%0 attribute cannot be applied to a %select{function parameter|" - "variable with 'register' storage class|'catch' variable|bit-field}1">; + "%0 attribute cannot be applied to %select{a function parameter|" + "a variable with 'register' storage class|a 'catch' variable|a bit-field|" + "an enumeration}1">; def err_alignas_missing_on_definition : Error< "%0 must be specified on definition if it is specified on any declaration">; def note_alignas_on_declaration : Note<"declared with %0 attribute here">; @@ -2980,11 +3223,13 @@ def err_alignas_mismatch : Error< "redeclaration has different alignment requirement (%1 vs %0)">; def err_alignas_underaligned : Error< "requested alignment is less than minimum alignment of %1 for type %0">; +def warn_aligned_attr_underaligned : Warning<err_alignas_underaligned.Summary>, + InGroup<IgnoredAttributes>; def err_attribute_sizeless_type : Error< "%0 attribute cannot be applied to sizeless type %1">; def err_attribute_argument_n_type : Error< "%0 attribute requires parameter %1 to be %select{int or bool|an integer " - "constant|a string|an identifier|a constant expression}2">; + "constant|a string|an identifier|a constant expression|a builtin function}2">; def err_attribute_argument_type : Error< "%0 attribute requires %select{int or bool|an integer " "constant|a string|an identifier}1">; @@ -3002,7 +3247,7 @@ def note_previous_uuid : Note<"previous uuid specified here">; def warn_attribute_pointers_only : Warning< "%0 attribute only applies to%select{| constant}1 pointer arguments">, InGroup<IgnoredAttributes>; -def err_attribute_pointers_only : Error<warn_attribute_pointers_only.Text>; +def err_attribute_pointers_only : Error<warn_attribute_pointers_only.Summary>; def err_attribute_integers_only : Error< "%0 attribute argument may only refer to a function parameter of integer " "type">; @@ -3027,9 +3272,7 @@ def note_ownership_returns_index_mismatch : Note< "declared with index %0 here">; def err_format_strftime_third_parameter : Error< "strftime format attribute requires 3rd parameter to be 0">; -def err_format_attribute_requires_variadic : Error< - "format attribute requires variadic function">; -def err_format_attribute_not : Error<"format argument not %0">; +def err_format_attribute_not : Error<"format argument not a string type">; def err_format_attribute_result_not : Error<"function does not return %0">; def err_format_attribute_implicit_this_format_string : Error< "format attribute cannot specify the implicit this argument as the format " @@ -3054,10 +3297,11 @@ def err_attribute_invalid_size : Error< "vector size not an integral multiple of component size">; def err_attribute_zero_size : Error<"zero %0 size">; def err_attribute_size_too_large : Error<"%0 size too large">; -def err_typecheck_sve_ambiguous : Error< - "cannot combine fixed-length and sizeless SVE vectors in expression, result is ambiguous (%0 and %1)">; -def err_typecheck_sve_gnu_ambiguous : Error< - "cannot combine GNU and SVE vectors in expression, result is ambiguous (%0 and %1)">; +def err_typecheck_sve_rvv_ambiguous : Error< + "cannot combine fixed-length and sizeless %select{SVE|RVV}0 vectors " + "in expression, result is ambiguous (%1 and %2)">; +def err_typecheck_sve_rvv_gnu_ambiguous : Error< + "cannot combine GNU and %select{SVE|RVV}0 vectors in expression, result is ambiguous (%1 and %2)">; def err_typecheck_vector_not_convertable_implict_truncation : Error< "cannot convert between %select{scalar|vector}0 type %1 and vector type" " %2 as implicit conversion would cause truncation">; @@ -3186,6 +3430,8 @@ def warn_objc_redundant_literal_use : Warning< def err_attr_tlsmodel_arg : Error<"tls_model must be \"global-dynamic\", " "\"local-dynamic\", \"initial-exec\" or \"local-exec\"">; +def err_attr_codemodel_arg : Error<"code model '%0' is not supported on this target">; + def err_aix_attr_unsupported_tls_model : Error<"TLS model '%0' is not yet supported on AIX">; def err_tls_var_aligned_over_maximum : Error< @@ -3240,7 +3486,7 @@ def err_alignment_too_big : Error< def err_alignment_not_power_of_two : Error< "requested alignment is not a power of 2">; def warn_alignment_not_power_of_two : Warning< - err_alignment_not_power_of_two.Text>, + err_alignment_not_power_of_two.Summary>, InGroup<DiagGroup<"non-power-of-two-alignment">>; def err_alignment_dependent_typedef_name : Error< "requested alignment is dependent but declaration is not dependent">; @@ -3255,9 +3501,11 @@ def warn_assume_aligned_too_great "alignment assumed">, InGroup<DiagGroup<"builtin-assume-aligned-alignment">>; def warn_not_xl_compatible - : Warning<"requesting an alignment of 16 bytes or greater for struct" - " members is not binary compatible with AIX XL 16.1 and older">, + : Warning<"alignment of 16 bytes for a struct member is not binary " + "compatible with IBM XL C/C++ for AIX 16.1.0 or older">, InGroup<AIXCompat>; +def note_misaligned_member_used_here : Note< + "passing byval argument %0 with potentially incompatible alignment here">; def warn_redeclaration_without_attribute_prev_attribute_ignored : Warning< "%q0 redeclared without %1 attribute: previous %1 ignored">, InGroup<MicrosoftInconsistentDllImport>; @@ -3267,8 +3515,6 @@ def warn_redeclaration_without_import_attribute : Warning< def warn_dllimport_dropped_from_inline_function : Warning< "%q0 redeclared inline; %1 attribute ignored">, InGroup<IgnoredAttributes>; -def warn_attribute_ignored : Warning<"%0 attribute ignored">, - InGroup<IgnoredAttributes>; def warn_nothrow_attribute_ignored : Warning<"'nothrow' attribute conflicts with" " exception specification; attribute ignored">, InGroup<IgnoredAttributes>; @@ -3298,19 +3544,26 @@ def warn_attribute_has_no_effect_on_infinite_loop : Warning< InGroup<IgnoredAttributes>; def note_attribute_has_no_effect_on_infinite_loop_here : Note< "annotating the infinite loop here">; -def warn_attribute_has_no_effect_on_if_constexpr : Warning< - "attribute %0 has no effect when annotating an 'if constexpr' statement">, +def warn_attribute_has_no_effect_on_compile_time_if : Warning< + "attribute %0 has no effect when annotating an 'if %select{constexpr|consteval}1' statement">, InGroup<IgnoredAttributes>; -def note_attribute_has_no_effect_on_if_constexpr_here : Note< - "annotating the 'if constexpr' statement here">; +def note_attribute_has_no_effect_on_compile_time_if_here : Note< + "annotating the 'if %select{constexpr|consteval}0' statement here">; def err_decl_attribute_invalid_on_stmt : Error< - "%0 attribute cannot be applied to a statement">; -def err_stmt_attribute_invalid_on_decl : Error< - "%0 attribute cannot be applied to a declaration">; + "%0%select{ attribute|}1 cannot be applied to a statement">; +def err_attribute_invalid_on_decl : Error< + "%0%select{ attribute|}1 cannot be applied to a declaration">; +def warn_type_attribute_deprecated_on_decl : Warning< + "applying attribute %0 to a declaration is deprecated; apply it to the type instead">, + InGroup<DeprecatedAttributes>; def warn_declspec_attribute_ignored : Warning< "attribute %0 is ignored, place it after " - "\"%select{class|struct|interface|union|enum}1\" to apply attribute to " + "\"%select{class|struct|interface|union|enum|enum class|enum struct}1\" to apply attribute to " "type declaration">, InGroup<IgnoredAttributes>; +def err_declspec_keyword_has_no_effect : Error< + "%0 cannot appear here, place it after " + "\"%select{class|struct|interface|union|enum}1\" to apply it to the " + "type declaration">; def warn_attribute_precede_definition : Warning< "attribute declaration must precede definition">, InGroup<IgnoredAttributes>; @@ -3371,6 +3624,8 @@ def warn_attribute_dll_redeclaration : Warning< InGroup<DiagGroup<"dll-attribute-on-redeclaration">>; def err_attribute_dllimport_function_definition : Error< "dllimport cannot be applied to non-inline function definition">; +def err_attribute_dllimport_function_specialization_definition : Error< + "cannot define non-inline dllimport template specialization">; def err_attribute_dll_deleted : Error< "attribute %q0 cannot be applied to a deleted function">; def err_attribute_dllimport_data_definition : Error< @@ -3382,7 +3637,7 @@ def warn_attribute_dllimport_static_field_definition : Warning< InGroup<DiagGroup<"dllimport-static-field-def">>; def warn_attribute_dllexport_explicit_instantiation_decl : Warning< "explicit instantiation declaration should not be 'dllexport'">, - InGroup<DiagGroup<"dllexport-explicit-instantiation-decl">>; + InGroup<DllexportExplicitInstantiationDecl>; def warn_attribute_dllexport_explicit_instantiation_def : Warning< "'dllexport' attribute ignored on explicit instantiation definition">, InGroup<IgnoredAttributes>; @@ -3407,11 +3662,11 @@ def err_attribute_weakref_without_alias : Error< def err_alias_not_supported_on_darwin : Error < "aliases are not supported on darwin">; def warn_attribute_wrong_decl_type_str : Warning< - "%0 attribute only applies to %1">, InGroup<IgnoredAttributes>; + "%0%select{ attribute|}1 only applies to %2">, InGroup<IgnoredAttributes>; def err_attribute_wrong_decl_type_str : Error< - warn_attribute_wrong_decl_type_str.Text>; + warn_attribute_wrong_decl_type_str.Summary>; def warn_attribute_wrong_decl_type : Warning< - "%0 attribute only applies to %select{" + "%0%select{ attribute|}1 only applies to %select{" "functions" "|unions" "|variables and functions" @@ -3424,13 +3679,15 @@ def warn_attribute_wrong_decl_type : Warning< "|types and namespaces" "|variables, functions and classes" "|kernel functions" - "|non-K&R-style functions}1">, + "|non-K&R-style functions}2">, InGroup<IgnoredAttributes>; -def err_attribute_wrong_decl_type : Error<warn_attribute_wrong_decl_type.Text>; +def err_attribute_wrong_decl_type : Error<warn_attribute_wrong_decl_type.Summary>; def warn_type_attribute_wrong_type : Warning< "'%0' only applies to %select{function|pointer|" "Objective-C object or block pointer}1 types; type here is %2">, InGroup<IgnoredAttributes>; +def err_type_attribute_wrong_type : Error< + warn_type_attribute_wrong_type.Summary>; def warn_incomplete_encoded_type : Warning< "encoding of %0 type is incomplete because %1 component has unknown encoding">, InGroup<DiagGroup<"encode-type">>; @@ -3446,6 +3703,32 @@ def err_attribute_vecreturn_only_vector_member : Error< "the vecreturn attribute can only be used on a class or structure with one member, which must be a vector">; def err_attribute_vecreturn_only_pod_record : Error< "the vecreturn attribute can only be used on a POD (plain old data) class or structure (i.e. no virtual functions)">; +def err_sme_attr_mismatch : Error< + "function declared %0 was previously declared %1, which has different SME function attributes">; +def err_sme_call_in_non_sme_target : Error< + "call to a streaming function requires 'sme'">; +def err_sme_za_call_no_za_state : Error< + "call to a shared ZA function requires the caller to have ZA state">; +def err_sme_zt0_call_no_zt0_state : Error< + "call to a shared ZT0 function requires the caller to have ZT0 state">; +def err_sme_unimplemented_za_save_restore : Error< + "call to a function that shares state other than 'za' from a " + "function that has live 'za' state requires a spill/fill of ZA, which is not yet " + "implemented">; +def note_sme_use_preserves_za : Note< + "add '__arm_preserves(\"za\")' to the callee if it preserves ZA">; +def err_sme_definition_using_sm_in_non_sme_target : Error< + "function executed in streaming-SVE mode requires 'sme'">; +def err_sme_definition_using_za_in_non_sme_target : Error< + "function using ZA state requires 'sme'">; +def err_sme_definition_using_zt0_in_non_sme2_target : Error< + "function using ZT0 state requires 'sme2'">; +def err_conflicting_attributes_arm_state : Error< + "conflicting attributes for state '%0'">; +def err_unknown_arm_state : Error< + "unknown state '%0'">; +def err_missing_arm_state : Error< + "missing state for %0">; def err_cconv_change : Error< "function declared '%0' here was previously declared " "%select{'%2'|without calling convention}1">; @@ -3458,11 +3741,11 @@ def warn_cconv_unsupported : Warning< "|on builtin function" "}1">, InGroup<IgnoredAttributes>; -def error_cconv_unsupported : Error<warn_cconv_unsupported.Text>; +def error_cconv_unsupported : Error<warn_cconv_unsupported.Summary>; def err_cconv_knr : Error< "function with no prototype cannot use the %0 calling convention">; def warn_cconv_knr : Warning< - err_cconv_knr.Text>, + err_cconv_knr.Summary>, InGroup<DiagGroup<"missing-prototype-for-cc">>; def err_cconv_varargs : Error< "variadic function cannot use %0 calling convention">; @@ -3481,9 +3764,7 @@ def err_invalid_pcs : Error<"invalid PCS type">; def warn_attribute_not_on_decl : Warning< "%0 attribute ignored when parsing type">, InGroup<IgnoredAttributes>; def err_base_specifier_attribute : Error< - "%0 attribute cannot be applied to a base specifier">; -def err_invalid_attribute_on_virtual_function : Error< - "%0 attribute cannot be applied to virtual functions">; + "%0%select{ attribute|}1 cannot be applied to a base specifier">; def warn_declspec_allocator_nonpointer : Warning< "ignoring __declspec(allocator) because the function return type %0 is not " "a pointer or reference type">, InGroup<IgnoredAttributes>; @@ -3532,12 +3813,15 @@ def warn_availability_swift_unavailable_deprecated_only : Warning< InGroup<Availability>; def note_protocol_method : Note< "protocol method is here">; +def warn_availability_fuchsia_unavailable_minor : Warning< + "Fuchsia API Level prohibits specifying a minor or sub-minor version">, + InGroup<Availability>; def warn_unguarded_availability : Warning<"%0 is only available on %1 %2 or newer">, InGroup<UnguardedAvailability>, DefaultIgnore; def warn_unguarded_availability_new : - Warning<warn_unguarded_availability.Text>, + Warning<warn_unguarded_availability.Summary>, InGroup<UnguardedAvailabilityNew>; def note_decl_unguarded_availability_silence : Note< "annotate %select{%1|anonymous %1}0 with an availability attribute to silence this warning">; @@ -3641,7 +3925,7 @@ def warn_fun_requires_negative_cap : Warning< "calling function %0 requires negative capability '%1'">, InGroup<ThreadSafetyAnalysis>, DefaultIgnore; -// Thread safety warnings on pass by reference +// Thread safety warnings on pass/return by reference def warn_guarded_pass_by_reference : Warning< "passing variable %1 by reference requires holding %0 " "%select{'%2'|'%2' exclusively}3">, @@ -3650,6 +3934,14 @@ def warn_pt_guarded_pass_by_reference : Warning< "passing the value that %1 points to by reference requires holding %0 " "%select{'%2'|'%2' exclusively}3">, InGroup<ThreadSafetyReference>, DefaultIgnore; +def warn_guarded_return_by_reference : Warning< + "returning variable %1 by reference requires holding %0 " + "%select{'%2'|'%2' exclusively}3">, + InGroup<ThreadSafetyReferenceReturn>, DefaultIgnore; +def warn_pt_guarded_return_by_reference : Warning< + "returning the value that %1 points to by reference requires holding %0 " + "%select{'%2'|'%2' exclusively}3">, + InGroup<ThreadSafetyReferenceReturn>, DefaultIgnore; // Imprecise thread safety warnings def warn_variable_requires_lock : Warning< @@ -3666,13 +3958,13 @@ def warn_fun_requires_lock : Warning< // Precise thread safety warnings def warn_variable_requires_lock_precise : - Warning<warn_variable_requires_lock.Text>, + Warning<warn_variable_requires_lock.Summary>, InGroup<ThreadSafetyPrecise>, DefaultIgnore; def warn_var_deref_requires_lock_precise : - Warning<warn_var_deref_requires_lock.Text>, + Warning<warn_var_deref_requires_lock.Summary>, InGroup<ThreadSafetyPrecise>, DefaultIgnore; def warn_fun_requires_lock_precise : - Warning<warn_fun_requires_lock.Text>, + Warning<warn_fun_requires_lock.Summary>, InGroup<ThreadSafetyPrecise>, DefaultIgnore; def note_found_mutex_near_match : Note<"found near match '%0'">; @@ -3754,6 +4046,9 @@ def warn_impcast_integer_64_32 : Warning< def warn_impcast_integer_precision_constant : Warning< "implicit conversion from %2 to %3 changes value from %0 to %1">, InGroup<ConstantConversion>; +def warn_impcast_single_bit_bitield_precision_constant : Warning< + "implicit truncation from %2 to a one-bit wide bit-field changes value from " + "%0 to %1">, InGroup<SingleBitBitFieldConstantConversion>; def warn_impcast_bitfield_precision_constant : Warning< "implicit truncation from %2 to bit-field changes value from %0 to %1">, InGroup<BitFieldConstantConversion>; @@ -3897,7 +4192,8 @@ def warn_cast_align : Warning< "cast from %0 to %1 increases required alignment from %2 to %3">, InGroup<CastAlign>, DefaultIgnore; def warn_old_style_cast : Warning< - "use of old-style cast">, InGroup<OldStyleCast>, DefaultIgnore; + "use of old-style cast">, InGroup<OldStyleCast>, DefaultIgnore, + SuppressInSystemMacro; // Separate between casts to void* and non-void* pointers. // Some APIs use (abuse) void* for something like a user context, @@ -3914,13 +4210,13 @@ def warn_pointer_to_int_cast : Warning< "cast to smaller integer type %1 from %0">, InGroup<PointerToIntCast>; def warn_pointer_to_enum_cast : Warning< - warn_pointer_to_int_cast.Text>, + warn_pointer_to_int_cast.Summary>, InGroup<PointerToEnumCast>; def warn_void_pointer_to_int_cast : Warning< "cast to smaller integer type %1 from %0">, InGroup<VoidPointerToIntCast>; def warn_void_pointer_to_enum_cast : Warning< - warn_void_pointer_to_int_cast.Text>, + warn_void_pointer_to_int_cast.Summary>, InGroup<VoidPointerToEnumCast>; def warn_attribute_ignored_for_field_of_type : Warning< @@ -3956,6 +4252,9 @@ def warn_transparent_union_attribute_zero_fields : Warning< def warn_attribute_type_not_supported : Warning< "%0 attribute argument not supported: %1">, InGroup<IgnoredAttributes>; +def warn_attribute_type_not_supported_global : Warning< + "%0 attribute argument '%1' not supported on a global variable">, + InGroup<IgnoredAttributes>; def warn_attribute_unknown_visibility : Warning<"unknown visibility %0">, InGroup<IgnoredAttributes>; def warn_attribute_protected_visibility : @@ -3981,6 +4280,9 @@ def warn_vector_mode_deprecated : Warning< "specifying vector types with the 'mode' attribute is deprecated; " "use the 'vector_size' attribute instead">, InGroup<DeprecatedAttributes>; +def warn_deprecated_noreturn_spelling : Warning< + "the '[[_Noreturn]]' attribute spelling is deprecated in C23; use " + "'[[noreturn]]' instead">, InGroup<DeprecatedAttributes>; def err_complex_mode_vector_type : Error< "type of machine mode does not support base vector types">; def err_enum_mode_vector_type : Error< @@ -3991,6 +4293,10 @@ def warn_attribute_nonnull_no_pointers : Warning< def warn_attribute_nonnull_parm_no_args : Warning< "'nonnull' attribute when used on parameters takes no arguments">, InGroup<IgnoredAttributes>; +def warn_function_stmt_attribute_precedence : Warning< + "statement attribute %0 has higher precedence than function attribute " + "'%select{always_inline|flatten|noinline}1'">, + InGroup<IgnoredAttributes>; def note_declared_nonnull : Note< "declared %select{'returns_nonnull'|'nonnull'}0 here">; def warn_attribute_sentinel_named_arguments : Warning< @@ -4028,6 +4334,9 @@ def err_attribute_not_supported_on_arch def warn_gcc_ignores_type_attr : Warning< "GCC does not allow the %0 attribute to be written on a type">, InGroup<GccCompat>; +def warn_gcc_requires_variadic_function : Warning< + "GCC requires a function with the %0 attribute to be variadic">, + InGroup<GccCompat>; // Clang-Specific Attributes def warn_attribute_iboutlet : Warning< @@ -4084,7 +4393,7 @@ def err_attribute_preferred_name_arg_invalid : Error< "argument %0 to 'preferred_name' attribute is not a typedef for " "a specialization of %1">; def err_attribute_builtin_alias : Error< - "%0 attribute can only be applied to a ARM or RISC-V builtin">; + "%0 attribute can only be applied to a ARM, HLSL or RISC-V builtin">; // called-once attribute diagnostics. def err_called_once_attribute_wrong_type : Error< @@ -4256,14 +4565,15 @@ def err_void_param_qualified : Error< "'void' as parameter must not have type qualifiers">; def err_ident_list_in_fn_declaration : Error< "a parameter list without types is only allowed in a function definition">; -def ext_param_not_declared : Extension< - "parameter %0 was not declared, defaulting to type 'int'">; +def ext_param_not_declared : ExtWarn< + "parameter %0 was not declared, defaults to 'int'; ISO C99 and later do not " + "support implicit int">, InGroup<ImplicitInt>; def err_param_default_argument : Error< "C does not support default arguments">; def err_param_default_argument_redefinition : Error< "redefinition of default argument">; def ext_param_default_argument_redefinition : ExtWarn< - err_param_default_argument_redefinition.Text>, + err_param_default_argument_redefinition.Summary>, InGroup<MicrosoftDefaultArgRedefinition>; def err_param_default_argument_missing : Error< "missing default argument on parameter">; @@ -4299,6 +4609,9 @@ def err_uninitialized_member_in_ctor : Error< def err_default_arg_makes_ctor_special : Error< "addition of default argument on redeclaration makes this constructor a " "%select{default|copy|move}0 constructor">; +def err_stmt_expr_in_default_arg : Error< + "default %select{argument|non-type template argument}0 may not use a GNU " + "statement expression">; def err_use_of_default_argument_to_function_declared_later : Error< "use of default argument to function %0 that is declared later in class %1">; @@ -4443,12 +4756,14 @@ def note_ovl_candidate_non_deduced_mismatch_qualified : Note< // Note that we don't treat templates differently for this diagnostic. def note_ovl_candidate_arity : Note<"candidate " "%sub{select_ovl_candidate_kind}0,1,2 not viable: " - "requires%select{ at least| at most|}3 %4 argument%s4, but %5 " + "requires%select{ at least| at most|}3 %4 " + "%select{|non-object }6argument%s4, but %5 " "%plural{1:was|:were}5 provided">; def note_ovl_candidate_arity_one : Note<"candidate " "%sub{select_ovl_candidate_kind}0,1,2 not viable: " "%select{requires at least|allows at most single|requires single}3 " + "%select{|non-object }6" "argument %4, but %plural{0:no|:%5}5 arguments were provided">; def note_ovl_candidate_deleted : Note< @@ -4472,7 +4787,8 @@ def note_ovl_candidate_bad_conv_incomplete : Note< "; remove &}7">; def note_ovl_candidate_bad_list_argument : Note< "candidate %sub{select_ovl_candidate_kind}0,1,2 not viable: " - "cannot convert initializer list argument to %4">; + "%select{cannot convert initializer list|too few initializers in list" + "|too many initializers in list}7 argument to %4">; def note_ovl_candidate_bad_overload : Note< "candidate %sub{select_ovl_candidate_kind}0,1,2 not viable: " "no overload of %4 matching %3 for %ordinal5 argument">; @@ -4523,9 +4839,6 @@ def note_ovl_candidate_bad_cvr : Note< "%select{const|restrict|const and restrict|volatile|const and volatile|" "volatile and restrict|const, volatile, and restrict}4 qualifier" "%select{||s||s|s|s}4">; -def note_ovl_candidate_bad_unaligned : Note< - "candidate %sub{select_ovl_candidate_kind}0,1,2 not viable: " - "%ordinal5 argument (%3) would lose __unaligned qualifier">; def note_ovl_candidate_bad_base_to_derived_conv : Note< "candidate %sub{select_ovl_candidate_kind}0,1,2 not viable: " "cannot %select{convert from|convert from|bind}3 " @@ -4540,6 +4853,8 @@ def note_ovl_candidate_bad_target : Note< def note_ovl_candidate_constraints_not_satisfied : Note< "candidate %sub{select_ovl_candidate_kind}0,1,2 not viable: constraints " "not satisfied">; +def note_ovl_surrogate_constraints_not_satisfied : Note< + "conversion candidate %0 not viable: constraints not satisfied">; def note_implicit_member_target_infer_collision : Note< "implicit %sub{select_special_member_kind}0 inferred target collision: call to both " "%select{__device__|__global__|__host__|__host__ __device__}1 and " @@ -4582,6 +4897,8 @@ def ext_ovl_ambiguous_oper_binary_reversed : ExtWarn< def note_ovl_ambiguous_oper_binary_reversed_self : Note< "ambiguity is between a regular call to this operator and a call with the " "argument order reversed">; +def note_ovl_ambiguous_eqeq_reversed_self_non_const : Note< + "mark 'operator==' as const or add a matching 'operator!=' to resolve the ambiguity">; def note_ovl_ambiguous_oper_binary_selected_candidate : Note< "candidate function with non-reversed arguments">; def note_ovl_ambiguous_oper_binary_reversed_candidate : Note< @@ -4614,16 +4931,22 @@ def err_bound_member_function : Error< "reference to non-static member function must be called" "%select{|; did you mean to call it with no arguments?}0">; def note_possible_target_of_call : Note<"possible target for call">; +def err_no_viable_destructor : Error< + "no viable destructor found for class %0">; +def err_ambiguous_destructor : Error< + "destructor of class %0 is ambiguous">; def err_ovl_no_viable_object_call : Error< "no matching function for call to object of type %0">; def err_ovl_ambiguous_object_call : Error< "call to object of type %0 is ambiguous">; +def err_ovl_ambiguous_subscript_call : Error< + "call to subscript operator of type %0 is ambiguous">; def err_ovl_deleted_object_call : Error< "call to deleted function call operator in type %0">; def note_ovl_surrogate_cand : Note<"conversion candidate of type %0">; def err_member_call_without_object : Error< - "call to non-static member function without an object argument">; + "call to %select{non-static|explicit}0 member function without an object argument">; // C++ Address of Overloaded Function def err_addr_ovl_no_viable : Error< @@ -4648,8 +4971,10 @@ def err_ovl_no_viable_literal_operator : Error< def err_template_param_shadow : Error< "declaration of %0 shadows template parameter">; def ext_template_param_shadow : ExtWarn< - err_template_param_shadow.Text>, InGroup<MicrosoftTemplateShadow>; + err_template_param_shadow.Summary>, InGroup<MicrosoftTemplateShadow>; def note_template_param_here : Note<"template parameter is declared here">; +def note_template_param_external : Note< + "template parameter from hidden source: %0">; def warn_template_export_unsupported : Warning< "exported templates are unsupported">; def err_template_outside_namespace_or_class_scope : Error< @@ -4719,8 +5044,12 @@ def warn_cxx14_compat_template_nontype_parm_auto_type : Warning< DefaultIgnore, InGroup<CXXPre17Compat>; def err_template_param_default_arg_redefinition : Error< "template parameter redefines default argument">; +def err_template_param_default_arg_inconsistent_redefinition : Error< + "template parameter default argument is inconsistent with previous definition">; def note_template_param_prev_default_arg : Note< "previous default template argument defined here">; +def note_template_param_prev_default_arg_in_other_module : Note< + "previous default template argument defined in module %0">; def err_template_param_default_arg_missing : Error< "template parameter missing a default argument">; def ext_template_parameter_default_in_function_template : ExtWarn< @@ -4745,6 +5074,7 @@ def warn_cxx11_compat_variable_template : Warning< def err_template_variable_noparams : Error< "extraneous 'template<>' in declaration of variable %0">; def err_template_member : Error<"member %0 declared as a template">; +def err_member_with_template_arguments : Error<"member %0 cannot have template arguments">; def err_template_member_noparams : Error< "extraneous 'template<>' in declaration of member %0">; def err_template_tag_noparams : Error< @@ -4759,6 +5089,9 @@ def ext_adl_only_template_id : ExtWarn< "use of function template name with no prior declaration in function call " "with explicit template arguments is a C++20 extension">, InGroup<CXX20>; +def warn_unqualified_call_to_std_cast_function : Warning< + "unqualified call to '%0'">, InGroup<DiagGroup<"unqualified-std-cast-call">>; + // C++ Template Argument Lists def err_template_missing_args : Error< "use of " @@ -4770,6 +5103,8 @@ def err_template_arg_list_different_arity : Error< "%select{class template|function template|variable template|alias template|" "template template parameter|concept|template}1 %2">; def note_template_decl_here : Note<"template is declared here">; +def note_template_decl_external : Note< + "template declaration from hidden source: %0">; def err_template_arg_must_be_type : Error< "template argument for template type parameter must be a type">; def err_template_arg_must_be_type_suggest : Error< @@ -4832,8 +5167,6 @@ def err_non_type_template_arg_subobject : Error< "non-type template argument refers to subobject '%0'">; def err_non_type_template_arg_addr_label_diff : Error< "template argument / label address difference / what did you expect?">; -def err_non_type_template_arg_unsupported : Error< - "sorry, non-type template argument of type %0 is not yet supported">; def err_template_arg_not_convertible : Error< "non-type template argument of type %0 cannot be converted to a value " "of type %1">; @@ -4885,9 +5218,8 @@ def err_template_arg_not_object_or_func : Error< "non-type template argument does not refer to an object or function">; def err_template_arg_not_pointer_to_member_form : Error< "non-type template argument is not a pointer to member constant">; -def err_template_arg_member_ptr_base_derived_not_supported : Error< - "sorry, non-type template argument of pointer-to-member type %1 that refers " - "to member %q0 of a different class is not supported yet">; +def err_template_arg_invalid : Error< + "non-type template argument '%0' is invalid">; def ext_template_arg_extra_parens : ExtWarn< "address non-type template argument cannot be surrounded by parentheses">; def warn_cxx98_compat_template_arg_extra_parens : Warning< @@ -4924,8 +5256,6 @@ def err_template_spec_unknown_kind : Error< "class template">; def note_specialized_entity : Note< "explicitly specialized declaration is here">; -def note_explicit_specialization_declared_here : Note< - "explicit specialization declared here">; def err_template_spec_decl_function_scope : Error< "explicit specialization of %0 in function scope">; def err_template_spec_decl_friend : Error< @@ -4970,11 +5300,11 @@ def err_explicit_specialization_inconsistent_storage_class : Error< "'%select{none|extern|static|__private_extern__|auto|register}0'">; def err_dependent_function_template_spec_no_match : Error< "no candidate function template was found for dependent" - " friend function template specialization">; + " %select{member|friend}0 function template specialization">; def note_dependent_function_template_spec_discard_reason : Note< - "candidate ignored: %select{not a function template" - "|not a member of the enclosing namespace;" - " did you mean to explicitly qualify the specialization?}0">; + "candidate ignored: %select{not a function template|" + "not a member of the enclosing %select{class template|" + "namespace; did you mean to explicitly qualify the specialization?}1}0">; // C++ class template specializations and out-of-line definitions def err_template_spec_needs_header : Error< @@ -5034,8 +5364,6 @@ def err_partial_spec_ordering_ambiguous : Error< def note_partial_spec_match : Note<"partial specialization matches %0">; def err_partial_spec_redeclared : Error< "class template partial specialization %0 cannot be redeclared">; -def note_partial_specialization_declared_here : Note< - "explicit specialization declared here">; def note_prev_partial_spec_here : Note< "previous declaration of class template partial specialization %0 is here">; def err_partial_spec_fully_specialized : Error< @@ -5068,6 +5396,8 @@ def err_function_template_partial_spec : Error< def err_template_recursion_depth_exceeded : Error< "recursive template instantiation exceeded maximum depth of %0">, DefaultFatal, NoSFINAE; +def err_constraint_depends_on_self : Error< + "satisfaction of constraint '%0' depends on itself">, NoSFINAE; def note_template_recursion_depth : Note< "use -ftemplate-depth=N to increase recursive template instantiation depth">; @@ -5104,6 +5434,8 @@ def note_template_exception_spec_instantiation_here : Note< "in instantiation of exception specification for %0 requested here">; def note_template_requirement_instantiation_here : Note< "in instantiation of requirement here">; +def note_template_requirement_params_instantiation_here : Note< + "in instantiation of requirement parameters here">; def warn_var_template_missing : Warning<"instantiation of variable %q0 " "required here, but no definition is available">, InGroup<UndefinedVarTemplate>; @@ -5158,6 +5490,10 @@ def note_constraint_normalization_here : Note< def note_parameter_mapping_substitution_here : Note< "while substituting into concept arguments here; substitution failures not " "allowed in concept arguments">; +def note_building_deduction_guide_here : Note< + "while building implicit deduction guide first needed here">; +def note_lambda_substitution_here : Note< + "while substituting into a lambda expression here">; def note_instantiation_contexts_suppressed : Note< "(skipping %0 context%s0 in backtrace; use -ftemplate-backtrace-limit=0 to " "see all)">; @@ -5263,7 +5599,7 @@ def err_mismatched_exception_spec_explicit_instantiation : Error< "exception specification in explicit instantiation does not match " "instantiated one">; def ext_mismatched_exception_spec_explicit_instantiation : ExtWarn< - err_mismatched_exception_spec_explicit_instantiation.Text>, + err_mismatched_exception_spec_explicit_instantiation.Summary>, InGroup<MicrosoftExceptionSpec>; def err_explicit_instantiation_dependent : Error< "explicit instantiation has dependent template arguments">; @@ -5301,6 +5637,12 @@ def err_typename_refers_to_using_value_decl : Error< "%0 in %1">; def note_using_value_decl_missing_typename : Note< "add 'typename' to treat this using declaration as a type">; +def warn_cxx17_compat_implicit_typename : Warning<"use of implicit 'typename' is " + "incompatible with C++ standards before C++20">, InGroup<CXX20Compat>, + DefaultIgnore; +def ext_implicit_typename : ExtWarn<"missing 'typename' prior to dependent " + "type name %0%1; implicit 'typename' is a C++20 extension">, + InGroup<CXX20>; def err_template_kw_refers_to_non_template : Error< "%0%select{| following the 'template' keyword}1 " @@ -5310,10 +5652,10 @@ def note_template_kw_refers_to_non_template : Note< def err_template_kw_refers_to_dependent_non_template : Error< "%0%select{| following the 'template' keyword}1 " "cannot refer to a dependent template">; -def err_template_kw_refers_to_class_template : Error< - "'%0%1' instantiated to a class template, not a function template">; -def note_referenced_class_template : Note< - "class template declared here">; +def err_template_kw_refers_to_type_template : Error< + "'%0%1' is expected to be a non-type template, but instantiated to a %select{class|type alias}2 template">; +def note_referenced_type_template : Note< + "%select{class|type alias}0 template declared here">; def err_template_kw_missing : Error< "missing 'template' keyword prior to dependent template name '%0%1'">; def ext_template_outside_of_template : ExtWarn< @@ -5359,9 +5701,9 @@ def err_unexpanded_parameter_pack : Error< "%select{expression|base type|declaration type|data member type|bit-field " "size|static assertion|fixed underlying type|enumerator value|" "using declaration|friend declaration|qualifier|initializer|default argument|" - "non-type template parameter type|exception type|partial specialization|" - "__if_exists name|__if_not_exists name|lambda|block|type constraint|" - "requirement|requires clause}0 " + "non-type template parameter type|exception type|explicit specialization|" + "partial specialization|__if_exists name|__if_not_exists name|lambda|block|" + "type constraint|requirement|requires clause}0 " "contains%plural{0: an|:}1 unexpanded parameter pack" "%plural{0:|1: %2|2:s %2 and %3|:s %2, %3, ...}1">; @@ -5417,6 +5759,9 @@ def err_found_later_in_class : Error<"member %0 used before its declaration">; def ext_found_later_in_class : ExtWarn< "use of member %0 before its declaration is a Microsoft extension">, InGroup<MicrosoftTemplate>; +def ext_unqualified_base_class : ExtWarn< + "unqualified base initializer of class templates is a Microsoft extension">, + InGroup<MicrosoftTemplate>; def note_dependent_member_use : Note< "must qualify identifier to find this declaration in dependent base class">; def err_not_found_by_two_phase_lookup : Error<"call to function %0 that is neither " @@ -5444,6 +5789,9 @@ def warn_deprecated_def : Warning< def warn_unavailable_def : Warning< "implementing unavailable method">, InGroup<DeprecatedImplementations>, DefaultIgnore; +def warn_deprecated_builtin : Warning< + "builtin %0 is deprecated; use %1 instead">, + InGroup<DeprecatedBuiltins>; def err_unavailable : Error<"%0 is unavailable">; def err_property_method_unavailable : Error<"property access is using %0 method which is unavailable">; @@ -5467,16 +5815,28 @@ def warn_missing_sentinel : Warning < InGroup<Sentinel>; def note_sentinel_here : Note< "%select{function|method|block}0 has been explicitly marked sentinel here">; +def warn_strict_uses_without_prototype : Warning< + "passing arguments to %select{a function|%1}0 without a prototype is " + "deprecated in all versions of C and is not supported in C23">, + InGroup<DeprecatedNonPrototype>; def warn_missing_prototype : Warning< "no previous prototype for function %0">, InGroup<DiagGroup<"missing-prototypes">>, DefaultIgnore; def note_declaration_not_a_prototype : Note< "this declaration is not a prototype; add %select{'void'|parameter declarations}0 " "to make it %select{a prototype for a zero-parameter function|one}0">; -def warn_strict_prototypes : Warning< - "this %select{function declaration is not|block declaration is not|" - "old-style function definition is not preceded by}0 a prototype">, - InGroup<DiagGroup<"strict-prototypes">>, DefaultIgnore; +// This is not actually an extension, but we only want it to be enabled in +// -pedantic mode and this is the most direct way of accomplishing that. +def warn_strict_prototypes : Extension< + "a %select{function|block}0 declaration without a prototype is deprecated " + "%select{in all versions of C|}0">, InGroup<StrictPrototypes>; +def warn_non_prototype_changes_behavior : Warning< + "a function %select{declaration|definition}0 without a prototype is " + "deprecated in all versions of C %select{and is not supported in C23|and is " + "treated as a zero-parameter prototype in C23, conflicting with a " + "%select{previous|subsequent}2 %select{declaration|definition}3}1">, + InGroup<DeprecatedNonPrototype>; +def note_conflicting_prototype : Note<"conflicting prototype is here">; def warn_missing_variable_declarations : Warning< "no previous extern declaration for non-static variable %0">, InGroup<DiagGroup<"missing-variable-declarations">>, DefaultIgnore; @@ -5511,6 +5871,12 @@ def err_new_abi_tag_on_redeclaration : Error< def note_use_ifdef_guards : Note< "unguarded header; consider using #ifdef guards or #pragma once">; +def warn_var_decl_not_read_only : Warning< + "object of type %0 cannot be placed in read-only memory">, + InGroup<ReadOnlyPlacementChecks>; +def note_enforce_read_only_placement : Note<"type was declared read-only here">; + + def note_deleted_dtor_no_operator_delete : Note< "virtual destructor requires an unambiguous, accessible 'operator delete'">; def note_deleted_special_member_class_subobject : Note< @@ -5563,8 +5929,8 @@ def warn_undefined_inline : Warning<"inline function %q0 is not defined">, def err_undefined_inline_var : Error<"inline variable %q0 is not defined">; def note_used_here : Note<"used here">; -def err_internal_linkage_redeclaration : Error< - "'internal_linkage' attribute does not appear on the first declaration of %0">; +def err_attribute_missing_on_first_decl : Error< + "%0 attribute does not appear on the first declaration">; def warn_internal_linkage_local_storage : Warning< "'internal_linkage' attribute on a non-static local variable is ignored">, InGroup<IgnoredAttributes>; @@ -5640,6 +6006,8 @@ def warn_forward_class_redefinition : Warning< def err_redefinition_different_typedef : Error< "%select{typedef|type alias|type alias template}0 " "redefinition with different types%diff{ ($ vs $)|}1,2">; +def err_redefinition_different_concept : Error< + "redefinition of concept %0 with different template parameters or requirements">; def err_tag_reference_non_tag : Error< "%select{non-struct type|non-class type|non-union type|non-enum " "type|typedef|type alias|template|type alias template|template " @@ -5727,7 +6095,7 @@ def warn_typecheck_function_qualifiers_unspecified : Warning< "'%0' qualifier on function type %1 has unspecified behavior">; def warn_typecheck_reference_qualifiers : Warning< "'%0' qualifier on reference type %1 has no effect">, - InGroup<IgnoredQualifiers>; + InGroup<IgnoredReferenceQualifiers>; def err_typecheck_invalid_restrict_not_pointer : Error< "restrict requires a pointer or reference (%0 is invalid)">; def err_typecheck_invalid_restrict_not_pointer_noarg : Error< @@ -5737,7 +6105,7 @@ def err_typecheck_invalid_restrict_invalid_pointee : Error< def ext_typecheck_zero_array_size : Extension< "zero size arrays are an extension">, InGroup<ZeroLengthArray>; def err_typecheck_zero_array_size : Error< - "zero-length arrays are not permitted in C++">; + "zero-length arrays are not permitted in %select{C++|SYCL device code}0">; def err_array_size_non_int : Error<"size of array has non-integer type %0">; def err_init_element_not_constant : Error< "initializer element is not a compile-time constant">; @@ -5757,7 +6125,7 @@ def err_loader_uninitialized_extern_decl : Error<"variable %0 cannot be declared both 'extern' and with the " "'loader_uninitialized' attribute">; def err_block_extern_cant_init : Error< - "'extern' variable cannot have an initializer">; + "declaration of block scope identifier with linkage cannot have an initializer">; def warn_extern_init : Warning<"'extern' variable has an initializer">, InGroup<DiagGroup<"extern-initializer">>; def err_variable_object_no_init : Error< @@ -5778,7 +6146,7 @@ def ext_excess_initializers_in_char_array_initializer : ExtWarn< "excess elements in char array initializer">, InGroup<ExcessInitializers>; def err_initializer_string_for_char_array_too_long : Error< - "initializer-string for char array is too long">; + "initializer-string for char array is too long, array size is %0 but initializer has size %1 (including the null terminating character)">; def ext_initializer_string_for_char_array_too_long : ExtWarn< "initializer-string for char array is too long">, InGroup<ExcessInitializers>; @@ -5818,12 +6186,20 @@ def err_illegal_initializer_type : Error<"illegal initializer type %0">; def ext_init_list_type_narrowing : ExtWarn< "type %0 cannot be narrowed to %1 in initializer list">, InGroup<CXX11Narrowing>, DefaultError, SFINAEFailure; +def ext_init_list_type_narrowing_const_reference : ExtWarn< + ext_init_list_type_narrowing.Summary>, + InGroup<CXX11NarrowingConstReference>, DefaultError, SFINAEFailure; def ext_init_list_variable_narrowing : ExtWarn< "non-constant-expression cannot be narrowed from type %0 to %1 in " "initializer list">, InGroup<CXX11Narrowing>, DefaultError, SFINAEFailure; +def ext_init_list_variable_narrowing_const_reference : ExtWarn< + ext_init_list_variable_narrowing.Summary>, InGroup<CXX11NarrowingConstReference>, DefaultError, SFINAEFailure; def ext_init_list_constant_narrowing : ExtWarn< "constant expression evaluates to %0 which cannot be narrowed to type %1">, InGroup<CXX11Narrowing>, DefaultError, SFINAEFailure; +def ext_init_list_constant_narrowing_const_reference : ExtWarn< + ext_init_list_constant_narrowing.Summary>, + InGroup<CXX11NarrowingConstReference>, DefaultError, SFINAEFailure; def warn_init_list_type_narrowing : Warning< "type %0 cannot be narrowed to %1 in initializer list in C++11">, InGroup<CXX11Narrowing>, DefaultIgnore; @@ -5926,6 +6302,8 @@ def note_protected_by_vla_type_alias : Note< "jump bypasses initialization of VLA type alias">; def note_protected_by_constexpr_if : Note< "jump enters controlled statement of constexpr if">; +def note_protected_by_consteval_if : Note< + "jump enters controlled statement of consteval if">; def note_protected_by_if_available : Note< "jump enters controlled statement of if available">; def note_protected_by_vla : Note< @@ -5971,6 +6349,8 @@ def note_enters_block_captures_non_trivial_c_struct : Note< "to destroy">; def note_enters_compound_literal_scope : Note< "jump enters lifetime of a compound literal that is non-trivial to destruct">; +def note_enters_statement_expression : Note< + "jump enters a statement expression">; def note_exits_cleanup : Note< "jump exits scope of variable with __attribute__((cleanup))">; @@ -6085,6 +6465,19 @@ def warn_superclass_variable_sized_type_not_at_end : Warning< "field %0 can overwrite instance variable %1 with variable sized type %2" " in superclass %3">, InGroup<ObjCFlexibleArray>; +def err_flexible_array_count_not_in_same_struct : Error< + "'counted_by' field %0 isn't within the same struct as the flexible array">; +def err_counted_by_attr_not_on_flexible_array_member : Error< + "'counted_by' only applies to C99 flexible array members">; +def err_counted_by_attr_refers_to_flexible_array : Error< + "'counted_by' cannot refer to the flexible array %0">; +def err_counted_by_must_be_in_structure : Error< + "field %0 in 'counted_by' not inside structure">; +def err_flexible_array_counted_by_attr_field_not_integer : Error< + "field %0 in 'counted_by' must be a non-boolean integer type">; +def note_flexible_array_counted_by_attr_field : Note< + "field %0 declared here">; + let CategoryName = "ARC Semantic Issue" in { // ARC-mode diagnostics. @@ -6351,10 +6744,23 @@ def err_func_def_incomplete_result : Error< def err_atomic_specifier_bad_type : Error<"_Atomic cannot be applied to " "%select{incomplete |array |function |reference |atomic |qualified " - "|sizeless ||integer }0type " - "%1 %select{|||||||which is not trivially copyable|}0">; + "|sizeless ||integer |}0type " + "%1 %select{|||||||which is not trivially copyable||in C23}0">; +def warn_atomic_member_access : Warning< + "accessing a member of an atomic structure or union is undefined behavior">, + InGroup<DiagGroup<"atomic-access">>, DefaultError; // Expressions. +def err_using_placeholder_variable : Error< + "ambiguous reference to placeholder '_', which is defined multiple times">; +def note_reference_placeholder : Note< + "placeholder declared here">; +def ext_placeholder_var_definition : ExtWarn< + "placeholder variables are a C++2c extension">, InGroup<CXX26>; +def warn_cxx23_placeholder_var_definition : Warning< + "placeholder variables are incompatible with C++ standards before C++2c">, + DefaultIgnore, InGroup<CXXPre26Compat>; + def ext_sizeof_alignof_function_type : Extension< "invalid application of '%0' to a function type">, InGroup<PointerArith>; def ext_sizeof_alignof_void_type : Extension< @@ -6368,7 +6774,8 @@ def err_sizeof_alignof_function_type : Error< def err_openmp_default_simd_align_expr : Error< "invalid application of '__builtin_omp_required_simd_align' to an expression, only type is allowed">; def err_sizeof_alignof_typeof_bitfield : Error< - "invalid application of '%select{sizeof|alignof|typeof}0' to bit-field">; + "invalid application of '%select{sizeof|alignof|typeof|typeof_unqual}0' to " + "bit-field">; def err_alignof_member_of_incomplete_type : Error< "invalid application of 'alignof' to a field of a class still being defined">; def err_vecstep_non_scalar_vector_type : Error< @@ -6391,22 +6798,21 @@ def warn_sub_ptr_zero_size_types : Warning< def warn_pointer_arith_null_ptr : Warning< "performing pointer arithmetic on a null pointer has undefined behavior%select{| if the offset is nonzero}0">, InGroup<NullPointerArithmetic>, DefaultIgnore; -def warn_gnu_null_ptr_arith : Warning< +def warn_gnu_null_ptr_arith : Extension< "arithmetic on a null pointer treated as a cast from integer to pointer is a GNU extension">, - InGroup<NullPointerArithmetic>, DefaultIgnore; + InGroup<GNUNullPointerArithmetic>; def warn_pointer_sub_null_ptr : Warning< "performing pointer subtraction with a null pointer %select{has|may have}0 undefined behavior">, InGroup<NullPointerSubtraction>, DefaultIgnore; -def err_kernel_invalidates_sycl_unique_stable_name - : Error<"kernel instantiation changes the result of an evaluated " - "'__builtin_sycl_unique_stable_name'">; -def note_sycl_unique_stable_name_evaluated_here - : Note<"'__builtin_sycl_unique_stable_name' evaluated here">; def warn_floatingpoint_eq : Warning< "comparing floating point with == or != is unsafe">, InGroup<DiagGroup<"float-equal">>, DefaultIgnore; +def err_setting_eval_method_used_in_unsafe_context : Error < + "%select{'#pragma clang fp eval_method'|option 'ffp-eval-method'}0 cannot be used with " + "%select{option 'fapprox-func'|option 'mreassociate'|option 'freciprocal'|option 'ffp-eval-method'|'#pragma clang fp reassociate'|'#pragma clang fp reciprocal'}1">; + def warn_remainder_division_by_zero : Warning< "%select{remainder|division}0 by zero is undefined">, InGroup<DivZero>; @@ -6476,15 +6882,27 @@ def warn_addition_in_bitshift : Warning< "'%1' will be evaluated first">, InGroup<ShiftOpParentheses>; def warn_self_assignment_builtin : Warning< - "explicitly assigning value of variable of type %0 to itself">, + "explicitly assigning value of variable of type %0 to itself%select{|; did " + "you mean to assign to member %2?}1">, InGroup<SelfAssignment>, DefaultIgnore; def warn_self_assignment_overloaded : Warning< - "explicitly assigning value of variable of type %0 to itself">, + "explicitly assigning value of variable of type %0 to itself%select{|; did " + "you mean to assign to member %2?}1">, InGroup<SelfAssignmentOverloaded>, DefaultIgnore; def warn_self_move : Warning< - "explicitly moving variable of type %0 to itself">, + "explicitly moving variable of type %0 to itself%select{|; did you mean to " + "move to member %2?}1">, InGroup<SelfMove>, DefaultIgnore; +def err_builtin_move_forward_unsupported : Error< + "unsupported signature for %q0">; +def err_use_of_unaddressable_function : Error< + "taking address of non-addressable standard library function">; +// FIXME: This should also be in -Wc++23-compat once we have it. +def warn_cxx20_compat_use_of_unaddressable_function : Warning< + "taking address of non-addressable standard library function " + "is incompatible with C++20">, InGroup<CXX20Compat>; + def warn_redundant_move_on_return : Warning< "redundant move in return statement">, InGroup<RedundantMove>, DefaultIgnore; @@ -6527,7 +6945,8 @@ def err_arithmetic_nonfragile_interface : Error< "this architecture and platform">; def warn_deprecated_comma_subscript : Warning< - "top-level comma expression in array subscript is deprecated">, + "top-level comma expression in array subscript is deprecated " + "in C++20 and unsupported in C++23">, InGroup<DeprecatedCommaSubscript>; def ext_subscript_non_lvalue : Extension< @@ -6540,10 +6959,13 @@ def err_subscript_function_type : Error< "subscript of pointer to function type %0">; def err_subscript_incomplete_or_sizeless_type : Error< "subscript of pointer to %select{incomplete|sizeless}0 type %1">; +def err_subscript_svbool_t : Error< + "subscript of svbool_t is not allowed">; def err_dereference_incomplete_type : Error< "dereference of pointer to incomplete type %0">; def ext_gnu_subscript_void_type : Extension< - "subscript of a pointer to void is a GNU extension">, InGroup<PointerArith>; + "subscript of a pointer to void is a GNU extension">, + InGroup<GNUPointerArith>; def err_typecheck_member_reference_struct_union : Error< "member reference base type %0 is not a structure or union">; def err_typecheck_member_reference_ivar : Error< @@ -6602,6 +7024,11 @@ def err_member_decl_does_not_match : Error< "does not match any declaration in %1">; def err_friend_decl_with_def_arg_must_be_def : Error< "friend declaration specifying a default argument must be a definition">; +def err_friend_decl_with_enclosing_temp_constraint_must_be_def : Error< + "friend declaration with a constraint that depends on an enclosing " + "template parameter must be a definition">; +def err_non_temp_friend_decl_with_requires_clause_must_be_def : Error< + "non-template friend declaration with a requires clause must be a definition">; def err_friend_decl_with_def_arg_redeclared : Error< "friend declaration specifying a default argument must be the only declaration">; def err_friend_decl_does_not_match : Error< @@ -6624,7 +7051,7 @@ def ext_out_of_line_declaration : ExtWarn< def err_member_extra_qualification : Error< "extra qualification on member %0">; def warn_member_extra_qualification : Warning< - err_member_extra_qualification.Text>, InGroup<MicrosoftExtraQualification>; + err_member_extra_qualification.Summary>, InGroup<MicrosoftExtraQualification>; def warn_namespace_member_extra_qualification : Warning< "extra qualification on member %0">, InGroup<DiagGroup<"extra-qualification">>; @@ -6682,8 +7109,8 @@ def err_array_init_plain_string_into_char8_t : Error< def note_array_init_plain_string_into_char8_t : Note< "add 'u8' prefix to form a 'char8_t' string literal">; def err_array_init_utf8_string_into_char : Error< - "%select{|ISO C++20 does not permit }0initialization of char array with " - "UTF-8 string literal%select{ is not permitted by '-fchar8_t'|}0">; + "initialization of %select{|signed }0char array with " + "UTF-8 string literal is not permitted by %select{'-fchar8_t'|C++20}1">; def warn_cxx20_compat_utf8_string : Warning< "type of UTF-8 string literal will change from array of const char to " "array of const char8_t in C++20">, InGroup<CXX20Compat>, DefaultIgnore; @@ -6718,7 +7145,7 @@ def warn_standalone_specifier : Warning<"'%0' ignored on this declaration">, def ext_standalone_specifier : ExtWarn<"'%0' is not permitted on a declaration " "of a type">, InGroup<MissingDeclarations>; def err_standalone_class_nested_name_specifier : Error< - "forward declaration of %select{class|struct|interface|union|enum}0 cannot " + "forward declaration of %select{class|struct|interface|union|enum|enum class|enum struct}0 cannot " "have a nested name specifier">; def err_typecheck_sclass_func : Error<"illegal storage class on function">; def err_static_block_func : Error< @@ -6752,8 +7179,10 @@ def err_typecheck_unary_expr : Error< def err_typecheck_indirection_requires_pointer : Error< "indirection requires pointer operand (%0 invalid)">; def ext_typecheck_indirection_through_void_pointer : ExtWarn< - "ISO C++ does not allow indirection on operand of type %0">, - InGroup<DiagGroup<"void-ptr-dereference">>; + "ISO C does not allow indirection on operand of type %0">, + InGroup<VoidPointerDeref>; +def err_typecheck_indirection_through_void_pointer_cpp + : Error<"indirection not permitted on operand of type %0">; def warn_indirection_through_null : Warning< "indirection of non-volatile null pointer will be deleted, not trap">, InGroup<NullDereference>; @@ -6770,7 +7199,7 @@ def warn_taking_address_of_packed_member : Warning< "taking address of packed member %0 of class or structure %q1 may result in an unaligned pointer value">, InGroup<DiagGroup<"address-of-packed-member">>; def warn_param_mismatched_alignment : Warning< - "passing %0-byte aligned argument to %1-byte aligned parameter %2 of %3 may result in an unaligned pointer access">, + "passing %0-byte aligned argument to %1-byte aligned parameter %2%select{| of %4}3 may result in an unaligned pointer access">, InGroup<DiagGroup<"align-mismatch">>; def err_objc_object_assignment : Error< @@ -6848,6 +7277,11 @@ def warn_arith_conv_enum_float_cxx20 : Warning< "%plural{2:with|4:from|:and}0 " "%select{enumeration|floating-point}1 type %3 is deprecated">, InGroup<DeprecatedEnumFloatConversion>; +def err_arith_conv_enum_float_cxx26 : Error< + "invalid %sub{select_arith_conv_kind}0 " + "%select{floating-point|enumeration}1 type %2 " + "%plural{2:with|4:from|:and}0 " + "%select{enumeration|floating-point}1 type %3">; def warn_arith_conv_mixed_enum_types : Warning< "%sub{select_arith_conv_kind}0 " "different enumeration types%diff{ ($ and $)|}1,2">, @@ -6856,23 +7290,27 @@ def warn_arith_conv_mixed_enum_types_cxx20 : Warning< "%sub{select_arith_conv_kind}0 " "different enumeration types%diff{ ($ and $)|}1,2 is deprecated">, InGroup<DeprecatedEnumEnumConversion>; +def err_conv_mixed_enum_types_cxx26 : Error< + "invalid %sub{select_arith_conv_kind}0 " + "different enumeration types%diff{ ($ and $)|}1,2">; + def warn_arith_conv_mixed_anon_enum_types : Warning< - warn_arith_conv_mixed_enum_types.Text>, + warn_arith_conv_mixed_enum_types.Summary>, InGroup<AnonEnumEnumConversion>, DefaultIgnore; def warn_arith_conv_mixed_anon_enum_types_cxx20 : Warning< - warn_arith_conv_mixed_enum_types_cxx20.Text>, + warn_arith_conv_mixed_enum_types_cxx20.Summary>, InGroup<DeprecatedAnonEnumEnumConversion>; def warn_conditional_mixed_enum_types : Warning< - warn_arith_conv_mixed_enum_types.Text>, + warn_arith_conv_mixed_enum_types.Summary>, InGroup<EnumCompareConditional>, DefaultIgnore; def warn_conditional_mixed_enum_types_cxx20 : Warning< - warn_arith_conv_mixed_enum_types_cxx20.Text>, + warn_arith_conv_mixed_enum_types_cxx20.Summary>, InGroup<DeprecatedEnumCompareConditional>; def warn_comparison_mixed_enum_types : Warning< - warn_arith_conv_mixed_enum_types.Text>, + warn_arith_conv_mixed_enum_types.Summary>, InGroup<EnumCompare>; def warn_comparison_mixed_enum_types_cxx20 : Warning< - warn_arith_conv_mixed_enum_types_cxx20.Text>, + warn_arith_conv_mixed_enum_types_cxx20.Summary>, InGroup<DeprecatedEnumCompare>; def warn_comparison_of_mixed_enum_types_switch : Warning< "comparison of different enumeration types in switch statement" @@ -6932,7 +7370,7 @@ def warn_out_of_range_compare : Warning< "result of comparison of %select{constant %0|true|false}1 with " "%select{expression of type %2|boolean expression}3 is always %4">, InGroup<TautologicalOutOfRangeCompare>; -def warn_tautological_bool_compare : Warning<warn_out_of_range_compare.Text>, +def warn_tautological_bool_compare : Warning<warn_out_of_range_compare.Summary>, InGroup<TautologicalConstantCompare>; def warn_integer_constants_in_conditional_always_true : Warning< "converting the result of '?:' with integer constants to a boolean always " @@ -6964,14 +7402,16 @@ def note_logical_not_silence_with_parens : Note< "add parentheses around left hand side expression to silence this warning">; def err_invalid_this_use : Error< - "invalid use of 'this' outside of a non-static member function">; + "invalid use of 'this' %select{outside of a non-static member function" + "|in a function with an explicit object parameter}0">; def err_this_static_member_func : Error< "'this' cannot be%select{| implicitly}0 used in a static member function " "declaration">; -def err_invalid_member_use_in_static_method : Error< - "invalid use of member %0 in static member function">; +def err_invalid_member_use_in_method : Error< + "invalid use of member %0 in %select{static|explicit object}1 member function">; + def err_invalid_qualified_function_type : Error< - "%select{non-member function|static member function|deduction guide}0 " + "%select{non-member function|static member function|explicit object member function|deduction guide}0 " "%select{of type %2 |}1cannot have '%3' qualifier">; def err_compound_qualified_function_type : Error< "%select{block pointer|pointer|reference}0 to function type %select{%2 |}1" @@ -6979,6 +7419,26 @@ def err_compound_qualified_function_type : Error< def err_qualified_function_typeid : Error< "type operand %0 of 'typeid' cannot have '%1' qualifier">; +def err_cxx20_deducing_this : Error< + "explicit object parameters are incompatible with C++ standards before C++2b">; +def err_explicit_object_default_arg: Error< + "the explicit object parameter cannot have a default argument">; +def err_explicit_object_parameter_pack: Error< + "the explicit object parameter cannot be a function parameter pack">; +def err_explicit_object_parameter_must_be_first: Error< + "an explicit object parameter can only appear as the first parameter " + "of the %select{function|lambda}0">; +def err_explicit_object_parameter_nonmember: Error< + "an explicit object parameter cannot appear in a " + "%select{static|virtual|non-member}0 %select{function|lambda}1">; +def err_explicit_object_parameter_constructor: Error< + "an explicit object parameter cannot appear in a %select{constructor|destructor}0">; +def err_explicit_object_parameter_mutable: Error< + "a lambda with an explicit object parameter cannot be mutable">; +def err_invalid_explicit_object_type_in_lambda: Error< + "invalid explicit object parameter type %0 in lambda with capture; " + "the type must be the same as, or derived from, the lambda">; + def err_ref_qualifier_overload : Error< "cannot overload a member function %select{without a ref-qualifier|with " "ref-qualifier '&'|with ref-qualifier '&&'}0 with a member function %select{" @@ -7064,11 +7524,11 @@ def err_duplicate_property : Error< "property has a previous declaration">; def ext_gnu_void_ptr : Extension< "arithmetic on%select{ a|}0 pointer%select{|s}0 to void is a GNU extension">, - InGroup<PointerArith>; + InGroup<GNUPointerArith>; def ext_gnu_ptr_func_arith : Extension< "arithmetic on%select{ a|}0 pointer%select{|s}0 to%select{ the|}2 function " "type%select{|s}2 %1%select{| and %3}2 is a GNU extension">, - InGroup<PointerArith>; + InGroup<GNUPointerArith>; def err_readonly_message_assignment : Error< "assigning to 'readonly' return result of an Objective-C message not allowed">; def ext_integer_increment_complex : Extension< @@ -7174,6 +7634,8 @@ def err_attribute_arm_builtin_alias : Error< "'__clang_arm_builtin_alias' attribute can only be applied to an ARM builtin">; def err_attribute_arm_mve_polymorphism : Error< "'__clang_arm_mve_strict_polymorphism' attribute can only be applied to an MVE/NEON vector type">; +def err_attribute_webassembly_funcref : Error< + "'__funcref' attribute can only be applied to a function pointer type">; def warn_setter_getter_impl_required : Warning< "property %0 requires method %1 to be defined - " @@ -7314,8 +7776,6 @@ def err_bad_dynamic_cast_not_polymorphic : Error<"%0 is not polymorphic">; // Other C++ expressions def err_need_header_before_typeid : Error< "you need to include <typeinfo> before using the 'typeid' operator">; -def err_need_header_before_ms_uuidof : Error< - "you need to include <guiddef.h> before using the '__uuidof' operator">; def err_need_header_before_placement_new : Error< "no matching %0 function for non-allocating placement new expression; " "include <new>">; @@ -7413,17 +7873,20 @@ def note_member_declared_here : Note< "member %0 declared here">; def note_member_first_declared_here : Note< "member %0 first declared here">; +def warn_bitwise_instead_of_logical : Warning< + "use of bitwise '%0' with boolean operands">, + InGroup<BitwiseInsteadOfLogical>, DefaultIgnore; def warn_bitwise_negation_bool : Warning< "bitwise negation of a boolean expression%select{;| always evaluates to 'true';}0 " "did you mean logical negation?">, - InGroup<DiagGroup<"bool-operation">>; + InGroup<BoolOperation>, DefaultIgnore; def err_decrement_bool : Error<"cannot decrement expression of type bool">; def warn_increment_bool : Warning< "incrementing expression of type bool is deprecated and " "incompatible with C++17">, InGroup<DeprecatedIncrementBool>; def ext_increment_bool : ExtWarn< "ISO C++17 does not allow incrementing expression of type bool">, - DefaultError, InGroup<IncrementBool>; + DefaultError, SFINAEFailure, InGroup<IncrementBool>; def err_increment_decrement_enum : Error< "cannot %select{decrement|increment}0 expression of enum type %1">; @@ -7433,9 +7896,6 @@ def warn_deprecated_increment_decrement_volatile : Warning< def warn_deprecated_simple_assign_volatile : Warning< "use of result of assignment to object of volatile-qualified type %0 " "is deprecated">, InGroup<DeprecatedVolatile>; -def warn_deprecated_compound_assign_volatile : Warning< - "compound assignment to object of volatile-qualified type %0 is deprecated">, - InGroup<DeprecatedVolatile>; def warn_deprecated_volatile_return : Warning< "volatile-qualified return type %0 is deprecated">, InGroup<DeprecatedVolatile>; @@ -7452,6 +7912,12 @@ def warn_deprecated_altivec_src_compat : Warning< "'-altivec-compat=xl' option">, InGroup<DiagGroup<"deprecated-altivec-src-compat">>; +def warn_deprecated_lax_vec_conv_all : Warning< + "Implicit conversion between vector types ('%0' and '%1') is deprecated. " + "In the future, the behavior implied by '-fno-lax-vector-conversions' " + "will be the default.">, + InGroup<DiagGroup<"deprecate-lax-vec-conv-all">>; + def err_catch_incomplete_ptr : Error< "cannot catch pointer to incomplete type %0">; def err_catch_incomplete_ref : Error< @@ -7490,7 +7956,8 @@ def note_throw_in_function : Note<"function declared non-throwing here">; def err_seh_try_outside_functions : Error< "cannot use SEH '__try' in blocks, captured regions, or Obj-C method decls">; def err_mixing_cxx_try_seh_try : Error< - "cannot use C++ 'try' in the same function as SEH '__try'">; + "cannot use %select{C++ 'try'|Objective-C '@try'}0 " + "in the same function as SEH '__try'">; def err_seh_try_unsupported : Error< "SEH '__try' is not supported on this target">; def note_conflicting_try_here : Note< @@ -7528,6 +7995,8 @@ def warn_overaligned_type : Warning< "type %0 requires %1 bytes of alignment and the default allocator only " "guarantees %2 bytes">, InGroup<OveralignedType>, DefaultIgnore; +def err_array_element_alignment : Error< + "size of array element of type %0 (%1 bytes) isn't a multiple of its alignment (%2 bytes)">; def err_aligned_allocation_unavailable : Error< "aligned %select{allocation|deallocation}0 function of type '%1' is " "%select{only|not}4 available on %2%select{ %3 or newer|}4">; @@ -7578,6 +8047,8 @@ def err_return_in_constructor_handler : Error< def warn_cdtor_function_try_handler_mem_expr : Warning< "cannot refer to a non-static member from the handler of a " "%select{constructor|destructor}0 function try block">, InGroup<Exceptions>; +def err_throw_object_throwing_dtor : Error< + "cannot throw object of type %0 with a potentially-throwing destructor">; let CategoryName = "Lambda Issue" in { def err_capture_more_than_once : Error< @@ -7688,7 +8159,7 @@ let CategoryName = "Lambda Issue" in { "is a C++20 extension">, InGroup<CXX20>; def warn_deprecated_this_capture : Warning< "implicit capture of 'this' with a capture default of '=' is deprecated">, - InGroup<DeprecatedThisCapture>, DefaultIgnore; + InGroup<DeprecatedThisCapture>; def note_deprecated_this_capture : Note< "add an explicit capture of 'this' to capture '*this' by reference">; @@ -7755,6 +8226,11 @@ def err_expected_class_or_namespace : Error<"%0 is not a class" "%select{ or namespace|, namespace, or enumeration}1">; def err_invalid_declarator_scope : Error<"cannot define or redeclare %0 here " "because namespace %1 does not enclose namespace %2">; +def err_export_non_namespace_scope_name : Error< + "cannot export %0 as it is not at namespace scope">; +def err_redeclaration_non_exported : Error < + "cannot export redeclaration %0 here since the previous declaration " + "%select{is not exported|has internal linkage|has module linkage}1">; def err_invalid_declarator_global_scope : Error< "definition or redeclaration of %0 cannot name the global scope">; def err_invalid_declarator_in_function : Error< @@ -7870,24 +8346,6 @@ def err_incompatible_qualified_id : Error< "sending type to parameter of incompatible type}0,1" "|%diff{casting $ to incompatible type $|" "casting type to incompatible type}0,1}2">; -def ext_typecheck_convert_pointer_int : ExtWarn< - "incompatible pointer to integer conversion " - "%select{%diff{assigning to $ from $|assigning to different types}0,1" - "|%diff{passing $ to parameter of type $|" - "passing to parameter of different type}0,1" - "|%diff{returning $ from a function with result type $|" - "returning from function with different return type}0,1" - "|%diff{converting $ to type $|converting between types}0,1" - "|%diff{initializing $ with an expression of type $|" - "initializing with expression of different type}0,1" - "|%diff{sending $ to parameter of type $|" - "sending to parameter of different type}0,1" - "|%diff{casting $ to type $|casting between types}0,1}2" - "%select{|; dereference with *|" - "; take the address with &|" - "; remove *|" - "; remove &}3">, - InGroup<IntConversion>; def err_typecheck_convert_pointer_int : Error< "incompatible pointer to integer conversion " "%select{%diff{assigning to $ from $|assigning to different types}0,1" @@ -7905,24 +8363,9 @@ def err_typecheck_convert_pointer_int : Error< "; take the address with &|" "; remove *|" "; remove &}3">; -def ext_typecheck_convert_int_pointer : ExtWarn< - "incompatible integer to pointer conversion " - "%select{%diff{assigning to $ from $|assigning to different types}0,1" - "|%diff{passing $ to parameter of type $|" - "passing to parameter of different type}0,1" - "|%diff{returning $ from a function with result type $|" - "returning from function with different return type}0,1" - "|%diff{converting $ to type $|converting between types}0,1" - "|%diff{initializing $ with an expression of type $|" - "initializing with expression of different type}0,1" - "|%diff{sending $ to parameter of type $|" - "sending to parameter of different type}0,1" - "|%diff{casting $ to type $|casting between types}0,1}2" - "%select{|; dereference with *|" - "; take the address with &|" - "; remove *|" - "; remove &}3">, - InGroup<IntConversion>, SFINAEFailure; +def ext_typecheck_convert_pointer_int : ExtWarn< + err_typecheck_convert_pointer_int.Summary>, + InGroup<IntConversion>, DefaultError; def err_typecheck_convert_int_pointer : Error< "incompatible integer to pointer conversion " "%select{%diff{assigning to $ from $|assigning to different types}0,1" @@ -7940,6 +8383,9 @@ def err_typecheck_convert_int_pointer : Error< "; take the address with &|" "; remove *|" "; remove &}3">; +def ext_typecheck_convert_int_pointer : ExtWarn< + err_typecheck_convert_int_pointer.Summary>, + InGroup<IntConversion>, DefaultError; def ext_typecheck_convert_pointer_void_func : Extension< "%select{%diff{assigning to $ from $|assigning to different types}0,1" "|%diff{passing $ to parameter of type $|" @@ -7982,7 +8428,7 @@ def ext_typecheck_convert_incompatible_pointer_sign : ExtWarn< "where one is of the unique plain 'char' type and the other is not}3">, InGroup<DiagGroup<"pointer-sign">>; def err_typecheck_convert_incompatible_pointer_sign : - Error<ext_typecheck_convert_incompatible_pointer_sign.Text>; + Error<ext_typecheck_convert_incompatible_pointer_sign.Summary>; def ext_typecheck_convert_incompatible_pointer : ExtWarn< "incompatible pointer types " "%select{%diff{assigning to $ from $|assigning to different types}0,1" @@ -8018,24 +8464,6 @@ def err_typecheck_convert_incompatible_pointer : Error< "; take the address with &|" "; remove *|" "; remove &}3">; -def ext_typecheck_convert_incompatible_function_pointer : ExtWarn< - "incompatible function pointer types " - "%select{%diff{assigning to $ from $|assigning to different types}0,1" - "|%diff{passing $ to parameter of type $|" - "passing to parameter of different type}0,1" - "|%diff{returning $ from a function with result type $|" - "returning from function with different return type}0,1" - "|%diff{converting $ to type $|converting between types}0,1" - "|%diff{initializing $ with an expression of type $|" - "initializing with expression of different type}0,1" - "|%diff{sending $ to parameter of type $|" - "sending to parameter of different type}0,1" - "|%diff{casting $ to type $|casting between types}0,1}2" - "%select{|; dereference with *|" - "; take the address with &|" - "; remove *|" - "; remove &}3">, - InGroup<IncompatibleFunctionPointerTypes>; def err_typecheck_convert_incompatible_function_pointer : Error< "incompatible function pointer types " "%select{%diff{assigning to $ from $|assigning to different types}0,1" @@ -8053,6 +8481,12 @@ def err_typecheck_convert_incompatible_function_pointer : Error< "; take the address with &|" "; remove *|" "; remove &}3">; +def ext_typecheck_convert_incompatible_function_pointer : ExtWarn< + err_typecheck_convert_incompatible_function_pointer.Summary>, + InGroup<IncompatibleFunctionPointerTypes>, DefaultError; +def warn_typecheck_convert_incompatible_function_pointer_strict : Warning< + err_typecheck_convert_incompatible_function_pointer.Summary>, + InGroup<DiagGroup<"incompatible-function-pointer-types-strict">>, DefaultIgnore; def ext_typecheck_convert_discards_qualifiers : ExtWarn< "%select{%diff{assigning to $ from $|assigning to different types}0,1" "|%diff{passing $ to parameter of type $|" @@ -8228,53 +8662,65 @@ def err_call_function_incomplete_return : Error< def err_call_incomplete_argument : Error< "argument type %0 is incomplete">; def err_typecheck_call_too_few_args : Error< - "too few %select{|||execution configuration }0arguments to " + "too few %select{|||execution configuration }0" + "%select{|non-object }3arguments to " "%select{function|block|method|kernel function}0 call, " "expected %1, have %2">; def err_typecheck_call_too_few_args_one : Error< - "too few %select{|||execution configuration }0arguments to " + "too few %select{|||execution configuration }0" + "%select{|non-object }2arguments to " "%select{function|block|method|kernel function}0 call, " "single argument %1 was not specified">; def err_typecheck_call_too_few_args_at_least : Error< - "too few %select{|||execution configuration }0arguments to " + "too few %select{|||execution configuration }0" + "%select{|non-object }3arguments to " "%select{function|block|method|kernel function}0 call, " "expected at least %1, have %2">; def err_typecheck_call_too_few_args_at_least_one : Error< - "too few %select{|||execution configuration }0arguments to " + "too few %select{|||execution configuration }0" + "%select{|non-object }2arguments to " "%select{function|block|method|kernel function}0 call, " "at least argument %1 must be specified">; def err_typecheck_call_too_few_args_suggest : Error< - "too few %select{|||execution configuration }0arguments to " + "too few %select{|||execution configuration }0" + "%select{|non-object }3arguments to " "%select{function|block|method|kernel function}0 call, " - "expected %1, have %2; did you mean %3?">; + "expected %1, have %2; did you mean %4?">; def err_typecheck_call_too_few_args_at_least_suggest : Error< - "too few %select{|||execution configuration }0arguments to " + "too few %select{|||execution configuration }0" + "%select{|non-object }3arguments to " "%select{function|block|method|kernel function}0 call, " - "expected at least %1, have %2; did you mean %3?">; + "expected at least %1, have %2; did you mean %4?">; def err_typecheck_call_too_many_args : Error< - "too many %select{|||execution configuration }0arguments to " + "too many %select{|||execution configuration }0" + "%select{|non-object }3arguments to " "%select{function|block|method|kernel function}0 call, " "expected %1, have %2">; def err_typecheck_call_too_many_args_one : Error< - "too many %select{|||execution configuration }0arguments to " + "too many %select{|||execution configuration }0" + "%select{|non-object }3arguments to " "%select{function|block|method|kernel function}0 call, " "expected single argument %1, have %2 arguments">; def err_typecheck_call_too_many_args_at_most : Error< - "too many %select{|||execution configuration }0arguments to " + "too many %select{|||execution configuration }0" + "%select{|non-object }3arguments to " "%select{function|block|method|kernel function}0 call, " "expected at most %1, have %2">; def err_typecheck_call_too_many_args_at_most_one : Error< "too many %select{|||execution configuration }0arguments to " "%select{function|block|method|kernel function}0 call, " - "expected at most single argument %1, have %2 arguments">; + "expected at most single %select{|non-object }3argument %1, " + "have %2%select{|non-object}3 arguments">; def err_typecheck_call_too_many_args_suggest : Error< - "too many %select{|||execution configuration }0arguments to " + "too many %select{|||execution configuration }0" + "%select{|non-object }3arguments to " "%select{function|block|method|kernel function}0 call, " - "expected %1, have %2; did you mean %3?">; + "expected %1, have %2; did you mean %4?">; def err_typecheck_call_too_many_args_at_most_suggest : Error< - "too many %select{|||execution configuration }0arguments to " + "too many %select{|||execution configuration }0" + "%select{|non-object }3arguments to " "%select{function|block|method|kernel function}0 call, " - "expected at most %1, have %2; did you mean %3?">; + "expected at most %1, have %2; did you mean %4?">; def err_arc_typecheck_convert_incompatible_pointer : Error< "incompatible pointer types passing retainable parameter of type %0" @@ -8302,8 +8748,8 @@ def err_atomic_exclusive_builtin_pointer_size : Error< " 1,2,4 or 8 byte type (%0 invalid)">; def err_atomic_builtin_ext_int_size : Error< "Atomic memory operand must have a power-of-two size">; -def err_atomic_builtin_ext_int_prohibit : Error< - "argument to atomic builtin of type '_ExtInt' is not supported">; +def err_atomic_builtin_bit_int_prohibit : Error< + "argument to atomic builtin of type '_BitInt' is not supported">; def err_atomic_op_needs_atomic : Error< "address argument to atomic operation must be a pointer to _Atomic " "type (%0 invalid)">; @@ -8322,11 +8768,14 @@ def err_atomic_op_needs_atomic_int_ptr_or_fp : Error< def err_atomic_op_needs_atomic_int_or_ptr : Error< "address argument to atomic operation must be a pointer to %select{|atomic }0" "integer or pointer (%1 invalid)">; +def err_atomic_op_needs_atomic_int_or_fp : Error< + "address argument to atomic operation must be a pointer to %select{|atomic }0" + "integer or supported floating point type (%1 invalid)">; def err_atomic_op_needs_atomic_int : Error< "address argument to atomic operation must be a pointer to " "%select{|atomic }0integer (%1 invalid)">; def warn_atomic_op_has_invalid_memory_order : Warning< - "memory order argument to atomic operation is invalid">, + "%select{|success |failure }0memory order argument to atomic operation is invalid">, InGroup<DiagGroup<"atomic-memory-ordering">>; def err_atomic_op_has_invalid_synch_scope : Error< "synchronization scope argument to atomic operation is invalid">; @@ -8335,13 +8784,22 @@ def warn_atomic_implicit_seq_cst : Warning< InGroup<DiagGroup<"atomic-implicit-seq-cst">>, DefaultIgnore; def err_overflow_builtin_must_be_int : Error< - "operand argument to overflow builtin must be an integer (%0 invalid)">; + "operand argument to %select{overflow builtin|checked integer operation}0 " + "must be an integer type %select{|other than plain 'char', 'bool', bit-precise, " + "or an enumeration }0(%1 invalid)">; def err_overflow_builtin_must_be_ptr_int : Error< - "result argument to overflow builtin must be a pointer " - "to a non-const integer (%0 invalid)">; -def err_overflow_builtin_ext_int_max_size : Error< - "__builtin_mul_overflow does not support signed _ExtInt operands of more " + "result argument to %select{overflow builtin|checked integer operation}0 " + "must be a pointer to a non-const integer type %select{|other than plain 'char', " + "'bool', bit-precise, or an enumeration }0(%1 invalid)">; +def err_overflow_builtin_bit_int_max_size : Error< + "__builtin_mul_overflow does not support 'signed _BitInt' operands of more " "than %0 bits">; +def err_expected_struct_pointer_argument : Error< + "expected pointer to struct as %ordinal0 argument to %1, found %2">; +def err_expected_callable_argument : Error< + "expected a callable expression as %ordinal0 argument to %1, found %2">; +def note_building_builtin_dump_struct_call : Note< + "in call to printing function with arguments '(%0)' while dumping struct">; def err_atomic_load_store_uses_lib : Error< "atomic %select{load|store}0 requires runtime support that is not " @@ -8380,8 +8838,10 @@ def err_ref_bad_target_global_initializer : Error< "function %1 in global initializer">; def err_capture_bad_target : Error< "capture host variable %0 by reference in device or host device lambda function">; -def err_capture_bad_target_this_ptr : Error< - "capture host side class data member by this pointer in device or host device lambda function">; +def warn_maybe_capture_bad_target_this_ptr : Warning< + "capture host side class data member by this pointer in device or host device lambda function " + "may result in invalid memory access if this pointer is not accessible on device side">, + InGroup<DiagGroup<"gpu-maybe-wrong-side">>; def warn_kern_is_method : Extension< "kernel function %0 is a member function; this may not be accepted by nvcc">, InGroup<CudaCompat>; @@ -8391,8 +8851,8 @@ def warn_kern_is_inline : Warning< def err_variadic_device_fn : Error< "CUDA device code does not support variadic functions">; def err_va_arg_in_device : Error< - "CUDA device code does not support va_arg">; -def err_alias_not_supported_on_nvptx : Error<"CUDA does not support aliases">; +"CUDA device code does not support va_arg">; +def err_alias_not_supported_on_nvptx : Error<"CUDA older than 10.0 does not support .alias">; def err_cuda_unattributed_constexpr_cannot_overload_device : Error< "constexpr function %0 without __host__ or __device__ attributes cannot " "overload __device__ function with same signature. Add a __host__ " @@ -8441,6 +8901,10 @@ def note_cuda_device_builtin_surftex_should_be_template_class : Note< def err_hip_invalid_args_builtin_mangled_name : Error< "invalid argument: symbol must be a device-side function or global variable">; +def warn_hip_omp_target_directives : Warning< + "HIP does not support OpenMP target directives; directive has been ignored">, + InGroup<HIPOpenMPOffloading>, DefaultError; + def warn_non_pod_vararg_with_format_string : Warning< "cannot pass %select{non-POD|non-trivial}0 object of type %1 to variadic " "%select{function|block|method|constructor}2; expected type from format " @@ -8527,10 +8991,13 @@ def warn_bad_function_cast : Warning< def warn_cast_function_type : Warning< "cast %diff{from $ to $ |}0,1converts to incompatible function type">, InGroup<CastFunctionType>, DefaultIgnore; +def warn_cast_function_type_strict : Warning<warn_cast_function_type.Summary>, + InGroup<CastFunctionTypeStrict>, DefaultIgnore; def err_cast_pointer_to_non_pointer_int : Error< "pointer cannot be cast to type %0">; -def err_cast_to_bfloat16 : Error<"cannot type-cast to __bf16">; -def err_cast_from_bfloat16 : Error<"cannot type-cast from __bf16">; +def err_nullptr_cast : Error< + "cannot cast an object of type %select{'nullptr_t' to %1|%1 to 'nullptr_t'}0" +>; def err_typecheck_expect_scalar_operand : Error< "operand of type %0 where arithmetic or pointer type is required">; def err_typecheck_cond_incompatible_operands : Error< @@ -8540,6 +9007,10 @@ def err_typecheck_expect_flt_or_vector : Error< "a vector of such types is required">; def err_cast_selector_expr : Error< "cannot type cast @selector expression">; +def err_make_signed_integral_only : Error< + "'%select{make_unsigned|make_signed}0' is only compatible with " + "non-%select{bool|_BitInt(1)}1 integers and enum types, but was given " + "%2%select{| whose underlying type is %4}3">; def ext_typecheck_cond_incompatible_pointers : ExtWarn< "pointer type mismatch%diff{ ($ and $)|}0,1">, InGroup<DiagGroup<"pointer-type-mismatch">>; @@ -8551,6 +9022,9 @@ def err_typecheck_choose_expr_requires_constant : Error< "'__builtin_choose_expr' requires a constant expression">; def warn_unused_expr : Warning<"expression result unused">, InGroup<UnusedValue>; +def warn_unused_comma_left_operand : Warning< + "left operand of comma operator has no effect">, + InGroup<UnusedValue>; def warn_unused_voidptr : Warning< "expression result unused; should this cast be to 'void'?">, InGroup<UnusedValue>; @@ -8581,16 +9055,20 @@ def warn_unused_result : Warning< def warn_unused_result_msg : Warning< "ignoring return value of function declared with %0 attribute: %1">, InGroup<UnusedResult>; +def warn_unused_result_typedef_unsupported_spelling : Warning< + "'[[%select{nodiscard|gnu::warn_unused_result}0]]' attribute ignored when " + "applied to a typedef; consider using '__attribute__((warn_unused_result))' " + "or '[[clang::warn_unused_result]]' instead">, InGroup<IgnoredAttributes>; def warn_unused_volatile : Warning< "expression result unused; assign into a variable to force a volatile load">, InGroup<DiagGroup<"unused-volatile-lvalue">>; def ext_cxx14_attr : Extension< - "use of the %0 attribute is a C++14 extension">, InGroup<CXX14>; + "use of the %0 attribute is a C++14 extension">, InGroup<CXX14Attrs>; def ext_cxx17_attr : Extension< - "use of the %0 attribute is a C++17 extension">, InGroup<CXX17>; + "use of the %0 attribute is a C++17 extension">, InGroup<CXX17Attrs>; def ext_cxx20_attr : Extension< - "use of the %0 attribute is a C++20 extension">, InGroup<CXX20>; + "use of the %0 attribute is a C++20 extension">, InGroup<CXX20Attrs>; def warn_unused_comparison : Warning< "%select{equality|inequality|relational|three-way}0 comparison result unused">, @@ -8654,6 +9132,9 @@ def warn_redefine_extname_not_applied : Warning< // inline asm. let CategoryName = "Inline Assembly Issue" in { + def err_asm_pmf_through_constraint_not_permitted + : Error<"cannot pass a pointer-to-member through register-constrained " + "inline assembly parameter">; def err_asm_invalid_lvalue_in_output : Error<"invalid lvalue in asm output">; def err_asm_invalid_output_constraint : Error< "invalid output constraint '%0' in asm">; @@ -8688,6 +9169,8 @@ let CategoryName = "Inline Assembly Issue" in { " in asm %select{input|output}1 with a memory constraint '%2'">; def err_asm_input_duplicate_match : Error< "more than one input constraint matches the same output '%0'">; + def err_store_value_to_reg : Error< + "impossible constraint in asm: can't store value into a register">; def warn_asm_label_on_auto_decl : Warning< "ignored asm label '%0' on automatic variable">; @@ -8857,6 +9340,14 @@ def ext_ms_anonymous_record : ExtWarn< def err_reference_to_local_in_enclosing_context : Error< "reference to local %select{variable|binding}1 %0 declared in enclosing " "%select{%3|block literal|lambda expression|context}2">; +def err_capture_binding_openmp : Error< + "capturing a structured binding is not yet supported in OpenMP">; +def ext_capture_binding : ExtWarn< + "captured structured bindings are a C++20 extension">, InGroup<CXX20>; +def warn_cxx17_compat_capture_binding : Warning< + "captured structured bindings are incompatible with " + "C++ standards before C++20">, + InGroup<CXXPre20Compat>, DefaultIgnore; def err_static_data_member_not_allowed_in_local_class : Error< "static data member %0 not allowed in local %sub{select_tag_type_kind}2 %1">; @@ -8910,10 +9401,22 @@ def err_operator_overload_needs_class_or_enum : Error< "or enumeration type">; def err_operator_overload_variadic : Error<"overloaded %0 cannot be variadic">; +def warn_cxx20_compat_operator_overload_static : Warning< + "declaring overloaded %0 as 'static' is incompatible with C++ standards " + "before C++23">, InGroup<CXXPre23Compat>, DefaultIgnore; +def ext_operator_overload_static : ExtWarn< + "declaring overloaded %0 as 'static' is a C++23 extension">, InGroup<CXX23>; def err_operator_overload_static : Error< "overloaded %0 cannot be a static member function">; def err_operator_overload_default_arg : Error< "parameter of overloaded %0 cannot have a default argument">; + +def ext_subscript_overload : Warning< + "overloaded %0 with %select{no|a defaulted|more than one}1 parameter is a " + "C++23 extension">, InGroup<CXXPre23Compat>, DefaultIgnore; +def error_subscript_overload : Error< + "overloaded %0 cannot have %select{no|a defaulted|more than one}1 parameter before C++23">; + def err_operator_overload_must_be : Error< "overloaded %0 must be a %select{unary|binary|unary or binary}2 operator " "(has %1 parameter%s1)">; @@ -8989,8 +9492,8 @@ def ext_string_literal_operator_template : ExtWarn< "string literal operator templates are a GNU extension">, InGroup<GNUStringLiteralOperatorTemplate>; def warn_user_literal_reserved : Warning< - "user-defined literal suffixes not starting with '_' are reserved" - "%select{; no literal will invoke this operator|}0">, + "user-defined literal suffixes %select{<ERROR>|not starting with '_'|containing '__'}0 are reserved" + "%select{; no literal will invoke this operator|}1">, InGroup<UserDefinedLiterals>; // C++ conversion functions @@ -9038,10 +9541,10 @@ def warn_cxx98_compat_explicit_conversion_functions : Warning< // C++11 defaulted functions def err_defaulted_special_member_params : Error< - "an explicitly-defaulted %select{|copy |move }0constructor cannot " + "an explicitly-defaulted %sub{select_special_member_kind}0 cannot " "have default arguments">; def err_defaulted_special_member_variadic : Error< - "an explicitly-defaulted %select{|copy |move }0constructor cannot " + "an explicitly-defaulted %sub{select_special_member_kind}0 cannot " "be variadic">; def err_defaulted_special_member_return_type : Error< "explicitly-defaulted %select{copy|move}0 assignment operator must " @@ -9049,6 +9552,9 @@ def err_defaulted_special_member_return_type : Error< def err_defaulted_special_member_quals : Error< "an explicitly-defaulted %select{copy|move}0 assignment operator may not " "have 'const'%select{, 'constexpr'|}1 or 'volatile' qualifiers">; +def err_defaulted_special_member_explicit_object_mismatch : Error< + "the type of the explicit object parameter of an explicitly-defaulted " + "%select{copy|move}0 assignment operator should match the type of the class %1">; def err_defaulted_special_member_volatile_param : Error< "the parameter for an explicitly-defaulted %sub{select_special_member_kind}0 " "may not be volatile">; @@ -9065,12 +9571,16 @@ def err_defaulted_copy_assign_not_ref : Error< def err_incorrect_defaulted_constexpr : Error< "defaulted definition of %sub{select_special_member_kind}0 " "is not constexpr">; +def err_incorrect_defaulted_constexpr_with_vb: Error< + "%sub{select_special_member_kind}0 cannot be 'constexpr' in a class with virtual base class">; def err_incorrect_defaulted_consteval : Error< "defaulted declaration of %sub{select_special_member_kind}0 " "cannot be consteval because implicit definition is not constexpr">; def warn_defaulted_method_deleted : Warning< "explicitly defaulted %sub{select_special_member_kind}0 is implicitly " "deleted">, InGroup<DefaultedFunctionDeleted>; +def note_replace_equals_default_to_delete : Note< + "replace 'default' with 'delete'">; def err_out_of_line_default_deletes : Error< "defaulting this %sub{select_special_member_kind}0 " "would delete it after its first declaration">; @@ -9100,15 +9610,22 @@ def warn_cxx17_compat_defaulted_comparison : Warning< "before C++20">, InGroup<CXXPre20Compat>, DefaultIgnore; def err_defaulted_comparison_template : Error< "comparison operator template cannot be defaulted">; -def err_defaulted_comparison_out_of_class : Error< - "%sub{select_defaulted_comparison_kind}0 can only be defaulted in a class " - "definition">; +def err_defaulted_comparison_num_args : Error< + "%select{non-member|member}0 %sub{select_defaulted_comparison_kind}1" + " must have %select{2|1}0 parameters">; def err_defaulted_comparison_param : Error< "invalid parameter type for defaulted %sub{select_defaulted_comparison_kind}0" "; found %1, expected %2%select{| or %4}3">; +def err_defaulted_comparison_param_unknown : Error< + "invalid parameter type for non-member defaulted" + " %sub{select_defaulted_comparison_kind}0" + "; found %1, expected class or reference to a constant class">; def err_defaulted_comparison_param_mismatch : Error< "parameters for defaulted %sub{select_defaulted_comparison_kind}0 " "must have the same type%diff{ (found $ vs $)|}1,2">; +def err_defaulted_comparison_not_friend : Error< + "%sub{select_defaulted_comparison_kind}0 is not a friend of" + " %select{|incomplete class }1%2">; def err_defaulted_comparison_non_const : Error< "defaulted member %sub{select_defaulted_comparison_kind}0 must be " "const-qualified">; @@ -9125,6 +9642,9 @@ def err_non_first_default_compare_deletes : Error< "defaulting %select{this %sub{select_defaulted_comparison_kind}1|" "the corresponding implicit 'operator==' for this defaulted 'operator<=>'}0 " "would delete it after its first declaration">; +def err_non_first_default_compare_in_class : Error< + "defaulting this %sub{select_defaulted_comparison_kind}0 " + "is not allowed because it was already declared outside the class">; def note_defaulted_comparison_union : Note< "defaulted %0 is implicitly deleted because " "%2 is a %select{union-like class|union}1 with variant members">; @@ -9142,14 +9662,18 @@ def note_defaulted_comparison_calls_deleted : Note< "defaulted %0 is implicitly deleted because it would invoke a deleted " "comparison function%select{| for member %2| for base class %2}1">; def note_defaulted_comparison_no_viable_function : Note< - "defaulted %0 is implicitly deleted because there is no viable three-way " - "comparison function for%select{| member| base class}1 %2">; + "defaulted %0 is implicitly deleted because there is no viable " + "%select{three-way comparison function|'operator=='}1 for " + "%select{|member |base class }2%3">; def note_defaulted_comparison_no_viable_function_synthesized : Note< "three-way comparison cannot be synthesized because there is no viable " "function for %select{'=='|'<'}0 comparison">; def note_defaulted_comparison_not_rewritten_callee : Note< "defaulted %0 is implicitly deleted because this non-rewritten comparison " "function would be the best match for the comparison">; +def note_defaulted_comparison_not_rewritten_conversion : Note< + "defaulted %0 is implicitly deleted because a builtin comparison function " + "using this conversion would be the best match for the comparison">; def note_defaulted_comparison_cannot_deduce : Note< "return type of defaulted 'operator<=>' cannot be deduced because " "return type %2 of three-way comparison for %select{|member|base class}0 %1 " @@ -9162,12 +9686,21 @@ def note_defaulted_comparison_cannot_deduce_undeduced_auto : Note< "%select{|member|base class}0 %1 declared here">; def note_defaulted_comparison_cannot_deduce_callee : Note< "selected 'operator<=>' for %select{|member|base class}0 %1 declared here">; -def err_incorrect_defaulted_comparison_constexpr : Error< +def ext_defaulted_comparison_constexpr_mismatch : Extension< "defaulted definition of %select{%sub{select_defaulted_comparison_kind}1|" - "three-way comparison operator}0 " - "cannot be declared %select{constexpr|consteval}2 because " - "%select{it|the corresponding implicit 'operator=='}0 " - "invokes a non-constexpr comparison function">; + "three-way comparison operator}0 that is " + "declared %select{constexpr|consteval}2 but" + "%select{|for which the corresponding implicit 'operator==' }0 " + "invokes a non-constexpr comparison function is a C++23 extension">, + InGroup<DiagGroup<"c++23-default-comp-relaxed-constexpr">>; +def warn_cxx23_compat_defaulted_comparison_constexpr_mismatch : Warning< + "defaulted definition of %select{%sub{select_defaulted_comparison_kind}1|" + "three-way comparison operator}0 that is " + "declared %select{constexpr|consteval}2 but" + "%select{|for which the corresponding implicit 'operator==' }0 " + "invokes a non-constexpr comparison function is incompatible with C++ " + "standards before C++23">, + InGroup<CXXPre23Compat>, DefaultIgnore; def note_defaulted_comparison_not_constexpr : Note< "non-constexpr comparison function would be used to compare " "%select{|member %1|base class %1}0">; @@ -9176,6 +9709,10 @@ def note_defaulted_comparison_not_constexpr_here : Note< def note_in_declaration_of_implicit_equality_comparison : Note< "while declaring the corresponding implicit 'operator==' " "for this defaulted 'operator<=>'">; +def err_volatile_comparison_operator : Error< + "defaulted comparison function must not be volatile">; +def err_ref_qualifier_comparison_operator : Error< + "ref-qualifier '&&' is not allowed on a defaulted comparison operator">; def ext_implicit_exception_spec_mismatch : ExtWarn< "function previously declared with an %select{explicit|implicit}0 exception " @@ -9186,15 +9723,14 @@ def warn_ptr_arith_precedes_bounds : Warning< "the pointer decremented by %0 refers before the beginning of the array">, InGroup<ArrayBoundsPointerArithmetic>, DefaultIgnore; def warn_ptr_arith_exceeds_bounds : Warning< - "the pointer incremented by %0 refers past the end of the array (that " - "contains %1 element%s2)">, + "the pointer incremented by %0 refers past the end of the array (that has type %1)">, InGroup<ArrayBoundsPointerArithmetic>, DefaultIgnore; def warn_array_index_precedes_bounds : Warning< "array index %0 is before the beginning of the array">, InGroup<ArrayBounds>; def warn_array_index_exceeds_bounds : Warning< - "array index %0 is past the end of the array (which contains %1 " - "element%s2)">, InGroup<ArrayBounds>; + "array index %0 is past the end of the array (that has type %1%select{|, cast to %3}2)">, + InGroup<ArrayBounds>; def warn_ptr_arith_exceeds_max_addressable_bounds : Warning< "the pointer incremented by %0 refers past the last possible element for an array in %1-bit " "address space containing %2-bit (%3-byte) elements (max possible %4 element%s5)">, @@ -9206,6 +9742,12 @@ def warn_array_index_exceeds_max_addressable_bounds : Warning< def note_array_declared_here : Note< "array %0 declared here">; +def warn_inconsistent_array_form : Warning< + "argument %0 of type %1 with mismatched bound">, + InGroup<ArrayParameter>, DefaultIgnore; +def note_previous_declaration_as : Note< + "previously declared as %0 here">; + def warn_printf_insufficient_data_args : Warning< "more '%%' conversions than data arguments">, InGroup<FormatInsufficientArgs>; def warn_printf_data_arg_not_used : Warning< @@ -9224,17 +9766,17 @@ def warn_format_conversion_argument_type_mismatch : Warning< "%select{type|underlying type}2 %1">, InGroup<Format>; def warn_format_conversion_argument_type_mismatch_pedantic : Extension< - warn_format_conversion_argument_type_mismatch.Text>, + warn_format_conversion_argument_type_mismatch.Summary>, InGroup<FormatPedantic>; def warn_format_conversion_argument_type_mismatch_confusion : Warning< - warn_format_conversion_argument_type_mismatch.Text>, + warn_format_conversion_argument_type_mismatch.Summary>, InGroup<FormatTypeConfusion>, DefaultIgnore; def warn_format_argument_needs_cast : Warning< "%select{values of type|enum values with underlying type}2 '%0' should not " "be used as format arguments; add an explicit cast to %1 instead">, InGroup<Format>; def warn_format_argument_needs_cast_pedantic : Warning< - warn_format_argument_needs_cast.Text>, + warn_format_argument_needs_cast.Summary>, InGroup<FormatPedantic>, DefaultIgnore; def warn_printf_positional_arg_exceeds_data_args : Warning < "data argument position '%0' exceeds the number of data arguments (%1)">, @@ -9305,6 +9847,9 @@ def warn_printf_ObjCflags_without_ObjCConversion: Warning< def warn_printf_invalid_objc_flag: Warning< "'%0' is not a valid object format flag">, InGroup<Format>; +def warn_printf_narg_not_supported : Warning< + "'%%n' specifier not supported on this platform">, + InGroup<Format>; def warn_scanf_scanlist_incomplete : Warning< "no closing ']' for '%%[' in scanf format string">, InGroup<Format>; @@ -9351,7 +9896,7 @@ def note_lambda_capture_initializer : Note< "%select{implicitly |}2captured%select{| by reference}3" "%select{%select{ due to use|}2 here|" " via initialization of lambda capture %0}1">; -def note_init_with_default_member_initalizer : Note< +def note_init_with_default_member_initializer : Note< "initializing field %0 with default member initializer">; // Check for initializing a member variable with the address or a reference to @@ -9410,10 +9955,10 @@ def warn_new_dangling_initializer_list : Warning< "will be destroyed at the end of the full-expression">, InGroup<DanglingInitializerList>; def warn_unsupported_lifetime_extension : Warning< - "sorry, lifetime extension of " + "lifetime extension of " "%select{temporary|backing array of initializer list}0 created " - "by aggregate initialization using default member initializer " - "is not supported; lifetime of %select{temporary|backing array}0 " + "by aggregate initialization using a default member initializer " + "is not yet supported; lifetime of %select{temporary|backing array}0 " "will end at the end of the full-expression">, InGroup<Dangling>; // For non-floating point, expressions of the form x == x or x != x @@ -9429,6 +9974,12 @@ def warn_comparison_bitwise_always : Warning< def warn_comparison_bitwise_or : Warning< "bitwise or with non-zero value always evaluates to true">, InGroup<TautologicalBitwiseCompare>, DefaultIgnore; +def warn_tautological_negation_and_compare: Warning< + "'&&' of a value and its negation always evaluates to false">, + InGroup<TautologicalNegationCompare>, DefaultIgnore; +def warn_tautological_negation_or_compare: Warning< + "'||' of a value and its negation always evaluates to true">, + InGroup<TautologicalNegationCompare>, DefaultIgnore; def warn_tautological_overlap_comparison : Warning< "overlapping comparisons always evaluate to %select{false|true}0">, InGroup<TautologicalOverlapCompare>, DefaultIgnore; @@ -9484,7 +10035,8 @@ def err_generic_sel_multi_match : Error< // Blocks def err_blocks_disable : Error<"blocks support disabled - compile with -fblocks" - " or %select{pick a deployment target that supports them|for OpenCL 2.0}0">; + " or %select{pick a deployment target that supports them|for OpenCL C 2.0" + " or OpenCL C 3.0 with __opencl_c_device_enqueue feature}0">; def err_block_returning_array_function : Error< "block cannot return %select{array|function}0 type %1">; @@ -9521,6 +10073,11 @@ def err_break_not_in_loop_or_switch : Error< def warn_loop_ctrl_binds_to_inner : Warning< "'%0' is bound to current loop, GCC binds it to the enclosing loop">, InGroup<GccCompat>; +def err_omp_bind_required_on_loop : Error< + "expected 'bind' clause for 'loop' construct without an enclosing OpenMP " + "construct">; +def err_omp_loop_reduction_clause : Error< + "'reduction' clause not allowed with '#pragma omp loop bind(teams)'">; def warn_break_binds_to_switch : Warning< "'break' is bound to loop, GCC binds it to switch">, InGroup<GccCompat>; @@ -9538,6 +10095,11 @@ def err_duplicate_case_differing_expr : Error< def warn_case_empty_range : Warning<"empty case range specified">; def warn_missing_case_for_condition : Warning<"no case matching constant switch condition '%0'">; +def err_loop_attr_conflict : Error< + "conflicting loop attribute %0">; +def err_attribute_power_of_two_in_range : Error< + "%0 attribute requires an integer argument which is a constant power of two " + "between %1 and %2 inclusive; provided argument was %3">; def warn_def_missing_case : Warning<"%plural{" "1:enumeration value %1 not explicitly handled in switch|" @@ -9552,6 +10114,8 @@ def warn_missing_case : Warning<"%plural{" "3:enumeration values %1, %2, and %3 not handled in switch|" ":%0 enumeration values not handled in switch: %1, %2, %3...}0">, InGroup<Switch>; +def warn_switch_default : Warning<"'switch' missing 'default' label">, + InGroup<SwitchDefault>, DefaultIgnore; def warn_unannotated_fallthrough : Warning< "unannotated fall-through between switch labels">, @@ -9570,9 +10134,6 @@ def err_fallthrough_attr_outside_switch : Error< "fallthrough annotation is outside switch statement">; def err_fallthrough_attr_invalid_placement : Error< "fallthrough annotation does not directly precede switch label">; -def warn_fallthrough_attr_unreachable : Warning< - "fallthrough annotation in unreachable code">, - InGroup<ImplicitFallthrough>, DefaultIgnore; def warn_unreachable_default : Warning< "default label in switch which covers all enumeration values">, @@ -9623,6 +10184,9 @@ def err_ms_va_start_used_in_sysv_function : Error< def warn_second_arg_of_va_start_not_last_named_param : Warning< "second argument to 'va_start' is not the last named parameter">, InGroup<Varargs>; +def warn_c17_compat_ellipsis_only_parameter : Warning< + "'...' as the only parameter of a function is incompatible with C standards " + "before C23">, DefaultIgnore, InGroup<CPre23Compat>; def warn_va_start_type_is_undefined : Warning< "passing %select{an object that undergoes default argument promotion|" "an object of reference type|a parameter declared with the 'register' " @@ -9668,10 +10232,6 @@ def warn_falloff_noreturn_function : Warning< InGroup<InvalidNoreturn>; def err_noreturn_block_has_return_expr : Error< "block declared 'noreturn' should not return">; -def err_noreturn_missing_on_first_decl : Error< - "function declared '[[noreturn]]' after its first declaration">; -def note_noreturn_missing_first_decl : Note< - "declaration missing '[[noreturn]]' attribute is here">; def err_carries_dependency_missing_on_first_decl : Error< "%select{function|parameter}0 declared '[[carries_dependency]]' " "after its first declaration">; @@ -9702,8 +10262,8 @@ def err_shufflevector_argument_too_large : Error< def err_convertvector_non_vector : Error< "first argument to __builtin_convertvector must be a vector">; -def err_convertvector_non_vector_type : Error< - "second argument to __builtin_convertvector must be a vector type">; +def err_builtin_non_vector_type : Error< + "%0 argument to %1 must be of vector type">; def err_convertvector_incompatible_vector : Error< "first two arguments to __builtin_convertvector must have the same number of elements">; @@ -9729,6 +10289,9 @@ def err_argument_invalid_range : Error< def warn_argument_invalid_range : Warning< "argument value %0 is outside the valid range [%1, %2]">, DefaultError, InGroup<DiagGroup<"argument-outside-range">>; +def warn_argument_undefined_behaviour : Warning< + "argument value %0 will result in undefined behaviour">, + InGroup<DiagGroup<"argument-undefined-behaviour">>; def err_argument_not_multiple : Error< "argument should be a multiple of %0">; def err_argument_not_power_of_2 : Error< @@ -9739,10 +10302,10 @@ def err_argument_not_shifted_byte_or_xxff : Error< "argument should be an 8-bit value shifted by a multiple of 8 bits, or in the form 0x??FF">; def err_argument_not_contiguous_bit_field : Error< "argument %0 value should represent a contiguous bit field">; -def err_rotation_argument_to_cadd - : Error<"argument should be the value 90 or 270">; -def err_rotation_argument_to_cmla - : Error<"argument should be the value 0, 90, 180 or 270">; +def err_rotation_argument_to_cadd : Error< + "argument should be the value 90 or 270">; +def err_rotation_argument_to_cmla : Error< + "argument should be the value 0, 90, 180 or 270">; def warn_neon_vector_initializer_non_portable : Warning< "vector initializers are not compatible with NEON intrinsics in big endian " "mode">, InGroup<DiagGroup<"nonportable-vector-initialization">>; @@ -9767,10 +10330,12 @@ def err_mips_builtin_requires_dspr2 : Error< "this builtin requires 'dsp r2' ASE, please use -mdspr2">; def err_mips_builtin_requires_msa : Error< "this builtin requires 'msa' ASE, please use -mmsa">; -def err_ppc_builtin_only_on_arch : Error< - "this builtin is only valid on POWER%0 or later CPUs">; +def err_ppc_builtin_requires_abi : Error< + "this builtin requires ABI -mabi=%0">; def err_ppc_invalid_use_mma_type : Error< "invalid use of PPC MMA type">; +def err_ppc_invalid_test_data_class_type : Error< + "expected a 'float', 'double' or '__float128' for the first argument">; def err_x86_builtin_invalid_rounding : Error< "invalid rounding argument">; def err_x86_builtin_invalid_scale : Error< @@ -9793,8 +10358,11 @@ def err_constant_integer_arg_type : Error< "argument to %0 must be a constant integer">; def ext_mixed_decls_code : Extension< - "ISO C90 forbids mixing declarations and code">, - InGroup<DiagGroup<"declaration-after-statement">>; + "mixing declarations and code is a C99 extension">, + InGroup<DeclarationAfterStatement>; +def warn_mixed_decls_code : Warning< + "mixing declarations and code is incompatible with standards before C99">, + InGroup<DeclarationAfterStatement>, DefaultIgnore; def err_non_local_variable_decl_in_for : Error< "declaration of non-local variable in 'for' loop">; @@ -9822,6 +10390,8 @@ def warn_duplicate_attribute_exact : Warning< def warn_duplicate_attribute : Warning< "attribute %0 is already applied with different arguments">, InGroup<IgnoredAttributes>; +def err_disallowed_duplicate_attribute : Error< + "attribute %0 cannot appear more than once on a declaration">; def warn_sync_fetch_and_nand_semantics_change : Warning< "the semantics of this intrinsic changed with GCC " @@ -9835,15 +10405,13 @@ def warn_receiver_forward_class : Warning< "receiver %0 is a forward class and corresponding @interface may not exist">, InGroup<ForwardClassReceiver>; def note_method_sent_forward_class : Note<"method %0 is used for the forward class">; -def ext_missing_declspec : ExtWarn< - "declaration specifier missing, defaulting to 'int'">; def ext_missing_type_specifier : ExtWarn< - "type specifier missing, defaults to 'int'">, - InGroup<ImplicitInt>; + "type specifier missing, defaults to 'int'; ISO C99 and later do not support " + "implicit int">, InGroup<ImplicitInt>; +def err_missing_type_specifier : Error< + "a type specifier is required for all declarations">; def err_decimal_unsupported : Error< "GNU decimal type extension not supported">; -def err_missing_type_specifier : Error< - "C++ requires a type specifier for all declarations">; def err_objc_array_of_interfaces : Error< "array of interface %0 is invalid (probably should be an array of pointers)">; def ext_c99_array_usage : Extension< @@ -9866,9 +10434,9 @@ def err_nserrordomain_wrong_type : Error< "domain argument %0 does not point to an NSString or CFString constant">; def warn_nsconsumed_attribute_mismatch : Warning< - err_nsconsumed_attribute_mismatch.Text>, InGroup<NSConsumedMismatch>; + err_nsconsumed_attribute_mismatch.Summary>, InGroup<NSConsumedMismatch>; def warn_nsreturns_retained_attribute_mismatch : Warning< - err_nsreturns_retained_attribute_mismatch.Text>, InGroup<NSReturnsMismatch>; + err_nsreturns_retained_attribute_mismatch.Summary>, InGroup<NSReturnsMismatch>; def note_getter_unavailable : Note< "or because setter is declared here, but no getter method %0 is found">; @@ -10036,8 +10604,6 @@ def err_opencl_scalar_type_rank_greater_than_vector_type : Error< "element. (%0 and %1)">; def err_bad_kernel_param_type : Error< "%0 cannot be used as the type of a kernel parameter">; -def err_opencl_implicit_function_decl : Error< - "implicit declaration of function %0 is invalid in OpenCL">; def err_record_with_pointers_kernel_param : Error< "%select{struct|union}0 kernel parameters may not contain pointers">; def note_within_field_of_type : Note< @@ -10071,8 +10637,8 @@ def err_reference_pipe_type : Error < def err_opencl_no_main : Error<"%select{function|kernel}0 cannot be called 'main'">; def err_opencl_kernel_attr : Error<"attribute %0 can only be applied to an OpenCL kernel function">; -def err_opencl_return_value_with_address_space : Error< - "return value cannot be qualified with address space">; +def err_return_value_with_address_space : Error< + "return type cannot be qualified with address space">; def err_opencl_constant_no_init : Error< "variable in constant address space must be initialized">; def err_opencl_atomic_init: Error< @@ -10091,8 +10657,7 @@ def err_opencl_type_can_only_be_used_as_function_parameter : Error < def err_opencl_type_not_found : Error< "%0 type %1 not found; include the base header with -finclude-default-header">; def warn_opencl_attr_deprecated_ignored : Warning < - "%0 attribute is deprecated and ignored in OpenCL version %1">, - InGroup<IgnoredAttributes>; + "%0 attribute is deprecated and ignored in %1">, InGroup<IgnoredAttributes>; def err_opencl_variadic_function : Error< "invalid prototype, variadic arguments are not allowed in OpenCL">; def err_opencl_requires_extension : Error< @@ -10157,7 +10722,7 @@ def err_opencl_builtin_expected_type : Error< // OpenCL v3.0 s6.3.7 - Vector Components def ext_opencl_ext_vector_type_rgba_selector: ExtWarn< - "vector component name '%0' is an OpenCL C version 3.0 feature">, + "vector component name '%0' is a feature from OpenCL version 3.0 onwards">, InGroup<OpenCLUnsupportedRGBA>; def err_openclcxx_placement_new : Error< @@ -10167,6 +10732,11 @@ def err_openclcxx_placement_new : Error< def warn_mig_server_routine_does_not_return_kern_return_t : Warning< "'mig_server_routine' attribute only applies to routines that return a kern_return_t">, InGroup<IgnoredAttributes>; + +def warn_imp_cast_drops_unaligned : Warning< + "implicit cast from type %0 to type %1 drops __unaligned qualifier">, + InGroup<DiagGroup<"unaligned-qualifier-implicit-cast">>; + } // end of sema category let CategoryName = "OpenMP Issue" in { @@ -10196,10 +10766,20 @@ def err_omp_lastprivate_incomplete_type : Error< "a lastprivate variable with incomplete type %0">; def err_omp_reduction_incomplete_type : Error< "a reduction list item with incomplete type %0">; +def warn_omp_minus_in_reduction_deprecated : Warning< + "minus(-) operator for reductions is deprecated; use + or user defined reduction instead">, + InGroup<Deprecated>; def err_omp_unexpected_clause_value : Error< "expected %0 in OpenMP clause '%1'">; +def err_omp_unexpected_call_to_omp_runtime_api + : Error<"calls to OpenMP runtime API are not allowed within a region that " + "corresponds to a construct with an order clause that specifies " + "concurrent">; def err_omp_expected_var_name_member_expr : Error< "expected variable name%select{| or data member of current class}0">; +def err_omp_expected_var_name_member_expr_with_type : Error< + "expected variable%select{| or static data member|, static data member, " + "or non-static data member of current class}0 of type '%1'">; def err_omp_expected_var_name_member_expr_or_array_item : Error< "expected variable name%select{|, data member of current class}0, array element or array section">; def err_omp_expected_addressable_lvalue_or_array_item : Error< @@ -10353,9 +10933,12 @@ def err_omp_simd_region_cannot_use_stmt : Error< def warn_omp_loop_64_bit_var : Warning< "OpenMP loop iteration variable cannot have more than 64 bits size and will be narrowed">, InGroup<OpenMPLoopForm>; -def err_omp_unknown_reduction_identifier : Error< +def err_omp_unknown_reduction_identifier_prior_omp_6_0 : Error< "incorrect reduction identifier, expected one of '+', '-', '*', '&', '|', '^', " "'&&', '||', 'min' or 'max' or declare reduction for type %0">; +def err_omp_unknown_reduction_identifier_since_omp_6_0 : Error< + "incorrect reduction identifier, expected one of '+', '*', '&', '|', '^', " + "'&&', '||', 'min' or 'max' or declare reduction for type %0">; def err_omp_not_resolved_reduction_identifier : Error< "unable to resolve declare reduction construct for type %0">; def err_omp_reduction_ref_type_arg : Error< @@ -10389,6 +10972,9 @@ def err_omp_prohibited_region_simd : Error< "OpenMP constructs may not be nested inside a simd region%select{| except for ordered simd, simd, scan, or atomic directive}0">; def err_omp_prohibited_region_atomic : Error< "OpenMP constructs may not be nested inside an atomic region">; +def err_omp_prohibited_region_order + : Error<"construct '%0' not allowed in a region associated with a " + "directive with 'order' clause">; def err_omp_prohibited_region_critical_same_name : Error< "cannot nest 'critical' regions having the same name %0">; def note_omp_previous_critical_region : Note< @@ -10438,8 +11024,25 @@ def err_omp_atomic_capture_not_compound_statement : Error< " where x is an lvalue expression with scalar type">; def note_omp_atomic_capture: Note< "%select{expected assignment expression|expected compound statement|expected exactly two expression statements|expected in right hand side of the first expression}0">; +def err_omp_atomic_compare : Error< + "the statement for 'atomic compare' must be a compound statement of form '{x = expr ordop x ? expr : x;}', '{x = x ordop expr? expr : x;}'," + " '{x = x == e ? d : x;}', '{x = e == x ? d : x;}', or 'if(expr ordop x) {x = expr;}', 'if(x ordop expr) {x = expr;}', 'if(x == e) {x = d;}'," + " 'if(e == x) {x = d;}' where 'x' is an lvalue expression with scalar type, 'expr', 'e', and 'd' are expressions with scalar type," + " and 'ordop' is one of '<' or '>'.">; +def err_omp_atomic_compare_capture : Error< + "the statement for 'atomic compare capture' must be a compound statement of form '{v = x; cond-up-stmt}', ''{cond-up-stmt v = x;}', '{if(x == e) {x = d;} else {v = x;}}'," + " '{r = x == e; if(r) {x = d;}}', or '{r = x == e; if(r) {x = d;} else {v = x;}}', where 'cond-update-stmt' can have one of the following forms: 'if(expr ordop x) {x = expr;}'," + " 'if(x ordop expr) {x = expr;}', 'if(x == e) {x = d;}', or 'if(e == x) {x = d;}' where 'x', 'r', and 'v' are lvalue expressions with scalar type, 'expr', 'e', and 'd' are expressions with scalar type," + " and 'ordop' is one of '<' or '>'.">; +def note_omp_atomic_compare: Note< + "%select{expected compound statement|expected exactly one expression statement|expected assignment statement|expected conditional operator|expect result value to be at false expression|" + "expect binary operator in conditional expression|expect '<', '>' or '==' as order operator|expect comparison in a form of 'x == e', 'e == x', 'x ordop expr', or 'expr ordop x'|" + "expect lvalue for result value|expect scalar value|expect integer value|unexpected 'else' statement|expect '==' operator|expect an assignment statement 'v = x'|" + "expect a 'if' statement|expect no more than two statements|expect a compound statement|expect 'else' statement|expect a form 'r = x == e; if (r) ...'}0">; +def err_omp_atomic_fail_wrong_or_no_clauses : Error<"expected a memory order clause">; +def err_omp_atomic_fail_no_compare : Error<"expected 'compare' clause with the 'fail' modifier">; def err_omp_atomic_several_clauses : Error< - "directive '#pragma omp atomic' cannot contain more than one 'read', 'write', 'update' or 'capture' clause">; + "directive '#pragma omp atomic' cannot contain more than one 'read', 'write', 'update', 'capture', or 'compare' clause">; def err_omp_several_mem_order_clauses : Error< "directive '#pragma omp %0' cannot contain more than one %select{'seq_cst', 'relaxed', |}1'acq_rel', 'acquire' or 'release' clause">; def err_omp_atomic_incompatible_mem_order_clause : Error< @@ -10454,6 +11057,8 @@ def note_omp_nested_statement_here : Note< "%select{statement|directive}0 outside teams construct here">; def err_omp_single_copyprivate_with_nowait : Error< "the 'copyprivate' clause must not be used with the 'nowait' clause">; +def err_omp_nowait_clause_without_depend: Error< + "directive '#pragma omp taskwait' cannot use 'nowait' clause without 'depend' clause">; def note_omp_nowait_clause_here : Note< "'nowait' clause is here">; def err_omp_single_decl_in_declare_simd_variant : Error< @@ -10506,6 +11111,8 @@ def err_omp_wrong_linear_modifier : Error< "expected %select{'val' modifier|one of 'ref', val' or 'uval' modifiers}0">; def err_omp_wrong_linear_modifier_non_reference : Error< "variable of non-reference type %0 can be used only with 'val' modifier, but used with '%1'">; +def err_omp_step_simple_modifier_exclusive : Error< + "step simple modifier is exclusive and can't be use with 'val', 'uval' or 'ref' modifier">; def err_omp_wrong_simdlen_safelen_values : Error< "the value of 'simdlen' parameter must be less than or equal to the value of the 'safelen' parameter">; def err_omp_wrong_if_directive_name_modifier : Error< @@ -10519,7 +11126,7 @@ def note_omp_previous_named_if_clause : Note< def err_omp_ordered_directive_with_param : Error< "'ordered' directive %select{without any clauses|with 'threads' clause}0 cannot be closely nested inside ordered region with specified parameter">; def err_omp_ordered_directive_without_param : Error< - "'ordered' directive with 'depend' clause cannot be closely nested inside ordered region without specified parameter">; + "'ordered' directive with '%0' clause cannot be closely nested inside ordered region without specified parameter">; def note_omp_ordered_param : Note< "'ordered' clause%select{| with specified parameter}0">; def err_omp_expected_base_var_name : Error< @@ -10528,6 +11135,8 @@ def err_omp_map_shared_storage : Error< "variable already marked as mapped in current construct">; def err_omp_invalid_map_type_for_directive : Error< "%select{map type '%1' is not allowed|map type must be specified}0 for '#pragma omp %2'">; +def err_omp_invalid_map_type_modifier_for_directive : Error< + "map type modifier '%0' is not allowed for '#pragma omp %1'">; def err_omp_no_clause_for_directive : Error< "expected at least one %0 clause for '#pragma omp %1'">; def err_omp_threadprivate_in_clause : Error< @@ -10549,21 +11158,25 @@ def note_omp_critical_hint_here : Note< def note_omp_critical_no_hint : Note< "%select{|previous }0directive with no 'hint' clause specified">; def err_omp_depend_clause_thread_simd : Error< - "'depend' clauses cannot be mixed with '%0' clause">; + "'%0' clauses cannot be mixed with '%1' clause">; def err_omp_depend_sink_expected_loop_iteration : Error< "expected%select{| %1}0 loop iteration variable">; def err_omp_depend_sink_unexpected_expr : Error< "unexpected expression: number of expressions is larger than the number of associated loops">; def err_omp_depend_sink_expected_plus_minus : Error< "expected '+' or '-' operation">; -def err_omp_depend_sink_source_not_allowed : Error< - "'depend(%select{source|sink:vec}0)' clause%select{|s}0 cannot be mixed with 'depend(%select{sink:vec|source}0)' clause%select{s|}0">; +def err_omp_taskwait_depend_mutexinoutset_not_allowed : Error< + "'mutexinoutset' modifier not allowed in 'depend' clause on 'taskwait' directive">; +def err_omp_sink_and_source_not_allowed : Error< + "'%0(%select{source|sink:vec}1)' clause%select{|s}1 cannot be mixed with '%0(%select{sink:vec|source}1)' clause%select{s|}1">; def err_omp_depend_zero_length_array_section_not_allowed : Error< "zero-length array section is not allowed in 'depend' clause">; def err_omp_depend_sink_source_with_modifier : Error< "depend modifier cannot be used with 'sink' or 'source' depend type">; def err_omp_depend_modifier_not_iterator : Error< "expected iterator specification as depend modifier">; +def err_omp_map_modifier_not_iterator : Error< + "expected iterator specification as map modifier">; def err_omp_linear_ordered : Error< "'linear' clause cannot be specified along with 'ordered' clause with a parameter">; def err_omp_unexpected_schedule_modifier : Error< @@ -10584,6 +11197,8 @@ def err_omp_expected_int_param : Error< "expected a reference to an integer-typed parameter">; def err_omp_at_least_one_motion_clause_required : Error< "expected at least one 'to' clause or 'from' clause specified to '#pragma omp target update'">; +def err_omp_cannot_update_with_internal_linkage : Error< + "the host cannot update a declare target variable that is not externally visible.">; def err_omp_usedeviceptr_not_a_pointer : Error< "expected pointer or reference to pointer in 'use_device_ptr' clause">; def err_omp_argument_type_isdeviceptr : Error < @@ -10614,6 +11229,8 @@ def err_omp_directive_before_requires : Error < "'%0' region encountered before requires directive with '%1' clause">; def note_omp_requires_encountered_directive : Note < "'%0' previously encountered here">; +def err_omp_device_ancestor_without_requires_reverse_offload : Error < + "Device clause with ancestor device-modifier used without specifying 'requires reverse_offload'">; def err_omp_invalid_scope : Error < "'#pragma omp %0' directive must appear only in file scope">; def note_omp_invalid_length_on_this_ptr_mapping : Note < @@ -10677,9 +11294,9 @@ def err_omp_invariant_or_linear_dependency : Error< "expected loop invariant expression or '<invariant1> * %0 + <invariant2>' kind of expression">; def err_omp_wrong_dependency_iterator_type : Error< "expected an integer or a pointer type of the outer loop counter '%0' for non-rectangular nests">; -def err_device_unsupported_type - : Error<"%0 requires %select{|%2 bit size}1 %3 type support, but device " - "'%4' does not support it">; +def err_target_unsupported_type + : Error<"%0 requires %select{|%2 bit size}1 %3 %select{|return }4type support," + " but target '%5' does not support it">; def err_omp_lambda_capture_in_declare_target_not_to : Error< "variable captured in declare target region must appear in a to clause">; def err_omp_device_type_mismatch : Error< @@ -10714,9 +11331,16 @@ def err_omp_declare_variant_diff : Error< "function with '#pragma omp declare variant' has a different %select{calling convention" "|return type|constexpr specification|inline specification|storage class|" "linkage}0">; +def err_omp_declare_variant_prototype_required : Error< + "function with '#pragma omp declare variant' must have a prototype when " + "'append_args' is used">; +def err_omp_interop_type_not_found : Error< + "'omp_interop_t' must be defined when 'append_args' clause is used; include <omp.h>">; def err_omp_declare_variant_incompat_types : Error< - "variant in '#pragma omp declare variant' with type %0 is incompatible with type %1" - >; + "variant in '#pragma omp declare variant' with type %0 is incompatible with" + " type %1%select{| with appended arguments}2">; +def err_omp_declare_variant_same_base_function : Error< + "variant in '#pragma omp declare variant' is the same as the base function">; def warn_omp_declare_variant_marked_as_declare_variant : Warning< "variant function in '#pragma omp declare variant' is itself marked as '#pragma omp declare variant'" >, InGroup<SourceUsesOpenMP>; @@ -10734,11 +11358,6 @@ def err_omp_non_lvalue_in_map_or_motion_clauses: Error< "expected addressable lvalue in '%0' clause">; def err_omp_var_expected : Error< "expected variable of the '%0' type%select{|, not %2}1">; -def warn_unknown_declare_variant_isa_trait - : Warning<"isa trait '%0' is not known to the current target; verify the " - "spelling or consider restricting the context selector with the " - "'arch' selector further">, - InGroup<SourceUsesOpenMP>; def err_omp_non_pointer_type_array_shaping_base : Error< "expected expression with a pointer to a complete type as a base of an array " "shaping operation">; @@ -10762,6 +11381,9 @@ def note_omp_protected_structured_block : Note<"jump bypasses OpenMP structured block">; def note_omp_exits_structured_block : Note<"jump exits scope of OpenMP structured block">; +def err_omp_lastprivate_loop_var_non_loop_iteration : Error< + "only loop iteration variables are allowed in 'lastprivate' clause in " + "'omp %0' directives">; def err_omp_interop_variable_expected : Error< "expected%select{| non-const}0 variable of type 'omp_interop_t'">; def err_omp_interop_variable_wrong_type : Error< @@ -10779,6 +11401,21 @@ def err_omp_dispatch_statement_call def err_omp_unroll_full_variable_trip_count : Error< "loop to be fully unrolled must have a constant trip count">; def note_omp_directive_here : Note<"'%0' directive found here">; +def err_omp_instantiation_not_supported + : Error<"instantiation of '%0' not supported yet">; +def err_omp_adjust_arg_multiple_clauses : Error< + "'adjust_arg' argument %0 used in multiple clauses">; +def err_omp_clause_requires_dispatch_construct : Error< + "'%0' clause requires 'dispatch' context selector">; +def err_omp_append_args_with_varargs : Error< + "'append_args' is not allowed with varargs functions">; +def err_openmp_vla_in_task_untied : Error< + "variable length arrays are not supported in OpenMP tasking regions with 'untied' clause">; +def warn_omp_unterminated_declare_target : Warning< + "expected '#pragma omp end declare target' at end of file to match '#pragma omp %0'">, + InGroup<SourceUsesOpenMP>; +def err_ompx_bare_no_grid : Error< + "'ompx_bare' clauses requires explicit grid size via 'num_teams' and 'thread_limit' clauses">; } // end of OpenMP category let CategoryName = "Related Result Type Issue" in { @@ -10811,7 +11448,7 @@ def err_invalid_type_for_program_scope_var : Error< let CategoryName = "Modules Issue" in { def err_module_decl_in_module_map_module : Error< "'module' declaration found while building module from module map">; -def err_module_decl_in_header_module : Error< +def err_module_decl_in_header_unit : Error< "'module' declaration found while building header unit">; def err_module_interface_implementation_mismatch : Error< "missing 'export' specifier in module declaration while " @@ -10872,10 +11509,14 @@ def ext_module_import_not_at_top_level_noop : ExtWarn< def note_module_import_not_at_top_level : Note<"%0 begins here">; def err_module_self_import : Error< "import of module '%0' appears within same top-level module '%1'">; +def err_module_self_import_cxx20 : Error< + "import of module '%0' appears within its own %select{interface|implementation}1">; def err_module_import_in_implementation : Error< "@import of module '%0' in implementation of '%1'; use #import">; // C++ Modules +def err_module_import_non_interface_nor_parition : Error< + "import of module '%0' imported non C++20 importable modules">; def err_module_decl_not_at_start : Error< "module declaration must occur at the start of the translation unit">; def note_global_module_introducer_missing : Note< @@ -10884,27 +11525,22 @@ def note_global_module_introducer_missing : Note< def err_export_within_anonymous_namespace : Error< "export declaration appears within anonymous namespace">; def note_anonymous_namespace : Note<"anonymous namespace begins here">; -def ext_export_no_name_block : ExtWarn< - "ISO C++20 does not permit %select{an empty|a static_assert}0 declaration " - "to appear in an export block">, InGroup<ExportUnnamed>; -def ext_export_no_names : ExtWarn< - "ISO C++20 does not permit a declaration that does not introduce any names " - "to be exported">, InGroup<ExportUnnamed>; def note_export : Note<"export block begins here">; -def err_export_no_name : Error< - "%select{empty|static_assert|asm}0 declaration cannot be exported">; -def ext_export_using_directive : ExtWarn< - "ISO C++20 does not permit using directive to be exported">, - InGroup<DiagGroup<"export-using-directive">>; def err_export_within_export : Error< "export declaration appears within another export declaration">; +def err_export_anon_ns_internal : Error< + "anonymous namespaces cannot be exported">; def err_export_internal : Error< "declaration of %0 with internal linkage cannot be exported">; def err_export_using_internal : Error< - "using declaration referring to %0 with internal linkage cannot be exported">; + "using declaration referring to %1 with %select{internal|module|unknown}0 " + "linkage cannot be exported">; def err_export_not_in_module_interface : Error< - "export declaration can only be used within a module interface unit" - "%select{ after the module declaration|}0">; + "export declaration can only be used within a module purview">; +def err_export_inline_not_defined : Error< + "inline function not defined%select{| before the private module fragment}0">; +def err_export_partition_impl : Error< + "module partition implementations cannot be exported">; def err_export_in_private_module_fragment : Error< "export declaration cannot be used in a private module fragment">; def note_private_module_fragment : Note< @@ -10917,6 +11553,13 @@ def err_private_module_fragment_not_module_interface : Error< "private module fragment in module implementation unit">; def note_not_module_interface_add_export : Note< "add 'export' here if this is intended to be a module interface unit">; +def err_invalid_module_name : Error<"%0 is an invalid name for a module">; +def err_extern_def_in_header_unit : Error< + "non-inline external definitions are not permitted in C++ header units">; + +def warn_experimental_header_unit : Warning< + "the implementation of header units is in an experimental phase">, + InGroup<DiagGroup<"experimental-header-units">>; def ext_equivalent_internal_linkage_decl_in_modules : ExtWarn< "ambiguous use of internal linkage declaration %0 defined in multiple modules">, @@ -10949,7 +11592,7 @@ def err_coroutine_invalid_func_context : Error< "|a function with a deduced return type|a varargs function" "|a consteval function}0">; def err_implied_coroutine_type_not_found : Error< - "%0 type was not found; include <experimental/coroutine> before defining " + "%0 type was not found; include <coroutine> before defining " "a coroutine">; def err_implicit_coroutine_std_nothrow_type_not_found : Error< "std::nothrow was not found; include <new> before defining a coroutine which " @@ -10957,11 +11600,11 @@ def err_implicit_coroutine_std_nothrow_type_not_found : Error< def err_malformed_std_nothrow : Error< "std::nothrow must be a valid variable declaration">; def err_malformed_std_coroutine_handle : Error< - "std::experimental::coroutine_handle must be a class template">; + "std::coroutine_handle isn't a class template">; def err_coroutine_handle_missing_member : Error< - "std::experimental::coroutine_handle missing a member named '%0'">; + "std::coroutine_handle must have a member named '%0'">; def err_malformed_std_coroutine_traits : Error< - "'std::experimental::coroutine_traits' must be a class template">; + "std::coroutine_traits isn't a class template">; def err_implied_std_coroutine_traits_promise_type_not_found : Error< "this function cannot be a coroutine: %q0 has no member named 'promise_type'">; def err_implied_std_coroutine_traits_promise_type_not_class : Error< @@ -10973,8 +11616,6 @@ def err_coroutine_type_missing_specialization : Error< "specialization %0">; def err_coroutine_promise_incompatible_return_functions : Error< "the coroutine promise type %0 declares both 'return_value' and 'return_void'">; -def err_coroutine_promise_requires_return_function : Error< - "the coroutine promise type %0 must declare either 'return_value' or 'return_void'">; def note_coroutine_promise_implicit_await_transform_required_here : Note< "call to 'await_transform' implicitly required by 'co_await' here">; def note_coroutine_promise_suspend_implicitly_required : Note< @@ -11009,11 +11650,39 @@ def err_coroutine_promise_final_suspend_requires_nothrow : Error< def note_coroutine_function_declare_noexcept : Note< "must be declared with 'noexcept'" >; +def warn_always_inline_coroutine : Warning< + "this coroutine may be split into pieces; not every piece is guaranteed to be inlined" + >, + InGroup<AlwaysInlineCoroutine>; +def err_coroutine_unusable_new : Error< + "'operator new' provided by %0 is not usable with the function signature of %1" +>; +def err_coroutine_unfound_nothrow_new : Error < + "unable to find %select{'::operator new(size_t, nothrow_t)'|" + "'::operator new(size_t, align_val_t, nothrow_t)'}1 for %0" +>; +def warn_non_aligned_allocation_function : Warning < + "under -fcoro-aligned-allocation, the non-aligned allocation function " + "for the promise type %0 has higher precedence than the global aligned " + "allocation function">, + InGroup<CoroNonAlignedAllocationFunction>; +def err_conflicting_aligned_options : Error < + "conflicting option '-fcoro-aligned-allocation' and '-fno-aligned-allocation'" +>; +def err_coro_invalid_addr_of_label : Error< + "the GNU address of label extension is not allowed in coroutines." +>; +def err_coroutine_return_type : Error< + "function returns a type %0 marked with [[clang::coro_return_type]] but is neither a coroutine nor a coroutine wrapper; " + "non-coroutines should be marked with [[clang::coro_wrapper]] to allow returning coroutine return type" +>; } // end of coroutines issue category let CategoryName = "Documentation Issue" in { def warn_not_a_doxygen_trailing_member_comment : Warning< "not a Doxygen trailing comment">, InGroup<Documentation>, DefaultIgnore; +def warn_splice_in_doxygen_comment : Warning< + "line splicing in Doxygen comments are not supported">, InGroup<Documentation>, DefaultIgnore; } // end of documentation issue category let CategoryName = "Nullability Issue" in { @@ -11145,6 +11814,10 @@ def err_objc_type_args_wrong_arity : Error< "too %select{many|few}0 type arguments for class %1 (have %2, expected %3)">; } +def err_type_available_only_in_default_eval_method : Error< + "cannot use type '%0' within '#pragma clang fp eval_method'; type is set " + "according to the default eval method for the translation unit">; + def err_objc_type_arg_not_id_compatible : Error< "type argument %0 is neither an Objective-C object nor a block type">; @@ -11170,7 +11843,7 @@ def note_shadow_field : Note<"declared here">; def err_multiversion_required_in_redecl : Error< "function declaration is missing %select{'target'|'cpu_specific' or " - "'cpu_dispatch'}0 attribute in a multiversioned function">; + "'cpu_dispatch'|'target_version'}0 attribute in a multiversioned function">; def note_multiversioning_caused_here : Note< "function multiversioning caused by this declaration">; def err_multiversion_after_used : Error< @@ -11183,21 +11856,23 @@ def err_multiversion_duplicate : Error< "multiversioned function redeclarations require identical target attributes">; def err_multiversion_noproto : Error< "multiversioned function must have a prototype">; -def err_multiversion_disallowed_other_attr : Error< - "attribute '%select{target|cpu_specific|cpu_dispatch}0' multiversioning cannot be combined" - " with attribute %1">; -def err_multiversion_mismatched_attrs - : Error<"attributes on multiversioned functions must all match, attribute " - "%0 %select{is missing|has different arguments}1">; +def err_multiversion_disallowed_other_attr + : Error<"attribute " + "'%select{|target|cpu_specific|cpu_dispatch|target_clones|target_version}0' " + "multiversioning cannot be combined" + " with attribute %1">; def err_multiversion_diff : Error< "multiversioned function declaration has a different %select{calling convention" - "|return type|constexpr specification|inline specification|storage class|" - "linkage}0">; -def err_multiversion_doesnt_support : Error< - "attribute '%select{target|cpu_specific|cpu_dispatch}0' multiversioned functions do not " - "yet support %select{function templates|virtual functions|" - "deduced return types|constructors|destructors|deleted functions|" - "defaulted functions|constexpr functions|consteval function}1">; + "|return type|constexpr specification|inline specification|linkage|" + "language linkage}0">; +def err_multiversion_doesnt_support + : Error<"attribute " + "'%select{|target|cpu_specific|cpu_dispatch|target_clones|target_version}0' " + "multiversioned functions do not " + "yet support %select{function templates|virtual functions|" + "deduced return types|constructors|destructors|deleted functions|" + "defaulted functions|constexpr functions|consteval " + "function|lambdas}1">; def err_multiversion_not_allowed_on_main : Error< "'main' cannot be a multiversioned function">; def err_multiversion_not_supported : Error< @@ -11214,6 +11889,22 @@ def warn_multiversion_duplicate_entries : Warning< def warn_dispatch_body_ignored : Warning< "body of cpu_dispatch function will be ignored">, InGroup<FunctionMultiVersioning>; +def err_target_clone_must_have_default + : Error<"'target_clones' multiversioning requires a default target">; +def err_target_clone_doesnt_match + : Error<"'target_clones' attribute does not match previous declaration">; +def warn_target_clone_mixed_values + : ExtWarn< + "mixing 'target_clones' specifier mechanisms is permitted for GCC " + "compatibility; use a comma separated sequence of string literals, " + "or a string literal containing a comma-separated list of versions">, + InGroup<TargetClonesMixedSpecifiers>; +def warn_target_clone_duplicate_options + : Warning<"version list contains duplicate entries">, + InGroup<FunctionMultiVersioning>; +def warn_target_clone_no_impact_options + : Warning<"version list contains entries that don't impact code generation">, + InGroup<FunctionMultiVersioning>; // three-way comparison operator diagnostics def err_implied_comparison_category_type_not_found : Error< @@ -11257,6 +11948,14 @@ def err_builtin_launder_invalid_arg : Error< "%select{non-pointer|function pointer|void pointer}0 argument to " "'__builtin_launder' is not allowed">; +def err_builtin_invalid_arg_type: Error < + "%ordinal0 argument must be a " + "%select{vector, integer or floating point type|matrix|" + "pointer to a valid matrix element type|" + "signed integer or floating point type|vector type|" + "floating point type|" + "vector of integers}1 (was %2)">; + def err_builtin_matrix_disabled: Error< "matrix types extension is disabled. Pass -fenable-matrix to enable it">; def err_matrix_index_not_integer: Error< @@ -11269,11 +11968,8 @@ def err_matrix_separate_incomplete_index: Error< "matrix row and column subscripts cannot be separated by any expression">; def err_matrix_subscript_comma: Error< "comma expressions are not allowed as indices in matrix subscript expressions">; -def err_builtin_matrix_arg: Error<"1st argument must be a matrix">; def err_builtin_matrix_scalar_unsigned_arg: Error< "%0 argument must be a constant unsigned integer expression">; -def err_builtin_matrix_pointer_arg: Error< - "%ordinal0 argument must be a pointer to a valid matrix element type">; def err_builtin_matrix_pointer_arg_mismatch: Error< "the pointee of the 2nd argument must match the element type of the 1st argument (%0 != %1)">; def err_builtin_matrix_store_to_const: Error< @@ -11324,10 +12020,17 @@ def warn_sycl_kernel_num_of_function_params : Warning< def warn_sycl_kernel_return_type : Warning< "function template with 'sycl_kernel' attribute must have a 'void' return type">, InGroup<IgnoredAttributes>; +def err_sycl_special_type_num_init_method : Error< + "types with 'sycl_special_class' attribute must have one and only one '__init' " + "method defined">; + +def warn_cuda_maxclusterrank_sm_90 : Warning< + "maxclusterrank requires sm_90 or higher, CUDA arch provided: %0, ignoring " + "%1 attribute">, InGroup<IgnoredAttributes>; -def err_ext_int_bad_size : Error<"%select{signed|unsigned}0 _ExtInt must " +def err_bit_int_bad_size : Error<"%select{signed|unsigned}0 _BitInt must " "have a bit size of at least %select{2|1}0">; -def err_ext_int_max_size : Error<"%select{signed|unsigned}0 _ExtInt of bit " +def err_bit_int_max_size : Error<"%select{signed|unsigned}0 _BitInt of bit " "sizes greater than %1 not supported">; // errors of expect.with.probability @@ -11347,7 +12050,118 @@ def warn_tcb_enforcement_violation : Warning< // RISC-V builtin required extension warning def err_riscv_builtin_requires_extension : Error< - "builtin requires '%0' extension support to be enabled">; + "builtin requires%select{| at least one of the following extensions}0: %1">; def err_riscv_builtin_invalid_lmul : Error< "LMUL argument must be in the range [0,3] or [5,7]">; +def err_riscv_type_requires_extension : Error< + "RISC-V type %0 requires the '%1' extension" +>; + +def err_std_source_location_impl_not_found : Error< + "'std::source_location::__impl' was not found; it must be defined before '__builtin_source_location' is called">; +def err_std_source_location_impl_malformed : Error< + "'std::source_location::__impl' must be standard-layout and have only two 'const char *' fields '_M_file_name' and '_M_function_name', and two integral fields '_M_line' and '_M_column'">; + +// HLSL Diagnostics +def err_hlsl_attr_unsupported_in_stage : Error<"attribute %0 is unsupported in '%1' shaders, requires %select{|one of the following: }2%3">; +def err_hlsl_attr_invalid_type : Error< + "attribute %0 only applies to a field or parameter of type '%1'">; +def err_hlsl_attr_invalid_ast_node : Error< + "attribute %0 only applies to %1">; +def err_hlsl_entry_shader_attr_mismatch : Error< + "%0 attribute on entry function does not match the target profile">; +def err_hlsl_numthreads_argument_oor : Error<"argument '%select{X|Y|Z}0' to numthreads attribute cannot exceed %1">; +def err_hlsl_numthreads_invalid : Error<"total number of threads cannot exceed %0">; +def err_hlsl_missing_numthreads : Error<"missing numthreads attribute for %0 shader entry">; +def err_hlsl_attribute_param_mismatch : Error<"%0 attribute parameters do not match the previous declaration">; +def err_hlsl_duplicate_parameter_modifier : Error<"duplicate parameter modifier %0">; +def err_hlsl_missing_semantic_annotation : Error< + "semantic annotations must be present for all parameters of an entry " + "function or patch constant function">; +def err_hlsl_init_priority_unsupported : Error< + "initializer priorities are not supported in HLSL">; + +def err_hlsl_unsupported_register_type : Error<"invalid resource class specifier '%0' used; expected 'b', 's', 't', or 'u'">; +def err_hlsl_unsupported_register_number : Error<"register number should be an integer">; +def err_hlsl_expected_space : Error<"invalid space specifier '%0' used; expected 'space' followed by an integer, like space1">; +def err_hlsl_pointers_unsupported : Error< + "%select{pointers|references}0 are unsupported in HLSL">; + +def err_hlsl_operator_unsupported : Error< + "the '%select{&|*|->}0' operator is unsupported in HLSL">; + +def err_hlsl_param_qualifier_mismatch : + Error<"conflicting parameter qualifier %0 on parameter %1">; + +// Layout randomization diagnostics. +def err_non_designated_init_used : Error< + "a randomized struct can only be initialized with a designated initializer">; +def err_cast_from_randomized_struct : Error< + "casting from randomized structure pointer type %0 to %1">; + +// Unsafe buffer usage diagnostics. +def warn_unsafe_buffer_variable : Warning< + "%0 is an %select{unsafe pointer used for buffer access|unsafe buffer that " + "does not perform bounds checks}1">, + InGroup<UnsafeBufferUsage>, DefaultIgnore; +def warn_unsafe_buffer_operation : Warning< + "%select{unsafe pointer operation|unsafe pointer arithmetic|" + "unsafe buffer access|function introduces unsafe buffer manipulation|unsafe invocation of span::data}0">, + InGroup<UnsafeBufferUsage>, DefaultIgnore; +def note_unsafe_buffer_operation : Note< + "used%select{| in pointer arithmetic| in buffer access}0 here">; +def note_unsafe_buffer_variable_fixit_group : Note< + "change type of %0 to '%select{std::span|std::array|std::span::iterator}1' to preserve bounds information%select{|, and change %2 to '%select{std::span|std::array|std::span::iterator}1' to propagate bounds information between them}3">; +def note_unsafe_buffer_variable_fixit_together : Note< + "change type of %0 to '%select{std::span|std::array|std::span::iterator}1' to preserve bounds information" + "%select{|, and change %2 to safe types to make function %4 bounds-safe}3">; +def note_safe_buffer_usage_suggestions_disabled : Note< + "pass -fsafe-buffer-usage-suggestions to receive code hardening suggestions">; +#ifndef NDEBUG +// Not a user-facing diagnostic. Useful for debugging false negatives in +// -fsafe-buffer-usage-suggestions (i.e. lack of -Wunsafe-buffer-usage fixits). +def note_safe_buffer_debug_mode : Note<"safe buffers debug: %0">; +#endif + +def err_builtin_pass_in_regs_non_class : Error< + "argument %0 is not an unqualified class type">; + + +// WebAssembly reference type and table diagnostics. +def err_wasm_reference_pr : Error< + "%select{pointer|reference}0 to WebAssembly reference type is not allowed">; +def err_wasm_ca_reference : Error< + "cannot %select{capture|take address of}0 WebAssembly reference">; +def err_wasm_funcref_not_wasm : Error< + "invalid use of '__funcref' keyword outside the WebAssembly triple">; +def err_wasm_table_pr : Error< + "cannot form a %select{pointer|reference}0 to a WebAssembly table">; +def err_typecheck_wasm_table_must_have_zero_length : Error< + "only zero-length WebAssembly tables are currently supported">; +def err_wasm_table_in_function : Error< + "WebAssembly table cannot be declared within a function">; +def err_wasm_table_as_function_parameter : Error< + "cannot use WebAssembly table as a function parameter">; +def err_wasm_table_invalid_uett_operand : Error< + "invalid application of '%0' to WebAssembly table">; +def err_wasm_cast_table : Error< + "cannot cast %select{to|from}0 a WebAssembly table">; +def err_wasm_table_conditional_expression : Error< + "cannot use a WebAssembly table within a branch of a conditional expression">; +def err_wasm_table_art : Error< + "cannot %select{assign|return|throw|subscript}0 a WebAssembly table">; +def err_wasm_reftype_tc : Error< + "cannot %select{throw|catch}0 a WebAssembly reference type">; +def err_wasm_reftype_exception_spec : Error< + "WebAssembly reference type not allowed in exception specification">; +def err_wasm_table_must_be_static : Error< + "WebAssembly table must be static">; +def err_wasm_reftype_multidimensional_array : Error< + "multi-dimensional arrays of WebAssembly references are not allowed">; +def err_wasm_builtin_arg_must_be_table_type : Error < + "%ordinal0 argument must be a WebAssembly table">; +def err_wasm_builtin_arg_must_match_table_element_type : Error < + "%ordinal0 argument must match the element type of the WebAssembly table in the %ordinal1 argument">; +def err_wasm_builtin_arg_must_be_integer_type : Error < + "%ordinal0 argument must be an integer">; } // end of sema component. diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSerialization.h b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSerialization.h index b3d99fb3feaa..0c622a565773 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSerialization.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSerialization.h @@ -15,7 +15,7 @@ namespace clang { namespace diag { enum { #define DIAG(ENUM, FLAGS, DEFAULT_MAPPING, DESC, GROUP, SFINAE, NOWERROR, \ - SHOWINSYSHEADER, DEFERRABLE, CATEGORY) \ + SHOWINSYSHEADER, SHOWINSYSMACRO, DEFERRABLE, CATEGORY) \ ENUM, #define SERIALIZATIONSTART #include "clang/Basic/DiagnosticSerializationKinds.inc" diff --git a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSerializationKinds.td b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSerializationKinds.td index bf3221be004d..11c706ebf84b 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSerializationKinds.td +++ b/contrib/llvm-project/clang/include/clang/Basic/DiagnosticSerializationKinds.td @@ -20,7 +20,7 @@ def err_fe_pch_malformed_block : Error< def err_fe_ast_file_modified : Error< "file '%0' has been modified since the " "%select{precompiled header|module file|AST file}1 '%2' was built" - ": %select{size|mtime|content}3 changed">, + ": %select{size|mtime|content}3 changed%select{| (was %5, now %6)}4">, DefaultFatal; def err_fe_pch_file_overridden : Error< "file '%0' from the precompiled header has been overridden">; @@ -62,7 +62,7 @@ def err_ast_file_out_of_date : Error< "%select{PCH|module|AST}0 file '%1' is out of date and " "needs to be rebuilt%select{|: %3}2">, DefaultFatal; def err_ast_file_invalid : Error< - "file '%1' is not a valid precompiled %select{PCH|module|AST}0 file">, DefaultFatal; + "file '%1' is not a valid precompiled %select{PCH|module|AST}0 file: %2">, DefaultFatal; def note_module_file_imported_by : Note< "imported by %select{|module '%2' in }1'%0'">; def err_module_file_not_module : Error< @@ -75,6 +75,7 @@ def note_module_file_conflict : Note< def remark_module_import : Remark< "importing module '%0'%select{| into '%3'}2 from '%1'">, + ShowInSystemHeader, InGroup<ModuleImport>; def err_imported_module_not_found : Error< @@ -115,274 +116,10 @@ def note_module_odr_violation_no_possible_decls : Note< "definition has no member %0">; def note_module_odr_violation_possible_decl : Note< "declaration of %0 does not match">; -def err_module_odr_violation_different_definitions : Error< - "%q0 has different definitions in different modules; " - "%select{definition in module '%2' is here|defined here}1">; -def note_first_module_difference : Note< - "in first definition, possible difference is here">; -def note_module_odr_violation_different_definitions : Note< - "definition in module '%0' is here">; -def note_second_module_difference : Note< - "in second definition, possible difference is here">; def err_module_odr_violation_different_instantiations : Error< "instantiation of %q0 is different in different modules">; -def err_module_odr_violation_definition_data : Error < - "%q0 has different definitions in different modules; first difference is " - "%select{definition in module '%2'|defined here}1 found " - "%select{" - "%4 base %plural{1:class|:classes}4|" - "%4 virtual base %plural{1:class|:classes}4|" - "%ordinal4 base class with type %5|" - "%ordinal4 %select{non-virtual|virtual}5 base class %6|" - "%ordinal4 base class %5 with " - "%select{public|protected|private|no}6 access specifier}3">; - -def note_module_odr_violation_definition_data : Note < - "but in '%0' found " - "%select{" - "%2 base %plural{1:class|:classes}2|" - "%2 virtual base %plural{1:class|:classes}2|" - "%ordinal2 base class with different type %3|" - "%ordinal2 %select{non-virtual|virtual}3 base class %4|" - "%ordinal2 base class %3 with " - "%select{public|protected|private|no}4 access specifier}1">; - -def err_module_odr_violation_template_parameter : Error < - "%q0 has different definitions in different modules; first difference is " - "%select{definition in module '%2'|defined here}1 found " - "%select{" - "unnamed template parameter|" - "template parameter %4|" - "template parameter with %select{no |}4default argument|" - "template parameter with default argument}3">; - - -def note_module_odr_violation_template_parameter : Note < - "but in '%0' found " - "%select{" - "unnamed template parameter %2|" - "template parameter %2|" - "template parameter with %select{no |}2default argument|" - "template parameter with different default argument}1">; - -def err_module_odr_violation_mismatch_decl : Error< - "%q0 has different definitions in different modules; first difference is " - "%select{definition in module '%2'|defined here}1 found " - "%select{end of class|public access specifier|private access specifier|" - "protected access specifier|static assert|field|method|type alias|typedef|" - "data member|friend declaration|function template}3">; -def note_module_odr_violation_mismatch_decl : Note<"but in '%0' found " - "%select{end of class|public access specifier|private access specifier|" - "protected access specifier|static assert|field|method|type alias|typedef|" - "data member|friend declaration|function template}1">; - -def err_module_odr_violation_mismatch_decl_diff : Error< - "%q0 has different definitions in different modules; first difference is " - "%select{definition in module '%2'|defined here}1 found " - "%select{" - "static assert with condition|" - "static assert with message|" - "static assert with %select{|no }4message|" - "field %4|" - "field %4 with type %5|" - "%select{non-|}5bitfield %4|" - "bitfield %4 with one width expression|" - "%select{non-|}5mutable field %4|" - "field %4 with %select{no|an}5 initalizer|" - "field %4 with an initializer|" - "%select{method %5|constructor|destructor}4|" - "%select{method %5|constructor|destructor}4 " - "is %select{not deleted|deleted}6|" - "%select{method %5|constructor|destructor}4 " - "is %select{not defaulted|defaulted}6|" - "%select{method %5|constructor|destructor}4 " - "is %select{|pure }6%select{not virtual|virtual}7|" - "%select{method %5|constructor|destructor}4 " - "is %select{not static|static}6|" - "%select{method %5|constructor|destructor}4 " - "is %select{not volatile|volatile}6|" - "%select{method %5|constructor|destructor}4 " - "is %select{not const|const}6|" - "%select{method %5|constructor|destructor}4 " - "is %select{not inline|inline}6|" - "%select{method %5|constructor|destructor}4 " - "that has %6 parameter%s6|" - "%select{method %5|constructor|destructor}4 " - "with %ordinal6 parameter of type %7%select{| decayed from %9}8|" - "%select{method %5|constructor|destructor}4 " - "with %ordinal6 parameter named %7|" - "%select{method %5|constructor|destructor}4 " - "with %ordinal6 parameter with%select{out|}7 a default argument|" - "%select{method %5|constructor|destructor}4 " - "with %ordinal6 parameter with a default argument|" - "%select{method %5|constructor|destructor}4 " - "with %select{no |}6template arguments|" - "%select{method %5|constructor|destructor}4 " - "with %6 template argument%s6|" - "%select{method %5|constructor|destructor}4 " - "with %6 for %ordinal7 template argument|" - "%select{method %5|constructor|destructor}4 " - "with %select{no body|body}6|" - "%select{method %5|constructor|destructor}4 " - "with body|" - "%select{typedef|type alias}4 name %5|" - "%select{typedef|type alias}4 %5 with underlying type %6|" - "data member with name %4|" - "data member %4 with type %5|" - "data member %4 with%select{out|}5 an initializer|" - "data member %4 with an initializer|" - "data member %4 %select{is constexpr|is not constexpr}5|" - "friend %select{class|function}4|" - "friend %4|" - "friend function %4|" - "function template %4 with %5 template parameter%s5|" - "function template %4 with %ordinal5 template parameter being a " - "%select{type|non-type|template}6 template parameter|" - "function template %4 with %ordinal5 template parameter " - "%select{with no name|named %7}6|" - "function template %4 with %ordinal5 template parameter with " - "%select{no |}6default argument|" - "function template %4 with %ordinal5 template parameter with " - "default argument %6|" - "function template %4 with %ordinal5 template parameter with one type|" - "function template %4 with %ordinal5 template parameter %select{not |}6" - "being a template parameter pack|" - "}3">; - -def note_module_odr_violation_mismatch_decl_diff : Note<"but in '%0' found " - "%select{" - "static assert with different condition|" - "static assert with different message|" - "static assert with %select{|no }2message|" - "field %2|" - "field %2 with type %3|" - "%select{non-|}3bitfield %2|" - "bitfield %2 with different width expression|" - "%select{non-|}3mutable field %2|" - "field %2 with %select{no|an}3 initializer|" - "field %2 with a different initializer|" - "%select{method %3|constructor|destructor}2|" - "%select{method %3|constructor|destructor}2 " - "is %select{not deleted|deleted}4|" - "%select{method %3|constructor|destructor}2 " - "is %select{not defaulted|defaulted}4|" - "%select{method %3|constructor|destructor}2 " - "is %select{|pure }4%select{not virtual|virtual}5|" - "%select{method %3|constructor|destructor}2 " - "is %select{not static|static}4|" - "%select{method %3|constructor|destructor}2 " - "is %select{not volatile|volatile}4|" - "%select{method %3|constructor|destructor}2 " - "is %select{not const|const}4|" - "%select{method %3|constructor|destructor}2 " - "is %select{not inline|inline}4|" - "%select{method %3|constructor|destructor}2 " - "that has %4 parameter%s4|" - "%select{method %3|constructor|destructor}2 " - "with %ordinal4 parameter of type %5%select{| decayed from %7}6|" - "%select{method %3|constructor|destructor}2 " - "with %ordinal4 parameter named %5|" - "%select{method %3|constructor|destructor}2 " - "with %ordinal4 parameter with%select{out|}5 a default argument|" - "%select{method %3|constructor|destructor}2 " - "with %ordinal4 parameter with a different default argument|" - "%select{method %3|constructor|destructor}2 " - "with %select{no |}4template arguments|" - "%select{method %3|constructor|destructor}2 " - "with %4 template argument%s4|" - "%select{method %3|constructor|destructor}2 " - "with %4 for %ordinal5 template argument|" - "%select{method %3|constructor|destructor}2 " - "with %select{no body|body}4|" - "%select{method %3|constructor|destructor}2 " - "with different body|" - "%select{typedef|type alias}2 name %3|" - "%select{typedef|type alias}2 %3 with different underlying type %4|" - "data member with name %2|" - "data member %2 with different type %3|" - "data member %2 with%select{out|}3 an initializer|" - "data member %2 with a different initializer|" - "data member %2 %select{is constexpr|is not constexpr}3|" - "friend %select{class|function}2|" - "friend %2|" - "friend function %2|" - "function template %2 with %3 template parameter%s3|" - "function template %2 with %ordinal3 template paramter being a " - "%select{type|non-type|template}4 template parameter|" - "function template %2 with %ordinal3 template parameter " - "%select{with no name|named %5}4|" - "function template %2 with %ordinal3 template parameter with " - "%select{no |}4default argument|" - "function template %2 with %ordinal3 template parameter with " - "default argument %4|" - "function template %2 with %ordinal3 template parameter with different type|" - "function template %2 with %ordinal3 template parameter %select{not |}4" - "being a template parameter pack|" - "}1">; - -def err_module_odr_violation_function : Error< - "%q0 has different definitions in different modules; " - "%select{definition in module '%2'|defined here}1 " - "first difference is " - "%select{" - "return type is %4|" - "%ordinal4 parameter with name %5|" - "%ordinal4 parameter with type %5%select{| decayed from %7}6|" - "%ordinal4 parameter with%select{out|}5 a default argument|" - "%ordinal4 parameter with a default argument|" - "function body" - "}3">; - -def note_module_odr_violation_function : Note<"but in '%0' found " - "%select{" - "different return type %2|" - "%ordinal2 parameter with name %3|" - "%ordinal2 parameter with type %3%select{| decayed from %5}4|" - "%ordinal2 parameter with%select{out|}3 a default argument|" - "%ordinal2 parameter with a different default argument|" - "a different body" - "}1">; - -def err_module_odr_violation_enum : Error< - "%q0 has different definitions in different modules; " - "%select{definition in module '%2'|defined here}1 " - "first difference is " - "%select{" - "enum that is %select{not scoped|scoped}4|" - "enum scoped with keyword %select{struct|class}4|" - "enum %select{without|with}4 specified type|" - "enum with specified type %4|" - "enum with %4 element%s4|" - "%ordinal4 element has name %5|" - "%ordinal4 element %5 %select{has|does not have}6 an initilizer|" - "%ordinal4 element %5 has an initializer|" - "}3">; - -def note_module_odr_violation_enum : Note<"but in '%0' found " - "%select{" - "enum that is %select{not scoped|scoped}2|" - "enum scoped with keyword %select{struct|class}2|" - "enum %select{without|with}2 specified type|" - "enum with specified type %2|" - "enum with %2 element%s2|" - "%ordinal2 element has name %3|" - "%ordinal2 element %3 %select{has|does not have}4 an initializer|" - "%ordinal2 element %3 has different initializer|" - "}1">; - -def err_module_odr_violation_mismatch_decl_unknown : Error< - "%q0 %select{with definition in module '%2'|defined here}1 has different " - "definitions in different modules; first difference is this " - "%select{||||static assert|field|method|type alias|typedef|data member|" - "friend declaration|unexpected decl}3">; -def note_module_odr_violation_mismatch_decl_unknown : Note< - "but in '%0' found " - "%select{||||different static assert|different field|different method|" - "different type alias|different typedef|different data member|" - "different friend declaration|another unexpected decl}1">; - def warn_duplicate_module_file_extension : Warning< "duplicate module file extension block name '%0'">, InGroup<ModuleFileExtension>; @@ -391,6 +128,9 @@ def warn_module_system_bit_conflict : Warning< "module file '%0' was validated as a system module and is now being imported " "as a non-system module; any difference in diagnostic options will be ignored">, InGroup<ModuleConflict>; + +def err_failed_to_find_module_file : Error< + "failed to find module file for module '%0'">; } // let CategoryName let CategoryName = "AST Serialization Issue" in { diff --git a/contrib/llvm-project/clang/include/clang/Basic/DirectoryEntry.h b/contrib/llvm-project/clang/include/clang/Basic/DirectoryEntry.h index edb8031a20b8..906c2e9af23b 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/DirectoryEntry.h +++ b/contrib/llvm-project/clang/include/clang/Basic/DirectoryEntry.h @@ -14,13 +14,18 @@ #ifndef LLVM_CLANG_BASIC_DIRECTORYENTRY_H #define LLVM_CLANG_BASIC_DIRECTORYENTRY_H +#include "clang/Basic/CustomizableOptional.h" #include "clang/Basic/LLVM.h" #include "llvm/ADT/DenseMapInfo.h" #include "llvm/ADT/Hashing.h" +#include "llvm/ADT/STLExtras.h" #include "llvm/ADT/StringMap.h" #include "llvm/ADT/StringRef.h" #include "llvm/Support/ErrorOr.h" +#include <optional> +#include <utility> + namespace clang { namespace FileMgr { @@ -31,12 +36,17 @@ template <class RefTy> class MapEntryOptionalStorage; /// Cached information about one directory (either on disk or in /// the virtual file system). class DirectoryEntry { + DirectoryEntry() = default; + DirectoryEntry(const DirectoryEntry &) = delete; + DirectoryEntry &operator=(const DirectoryEntry &) = delete; friend class FileManager; + friend class FileEntryTestHelper; // FIXME: We should not be storing a directory entry name here. StringRef Name; // Name of the directory. public: + LLVM_DEPRECATED("Use DirectoryEntryRef::getName() instead.", "") StringRef getName() const { return Name; } }; @@ -62,7 +72,7 @@ public: bool isSameRef(DirectoryEntryRef RHS) const { return ME == RHS.ME; } DirectoryEntryRef() = delete; - DirectoryEntryRef(const MapEntry &ME) : ME(&ME) {} + explicit DirectoryEntryRef(const MapEntry &ME) : ME(&ME) {} /// Allow DirectoryEntryRef to degrade into 'const DirectoryEntry*' to /// facilitate incremental adoption. @@ -108,6 +118,8 @@ private: const MapEntry *ME; }; +using OptionalDirectoryEntryRef = CustomizableOptional<DirectoryEntryRef>; + namespace FileMgr { /// Customized storage for refs derived from map entires in FileManager, using @@ -120,27 +132,25 @@ public: MapEntryOptionalStorage() : MaybeRef(optional_none_tag()) {} template <class... ArgTypes> - explicit MapEntryOptionalStorage(llvm::in_place_t, ArgTypes &&...Args) + explicit MapEntryOptionalStorage(std::in_place_t, ArgTypes &&...Args) : MaybeRef(std::forward<ArgTypes>(Args)...) {} void reset() { MaybeRef = optional_none_tag(); } - bool hasValue() const { return MaybeRef.hasOptionalValue(); } + bool has_value() const { return MaybeRef.hasOptionalValue(); } - RefTy &getValue() LLVM_LVALUE_FUNCTION { - assert(hasValue()); + RefTy &value() & { + assert(has_value()); return MaybeRef; } - RefTy const &getValue() const LLVM_LVALUE_FUNCTION { - assert(hasValue()); + RefTy const &value() const & { + assert(has_value()); return MaybeRef; } -#if LLVM_HAS_RVALUE_REFERENCE_THIS - RefTy &&getValue() && { - assert(hasValue()); + RefTy &&value() && { + assert(has_value()); return std::move(MaybeRef); } -#endif template <class... Args> void emplace(Args &&...args) { MaybeRef = RefTy(std::forward<Args>(args)...); @@ -153,9 +163,7 @@ public: }; } // end namespace FileMgr -} // end namespace clang -namespace llvm { namespace optional_detail { /// Customize OptionalStorage<DirectoryEntryRef> to use DirectoryEntryRef and @@ -170,8 +178,8 @@ public: OptionalStorage() = default; template <class... ArgTypes> - explicit OptionalStorage(in_place_t, ArgTypes &&...Args) - : StorageImpl(in_place_t{}, std::forward<ArgTypes>(Args)...) {} + explicit OptionalStorage(std::in_place_t, ArgTypes &&...Args) + : StorageImpl(std::in_place_t{}, std::forward<ArgTypes>(Args)...) {} OptionalStorage &operator=(clang::DirectoryEntryRef Ref) { StorageImpl::operator=(Ref); @@ -179,15 +187,30 @@ public: } }; -static_assert(sizeof(Optional<clang::DirectoryEntryRef>) == - sizeof(clang::DirectoryEntryRef), - "Optional<DirectoryEntryRef> must avoid size overhead"); +static_assert(sizeof(OptionalDirectoryEntryRef) == sizeof(DirectoryEntryRef), + "OptionalDirectoryEntryRef must avoid size overhead"); -static_assert( - std::is_trivially_copyable<Optional<clang::DirectoryEntryRef>>::value, - "Optional<DirectoryEntryRef> should be trivially copyable"); +static_assert(std::is_trivially_copyable<OptionalDirectoryEntryRef>::value, + "OptionalDirectoryEntryRef should be trivially copyable"); } // end namespace optional_detail +} // namespace clang + +namespace llvm { + +template <> struct PointerLikeTypeTraits<clang::DirectoryEntryRef> { + static inline void *getAsVoidPointer(clang::DirectoryEntryRef Dir) { + return const_cast<clang::DirectoryEntryRef::MapEntry *>(&Dir.getMapEntry()); + } + + static inline clang::DirectoryEntryRef getFromVoidPointer(void *Ptr) { + return clang::DirectoryEntryRef( + *reinterpret_cast<const clang::DirectoryEntryRef::MapEntry *>(Ptr)); + } + + static constexpr int NumLowBitsAvailable = PointerLikeTypeTraits< + const clang::DirectoryEntryRef::MapEntry *>::NumLowBitsAvailable; +}; /// Specialisation of DenseMapInfo for DirectoryEntryRef. template <> struct DenseMapInfo<clang::DirectoryEntryRef> { @@ -222,76 +245,4 @@ template <> struct DenseMapInfo<clang::DirectoryEntryRef> { } // end namespace llvm -namespace clang { - -/// Wrapper around Optional<DirectoryEntryRef> that degrades to 'const -/// DirectoryEntry*', facilitating incremental patches to propagate -/// DirectoryEntryRef. -/// -/// This class can be used as return value or field where it's convenient for -/// an Optional<DirectoryEntryRef> to degrade to a 'const DirectoryEntry*'. The -/// purpose is to avoid code churn due to dances like the following: -/// \code -/// // Old code. -/// lvalue = rvalue; -/// -/// // Temporary code from an incremental patch. -/// Optional<DirectoryEntryRef> MaybeF = rvalue; -/// lvalue = MaybeF ? &MaybeF.getDirectoryEntry() : nullptr; -/// -/// // Final code. -/// lvalue = rvalue; -/// \endcode -/// -/// FIXME: Once DirectoryEntryRef is "everywhere" and DirectoryEntry::LastRef -/// and DirectoryEntry::getName have been deleted, delete this class and -/// replace instances with Optional<DirectoryEntryRef>. -class OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr - : public Optional<DirectoryEntryRef> { -public: - OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr() = default; - OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr( - OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr &&) = default; - OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr( - const OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr &) = default; - OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr & - operator=(OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr &&) = default; - OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr & - operator=(const OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr &) = default; - - OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr(llvm::NoneType) {} - OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr(DirectoryEntryRef Ref) - : Optional<DirectoryEntryRef>(Ref) {} - OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr(Optional<DirectoryEntryRef> MaybeRef) - : Optional<DirectoryEntryRef>(MaybeRef) {} - - OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr &operator=(llvm::NoneType) { - Optional<DirectoryEntryRef>::operator=(None); - return *this; - } - OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr &operator=(DirectoryEntryRef Ref) { - Optional<DirectoryEntryRef>::operator=(Ref); - return *this; - } - OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr & - operator=(Optional<DirectoryEntryRef> MaybeRef) { - Optional<DirectoryEntryRef>::operator=(MaybeRef); - return *this; - } - - /// Degrade to 'const DirectoryEntry *' to allow DirectoryEntry::LastRef and - /// DirectoryEntry::getName have been deleted, delete this class and replace - /// instances with Optional<DirectoryEntryRef> - operator const DirectoryEntry *() const { - return hasValue() ? &getValue().getDirEntry() : nullptr; - } -}; - -static_assert(std::is_trivially_copyable< - OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr>::value, - "OptionalDirectoryEntryRefDegradesToDirectoryEntryPtr should be " - "trivially copyable"); - -} // end namespace clang - #endif // LLVM_CLANG_BASIC_DIRECTORYENTRY_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/ExceptionSpecificationType.h b/contrib/llvm-project/clang/include/clang/Basic/ExceptionSpecificationType.h index 5616860555c8..d3c9e9cd063b 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/ExceptionSpecificationType.h +++ b/contrib/llvm-project/clang/include/clang/Basic/ExceptionSpecificationType.h @@ -50,6 +50,11 @@ inline bool isUnresolvedExceptionSpec(ExceptionSpecificationType ESpecType) { return ESpecType == EST_Unevaluated || ESpecType == EST_Uninstantiated; } +inline bool isExplicitThrowExceptionSpec(ExceptionSpecificationType ESpecType) { + return ESpecType == EST_Dynamic || ESpecType == EST_MSAny || + ESpecType == EST_NoexceptFalse; +} + /// Possible results from evaluation of a noexcept expression. enum CanThrowResult { CT_Cannot, diff --git a/contrib/llvm-project/clang/include/clang/Basic/FPOptions.def b/contrib/llvm-project/clang/include/clang/Basic/FPOptions.def index a93fa475cd5f..79f04c89c9fe 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/FPOptions.def +++ b/contrib/llvm-project/clang/include/clang/Basic/FPOptions.def @@ -14,13 +14,19 @@ // OPTION(name, type, width, previousName) OPTION(FPContractMode, LangOptions::FPModeKind, 2, First) -OPTION(RoundingMode, LangOptions::RoundingMode, 3, FPContractMode) -OPTION(FPExceptionMode, LangOptions::FPExceptionModeKind, 2, RoundingMode) -OPTION(AllowFEnvAccess, bool, 1, FPExceptionMode) +OPTION(RoundingMath, bool, 1, FPContractMode) +OPTION(ConstRoundingMode, LangOptions::RoundingMode, 3, RoundingMath) +OPTION(SpecifiedExceptionMode, LangOptions::FPExceptionModeKind, 2, ConstRoundingMode) +OPTION(AllowFEnvAccess, bool, 1, SpecifiedExceptionMode) OPTION(AllowFPReassociate, bool, 1, AllowFEnvAccess) OPTION(NoHonorNaNs, bool, 1, AllowFPReassociate) OPTION(NoHonorInfs, bool, 1, NoHonorNaNs) OPTION(NoSignedZero, bool, 1, NoHonorInfs) OPTION(AllowReciprocal, bool, 1, NoSignedZero) OPTION(AllowApproxFunc, bool, 1, AllowReciprocal) +OPTION(FPEvalMethod, LangOptions::FPEvalMethodKind, 2, AllowApproxFunc) +OPTION(Float16ExcessPrecision, LangOptions::ExcessPrecisionKind, 2, FPEvalMethod) +OPTION(BFloat16ExcessPrecision, LangOptions::ExcessPrecisionKind, 2, Float16ExcessPrecision) +OPTION(MathErrno, bool, 1, BFloat16ExcessPrecision) +OPTION(ComplexRange, LangOptions::ComplexRangeKind, 2, MathErrno) #undef OPTION diff --git a/contrib/llvm-project/clang/include/clang/Basic/Features.def b/contrib/llvm-project/clang/include/clang/Basic/Features.def index 6ca0e646b865..5fad5fc3623c 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Features.def +++ b/contrib/llvm-project/clang/include/clang/Basic/Features.def @@ -45,7 +45,12 @@ FEATURE(leak_sanitizer, FEATURE(hwaddress_sanitizer, LangOpts.Sanitize.hasOneOf(SanitizerKind::HWAddress | SanitizerKind::KernelHWAddress)) -FEATURE(memtag_sanitizer, LangOpts.Sanitize.has(SanitizerKind::MemTag)) +FEATURE(memtag_stack, + LangOpts.Sanitize.has(SanitizerKind::MemtagStack)) +FEATURE(memtag_heap, + LangOpts.Sanitize.has(SanitizerKind::MemtagHeap)) +FEATURE(memtag_globals, + LangOpts.Sanitize.has(SanitizerKind::MemtagGlobals)) FEATURE(xray_instrument, LangOpts.XRayInstrument) FEATURE(undefined_behavior_sanitizer, LangOpts.Sanitize.hasOneOf(SanitizerKind::Undefined)) @@ -58,6 +63,7 @@ FEATURE(attribute_availability_app_extension, true) FEATURE(attribute_availability_with_version_underscores, true) FEATURE(attribute_availability_tvos, true) FEATURE(attribute_availability_watchos, true) +FEATURE(attribute_availability_driverkit, true) FEATURE(attribute_availability_with_strict, true) FEATURE(attribute_availability_with_replacement, true) FEATURE(attribute_availability_in_templates, true) @@ -83,6 +89,8 @@ FEATURE(blocks, LangOpts.Blocks) FEATURE(c_thread_safety_attributes, true) FEATURE(cxx_exceptions, LangOpts.CXXExceptions) FEATURE(cxx_rtti, LangOpts.RTTI &&LangOpts.RTTIData) +EXTENSION(define_target_os_macros, + PP.getPreprocessorOpts().DefineTargetOSMacros) FEATURE(enumerator_attributes, true) FEATURE(nullability, true) FEATURE(nullability_on_arrays, true) @@ -96,6 +104,7 @@ FEATURE(scudo, LangOpts.Sanitize.hasOneOf(SanitizerKind::Scudo)) FEATURE(swiftasynccc, PP.getTargetInfo().checkCallingConvention(CC_SwiftAsync) == clang::TargetInfo::CCCR_OK) +FEATURE(pragma_stdc_cx_limited_range, true) // Objective-C features FEATURE(objc_arr, LangOpts.ObjCAutoRefCount) // FIXME: REMOVE? FEATURE(objc_arc, LangOpts.ObjCAutoRefCount) @@ -222,22 +231,29 @@ FEATURE(is_trivially_assignable, LangOpts.CPlusPlus) FEATURE(is_trivially_constructible, LangOpts.CPlusPlus) FEATURE(is_trivially_copyable, LangOpts.CPlusPlus) FEATURE(is_union, LangOpts.CPlusPlus) +FEATURE(kcfi, LangOpts.Sanitize.has(SanitizerKind::KCFI)) FEATURE(modules, LangOpts.Modules) FEATURE(safe_stack, LangOpts.Sanitize.has(SanitizerKind::SafeStack)) FEATURE(shadow_call_stack, LangOpts.Sanitize.has(SanitizerKind::ShadowCallStack)) FEATURE(tls, PP.getTargetInfo().isTLSSupported()) FEATURE(underlying_type, LangOpts.CPlusPlus) +FEATURE(experimental_library, LangOpts.ExperimentalLibrary) // C11 features supported by other languages as extensions. EXTENSION(c_alignas, true) EXTENSION(c_alignof, true) EXTENSION(c_atomic, true) EXTENSION(c_generic_selections, true) +EXTENSION(c_generic_selection_with_controlling_type, true) EXTENSION(c_static_assert, true) EXTENSION(c_thread_local, PP.getTargetInfo().isTLSSupported()) +// C23 features supported by other languages as extensions +EXTENSION(c_attributes, true) // C++11 features supported by other languages as extensions. EXTENSION(cxx_atomic, LangOpts.CPlusPlus) +EXTENSION(cxx_default_function_template_args, LangOpts.CPlusPlus) +EXTENSION(cxx_defaulted_functions, LangOpts.CPlusPlus) EXTENSION(cxx_deleted_functions, LangOpts.CPlusPlus) EXTENSION(cxx_explicit_conversions, LangOpts.CPlusPlus) EXTENSION(cxx_inline_namespaces, LangOpts.CPlusPlus) @@ -253,6 +269,10 @@ EXTENSION(cxx_fixed_enum, true) EXTENSION(cxx_binary_literals, true) EXTENSION(cxx_init_captures, LangOpts.CPlusPlus11) EXTENSION(cxx_variable_templates, LangOpts.CPlusPlus) +//C++20 +EXTENSION(cxx_generalized_nttp, LangOpts.CPlusPlus20) +//C++23 +EXTENSION(cxx_explicit_this_parameter, LangOpts.CPlusPlus23) // Miscellaneous language extensions EXTENSION(overloadable_unmarked, true) EXTENSION(pragma_clang_attribute_namespaces, true) @@ -260,11 +280,17 @@ EXTENSION(pragma_clang_attribute_external_declaration, true) EXTENSION(statement_attributes_with_gnu_syntax, true) EXTENSION(gnu_asm, LangOpts.GNUAsm) EXTENSION(gnu_asm_goto_with_outputs, LangOpts.GNUAsm) +EXTENSION(gnu_asm_goto_with_outputs_full, LangOpts.GNUAsm) EXTENSION(matrix_types, LangOpts.MatrixTypes) EXTENSION(matrix_types_scalar_division, true) EXTENSION(cxx_attributes_on_using_declarations, LangOpts.CPlusPlus11) +EXTENSION(datasizeof, LangOpts.CPlusPlus) FEATURE(cxx_abi_relative_vtable, LangOpts.CPlusPlus && LangOpts.RelativeCXXABIVTables) +// CUDA/HIP Features +FEATURE(cuda_noinline_keyword, LangOpts.CUDA) +EXTENSION(cuda_implicit_host_device_templates, LangOpts.CUDA && LangOpts.OffloadImplicitHostDeviceTemplates) + #undef EXTENSION #undef FEATURE diff --git a/contrib/llvm-project/clang/include/clang/Basic/FileEntry.h b/contrib/llvm-project/clang/include/clang/Basic/FileEntry.h index 6e91b42e18b7..35efa147950f 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/FileEntry.h +++ b/contrib/llvm-project/clang/include/clang/Basic/FileEntry.h @@ -14,6 +14,7 @@ #ifndef LLVM_CLANG_BASIC_FILEENTRY_H #define LLVM_CLANG_BASIC_FILEENTRY_H +#include "clang/Basic/CustomizableOptional.h" #include "clang/Basic/DirectoryEntry.h" #include "clang/Basic/LLVM.h" #include "llvm/ADT/DenseMapInfo.h" @@ -24,6 +25,9 @@ #include "llvm/Support/ErrorOr.h" #include "llvm/Support/FileSystem/UniqueID.h" +#include <optional> +#include <utility> + namespace llvm { class MemoryBuffer; @@ -39,19 +43,12 @@ namespace clang { class FileEntryRef; -} // namespace clang - -namespace llvm { namespace optional_detail { /// Forward declare a template specialization for OptionalStorage. -template <> -class OptionalStorage<clang::FileEntryRef, /*is_trivially_copyable*/ true>; +template <> class OptionalStorage<clang::FileEntryRef>; } // namespace optional_detail -} // namespace llvm - -namespace clang { class FileEntry; @@ -59,13 +56,22 @@ class FileEntry; /// accessed by the FileManager's client. class FileEntryRef { public: - StringRef getName() const { return ME->first(); } + /// The name of this FileEntry. If a VFS uses 'use-external-name', this is + /// the redirected name. See getRequestedName(). + StringRef getName() const { return getBaseMapEntry().first(); } + + /// The name of this FileEntry, as originally requested without applying any + /// remappings for VFS 'use-external-name'. + /// + /// FIXME: this should be the semantics of getName(). See comment in + /// FileManager::getFileRef(). + StringRef getNameAsRequested() const { return ME->first(); } + const FileEntry &getFileEntry() const { - return *ME->second->V.get<FileEntry *>(); + return *getBaseMapEntry().second->V.get<FileEntry *>(); } - DirectoryEntryRef getDir() const { return *ME->second->Dir; } + DirectoryEntryRef getDir() const { return ME->second->Dir; } - inline bool isValid() const; inline off_t getSize() const; inline unsigned getUID() const; inline const llvm::sys::fs::UniqueID &getUniqueID() const; @@ -112,17 +118,14 @@ public: /// VFSs that use external names. In that case, the \c FileEntryRef /// returned by the \c FileManager will have the external name, and not the /// name that was used to lookup the file. - /// - /// The second type is really a `const MapEntry *`, but that confuses - /// gcc5.3. Once that's no longer supported, change this back. - llvm::PointerUnion<FileEntry *, const void *> V; + llvm::PointerUnion<FileEntry *, const MapEntry *> V; - /// Directory the file was found in. Set if and only if V is a FileEntry. - Optional<DirectoryEntryRef> Dir; + /// Directory the file was found in. + DirectoryEntryRef Dir; MapValue() = delete; MapValue(FileEntry &FE, DirectoryEntryRef Dir) : V(&FE), Dir(Dir) {} - MapValue(MapEntry &ME) : V(&ME) {} + MapValue(MapEntry &ME, DirectoryEntryRef Dir) : V(&ME), Dir(Dir) {} }; /// Check if RHS referenced the file in exactly the same way. @@ -151,13 +154,20 @@ public: explicit FileEntryRef(const MapEntry &ME) : ME(&ME) { assert(ME.second && "Expected payload"); assert(ME.second->V && "Expected non-null"); - assert(ME.second->V.is<FileEntry *>() && "Expected FileEntry"); } /// Expose the underlying MapEntry to simplify packing in a PointerIntPair or /// PointerUnion and allow construction in Optional. const clang::FileEntryRef::MapEntry &getMapEntry() const { return *ME; } + /// Retrieve the base MapEntry after redirects. + const MapEntry &getBaseMapEntry() const { + const MapEntry *Base = ME; + while (const auto *Next = Base->second->V.dyn_cast<const MapEntry *>()) + Base = Next; + return *Base; + } + private: friend class FileMgr::MapEntryOptionalStorage<FileEntryRef>; struct optional_none_tag {}; @@ -189,9 +199,8 @@ static_assert(sizeof(FileEntryRef) == sizeof(const FileEntry *), static_assert(std::is_trivially_copyable<FileEntryRef>::value, "FileEntryRef must be trivially copyable"); -} // end namespace clang +using OptionalFileEntryRef = CustomizableOptional<FileEntryRef>; -namespace llvm { namespace optional_detail { /// Customize OptionalStorage<FileEntryRef> to use FileEntryRef and its @@ -206,8 +215,8 @@ public: OptionalStorage() = default; template <class... ArgTypes> - explicit OptionalStorage(in_place_t, ArgTypes &&...Args) - : StorageImpl(in_place_t{}, std::forward<ArgTypes>(Args)...) {} + explicit OptionalStorage(std::in_place_t, ArgTypes &&...Args) + : StorageImpl(std::in_place_t{}, std::forward<ArgTypes>(Args)...) {} OptionalStorage &operator=(clang::FileEntryRef Ref) { StorageImpl::operator=(Ref); @@ -215,14 +224,16 @@ public: } }; -static_assert(sizeof(Optional<clang::FileEntryRef>) == - sizeof(clang::FileEntryRef), - "Optional<FileEntryRef> must avoid size overhead"); +static_assert(sizeof(OptionalFileEntryRef) == sizeof(FileEntryRef), + "OptionalFileEntryRef must avoid size overhead"); -static_assert(std::is_trivially_copyable<Optional<clang::FileEntryRef>>::value, - "Optional<FileEntryRef> should be trivially copyable"); +static_assert(std::is_trivially_copyable<OptionalFileEntryRef>::value, + "OptionalFileEntryRef should be trivially copyable"); } // end namespace optional_detail +} // namespace clang + +namespace llvm { /// Specialisation of DenseMapInfo for FileEntryRef. template <> struct DenseMapInfo<clang::FileEntryRef> { @@ -250,78 +261,36 @@ template <> struct DenseMapInfo<clang::FileEntryRef> { // It's safe to use operator==. return LHS == RHS; } + + /// Support for finding `const FileEntry *` in a `DenseMap<FileEntryRef, T>`. + /// @{ + static unsigned getHashValue(const clang::FileEntry *Val) { + return llvm::hash_value(Val); + } + static bool isEqual(const clang::FileEntry *LHS, clang::FileEntryRef RHS) { + if (RHS.isSpecialDenseMapKey()) + return false; + return LHS == RHS; + } + /// @} }; } // end namespace llvm namespace clang { -/// Wrapper around Optional<FileEntryRef> that degrades to 'const FileEntry*', -/// facilitating incremental patches to propagate FileEntryRef. -/// -/// This class can be used as return value or field where it's convenient for -/// an Optional<FileEntryRef> to degrade to a 'const FileEntry*'. The purpose -/// is to avoid code churn due to dances like the following: -/// \code -/// // Old code. -/// lvalue = rvalue; -/// -/// // Temporary code from an incremental patch. -/// Optional<FileEntryRef> MaybeF = rvalue; -/// lvalue = MaybeF ? &MaybeF.getFileEntry() : nullptr; -/// -/// // Final code. -/// lvalue = rvalue; -/// \endcode -/// -/// FIXME: Once FileEntryRef is "everywhere" and FileEntry::LastRef and -/// FileEntry::getName have been deleted, delete this class and replace -/// instances with Optional<FileEntryRef>. -class OptionalFileEntryRefDegradesToFileEntryPtr - : public Optional<FileEntryRef> { -public: - OptionalFileEntryRefDegradesToFileEntryPtr() = default; - OptionalFileEntryRefDegradesToFileEntryPtr( - OptionalFileEntryRefDegradesToFileEntryPtr &&) = default; - OptionalFileEntryRefDegradesToFileEntryPtr( - const OptionalFileEntryRefDegradesToFileEntryPtr &) = default; - OptionalFileEntryRefDegradesToFileEntryPtr & - operator=(OptionalFileEntryRefDegradesToFileEntryPtr &&) = default; - OptionalFileEntryRefDegradesToFileEntryPtr & - operator=(const OptionalFileEntryRefDegradesToFileEntryPtr &) = default; - - OptionalFileEntryRefDegradesToFileEntryPtr(llvm::NoneType) {} - OptionalFileEntryRefDegradesToFileEntryPtr(FileEntryRef Ref) - : Optional<FileEntryRef>(Ref) {} - OptionalFileEntryRefDegradesToFileEntryPtr(Optional<FileEntryRef> MaybeRef) - : Optional<FileEntryRef>(MaybeRef) {} - - OptionalFileEntryRefDegradesToFileEntryPtr &operator=(llvm::NoneType) { - Optional<FileEntryRef>::operator=(None); - return *this; - } - OptionalFileEntryRefDegradesToFileEntryPtr &operator=(FileEntryRef Ref) { - Optional<FileEntryRef>::operator=(Ref); - return *this; - } - OptionalFileEntryRefDegradesToFileEntryPtr & - operator=(Optional<FileEntryRef> MaybeRef) { - Optional<FileEntryRef>::operator=(MaybeRef); - return *this; - } - - /// Degrade to 'const FileEntry *' to allow FileEntry::LastRef and - /// FileEntry::getName have been deleted, delete this class and replace - /// instances with Optional<FileEntryRef> - operator const FileEntry *() const { - return hasValue() ? &getValue().getFileEntry() : nullptr; - } -}; - -static_assert( - std::is_trivially_copyable< - OptionalFileEntryRefDegradesToFileEntryPtr>::value, - "OptionalFileEntryRefDegradesToFileEntryPtr should be trivially copyable"); +inline bool operator==(const FileEntry *LHS, const OptionalFileEntryRef &RHS) { + return LHS == (RHS ? &RHS->getFileEntry() : nullptr); +} +inline bool operator==(const OptionalFileEntryRef &LHS, const FileEntry *RHS) { + return (LHS ? &LHS->getFileEntry() : nullptr) == RHS; +} +inline bool operator!=(const FileEntry *LHS, const OptionalFileEntryRef &RHS) { + return !(LHS == RHS); +} +inline bool operator!=(const OptionalFileEntryRef &LHS, const FileEntry *RHS) { + return !(LHS == RHS); +} /// Cached information about one file (either on disk /// or in the virtual file system). @@ -330,6 +299,10 @@ static_assert( /// descriptor for the file. class FileEntry { friend class FileManager; + friend class FileEntryTestHelper; + FileEntry(); + FileEntry(const FileEntry &) = delete; + FileEntry &operator=(const FileEntry &) = delete; std::string RealPathName; // Real path to the file; could be empty. off_t Size = 0; // File size in bytes. @@ -338,7 +311,6 @@ class FileEntry { llvm::sys::fs::UniqueID UniqueID; unsigned UID = 0; // A unique (small) ID for the file. bool IsNamedPipe = false; - bool IsValid = false; // Is this \c FileEntry initialized and valid? /// The open file, if it is owned by the \p FileEntry. mutable std::unique_ptr<llvm::vfs::File> File; @@ -352,20 +324,14 @@ class FileEntry { // default constructor). It should always have a value in practice. // // TODO: remove this once everyone that needs a name uses FileEntryRef. - Optional<FileEntryRef> LastRef; + OptionalFileEntryRef LastRef; public: - FileEntry(); ~FileEntry(); - - FileEntry(const FileEntry &) = delete; - FileEntry &operator=(const FileEntry &) = delete; - + LLVM_DEPRECATED("Use FileEntryRef::getName() instead.", "") StringRef getName() const { return LastRef->getName(); } - FileEntryRef getLastRef() const { return *LastRef; } StringRef tryGetRealPathName() const { return RealPathName; } - bool isValid() const { return IsValid; } off_t getSize() const { return Size; } unsigned getUID() const { return UID; } const llvm::sys::fs::UniqueID &getUniqueID() const { return UniqueID; } @@ -374,8 +340,6 @@ public: /// Return the directory the file lives in. const DirectoryEntry *getDir() const { return Dir; } - bool operator<(const FileEntry &RHS) const { return UniqueID < RHS.UniqueID; } - /// Check whether the file is a named pipe (and thus can't be opened by /// the native FileManager methods). bool isNamedPipe() const { return IsNamedPipe; } @@ -383,8 +347,6 @@ public: void closeFile() const; }; -bool FileEntryRef::isValid() const { return getFileEntry().isValid(); } - off_t FileEntryRef::getSize() const { return getFileEntry().getSize(); } unsigned FileEntryRef::getUID() const { return getFileEntry().getUID(); } diff --git a/contrib/llvm-project/clang/include/clang/Basic/FileManager.h b/contrib/llvm-project/clang/include/clang/Basic/FileManager.h index 974771a8f8f3..56cb093dd8c3 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/FileManager.h +++ b/contrib/llvm-project/clang/include/clang/Basic/FileManager.h @@ -53,24 +53,26 @@ class FileSystemStatCache; class FileManager : public RefCountedBase<FileManager> { IntrusiveRefCntPtr<llvm::vfs::FileSystem> FS; FileSystemOptions FileSystemOpts; + llvm::SpecificBumpPtrAllocator<FileEntry> FilesAlloc; + llvm::SpecificBumpPtrAllocator<DirectoryEntry> DirsAlloc; /// Cache for existing real directories. - std::map<llvm::sys::fs::UniqueID, DirectoryEntry> UniqueRealDirs; + llvm::DenseMap<llvm::sys::fs::UniqueID, DirectoryEntry *> UniqueRealDirs; /// Cache for existing real files. - std::map<llvm::sys::fs::UniqueID, FileEntry> UniqueRealFiles; + llvm::DenseMap<llvm::sys::fs::UniqueID, FileEntry *> UniqueRealFiles; /// The virtual directories that we have allocated. /// /// For each virtual file (e.g. foo/bar/baz.cpp), we add all of its parent /// directories (foo/ and foo/bar/) here. - SmallVector<std::unique_ptr<DirectoryEntry>, 4> VirtualDirectoryEntries; + SmallVector<DirectoryEntry *, 4> VirtualDirectoryEntries; /// The virtual files that we have allocated. - SmallVector<std::unique_ptr<FileEntry>, 4> VirtualFileEntries; + SmallVector<FileEntry *, 4> VirtualFileEntries; /// A set of files that bypass the maps and uniquing. They can have /// conflicting filenames. - SmallVector<std::unique_ptr<FileEntry>, 0> BypassFileEntries; + SmallVector<FileEntry *, 0> BypassFileEntries; /// A cache that maps paths to directory entries (either real or /// virtual) we have looked up, or an error that occurred when we looked up @@ -100,7 +102,7 @@ class FileManager : public RefCountedBase<FileManager> { SeenBypassFileEntries; /// The file entry for stdin, if it has been accessed through the FileManager. - Optional<FileEntryRef> STDIN; + OptionalFileEntryRef STDIN; /// The canonical names of files and directories . llvm::DenseMap<const void *, llvm::StringRef> CanonicalNames; @@ -164,8 +166,8 @@ public: bool CacheFailure = true); /// Get a \c DirectoryEntryRef if it exists, without doing anything on error. - llvm::Optional<DirectoryEntryRef> - getOptionalDirectoryRef(StringRef DirName, bool CacheFailure = true) { + OptionalDirectoryEntryRef getOptionalDirectoryRef(StringRef DirName, + bool CacheFailure = true) { return llvm::expectedToOptional(getDirectoryRef(DirName, CacheFailure)); } @@ -229,9 +231,9 @@ public: llvm::Expected<FileEntryRef> getSTDIN(); /// Get a FileEntryRef if it exists, without doing anything on error. - llvm::Optional<FileEntryRef> getOptionalFileRef(StringRef Filename, - bool OpenFile = false, - bool CacheFailure = true) { + OptionalFileEntryRef getOptionalFileRef(StringRef Filename, + bool OpenFile = false, + bool CacheFailure = true) { return llvm::expectedToOptional( getFileRef(Filename, OpenFile, CacheFailure)); } @@ -241,6 +243,10 @@ public: const FileSystemOptions &getFileSystemOpts() const { return FileSystemOpts; } llvm::vfs::FileSystem &getVirtualFileSystem() const { return *FS; } + llvm::IntrusiveRefCntPtr<llvm::vfs::FileSystem> + getVirtualFileSystemPtr() const { + return FS; + } void setVirtualFileSystem(IntrusiveRefCntPtr<llvm::vfs::FileSystem> FS) { this->FS = std::move(FS); @@ -264,12 +270,12 @@ public: /// bypasses all mapping and uniquing, blindly creating a new FileEntry. /// There is no attempt to deduplicate these; if you bypass the same file /// twice, you get two new file entries. - llvm::Optional<FileEntryRef> getBypassFile(FileEntryRef VFE); + OptionalFileEntryRef getBypassFile(FileEntryRef VFE); /// Open the specified file as a MemoryBuffer, returning a new /// MemoryBuffer if successful, otherwise returning null. llvm::ErrorOr<std::unique_ptr<llvm::MemoryBuffer>> - getBufferForFile(const FileEntry *Entry, bool isVolatile = false, + getBufferForFile(FileEntryRef Entry, bool isVolatile = false, bool RequiresNullTerminator = true); llvm::ErrorOr<std::unique_ptr<llvm::MemoryBuffer>> getBufferForFile(StringRef Filename, bool isVolatile = false, @@ -305,24 +311,31 @@ public: bool makeAbsolutePath(SmallVectorImpl<char> &Path) const; /// Produce an array mapping from the unique IDs assigned to each - /// file to the corresponding FileEntry pointer. - void GetUniqueIDMapping( - SmallVectorImpl<const FileEntry *> &UIDToFiles) const; + /// file to the corresponding FileEntryRef. + void + GetUniqueIDMapping(SmallVectorImpl<OptionalFileEntryRef> &UIDToFiles) const; /// Retrieve the canonical name for a given directory. /// /// This is a very expensive operation, despite its results being cached, /// and should only be used when the physical layout of the file system is /// required, which is (almost) never. - StringRef getCanonicalName(const DirectoryEntry *Dir); + StringRef getCanonicalName(DirectoryEntryRef Dir); /// Retrieve the canonical name for a given file. /// /// This is a very expensive operation, despite its results being cached, /// and should only be used when the physical layout of the file system is /// required, which is (almost) never. - StringRef getCanonicalName(const FileEntry *File); + StringRef getCanonicalName(FileEntryRef File); + +private: + /// Retrieve the canonical name for a given file or directory. + /// + /// The first param is a key in the CanonicalNames array. + StringRef getCanonicalName(const void *Entry, StringRef Name); +public: void PrintStats() const; }; diff --git a/contrib/llvm-project/clang/include/clang/Basic/FileSystemStatCache.h b/contrib/llvm-project/clang/include/clang/Basic/FileSystemStatCache.h index d37f2d507f83..5a003a748178 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/FileSystemStatCache.h +++ b/contrib/llvm-project/clang/include/clang/Basic/FileSystemStatCache.h @@ -23,6 +23,7 @@ #include <cstdint> #include <ctime> #include <memory> +#include <optional> #include <string> #include <utility> @@ -54,7 +55,7 @@ public: protected: // FIXME: The pointer here is a non-owning/optional reference to the - // unique_ptr. Optional<unique_ptr<vfs::File>&> might be nicer, but + // unique_ptr. std::optional<unique_ptr<vfs::File>&> might be nicer, but // Optional needs some work to support references so this isn't possible yet. virtual std::error_code getStat(StringRef Path, llvm::vfs::Status &Status, bool isFile, diff --git a/contrib/llvm-project/clang/include/clang/Basic/HLSLRuntime.h b/contrib/llvm-project/clang/include/clang/Basic/HLSLRuntime.h new file mode 100644 index 000000000000..03166805daa6 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/HLSLRuntime.h @@ -0,0 +1,66 @@ +//===- HLSLRuntime.h - HLSL Runtime -----------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +/// \file +/// Defines helper utilities for supporting the HLSL runtime environment. +// +//===----------------------------------------------------------------------===// + +#ifndef CLANG_BASIC_HLSLRUNTIME_H +#define CLANG_BASIC_HLSLRUNTIME_H + +#include "clang/Basic/LangOptions.h" +#include <cstdint> + +namespace clang { +namespace hlsl { + +constexpr ShaderStage +getStageFromEnvironment(const llvm::Triple::EnvironmentType &E) { + uint32_t Pipeline = + static_cast<uint32_t>(E) - static_cast<uint32_t>(llvm::Triple::Pixel); + + if (Pipeline > (uint32_t)ShaderStage::Invalid) + return ShaderStage::Invalid; + return static_cast<ShaderStage>(Pipeline); +} + +#define ENUM_COMPARE_ASSERT(Value) \ + static_assert( \ + getStageFromEnvironment(llvm::Triple::Value) == ShaderStage::Value, \ + "Mismatch between llvm::Triple and clang::ShaderStage for " #Value); + +ENUM_COMPARE_ASSERT(Pixel) +ENUM_COMPARE_ASSERT(Vertex) +ENUM_COMPARE_ASSERT(Geometry) +ENUM_COMPARE_ASSERT(Hull) +ENUM_COMPARE_ASSERT(Domain) +ENUM_COMPARE_ASSERT(Compute) +ENUM_COMPARE_ASSERT(Library) +ENUM_COMPARE_ASSERT(RayGeneration) +ENUM_COMPARE_ASSERT(Intersection) +ENUM_COMPARE_ASSERT(AnyHit) +ENUM_COMPARE_ASSERT(ClosestHit) +ENUM_COMPARE_ASSERT(Miss) +ENUM_COMPARE_ASSERT(Callable) +ENUM_COMPARE_ASSERT(Mesh) +ENUM_COMPARE_ASSERT(Amplification) + +static_assert(getStageFromEnvironment(llvm::Triple::UnknownEnvironment) == + ShaderStage::Invalid, + "Mismatch between llvm::Triple and " + "clang::ShaderStage for Invalid"); +static_assert(getStageFromEnvironment(llvm::Triple::MSVC) == + ShaderStage::Invalid, + "Mismatch between llvm::Triple and " + "clang::ShaderStage for Invalid"); + +} // namespace hlsl +} // namespace clang + +#endif // CLANG_BASIC_HLSLRUNTIME_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/HeaderInclude.h b/contrib/llvm-project/clang/include/clang/Basic/HeaderInclude.h new file mode 100644 index 000000000000..83c26543bbd3 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/HeaderInclude.h @@ -0,0 +1,73 @@ +//===--- HeaderInclude.h - Header Include -----------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +/// +/// \file +/// Defines enums used when emitting included header information. +/// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CLANG_BASIC_HEADERINCLUDEFORMATKIND_H +#define LLVM_CLANG_BASIC_HEADERINCLUDEFORMATKIND_H +#include "llvm/ADT/StringSwitch.h" +#include "llvm/Support/ErrorHandling.h" +#include <utility> + +namespace clang { +/// The format in which header information is emitted. +enum HeaderIncludeFormatKind { HIFMT_None, HIFMT_Textual, HIFMT_JSON }; + +/// Whether header information is filtered or not. If HIFIL_Only_Direct_System +/// is used, only information on system headers directly included from +/// non-system headers is emitted. +enum HeaderIncludeFilteringKind { HIFIL_None, HIFIL_Only_Direct_System }; + +inline HeaderIncludeFormatKind +stringToHeaderIncludeFormatKind(const char *Str) { + return llvm::StringSwitch<HeaderIncludeFormatKind>(Str) + .Case("textual", HIFMT_Textual) + .Case("json", HIFMT_JSON) + .Default(HIFMT_None); +} + +inline bool stringToHeaderIncludeFiltering(const char *Str, + HeaderIncludeFilteringKind &Kind) { + std::pair<bool, HeaderIncludeFilteringKind> P = + llvm::StringSwitch<std::pair<bool, HeaderIncludeFilteringKind>>(Str) + .Case("none", {true, HIFIL_None}) + .Case("only-direct-system", {true, HIFIL_Only_Direct_System}) + .Default({false, HIFIL_None}); + Kind = P.second; + return P.first; +} + +inline const char *headerIncludeFormatKindToString(HeaderIncludeFormatKind K) { + switch (K) { + case HIFMT_None: + llvm_unreachable("unexpected format kind"); + case HIFMT_Textual: + return "textual"; + case HIFMT_JSON: + return "json"; + } + llvm_unreachable("Unknown HeaderIncludeFormatKind enum"); +} + +inline const char * +headerIncludeFilteringKindToString(HeaderIncludeFilteringKind K) { + switch (K) { + case HIFIL_None: + return "none"; + case HIFIL_Only_Direct_System: + return "only-direct-system"; + } + llvm_unreachable("Unknown HeaderIncludeFilteringKind enum"); +} + +} // end namespace clang + +#endif // LLVM_CLANG_BASIC_HEADERINCLUDEFORMATKIND_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/IdentifierTable.h b/contrib/llvm-project/clang/include/clang/Basic/IdentifierTable.h index f2379c7ddfbd..1ac182d4fce2 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/IdentifierTable.h +++ b/contrib/llvm-project/clang/include/clang/Basic/IdentifierTable.h @@ -15,9 +15,13 @@ #ifndef LLVM_CLANG_BASIC_IDENTIFIERTABLE_H #define LLVM_CLANG_BASIC_IDENTIFIERTABLE_H +#include "clang/Basic/DiagnosticIDs.h" #include "clang/Basic/LLVM.h" #include "clang/Basic/TokenKinds.h" #include "llvm/ADT/DenseMapInfo.h" +#include "llvm/ADT/FoldingSet.h" +#include "llvm/ADT/PointerIntPair.h" +#include "llvm/ADT/PointerUnion.h" #include "llvm/ADT/SmallString.h" #include "llvm/ADT/StringMap.h" #include "llvm/ADT/StringRef.h" @@ -43,11 +47,34 @@ class SourceLocation; enum class ReservedIdentifierStatus { NotReserved = 0, StartsWithUnderscoreAtGlobalScope, + StartsWithUnderscoreAndIsExternC, StartsWithDoubleUnderscore, StartsWithUnderscoreFollowedByCapitalLetter, ContainsDoubleUnderscore, }; +enum class ReservedLiteralSuffixIdStatus { + NotReserved = 0, + NotStartsWithUnderscore, + ContainsDoubleUnderscore, +}; + +/// Determine whether an identifier is reserved for use as a name at global +/// scope. Such identifiers might be implementation-specific global functions +/// or variables. +inline bool isReservedAtGlobalScope(ReservedIdentifierStatus Status) { + return Status != ReservedIdentifierStatus::NotReserved; +} + +/// Determine whether an identifier is reserved in all contexts. Such +/// identifiers might be implementation-specific keywords or macros, for +/// example. +inline bool isReservedInAllContexts(ReservedIdentifierStatus Status) { + return Status != ReservedIdentifierStatus::NotReserved && + Status != ReservedIdentifierStatus::StartsWithUnderscoreAtGlobalScope && + Status != ReservedIdentifierStatus::StartsWithUnderscoreAndIsExternC; +} + /// A simple pair of identifier info and location. using IdentifierLocPair = std::pair<IdentifierInfo *, SourceLocation>; @@ -58,6 +85,21 @@ enum { IdentifierInfoAlignment = 8 }; static constexpr int ObjCOrBuiltinIDBits = 16; +/// The "layout" of ObjCOrBuiltinID is: +/// - The first value (0) represents "not a special identifier". +/// - The next (NUM_OBJC_KEYWORDS - 1) values represent ObjCKeywordKinds (not +/// including objc_not_keyword). +/// - The next (NUM_INTERESTING_IDENTIFIERS - 1) values represent +/// InterestingIdentifierKinds (not including not_interesting). +/// - The rest of the values represent builtin IDs (not including NotBuiltin). +static constexpr int FirstObjCKeywordID = 1; +static constexpr int LastObjCKeywordID = + FirstObjCKeywordID + tok::NUM_OBJC_KEYWORDS - 2; +static constexpr int FirstInterestingIdentifierID = LastObjCKeywordID + 1; +static constexpr int LastInterestingIdentifierID = + FirstInterestingIdentifierID + tok::NUM_INTERESTING_IDENTIFIERS - 2; +static constexpr int FirstBuiltinID = LastInterestingIdentifierID + 1; + /// One of these records is kept for each identifier that /// is lexed. This contains information about whether the token was \#define'd, /// is a language keyword, or if it is a front-end token of some sort (e.g. a @@ -68,6 +110,7 @@ class alignas(IdentifierInfoAlignment) IdentifierInfo { friend class IdentifierTable; // Front-end token ID or tok::identifier. + LLVM_PREFERRED_TYPE(tok::TokenKind) unsigned TokenID : 9; // ObjC keyword ('protocol' in '@protocol') or builtin (__builtin_inf). @@ -76,52 +119,78 @@ class alignas(IdentifierInfoAlignment) IdentifierInfo { unsigned ObjCOrBuiltinID : ObjCOrBuiltinIDBits; // True if there is a #define for this. + LLVM_PREFERRED_TYPE(bool) unsigned HasMacro : 1; // True if there was a #define for this. + LLVM_PREFERRED_TYPE(bool) unsigned HadMacro : 1; // True if the identifier is a language extension. + LLVM_PREFERRED_TYPE(bool) unsigned IsExtension : 1; // True if the identifier is a keyword in a newer or proposed Standard. + LLVM_PREFERRED_TYPE(bool) unsigned IsFutureCompatKeyword : 1; // True if the identifier is poisoned. + LLVM_PREFERRED_TYPE(bool) unsigned IsPoisoned : 1; // True if the identifier is a C++ operator keyword. + LLVM_PREFERRED_TYPE(bool) unsigned IsCPPOperatorKeyword : 1; // Internal bit set by the member function RecomputeNeedsHandleIdentifier. // See comment about RecomputeNeedsHandleIdentifier for more info. + LLVM_PREFERRED_TYPE(bool) unsigned NeedsHandleIdentifier : 1; // True if the identifier was loaded (at least partially) from an AST file. + LLVM_PREFERRED_TYPE(bool) unsigned IsFromAST : 1; // True if the identifier has changed from the definition // loaded from an AST file. + LLVM_PREFERRED_TYPE(bool) unsigned ChangedAfterLoad : 1; // True if the identifier's frontend information has changed from the // definition loaded from an AST file. + LLVM_PREFERRED_TYPE(bool) unsigned FEChangedAfterLoad : 1; // True if revertTokenIDToIdentifier was called. + LLVM_PREFERRED_TYPE(bool) unsigned RevertedTokenID : 1; // True if there may be additional information about // this identifier stored externally. + LLVM_PREFERRED_TYPE(bool) unsigned OutOfDate : 1; // True if this is the 'import' contextual keyword. + LLVM_PREFERRED_TYPE(bool) unsigned IsModulesImport : 1; // True if this is a mangled OpenMP variant name. + LLVM_PREFERRED_TYPE(bool) unsigned IsMangledOpenMPVariantName : 1; - // 28 bits left in a 64-bit word. + // True if this is a deprecated macro. + LLVM_PREFERRED_TYPE(bool) + unsigned IsDeprecatedMacro : 1; + + // True if this macro is unsafe in headers. + LLVM_PREFERRED_TYPE(bool) + unsigned IsRestrictExpansion : 1; + + // True if this macro is final. + LLVM_PREFERRED_TYPE(bool) + unsigned IsFinal : 1; + + // 22 bits left in a 64-bit word. // Managed by the language front-end. void *FETokenInfo = nullptr; @@ -134,7 +203,8 @@ class alignas(IdentifierInfoAlignment) IdentifierInfo { IsPoisoned(false), IsCPPOperatorKeyword(false), NeedsHandleIdentifier(false), IsFromAST(false), ChangedAfterLoad(false), FEChangedAfterLoad(false), RevertedTokenID(false), OutOfDate(false), - IsModulesImport(false), IsMangledOpenMPVariantName(false) {} + IsModulesImport(false), IsMangledOpenMPVariantName(false), + IsDeprecatedMacro(false), IsRestrictExpansion(false), IsFinal(false) {} public: IdentifierInfo(const IdentifierInfo &) = delete; @@ -182,6 +252,14 @@ public: NeedsHandleIdentifier = true; HadMacro = true; } else { + // If this is a final macro, make the deprecation and header unsafe bits + // stick around after the undefinition so they apply to any redefinitions. + if (!IsFinal) { + // Because calling the setters of these calls recomputes, just set them + // manually to avoid recomputing a bunch of times. + IsDeprecatedMacro = false; + IsRestrictExpansion = false; + } RecomputeNeedsHandleIdentifier(); } } @@ -192,6 +270,34 @@ public: return HadMacro; } + bool isDeprecatedMacro() const { return IsDeprecatedMacro; } + + void setIsDeprecatedMacro(bool Val) { + if (IsDeprecatedMacro == Val) + return; + IsDeprecatedMacro = Val; + if (Val) + NeedsHandleIdentifier = true; + else + RecomputeNeedsHandleIdentifier(); + } + + bool isRestrictExpansion() const { return IsRestrictExpansion; } + + void setIsRestrictExpansion(bool Val) { + if (IsRestrictExpansion == Val) + return; + IsRestrictExpansion = Val; + if (Val) + NeedsHandleIdentifier = true; + else + RecomputeNeedsHandleIdentifier(); + } + + bool isFinal() const { return IsFinal; } + + void setIsFinal(bool Val) { IsFinal = Val; } + /// If this is a source-language token (e.g. 'for'), this API /// can be used to cause the lexer to map identifiers to source-language /// tokens. @@ -226,7 +332,9 @@ public: /// /// For example, 'class' will return tok::objc_class if ObjC is enabled. tok::ObjCKeywordKind getObjCKeywordID() const { - if (ObjCOrBuiltinID < tok::NUM_OBJC_KEYWORDS) + static_assert(FirstObjCKeywordID == 1, + "hard-coding this assumption to simplify code"); + if (ObjCOrBuiltinID <= LastObjCKeywordID) return tok::ObjCKeywordKind(ObjCOrBuiltinID); else return tok::objc_not_keyword; @@ -237,15 +345,30 @@ public: /// /// 0 is not-built-in. 1+ are specific builtin functions. unsigned getBuiltinID() const { - if (ObjCOrBuiltinID >= tok::NUM_OBJC_KEYWORDS) - return ObjCOrBuiltinID - tok::NUM_OBJC_KEYWORDS; + if (ObjCOrBuiltinID >= FirstBuiltinID) + return 1 + (ObjCOrBuiltinID - FirstBuiltinID); else return 0; } void setBuiltinID(unsigned ID) { - ObjCOrBuiltinID = ID + tok::NUM_OBJC_KEYWORDS; - assert(ObjCOrBuiltinID - unsigned(tok::NUM_OBJC_KEYWORDS) == ID - && "ID too large for field!"); + assert(ID != 0); + ObjCOrBuiltinID = FirstBuiltinID + (ID - 1); + assert(getBuiltinID() == ID && "ID too large for field!"); + } + void clearBuiltinID() { ObjCOrBuiltinID = 0; } + + tok::InterestingIdentifierKind getInterestingIdentifierID() const { + if (ObjCOrBuiltinID >= FirstInterestingIdentifierID && + ObjCOrBuiltinID <= LastInterestingIdentifierID) + return tok::InterestingIdentifierKind( + 1 + (ObjCOrBuiltinID - FirstInterestingIdentifierID)); + else + return tok::not_interesting; + } + void setInterestingIdentifierID(unsigned ID) { + assert(ID != tok::not_interesting); + ObjCOrBuiltinID = FirstInterestingIdentifierID + (ID - 1); + assert(getInterestingIdentifierID() == ID && "ID too large for field!"); } unsigned getObjCOrBuiltinID() const { return ObjCOrBuiltinID; } @@ -388,13 +511,24 @@ public: /// function(<#int x#>); /// \endcode bool isEditorPlaceholder() const { - return getName().startswith("<#") && getName().endswith("#>"); + return getName().starts_with("<#") && getName().ends_with("#>"); } /// Determine whether \p this is a name reserved for the implementation (C99 /// 7.1.3, C++ [lib.global.names]). ReservedIdentifierStatus isReserved(const LangOptions &LangOpts) const; + /// Determine whether \p this is a name reserved for future standardization or + /// the implementation (C++ [usrlit.suffix]). + ReservedLiteralSuffixIdStatus isReservedLiteralSuffixId() const; + + /// If the identifier is an "uglified" reserved name, return a cleaned form. + /// e.g. _Foo => Foo. Otherwise, just returns the name. + StringRef deuglifiedName() const; + bool isPlaceholder() const { + return getLength() == 1 && getNameStart()[0] == '_'; + } + /// Provide less than operator for lexicographical sorting. bool operator<(const IdentifierInfo &RHS) const { return getName() < RHS.getName(); @@ -527,7 +661,7 @@ public: /// Return the identifier token info for the specified named /// identifier. IdentifierInfo &get(StringRef Name) { - auto &Entry = *HashTable.insert(std::make_pair(Name, nullptr)).first; + auto &Entry = *HashTable.try_emplace(Name, nullptr).first; IdentifierInfo *&II = Entry.second; if (II) return *II; @@ -601,6 +735,12 @@ public: /// Populate the identifier table with info about the language keywords /// for the language specified by \p LangOpts. void AddKeywords(const LangOptions &LangOpts); + + /// Returns the correct diagnostic to issue for a future-compat diagnostic + /// warning. Note, this function assumes the identifier passed has already + /// been determined to be a future compatible keyword. + diag::kind getFutureCompatDiagKind(const IdentifierInfo &II, + const LangOptions &LangOpts); }; /// A family of Objective-C methods. @@ -675,6 +815,121 @@ enum ObjCStringFormatFamily { SFF_CFString }; +namespace detail { + +/// DeclarationNameExtra is used as a base of various uncommon special names. +/// This class is needed since DeclarationName has not enough space to store +/// the kind of every possible names. Therefore the kind of common names is +/// stored directly in DeclarationName, and the kind of uncommon names is +/// stored in DeclarationNameExtra. It is aligned to 8 bytes because +/// DeclarationName needs the lower 3 bits to store the kind of common names. +/// DeclarationNameExtra is tightly coupled to DeclarationName and any change +/// here is very likely to require changes in DeclarationName(Table). +class alignas(IdentifierInfoAlignment) DeclarationNameExtra { + friend class clang::DeclarationName; + friend class clang::DeclarationNameTable; + +protected: + /// The kind of "extra" information stored in the DeclarationName. See + /// @c ExtraKindOrNumArgs for an explanation of how these enumerator values + /// are used. Note that DeclarationName depends on the numerical values + /// of the enumerators in this enum. See DeclarationName::StoredNameKind + /// for more info. + enum ExtraKind { + CXXDeductionGuideName, + CXXLiteralOperatorName, + CXXUsingDirective, + ObjCMultiArgSelector + }; + + /// ExtraKindOrNumArgs has one of the following meaning: + /// * The kind of an uncommon C++ special name. This DeclarationNameExtra + /// is in this case in fact either a CXXDeductionGuideNameExtra or + /// a CXXLiteralOperatorIdName. + /// + /// * It may be also name common to C++ using-directives (CXXUsingDirective), + /// + /// * Otherwise it is ObjCMultiArgSelector+NumArgs, where NumArgs is + /// the number of arguments in the Objective-C selector, in which + /// case the DeclarationNameExtra is also a MultiKeywordSelector. + unsigned ExtraKindOrNumArgs; + + DeclarationNameExtra(ExtraKind Kind) : ExtraKindOrNumArgs(Kind) {} + DeclarationNameExtra(unsigned NumArgs) + : ExtraKindOrNumArgs(ObjCMultiArgSelector + NumArgs) {} + + /// Return the corresponding ExtraKind. + ExtraKind getKind() const { + return static_cast<ExtraKind>(ExtraKindOrNumArgs > + (unsigned)ObjCMultiArgSelector + ? (unsigned)ObjCMultiArgSelector + : ExtraKindOrNumArgs); + } + + /// Return the number of arguments in an ObjC selector. Only valid when this + /// is indeed an ObjCMultiArgSelector. + unsigned getNumArgs() const { + assert(ExtraKindOrNumArgs >= (unsigned)ObjCMultiArgSelector && + "getNumArgs called but this is not an ObjC selector!"); + return ExtraKindOrNumArgs - (unsigned)ObjCMultiArgSelector; + } +}; + +} // namespace detail + +/// One of these variable length records is kept for each +/// selector containing more than one keyword. We use a folding set +/// to unique aggregate names (keyword selectors in ObjC parlance). Access to +/// this class is provided strictly through Selector. +class alignas(IdentifierInfoAlignment) MultiKeywordSelector + : public detail::DeclarationNameExtra, + public llvm::FoldingSetNode { + MultiKeywordSelector(unsigned nKeys) : DeclarationNameExtra(nKeys) {} + +public: + // Constructor for keyword selectors. + MultiKeywordSelector(unsigned nKeys, IdentifierInfo **IIV) + : DeclarationNameExtra(nKeys) { + assert((nKeys > 1) && "not a multi-keyword selector"); + + // Fill in the trailing keyword array. + IdentifierInfo **KeyInfo = reinterpret_cast<IdentifierInfo **>(this + 1); + for (unsigned i = 0; i != nKeys; ++i) + KeyInfo[i] = IIV[i]; + } + + // getName - Derive the full selector name and return it. + std::string getName() const; + + using DeclarationNameExtra::getNumArgs; + + using keyword_iterator = IdentifierInfo *const *; + + keyword_iterator keyword_begin() const { + return reinterpret_cast<keyword_iterator>(this + 1); + } + + keyword_iterator keyword_end() const { + return keyword_begin() + getNumArgs(); + } + + IdentifierInfo *getIdentifierInfoForSlot(unsigned i) const { + assert(i < getNumArgs() && "getIdentifierInfoForSlot(): illegal index"); + return keyword_begin()[i]; + } + + static void Profile(llvm::FoldingSetNodeID &ID, keyword_iterator ArgTys, + unsigned NumArgs) { + ID.AddInteger(NumArgs); + for (unsigned i = 0; i != NumArgs; ++i) + ID.AddPointer(ArgTys[i]); + } + + void Profile(llvm::FoldingSetNodeID &ID) { + Profile(ID, keyword_begin(), getNumArgs()); + } +}; + /// Smart pointer class that efficiently represents Objective-C method /// names. /// @@ -690,43 +945,58 @@ class Selector { enum IdentifierInfoFlag { // Empty selector = 0. Note that these enumeration values must // correspond to the enumeration values of DeclarationName::StoredNameKind - ZeroArg = 0x01, - OneArg = 0x02, + ZeroArg = 0x01, + OneArg = 0x02, + // IMPORTANT NOTE: see comments in InfoPtr (below) about this enumerator + // value. MultiArg = 0x07, - ArgFlags = 0x07 }; - /// A pointer to the MultiKeywordSelector or IdentifierInfo. We use the low - /// three bits of InfoPtr to store an IdentifierInfoFlag. Note that in any - /// case IdentifierInfo and MultiKeywordSelector are already aligned to - /// 8 bytes even on 32 bits archs because of DeclarationName. - uintptr_t InfoPtr = 0; + /// IMPORTANT NOTE: the order of the types in this PointerUnion are + /// important! The DeclarationName class has bidirectional conversion + /// to/from Selector through an opaque pointer (void *) which corresponds + /// to this PointerIntPair. The discriminator bit from the PointerUnion + /// corresponds to the high bit in the MultiArg enumerator. So while this + /// PointerIntPair only has two bits for the integer (and we mask off the + /// high bit in `MultiArg` when it is used), that discrimator bit is + /// still necessary for the opaque conversion. The discriminator bit + /// from the PointerUnion and the two integer bits from the + /// PointerIntPair are also exposed via the DeclarationName::StoredNameKind + /// enumeration; see the comments in DeclarationName.h for more details. + /// Do not reorder or add any arguments to this template + /// without thoroughly understanding how tightly coupled these classes are. + llvm::PointerIntPair< + llvm::PointerUnion<IdentifierInfo *, MultiKeywordSelector *>, 2> + InfoPtr; Selector(IdentifierInfo *II, unsigned nArgs) { - InfoPtr = reinterpret_cast<uintptr_t>(II); - assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); assert(nArgs < 2 && "nArgs not equal to 0/1"); - InfoPtr |= nArgs+1; + InfoPtr.setPointerAndInt(II, nArgs + 1); } Selector(MultiKeywordSelector *SI) { - InfoPtr = reinterpret_cast<uintptr_t>(SI); - assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); - InfoPtr |= MultiArg; + // IMPORTANT NOTE: we mask off the upper bit of this value because we only + // reserve two bits for the integer in the PointerIntPair. See the comments + // in `InfoPtr` for more details. + InfoPtr.setPointerAndInt(SI, MultiArg & 0b11); } IdentifierInfo *getAsIdentifierInfo() const { - if (getIdentifierInfoFlag() < MultiArg) - return reinterpret_cast<IdentifierInfo *>(InfoPtr & ~ArgFlags); - return nullptr; + return InfoPtr.getPointer().dyn_cast<IdentifierInfo *>(); } MultiKeywordSelector *getMultiKeywordSelector() const { - return reinterpret_cast<MultiKeywordSelector *>(InfoPtr & ~ArgFlags); + return InfoPtr.getPointer().get<MultiKeywordSelector *>(); } unsigned getIdentifierInfoFlag() const { - return InfoPtr & ArgFlags; + unsigned new_flags = InfoPtr.getInt(); + // IMPORTANT NOTE: We have to reconstitute this data rather than use the + // value directly from the PointerIntPair. See the comments in `InfoPtr` + // for more details. + if (InfoPtr.getPointer().is<MultiKeywordSelector *>()) + new_flags |= MultiArg; + return new_flags; } static ObjCMethodFamily getMethodFamilyImpl(Selector sel); @@ -737,31 +1007,27 @@ public: /// The default ctor should only be used when creating data structures that /// will contain selectors. Selector() = default; - explicit Selector(uintptr_t V) : InfoPtr(V) {} + explicit Selector(uintptr_t V) { + InfoPtr.setFromOpaqueValue(reinterpret_cast<void *>(V)); + } /// operator==/!= - Indicate whether the specified selectors are identical. bool operator==(Selector RHS) const { - return InfoPtr == RHS.InfoPtr; + return InfoPtr.getOpaqueValue() == RHS.InfoPtr.getOpaqueValue(); } bool operator!=(Selector RHS) const { - return InfoPtr != RHS.InfoPtr; + return InfoPtr.getOpaqueValue() != RHS.InfoPtr.getOpaqueValue(); } - void *getAsOpaquePtr() const { - return reinterpret_cast<void*>(InfoPtr); - } + void *getAsOpaquePtr() const { return InfoPtr.getOpaqueValue(); } /// Determine whether this is the empty selector. - bool isNull() const { return InfoPtr == 0; } + bool isNull() const { return InfoPtr.getOpaqueValue() == nullptr; } // Predicates to identify the selector type. - bool isKeywordSelector() const { - return getIdentifierInfoFlag() != ZeroArg; - } + bool isKeywordSelector() const { return InfoPtr.getInt() != ZeroArg; } - bool isUnarySelector() const { - return getIdentifierInfoFlag() == ZeroArg; - } + bool isUnarySelector() const { return InfoPtr.getInt() == ZeroArg; } /// If this selector is the specific keyword selector described by Names. bool isKeywordSelector(ArrayRef<StringRef> Names) const; @@ -872,68 +1138,6 @@ public: static std::string getPropertyNameFromSetterSelector(Selector Sel); }; -namespace detail { - -/// DeclarationNameExtra is used as a base of various uncommon special names. -/// This class is needed since DeclarationName has not enough space to store -/// the kind of every possible names. Therefore the kind of common names is -/// stored directly in DeclarationName, and the kind of uncommon names is -/// stored in DeclarationNameExtra. It is aligned to 8 bytes because -/// DeclarationName needs the lower 3 bits to store the kind of common names. -/// DeclarationNameExtra is tightly coupled to DeclarationName and any change -/// here is very likely to require changes in DeclarationName(Table). -class alignas(IdentifierInfoAlignment) DeclarationNameExtra { - friend class clang::DeclarationName; - friend class clang::DeclarationNameTable; - -protected: - /// The kind of "extra" information stored in the DeclarationName. See - /// @c ExtraKindOrNumArgs for an explanation of how these enumerator values - /// are used. Note that DeclarationName depends on the numerical values - /// of the enumerators in this enum. See DeclarationName::StoredNameKind - /// for more info. - enum ExtraKind { - CXXDeductionGuideName, - CXXLiteralOperatorName, - CXXUsingDirective, - ObjCMultiArgSelector - }; - - /// ExtraKindOrNumArgs has one of the following meaning: - /// * The kind of an uncommon C++ special name. This DeclarationNameExtra - /// is in this case in fact either a CXXDeductionGuideNameExtra or - /// a CXXLiteralOperatorIdName. - /// - /// * It may be also name common to C++ using-directives (CXXUsingDirective), - /// - /// * Otherwise it is ObjCMultiArgSelector+NumArgs, where NumArgs is - /// the number of arguments in the Objective-C selector, in which - /// case the DeclarationNameExtra is also a MultiKeywordSelector. - unsigned ExtraKindOrNumArgs; - - DeclarationNameExtra(ExtraKind Kind) : ExtraKindOrNumArgs(Kind) {} - DeclarationNameExtra(unsigned NumArgs) - : ExtraKindOrNumArgs(ObjCMultiArgSelector + NumArgs) {} - - /// Return the corresponding ExtraKind. - ExtraKind getKind() const { - return static_cast<ExtraKind>(ExtraKindOrNumArgs > - (unsigned)ObjCMultiArgSelector - ? (unsigned)ObjCMultiArgSelector - : ExtraKindOrNumArgs); - } - - /// Return the number of arguments in an ObjC selector. Only valid when this - /// is indeed an ObjCMultiArgSelector. - unsigned getNumArgs() const { - assert(ExtraKindOrNumArgs >= (unsigned)ObjCMultiArgSelector && - "getNumArgs called but this is not an ObjC selector!"); - return ExtraKindOrNumArgs - (unsigned)ObjCMultiArgSelector; - } -}; - -} // namespace detail - } // namespace clang namespace llvm { @@ -970,34 +1174,6 @@ struct PointerLikeTypeTraits<clang::Selector> { static constexpr int NumLowBitsAvailable = 0; }; -// Provide PointerLikeTypeTraits for IdentifierInfo pointers, which -// are not guaranteed to be 8-byte aligned. -template<> -struct PointerLikeTypeTraits<clang::IdentifierInfo*> { - static void *getAsVoidPointer(clang::IdentifierInfo* P) { - return P; - } - - static clang::IdentifierInfo *getFromVoidPointer(void *P) { - return static_cast<clang::IdentifierInfo*>(P); - } - - static constexpr int NumLowBitsAvailable = 1; -}; - -template<> -struct PointerLikeTypeTraits<const clang::IdentifierInfo*> { - static const void *getAsVoidPointer(const clang::IdentifierInfo* P) { - return P; - } - - static const clang::IdentifierInfo *getFromVoidPointer(const void *P) { - return static_cast<const clang::IdentifierInfo*>(P); - } - - static constexpr int NumLowBitsAvailable = 1; -}; - } // namespace llvm #endif // LLVM_CLANG_BASIC_IDENTIFIERTABLE_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/JsonSupport.h b/contrib/llvm-project/clang/include/clang/Basic/JsonSupport.h index 8b02e440df44..bcaa3d364444 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/JsonSupport.h +++ b/contrib/llvm-project/clang/include/clang/Basic/JsonSupport.h @@ -12,6 +12,7 @@ #include "clang/Basic/LLVM.h" #include "clang/Basic/SourceManager.h" #include "llvm/ADT/StringRef.h" +#include "llvm/Support/Path.h" #include "llvm/Support/raw_ostream.h" #include <iterator> @@ -70,7 +71,7 @@ inline std::string JsonFormat(StringRef RawSR, bool AddQuotes) { } // Remove new-lines. - Str.erase(std::remove(Str.begin(), Str.end(), '\n'), Str.end()); + llvm::erase(Str, '\n'); if (!AddQuotes) return Str; @@ -98,18 +99,15 @@ inline void printSourceLocationAsJson(raw_ostream &Out, SourceLocation Loc, if (AddBraces) Out << "{ "; std::string filename(PLoc.getFilename()); -#ifdef _WIN32 - // Remove forbidden Windows path characters - auto RemoveIt = - std::remove_if(filename.begin(), filename.end(), [](auto Char) { - static const char ForbiddenChars[] = "<>*?\"|"; - return std::find(std::begin(ForbiddenChars), std::end(ForbiddenChars), - Char) != std::end(ForbiddenChars); - }); - filename.erase(RemoveIt, filename.end()); - // Handle windows-specific path delimiters. - std::replace(filename.begin(), filename.end(), '\\', '/'); -#endif + if (is_style_windows(llvm::sys::path::Style::native)) { + // Remove forbidden Windows path characters + llvm::erase_if(filename, [](auto Char) { + static const char ForbiddenChars[] = "<>*?\"|"; + return llvm::is_contained(ForbiddenChars, Char); + }); + // Handle windows-specific path delimiters. + std::replace(filename.begin(), filename.end(), '\\', '/'); + } Out << "\"line\": " << PLoc.getLine() << ", \"column\": " << PLoc.getColumn() << ", \"file\": \"" << filename << "\""; diff --git a/contrib/llvm-project/clang/include/clang/Basic/LLVM.h b/contrib/llvm-project/clang/include/clang/Basic/LLVM.h index 4ac2d744af3c..f4956cd16cbc 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/LLVM.h +++ b/contrib/llvm-project/clang/include/clang/Basic/LLVM.h @@ -19,9 +19,6 @@ // dependencies. // Casting.h has complex templates that cannot be easily forward declared. #include "llvm/Support/Casting.h" -// None.h includes an enumerator that is desired & cannot be forward declared -// without a definition of NoneType. -#include "llvm/ADT/None.h" // Add this header as a workaround to prevent `too few template arguments for // class template 'SmallVector'` building error with build compilers like XL. #include "llvm/ADT/SmallVector.h" @@ -37,7 +34,6 @@ namespace llvm { template<unsigned InternalLen> class SmallString; template<typename T, unsigned N> class SmallVector; template<typename T> class SmallVectorImpl; - template<typename T> class Optional; template <class T> class Expected; template<typename T> @@ -58,16 +54,17 @@ namespace clang { // Casting operators. using llvm::isa; using llvm::isa_and_nonnull; + using llvm::isa_and_present; using llvm::cast; using llvm::dyn_cast; using llvm::dyn_cast_or_null; + using llvm::dyn_cast_if_present; using llvm::cast_or_null; + using llvm::cast_if_present; // ADT's. using llvm::ArrayRef; using llvm::MutableArrayRef; - using llvm::None; - using llvm::Optional; using llvm::OwningArrayRef; using llvm::SaveAndRestore; using llvm::SmallString; diff --git a/contrib/llvm-project/clang/include/clang/Basic/Lambda.h b/contrib/llvm-project/clang/include/clang/Basic/Lambda.h index 853821a33c2a..de01d6f33c01 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Lambda.h +++ b/contrib/llvm-project/clang/include/clang/Basic/Lambda.h @@ -32,7 +32,7 @@ enum LambdaCaptureDefault { /// is an expression. enum LambdaCaptureKind { LCK_This, ///< Capturing the \c *this object by reference - LCK_StarThis, /// < Capturing the \c *this object by copy + LCK_StarThis, ///< Capturing the \c *this object by copy LCK_ByCopy, ///< Capturing by copy (a.k.a., by value) LCK_ByRef, ///< Capturing by reference LCK_VLAType ///< Capturing variable-length array type diff --git a/contrib/llvm-project/clang/include/clang/Basic/LangOptions.def b/contrib/llvm-project/clang/include/clang/Basic/LangOptions.def index 74deba6ef7fb..4942dcaa086e 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/LangOptions.def +++ b/contrib/llvm-project/clang/include/clang/Basic/LangOptions.def @@ -7,7 +7,11 @@ //===----------------------------------------------------------------------===// // // This file defines the language options. Users of this file must -// define the LANGOPT macro to make use of this information. +// define the LANGOPT macro to make use of this information. The arguments to +// the macro are: +// LANGOPT(Name, Bits, DefaultValue, Description) +// Note that the DefaultValue must be a constant value (literal or enumeration); +// it cannot depend on the value of another language option. // // Optionally, the user may also define: // @@ -82,8 +86,9 @@ LANGOPT(C99 , 1, 0, "C99") LANGOPT(C11 , 1, 0, "C11") LANGOPT(C17 , 1, 0, "C17") -LANGOPT(C2x , 1, 0, "C2x") +LANGOPT(C23 , 1, 0, "C23") LANGOPT(MSVCCompat , 1, 0, "Microsoft Visual C++ full compatibility mode") +LANGOPT(Kernel , 1, 0, "Kernel mode") LANGOPT(MicrosoftExt , 1, 0, "Microsoft C++ extensions") LANGOPT(AsmBlocks , 1, 0, "Microsoft inline asm blocks") LANGOPT(Borland , 1, 0, "Borland extensions") @@ -92,7 +97,8 @@ LANGOPT(CPlusPlus11 , 1, 0, "C++11") LANGOPT(CPlusPlus14 , 1, 0, "C++14") LANGOPT(CPlusPlus17 , 1, 0, "C++17") LANGOPT(CPlusPlus20 , 1, 0, "C++20") -LANGOPT(CPlusPlus2b , 1, 0, "C++2b") +LANGOPT(CPlusPlus23 , 1, 0, "C++23") +LANGOPT(CPlusPlus26 , 1, 0, "C++26") LANGOPT(ObjC , 1, 0, "Objective-C") BENIGN_LANGOPT(ObjCDefaultSynthProperties , 1, 0, "Objective-C auto-synthesized properties") @@ -107,7 +113,7 @@ LANGOPT(Trigraphs , 1, 0,"trigraphs") LANGOPT(LineComment , 1, 0, "'//' comments") LANGOPT(Bool , 1, 0, "bool, true, and false keywords") LANGOPT(Half , 1, 0, "half keyword") -LANGOPT(WChar , 1, CPlusPlus, "wchar_t keyword") +LANGOPT(WChar , 1, 0, "wchar_t keyword") LANGOPT(Char8 , 1, 0, "char8_t keyword") LANGOPT(IEEE128 , 1, 0, "__ieee128 keyword") LANGOPT(DeclSpecKeyword , 1, 0, "__declspec keyword") @@ -116,9 +122,9 @@ BENIGN_LANGOPT(AsmPreprocessor, 1, 0, "preprocessor in asm mode") LANGOPT(GNUMode , 1, 1, "GNU extensions") LANGOPT(GNUKeywords , 1, 1, "GNU keywords") VALUE_LANGOPT(GNUCVersion , 32, 0, "GNU C compatibility version") -BENIGN_LANGOPT(ImplicitInt, 1, !C99 && !CPlusPlus, "C89 implicit 'int'") +LANGOPT(DisableKNRFunctions, 1, 0, "require function types to have a prototype") LANGOPT(Digraphs , 1, 0, "digraphs") -BENIGN_LANGOPT(HexFloats , 1, C99, "C99 hexadecimal float constants") +BENIGN_LANGOPT(HexFloats , 1, 0, "C99 hexadecimal float constants") LANGOPT(CXXOperatorNames , 1, 0, "C++ operator name keywords") LANGOPT(AppleKext , 1, 0, "Apple kext support") BENIGN_LANGOPT(PascalStrings, 1, 0, "Pascal string support") @@ -139,17 +145,21 @@ ENUM_LANGOPT(ExceptionHandling, ExceptionHandlingKind, 3, ExceptionHandlingKind::None, "exception handling") LANGOPT(IgnoreExceptions , 1, 0, "ignore exceptions") LANGOPT(ExternCNoUnwind , 1, 0, "Assume extern C functions don't unwind") +LANGOPT(AssumeNothrowExceptionDtor , 1, 0, "Assume exception object's destructor is nothrow") LANGOPT(TraditionalCPP , 1, 0, "traditional CPP emulation") LANGOPT(RTTI , 1, 1, "run-time type information") LANGOPT(RTTIData , 1, 1, "emit run-time type information data") LANGOPT(MSBitfields , 1, 0, "Microsoft-compatible structure layout") +LANGOPT(MSVolatile , 1, 0, "Microsoft-compatible volatile loads and stores") LANGOPT(Freestanding, 1, 0, "freestanding implementation") LANGOPT(NoBuiltin , 1, 0, "disable builtin functions") LANGOPT(NoMathBuiltin , 1, 0, "disable math builtin functions") LANGOPT(GNUAsm , 1, 1, "GNU-style inline assembly") LANGOPT(Coroutines , 1, 0, "C++20 coroutines") +LANGOPT(CoroAlignedAllocation, 1, 0, "prefer Aligned Allocation according to P2014 Option 2") LANGOPT(DllExportInlines , 1, 1, "dllexported classes dllexport inline methods") LANGOPT(RelaxedTemplateTemplateArgs, 1, 0, "C++17 relaxed matching of template template arguments") +LANGOPT(ExperimentalLibrary, 1, 0, "enable unstable and experimental library features") LANGOPT(DoubleSquareBracketAttributes, 1, 0, "'[[]]' attributes extension for all language standard modes") @@ -163,9 +173,10 @@ BENIGN_LANGOPT(EmitAllDecls , 1, 0, "emitting all declarations") LANGOPT(MathErrno , 1, 1, "errno in math functions") BENIGN_LANGOPT(HeinousExtensions , 1, 0, "extensions that we really don't like and may be ripped out at any time") LANGOPT(Modules , 1, 0, "modules semantics") -COMPATIBLE_LANGOPT(ModulesTS , 1, 0, "C++ Modules TS syntax") COMPATIBLE_LANGOPT(CPlusPlusModules, 1, 0, "C++ modules syntax") -BENIGN_ENUM_LANGOPT(CompilingModule, CompilingModuleKind, 2, CMK_None, +LANGOPT(SkipODRCheckInGMF, 1, 0, "Skip ODR checks for decls in the global module fragment") +LANGOPT(BuiltinHeadersInSystemModules, 1, 0, "builtin headers belong to system modules, and _Builtin_ modules are ignored for cstdlib headers") +BENIGN_ENUM_LANGOPT(CompilingModule, CompilingModuleKind, 3, CMK_None, "compiling a module interface") BENIGN_LANGOPT(CompilingPCH, 1, 0, "building a pch") BENIGN_LANGOPT(BuildingPCHWithObjectFile, 1, 0, "building a pch which has a corresponding object file") @@ -174,6 +185,7 @@ BENIGN_LANGOPT(PCHInstantiateTemplates, 1, 0, "instantiate templates while build COMPATIBLE_LANGOPT(ModulesDeclUse , 1, 0, "require declaration of module uses") BENIGN_LANGOPT(ModulesSearchAll , 1, 1, "searching even non-imported modules to find unresolved references") COMPATIBLE_LANGOPT(ModulesStrictDeclUse, 1, 0, "requiring declaration of module uses and all headers to be in modules") +COMPATIBLE_LANGOPT(ModulesValidateTextualHeaderIncludes, 1, 1, "validation of textual header includes") BENIGN_LANGOPT(ModulesErrorRecovery, 1, 1, "automatically importing modules as needed when performing error recovery") BENIGN_LANGOPT(ImplicitModules, 1, 1, "building modules that are not specified via -fmodule-file") COMPATIBLE_LANGOPT(ModulesLocalVisibility, 1, 0, "local submodule visibility") @@ -189,6 +201,7 @@ VALUE_LANGOPT(DoubleSize , 32, 0, "width of double") VALUE_LANGOPT(LongDoubleSize , 32, 0, "width of long double") LANGOPT(PPCIEEELongDouble , 1, 0, "use IEEE 754 quadruple-precision for long double") LANGOPT(EnableAIXExtendedAltivecABI , 1, 0, "__EXTABI__ predefined macro") +LANGOPT(EnableAIXQuadwordAtomicsABI , 1, 0, "Use 16-byte atomic lock free semantics") COMPATIBLE_VALUE_LANGOPT(PICLevel , 2, 0, "__PIC__ level") COMPATIBLE_VALUE_LANGOPT(PIE , 1, 0, "is pie") LANGOPT(ROPI , 1, 0, "Read-only position independence") @@ -208,6 +221,8 @@ BENIGN_LANGOPT(NoSignedZero , 1, 0, "Permit Floating Point optimization wit BENIGN_LANGOPT(AllowRecip , 1, 0, "Permit Floating Point reciprocal") BENIGN_LANGOPT(ApproxFunc , 1, 0, "Permit Floating Point approximation") +ENUM_LANGOPT(ComplexRange, ComplexRangeKind, 2, CX_None, "Enable use of range reduction for complex arithmetics.") + BENIGN_LANGOPT(ObjCGCBitmapPrint , 1, 0, "printing of GC's bitmap layout for __weak/__strong ivars") BENIGN_LANGOPT(AccessControl , 1, 1, "C++ access control") @@ -227,44 +242,59 @@ LANGOPT(OpenCLGenericAddressSpace, 1, 0, "OpenCL generic keyword") LANGOPT(OpenCLPipes , 1, 0, "OpenCL pipes language constructs and built-ins") LANGOPT(NativeHalfType , 1, 0, "Native half type support") LANGOPT(NativeHalfArgsAndReturns, 1, 0, "Native half args and returns") -LANGOPT(HalfArgsAndReturns, 1, 0, "half args and returns") LANGOPT(CUDA , 1, 0, "CUDA") LANGOPT(HIP , 1, 0, "HIP") LANGOPT(OpenMP , 32, 0, "OpenMP support and version of OpenMP (31, 40 or 45)") +LANGOPT(OpenMPExtensions , 1, 1, "Enable all Clang extensions for OpenMP directives and clauses") LANGOPT(OpenMPSimd , 1, 0, "Use SIMD only OpenMP support.") LANGOPT(OpenMPUseTLS , 1, 0, "Use TLS for threadprivates or runtime calls") -LANGOPT(OpenMPIsDevice , 1, 0, "Generate code only for OpenMP target device") +LANGOPT(OpenMPIsTargetDevice , 1, 0, "Generate code only for OpenMP target device") LANGOPT(OpenMPCUDAMode , 1, 0, "Generate code for OpenMP pragmas in SIMT/SPMD mode") LANGOPT(OpenMPIRBuilder , 1, 0, "Use the experimental OpenMP-IR-Builder codegen path.") -LANGOPT(OpenMPCUDAForceFullRuntime , 1, 0, "Force to use full runtime in all constructs when offloading to CUDA devices") LANGOPT(OpenMPCUDANumSMs , 32, 0, "Number of SMs for CUDA devices.") LANGOPT(OpenMPCUDABlocksPerSM , 32, 0, "Number of blocks per SM for CUDA devices.") LANGOPT(OpenMPCUDAReductionBufNum , 32, 1024, "Number of the reduction records in the intermediate reduction buffer used for the teams reductions.") -LANGOPT(OpenMPTargetNewRuntime , 1, 0, "Use the new bitcode library for OpenMP offloading") +LANGOPT(OpenMPTargetDebug , 32, 0, "Enable debugging in the OpenMP offloading device RTL") LANGOPT(OpenMPOptimisticCollapse , 1, 0, "Use at most 32 bits to represent the collapsed loop nest counter.") +LANGOPT(OpenMPThreadSubscription , 1, 0, "Assume work-shared loops do not have more iterations than participating threads.") +LANGOPT(OpenMPTeamSubscription , 1, 0, "Assume distributed loops do not have more iterations than participating teams.") +LANGOPT(OpenMPNoThreadState , 1, 0, "Assume that no thread in a parallel region will modify an ICV.") +LANGOPT(OpenMPNoNestedParallelism , 1, 0, "Assume that no thread in a parallel region will encounter a parallel region") +LANGOPT(OpenMPOffloadMandatory , 1, 0, "Assert that offloading is mandatory and do not create a host fallback.") +LANGOPT(OpenMPForceUSM , 1, 0, "Enable OpenMP unified shared memory mode via compiler.") +LANGOPT(NoGPULib , 1, 0, "Indicate a build without the standard GPU libraries.") LANGOPT(RenderScript , 1, 0, "RenderScript") +LANGOPT(HLSL, 1, 0, "HLSL") +ENUM_LANGOPT(HLSLVersion, HLSLLangStd, 16, HLSL_Unset, "HLSL Version") + LANGOPT(CUDAIsDevice , 1, 0, "compiling for CUDA device") LANGOPT(CUDAAllowVariadicFunctions, 1, 0, "allowing variadic functions in CUDA device code") LANGOPT(CUDAHostDeviceConstexpr, 1, 1, "treating unattributed constexpr functions as __host__ __device__") -LANGOPT(CUDADeviceApproxTranscendentals, 1, 0, "using approximate transcendental functions") +LANGOPT(GPUDeviceApproxTranscendentals, 1, 0, "using approximate transcendental functions") LANGOPT(GPURelocatableDeviceCode, 1, 0, "generate relocatable device code") +LANGOPT(OffloadImplicitHostDeviceTemplates, 1, 0, "assume template functions to be implicitly host device by default for CUDA/HIP") LANGOPT(GPUAllowDeviceInit, 1, 0, "allowing device side global init functions for HIP") LANGOPT(GPUMaxThreadsPerBlock, 32, 1024, "default max threads per block for kernel launch bounds for HIP") LANGOPT(GPUDeferDiag, 1, 0, "defer host/device related diagnostic messages for CUDA/HIP") LANGOPT(GPUExcludeWrongSideOverloads, 1, 0, "always exclude wrong side overloads in overloading resolution for CUDA/HIP") +LANGOPT(OffloadingNewDriver, 1, 0, "use the new driver for generating offloading code.") LANGOPT(SYCLIsDevice , 1, 0, "Generate code for SYCL device") LANGOPT(SYCLIsHost , 1, 0, "SYCL host compilation") ENUM_LANGOPT(SYCLVersion , SYCLMajorVersion, 2, SYCL_None, "Version of the SYCL standard used") LANGOPT(HIPUseNewLaunchAPI, 1, 0, "Use new kernel launching API for HIP") +LANGOPT(OffloadUniformBlock, 1, 0, "Assume that kernels are launched with uniform block sizes (default true for CUDA/HIP and false otherwise)") +LANGOPT(HIPStdPar, 1, 0, "Enable Standard Parallel Algorithm Acceleration for HIP (experimental)") +LANGOPT(HIPStdParInterposeAlloc, 1, 0, "Replace allocations / deallocations with HIP RT calls when Standard Parallel Algorithm Acceleration for HIP is enabled (Experimental)") + +LANGOPT(OpenACC , 1, 0, "OpenACC Enabled") LANGOPT(SizedDeallocation , 1, 0, "sized deallocation") LANGOPT(AlignedAllocation , 1, 0, "aligned allocation") LANGOPT(AlignedAllocationUnavailable, 1, 0, "aligned allocation functions are unavailable") LANGOPT(NewAlignOverride , 32, 0, "maximum alignment guaranteed by '::operator new(size_t)'") -LANGOPT(ConceptSatisfactionCaching , 1, 1, "enable satisfaction caching for C++20 Concepts") BENIGN_LANGOPT(ModulesCodegen , 1, 0, "Modules code generation") BENIGN_LANGOPT(ModulesDebugInfo , 1, 0, "Modules debug info") BENIGN_LANGOPT(ElideConstructors , 1, 1, "C++ copy constructor elision") @@ -275,11 +305,14 @@ BENIGN_LANGOPT(DumpRecordLayoutsComplete , 1, 0, "dumping the AST layout of all BENIGN_LANGOPT(DumpVTableLayouts , 1, 0, "dumping the layouts of emitted vtables") LANGOPT(NoConstantCFStrings , 1, 0, "no constant CoreFoundation strings") BENIGN_LANGOPT(InlineVisibilityHidden , 1, 0, "hidden visibility for inline C++ methods") +BENIGN_ENUM_LANGOPT(DefaultVisibilityExportMapping, DefaultVisiblityExportMapping, 2, DefaultVisiblityExportMapping::None, "controls mapping of default visibility to dllexport") BENIGN_LANGOPT(IgnoreXCOFFVisibility, 1, 0, "All the visibility attributes that are specified in the source code are ignored in aix XCOFF.") BENIGN_LANGOPT(VisibilityInlinesHiddenStaticLocalVar, 1, 0, "hidden visibility for static local variables in inline C++ " "methods when -fvisibility-inlines hidden is enabled") -LANGOPT(GlobalAllocationFunctionVisibilityHidden , 1, 0, "hidden visibility for global operator new and delete declaration") +ENUM_LANGOPT(GlobalAllocationFunctionVisibility, VisibilityForcedKinds, 3, VisibilityForcedKinds::ForceDefault, + "How to apply visibility to global operator new and delete declarations") +LANGOPT(NewInfallible , 1, 0, "Treats throwing global C++ operator new as always returning valid memory (annotates with __attribute__((returns_nonnull)) and throw()). This is detectable in source.") BENIGN_LANGOPT(ParseUnknownAnytype, 1, 0, "__unknown_anytype") BENIGN_LANGOPT(DebuggerSupport , 1, 0, "debugger support") BENIGN_LANGOPT(DebuggerCastResultToId, 1, 0, "for 'po' in the debugger, cast the result to id if it is of unknown type") @@ -294,8 +327,11 @@ COMPATIBLE_LANGOPT(CLFiniteMathOnly , 1, 0, "__FINITE_MATH_ONLY__ predefined mac /// FP_CONTRACT mode (on/off/fast). BENIGN_ENUM_LANGOPT(DefaultFPContractMode, FPModeKind, 2, FPM_Off, "FP contraction type") COMPATIBLE_LANGOPT(ExpStrictFP, 1, false, "Enable experimental strict floating point") -BENIGN_ENUM_LANGOPT(FPRoundingMode, RoundingMode, 3, RoundingMode::NearestTiesToEven, "FP Rounding Mode type") -BENIGN_ENUM_LANGOPT(FPExceptionMode, FPExceptionModeKind, 2, FPE_Ignore, "FP Exception Behavior Mode type") +BENIGN_LANGOPT(RoundingMath, 1, false, "Do not assume default floating-point rounding behavior") +BENIGN_ENUM_LANGOPT(FPExceptionMode, FPExceptionModeKind, 2, FPE_Default, "FP Exception Behavior Mode type") +BENIGN_ENUM_LANGOPT(FPEvalMethod, FPEvalMethodKind, 2, FEM_UnsetOnCommandLine, "FP type used for floating point arithmetic") +ENUM_LANGOPT(Float16ExcessPrecision, ExcessPrecisionKind, 2, FPP_Standard, "Intermediate truncation behavior for Float16 arithmetic") +ENUM_LANGOPT(BFloat16ExcessPrecision, ExcessPrecisionKind, 2, FPP_Standard, "Intermediate truncation behavior for BFloat16 arithmetic") LANGOPT(NoBitFieldTypeAlign , 1, 0, "bit-field type alignment") LANGOPT(HexagonQdsp6Compat , 1, 0, "hexagon-qdsp6 backward compatibility") LANGOPT(ObjCAutoRefCount , 1, 0, "Objective-C automated reference counting") @@ -320,22 +356,22 @@ LANGOPT( "type's inheritance model would be determined under the Microsoft ABI") ENUM_LANGOPT(GC, GCMode, 2, NonGC, "Objective-C Garbage Collection mode") -ENUM_LANGOPT(ValueVisibilityMode, Visibility, 3, DefaultVisibility, +BENIGN_ENUM_LANGOPT(ValueVisibilityMode, Visibility, 3, DefaultVisibility, "default visibility for functions and variables [-fvisibility]") -ENUM_LANGOPT(TypeVisibilityMode, Visibility, 3, DefaultVisibility, +BENIGN_ENUM_LANGOPT(TypeVisibilityMode, Visibility, 3, DefaultVisibility, "default visibility for types [-ftype-visibility]") LANGOPT(SetVisibilityForExternDecls, 1, 0, "apply global symbol visibility to external declarations without an explicit visibility") -LANGOPT(VisibilityFromDLLStorageClass, 1, 0, - "set the visiblity of globals from their DLL storage class [-fvisibility-from-dllstorageclass]") -ENUM_LANGOPT(DLLExportVisibility, Visibility, 3, DefaultVisibility, - "visibility for functions and variables with dllexport annotations [-fvisibility-from-dllstorageclass]") -ENUM_LANGOPT(NoDLLStorageClassVisibility, Visibility, 3, HiddenVisibility, - "visibility for functions and variables without an explicit DLL storage class [-fvisibility-from-dllstorageclass]") -ENUM_LANGOPT(ExternDeclDLLImportVisibility, Visibility, 3, DefaultVisibility, - "visibility for external declarations with dllimport annotations [-fvisibility-from-dllstorageclass]") -ENUM_LANGOPT(ExternDeclNoDLLStorageClassVisibility, Visibility, 3, HiddenVisibility, - "visibility for external declarations without an explicit DLL storage class [-fvisibility-from-dllstorageclass]") +BENIGN_LANGOPT(VisibilityFromDLLStorageClass, 1, 0, + "override the visibility of globals based on their final DLL storage class [-fvisibility-from-dllstorageclass]") +BENIGN_ENUM_LANGOPT(DLLExportVisibility, VisibilityFromDLLStorageClassKinds, 3, VisibilityFromDLLStorageClassKinds::Default, + "how to adjust the visibility for functions and variables with dllexport annotations [-fvisibility-dllexport]") +BENIGN_ENUM_LANGOPT(NoDLLStorageClassVisibility, VisibilityFromDLLStorageClassKinds, 3, VisibilityFromDLLStorageClassKinds::Hidden, + "how to adjust the visibility for functions and variables without an explicit DLL storage class [-fvisibility-nodllstorageclass]") +BENIGN_ENUM_LANGOPT(ExternDeclDLLImportVisibility, VisibilityFromDLLStorageClassKinds, 3, VisibilityFromDLLStorageClassKinds::Default, + "how to adjust the visibility for external declarations with dllimport annotations [-fvisibility-externs-dllimport]") +BENIGN_ENUM_LANGOPT(ExternDeclNoDLLStorageClassVisibility, VisibilityFromDLLStorageClassKinds, 3, VisibilityFromDLLStorageClassKinds::Hidden, + "how to adjust the visibility for external declarations without an explicit DLL storage class [-fvisibility-externs-nodllstorageclass]") BENIGN_LANGOPT(SemanticInterposition , 1, 0, "semantic interposition") BENIGN_LANGOPT(HalfNoSemanticInterposition, 1, 0, "Like -fno-semantic-interposition but don't use local aliases") @@ -345,6 +381,8 @@ ENUM_LANGOPT(TrivialAutoVarInit, TrivialAutoVarInitKind, 2, TrivialAutoVarInitKi "trivial automatic variable initialization") VALUE_LANGOPT(TrivialAutoVarInitStopAfter, 32, 0, "stop trivial automatic variable initialization after the specified number of instances. Must be greater than 0.") +VALUE_LANGOPT(TrivialAutoVarInitMaxSize, 32, 0, + "stop trivial automatic variable initialization if var size exceeds the specified size (in bytes). Must be greater than 0.") ENUM_LANGOPT(SignedOverflowBehavior, SignedOverflowBehaviorTy, 2, SOB_Undefined, "signed integer overflow handling") ENUM_LANGOPT(ThreadModel , ThreadModelKind, 2, ThreadModelKind::POSIX, "Thread Model") @@ -373,6 +411,9 @@ LANGOPT(XLPragmaPack, 1, 0, "IBM XL #pragma pack handling") LANGOPT(RetainCommentsFromSystemHeaders, 1, 0, "retain documentation comments from system headers in the AST") +LANGOPT(APINotes, 1, 0, "use external API notes") +LANGOPT(APINotesModules, 1, 0, "use module-based external API notes") + LANGOPT(SanitizeAddressFieldPadding, 2, 0, "controls how aggressive is ASan " "field padding (0: none, 1:least " "aggressive, 2: more aggressive)") @@ -397,6 +438,7 @@ ENUM_LANGOPT(ClangABICompat, ClangABI, 4, ClangABI::Latest, "with") COMPATIBLE_VALUE_LANGOPT(FunctionAlignment, 5, 0, "Default alignment for functions") +COMPATIBLE_VALUE_LANGOPT(LoopAlignment, 32, 0, "Default alignment for loops") LANGOPT(FixedPoint, 1, 0, "fixed point types") LANGOPT(PaddingOnUnsignedFixedPoint, 1, 0, @@ -404,8 +446,14 @@ LANGOPT(PaddingOnUnsignedFixedPoint, 1, 0, LANGOPT(RegisterStaticDestructors, 1, 1, "Register C++ static destructors") +LANGOPT(RegCall4, 1, 0, "Set __regcall4 as a default calling convention to respect __regcall ABI v.4") + LANGOPT(MatrixTypes, 1, 0, "Enable or disable the builtin matrix type") +ENUM_LANGOPT(StrictFlexArraysLevel, StrictFlexArraysLevelKind, 2, + StrictFlexArraysLevelKind::Default, + "Rely on strict definition of flexible arrays") + COMPATIBLE_VALUE_LANGOPT(MaxTokens, 32, 0, "Max number of tokens per TU or 0") ENUM_LANGOPT(SignReturnAddressScope, SignReturnAddressScopeKind, 2, SignReturnAddressScopeKind::None, @@ -413,18 +461,38 @@ ENUM_LANGOPT(SignReturnAddressScope, SignReturnAddressScopeKind, 2, SignReturnAd ENUM_LANGOPT(SignReturnAddressKey, SignReturnAddressKeyKind, 1, SignReturnAddressKeyKind::AKey, "Key used for return address signing") LANGOPT(BranchTargetEnforcement, 1, 0, "Branch-target enforcement enabled") +LANGOPT(BranchProtectionPAuthLR, 1, 0, "Use PC as a diversifier using PAuthLR NOP instructions.") +LANGOPT(GuardedControlStack, 1, 0, "Guarded control stack enabled") LANGOPT(SpeculativeLoadHardening, 1, 0, "Speculative load hardening enabled") LANGOPT(RelativeCXXABIVTables, 1, 0, "Use an ABI-incompatible v-table layout that uses relative references") -LANGOPT(ArmSveVectorBits, 32, 0, "SVE vector size in bits") +LANGOPT(OmitVTableRTTI, 1, 0, + "Use an ABI-incompatible v-table layout that omits the RTTI component") -ENUM_LANGOPT(ExtendIntArgs, ExtendArgsKind, 1, ExtendArgsKind::ExtendTo32, +LANGOPT(VScaleMin, 32, 0, "Minimum vscale value") +LANGOPT(VScaleMax, 32, 0, "Maximum vscale value") + +ENUM_LANGOPT(ExtendIntArgs, ExtendArgsKind, 1, ExtendArgsKind::ExtendTo32, "Controls how scalar integer arguments are extended in calls " "to unprototyped and varargs functions") +VALUE_LANGOPT(FuchsiaAPILevel, 32, 0, "Fuchsia API level") + +// This option will be removed in the future once the backend +// supports all operations (like division or float-to-integer conversion) +// on large _BitInts. +BENIGN_VALUE_LANGOPT(MaxBitIntWidth, 32, 128, "Maximum width of a _BitInt") + +LANGOPT(IncrementalExtensions, 1, 0, " True if we want to process statements" + "on the global scope, ignore EOF token and continue later on (thus " + "avoid tearing the Lexer and etc. down). Controlled by " + "-fincremental-extensions.") + +BENIGN_LANGOPT(CheckNew, 1, 0, "Do not assume C++ operator new may not return NULL") + #undef LANGOPT #undef COMPATIBLE_LANGOPT #undef BENIGN_LANGOPT diff --git a/contrib/llvm-project/clang/include/clang/Basic/LangOptions.h b/contrib/llvm-project/clang/include/clang/Basic/LangOptions.h index b60b94a1ba08..c1cc5548ef10 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/LangOptions.h +++ b/contrib/llvm-project/clang/include/clang/Basic/LangOptions.h @@ -23,7 +23,8 @@ #include "clang/Basic/Visibility.h" #include "llvm/ADT/FloatingPointMode.h" #include "llvm/ADT/StringRef.h" -#include "llvm/ADT/Triple.h" +#include "llvm/TargetParser/Triple.h" +#include <optional> #include <string> #include <vector> @@ -33,6 +34,7 @@ namespace clang { /// this large collection of bitfields is a trivial class type. class LangOptionsBase { friend class CompilerInvocation; + friend class CompilerInvocationBase; public: // Define simple language options (with no accessors). @@ -53,6 +55,29 @@ protected: /// members used to implement virtual inheritance. enum class MSVtorDispMode { Never, ForVBaseOverride, ForVFTable }; +/// Shader programs run in specific pipeline stages. +/// The order of these values matters, and must be kept in sync with the +/// Triple Environment enum in llvm::Triple. The ordering is enforced in +/// static_asserts in Triple.cpp and in clang/Basic/HLSLRuntime.h. +enum class ShaderStage { + Pixel = 0, + Vertex, + Geometry, + Hull, + Domain, + Compute, + Library, + RayGeneration, + Intersection, + AnyHit, + ClosestHit, + Miss, + Callable, + Mesh, + Amplification, + Invalid, +}; + /// Keeps track of the various options that can be /// enabled, which controls the dialect of C or C++ that is accepted. class LangOptions : public LangOptionsBase { @@ -87,10 +112,10 @@ public: /// Compiling a module from a module map. CMK_ModuleMap, - /// Compiling a module from a list of header files. - CMK_HeaderModule, + /// Compiling a module header unit. + CMK_HeaderUnit, - /// Compiling a C++ modules TS module interface unit. + /// Compiling a C++ modules interface unit. CMK_ModuleInterface, }; @@ -109,7 +134,8 @@ public: DCC_FastCall, DCC_StdCall, DCC_VectorCall, - DCC_RegCall + DCC_RegCall, + DCC_RtdCall }; enum AddrSpaceMapMangling { ASMM_Target, ASMM_On, ASMM_Off }; @@ -124,7 +150,9 @@ public: MSVC2017_5 = 1912, MSVC2017_7 = 1914, MSVC2019 = 1920, + MSVC2019_5 = 1925, MSVC2019_8 = 1928, + MSVC2022_3 = 1933, }; enum SYCLMajorVersion { @@ -136,6 +164,16 @@ public: SYCL_Default = SYCL_2020 }; + enum HLSLLangStd { + HLSL_Unset = 0, + HLSL_2015 = 2015, + HLSL_2016 = 2016, + HLSL_2017 = 2017, + HLSL_2018 = 2018, + HLSL_2021 = 2021, + HLSL_202x = 2029, + }; + /// Clang versions with different platform ABI conformance. enum class ClangABI { /// Attempt to be ABI-compatible with code generated by Clang 3.8.x @@ -180,6 +218,30 @@ public: /// global-scope inline variables incorrectly. Ver12, + /// Attempt to be ABI-compatible with code generated by Clang 14.0.x. + /// This causes clang to: + /// - mangle dependent nested names incorrectly. + /// - make trivial only those defaulted copy constructors with a + /// parameter-type-list equivalent to the parameter-type-list of an + /// implicit declaration. + Ver14, + + /// Attempt to be ABI-compatible with code generated by Clang 15.0.x. + /// This causes clang to: + /// - Reverse the implementation for DR692, DR1395 and DR1432. + /// - pack non-POD members of packed structs. + /// - consider classes with defaulted special member functions non-pod. + Ver15, + + /// Attempt to be ABI-compatible with code generated by Clang 17.0.x. + /// This causes clang to revert some fixes to its implementation of the + /// Itanium name mangling scheme, with the consequence that overloaded + /// function templates are mangled the same if they differ only by: + /// - constraints + /// - whether a non-type template parameter has a deduced type + /// - the parameter list of a template template parameter + Ver17, + /// Conform to the underlying platform's C and C++ ABIs as closely /// as we can. Latest @@ -216,10 +278,6 @@ public: FPM_FastHonorPragmas }; - /// Alias for RoundingMode::NearestTiesToEven. - static constexpr unsigned FPR_ToNearest = - static_cast<unsigned>(llvm::RoundingMode::NearestTiesToEven); - /// Possible floating point exception behavior. enum FPExceptionModeKind { /// Assume that floating-point exceptions are masked. @@ -227,9 +285,31 @@ public: /// Transformations do not cause new exceptions but may hide some. FPE_MayTrap, /// Strictly preserve the floating-point exception semantics. - FPE_Strict + FPE_Strict, + /// Used internally to represent initial unspecified value. + FPE_Default + }; + + /// Possible float expression evaluation method choices. + enum FPEvalMethodKind { + /// The evaluation method cannot be determined or is inconsistent for this + /// target. + FEM_Indeterminable = -1, + /// Use the declared type for fp arithmetic. + FEM_Source = 0, + /// Use the type double for fp arithmetic. + FEM_Double = 1, + /// Use extended type for fp arithmetic. + FEM_Extended = 2, + /// Used only for FE option processing; this is only used to indicate that + /// the user did not specify an explicit evaluation method on the command + /// line and so the target should be queried for its default evaluation + /// method instead. + FEM_UnsetOnCommandLine = 3 }; + enum ExcessPrecisionKind { FPP_Standard, FPP_Fast, FPP_None }; + /// Possible exception handling behavior. enum class ExceptionHandlingKind { None, SjLj, WinEH, DwarfCFI, Wasm }; @@ -286,6 +366,56 @@ public: ExtendTo64 }; + enum class GPUDefaultStreamKind { + /// Legacy default stream + Legacy, + /// Per-thread default stream + PerThread, + }; + + enum class DefaultVisiblityExportMapping { + None, + /// map only explicit default visibilities to exported + Explicit, + /// map all default visibilities to exported + All, + }; + + enum class VisibilityForcedKinds { + /// Force hidden visibility + ForceHidden, + /// Force protected visibility + ForceProtected, + /// Force default visibility + ForceDefault, + /// Don't alter the visibility + Source, + }; + + enum class VisibilityFromDLLStorageClassKinds { + /// Keep the IR-gen assigned visibility. + Keep, + /// Override the IR-gen assigned visibility with default visibility. + Default, + /// Override the IR-gen assigned visibility with hidden visibility. + Hidden, + /// Override the IR-gen assigned visibility with protected visibility. + Protected, + }; + + enum class StrictFlexArraysLevelKind { + /// Any trailing array member is a FAM. + Default = 0, + /// Any trailing array member of undefined, 0, or 1 size is a FAM. + OneZeroOrIncomplete = 1, + /// Any trailing array member of undefined or 0 size is a FAM. + ZeroOrIncomplete = 2, + /// Any trailing array member of undefined size is a FAM. + IncompleteOnly = 3, + }; + + enum ComplexRangeKind { CX_Full, CX_Limited, CX_Fortran, CX_None }; + public: /// The used language standard. LangStandard::Kind LangStd; @@ -373,14 +503,51 @@ public: /// C++ ABI to compile with, if specified by the frontend through -fc++-abi=. /// This overrides the default ABI used by the target. - llvm::Optional<TargetCXXABI::Kind> CXXABI; + std::optional<TargetCXXABI::Kind> CXXABI; /// Indicates whether the front-end is explicitly told that the /// input is a header file (i.e. -x c-header). bool IsHeaderFile = false; + /// The default stream kind used for HIP kernel launching. + GPUDefaultStreamKind GPUDefaultStream; + + /// The seed used by the randomize structure layout feature. + std::string RandstructSeed; + + /// Indicates whether to use target's platform-specific file separator when + /// __FILE__ macro is used and when concatenating filename with directory or + /// to use build environment environment's platform-specific file separator. + /// + /// The plaform-specific path separator is the backslash(\) for Windows and + /// forward slash (/) elsewhere. + bool UseTargetPathSeparator = false; + + // Indicates whether we should keep all nullptr checks for pointers + // received as a result of a standard operator new (-fcheck-new) + bool CheckNew = false; + + // In OpenACC mode, contains a user provided override for the _OPENACC macro. + // This exists so that we can override the macro value and test our incomplete + // implementation on real-world examples. + std::string OpenACCMacroOverride; + LangOptions(); + /// Set language defaults for the given input language and + /// language standard in the given LangOptions object. + /// + /// \param Opts - The LangOptions object to set up. + /// \param Lang - The input language. + /// \param T - The target triple. + /// \param Includes - If the language requires extra headers to be implicitly + /// included, they will be appended to this list. + /// \param LangStd - The input language standard. + static void + setLangDefaults(LangOptions &Opts, Language Lang, const llvm::Triple &T, + std::vector<std::string> &Includes, + LangStandard::Kind LangStd = LangStandard::lang_unspecified); + // Define accessors/mutators for language options of enumeration type. #define LANGOPT(Name, Bits, Default, Description) #define ENUM_LANGOPT(Name, Type, Bits, Default, Description) \ @@ -388,11 +555,21 @@ public: void set##Name(Type Value) { Name = static_cast<unsigned>(Value); } #include "clang/Basic/LangOptions.def" - /// Are we compiling a module interface (.cppm or module map)? + /// Are we compiling a module? bool isCompilingModule() const { return getCompilingModule() != CMK_None; } + /// Are we compiling a standard c++ module interface? + bool isCompilingModuleInterface() const { + return getCompilingModule() == CMK_ModuleInterface; + } + + /// Are we compiling a module implementation? + bool isCompilingModuleImplementation() const { + return !isCompilingModule() && !ModuleName.empty(); + } + /// Do we need to track the owning module for a local declaration? bool trackLocalOwningModule() const { return isCompilingModule() || ModulesLocalVisibility; @@ -431,6 +608,34 @@ public: /// Return the OpenCL C or C++ version as a VersionTuple. VersionTuple getOpenCLVersionTuple() const; + /// Return the OpenCL version that kernel language is compatible with + unsigned getOpenCLCompatibleVersion() const; + + /// Return the OpenCL C or C++ for OpenCL language name and version + /// as a string. + std::string getOpenCLVersionString() const; + + /// Returns true if functions without prototypes or functions with an + /// identifier list (aka K&R C functions) are not allowed. + bool requiresStrictPrototypes() const { + return CPlusPlus || C23 || DisableKNRFunctions; + } + + /// Returns true if implicit function declarations are allowed in the current + /// language mode. + bool implicitFunctionsAllowed() const { + return !requiresStrictPrototypes() && !OpenCL; + } + + /// Returns true if the language supports calling the 'atexit' function. + bool hasAtExit() const { return !(OpenMP && OpenMPIsTargetDevice); } + + /// Returns true if implicit int is part of the language requirements. + bool isImplicitIntRequired() const { return !CPlusPlus && !C99; } + + /// Returns true if implicit int is supported at all. + bool isImplicitIntAllowed() const { return !CPlusPlus && !C23; } + /// Check if return address signing is enabled. bool hasSignReturnAddress() const { return getSignReturnAddressScope() != SignReturnAddressScopeKind::None; @@ -464,8 +669,55 @@ public: bool isSYCL() const { return SYCLIsDevice || SYCLIsHost; } + bool hasDefaultVisibilityExportMapping() const { + return getDefaultVisibilityExportMapping() != + DefaultVisiblityExportMapping::None; + } + + bool isExplicitDefaultVisibilityExportMapping() const { + return getDefaultVisibilityExportMapping() == + DefaultVisiblityExportMapping::Explicit; + } + + bool isAllDefaultVisibilityExportMapping() const { + return getDefaultVisibilityExportMapping() == + DefaultVisiblityExportMapping::All; + } + + bool hasGlobalAllocationFunctionVisibility() const { + return getGlobalAllocationFunctionVisibility() != + VisibilityForcedKinds::Source; + } + + bool hasDefaultGlobalAllocationFunctionVisibility() const { + return getGlobalAllocationFunctionVisibility() == + VisibilityForcedKinds::ForceDefault; + } + + bool hasProtectedGlobalAllocationFunctionVisibility() const { + return getGlobalAllocationFunctionVisibility() == + VisibilityForcedKinds::ForceProtected; + } + + bool hasHiddenGlobalAllocationFunctionVisibility() const { + return getGlobalAllocationFunctionVisibility() == + VisibilityForcedKinds::ForceHidden; + } + /// Remap path prefix according to -fmacro-prefix-path option. - void remapPathPrefix(SmallString<256> &Path) const; + void remapPathPrefix(SmallVectorImpl<char> &Path) const; + + RoundingMode getDefaultRoundingMode() const { + return RoundingMath ? RoundingMode::Dynamic + : RoundingMode::NearestTiesToEven; + } + + FPExceptionModeKind getDefaultExceptionMode() const { + FPExceptionModeKind EM = getFPExceptionMode(); + if (EM == FPExceptionModeKind::FPE_Default) + return FPExceptionModeKind::FPE_Ignore; + return EM; + } }; /// Floating point control options @@ -473,7 +725,7 @@ class FPOptionsOverride; class FPOptions { public: // We start by defining the layout. - using storage_type = uint16_t; + using storage_type = uint32_t; using RoundingMode = llvm::RoundingMode; @@ -499,11 +751,13 @@ public: private: storage_type Value; + FPOptionsOverride getChangesSlow(const FPOptions &Base) const; + public: FPOptions() : Value(0) { setFPContractMode(LangOptions::FPM_Off); - setRoundingMode(static_cast<RoundingMode>(LangOptions::FPR_ToNearest)); - setFPExceptionMode(LangOptions::FPE_Ignore); + setConstRoundingMode(RoundingMode::Dynamic); + setSpecifiedExceptionMode(LangOptions::FPE_Default); } explicit FPOptions(const LangOptions &LO) { Value = 0; @@ -514,8 +768,9 @@ public: if (LangOptContractMode == LangOptions::FPM_FastHonorPragmas) LangOptContractMode = LangOptions::FPM_Fast; setFPContractMode(LangOptContractMode); - setRoundingMode(LO.getFPRoundingMode()); - setFPExceptionMode(LO.getFPExceptionMode()); + setRoundingMath(LO.RoundingMath); + setConstRoundingMode(LangOptions::RoundingMode::Dynamic); + setSpecifiedExceptionMode(LO.getFPExceptionMode()); setAllowFPReassociate(LO.AllowFPReassoc); setNoHonorNaNs(LO.NoHonorNaNs); setNoHonorInfs(LO.NoHonorInfs); @@ -524,12 +779,13 @@ public: setAllowApproxFunc(LO.ApproxFunc); if (getFPContractMode() == LangOptions::FPM_On && getRoundingMode() == llvm::RoundingMode::Dynamic && - getFPExceptionMode() == LangOptions::FPE_Strict) + getExceptionMode() == LangOptions::FPE_Strict) // If the FP settings are set to the "strict" model, then // FENV access is set to true. (ffp-model=strict) setAllowFEnvAccess(true); else setAllowFEnvAccess(LangOptions::FPM_Off); + setComplexRange(LO.getComplexRange()); } bool allowFPContractWithinStatement() const { @@ -548,10 +804,33 @@ public: bool isFPConstrained() const { return getRoundingMode() != llvm::RoundingMode::NearestTiesToEven || - getFPExceptionMode() != LangOptions::FPE_Ignore || + getExceptionMode() != LangOptions::FPE_Ignore || getAllowFEnvAccess(); } + RoundingMode getRoundingMode() const { + RoundingMode RM = getConstRoundingMode(); + if (RM == RoundingMode::Dynamic) { + // C23: 7.6.2p3 If the FE_DYNAMIC mode is specified and FENV_ACCESS is + // "off", the translator may assume that the default rounding mode is in + // effect. + if (!getAllowFEnvAccess() && !getRoundingMath()) + RM = RoundingMode::NearestTiesToEven; + } + return RM; + } + + LangOptions::FPExceptionModeKind getExceptionMode() const { + LangOptions::FPExceptionModeKind EM = getSpecifiedExceptionMode(); + if (EM == LangOptions::FPExceptionModeKind::FPE_Default) { + if (getAllowFEnvAccess()) + return LangOptions::FPExceptionModeKind::FPE_Strict; + else + return LangOptions::FPExceptionModeKind::FPE_Ignore; + } + return EM; + } + bool operator==(FPOptions other) const { return Value == other.Value; } /// Return the default value of FPOptions that's used when trailing @@ -565,6 +844,9 @@ public: return Opts; } + /// Return difference with the given option set. + FPOptionsOverride getChangesFrom(const FPOptions &Base) const; + // We can define most of the accessors automatically: #define OPTION(NAME, TYPE, WIDTH, PREVIOUS) \ TYPE get##NAME() const { \ @@ -599,7 +881,7 @@ public: /// The type suitable for storing values of FPOptionsOverride. Must be twice /// as wide as bit size of FPOption. - using storage_type = uint32_t; + using storage_type = uint64_t; static_assert(sizeof(storage_type) >= 2 * sizeof(FPOptions::storage_type), "Too short type for FPOptionsOverride"); @@ -613,6 +895,8 @@ public: : Options(LO), OverrideMask(OverrideMaskBits) {} FPOptionsOverride(FPOptions FPO) : Options(FPO), OverrideMask(OverrideMaskBits) {} + FPOptionsOverride(FPOptions FPO, FPOptions::storage_type Mask) + : Options(FPO), OverrideMask(Mask) {} bool requiresTrailingStorage() const { return OverrideMask != 0; } @@ -635,6 +919,7 @@ public: setNoSignedZeroOverride(!Value); setAllowReciprocalOverride(!Value); setAllowApproxFuncOverride(!Value); + setMathErrnoOverride(Value); if (Value) /* Precise mode implies fp_contract=on and disables ffast-math */ setAllowFPContractWithinStatement(); @@ -693,6 +978,12 @@ public: LLVM_DUMP_METHOD void dump(); }; +inline FPOptionsOverride FPOptions::getChangesFrom(const FPOptions &Base) const { + if (Value == Base.Value) + return FPOptionsOverride(); + return getChangesSlow(Base); +} + /// Describes the kind of translation unit being processed. enum TranslationUnitKind { /// The translation unit is a complete translation unit. diff --git a/contrib/llvm-project/clang/include/clang/Basic/LangStandard.h b/contrib/llvm-project/clang/include/clang/Basic/LangStandard.h index b0785409628c..bc49669a82ad 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/LangStandard.h +++ b/contrib/llvm-project/clang/include/clang/Basic/LangStandard.h @@ -12,6 +12,10 @@ #include "clang/Basic/LLVM.h" #include "llvm/ADT/StringRef.h" +namespace llvm { +class Triple; +} + namespace clang { /// The language for the input, used to select and validate the language @@ -36,26 +40,29 @@ enum class Language : uint8_t { CUDA, RenderScript, HIP, + HLSL, ///@} }; +StringRef languageToString(Language L); enum LangFeatures { LineComment = (1 << 0), C99 = (1 << 1), C11 = (1 << 2), C17 = (1 << 3), - C2x = (1 << 4), + C23 = (1 << 4), CPlusPlus = (1 << 5), CPlusPlus11 = (1 << 6), CPlusPlus14 = (1 << 7), CPlusPlus17 = (1 << 8), CPlusPlus20 = (1 << 9), - CPlusPlus2b = (1 << 10), - Digraphs = (1 << 11), - GNUMode = (1 << 12), - HexFloat = (1 << 13), - ImplicitInt = (1 << 14), - OpenCL = (1 << 15) + CPlusPlus23 = (1 << 10), + CPlusPlus26 = (1 << 11), + Digraphs = (1 << 12), + GNUMode = (1 << 13), + HexFloat = (1 << 14), + OpenCL = (1 << 15), + HLSL = (1 << 16) }; /// LangStandard - Information about the properties of a particular language @@ -95,8 +102,8 @@ public: /// isC17 - Language is a superset of C17. bool isC17() const { return Flags & C17; } - /// isC2x - Language is a superset of C2x. - bool isC2x() const { return Flags & C2x; } + /// isC23 - Language is a superset of C23. + bool isC23() const { return Flags & C23; } /// isCPlusPlus - Language is a C++ variant. bool isCPlusPlus() const { return Flags & CPlusPlus; } @@ -113,8 +120,11 @@ public: /// isCPlusPlus20 - Language is a C++20 variant (or later). bool isCPlusPlus20() const { return Flags & CPlusPlus20; } - /// isCPlusPlus2b - Language is a post-C++20 variant (or later). - bool isCPlusPlus2b() const { return Flags & CPlusPlus2b; } + /// isCPlusPlus23 - Language is a post-C++23 variant (or later). + bool isCPlusPlus23() const { return Flags & CPlusPlus23; } + + /// isCPlusPlus26 - Language is a post-C++26 variant (or later). + bool isCPlusPlus26() const { return Flags & CPlusPlus26; } /// hasDigraphs - Language supports digraphs. bool hasDigraphs() const { return Flags & Digraphs; } @@ -125,9 +135,6 @@ public: /// hasHexFloats - Language supports hexadecimal float constants. bool hasHexFloats() const { return Flags & HexFloat; } - /// hasImplicitInt - Language allows variables to be typed as int implicitly. - bool hasImplicitInt() const { return Flags & ImplicitInt; } - /// isOpenCL - Language is a OpenCL variant. bool isOpenCL() const { return Flags & OpenCL; } @@ -136,6 +143,9 @@ public: static const LangStandard *getLangStandardForName(StringRef Name); }; +LangStandard::Kind getDefaultLanguageStandard(clang::Language Lang, + const llvm::Triple &T); + } // end namespace clang #endif diff --git a/contrib/llvm-project/clang/include/clang/Basic/LangStandards.def b/contrib/llvm-project/clang/include/clang/Basic/LangStandards.def index 2cfeb68e56d6..b6192e48efc1 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/LangStandards.def +++ b/contrib/llvm-project/clang/include/clang/Basic/LangStandards.def @@ -17,7 +17,7 @@ /// \param LANG - The Language for which this is a standard. /// \param DESC - A short description of the standard. /// \param FEATURES - The standard features as flags, these are enums from the -/// clang::frontend namespace, which is assumed to be be available. +/// clang::frontend namespace, which is assumed to be available. /// LANGSTANDARD_ALIAS(IDENT, ALIAS) /// \param IDENT - The name of the standard as a C++ identifier. @@ -36,18 +36,17 @@ // C89-ish modes. LANGSTANDARD(c89, "c89", - C, "ISO C 1990", - ImplicitInt) + C, "ISO C 1990", 0) LANGSTANDARD_ALIAS(c89, "c90") LANGSTANDARD_ALIAS(c89, "iso9899:1990") LANGSTANDARD(c94, "iso9899:199409", C, "ISO C 1990 with amendment 1", - Digraphs | ImplicitInt) + Digraphs) LANGSTANDARD(gnu89, "gnu89", C, "ISO C 1990 with GNU extensions", - LineComment | Digraphs | GNUMode | ImplicitInt) + LineComment | Digraphs | GNUMode) LANGSTANDARD_ALIAS(gnu89, "gnu90") // C99-ish modes @@ -88,13 +87,17 @@ LANGSTANDARD(gnu17, "gnu17", LineComment | C99 | C11 | C17 | Digraphs | GNUMode | HexFloat) LANGSTANDARD_ALIAS(gnu17, "gnu18") -// C2x modes -LANGSTANDARD(c2x, "c2x", - C, "Working Draft for ISO C2x", - LineComment | C99 | C11 | C17 | C2x | Digraphs | HexFloat) -LANGSTANDARD(gnu2x, "gnu2x", - C, "Working Draft for ISO C2x with GNU extensions", - LineComment | C99 | C11 | C17 | C2x | Digraphs | GNUMode | HexFloat) +// C23 modes +LANGSTANDARD(c23, "c23", + C, "Working Draft for ISO C23", + LineComment | C99 | C11 | C17 | C23 | Digraphs | HexFloat) +LANGSTANDARD_ALIAS_DEPR(c23, "c2x") +LANGSTANDARD(gnu23, "gnu23", + C, "Working Draft for ISO C23 with GNU extensions", + LineComment | C99 | C11 | C17 | C23 | Digraphs | GNUMode | HexFloat) +LANGSTANDARD_ALIAS_DEPR(gnu23, "gnu2x") +// FIXME: Add the alias for iso9899:202* once we know the year ISO publishes +// the document (expected to be 2024). // C++ modes LANGSTANDARD(cxx98, "c++98", @@ -152,15 +155,29 @@ LANGSTANDARD(gnucxx20, "gnu++20", CPlusPlus20 | Digraphs | HexFloat | GNUMode) LANGSTANDARD_ALIAS_DEPR(gnucxx20, "gnu++2a") -LANGSTANDARD(cxx2b, "c++2b", - CXX, "Working draft for ISO C++ 2023 DIS", +LANGSTANDARD(cxx23, "c++23", + CXX, "ISO C++ 2023 DIS", LineComment | CPlusPlus | CPlusPlus11 | CPlusPlus14 | CPlusPlus17 | - CPlusPlus20 | CPlusPlus2b | Digraphs | HexFloat) + CPlusPlus20 | CPlusPlus23 | Digraphs | HexFloat) +LANGSTANDARD_ALIAS_DEPR(cxx23, "c++2b") -LANGSTANDARD(gnucxx2b, "gnu++2b", - CXX, "Working draft for ISO C++ 2023 DIS with GNU extensions", +LANGSTANDARD(gnucxx23, "gnu++23", + CXX, "ISO C++ 2023 DIS with GNU extensions", LineComment | CPlusPlus | CPlusPlus11 | CPlusPlus14 | CPlusPlus17 | - CPlusPlus20 | CPlusPlus2b | Digraphs | HexFloat | GNUMode) + CPlusPlus20 | CPlusPlus23 | Digraphs | HexFloat | GNUMode) +LANGSTANDARD_ALIAS_DEPR(gnucxx23, "gnu++2b") + +LANGSTANDARD(cxx26, "c++2c", + CXX, "Working draft for C++2c", + LineComment | CPlusPlus | CPlusPlus11 | CPlusPlus14 | CPlusPlus17 | + CPlusPlus20 | CPlusPlus23 | CPlusPlus26 | Digraphs | HexFloat) +LANGSTANDARD_ALIAS(cxx26, "c++26") + +LANGSTANDARD(gnucxx26, "gnu++2c", + CXX, "Working draft for C++2c with GNU extensions", + LineComment | CPlusPlus | CPlusPlus11 | CPlusPlus14 | CPlusPlus17 | + CPlusPlus20 | CPlusPlus23 | CPlusPlus26 | Digraphs | HexFloat | GNUMode) +LANGSTANDARD_ALIAS(gnucxx26, "gnu++26") // OpenCL LANGSTANDARD(opencl10, "cl1.0", @@ -180,8 +197,15 @@ LANGSTANDARD(opencl20, "cl2.0", LANGSTANDARD(opencl30, "cl3.0", OpenCL, "OpenCL 3.0", LineComment | C99 | Digraphs | HexFloat | OpenCL) -LANGSTANDARD(openclcpp, "clc++", - OpenCL, "C++ for OpenCL", + +LANGSTANDARD(openclcpp10, "clc++1.0", + OpenCL, "C++ for OpenCL 1.0", + LineComment | CPlusPlus | CPlusPlus11 | CPlusPlus14 | CPlusPlus17 | + Digraphs | HexFloat | OpenCL) +LANGSTANDARD_ALIAS(openclcpp10, "clc++") + +LANGSTANDARD(openclcpp2021, "clc++2021", + OpenCL, "C++ for OpenCL 2021", LineComment | CPlusPlus | CPlusPlus11 | CPlusPlus14 | CPlusPlus17 | Digraphs | HexFloat | OpenCL) @@ -190,15 +214,39 @@ LANGSTANDARD_ALIAS_DEPR(opencl11, "CL1.1") LANGSTANDARD_ALIAS_DEPR(opencl12, "CL1.2") LANGSTANDARD_ALIAS_DEPR(opencl20, "CL2.0") LANGSTANDARD_ALIAS_DEPR(opencl30, "CL3.0") -LANGSTANDARD_ALIAS_DEPR(openclcpp, "CLC++") +LANGSTANDARD_ALIAS_DEPR(openclcpp10, "CLC++") +LANGSTANDARD_ALIAS_DEPR(openclcpp10, "CLC++1.0") +LANGSTANDARD_ALIAS_DEPR(openclcpp2021, "CLC++2021") -// CUDA -LANGSTANDARD(cuda, "cuda", CUDA, "NVIDIA CUDA(tm)", - LineComment | CPlusPlus | CPlusPlus11 | CPlusPlus14 | Digraphs) +// HLSL +LANGSTANDARD(hlsl, "hlsl", + HLSL, "High Level Shader Language", + LineComment | HLSL | CPlusPlus ) + +LANGSTANDARD(hlsl2015, "hlsl2015", + HLSL, "High Level Shader Language 2015", + LineComment | HLSL | CPlusPlus ) + +LANGSTANDARD(hlsl2016, "hlsl2016", + HLSL, "High Level Shader Language 2016", + LineComment | HLSL | CPlusPlus ) + +LANGSTANDARD(hlsl2017, "hlsl2017", + HLSL, "High Level Shader Language 2017", + LineComment | HLSL | CPlusPlus ) + +LANGSTANDARD(hlsl2018, "hlsl2018", + HLSL, "High Level Shader Language 2018", + LineComment | HLSL | CPlusPlus ) + +LANGSTANDARD(hlsl2021, "hlsl2021", + HLSL, "High Level Shader Language 2021", + LineComment | HLSL | CPlusPlus ) + +LANGSTANDARD(hlsl202x, "hlsl202x", + HLSL, "High Level Shader Language 202x", + LineComment | HLSL | CPlusPlus | CPlusPlus11) -// HIP -LANGSTANDARD(hip, "hip", HIP, "HIP", - LineComment | CPlusPlus | CPlusPlus11 | CPlusPlus14 | Digraphs) #undef LANGSTANDARD #undef LANGSTANDARD_ALIAS diff --git a/contrib/llvm-project/clang/include/clang/Basic/Linkage.h b/contrib/llvm-project/clang/include/clang/Basic/Linkage.h index f4d442c084cf..fcf56b93b978 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Linkage.h +++ b/contrib/llvm-project/clang/include/clang/Basic/Linkage.h @@ -14,21 +14,25 @@ #ifndef LLVM_CLANG_BASIC_LINKAGE_H #define LLVM_CLANG_BASIC_LINKAGE_H +#include "llvm/Support/ErrorHandling.h" #include <utility> namespace clang { /// Describes the different kinds of linkage /// (C++ [basic.link], C99 6.2.2) that an entity may have. -enum Linkage : unsigned char { +enum class Linkage : unsigned char { + // Linkage hasn't been computed. + Invalid = 0, + /// No linkage, which means that the entity is unique and /// can only be referred to from within its scope. - NoLinkage = 0, + None, /// Internal linkage, which indicates that the entity can /// be referred to from within the translation unit (but not other /// translation units). - InternalLinkage, + Internal, /// External linkage within a unique namespace. /// @@ -37,26 +41,21 @@ enum Linkage : unsigned char { /// their names are unique to this translation unit, which is /// equivalent to having internal linkage from the code-generation /// point of view. - UniqueExternalLinkage, + UniqueExternal, /// No linkage according to the standard, but is visible from other /// translation units because of types defined in a inline function. - VisibleNoLinkage, - - /// Internal linkage according to the Modules TS, but can be referred - /// to from other translation units indirectly through inline functions and - /// templates in the module interface. - ModuleInternalLinkage, + VisibleNone, /// Module linkage, which indicates that the entity can be referred /// to from other translation units within the same module, and indirectly /// from arbitrary other translation units through inline functions and /// templates in the module interface. - ModuleLinkage, + Module, /// External linkage, which indicates that the entity can /// be referred to from other translation units. - ExternalLinkage + External }; /// Describes the different kinds of language linkage @@ -89,24 +88,34 @@ inline bool isUniqueGVALinkage(GVALinkage L) { } inline bool isExternallyVisible(Linkage L) { - return L >= VisibleNoLinkage; + switch (L) { + case Linkage::Invalid: + llvm_unreachable("Linkage hasn't been computed!"); + case Linkage::None: + case Linkage::Internal: + case Linkage::UniqueExternal: + return false; + case Linkage::VisibleNone: + case Linkage::Module: + case Linkage::External: + return true; + } + llvm_unreachable("Unhandled Linkage enum"); } inline Linkage getFormalLinkage(Linkage L) { switch (L) { - case UniqueExternalLinkage: - return ExternalLinkage; - case VisibleNoLinkage: - return NoLinkage; - case ModuleInternalLinkage: - return InternalLinkage; + case Linkage::UniqueExternal: + return Linkage::External; + case Linkage::VisibleNone: + return Linkage::None; default: return L; } } inline bool isExternalFormalLinkage(Linkage L) { - return getFormalLinkage(L) == ExternalLinkage; + return getFormalLinkage(L) == Linkage::External; } /// Compute the minimum linkage given two linkages. @@ -118,13 +127,13 @@ inline bool isExternalFormalLinkage(Linkage L) { /// special cases for when VisibleNoLinkage would lose the visible bit and /// become NoLinkage. inline Linkage minLinkage(Linkage L1, Linkage L2) { - if (L2 == VisibleNoLinkage) + if (L2 == Linkage::VisibleNone) std::swap(L1, L2); - if (L1 == VisibleNoLinkage) { - if (L2 == InternalLinkage) - return NoLinkage; - if (L2 == UniqueExternalLinkage) - return NoLinkage; + if (L1 == Linkage::VisibleNone) { + if (L2 == Linkage::Internal) + return Linkage::None; + if (L2 == Linkage::UniqueExternal) + return Linkage::None; } return L1 < L2 ? L1 : L2; } diff --git a/contrib/llvm-project/clang/include/clang/Basic/MSP430Target.def b/contrib/llvm-project/clang/include/clang/Basic/MSP430Target.def index a1e192c19261..7a10be1d54c8 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/MSP430Target.def +++ b/contrib/llvm-project/clang/include/clang/Basic/MSP430Target.def @@ -238,8 +238,7 @@ MSP430_MCU_FEAT("msp430f4793", "32bit") MSP430_MCU_FEAT("msp430f4784", "32bit") MSP430_MCU_FEAT("msp430f4794", "32bit") -// Generic MSUs -MSP430_MCU("msp430") +// Generic MCUs MSP430_MCU("msp430i2xxgeneric") #undef MSP430_MCU diff --git a/contrib/llvm-project/clang/include/clang/Basic/MakeSupport.h b/contrib/llvm-project/clang/include/clang/Basic/MakeSupport.h new file mode 100644 index 000000000000..c663014ba7bc --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/MakeSupport.h @@ -0,0 +1,23 @@ +//===- MakeSupport.h - Make Utilities ---------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CLANG_BASIC_MAKESUPPORT_H +#define LLVM_CLANG_BASIC_MAKESUPPORT_H + +#include "clang/Basic/LLVM.h" +#include "llvm/ADT/StringRef.h" + +namespace clang { + +/// Quote target names for inclusion in GNU Make dependency files. +/// Only the characters '$', '#', ' ', '\t' are quoted. +void quoteMakeTarget(StringRef Target, SmallVectorImpl<char> &Res); + +} // namespace clang + +#endif // LLVM_CLANG_BASIC_MAKESUPPORT_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/Module.h b/contrib/llvm-project/clang/include/clang/Basic/Module.h index 3476b05d2e92..62786e3ac865 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Module.h +++ b/contrib/llvm-project/clang/include/clang/Basic/Module.h @@ -20,7 +20,6 @@ #include "clang/Basic/SourceLocation.h" #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/DenseSet.h" -#include "llvm/ADT/Optional.h" #include "llvm/ADT/PointerIntPair.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SetVector.h" @@ -33,8 +32,10 @@ #include <cstdint> #include <ctime> #include <iterator> +#include <optional> #include <string> #include <utility> +#include <variant> #include <vector> namespace llvm { @@ -71,8 +72,8 @@ struct ASTFileSignature : std::array<uint8_t, 20> { return Value; } - static ASTFileSignature create(StringRef Bytes) { - return create(Bytes.bytes_begin(), Bytes.bytes_end()); + static ASTFileSignature create(std::array<uint8_t, 20> Bytes) { + return ASTFileSignature(std::move(Bytes)); } static ASTFileSignature createDISentinel() { @@ -81,6 +82,12 @@ struct ASTFileSignature : std::array<uint8_t, 20> { return Sentinel; } + static ASTFileSignature createDummy() { + ASTFileSignature Dummy; + Dummy.fill(0x00); + return Dummy; + } + template <typename InputIt> static ASTFileSignature create(InputIt First, InputIt Last) { assert(std::distance(First, Last) == size && @@ -93,7 +100,9 @@ struct ASTFileSignature : std::array<uint8_t, 20> { }; /// Describes a module or submodule. -class Module { +/// +/// Aligned to 8 bytes to allow for llvm::PointerIntPair<Module *, 3>. +class alignas(8) Module { public: /// The name of this module. std::string Name; @@ -101,19 +110,40 @@ public: /// The location of the module definition. SourceLocation DefinitionLoc; + // FIXME: Consider if reducing the size of this enum (having Partition and + // Named modules only) then representing interface/implementation separately + // is more efficient. enum ModuleKind { /// This is a module that was defined by a module map and built out /// of header files. ModuleMapModule, - /// This is a C++ Modules TS module interface unit. + /// This is a C++ 20 header unit. + ModuleHeaderUnit, + + /// This is a C++20 module interface unit. ModuleInterfaceUnit, - /// This is a fragment of the global module within some C++ module. - GlobalModuleFragment, + /// This is a C++20 module implementation unit. + ModuleImplementationUnit, + + /// This is a C++ 20 module partition interface. + ModulePartitionInterface, + + /// This is a C++ 20 module partition implementation. + ModulePartitionImplementation, + + /// This is the explicit Global Module Fragment of a modular TU. + /// As per C++ [module.global.frag]. + ExplicitGlobalModuleFragment, /// This is the private module fragment within some C++ module. PrivateModuleFragment, + + /// This is an implicit fragment of the global module which contains + /// only language linkage declarations (made in the purview of the + /// named module). + ImplicitGlobalModuleFragment, }; /// The kind of this module. @@ -126,14 +156,14 @@ public: /// The build directory of this module. This is the directory in /// which the module is notionally built, and relative to which its headers /// are found. - const DirectoryEntry *Directory = nullptr; + OptionalDirectoryEntryRef Directory; /// The presumed file name for the module map defining this module. /// Only non-empty when building from preprocessed source. std::string PresumedModuleMapFile; /// The umbrella header or directory. - llvm::PointerUnion<const FileEntry *, const DirectoryEntry *> Umbrella; + std::variant<std::monostate, FileEntryRef, DirectoryEntryRef> Umbrella; /// The module signature. ASTFileSignature Signature; @@ -148,10 +178,38 @@ public: /// eventually be exposed, for use in "private" modules. std::string ExportAsModule; - /// Does this Module scope describe part of the purview of a named C++ module? - bool isModulePurview() const { - return Kind == ModuleInterfaceUnit || Kind == PrivateModuleFragment; + /// For the debug info, the path to this module's .apinotes file, if any. + std::string APINotesFile; + + /// Does this Module is a named module of a standard named module? + bool isNamedModule() const { + switch (Kind) { + case ModuleInterfaceUnit: + case ModuleImplementationUnit: + case ModulePartitionInterface: + case ModulePartitionImplementation: + case PrivateModuleFragment: + return true; + default: + return false; + } + } + + /// Does this Module scope describe a fragment of the global module within + /// some C++ module. + bool isGlobalModule() const { + return isExplicitGlobalModule() || isImplicitGlobalModule(); } + bool isExplicitGlobalModule() const { + return Kind == ExplicitGlobalModuleFragment; + } + bool isImplicitGlobalModule() const { + return Kind == ImplicitGlobalModuleFragment; + } + + bool isPrivateModule() const { return Kind == PrivateModuleFragment; } + + bool isModuleMapModule() const { return Kind == ModuleMapModule; } private: /// The submodules of this module, indexed by name. @@ -163,10 +221,10 @@ private: /// The AST file if this is a top-level module which has a /// corresponding serialized AST file, or null otherwise. - Optional<FileEntryRef> ASTFile; + OptionalFileEntryRef ASTFile; /// The top-level headers associated with this module. - llvm::SmallSetVector<const FileEntry *, 2> TopHeaders; + llvm::SmallSetVector<FileEntryRef, 2> TopHeaders; /// top-level header filenames that aren't resolved to FileEntries yet. std::vector<std::string> TopHeaderNames; @@ -192,9 +250,7 @@ public: struct Header { std::string NameAsWritten; std::string PathRelativeToRootModuleDirectory; - const FileEntry *Entry; - - explicit operator bool() { return Entry; } + FileEntryRef Entry; }; /// Information about a directory name as found in the module map @@ -202,9 +258,7 @@ public: struct DirectoryName { std::string NameAsWritten; std::string PathRelativeToRootModuleDirectory; - const DirectoryEntry *Entry; - - explicit operator bool() { return Entry; } + DirectoryEntryRef Entry; }; /// The headers that are part of this module. @@ -218,8 +272,8 @@ public: std::string FileName; bool IsUmbrella = false; bool HasBuiltinHeader = false; - Optional<off_t> Size; - Optional<time_t> ModTime; + std::optional<off_t> Size; + std::optional<time_t> ModTime; }; /// Headers that are mentioned in the module map file but that we have not @@ -246,50 +300,62 @@ public: /// Whether this module has declared itself unimportable, either because /// it's missing a requirement from \p Requirements or because it's been /// shadowed by another module. + LLVM_PREFERRED_TYPE(bool) unsigned IsUnimportable : 1; /// Whether we tried and failed to load a module file for this module. + LLVM_PREFERRED_TYPE(bool) unsigned HasIncompatibleModuleFile : 1; /// Whether this module is available in the current translation unit. /// /// If the module is missing headers or does not meet all requirements then /// this bit will be 0. + LLVM_PREFERRED_TYPE(bool) unsigned IsAvailable : 1; /// Whether this module was loaded from a module file. + LLVM_PREFERRED_TYPE(bool) unsigned IsFromModuleFile : 1; /// Whether this is a framework module. + LLVM_PREFERRED_TYPE(bool) unsigned IsFramework : 1; /// Whether this is an explicit submodule. + LLVM_PREFERRED_TYPE(bool) unsigned IsExplicit : 1; /// Whether this is a "system" module (which assumes that all /// headers in it are system headers). + LLVM_PREFERRED_TYPE(bool) unsigned IsSystem : 1; /// Whether this is an 'extern "C"' module (which implicitly puts all /// headers in it within an 'extern "C"' block, and allows the module to be /// imported within such a block). + LLVM_PREFERRED_TYPE(bool) unsigned IsExternC : 1; /// Whether this is an inferred submodule (module * { ... }). + LLVM_PREFERRED_TYPE(bool) unsigned IsInferred : 1; /// Whether we should infer submodules for this module based on /// the headers. /// /// Submodules can only be inferred for modules with an umbrella header. + LLVM_PREFERRED_TYPE(bool) unsigned InferSubmodules : 1; /// Whether, when inferring submodules, the inferred submodules /// should be explicit. + LLVM_PREFERRED_TYPE(bool) unsigned InferExplicitSubmodules : 1; /// Whether, when inferring submodules, the inferr submodules should /// export all modules they import (e.g., the equivalent of "export *"). + LLVM_PREFERRED_TYPE(bool) unsigned InferExportWildcard : 1; /// Whether the set of configuration macros is exhaustive. @@ -297,16 +363,24 @@ public: /// When the set of configuration macros is exhaustive, meaning /// that no identifier not in this list should affect how the module is /// built. + LLVM_PREFERRED_TYPE(bool) unsigned ConfigMacrosExhaustive : 1; /// Whether files in this module can only include non-modular headers /// and headers from used modules. + LLVM_PREFERRED_TYPE(bool) unsigned NoUndeclaredIncludes : 1; /// Whether this module came from a "private" module map, found next /// to a regular (public) module map. + LLVM_PREFERRED_TYPE(bool) unsigned ModuleMapIsPrivate : 1; + /// Whether this C++20 named modules doesn't need an initializer. + /// This is only meaningful for C++20 modules. + LLVM_PREFERRED_TYPE(bool) + unsigned NamedModuleHasInit : 1; + /// Describes the visibility of the various names within a /// particular module. enum NameVisibilityKind { @@ -326,6 +400,10 @@ public: /// module depends. llvm::SmallSetVector<Module *, 2> Imports; + /// The set of top-level modules that affected the compilation of this module, + /// but were not imported. + llvm::SmallSetVector<Module *, 2> AffectingClangModules; + /// Describes an exported module. /// /// The pointer is the module being re-exported, while the bit will be true @@ -359,6 +437,10 @@ public: /// The set of use declarations that have yet to be resolved. SmallVector<ModuleId, 2> UnresolvedDirectUses; + /// When \c NoUndeclaredIncludes is true, the set of modules this module tried + /// to import but didn't because they are not direct uses. + llvm::SmallSetVector<const Module *, 2> UndeclaredUses; + /// A library or framework to link against when an entity from this /// module is used. struct LinkLibrary { @@ -438,6 +520,9 @@ public: bool isUnimportable(const LangOptions &LangOpts, const TargetInfo &Target, Requirement &Req, Module *&ShadowingModule) const; + /// Determine whether this module can be built in this compilation. + bool isForBuilding(const LangOptions &LangOpts) const; + /// Determine whether this module is available for use within the /// current translation unit. bool isAvailable() const { return IsAvailable; } @@ -502,6 +587,62 @@ public: Parent->SubModules.push_back(this); } + /// Is this module have similar semantics as headers. + bool isHeaderLikeModule() const { + return isModuleMapModule() || isHeaderUnit(); + } + + /// Is this a module partition. + bool isModulePartition() const { + return Kind == ModulePartitionInterface || + Kind == ModulePartitionImplementation; + } + + /// Is this a module implementation. + bool isModuleImplementation() const { + return Kind == ModuleImplementationUnit; + } + + /// Is this module a header unit. + bool isHeaderUnit() const { return Kind == ModuleHeaderUnit; } + // Is this a C++20 module interface or a partition. + bool isInterfaceOrPartition() const { + return Kind == ModuleInterfaceUnit || isModulePartition(); + } + + /// Is this a C++20 named module unit. + bool isNamedModuleUnit() const { + return isInterfaceOrPartition() || isModuleImplementation(); + } + + bool isModuleInterfaceUnit() const { + return Kind == ModuleInterfaceUnit || Kind == ModulePartitionInterface; + } + + bool isNamedModuleInterfaceHasInit() const { return NamedModuleHasInit; } + + /// Get the primary module interface name from a partition. + StringRef getPrimaryModuleInterfaceName() const { + // Technically, global module fragment belongs to global module. And global + // module has no name: [module.unit]p6: + // The global module has no name, no module interface unit, and is not + // introduced by any module-declaration. + // + // <global> is the default name showed in module map. + if (isGlobalModule()) + return "<global>"; + + if (isModulePartition()) { + auto pos = Name.find(':'); + return StringRef(Name.data(), pos); + } + + if (isPrivateModule()) + return getTopLevelModuleName(); + + return Name; + } + /// Retrieve the full name of this module, including the path from /// its top-level module. /// \param AllowStringLiterals If \c true, components that might not be @@ -531,38 +672,39 @@ public: } /// The serialized AST file for this module, if one was created. - OptionalFileEntryRefDegradesToFileEntryPtr getASTFile() const { + OptionalFileEntryRef getASTFile() const { return getTopLevelModule()->ASTFile; } /// Set the serialized AST file for the top-level module of this module. - void setASTFile(Optional<FileEntryRef> File) { - assert((!File || !getASTFile() || getASTFile() == File) && - "file path changed"); + void setASTFile(OptionalFileEntryRef File) { + assert((!getASTFile() || getASTFile() == File) && "file path changed"); getTopLevelModule()->ASTFile = File; } - /// Retrieve the directory for which this module serves as the - /// umbrella. - DirectoryName getUmbrellaDir() const; + /// Retrieve the umbrella directory as written. + std::optional<DirectoryName> getUmbrellaDirAsWritten() const { + if (const auto *Dir = std::get_if<DirectoryEntryRef>(&Umbrella)) + return DirectoryName{UmbrellaAsWritten, + UmbrellaRelativeToRootModuleDirectory, *Dir}; + return std::nullopt; + } - /// Retrieve the header that serves as the umbrella header for this - /// module. - Header getUmbrellaHeader() const { - if (auto *FE = Umbrella.dyn_cast<const FileEntry *>()) + /// Retrieve the umbrella header as written. + std::optional<Header> getUmbrellaHeaderAsWritten() const { + if (const auto *Hdr = std::get_if<FileEntryRef>(&Umbrella)) return Header{UmbrellaAsWritten, UmbrellaRelativeToRootModuleDirectory, - FE}; - return Header{}; + *Hdr}; + return std::nullopt; } - /// Determine whether this module has an umbrella directory that is - /// not based on an umbrella header. - bool hasUmbrellaDir() const { - return Umbrella && Umbrella.is<const DirectoryEntry *>(); - } + /// Get the effective umbrella directory for this module: either the one + /// explicitly written in the module map file, or the parent of the umbrella + /// header. + OptionalDirectoryEntryRef getEffectiveUmbrellaDir() const; /// Add a top-level header associated with this module. - void addTopHeader(const FileEntry *File); + void addTopHeader(FileEntryRef File); /// Add a top-level header filename associated with this module. void addTopHeaderFilename(StringRef Filename) { @@ -570,11 +712,11 @@ public: } /// The top-level headers associated with this module. - ArrayRef<const FileEntry *> getTopHeaders(FileManager &FileMgr); + ArrayRef<FileEntryRef> getTopHeaders(FileManager &FileMgr); /// Determine whether this module has declared its intention to /// directly use another module. - bool directlyUses(const Module *Requested) const; + bool directlyUses(const Module *Requested); /// Add the given feature requirement to the list of features /// required by this module. @@ -603,6 +745,18 @@ public: Module *findSubmodule(StringRef Name) const; Module *findOrInferSubmodule(StringRef Name); + /// Get the Global Module Fragment (sub-module) for this module, it there is + /// one. + /// + /// \returns The GMF sub-module if found, or NULL otherwise. + Module *getGlobalModuleFragment() const; + + /// Get the Private Module Fragment (sub-module) for this module, it there is + /// one. + /// + /// \returns The PMF sub-module if found, or NULL otherwise. + Module *getPrivateModuleFragment() const; + /// Determine whether the specified module would be visible to /// a lookup at the end of this module. /// @@ -620,16 +774,11 @@ public: using submodule_iterator = std::vector<Module *>::iterator; using submodule_const_iterator = std::vector<Module *>::const_iterator; - submodule_iterator submodule_begin() { return SubModules.begin(); } - submodule_const_iterator submodule_begin() const {return SubModules.begin();} - submodule_iterator submodule_end() { return SubModules.end(); } - submodule_const_iterator submodule_end() const { return SubModules.end(); } - llvm::iterator_range<submodule_iterator> submodules() { - return llvm::make_range(submodule_begin(), submodule_end()); + return llvm::make_range(SubModules.begin(), SubModules.end()); } llvm::iterator_range<submodule_const_iterator> submodules() const { - return llvm::make_range(submodule_begin(), submodule_end()); + return llvm::make_range(SubModules.begin(), SubModules.end()); } /// Appends this module's list of exported modules to \p Exported. @@ -705,6 +854,11 @@ public: ConflictCallback Cb = [](ArrayRef<Module *>, Module *, StringRef) {}); + /// Make transitive imports visible for [module.import]/7. + void makeTransitiveImportsVisible( + Module *M, SourceLocation Loc, VisibleCallback Vis = [](Module *) {}, + ConflictCallback Cb = [](ArrayRef<Module *>, Module *, StringRef) {}); + private: /// Import locations for each visible module. Indexed by the module's /// VisibilityID. diff --git a/contrib/llvm-project/clang/include/clang/Basic/NoSanitizeList.h b/contrib/llvm-project/clang/include/clang/Basic/NoSanitizeList.h index 3f80e0fdedda..43415859fcd5 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/NoSanitizeList.h +++ b/contrib/llvm-project/clang/include/clang/Basic/NoSanitizeList.h @@ -41,6 +41,8 @@ public: bool containsFunction(SanitizerMask Mask, StringRef FunctionName) const; bool containsFile(SanitizerMask Mask, StringRef FileName, StringRef Category = StringRef()) const; + bool containsMainFile(SanitizerMask Mask, StringRef FileName, + StringRef Category = StringRef()) const; bool containsLocation(SanitizerMask Mask, SourceLocation Loc, StringRef Category = StringRef()) const; }; diff --git a/contrib/llvm-project/clang/include/clang/Basic/ObjCRuntime.h b/contrib/llvm-project/clang/include/clang/Basic/ObjCRuntime.h index 26403bfa98c9..1ccf60f0b7be 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/ObjCRuntime.h +++ b/contrib/llvm-project/clang/include/clang/Basic/ObjCRuntime.h @@ -16,9 +16,10 @@ #include "clang/Basic/LLVM.h" #include "llvm/ADT/StringRef.h" -#include "llvm/ADT/Triple.h" #include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/HashBuilder.h" #include "llvm/Support/VersionTuple.h" +#include "llvm/TargetParser/Triple.h" #include <string> namespace clang { @@ -99,16 +100,24 @@ public: bool isLegacyDispatchDefaultForArch(llvm::Triple::ArchType Arch) { // The GNUstep runtime uses a newer dispatch method by default from // version 1.6 onwards - if (getKind() == GNUstep && getVersion() >= VersionTuple(1, 6)) { - if (Arch == llvm::Triple::arm || - Arch == llvm::Triple::x86 || - Arch == llvm::Triple::x86_64) - return false; - } - else if ((getKind() == MacOSX) && isNonFragile() && - (getVersion() >= VersionTuple(10, 0)) && - (getVersion() < VersionTuple(10, 6))) - return Arch != llvm::Triple::x86_64; + if (getKind() == GNUstep) { + switch (Arch) { + case llvm::Triple::arm: + case llvm::Triple::x86: + case llvm::Triple::x86_64: + return !(getVersion() >= VersionTuple(1, 6)); + case llvm::Triple::aarch64: + case llvm::Triple::mips64: + return !(getVersion() >= VersionTuple(1, 9)); + case llvm::Triple::riscv64: + return !(getVersion() >= VersionTuple(2, 2)); + default: + return true; + } + } else if ((getKind() == MacOSX) && isNonFragile() && + (getVersion() >= VersionTuple(10, 0)) && + (getVersion() < VersionTuple(10, 6))) + return Arch != llvm::Triple::x86_64; // Except for deployment target of 10.5 or less, // Mac runtimes use legacy dispatch everywhere now. return true; @@ -202,7 +211,13 @@ public: case GCC: return false; case GNUstep: - return false; + // This could be enabled for all versions, except for the fact that the + // implementation of `objc_retain` and friends prior to 2.2 call [object + // retain] in their fall-back paths, which leads to infinite recursion if + // the runtime is built with this enabled. Since distributions typically + // build all Objective-C things with the same compiler version and flags, + // it's better to be conservative here. + return (getVersion() >= VersionTuple(2, 2)); case ObjFW: return false; } @@ -239,7 +254,7 @@ public: case GCC: return false; case GNUstep: - return false; + return getVersion() >= VersionTuple(2, 2); case ObjFW: return false; } @@ -257,6 +272,8 @@ public: return getVersion() >= VersionTuple(12, 2); case WatchOS: return getVersion() >= VersionTuple(5, 2); + case GNUstep: + return getVersion() >= VersionTuple(2, 2); default: return false; } @@ -454,7 +471,8 @@ public: case iOS: return true; case WatchOS: return true; case GCC: return false; - case GNUstep: return false; + case GNUstep: + return (getVersion() >= VersionTuple(2, 2)); case ObjFW: return false; } llvm_unreachable("bad kind"); @@ -480,6 +498,12 @@ public: friend llvm::hash_code hash_value(const ObjCRuntime &OCR) { return llvm::hash_combine(OCR.getKind(), OCR.getVersion()); } + + template <typename HasherT, llvm::endianness Endianness> + friend void addHash(llvm::HashBuilder<HasherT, Endianness> &HBuilder, + const ObjCRuntime &OCR) { + HBuilder.add(OCR.getKind(), OCR.getVersion()); + } }; raw_ostream &operator<<(raw_ostream &out, const ObjCRuntime &value); diff --git a/contrib/llvm-project/clang/include/clang/Basic/OpenACCKinds.h b/contrib/llvm-project/clang/include/clang/Basic/OpenACCKinds.h new file mode 100644 index 000000000000..6487a95910ed --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/OpenACCKinds.h @@ -0,0 +1,401 @@ +//===--- OpenACCKinds.h - OpenACC Enums -------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +/// +/// \file +/// Defines some OpenACC-specific enums and functions. +/// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CLANG_BASIC_OPENACCKINDS_H +#define LLVM_CLANG_BASIC_OPENACCKINDS_H + +#include "clang/Basic/Diagnostic.h" +#include "llvm/Support/ErrorHandling.h" + +namespace clang { +// Represents the Construct/Directive kind of a pragma directive. Note the +// OpenACC standard is inconsistent between calling these Construct vs +// Directive, but we're calling it a Directive to be consistent with OpenMP. +enum class OpenACCDirectiveKind { + // Compute Constructs. + Parallel, + Serial, + Kernels, + + // Data Environment. "enter data" and "exit data" are also referred to in the + // Executable Directives section, but just as a back reference to the Data + // Environment. + Data, + EnterData, + ExitData, + HostData, + + // Misc. + Loop, + Cache, + + // Combined Constructs. + ParallelLoop, + SerialLoop, + KernelsLoop, + + // Atomic Construct. + Atomic, + + // Declare Directive. + Declare, + + // Executable Directives. "wait" is first referred to here, but ends up being + // in its own section after "routine". + Init, + Shutdown, + Set, + Update, + Wait, + + // Procedure Calls in Compute Regions. + Routine, + + // Invalid. + Invalid, +}; + +inline const StreamingDiagnostic &operator<<(const StreamingDiagnostic &Out, + OpenACCDirectiveKind K) { + switch (K) { + case OpenACCDirectiveKind::Parallel: + return Out << "parallel"; + + case OpenACCDirectiveKind::Serial: + return Out << "serial"; + + case OpenACCDirectiveKind::Kernels: + return Out << "kernels"; + + case OpenACCDirectiveKind::Data: + return Out << "data"; + + case OpenACCDirectiveKind::EnterData: + return Out << "enter data"; + + case OpenACCDirectiveKind::ExitData: + return Out << "exit data"; + + case OpenACCDirectiveKind::HostData: + return Out << "host_data"; + + case OpenACCDirectiveKind::Loop: + return Out << "loop"; + + case OpenACCDirectiveKind::Cache: + return Out << "cache"; + + case OpenACCDirectiveKind::ParallelLoop: + return Out << "parallel loop"; + + case OpenACCDirectiveKind::SerialLoop: + return Out << "serial loop"; + + case OpenACCDirectiveKind::KernelsLoop: + return Out << "kernels loop"; + + case OpenACCDirectiveKind::Atomic: + return Out << "atomic"; + + case OpenACCDirectiveKind::Declare: + return Out << "declare"; + + case OpenACCDirectiveKind::Init: + return Out << "init"; + + case OpenACCDirectiveKind::Shutdown: + return Out << "shutdown"; + + case OpenACCDirectiveKind::Set: + return Out << "set"; + + case OpenACCDirectiveKind::Update: + return Out << "update"; + + case OpenACCDirectiveKind::Wait: + return Out << "wait"; + + case OpenACCDirectiveKind::Routine: + return Out << "routine"; + + case OpenACCDirectiveKind::Invalid: + return Out << "<invalid>"; + } + llvm_unreachable("Uncovered directive kind"); +} + +enum class OpenACCAtomicKind { + Read, + Write, + Update, + Capture, + Invalid, +}; + +/// Represents the kind of an OpenACC clause. +enum class OpenACCClauseKind { + /// 'finalize' clause, allowed on 'exit data' directive. + Finalize, + /// 'if_present' clause, allowed on 'host_data' and 'update' directives. + IfPresent, + /// 'seq' clause, allowed on 'loop' and 'routine' directives. + Seq, + /// 'independent' clause, allowed on 'loop' directives. + Independent, + /// 'auto' clause, allowed on 'loop' directives. + Auto, + /// 'worker' clause, allowed on 'loop', Combined, and 'routine' directives. + Worker, + /// 'vector' clause, allowed on 'loop', Combined, and 'routine' directives. + Vector, + /// 'nohost' clause, allowed on 'routine' directives. + NoHost, + /// 'default' clause, allowed on parallel, serial, kernel (and compound) + /// constructs. + Default, + /// 'if' clause, allowed on all the Compute Constructs, Data Constructs, + /// Executable Constructs, and Combined Constructs. + If, + /// 'self' clause, allowed on Compute and Combined Constructs, plus 'update'. + Self, + /// 'copy' clause, allowed on Compute and Combined Constructs, plus 'data' and + /// 'declare'. + Copy, + /// 'use_device' clause, allowed on 'host_data' construct. + UseDevice, + /// 'attach' clause, allowed on Compute and Combined constructs, plus 'data' + /// and 'enter data'. + Attach, + /// 'delete' clause, allowed on the 'exit data' construct. + Delete, + /// 'detach' clause, allowed on the 'exit data' construct. + Detach, + /// 'device' clause, allowed on the 'update' construct. + Device, + /// 'deviceptr' clause, allowed on Compute and Combined Constructs, plus + /// 'data' and 'declare'. + DevicePtr, + /// 'device_resident' clause, allowed on the 'declare' construct. + DeviceResident, + /// 'firstprivate' clause, allowed on 'parallel', 'serial', 'parallel loop', + /// and 'serial loop' constructs. + FirstPrivate, + /// 'host' clause, allowed on 'update' construct. + Host, + /// 'link' clause, allowed on 'declare' construct. + Link, + /// 'no_create' clause, allowed on allowed on Compute and Combined constructs, + /// plus 'data'. + NoCreate, + /// 'present' clause, allowed on Compute and Combined constructs, plus 'data' + /// and 'declare'. + Present, + /// 'private' clause, allowed on 'parallel', 'serial', 'loop', 'parallel + /// loop', and 'serial loop' constructs. + Private, + /// 'copyout' clause, allowed on Compute and Combined constructs, plus 'data', + /// 'exit data', and 'declare'. + CopyOut, + /// 'copyin' clause, allowed on Compute and Combined constructs, plus 'data', + /// 'enter data', and 'declare'. + CopyIn, + /// 'copyin' clause, allowed on Compute and Combined constructs, plus 'data', + /// 'enter data', and 'declare'. + Create, + /// 'reduction' clause, allowed on Parallel, Serial, Loop, and the combined + /// constructs. + Reduction, + /// 'collapse' clause, allowed on 'loop' and Combined constructs. + Collapse, + /// 'bind' clause, allowed on routine constructs. + Bind, + /// 'vector_length' clause, allowed on 'parallel', 'kernels', 'parallel loop', + /// and 'kernels loop' constructs. + VectorLength, + /// 'num_gangs' clause, allowed on 'parallel', 'kernels', parallel loop', and + /// 'kernels loop' constructs. + NumGangs, + /// 'num_workers' clause, allowed on 'parallel', 'kernels', parallel loop', + /// and 'kernels loop' constructs. + NumWorkers, + /// 'device_num' clause, allowed on 'init', 'shutdown', and 'set' constructs. + DeviceNum, + /// 'default_async' clause, allowed on 'set' construct. + DefaultAsync, + /// 'device_type' clause, allowed on Constructs, 'data', 'init', 'shutdown', + /// 'set', update', 'loop', 'routine', and Combined constructs. + DeviceType, + /// 'dtype' clause, an alias for 'device_type', stored separately for + /// diagnostic purposes. + DType, + + /// Represents an invalid clause, for the purposes of parsing. + Invalid, +}; + +inline const StreamingDiagnostic &operator<<(const StreamingDiagnostic &Out, + OpenACCClauseKind K) { + switch (K) { + case OpenACCClauseKind::Finalize: + return Out << "finalize"; + + case OpenACCClauseKind::IfPresent: + return Out << "if_present"; + + case OpenACCClauseKind::Seq: + return Out << "seq"; + + case OpenACCClauseKind::Independent: + return Out << "independent"; + + case OpenACCClauseKind::Auto: + return Out << "auto"; + + case OpenACCClauseKind::Worker: + return Out << "worker"; + + case OpenACCClauseKind::Vector: + return Out << "vector"; + + case OpenACCClauseKind::NoHost: + return Out << "nohost"; + + case OpenACCClauseKind::Default: + return Out << "default"; + + case OpenACCClauseKind::If: + return Out << "if"; + + case OpenACCClauseKind::Self: + return Out << "self"; + + case OpenACCClauseKind::Copy: + return Out << "copy"; + + case OpenACCClauseKind::UseDevice: + return Out << "use_device"; + + case OpenACCClauseKind::Attach: + return Out << "attach"; + + case OpenACCClauseKind::Delete: + return Out << "delete"; + + case OpenACCClauseKind::Detach: + return Out << "detach"; + + case OpenACCClauseKind::Device: + return Out << "device"; + + case OpenACCClauseKind::DevicePtr: + return Out << "deviceptr"; + + case OpenACCClauseKind::DeviceResident: + return Out << "device_resident"; + + case OpenACCClauseKind::FirstPrivate: + return Out << "firstprivate"; + + case OpenACCClauseKind::Host: + return Out << "host"; + + case OpenACCClauseKind::Link: + return Out << "link"; + + case OpenACCClauseKind::NoCreate: + return Out << "no_create"; + + case OpenACCClauseKind::Present: + return Out << "present"; + + case OpenACCClauseKind::Private: + return Out << "private"; + + case OpenACCClauseKind::CopyOut: + return Out << "copyout"; + + case OpenACCClauseKind::CopyIn: + return Out << "copyin"; + + case OpenACCClauseKind::Create: + return Out << "create"; + + case OpenACCClauseKind::Reduction: + return Out << "reduction"; + + case OpenACCClauseKind::Collapse: + return Out << "collapse"; + + case OpenACCClauseKind::Bind: + return Out << "bind"; + + case OpenACCClauseKind::VectorLength: + return Out << "vector_length"; + + case OpenACCClauseKind::NumGangs: + return Out << "num_gangs"; + + case OpenACCClauseKind::NumWorkers: + return Out << "num_workers"; + + case OpenACCClauseKind::DeviceNum: + return Out << "device_num"; + + case OpenACCClauseKind::DefaultAsync: + return Out << "default_async"; + + case OpenACCClauseKind::DeviceType: + return Out << "device_type"; + + case OpenACCClauseKind::DType: + return Out << "dtype"; + + case OpenACCClauseKind::Invalid: + return Out << "<invalid>"; + } + llvm_unreachable("Uncovered clause kind"); +} +enum class OpenACCDefaultClauseKind { + /// 'none' option. + None, + /// 'present' option. + Present, + /// Not a valid option. + Invalid, +}; + +enum class OpenACCReductionOperator { + /// '+'. + Addition, + /// '*'. + Multiplication, + /// 'max'. + Max, + /// 'min'. + Min, + /// '&'. + BitwiseAnd, + /// '|'. + BitwiseOr, + /// '^'. + BitwiseXOr, + /// '&&'. + And, + /// '||'. + Or, + /// Invalid Reduction Clause Kind. + Invalid, +}; +} // namespace clang + +#endif // LLVM_CLANG_BASIC_OPENACCKINDS_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/OpenCLExtensionTypes.def b/contrib/llvm-project/clang/include/clang/Basic/OpenCLExtensionTypes.def index 84ffbe936b77..17c72d69a020 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/OpenCLExtensionTypes.def +++ b/contrib/llvm-project/clang/include/clang/Basic/OpenCLExtensionTypes.def @@ -28,10 +28,10 @@ INTEL_SUBGROUP_AVC_TYPE(mce_result_t, MceResult) INTEL_SUBGROUP_AVC_TYPE(ime_result_t, ImeResult) INTEL_SUBGROUP_AVC_TYPE(ref_result_t, RefResult) INTEL_SUBGROUP_AVC_TYPE(sic_result_t, SicResult) -INTEL_SUBGROUP_AVC_TYPE(ime_result_single_reference_streamout_t, ImeResultSingleRefStreamout) -INTEL_SUBGROUP_AVC_TYPE(ime_result_dual_reference_streamout_t, ImeResultDualRefStreamout) -INTEL_SUBGROUP_AVC_TYPE(ime_single_reference_streamin_t, ImeSingleRefStreamin) -INTEL_SUBGROUP_AVC_TYPE(ime_dual_reference_streamin_t, ImeDualRefStreamin) +INTEL_SUBGROUP_AVC_TYPE(ime_result_single_reference_streamout_t, ImeResultSingleReferenceStreamout) +INTEL_SUBGROUP_AVC_TYPE(ime_result_dual_reference_streamout_t, ImeResultDualReferenceStreamout) +INTEL_SUBGROUP_AVC_TYPE(ime_single_reference_streamin_t, ImeSingleReferenceStreamin) +INTEL_SUBGROUP_AVC_TYPE(ime_dual_reference_streamin_t, ImeDualReferenceStreamin) #undef INTEL_SUBGROUP_AVC_TYPE #endif // INTEL_SUBGROUP_AVC_TYPE diff --git a/contrib/llvm-project/clang/include/clang/Basic/OpenCLExtensions.def b/contrib/llvm-project/clang/include/clang/Basic/OpenCLExtensions.def index a053a0e9adb5..6f73b2613750 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/OpenCLExtensions.def +++ b/contrib/llvm-project/clang/include/clang/Basic/OpenCLExtensions.def @@ -31,7 +31,7 @@ // If extensions are to be enumerated without any information, // define OPENCLEXTNAME(ext) where ext is the name of the extension. // -// Difference between optional core feature and core feature is that the +// Difference between optional core feature and core feature is that the // later is unconditionally supported in specific OpenCL version. // // As per The OpenCL Extension Specification, Section 1.2, in this file, an @@ -94,12 +94,6 @@ OPENCL_EXTENSION(__cl_clang_bitfields, true, 100) OPENCL_EXTENSION(cl_amd_media_ops, true, 100) OPENCL_EXTENSION(cl_amd_media_ops2, true, 100) -// ARM OpenCL extensions -OPENCL_EXTENSION(cl_arm_integer_dot_product_int8, true, 120) -OPENCL_EXTENSION(cl_arm_integer_dot_product_accumulate_int8, true, 120) -OPENCL_EXTENSION(cl_arm_integer_dot_product_accumulate_int16, true, 120) -OPENCL_EXTENSION(cl_arm_integer_dot_product_accumulate_saturate_int8, true, 120) - // Intel OpenCL extensions OPENCL_EXTENSION(cl_intel_subgroups, true, 120) OPENCL_EXTENSION(cl_intel_subgroups_short, true, 120) diff --git a/contrib/llvm-project/clang/include/clang/Basic/OpenCLOptions.h b/contrib/llvm-project/clang/include/clang/Basic/OpenCLOptions.h index 1a035626fade..d6cb1a210519 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/OpenCLOptions.h +++ b/contrib/llvm-project/clang/include/clang/Basic/OpenCLOptions.h @@ -58,7 +58,7 @@ static inline OpenCLVersionID encodeOpenCLVersion(unsigned OpenCLVersion) { // mask. static inline bool isOpenCLVersionContainedInMask(const LangOptions &LO, unsigned Mask) { - auto CLVer = LO.OpenCLCPlusPlus ? 200 : LO.OpenCLVersion; + auto CLVer = LO.getOpenCLCompatibleVersion(); OpenCLVersionID Code = encodeOpenCLVersion(CLVer); return Mask & Code; } @@ -79,8 +79,8 @@ public: // the __opencl_c_program_scope_global_variables feature is supported // C++ for OpenCL inherits rule from OpenCL C v2.0. bool areProgramScopeVariablesSupported(const LangOptions &Opts) const { - return Opts.OpenCLCPlusPlus || Opts.OpenCLVersion == 200 || - (Opts.OpenCLVersion == 300 && + return Opts.getOpenCLCompatibleVersion() == 200 || + (Opts.getOpenCLCompatibleVersion() == 300 && isSupported("__opencl_c_program_scope_global_variables", Opts)); } @@ -115,8 +115,7 @@ public: // Is option available in OpenCL version \p LO. bool isAvailableIn(const LangOptions &LO) const { // In C++ mode all extensions should work at least as in v2.0. - auto CLVer = LO.OpenCLCPlusPlus ? 200 : LO.OpenCLVersion; - return CLVer >= Avail; + return LO.getOpenCLCompatibleVersion() >= Avail; } // Is core option in OpenCL version \p LO. diff --git a/contrib/llvm-project/clang/include/clang/Basic/OpenMPKinds.def b/contrib/llvm-project/clang/include/clang/Basic/OpenMPKinds.def index 9f9c32da4aa0..f46a92d5ecfd 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/OpenMPKinds.def +++ b/contrib/llvm-project/clang/include/clang/Basic/OpenMPKinds.def @@ -41,6 +41,15 @@ #ifndef OPENMP_ATOMIC_DEFAULT_MEM_ORDER_KIND #define OPENMP_ATOMIC_DEFAULT_MEM_ORDER_KIND(Name) #endif +#ifndef OPENMP_ATOMIC_FAIL_MODIFIER +#define OPENMP_ATOMIC_FAIL_MODIFIER(Name) +#endif +#ifndef OPENMP_AT_KIND +#define OPENMP_AT_KIND(Name) +#endif +#ifndef OPENMP_SEVERITY_KIND +#define OPENMP_SEVERITY_KIND(Name) +#endif #ifndef OPENMP_DEFAULTMAP_MODIFIER #define OPENMP_DEFAULTMAP_MODIFIER(Name) #endif @@ -53,12 +62,30 @@ #ifndef OPENMP_ORDER_KIND #define OPENMP_ORDER_KIND(Name) #endif +#ifndef OPENMP_ORDER_MODIFIER +#define OPENMP_ORDER_MODIFIER(Name) +#endif #ifndef OPENMP_DEVICE_MODIFIER #define OPENMP_DEVICE_MODIFIER(Name) #endif #ifndef OPENMP_REDUCTION_MODIFIER #define OPENMP_REDUCTION_MODIFIER(Name) #endif +#ifndef OPENMP_ADJUST_ARGS_KIND +#define OPENMP_ADJUST_ARGS_KIND(Name) +#endif +#ifndef OPENMP_BIND_KIND +#define OPENMP_BIND_KIND(Name) +#endif +#ifndef OPENMP_GRAINSIZE_MODIFIER +#define OPENMP_GRAINSIZE_MODIFIER(Name) +#endif +#ifndef OPENMP_NUMTASKS_MODIFIER +#define OPENMP_NUMTASKS_MODIFIER(Name) +#endif +#ifndef OPENMP_DOACROSS_MODIFIER +#define OPENMP_DOACROSS_MODIFIER(Name) +#endif // Static attributes for 'schedule' clause. OPENMP_SCHEDULE_KIND(static) @@ -99,17 +126,34 @@ OPENMP_DEPEND_KIND(mutexinoutset) OPENMP_DEPEND_KIND(depobj) OPENMP_DEPEND_KIND(source) OPENMP_DEPEND_KIND(sink) +OPENMP_DEPEND_KIND(inoutset) +OPENMP_DEPEND_KIND(outallmemory) +OPENMP_DEPEND_KIND(inoutallmemory) // Modifiers for 'linear' clause. OPENMP_LINEAR_KIND(val) OPENMP_LINEAR_KIND(ref) OPENMP_LINEAR_KIND(uval) +OPENMP_LINEAR_KIND(step) // Modifiers for 'atomic_default_mem_order' clause. OPENMP_ATOMIC_DEFAULT_MEM_ORDER_KIND(seq_cst) OPENMP_ATOMIC_DEFAULT_MEM_ORDER_KIND(acq_rel) OPENMP_ATOMIC_DEFAULT_MEM_ORDER_KIND(relaxed) +// Modifiers for atomic 'fail' clause. +OPENMP_ATOMIC_FAIL_MODIFIER(seq_cst) +OPENMP_ATOMIC_FAIL_MODIFIER(acquire) +OPENMP_ATOMIC_FAIL_MODIFIER(relaxed) + +// Modifiers for 'at' clause. +OPENMP_AT_KIND(compilation) +OPENMP_AT_KIND(execution) + +// Modifiers for 'severity' clause. +OPENMP_SEVERITY_KIND(fatal) +OPENMP_SEVERITY_KIND(warning) + // Map types for 'map' clause. OPENMP_MAP_KIND(alloc) OPENMP_MAP_KIND(to) @@ -122,7 +166,10 @@ OPENMP_MAP_KIND(release) OPENMP_MAP_MODIFIER_KIND(always) OPENMP_MAP_MODIFIER_KIND(close) OPENMP_MAP_MODIFIER_KIND(mapper) +OPENMP_MAP_MODIFIER_KIND(iterator) OPENMP_MAP_MODIFIER_KIND(present) +// This is an OpenMP extension for the sake of OpenACC support. +OPENMP_MAP_MODIFIER_KIND(ompx_hold) // Modifiers for 'to' or 'from' clause. OPENMP_MOTION_MODIFIER_KIND(mapper) @@ -142,14 +189,44 @@ OPENMP_LASTPRIVATE_KIND(conditional) // Type of the 'order' clause. OPENMP_ORDER_KIND(concurrent) +// Modifiers for the 'order' clause. +OPENMP_ORDER_MODIFIER(reproducible) +OPENMP_ORDER_MODIFIER(unconstrained) + // Modifiers for 'reduction' clause. OPENMP_REDUCTION_MODIFIER(default) OPENMP_REDUCTION_MODIFIER(inscan) OPENMP_REDUCTION_MODIFIER(task) +// Adjust-op kinds for the 'adjust_args' clause. +OPENMP_ADJUST_ARGS_KIND(nothing) +OPENMP_ADJUST_ARGS_KIND(need_device_ptr) + +// Binding kinds for the 'bind' clause. +OPENMP_BIND_KIND(teams) +OPENMP_BIND_KIND(parallel) +OPENMP_BIND_KIND(thread) + +// Modifiers for the 'grainsize' clause. +OPENMP_GRAINSIZE_MODIFIER(strict) + +// Modifiers for the 'num_tasks' clause. +OPENMP_NUMTASKS_MODIFIER(strict) + +// Modifiers for the 'doacross' clause. +OPENMP_DOACROSS_MODIFIER(source) +OPENMP_DOACROSS_MODIFIER(sink) +OPENMP_DOACROSS_MODIFIER(sink_omp_cur_iteration) +OPENMP_DOACROSS_MODIFIER(source_omp_cur_iteration) + +#undef OPENMP_NUMTASKS_MODIFIER +#undef OPENMP_GRAINSIZE_MODIFIER +#undef OPENMP_BIND_KIND +#undef OPENMP_ADJUST_ARGS_KIND #undef OPENMP_REDUCTION_MODIFIER #undef OPENMP_DEVICE_MODIFIER #undef OPENMP_ORDER_KIND +#undef OPENMP_ORDER_MODIFIER #undef OPENMP_LASTPRIVATE_KIND #undef OPENMP_DEVICE_TYPE_KIND #undef OPENMP_LINEAR_KIND @@ -157,10 +234,14 @@ OPENMP_REDUCTION_MODIFIER(task) #undef OPENMP_SCHEDULE_MODIFIER #undef OPENMP_SCHEDULE_KIND #undef OPENMP_ATOMIC_DEFAULT_MEM_ORDER_KIND +#undef OPENMP_ATOMIC_FAIL_MODIFIER +#undef OPENMP_AT_KIND +#undef OPENMP_SEVERITY_KIND #undef OPENMP_MAP_KIND #undef OPENMP_MAP_MODIFIER_KIND #undef OPENMP_MOTION_MODIFIER_KIND #undef OPENMP_DIST_SCHEDULE_KIND #undef OPENMP_DEFAULTMAP_KIND #undef OPENMP_DEFAULTMAP_MODIFIER +#undef OPENMP_DOACROSS_MODIFIER diff --git a/contrib/llvm-project/clang/include/clang/Basic/OpenMPKinds.h b/contrib/llvm-project/clang/include/clang/Basic/OpenMPKinds.h index c7a2591de26c..d127498774c7 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/OpenMPKinds.h +++ b/contrib/llvm-project/clang/include/clang/Basic/OpenMPKinds.h @@ -14,6 +14,7 @@ #ifndef LLVM_CLANG_BASIC_OPENMPKINDS_H #define LLVM_CLANG_BASIC_OPENMPKINDS_H +#include "clang/Basic/LangOptions.h" #include "llvm/ADT/StringRef.h" #include "llvm/Frontend/OpenMP/OMPConstants.h" @@ -82,7 +83,7 @@ enum OpenMPMapModifierKind { OMPC_MAP_MODIFIER_last }; - /// Number of allowed map-type-modifiers. +/// Number of allowed map-type-modifiers. static constexpr unsigned NumberOfOMPMapClauseModifiers = OMPC_MAP_MODIFIER_last - OMPC_MAP_MODIFIER_unknown - 1; @@ -130,6 +131,20 @@ enum OpenMPAtomicDefaultMemOrderClauseKind { OMPC_ATOMIC_DEFAULT_MEM_ORDER_unknown }; +/// OpenMP attributes for 'at' clause. +enum OpenMPAtClauseKind { +#define OPENMP_AT_KIND(Name) OMPC_AT_##Name, +#include "clang/Basic/OpenMPKinds.def" + OMPC_AT_unknown +}; + +/// OpenMP attributes for 'severity' clause. +enum OpenMPSeverityClauseKind { +#define OPENMP_SEVERITY_KIND(Name) OMPC_SEVERITY_##Name, +#include "clang/Basic/OpenMPKinds.def" + OMPC_SEVERITY_unknown +}; + /// OpenMP device type for 'device_type' clause. enum OpenMPDeviceType { #define OPENMP_DEVICE_TYPE_KIND(Name) \ @@ -152,6 +167,14 @@ enum OpenMPOrderClauseKind { OMPC_ORDER_unknown, }; +/// OpenMP modifiers for 'order' clause. +enum OpenMPOrderClauseModifier { + OMPC_ORDER_MODIFIER_unknown = OMPC_ORDER_unknown, +#define OPENMP_ORDER_MODIFIER(Name) OMPC_ORDER_MODIFIER_##Name, +#include "clang/Basic/OpenMPKinds.def" + OMPC_ORDER_MODIFIER_last +}; + /// Scheduling data for loop-based OpenMP directives. struct OpenMPScheduleTy final { OpenMPScheduleClauseKind Schedule = OMPC_SCHEDULE_unknown; @@ -166,8 +189,51 @@ enum OpenMPReductionClauseModifier { OMPC_REDUCTION_unknown, }; +/// OpenMP adjust-op kinds for 'adjust_args' clause. +enum OpenMPAdjustArgsOpKind { +#define OPENMP_ADJUST_ARGS_KIND(Name) OMPC_ADJUST_ARGS_##Name, +#include "clang/Basic/OpenMPKinds.def" + OMPC_ADJUST_ARGS_unknown, +}; + +/// OpenMP bindings for the 'bind' clause. +enum OpenMPBindClauseKind { +#define OPENMP_BIND_KIND(Name) OMPC_BIND_##Name, +#include "clang/Basic/OpenMPKinds.def" + OMPC_BIND_unknown +}; + +enum OpenMPGrainsizeClauseModifier { +#define OPENMP_GRAINSIZE_MODIFIER(Name) OMPC_GRAINSIZE_##Name, +#include "clang/Basic/OpenMPKinds.def" + OMPC_GRAINSIZE_unknown +}; + +enum OpenMPNumTasksClauseModifier { +#define OPENMP_NUMTASKS_MODIFIER(Name) OMPC_NUMTASKS_##Name, +#include "clang/Basic/OpenMPKinds.def" + OMPC_NUMTASKS_unknown +}; + +/// OpenMP dependence types for 'doacross' clause. +enum OpenMPDoacrossClauseModifier { +#define OPENMP_DOACROSS_MODIFIER(Name) OMPC_DOACROSS_##Name, +#include "clang/Basic/OpenMPKinds.def" + OMPC_DOACROSS_unknown +}; + +/// Contains 'interop' data for 'append_args' and 'init' clauses. +class Expr; +struct OMPInteropInfo final { + OMPInteropInfo(bool IsTarget = false, bool IsTargetSync = false) + : IsTarget(IsTarget), IsTargetSync(IsTargetSync) {} + bool IsTarget; + bool IsTargetSync; + llvm::SmallVector<Expr *, 4> PreferTypes; +}; + unsigned getOpenMPSimpleClauseType(OpenMPClauseKind Kind, llvm::StringRef Str, - unsigned OpenMPVersion); + const LangOptions &LangOpts); const char *getOpenMPSimpleClauseTypeName(OpenMPClauseKind Kind, unsigned Type); /// Checks if the specified directive is a directive with an associated @@ -245,6 +311,13 @@ bool isOpenMPDistributeDirective(OpenMPDirectiveKind DKind); /// otherwise - false. bool isOpenMPNestingDistributeDirective(OpenMPDirectiveKind DKind); +/// Checks if the specified directive constitutes a 'loop' directive in the +/// outermost nest. For example, 'omp teams loop' or 'omp loop'. +/// \param DKind Specified directive. +/// \return true - the directive has loop on the outermost nest. +/// otherwise - false. +bool isOpenMPGenericLoopDirective(OpenMPDirectiveKind DKind); + /// Checks if the specified clause is one of private clauses like /// 'private', 'firstprivate', 'reduction' etc.. /// \param Kind Clause kind. @@ -276,6 +349,25 @@ bool isOpenMPLoopTransformationDirective(OpenMPDirectiveKind DKind); void getOpenMPCaptureRegions( llvm::SmallVectorImpl<OpenMPDirectiveKind> &CaptureRegions, OpenMPDirectiveKind DKind); + +/// Checks if the specified directive is a combined construct for which +/// the first construct is a parallel construct. +/// \param DKind Specified directive. +/// \return true - if the above condition is met for this directive +/// otherwise - false. +bool isOpenMPCombinedParallelADirective(OpenMPDirectiveKind DKind); + +/// Checks if the specified target directive, combined or not, needs task based +/// thread_limit +/// \param DKind Specified directive. +/// \return true - if the above condition is met for this directive +/// otherwise - false. +bool needsTaskBasedThreadLimit(OpenMPDirectiveKind DKind); + +/// Checks if the parameter to the fail clause in "#pragma atomic compare fail" +/// is restricted only to memory order clauses of "OMPC_acquire", +/// "OMPC_relaxed" and "OMPC_seq_cst". +bool checkFailClauseParameter(OpenMPClauseKind FailClauseParameter); } #endif diff --git a/contrib/llvm-project/clang/include/clang/Basic/OperatorKinds.def b/contrib/llvm-project/clang/include/clang/Basic/OperatorKinds.def index d464db29274e..fab777349ede 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/OperatorKinds.def +++ b/contrib/llvm-project/clang/include/clang/Basic/OperatorKinds.def @@ -38,8 +38,8 @@ /// "operator*") can be both unary and binary. /// /// MemberOnly: True if this operator can only be declared as a -/// non-static member function. False if the operator can be both a -/// non-member function and a non-static member function. +/// member function. False if the operator can be both a +/// non-member function and a member function. /// /// OVERLOADED_OPERATOR_MULTI is used to enumerate the multi-token /// overloaded operator names, e.g., "operator delete []". The macro diff --git a/contrib/llvm-project/clang/include/clang/Basic/OperatorPrecedence.h b/contrib/llvm-project/clang/include/clang/Basic/OperatorPrecedence.h index 61ac7ad62f6b..9bda3eb28fdf 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/OperatorPrecedence.h +++ b/contrib/llvm-project/clang/include/clang/Basic/OperatorPrecedence.h @@ -49,4 +49,4 @@ prec::Level getBinOpPrecedence(tok::TokenKind Kind, bool GreaterThanIsOperator, } // end namespace clang -#endif // LLVM_CLANG_OPERATOR_PRECEDENCE_H +#endif // LLVM_CLANG_BASIC_OPERATORPRECEDENCE_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/ParsedAttrInfo.h b/contrib/llvm-project/clang/include/clang/Basic/ParsedAttrInfo.h new file mode 100644 index 000000000000..537d8f3391d5 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/ParsedAttrInfo.h @@ -0,0 +1,168 @@ +//===- ParsedAttrInfo.h - Info needed to parse an attribute -----*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the ParsedAttrInfo class, which dictates how to +// parse an attribute. This class is the one that plugins derive to +// define a new attribute. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CLANG_BASIC_PARSEDATTRINFO_H +#define LLVM_CLANG_BASIC_PARSEDATTRINFO_H + +#include "clang/Basic/AttrSubjectMatchRules.h" +#include "clang/Basic/AttributeCommonInfo.h" +#include "llvm/ADT/ArrayRef.h" +#include "llvm/Support/Registry.h" +#include <climits> +#include <list> + +namespace clang { + +class Decl; +class LangOptions; +class ParsedAttr; +class Sema; +class Stmt; +class TargetInfo; + +struct ParsedAttrInfo { + /// Corresponds to the Kind enum. + LLVM_PREFERRED_TYPE(AttributeCommonInfo::Kind) + unsigned AttrKind : 16; + /// The number of required arguments of this attribute. + unsigned NumArgs : 4; + /// The number of optional arguments of this attributes. + unsigned OptArgs : 4; + /// The number of non-fake arguments specified in the attribute definition. + unsigned NumArgMembers : 4; + /// True if the parsing does not match the semantic content. + LLVM_PREFERRED_TYPE(bool) + unsigned HasCustomParsing : 1; + // True if this attribute accepts expression parameter pack expansions. + LLVM_PREFERRED_TYPE(bool) + unsigned AcceptsExprPack : 1; + /// True if this attribute is only available for certain targets. + LLVM_PREFERRED_TYPE(bool) + unsigned IsTargetSpecific : 1; + /// True if this attribute applies to types. + LLVM_PREFERRED_TYPE(bool) + unsigned IsType : 1; + /// True if this attribute applies to statements. + LLVM_PREFERRED_TYPE(bool) + unsigned IsStmt : 1; + /// True if this attribute has any spellings that are known to gcc. + LLVM_PREFERRED_TYPE(bool) + unsigned IsKnownToGCC : 1; + /// True if this attribute is supported by #pragma clang attribute. + LLVM_PREFERRED_TYPE(bool) + unsigned IsSupportedByPragmaAttribute : 1; + /// The syntaxes supported by this attribute and how they're spelled. + struct Spelling { + AttributeCommonInfo::Syntax Syntax; + const char *NormalizedFullName; + }; + ArrayRef<Spelling> Spellings; + // The names of the known arguments of this attribute. + ArrayRef<const char *> ArgNames; + +protected: + constexpr ParsedAttrInfo(AttributeCommonInfo::Kind AttrKind = + AttributeCommonInfo::NoSemaHandlerAttribute) + : AttrKind(AttrKind), NumArgs(0), OptArgs(0), NumArgMembers(0), + HasCustomParsing(0), AcceptsExprPack(0), IsTargetSpecific(0), IsType(0), + IsStmt(0), IsKnownToGCC(0), IsSupportedByPragmaAttribute(0) {} + + constexpr ParsedAttrInfo(AttributeCommonInfo::Kind AttrKind, unsigned NumArgs, + unsigned OptArgs, unsigned NumArgMembers, + unsigned HasCustomParsing, unsigned AcceptsExprPack, + unsigned IsTargetSpecific, unsigned IsType, + unsigned IsStmt, unsigned IsKnownToGCC, + unsigned IsSupportedByPragmaAttribute, + ArrayRef<Spelling> Spellings, + ArrayRef<const char *> ArgNames) + : AttrKind(AttrKind), NumArgs(NumArgs), OptArgs(OptArgs), + NumArgMembers(NumArgMembers), HasCustomParsing(HasCustomParsing), + AcceptsExprPack(AcceptsExprPack), IsTargetSpecific(IsTargetSpecific), + IsType(IsType), IsStmt(IsStmt), IsKnownToGCC(IsKnownToGCC), + IsSupportedByPragmaAttribute(IsSupportedByPragmaAttribute), + Spellings(Spellings), ArgNames(ArgNames) {} + +public: + virtual ~ParsedAttrInfo() = default; + + /// Check if this attribute has specified spelling. + bool hasSpelling(AttributeCommonInfo::Syntax Syntax, StringRef Name) const { + return llvm::any_of(Spellings, [&](const Spelling &S) { + return (S.Syntax == Syntax && S.NormalizedFullName == Name); + }); + } + + /// Check if this attribute appertains to D, and issue a diagnostic if not. + virtual bool diagAppertainsToDecl(Sema &S, const ParsedAttr &Attr, + const Decl *D) const { + return true; + } + /// Check if this attribute appertains to St, and issue a diagnostic if not. + virtual bool diagAppertainsToStmt(Sema &S, const ParsedAttr &Attr, + const Stmt *St) const { + return true; + } + /// Check if the given attribute is mutually exclusive with other attributes + /// already applied to the given declaration. + virtual bool diagMutualExclusion(Sema &S, const ParsedAttr &A, + const Decl *D) const { + return true; + } + /// Check if this attribute is allowed by the language we are compiling. + virtual bool acceptsLangOpts(const LangOptions &LO) const { return true; } + + /// Check if this attribute is allowed when compiling for the given target. + virtual bool existsInTarget(const TargetInfo &Target) const { return true; } + + /// Check if this attribute's spelling is allowed when compiling for the given + /// target. + virtual bool spellingExistsInTarget(const TargetInfo &Target, + const unsigned SpellingListIndex) const { + return true; + } + + /// Convert the spelling index of Attr to a semantic spelling enum value. + virtual unsigned + spellingIndexToSemanticSpelling(const ParsedAttr &Attr) const { + return UINT_MAX; + } + /// Returns true if the specified parameter index for this attribute in + /// Attr.td is an ExprArgument or VariadicExprArgument, or a subclass thereof; + /// returns false otherwise. + virtual bool isParamExpr(size_t N) const { return false; } + /// Populate Rules with the match rules of this attribute. + virtual void getPragmaAttributeMatchRules( + llvm::SmallVectorImpl<std::pair<attr::SubjectMatchRule, bool>> &Rules, + const LangOptions &LangOpts) const {} + + enum AttrHandling { NotHandled, AttributeApplied, AttributeNotApplied }; + /// If this ParsedAttrInfo knows how to handle this ParsedAttr applied to this + /// Decl then do so and return either AttributeApplied if it was applied or + /// AttributeNotApplied if it wasn't. Otherwise return NotHandled. + virtual AttrHandling handleDeclAttribute(Sema &S, Decl *D, + const ParsedAttr &Attr) const { + return NotHandled; + } + + static const ParsedAttrInfo &get(const AttributeCommonInfo &A); + static ArrayRef<const ParsedAttrInfo *> getAllBuiltin(); +}; + +typedef llvm::Registry<ParsedAttrInfo> ParsedAttrInfoRegistry; + +const std::list<std::unique_ptr<ParsedAttrInfo>> &getAttributePluginInstances(); + +} // namespace clang + +#endif // LLVM_CLANG_BASIC_PARSEDATTRINFO_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/PartialDiagnostic.h b/contrib/llvm-project/clang/include/clang/Basic/PartialDiagnostic.h index 9fb70bff7fee..507d789c54ff 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/PartialDiagnostic.h +++ b/contrib/llvm-project/clang/include/clang/Basic/PartialDiagnostic.h @@ -28,9 +28,6 @@ namespace clang { -class DeclContext; -class IdentifierInfo; - class PartialDiagnostic : public StreamingDiagnostic { private: // NOTE: Sema assumes that PartialDiagnostic is location-invariant @@ -67,8 +64,8 @@ public: // It is necessary to limit this to rvalue reference to avoid calling this // function with a bitfield lvalue argument since non-const reference to // bitfield is not allowed. - template <typename T, typename = typename std::enable_if< - !std::is_lvalue_reference<T>::value>::type> + template <typename T, + typename = std::enable_if_t<!std::is_lvalue_reference<T>::value>> const PartialDiagnostic &operator<<(T &&V) const { const StreamingDiagnostic &DB = *this; DB << std::move(V); diff --git a/contrib/llvm-project/clang/include/clang/Basic/PlistSupport.h b/contrib/llvm-project/clang/include/clang/Basic/PlistSupport.h index 557462a5b90d..d52d196019cf 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/PlistSupport.h +++ b/contrib/llvm-project/clang/include/clang/Basic/PlistSupport.h @@ -77,8 +77,7 @@ inline raw_ostream &EmitInteger(raw_ostream &o, int64_t value) { inline raw_ostream &EmitString(raw_ostream &o, StringRef s) { o << "<string>"; - for (StringRef::const_iterator I = s.begin(), E = s.end(); I != E; ++I) { - char c = *I; + for (char c : s) { switch (c) { default: o << c; diff --git a/contrib/llvm-project/clang/include/clang/Basic/PragmaKinds.h b/contrib/llvm-project/clang/include/clang/Basic/PragmaKinds.h index 82c0d5f0a551..42f049f7323d 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/PragmaKinds.h +++ b/contrib/llvm-project/clang/include/clang/Basic/PragmaKinds.h @@ -6,8 +6,8 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_CLANG_BASIC_PRAGMA_KINDS_H -#define LLVM_CLANG_BASIC_PRAGMA_KINDS_H +#ifndef LLVM_CLANG_BASIC_PRAGMAKINDS_H +#define LLVM_CLANG_BASIC_PRAGMAKINDS_H namespace clang { @@ -34,6 +34,14 @@ enum PragmaFloatControlKind { PFC_Push, // #pragma float_control(push) PFC_Pop // #pragma float_control(pop) }; + +enum PragmaFPKind { + PFK_Contract, // #pragma clang fp contract + PFK_Reassociate, // #pragma clang fp reassociate + PFK_Reciprocal, // #pragma clang fp reciprocal + PFK_Exceptions, // #pragma clang fp exceptions + PFK_EvalMethod // #pragma clang fp eval_method +}; } #endif diff --git a/contrib/llvm-project/clang/include/clang/Basic/ProfileList.h b/contrib/llvm-project/clang/include/clang/Basic/ProfileList.h index 989c36549a3d..b4217e49c18a 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/ProfileList.h +++ b/contrib/llvm-project/clang/include/clang/Basic/ProfileList.h @@ -10,45 +10,54 @@ // functions. // //===----------------------------------------------------------------------===// -#ifndef LLVM_CLANG_BASIC_INSTRPROFLIST_H -#define LLVM_CLANG_BASIC_INSTRPROFLIST_H +#ifndef LLVM_CLANG_BASIC_PROFILELIST_H +#define LLVM_CLANG_BASIC_PROFILELIST_H #include "clang/Basic/CodeGenOptions.h" #include "clang/Basic/LLVM.h" #include "clang/Basic/SourceLocation.h" #include "llvm/ADT/ArrayRef.h" -#include "llvm/ADT/Optional.h" #include "llvm/ADT/StringRef.h" #include <memory> - -namespace llvm { -class SpecialCaseList; -} +#include <optional> namespace clang { class ProfileSpecialCaseList; class ProfileList { +public: + /// Represents if an how something should be excluded from profiling. + enum ExclusionType { + /// Profiling is allowed. + Allow, + /// Profiling is skipped using the \p skipprofile attribute. + Skip, + /// Profiling is forbidden using the \p noprofile attribute. + Forbid, + }; + +private: std::unique_ptr<ProfileSpecialCaseList> SCL; const bool Empty; - const bool Default; SourceManager &SM; + std::optional<ExclusionType> inSection(StringRef Section, StringRef Prefix, + StringRef Query) const; public: ProfileList(ArrayRef<std::string> Paths, SourceManager &SM); ~ProfileList(); bool isEmpty() const { return Empty; } - bool getDefault() const { return Default; } + ExclusionType getDefault(CodeGenOptions::ProfileInstrKind Kind) const; - llvm::Optional<bool> + std::optional<ExclusionType> isFunctionExcluded(StringRef FunctionName, CodeGenOptions::ProfileInstrKind Kind) const; - llvm::Optional<bool> + std::optional<ExclusionType> isLocationExcluded(SourceLocation Loc, CodeGenOptions::ProfileInstrKind Kind) const; - llvm::Optional<bool> + std::optional<ExclusionType> isFileExcluded(StringRef FileName, CodeGenOptions::ProfileInstrKind Kind) const; }; diff --git a/contrib/llvm-project/clang/include/clang/Basic/RISCVVTypes.def b/contrib/llvm-project/clang/include/clang/Basic/RISCVVTypes.def index f6ef62a64636..6620de8ad50e 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/RISCVVTypes.def +++ b/contrib/llvm-project/clang/include/clang/Basic/RISCVVTypes.def @@ -12,7 +12,8 @@ // A builtin type that has not been covered by any other #define // Defining this macro covers all the builtins. // -// - RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, IsSigned, IsFP) +// - RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, IsSigned, IsFP, +// IsBF) // A RISC-V V scalable vector. // // - RVV_PREDICATE_TYPE(Name, Id, SingletonId, NumEls) @@ -30,8 +31,8 @@ // // - ElBits is the size of one element in bits (SEW). // -// - NF is the number of fields (NFIELDS) used in the Zvlsseg instructions -// (TODO). +// - NF is the number of fields (NFIELDS) used in the Load/Store Segment +// instructions (TODO). // // - IsSigned is true for vectors of signed integer elements and // for vectors of floating-point elements. @@ -40,8 +41,13 @@ // //===----------------------------------------------------------------------===// +#ifndef RVV_TYPE +#define RVV_TYPE(Name, Id, SingletonId) +#endif + #ifndef RVV_VECTOR_TYPE -#define RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, IsFP)\ +#define RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, \ + IsFP, IsBF) \ RVV_TYPE(Name, Id, SingletonId) #endif @@ -51,13 +57,20 @@ #endif #ifndef RVV_VECTOR_TYPE_INT -#define RVV_VECTOR_TYPE_INT(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned) \ - RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, false) +#define RVV_VECTOR_TYPE_INT(Name, Id, SingletonId, NumEls, ElBits, NF, \ + IsSigned) \ + RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, false, \ + false) #endif #ifndef RVV_VECTOR_TYPE_FLOAT -#define RVV_VECTOR_TYPE_FLOAT(Name, Id, SingletonId, NumEls, ElBits, NF) \ - RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, false, true) +#define RVV_VECTOR_TYPE_FLOAT(Name, Id, SingletonId, NumEls, ElBits, NF) \ + RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, false, true, false) +#endif + +#ifndef RVV_VECTOR_TYPE_BFLOAT +#define RVV_VECTOR_TYPE_BFLOAT(Name, Id, SingletonId, NumEls, ElBits, NF) \ + RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, false, false, true) #endif //===- Vector types -------------------------------------------------------===// @@ -121,6 +134,19 @@ RVV_VECTOR_TYPE_FLOAT("__rvv_float16m2_t", RvvFloat16m2, RvvFloat16m2Ty, 8, 16, RVV_VECTOR_TYPE_FLOAT("__rvv_float16m4_t", RvvFloat16m4, RvvFloat16m4Ty, 16, 16, 1) RVV_VECTOR_TYPE_FLOAT("__rvv_float16m8_t", RvvFloat16m8, RvvFloat16m8Ty, 32, 16, 1) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4_t", RvvBFloat16mf4, RvvBFloat16mf4Ty, + 1, 16, 1) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2_t", RvvBFloat16mf2, RvvBFloat16mf2Ty, + 2, 16, 1) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1_t", RvvBFloat16m1, RvvBFloat16m1Ty, 4, + 16, 1) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m2_t", RvvBFloat16m2, RvvBFloat16m2Ty, 8, + 16, 1) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m4_t", RvvBFloat16m4, RvvBFloat16m4Ty, 16, + 16, 1) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m8_t", RvvBFloat16m8, RvvBFloat16m8Ty, 32, + 16, 1) + RVV_VECTOR_TYPE_FLOAT("__rvv_float32mf2_t",RvvFloat32mf2,RvvFloat32mf2Ty,1, 32, 1) RVV_VECTOR_TYPE_FLOAT("__rvv_float32m1_t", RvvFloat32m1, RvvFloat32m1Ty, 2, 32, 1) RVV_VECTOR_TYPE_FLOAT("__rvv_float32m2_t", RvvFloat32m2, RvvFloat32m2Ty, 4, 32, 1) @@ -140,6 +166,349 @@ RVV_PREDICATE_TYPE("__rvv_bool16_t", RvvBool16, RvvBool16Ty, 4) RVV_PREDICATE_TYPE("__rvv_bool32_t", RvvBool32, RvvBool32Ty, 2) RVV_PREDICATE_TYPE("__rvv_bool64_t", RvvBool64, RvvBool64Ty, 1) +//===- Tuple vector types -------------------------------------------------===// +//===- Int8 tuple types --------------------------------------------------===// +RVV_VECTOR_TYPE_INT("__rvv_int8mf8x2_t", RvvInt8mf8x2, RvvInt8mf8x2Ty, 1, 8, 2, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf8x3_t", RvvInt8mf8x3, RvvInt8mf8x3Ty, 1, 8, 3, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf8x4_t", RvvInt8mf8x4, RvvInt8mf8x4Ty, 1, 8, 4, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf8x5_t", RvvInt8mf8x5, RvvInt8mf8x5Ty, 1, 8, 5, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf8x6_t", RvvInt8mf8x6, RvvInt8mf8x6Ty, 1, 8, 6, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf8x7_t", RvvInt8mf8x7, RvvInt8mf8x7Ty, 1, 8, 7, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf8x8_t", RvvInt8mf8x8, RvvInt8mf8x8Ty, 1, 8, 8, true) + +RVV_VECTOR_TYPE_INT("__rvv_int8mf4x2_t", RvvInt8mf4x2, RvvInt8mf4x2Ty, 2, 8, 2, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf4x3_t", RvvInt8mf4x3, RvvInt8mf4x3Ty, 2, 8, 3, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf4x4_t", RvvInt8mf4x4, RvvInt8mf4x4Ty, 2, 8, 4, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf4x5_t", RvvInt8mf4x5, RvvInt8mf4x5Ty, 2, 8, 5, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf4x6_t", RvvInt8mf4x6, RvvInt8mf4x6Ty, 2, 8, 6, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf4x7_t", RvvInt8mf4x7, RvvInt8mf4x7Ty, 2, 8, 7, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf4x8_t", RvvInt8mf4x8, RvvInt8mf4x8Ty, 2, 8, 8, true) + +RVV_VECTOR_TYPE_INT("__rvv_int8mf2x2_t", RvvInt8mf2x2, RvvInt8mf2x2Ty, 4, 8, 2, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf2x3_t", RvvInt8mf2x3, RvvInt8mf2x3Ty, 4, 8, 3, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf2x4_t", RvvInt8mf2x4, RvvInt8mf2x4Ty, 4, 8, 4, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf2x5_t", RvvInt8mf2x5, RvvInt8mf2x5Ty, 4, 8, 5, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf2x6_t", RvvInt8mf2x6, RvvInt8mf2x6Ty, 4, 8, 6, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf2x7_t", RvvInt8mf2x7, RvvInt8mf2x7Ty, 4, 8, 7, true) +RVV_VECTOR_TYPE_INT("__rvv_int8mf2x8_t", RvvInt8mf2x8, RvvInt8mf2x8Ty, 4, 8, 8, true) + +RVV_VECTOR_TYPE_INT("__rvv_int8m1x2_t", RvvInt8m1x2, RvvInt8m1x2Ty, 8, 8, 2, true) +RVV_VECTOR_TYPE_INT("__rvv_int8m1x3_t", RvvInt8m1x3, RvvInt8m1x3Ty, 8, 8, 3, true) +RVV_VECTOR_TYPE_INT("__rvv_int8m1x4_t", RvvInt8m1x4, RvvInt8m1x4Ty, 8, 8, 4, true) +RVV_VECTOR_TYPE_INT("__rvv_int8m1x5_t", RvvInt8m1x5, RvvInt8m1x5Ty, 8, 8, 5, true) +RVV_VECTOR_TYPE_INT("__rvv_int8m1x6_t", RvvInt8m1x6, RvvInt8m1x6Ty, 8, 8, 6, true) +RVV_VECTOR_TYPE_INT("__rvv_int8m1x7_t", RvvInt8m1x7, RvvInt8m1x7Ty, 8, 8, 7, true) +RVV_VECTOR_TYPE_INT("__rvv_int8m1x8_t", RvvInt8m1x8, RvvInt8m1x8Ty, 8, 8, 8, true) + +RVV_VECTOR_TYPE_INT("__rvv_int8m2x2_t", RvvInt8m2x2, RvvInt8m2x2Ty, 16, 8, 2, true) +RVV_VECTOR_TYPE_INT("__rvv_int8m2x3_t", RvvInt8m2x3, RvvInt8m2x3Ty, 16, 8, 3, true) +RVV_VECTOR_TYPE_INT("__rvv_int8m2x4_t", RvvInt8m2x4, RvvInt8m2x4Ty, 16, 8, 4, true) + +RVV_VECTOR_TYPE_INT("__rvv_int8m4x2_t", RvvInt8m4x2, RvvInt8m4x2Ty, 32, 8, 2, true) + +//===- Uint8 tuple types -------------------------------------------------===// +RVV_VECTOR_TYPE_INT("__rvv_uint8mf8x2_t", RvvUint8mf8x2, RvvUint8mf8x2Ty, 1, 8, 2, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf8x3_t", RvvUint8mf8x3, RvvUint8mf8x3Ty, 1, 8, 3, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf8x4_t", RvvUint8mf8x4, RvvUint8mf8x4Ty, 1, 8, 4, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf8x5_t", RvvUint8mf8x5, RvvUint8mf8x5Ty, 1, 8, 5, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf8x6_t", RvvUint8mf8x6, RvvUint8mf8x6Ty, 1, 8, 6, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf8x7_t", RvvUint8mf8x7, RvvUint8mf8x7Ty, 1, 8, 7, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf8x8_t", RvvUint8mf8x8, RvvUint8mf8x8Ty, 1, 8, 8, false) + +RVV_VECTOR_TYPE_INT("__rvv_uint8mf4x2_t", RvvUint8mf4x2, RvvUint8mf4x2Ty, 2, 8, 2, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf4x3_t", RvvUint8mf4x3, RvvUint8mf4x3Ty, 2, 8, 3, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf4x4_t", RvvUint8mf4x4, RvvUint8mf4x4Ty, 2, 8, 4, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf4x5_t", RvvUint8mf4x5, RvvUint8mf4x5Ty, 2, 8, 5, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf4x6_t", RvvUint8mf4x6, RvvUint8mf4x6Ty, 2, 8, 6, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf4x7_t", RvvUint8mf4x7, RvvUint8mf4x7Ty, 2, 8, 7, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf4x8_t", RvvUint8mf4x8, RvvUint8mf4x8Ty, 2, 8, 8, false) + +RVV_VECTOR_TYPE_INT("__rvv_uint8mf2x2_t", RvvUint8mf2x2, RvvUint8mf2x2Ty, 4, 8, 2, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf2x3_t", RvvUint8mf2x3, RvvUint8mf2x3Ty, 4, 8, 3, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf2x4_t", RvvUint8mf2x4, RvvUint8mf2x4Ty, 4, 8, 4, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf2x5_t", RvvUint8mf2x5, RvvUint8mf2x5Ty, 4, 8, 5, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf2x6_t", RvvUint8mf2x6, RvvUint8mf2x6Ty, 4, 8, 6, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf2x7_t", RvvUint8mf2x7, RvvUint8mf2x7Ty, 4, 8, 7, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8mf2x8_t", RvvUint8mf2x8, RvvUint8mf2x8Ty, 4, 8, 8, false) + +RVV_VECTOR_TYPE_INT("__rvv_uint8m1x2_t", RvvUint8m1x2, RvvUint8m1x2Ty, 8, 8, 2, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8m1x3_t", RvvUint8m1x3, RvvUint8m1x3Ty, 8, 8, 3, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8m1x4_t", RvvUint8m1x4, RvvUint8m1x4Ty, 8, 8, 4, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8m1x5_t", RvvUint8m1x5, RvvUint8m1x5Ty, 8, 8, 5, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8m1x6_t", RvvUint8m1x6, RvvUint8m1x6Ty, 8, 8, 6, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8m1x7_t", RvvUint8m1x7, RvvUint8m1x7Ty, 8, 8, 7, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8m1x8_t", RvvUint8m1x8, RvvUint8m1x8Ty, 8, 8, 8, false) + +RVV_VECTOR_TYPE_INT("__rvv_uint8m2x2_t", RvvUint8m2x2, RvvUint8m2x2Ty, 16, 8, 2, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8m2x3_t", RvvUint8m2x3, RvvUint8m2x3Ty, 16, 8, 3, false) +RVV_VECTOR_TYPE_INT("__rvv_uint8m2x4_t", RvvUint8m2x4, RvvUint8m2x4Ty, 16, 8, 4, false) + +RVV_VECTOR_TYPE_INT("__rvv_uint8m4x2_t", RvvUint8m4x2, RvvUint8m4x2Ty, 32, 8, 2, false) + +//===- Int16 tuple types --------------------------------------------------===// +RVV_VECTOR_TYPE_INT("__rvv_int16mf4x2_t", RvvInt16mf4x2, RvvInt16mf4x2Ty, 1, 16, 2, true) +RVV_VECTOR_TYPE_INT("__rvv_int16mf4x3_t", RvvInt16mf4x3, RvvInt16mf4x3Ty, 1, 16, 3, true) +RVV_VECTOR_TYPE_INT("__rvv_int16mf4x4_t", RvvInt16mf4x4, RvvInt16mf4x4Ty, 1, 16, 4, true) +RVV_VECTOR_TYPE_INT("__rvv_int16mf4x5_t", RvvInt16mf4x5, RvvInt16mf4x5Ty, 1, 16, 5, true) +RVV_VECTOR_TYPE_INT("__rvv_int16mf4x6_t", RvvInt16mf4x6, RvvInt16mf4x6Ty, 1, 16, 6, true) +RVV_VECTOR_TYPE_INT("__rvv_int16mf4x7_t", RvvInt16mf4x7, RvvInt16mf4x7Ty, 1, 16, 7, true) +RVV_VECTOR_TYPE_INT("__rvv_int16mf4x8_t", RvvInt16mf4x8, RvvInt16mf4x8Ty, 1, 16, 8, true) + +RVV_VECTOR_TYPE_INT("__rvv_int16mf2x2_t", RvvInt16mf2x2, RvvInt16mf2x2Ty, 2, 16, 2, true) +RVV_VECTOR_TYPE_INT("__rvv_int16mf2x3_t", RvvInt16mf2x3, RvvInt16mf2x3Ty, 2, 16, 3, true) +RVV_VECTOR_TYPE_INT("__rvv_int16mf2x4_t", RvvInt16mf2x4, RvvInt16mf2x4Ty, 2, 16, 4, true) +RVV_VECTOR_TYPE_INT("__rvv_int16mf2x5_t", RvvInt16mf2x5, RvvInt16mf2x5Ty, 2, 16, 5, true) +RVV_VECTOR_TYPE_INT("__rvv_int16mf2x6_t", RvvInt16mf2x6, RvvInt16mf2x6Ty, 2, 16, 6, true) +RVV_VECTOR_TYPE_INT("__rvv_int16mf2x7_t", RvvInt16mf2x7, RvvInt16mf2x7Ty, 2, 16, 7, true) +RVV_VECTOR_TYPE_INT("__rvv_int16mf2x8_t", RvvInt16mf2x8, RvvInt16mf2x8Ty, 2, 16, 8, true) + +RVV_VECTOR_TYPE_INT("__rvv_int16m1x2_t", RvvInt16m1x2, RvvInt16m1x2Ty, 4, 16, 2, true) +RVV_VECTOR_TYPE_INT("__rvv_int16m1x3_t", RvvInt16m1x3, RvvInt16m1x3Ty, 4, 16, 3, true) +RVV_VECTOR_TYPE_INT("__rvv_int16m1x4_t", RvvInt16m1x4, RvvInt16m1x4Ty, 4, 16, 4, true) +RVV_VECTOR_TYPE_INT("__rvv_int16m1x5_t", RvvInt16m1x5, RvvInt16m1x5Ty, 4, 16, 5, true) +RVV_VECTOR_TYPE_INT("__rvv_int16m1x6_t", RvvInt16m1x6, RvvInt16m1x6Ty, 4, 16, 6, true) +RVV_VECTOR_TYPE_INT("__rvv_int16m1x7_t", RvvInt16m1x7, RvvInt16m1x7Ty, 4, 16, 7, true) +RVV_VECTOR_TYPE_INT("__rvv_int16m1x8_t", RvvInt16m1x8, RvvInt16m1x8Ty, 4, 16, 8, true) + +RVV_VECTOR_TYPE_INT("__rvv_int16m2x2_t", RvvInt16m2x2, RvvInt16m2x2Ty, 8, 16, 2, true) +RVV_VECTOR_TYPE_INT("__rvv_int16m2x3_t", RvvInt16m2x3, RvvInt16m2x3Ty, 8, 16, 3, true) +RVV_VECTOR_TYPE_INT("__rvv_int16m2x4_t", RvvInt16m2x4, RvvInt16m2x4Ty, 8, 16, 4, true) + +RVV_VECTOR_TYPE_INT("__rvv_int16m4x2_t", RvvInt16m4x2, RvvInt16m4x2Ty, 16, 16, 2, true) + +//===- Uint16 tuple types -------------------------------------------------===// +RVV_VECTOR_TYPE_INT("__rvv_uint16mf4x2_t", RvvUint16mf4x2, RvvUint16mf4x2Ty, 1, 16, 2, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16mf4x3_t", RvvUint16mf4x3, RvvUint16mf4x3Ty, 1, 16, 3, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16mf4x4_t", RvvUint16mf4x4, RvvUint16mf4x4Ty, 1, 16, 4, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16mf4x5_t", RvvUint16mf4x5, RvvUint16mf4x5Ty, 1, 16, 5, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16mf4x6_t", RvvUint16mf4x6, RvvUint16mf4x6Ty, 1, 16, 6, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16mf4x7_t", RvvUint16mf4x7, RvvUint16mf4x7Ty, 1, 16, 7, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16mf4x8_t", RvvUint16mf4x8, RvvUint16mf4x8Ty, 1, 16, 8, false) + +RVV_VECTOR_TYPE_INT("__rvv_uint16mf2x2_t", RvvUint16mf2x2, RvvUint16mf2x2Ty, 2, 16, 2, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16mf2x3_t", RvvUint16mf2x3, RvvUint16mf2x3Ty, 2, 16, 3, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16mf2x4_t", RvvUint16mf2x4, RvvUint16mf2x4Ty, 2, 16, 4, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16mf2x5_t", RvvUint16mf2x5, RvvUint16mf2x5Ty, 2, 16, 5, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16mf2x6_t", RvvUint16mf2x6, RvvUint16mf2x6Ty, 2, 16, 6, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16mf2x7_t", RvvUint16mf2x7, RvvUint16mf2x7Ty, 2, 16, 7, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16mf2x8_t", RvvUint16mf2x8, RvvUint16mf2x8Ty, 2, 16, 8, false) + +RVV_VECTOR_TYPE_INT("__rvv_uint16m1x2_t", RvvUint16m1x2, RvvUint16m1x2Ty, 4, 16, 2, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16m1x3_t", RvvUint16m1x3, RvvUint16m1x3Ty, 4, 16, 3, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16m1x4_t", RvvUint16m1x4, RvvUint16m1x4Ty, 4, 16, 4, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16m1x5_t", RvvUint16m1x5, RvvUint16m1x5Ty, 4, 16, 5, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16m1x6_t", RvvUint16m1x6, RvvUint16m1x6Ty, 4, 16, 6, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16m1x7_t", RvvUint16m1x7, RvvUint16m1x7Ty, 4, 16, 7, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16m1x8_t", RvvUint16m1x8, RvvUint16m1x8Ty, 4, 16, 8, false) + +RVV_VECTOR_TYPE_INT("__rvv_uint16m2x2_t", RvvUint16m2x2, RvvUint16m2x2Ty, 8, 16, 2, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16m2x3_t", RvvUint16m2x3, RvvUint16m2x3Ty, 8, 16, 3, false) +RVV_VECTOR_TYPE_INT("__rvv_uint16m2x4_t", RvvUint16m2x4, RvvUint16m2x4Ty, 8, 16, 4, false) + +RVV_VECTOR_TYPE_INT("__rvv_uint16m4x2_t", RvvUint16m4x2, RvvUint16m4x2Ty, 16, 16, 2, false) + +//===- Int32 tuple types --------------------------------------------------===// +RVV_VECTOR_TYPE_INT("__rvv_int32mf2x2_t", RvvInt32mf2x2, RvvInt32mf2x2Ty, 1, 32, 2, true) +RVV_VECTOR_TYPE_INT("__rvv_int32mf2x3_t", RvvInt32mf2x3, RvvInt32mf2x3Ty, 1, 32, 3, true) +RVV_VECTOR_TYPE_INT("__rvv_int32mf2x4_t", RvvInt32mf2x4, RvvInt32mf2x4Ty, 1, 32, 4, true) +RVV_VECTOR_TYPE_INT("__rvv_int32mf2x5_t", RvvInt32mf2x5, RvvInt32mf2x5Ty, 1, 32, 5, true) +RVV_VECTOR_TYPE_INT("__rvv_int32mf2x6_t", RvvInt32mf2x6, RvvInt32mf2x6Ty, 1, 32, 6, true) +RVV_VECTOR_TYPE_INT("__rvv_int32mf2x7_t", RvvInt32mf2x7, RvvInt32mf2x7Ty, 1, 32, 7, true) +RVV_VECTOR_TYPE_INT("__rvv_int32mf2x8_t", RvvInt32mf2x8, RvvInt32mf2x8Ty, 1, 32, 8, true) + +RVV_VECTOR_TYPE_INT("__rvv_int32m1x2_t", RvvInt32m1x2, RvvInt32m1x2Ty, 2, 32, 2, true) +RVV_VECTOR_TYPE_INT("__rvv_int32m1x3_t", RvvInt32m1x3, RvvInt32m1x3Ty, 2, 32, 3, true) +RVV_VECTOR_TYPE_INT("__rvv_int32m1x4_t", RvvInt32m1x4, RvvInt32m1x4Ty, 2, 32, 4, true) +RVV_VECTOR_TYPE_INT("__rvv_int32m1x5_t", RvvInt32m1x5, RvvInt32m1x5Ty, 2, 32, 5, true) +RVV_VECTOR_TYPE_INT("__rvv_int32m1x6_t", RvvInt32m1x6, RvvInt32m1x6Ty, 2, 32, 6, true) +RVV_VECTOR_TYPE_INT("__rvv_int32m1x7_t", RvvInt32m1x7, RvvInt32m1x7Ty, 2, 32, 7, true) +RVV_VECTOR_TYPE_INT("__rvv_int32m1x8_t", RvvInt32m1x8, RvvInt32m1x8Ty, 2, 32, 8, true) + +RVV_VECTOR_TYPE_INT("__rvv_int32m2x2_t", RvvInt32m2x2, RvvInt32m2x2Ty, 4, 32, 2, true) +RVV_VECTOR_TYPE_INT("__rvv_int32m2x3_t", RvvInt32m2x3, RvvInt32m2x3Ty, 4, 32, 3, true) +RVV_VECTOR_TYPE_INT("__rvv_int32m2x4_t", RvvInt32m2x4, RvvInt32m2x4Ty, 4, 32, 4, true) + +RVV_VECTOR_TYPE_INT("__rvv_int32m4x2_t", RvvInt32m4x2, RvvInt32m4x2Ty, 8, 32, 2, true) + +//===- Uint32 tuple types -------------------------------------------------===// +RVV_VECTOR_TYPE_INT("__rvv_uint32mf2x2_t", RvvUint32mf2x2, RvvUint32mf2x2Ty, 1, 32, 2, false) +RVV_VECTOR_TYPE_INT("__rvv_uint32mf2x3_t", RvvUint32mf2x3, RvvUint32mf2x3Ty, 1, 32, 3, false) +RVV_VECTOR_TYPE_INT("__rvv_uint32mf2x4_t", RvvUint32mf2x4, RvvUint32mf2x4Ty, 1, 32, 4, false) +RVV_VECTOR_TYPE_INT("__rvv_uint32mf2x5_t", RvvUint32mf2x5, RvvUint32mf2x5Ty, 1, 32, 5, false) +RVV_VECTOR_TYPE_INT("__rvv_uint32mf2x6_t", RvvUint32mf2x6, RvvUint32mf2x6Ty, 1, 32, 6, false) +RVV_VECTOR_TYPE_INT("__rvv_uint32mf2x7_t", RvvUint32mf2x7, RvvUint32mf2x7Ty, 1, 32, 7, false) +RVV_VECTOR_TYPE_INT("__rvv_uint32mf2x8_t", RvvUint32mf2x8, RvvUint32mf2x8Ty, 1, 32, 8, false) + +RVV_VECTOR_TYPE_INT("__rvv_uint32m1x2_t", RvvUint32m1x2, RvvUint32m1x2Ty, 2, 32, 2, false) +RVV_VECTOR_TYPE_INT("__rvv_uint32m1x3_t", RvvUint32m1x3, RvvUint32m1x3Ty, 2, 32, 3, false) +RVV_VECTOR_TYPE_INT("__rvv_uint32m1x4_t", RvvUint32m1x4, RvvUint32m1x4Ty, 2, 32, 4, false) +RVV_VECTOR_TYPE_INT("__rvv_uint32m1x5_t", RvvUint32m1x5, RvvUint32m1x5Ty, 2, 32, 5, false) +RVV_VECTOR_TYPE_INT("__rvv_uint32m1x6_t", RvvUint32m1x6, RvvUint32m1x6Ty, 2, 32, 6, false) +RVV_VECTOR_TYPE_INT("__rvv_uint32m1x7_t", RvvUint32m1x7, RvvUint32m1x7Ty, 2, 32, 7, false) +RVV_VECTOR_TYPE_INT("__rvv_uint32m1x8_t", RvvUint32m1x8, RvvUint32m1x8Ty, 2, 32, 8, false) + +RVV_VECTOR_TYPE_INT("__rvv_uint32m2x2_t", RvvUint32m2x2, RvvUint32m2x2Ty, 4, 32, 2, false) +RVV_VECTOR_TYPE_INT("__rvv_uint32m2x3_t", RvvUint32m2x3, RvvUint32m2x3Ty, 4, 32, 3, false) +RVV_VECTOR_TYPE_INT("__rvv_uint32m2x4_t", RvvUint32m2x4, RvvUint32m2x4Ty, 4, 32, 4, false) + +RVV_VECTOR_TYPE_INT("__rvv_uint32m4x2_t", RvvUint32m4x2, RvvUint32m4x2Ty, 8, 32, 2, false) + +//===- Int64 tuple types -------------------------------------------------===// +RVV_VECTOR_TYPE_INT("__rvv_int64m1x2_t", RvvInt64m1x2, RvvInt64m1x2Ty, 1, 64, 2, true) +RVV_VECTOR_TYPE_INT("__rvv_int64m1x3_t", RvvInt64m1x3, RvvInt64m1x3Ty, 1, 64, 3, true) +RVV_VECTOR_TYPE_INT("__rvv_int64m1x4_t", RvvInt64m1x4, RvvInt64m1x4Ty, 1, 64, 4, true) +RVV_VECTOR_TYPE_INT("__rvv_int64m1x5_t", RvvInt64m1x5, RvvInt64m1x5Ty, 1, 64, 5, true) +RVV_VECTOR_TYPE_INT("__rvv_int64m1x6_t", RvvInt64m1x6, RvvInt64m1x6Ty, 1, 64, 6, true) +RVV_VECTOR_TYPE_INT("__rvv_int64m1x7_t", RvvInt64m1x7, RvvInt64m1x7Ty, 1, 64, 7, true) +RVV_VECTOR_TYPE_INT("__rvv_int64m1x8_t", RvvInt64m1x8, RvvInt64m1x8Ty, 1, 64, 8, true) + +RVV_VECTOR_TYPE_INT("__rvv_int64m2x2_t", RvvInt64m2x2, RvvInt64m2x2Ty, 2, 64, 2, true) +RVV_VECTOR_TYPE_INT("__rvv_int64m2x3_t", RvvInt64m2x3, RvvInt64m2x3Ty, 2, 64, 3, true) +RVV_VECTOR_TYPE_INT("__rvv_int64m2x4_t", RvvInt64m2x4, RvvInt64m2x4Ty, 2, 64, 4, true) + +RVV_VECTOR_TYPE_INT("__rvv_int64m4x2_t", RvvInt64m4x2, RvvInt64m4x2Ty, 4, 64, 2, true) + +//===- Uint64 tuple types -------------------------------------------------===// +RVV_VECTOR_TYPE_INT("__rvv_uint64m1x2_t", RvvUint64m1x2, RvvUint64m1x2Ty, 1, 64, 2, false) +RVV_VECTOR_TYPE_INT("__rvv_uint64m1x3_t", RvvUint64m1x3, RvvUint64m1x3Ty, 1, 64, 3, false) +RVV_VECTOR_TYPE_INT("__rvv_uint64m1x4_t", RvvUint64m1x4, RvvUint64m1x4Ty, 1, 64, 4, false) +RVV_VECTOR_TYPE_INT("__rvv_uint64m1x5_t", RvvUint64m1x5, RvvUint64m1x5Ty, 1, 64, 5, false) +RVV_VECTOR_TYPE_INT("__rvv_uint64m1x6_t", RvvUint64m1x6, RvvUint64m1x6Ty, 1, 64, 6, false) +RVV_VECTOR_TYPE_INT("__rvv_uint64m1x7_t", RvvUint64m1x7, RvvUint64m1x7Ty, 1, 64, 7, false) +RVV_VECTOR_TYPE_INT("__rvv_uint64m1x8_t", RvvUint64m1x8, RvvUint64m1x8Ty, 1, 64, 8, false) + +RVV_VECTOR_TYPE_INT("__rvv_uint64m2x2_t", RvvUint64m2x2, RvvUint64m2x2Ty, 2, 64, 2, false) +RVV_VECTOR_TYPE_INT("__rvv_uint64m2x3_t", RvvUint64m2x3, RvvUint64m2x3Ty, 2, 64, 3, false) +RVV_VECTOR_TYPE_INT("__rvv_uint64m2x4_t", RvvUint64m2x4, RvvUint64m2x4Ty, 2, 64, 4, false) + +RVV_VECTOR_TYPE_INT("__rvv_uint64m4x2_t", RvvUint64m4x2, RvvUint64m4x2Ty, 4, 64, 2, false) + +//===- Float16 tuple types --------------------------------------------------===// +RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf4x2_t", RvvFloat16mf4x2, RvvFloat16mf4x2Ty, 1, 16, 2) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf4x3_t", RvvFloat16mf4x3, RvvFloat16mf4x3Ty, 1, 16, 3) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf4x4_t", RvvFloat16mf4x4, RvvFloat16mf4x4Ty, 1, 16, 4) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf4x5_t", RvvFloat16mf4x5, RvvFloat16mf4x5Ty, 1, 16, 5) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf4x6_t", RvvFloat16mf4x6, RvvFloat16mf4x6Ty, 1, 16, 6) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf4x7_t", RvvFloat16mf4x7, RvvFloat16mf4x7Ty, 1, 16, 7) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf4x8_t", RvvFloat16mf4x8, RvvFloat16mf4x8Ty, 1, 16, 8) + +RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf2x2_t", RvvFloat16mf2x2, RvvFloat16mf2x2Ty, 2, 16, 2) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf2x3_t", RvvFloat16mf2x3, RvvFloat16mf2x3Ty, 2, 16, 3) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf2x4_t", RvvFloat16mf2x4, RvvFloat16mf2x4Ty, 2, 16, 4) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf2x5_t", RvvFloat16mf2x5, RvvFloat16mf2x5Ty, 2, 16, 5) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf2x6_t", RvvFloat16mf2x6, RvvFloat16mf2x6Ty, 2, 16, 6) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf2x7_t", RvvFloat16mf2x7, RvvFloat16mf2x7Ty, 2, 16, 7) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf2x8_t", RvvFloat16mf2x8, RvvFloat16mf2x8Ty, 2, 16, 8) + +RVV_VECTOR_TYPE_FLOAT("__rvv_float16m1x2_t", RvvFloat16m1x2, RvvFloat16m1x2Ty, 4, 16, 2) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16m1x3_t", RvvFloat16m1x3, RvvFloat16m1x3Ty, 4, 16, 3) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16m1x4_t", RvvFloat16m1x4, RvvFloat16m1x4Ty, 4, 16, 4) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16m1x5_t", RvvFloat16m1x5, RvvFloat16m1x5Ty, 4, 16, 5) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16m1x6_t", RvvFloat16m1x6, RvvFloat16m1x6Ty, 4, 16, 6) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16m1x7_t", RvvFloat16m1x7, RvvFloat16m1x7Ty, 4, 16, 7) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16m1x8_t", RvvFloat16m1x8, RvvFloat16m1x8Ty, 4, 16, 8) + +RVV_VECTOR_TYPE_FLOAT("__rvv_float16m2x2_t", RvvFloat16m2x2, RvvFloat16m2x2Ty, 8, 16, 2) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16m2x3_t", RvvFloat16m2x3, RvvFloat16m2x3Ty, 8, 16, 3) +RVV_VECTOR_TYPE_FLOAT("__rvv_float16m2x4_t", RvvFloat16m2x4, RvvFloat16m2x4Ty, 8, 16, 4) + +RVV_VECTOR_TYPE_FLOAT("__rvv_float16m4x2_t", RvvFloat16m4x2, RvvFloat16m4x2Ty, 16, 16, 2) + +//===- Float32 tuple types --------------------------------------------------===// +RVV_VECTOR_TYPE_FLOAT("__rvv_float32mf2x2_t", RvvFloat32mf2x2, RvvFloat32mf2x2Ty, 1, 32, 2) +RVV_VECTOR_TYPE_FLOAT("__rvv_float32mf2x3_t", RvvFloat32mf2x3, RvvFloat32mf2x3Ty, 1, 32, 3) +RVV_VECTOR_TYPE_FLOAT("__rvv_float32mf2x4_t", RvvFloat32mf2x4, RvvFloat32mf2x4Ty, 1, 32, 4) +RVV_VECTOR_TYPE_FLOAT("__rvv_float32mf2x5_t", RvvFloat32mf2x5, RvvFloat32mf2x5Ty, 1, 32, 5) +RVV_VECTOR_TYPE_FLOAT("__rvv_float32mf2x6_t", RvvFloat32mf2x6, RvvFloat32mf2x6Ty, 1, 32, 6) +RVV_VECTOR_TYPE_FLOAT("__rvv_float32mf2x7_t", RvvFloat32mf2x7, RvvFloat32mf2x7Ty, 1, 32, 7) +RVV_VECTOR_TYPE_FLOAT("__rvv_float32mf2x8_t", RvvFloat32mf2x8, RvvFloat32mf2x8Ty, 1, 32, 8) + +RVV_VECTOR_TYPE_FLOAT("__rvv_float32m1x2_t", RvvFloat32m1x2, RvvFloat32m1x2Ty, 2, 32, 2) +RVV_VECTOR_TYPE_FLOAT("__rvv_float32m1x3_t", RvvFloat32m1x3, RvvFloat32m1x3Ty, 2, 32, 3) +RVV_VECTOR_TYPE_FLOAT("__rvv_float32m1x4_t", RvvFloat32m1x4, RvvFloat32m1x4Ty, 2, 32, 4) +RVV_VECTOR_TYPE_FLOAT("__rvv_float32m1x5_t", RvvFloat32m1x5, RvvFloat32m1x5Ty, 2, 32, 5) +RVV_VECTOR_TYPE_FLOAT("__rvv_float32m1x6_t", RvvFloat32m1x6, RvvFloat32m1x6Ty, 2, 32, 6) +RVV_VECTOR_TYPE_FLOAT("__rvv_float32m1x7_t", RvvFloat32m1x7, RvvFloat32m1x7Ty, 2, 32, 7) +RVV_VECTOR_TYPE_FLOAT("__rvv_float32m1x8_t", RvvFloat32m1x8, RvvFloat32m1x8Ty, 2, 32, 8) + +RVV_VECTOR_TYPE_FLOAT("__rvv_float32m2x2_t", RvvFloat32m2x2, RvvFloat32m2x2Ty, 4, 32, 2) +RVV_VECTOR_TYPE_FLOAT("__rvv_float32m2x3_t", RvvFloat32m2x3, RvvFloat32m2x3Ty, 4, 32, 3) +RVV_VECTOR_TYPE_FLOAT("__rvv_float32m2x4_t", RvvFloat32m2x4, RvvFloat32m2x4Ty, 4, 32, 4) + +RVV_VECTOR_TYPE_FLOAT("__rvv_float32m4x2_t", RvvFloat32m4x2, RvvFloat32m4x2Ty, 8, 32, 2) + +//===- Float64 tuple types -------------------------------------------------===// +RVV_VECTOR_TYPE_FLOAT("__rvv_float64m1x2_t", RvvFloat64m1x2, RvvFloat64m1x2Ty, 1, 64, 2) +RVV_VECTOR_TYPE_FLOAT("__rvv_float64m1x3_t", RvvFloat64m1x3, RvvFloat64m1x3Ty, 1, 64, 3) +RVV_VECTOR_TYPE_FLOAT("__rvv_float64m1x4_t", RvvFloat64m1x4, RvvFloat64m1x4Ty, 1, 64, 4) +RVV_VECTOR_TYPE_FLOAT("__rvv_float64m1x5_t", RvvFloat64m1x5, RvvFloat64m1x5Ty, 1, 64, 5) +RVV_VECTOR_TYPE_FLOAT("__rvv_float64m1x6_t", RvvFloat64m1x6, RvvFloat64m1x6Ty, 1, 64, 6) +RVV_VECTOR_TYPE_FLOAT("__rvv_float64m1x7_t", RvvFloat64m1x7, RvvFloat64m1x7Ty, 1, 64, 7) +RVV_VECTOR_TYPE_FLOAT("__rvv_float64m1x8_t", RvvFloat64m1x8, RvvFloat64m1x8Ty, 1, 64, 8) + +RVV_VECTOR_TYPE_FLOAT("__rvv_float64m2x2_t", RvvFloat64m2x2, RvvFloat64m2x2Ty, 2, 64, 2) +RVV_VECTOR_TYPE_FLOAT("__rvv_float64m2x3_t", RvvFloat64m2x3, RvvFloat64m2x3Ty, 2, 64, 3) +RVV_VECTOR_TYPE_FLOAT("__rvv_float64m2x4_t", RvvFloat64m2x4, RvvFloat64m2x4Ty, 2, 64, 4) + +RVV_VECTOR_TYPE_FLOAT("__rvv_float64m4x2_t", RvvFloat64m4x2, RvvFloat64m4x2Ty, 4, 64, 2) + +//===- BFloat16 tuple types -------------------------------------------------===// +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4x2_t", RvvBFloat16mf4x2, RvvBFloat16mf4x2Ty, + 1, 16, 2) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4x3_t", RvvBFloat16mf4x3, RvvBFloat16mf4x3Ty, + 1, 16, 3) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4x4_t", RvvBFloat16mf4x4, RvvBFloat16mf4x4Ty, + 1, 16, 4) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4x5_t", RvvBFloat16mf4x5, RvvBFloat16mf4x5Ty, + 1, 16, 5) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4x6_t", RvvBFloat16mf4x6, RvvBFloat16mf4x6Ty, + 1, 16, 6) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4x7_t", RvvBFloat16mf4x7, RvvBFloat16mf4x7Ty, + 1, 16, 7) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4x8_t", RvvBFloat16mf4x8, RvvBFloat16mf4x8Ty, + 1, 16, 8) + +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2x2_t", RvvBFloat16mf2x2, RvvBFloat16mf2x2Ty, + 2, 16, 2) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2x3_t", RvvBFloat16mf2x3, RvvBFloat16mf2x3Ty, + 2, 16, 3) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2x4_t", RvvBFloat16mf2x4, RvvBFloat16mf2x4Ty, + 2, 16, 4) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2x5_t", RvvBFloat16mf2x5, RvvBFloat16mf2x5Ty, + 2, 16, 5) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2x6_t", RvvBFloat16mf2x6, RvvBFloat16mf2x6Ty, + 2, 16, 6) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2x7_t", RvvBFloat16mf2x7, RvvBFloat16mf2x7Ty, + 2, 16, 7) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2x8_t", RvvBFloat16mf2x8, RvvBFloat16mf2x8Ty, + 2, 16, 8) + +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1x2_t", RvvBFloat16m1x2, RvvBFloat16m1x2Ty, + 4, 16, 2) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1x3_t", RvvBFloat16m1x3, RvvBFloat16m1x3Ty, + 4, 16, 3) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1x4_t", RvvBFloat16m1x4, RvvBFloat16m1x4Ty, + 4, 16, 4) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1x5_t", RvvBFloat16m1x5, RvvBFloat16m1x5Ty, + 4, 16, 5) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1x6_t", RvvBFloat16m1x6, RvvBFloat16m1x6Ty, + 4, 16, 6) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1x7_t", RvvBFloat16m1x7, RvvBFloat16m1x7Ty, + 4, 16, 7) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1x8_t", RvvBFloat16m1x8, RvvBFloat16m1x8Ty, + 4, 16, 8) + +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m2x2_t", RvvBFloat16m2x2, RvvBFloat16m2x2Ty, + 8, 16, 2) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m2x3_t", RvvBFloat16m2x3, RvvBFloat16m2x3Ty, + 8, 16, 3) +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m2x4_t", RvvBFloat16m2x4, RvvBFloat16m2x4Ty, + 8, 16, 4) + +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m4x2_t", RvvBFloat16m4x2, RvvBFloat16m4x2Ty, + 16, 16, 2) + +#undef RVV_VECTOR_TYPE_BFLOAT #undef RVV_VECTOR_TYPE_FLOAT #undef RVV_VECTOR_TYPE_INT #undef RVV_VECTOR_TYPE diff --git a/contrib/llvm-project/clang/include/clang/Basic/Sanitizers.def b/contrib/llvm-project/clang/include/clang/Basic/Sanitizers.def index 9b8936cc520c..c2137e3f61f6 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Sanitizers.def +++ b/contrib/llvm-project/clang/include/clang/Basic/Sanitizers.def @@ -56,7 +56,10 @@ SANITIZER("hwaddress", HWAddress) SANITIZER("kernel-hwaddress", KernelHWAddress) // A variant of AddressSanitizer using AArch64 MTE extension. -SANITIZER("memtag", MemTag) +SANITIZER("memtag-stack", MemtagStack) +SANITIZER("memtag-heap", MemtagHeap) +SANITIZER("memtag-globals", MemtagGlobals) +SANITIZER_GROUP("memtag", MemTag, MemtagStack | MemtagHeap | MemtagGlobals) // MemorySanitizer SANITIZER("memory", Memory) @@ -124,6 +127,9 @@ SANITIZER_GROUP("cfi", CFI, CFIDerivedCast | CFIICall | CFIMFCall | CFIUnrelatedCast | CFINVCall | CFIVCall) +// Kernel Control Flow Integrity +SANITIZER("kcfi", KCFI) + // Safe Stack SANITIZER("safe-stack", SafeStack) diff --git a/contrib/llvm-project/clang/include/clang/Basic/Sanitizers.h b/contrib/llvm-project/clang/include/clang/Basic/Sanitizers.h index b12a3b7821d7..c890242269b3 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Sanitizers.h +++ b/contrib/llvm-project/clang/include/clang/Basic/Sanitizers.h @@ -16,13 +16,18 @@ #include "clang/Basic/LLVM.h" #include "llvm/ADT/StringRef.h" +#include "llvm/Support/HashBuilder.h" #include "llvm/Transforms/Instrumentation/AddressSanitizerOptions.h" #include <cassert> #include <cstdint> namespace llvm { class hash_code; +class Triple; +namespace opt { +class ArgList; } +} // namespace llvm namespace clang { @@ -72,6 +77,12 @@ public: llvm::hash_code hash_value() const; + template <typename HasherT, llvm::endianness Endianness> + friend void addHash(llvm::HashBuilder<HasherT, Endianness> &HBuilder, + const SanitizerMask &SM) { + HBuilder.addRange(&SM.maskLoToHigh[0], &SM.maskLoToHigh[kNumElem]); + } + constexpr explicit operator bool() const { return maskLoToHigh[0] || maskLoToHigh[1]; } @@ -159,6 +170,8 @@ struct SanitizerSet { Mask = Value ? (Mask | K) : (Mask & ~K); } + void set(SanitizerMask K) { Mask = K; } + /// Disable the sanitizers specified in \p K. void clear(SanitizerMask K = SanitizerKind::All) { Mask &= ~K; } diff --git a/contrib/llvm-project/clang/include/clang/Basic/Sarif.h b/contrib/llvm-project/clang/include/clang/Basic/Sarif.h new file mode 100644 index 000000000000..e6c46224b316 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/Sarif.h @@ -0,0 +1,513 @@ +//== clang/Basic/Sarif.h - SARIF Diagnostics Object Model -------*- C++ -*--==// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +/// \file +/// Defines clang::SarifDocumentWriter, clang::SarifRule, clang::SarifResult. +/// +/// The document built can be accessed as a JSON Object. +/// Several value semantic types are also introduced which represent properties +/// of the SARIF standard, such as 'artifact', 'result', 'rule'. +/// +/// A SARIF (Static Analysis Results Interchange Format) document is JSON +/// document that describes in detail the results of running static analysis +/// tools on a project. Each (non-trivial) document consists of at least one +/// "run", which are themselves composed of details such as: +/// * Tool: The tool that was run +/// * Rules: The rules applied during the tool run, represented by +/// \c reportingDescriptor objects in SARIF +/// * Results: The matches for the rules applied against the project(s) being +/// evaluated, represented by \c result objects in SARIF +/// +/// Reference: +/// 1. <a href="https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/sarif-v2.1.0-os.html">The SARIF standard</a> +/// 2. <a href="https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/sarif-v2.1.0-os.html#_Toc34317836">SARIF<pre>reportingDescriptor</pre></a> +/// 3. <a href="https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/sarif-v2.1.0-os.html#_Toc34317638">SARIF<pre>result</pre></a> +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CLANG_BASIC_SARIF_H +#define LLVM_CLANG_BASIC_SARIF_H + +#include "clang/Basic/SourceLocation.h" +#include "clang/Basic/Version.h" +#include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringMap.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/JSON.h" +#include <cassert> +#include <cstddef> +#include <cstdint> +#include <initializer_list> +#include <optional> +#include <string> + +namespace clang { + +class SarifDocumentWriter; +class SourceManager; + +namespace detail { + +/// \internal +/// An artifact location is SARIF's way of describing the complete location +/// of an artifact encountered during analysis. The \c artifactLocation object +/// typically consists of a URI, and/or an index to reference the artifact it +/// locates. +/// +/// This builder makes an additional assumption: that every artifact encountered +/// by \c clang will be a physical, top-level artifact. Which is why the static +/// creation method \ref SarifArtifactLocation::create takes a mandatory URI +/// parameter. The official standard states that either a \c URI or \c Index +/// must be available in the object, \c clang picks the \c URI as a reasonable +/// default, because it intends to deal in physical artifacts for now. +/// +/// Reference: +/// 1. <a href="https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/sarif-v2.1.0-os.html#_Toc34317427">artifactLocation object</a> +/// 2. \ref SarifArtifact +class SarifArtifactLocation { +private: + friend class clang::SarifDocumentWriter; + + std::optional<uint32_t> Index; + std::string URI; + + SarifArtifactLocation() = delete; + explicit SarifArtifactLocation(const std::string &URI) : URI(URI) {} + +public: + static SarifArtifactLocation create(llvm::StringRef URI) { + return SarifArtifactLocation{URI.str()}; + } + + SarifArtifactLocation setIndex(uint32_t Idx) { + Index = Idx; + return *this; + } +}; + +/// \internal +/// An artifact in SARIF is any object (a sequence of bytes) addressable by +/// a URI (RFC 3986). The most common type of artifact for clang's use-case +/// would be source files. SARIF's artifact object is described in detail in +/// section 3.24. +// +/// Since every clang artifact MUST have a location (there being no nested +/// artifacts), the creation method \ref SarifArtifact::create requires a +/// \ref SarifArtifactLocation object. +/// +/// Reference: +/// 1. <a href="https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/sarif-v2.1.0-os.html#_Toc34317611">artifact object</a> +class SarifArtifact { +private: + friend class clang::SarifDocumentWriter; + + std::optional<uint32_t> Offset; + std::optional<size_t> Length; + std::string MimeType; + SarifArtifactLocation Location; + llvm::SmallVector<std::string, 4> Roles; + + SarifArtifact() = delete; + + explicit SarifArtifact(const SarifArtifactLocation &Loc) : Location(Loc) {} + +public: + static SarifArtifact create(const SarifArtifactLocation &Loc) { + return SarifArtifact{Loc}; + } + + SarifArtifact setOffset(uint32_t ArtifactOffset) { + Offset = ArtifactOffset; + return *this; + } + + SarifArtifact setLength(size_t NumBytes) { + Length = NumBytes; + return *this; + } + + SarifArtifact setRoles(std::initializer_list<llvm::StringRef> ArtifactRoles) { + Roles.assign(ArtifactRoles.begin(), ArtifactRoles.end()); + return *this; + } + + SarifArtifact setMimeType(llvm::StringRef ArtifactMimeType) { + MimeType = ArtifactMimeType.str(); + return *this; + } +}; + +} // namespace detail + +enum class ThreadFlowImportance { Important, Essential, Unimportant }; + +/// The level of severity associated with a \ref SarifResult. +/// +/// Of all the levels, \c None is the only one that is not associated with +/// a failure. +/// +/// A typical mapping for clang's DiagnosticKind to SarifResultLevel would look +/// like: +/// * \c None: \ref clang::DiagnosticsEngine::Level::Remark, \ref clang::DiagnosticsEngine::Level::Ignored +/// * \c Note: \ref clang::DiagnosticsEngine::Level::Note +/// * \c Warning: \ref clang::DiagnosticsEngine::Level::Warning +/// * \c Error could be generated from one of: +/// - \ref clang::DiagnosticsEngine::Level::Warning with \c -Werror +/// - \ref clang::DiagnosticsEngine::Level::Error +/// - \ref clang::DiagnosticsEngine::Level::Fatal when \ref clang::DiagnosticsEngine::ErrorsAsFatal is set. +/// +/// Reference: +/// 1. <a href="https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/sarif-v2.1.0-os.html#_Toc34317648">level property</a> +enum class SarifResultLevel { None, Note, Warning, Error }; + +/// A thread flow is a sequence of code locations that specify a possible path +/// through a single thread of execution. +/// A thread flow in SARIF is related to a code flow which describes +/// the progress of one or more programs through one or more thread flows. +/// +/// Reference: +/// 1. <a href="https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/sarif-v2.1.0-os.html#_Toc34317744">threadFlow object</a> +/// 2. <a href="https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/sarif-v2.1.0-os.html#_Toc34317740">codeFlow object</a> +class ThreadFlow { + friend class SarifDocumentWriter; + + CharSourceRange Range; + ThreadFlowImportance Importance; + std::string Message; + + ThreadFlow() = default; + +public: + static ThreadFlow create() { return {}; } + + ThreadFlow setRange(const CharSourceRange &ItemRange) { + assert(ItemRange.isCharRange() && + "ThreadFlows require a character granular source range!"); + Range = ItemRange; + return *this; + } + + ThreadFlow setImportance(const ThreadFlowImportance &ItemImportance) { + Importance = ItemImportance; + return *this; + } + + ThreadFlow setMessage(llvm::StringRef ItemMessage) { + Message = ItemMessage.str(); + return *this; + } +}; + +/// A SARIF Reporting Configuration (\c reportingConfiguration) object contains +/// properties for a \ref SarifRule that can be configured at runtime before +/// analysis begins. +/// +/// Reference: +/// 1. <a href="https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/sarif-v2.1.0-os.html#_Toc34317852">reportingConfiguration object</a> +class SarifReportingConfiguration { + friend class clang::SarifDocumentWriter; + + bool Enabled = true; + SarifResultLevel Level = SarifResultLevel::Warning; + float Rank = -1.0f; + + SarifReportingConfiguration() = default; + +public: + static SarifReportingConfiguration create() { return {}; }; + + SarifReportingConfiguration disable() { + Enabled = false; + return *this; + } + + SarifReportingConfiguration enable() { + Enabled = true; + return *this; + } + + SarifReportingConfiguration setLevel(SarifResultLevel TheLevel) { + Level = TheLevel; + return *this; + } + + SarifReportingConfiguration setRank(float TheRank) { + assert(TheRank >= 0.0f && "Rule rank cannot be smaller than 0.0"); + assert(TheRank <= 100.0f && "Rule rank cannot be larger than 100.0"); + Rank = TheRank; + return *this; + } +}; + +/// A SARIF rule (\c reportingDescriptor object) contains information that +/// describes a reporting item generated by a tool. A reporting item is +/// either a result of analysis or notification of a condition encountered by +/// the tool. Rules are arbitrary but are identifiable by a hierarchical +/// rule-id. +/// +/// This builder provides an interface to create SARIF \c reportingDescriptor +/// objects via the \ref SarifRule::create static method. +/// +/// Reference: +/// 1. <a href="https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/sarif-v2.1.0-os.html#_Toc34317836">reportingDescriptor object</a> +class SarifRule { + friend class clang::SarifDocumentWriter; + + std::string Name; + std::string Id; + std::string Description; + std::string HelpURI; + SarifReportingConfiguration DefaultConfiguration; + + SarifRule() : DefaultConfiguration(SarifReportingConfiguration::create()) {} + +public: + static SarifRule create() { return {}; } + + SarifRule setName(llvm::StringRef RuleName) { + Name = RuleName.str(); + return *this; + } + + SarifRule setRuleId(llvm::StringRef RuleId) { + Id = RuleId.str(); + return *this; + } + + SarifRule setDescription(llvm::StringRef RuleDesc) { + Description = RuleDesc.str(); + return *this; + } + + SarifRule setHelpURI(llvm::StringRef RuleHelpURI) { + HelpURI = RuleHelpURI.str(); + return *this; + } + + SarifRule + setDefaultConfiguration(const SarifReportingConfiguration &Configuration) { + DefaultConfiguration = Configuration; + return *this; + } +}; + +/// A SARIF result (also called a "reporting item") is a unit of output +/// produced when one of the tool's \c reportingDescriptor encounters a match +/// on the file being analysed by the tool. +/// +/// This builder provides a \ref SarifResult::create static method that can be +/// used to create an empty shell onto which attributes can be added using the +/// \c setX(...) methods. +/// +/// For example: +/// \code{.cpp} +/// SarifResult result = SarifResult::create(...) +/// .setRuleId(...) +/// .setDiagnosticMessage(...); +/// \endcode +/// +/// Reference: +/// 1. <a href="https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/sarif-v2.1.0-os.html#_Toc34317638">SARIF<pre>result</pre></a> +class SarifResult { + friend class clang::SarifDocumentWriter; + + // NOTE: + // This type cannot fit all possible indexes representable by JSON, but is + // chosen because it is the largest unsigned type that can be safely + // converted to an \c int64_t. + uint32_t RuleIdx; + std::string RuleId; + std::string DiagnosticMessage; + llvm::SmallVector<CharSourceRange, 8> Locations; + llvm::SmallVector<ThreadFlow, 8> ThreadFlows; + std::optional<SarifResultLevel> LevelOverride; + + SarifResult() = delete; + explicit SarifResult(uint32_t RuleIdx) : RuleIdx(RuleIdx) {} + +public: + static SarifResult create(uint32_t RuleIdx) { return SarifResult{RuleIdx}; } + + SarifResult setIndex(uint32_t Idx) { + RuleIdx = Idx; + return *this; + } + + SarifResult setRuleId(llvm::StringRef Id) { + RuleId = Id.str(); + return *this; + } + + SarifResult setDiagnosticMessage(llvm::StringRef Message) { + DiagnosticMessage = Message.str(); + return *this; + } + + SarifResult setLocations(llvm::ArrayRef<CharSourceRange> DiagLocs) { +#ifndef NDEBUG + for (const auto &Loc : DiagLocs) { + assert(Loc.isCharRange() && + "SARIF Results require character granular source ranges!"); + } +#endif + Locations.assign(DiagLocs.begin(), DiagLocs.end()); + return *this; + } + SarifResult setThreadFlows(llvm::ArrayRef<ThreadFlow> ThreadFlowResults) { + ThreadFlows.assign(ThreadFlowResults.begin(), ThreadFlowResults.end()); + return *this; + } + + SarifResult setDiagnosticLevel(const SarifResultLevel &TheLevel) { + LevelOverride = TheLevel; + return *this; + } +}; + +/// This class handles creating a valid SARIF document given various input +/// attributes. However, it requires an ordering among certain method calls: +/// +/// 1. Because every SARIF document must contain at least 1 \c run, callers +/// must ensure that \ref SarifDocumentWriter::createRun is called before +/// any other methods. +/// 2. If SarifDocumentWriter::endRun is called, callers MUST call +/// SarifDocumentWriter::createRun, before invoking any of the result +/// aggregation methods such as SarifDocumentWriter::appendResult etc. +class SarifDocumentWriter { +private: + const llvm::StringRef SchemaURI{ + "https://docs.oasis-open.org/sarif/sarif/v2.1.0/cos02/schemas/" + "sarif-schema-2.1.0.json"}; + const llvm::StringRef SchemaVersion{"2.1.0"}; + + /// \internal + /// Return a pointer to the current tool. Asserts that a run exists. + llvm::json::Object &getCurrentTool(); + + /// \internal + /// Checks if there is a run associated with this document. + /// + /// \return true on success + bool hasRun() const; + + /// \internal + /// Reset portions of the internal state so that the document is ready to + /// receive data for a new run. + void reset(); + + /// \internal + /// Return a mutable reference to the current run, after asserting it exists. + /// + /// \note It is undefined behavior to call this if a run does not exist in + /// the SARIF document. + llvm::json::Object &getCurrentRun(); + + /// Create a code flow object for the given threadflows. + /// See \ref ThreadFlow. + /// + /// \note It is undefined behavior to call this if a run does not exist in + /// the SARIF document. + llvm::json::Object + createCodeFlow(const llvm::ArrayRef<ThreadFlow> ThreadFlows); + + /// Add the given threadflows to the ones this SARIF document knows about. + llvm::json::Array + createThreadFlows(const llvm::ArrayRef<ThreadFlow> ThreadFlows); + + /// Add the given \ref CharSourceRange to the SARIF document as a physical + /// location, with its corresponding artifact. + llvm::json::Object createPhysicalLocation(const CharSourceRange &R); + +public: + SarifDocumentWriter() = delete; + + /// Create a new empty SARIF document with the given source manager. + SarifDocumentWriter(const SourceManager &SourceMgr) : SourceMgr(SourceMgr) {} + + /// Release resources held by this SARIF document. + ~SarifDocumentWriter() = default; + + /// Create a new run with which any upcoming analysis will be associated. + /// Each run requires specifying the tool that is generating reporting items. + void createRun(const llvm::StringRef ShortToolName, + const llvm::StringRef LongToolName, + const llvm::StringRef ToolVersion = CLANG_VERSION_STRING); + + /// If there is a current run, end it. + /// + /// This method collects various book-keeping required to clear and close + /// resources associated with the current run, but may also allocate some + /// for the next run. + /// + /// Calling \ref endRun before associating a run through \ref createRun leads + /// to undefined behaviour. + void endRun(); + + /// Associate the given rule with the current run. + /// + /// Returns an integer rule index for the created rule that is unique within + /// the current run, which can then be used to create a \ref SarifResult + /// to add to the current run. Note that a rule must exist before being + /// referenced by a result. + /// + /// \pre + /// There must be a run associated with the document, failing to do so will + /// cause undefined behaviour. + size_t createRule(const SarifRule &Rule); + + /// Append a new result to the currently in-flight run. + /// + /// \pre + /// There must be a run associated with the document, failing to do so will + /// cause undefined behaviour. + /// \pre + /// \c RuleIdx used to create the result must correspond to a rule known by + /// the SARIF document. It must be the value returned by a previous call + /// to \ref createRule. + void appendResult(const SarifResult &SarifResult); + + /// Return the SARIF document in its current state. + /// Calling this will trigger a copy of the internal state including all + /// reported diagnostics, resulting in an expensive call. + llvm::json::Object createDocument(); + +private: + /// Source Manager to use for the current SARIF document. + const SourceManager &SourceMgr; + + /// Flag to track the state of this document: + /// A closed document is one on which a new runs must be created. + /// This could be a document that is freshly created, or has recently + /// finished writing to a previous run. + bool Closed = true; + + /// A sequence of SARIF runs. + /// Each run object describes a single run of an analysis tool and contains + /// the output of that run. + /// + /// Reference: <a href="https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/sarif-v2.1.0-os.html#_Toc34317484">run object</a> + llvm::json::Array Runs; + + /// The list of rules associated with the most recent active run. These are + /// defined using the diagnostics passed to the SarifDocument. Each rule + /// need not be unique through the result set. E.g. there may be several + /// 'syntax' errors throughout code under analysis, each of which has its + /// own specific diagnostic message (and consequently, RuleId). Rules are + /// also known as "reportingDescriptor" objects in SARIF. + /// + /// Reference: <a href="https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/sarif-v2.1.0-os.html#_Toc34317556">rules property</a> + llvm::SmallVector<SarifRule, 32> CurrentRules; + + /// The list of artifacts that have been encountered on the most recent active + /// run. An artifact is defined in SARIF as a sequence of bytes addressable + /// by a URI. A common example for clang's case would be files named by + /// filesystem paths. + llvm::StringMap<detail::SarifArtifact> CurrentArtifacts; +}; +} // namespace clang + +#endif // LLVM_CLANG_BASIC_SARIF_H diff --git a/contrib/llvm-project/clang/include/clang/Basic/SourceLocation.h b/contrib/llvm-project/clang/include/clang/Basic/SourceLocation.h index 540de23b9f55..00b1e0fa855b 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/SourceLocation.h +++ b/contrib/llvm-project/clang/include/clang/Basic/SourceLocation.h @@ -14,6 +14,7 @@ #ifndef LLVM_CLANG_BASIC_SOURCELOCATION_H #define LLVM_CLANG_BASIC_SOURCELOCATION_H +#include "clang/Basic/FileEntry.h" #include "clang/Basic/LLVM.h" #include "llvm/ADT/StringRef.h" #include <cassert> @@ -23,10 +24,8 @@ namespace llvm { -template <typename T> struct DenseMapInfo; - class FoldingSetNodeID; -template <typename T> struct FoldingSetTrait; +template <typename T, typename Enable> struct FoldingSetTrait; } // namespace llvm @@ -60,6 +59,7 @@ private: friend class ASTWriter; friend class ASTReader; friend class SourceManager; + friend class SourceManagerTestHelper; static FileID get(int V) { FileID F; @@ -89,7 +89,7 @@ class SourceLocation { friend class ASTReader; friend class ASTWriter; friend class SourceManager; - friend struct llvm::FoldingSetTrait<SourceLocation>; + friend struct llvm::FoldingSetTrait<SourceLocation, void>; public: using UIntTy = uint32_t; @@ -358,11 +358,13 @@ public: } }; -class FileEntry; - /// A SourceLocation and its associated SourceManager. /// /// This is useful for argument passing to functions that expect both objects. +/// +/// This class does not guarantee the presence of either the SourceManager or +/// a valid SourceLocation. Clients should use `isValid()` and `hasManager()` +/// before calling the member functions. class FullSourceLoc : public SourceLocation { const SourceManager *SrcMgr = nullptr; @@ -373,13 +375,10 @@ public: explicit FullSourceLoc(SourceLocation Loc, const SourceManager &SM) : SourceLocation(Loc), SrcMgr(&SM) {} - bool hasManager() const { - bool hasSrcMgr = SrcMgr != nullptr; - assert(hasSrcMgr == isValid() && "FullSourceLoc has location but no manager"); - return hasSrcMgr; - } + /// Checks whether the SourceManager is present. + bool hasManager() const { return SrcMgr != nullptr; } - /// \pre This FullSourceLoc has an associated SourceManager. + /// \pre hasManager() const SourceManager &getManager() const { assert(SrcMgr && "SourceManager is NULL."); return *SrcMgr; @@ -399,6 +398,12 @@ public: unsigned getExpansionLineNumber(bool *Invalid = nullptr) const; unsigned getExpansionColumnNumber(bool *Invalid = nullptr) const; + /// Decompose the underlying \c SourceLocation into a raw (FileID + Offset) + /// pair, after walking through all expansion records. + /// + /// \see SourceManager::getDecomposedExpansionLoc + std::pair<FileID, unsigned> getDecomposedExpansionLoc() const; + unsigned getSpellingLineNumber(bool *Invalid = nullptr) const; unsigned getSpellingColumnNumber(bool *Invalid = nullptr) const; @@ -408,6 +413,7 @@ public: unsigned getColumnNumber(bool *Invalid = nullptr) const; const FileEntry *getFileEntry() const; + OptionalFileEntryRef getFileEntryRef() const; /// Return a StringRef to the source buffer data for the /// specified FileID. @@ -466,7 +472,7 @@ namespace llvm { /// Define DenseMapInfo so that FileID's can be used as keys in DenseMap and /// DenseSets. template <> - struct DenseMapInfo<clang::FileID> { + struct DenseMapInfo<clang::FileID, void> { static clang::FileID getEmptyKey() { return {}; } @@ -487,7 +493,7 @@ namespace llvm { /// Define DenseMapInfo so that SourceLocation's can be used as keys in /// DenseMap and DenseSet. This trait class is eqivalent to /// DenseMapInfo<unsigned> which uses SourceLocation::ID is used as a key. - template <> struct DenseMapInfo<clang::SourceLocation> { + template <> struct DenseMapInfo<clang::SourceLocation, void> { static clang::SourceLocation getEmptyKey() { constexpr clang::SourceLocation::UIntTy Zero = 0; return clang::SourceLocation::getFromRawEncoding(~Zero); @@ -508,7 +514,7 @@ namespace llvm { }; // Allow calling FoldingSetNodeID::Add with SourceLocation object as parameter - template <> struct FoldingSetTrait<clang::SourceLocation> { + template <> struct FoldingSetTrait<clang::SourceLocation, void> { static void Profile(const clang::SourceLocation &X, FoldingSetNodeID &ID); }; diff --git a/contrib/llvm-project/clang/include/clang/Basic/SourceManager.h b/contrib/llvm-project/clang/include/clang/Basic/SourceManager.h index cc29c24f5a35..d2ece14da0b1 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/SourceManager.h +++ b/contrib/llvm-project/clang/include/clang/Basic/SourceManager.h @@ -36,12 +36,14 @@ #include "clang/Basic/Diagnostic.h" #include "clang/Basic/FileEntry.h" +#include "clang/Basic/FileManager.h" #include "clang/Basic/SourceLocation.h" #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/BitVector.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/DenseSet.h" #include "llvm/ADT/IntrusiveRefCntPtr.h" +#include "llvm/ADT/PagedVector.h" #include "llvm/ADT/PointerIntPair.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringRef.h" @@ -52,6 +54,7 @@ #include <cstddef> #include <map> #include <memory> +#include <optional> #include <string> #include <utility> #include <vector> @@ -138,14 +141,15 @@ public: /// It is possible for this to be NULL if the ContentCache encapsulates /// an imaginary text buffer. /// - /// FIXME: Turn this into a FileEntryRef and remove Filename. - const FileEntry *OrigEntry; + /// FIXME: Make non-optional using a virtual file as needed, remove \c + /// Filename and use \c OrigEntry.getNameAsRequested() instead. + OptionalFileEntryRef OrigEntry; /// References the file which the contents were actually loaded from. /// /// Can be different from 'Entry' if we overridden the contents of one file /// with the contents of another file. - const FileEntry *ContentsEntry; + OptionalFileEntryRef ContentsEntry; /// The filename that is used to access OrigEntry. /// @@ -163,22 +167,31 @@ public: /// /// When true, the original entry may be a virtual file that does not /// exist. + LLVM_PREFERRED_TYPE(bool) unsigned BufferOverridden : 1; /// True if this content cache was initially created for a source file /// considered to be volatile (likely to change between stat and open). + LLVM_PREFERRED_TYPE(bool) unsigned IsFileVolatile : 1; /// True if this file may be transient, that is, if it might not /// exist at some later point in time when this content entry is used, /// after serialization and deserialization. + LLVM_PREFERRED_TYPE(bool) unsigned IsTransient : 1; + LLVM_PREFERRED_TYPE(bool) mutable unsigned IsBufferInvalid : 1; - ContentCache(const FileEntry *Ent = nullptr) : ContentCache(Ent, Ent) {} + ContentCache() + : OrigEntry(std::nullopt), ContentsEntry(std::nullopt), + BufferOverridden(false), IsFileVolatile(false), IsTransient(false), + IsBufferInvalid(false) {} - ContentCache(const FileEntry *Ent, const FileEntry *contentEnt) + ContentCache(FileEntryRef Ent) : ContentCache(Ent, Ent) {} + + ContentCache(FileEntryRef Ent, FileEntryRef contentEnt) : OrigEntry(Ent), ContentsEntry(contentEnt), BufferOverridden(false), IsFileVolatile(false), IsTransient(false), IsBufferInvalid(false) {} @@ -204,7 +217,7 @@ public: /// /// \param Loc If specified, is the location that invalid file diagnostics /// will be emitted at. - llvm::Optional<llvm::MemoryBufferRef> + std::optional<llvm::MemoryBufferRef> getBufferOrNone(DiagnosticsEngine &Diag, FileManager &FM, SourceLocation Loc = SourceLocation()) const; @@ -227,18 +240,18 @@ public: llvm::MemoryBuffer::BufferKind getMemoryBufferKind() const; /// Return the buffer, only if it has been loaded. - llvm::Optional<llvm::MemoryBufferRef> getBufferIfLoaded() const { + std::optional<llvm::MemoryBufferRef> getBufferIfLoaded() const { if (Buffer) return Buffer->getMemBufferRef(); - return None; + return std::nullopt; } /// Return a StringRef to the source buffer data, only if it has already /// been loaded. - llvm::Optional<StringRef> getBufferDataIfLoaded() const { + std::optional<StringRef> getBufferDataIfLoaded() const { if (Buffer) return Buffer->getBuffer(); - return None; + return std::nullopt; } /// Set the buffer. @@ -250,7 +263,7 @@ public: /// Set the buffer to one that's not owned (or to nullptr). /// /// \pre Buffer cannot already be set. - void setUnownedBuffer(llvm::Optional<llvm::MemoryBufferRef> B) { + void setUnownedBuffer(std::optional<llvm::MemoryBufferRef> B) { assert(!Buffer && "Expected to be called right after construction"); if (B) setBuffer(llvm::MemoryBuffer::getMemBuffer(*B)); @@ -296,6 +309,7 @@ class FileInfo { unsigned NumCreatedFIDs : 31; /// Whether this FileInfo has any \#line directives. + LLVM_PREFERRED_TYPE(bool) unsigned HasLineDirectives : 1; /// The content cache and the characteristic of the file. @@ -467,6 +481,7 @@ static_assert(sizeof(FileInfo) <= sizeof(ExpansionInfo), class SLocEntry { static constexpr int OffsetBits = 8 * sizeof(SourceLocation::UIntTy) - 1; SourceLocation::UIntTy Offset : OffsetBits; + LLVM_PREFERRED_TYPE(bool) SourceLocation::UIntTy IsExpansion : 1; union { FileInfo File; @@ -491,6 +506,14 @@ public: return Expansion; } + /// Creates an incomplete SLocEntry that is only able to report its offset. + static SLocEntry getOffsetOnly(SourceLocation::UIntTy Offset) { + assert(!(Offset & (1ULL << OffsetBits)) && "Offset is too large"); + SLocEntry E; + E.Offset = Offset; + return E; + } + static SLocEntry get(SourceLocation::UIntTy Offset, const FileInfo &FI) { assert(!(Offset & (1ULL << OffsetBits)) && "Offset is too large"); SLocEntry E; @@ -525,6 +548,12 @@ public: /// entry from being loaded. virtual bool ReadSLocEntry(int ID) = 0; + /// Get the index ID for the loaded SourceLocation offset. + /// + /// \returns Invalid index ID (0) if an error occurred that prevented the + /// SLocEntry from being loaded. + virtual int getSLocEntryID(SourceLocation::UIntTy SLocOffset) = 0; + /// Retrieve the module import location and name for the given ID, if /// in fact it was loaded from a module (rather than, say, a precompiled /// header). @@ -541,10 +570,10 @@ class InBeforeInTUCacheEntry { /// If these match up with a subsequent query, the result can be reused. FileID LQueryFID, RQueryFID; - /// True if LQueryFID was created before RQueryFID. + /// The relative order of FileIDs that the CommonFID *immediately* includes. /// /// This is used to compare macro expansion locations. - bool IsLQFIDBeforeRQFID; + bool LChildBeforeRChild; /// The file found in common between the two \#include traces, i.e., /// the nearest common ancestor of the \#include tree. @@ -558,12 +587,17 @@ class InBeforeInTUCacheEntry { unsigned LCommonOffset, RCommonOffset; public: + InBeforeInTUCacheEntry() = default; + InBeforeInTUCacheEntry(FileID L, FileID R) : LQueryFID(L), RQueryFID(R) { + assert(L != R); + } + /// Return true if the currently cached values match up with /// the specified LHS/RHS query. /// /// If not, we can't use the cache. - bool isCacheValid(FileID LHS, FileID RHS) const { - return LQueryFID == LHS && RQueryFID == RHS; + bool isCacheValid() const { + return CommonFID.isValid(); } /// If the cache is valid, compute the result given the @@ -580,29 +614,28 @@ public: // one of the locations points at the inclusion/expansion point of the other // in which case its FileID will come before the other. if (LOffset == ROffset) - return IsLQFIDBeforeRQFID; + return LChildBeforeRChild; return LOffset < ROffset; } /// Set up a new query. - void setQueryFIDs(FileID LHS, FileID RHS, bool isLFIDBeforeRFID) { + /// If it matches the old query, we can keep the cached answer. + void setQueryFIDs(FileID LHS, FileID RHS) { assert(LHS != RHS); - LQueryFID = LHS; - RQueryFID = RHS; - IsLQFIDBeforeRQFID = isLFIDBeforeRFID; - } - - void clear() { - LQueryFID = RQueryFID = FileID(); - IsLQFIDBeforeRQFID = false; + if (LQueryFID != LHS || RQueryFID != RHS) { + LQueryFID = LHS; + RQueryFID = RHS; + CommonFID = FileID(); + } } void setCommonLoc(FileID commonFID, unsigned lCommonOffset, - unsigned rCommonOffset) { + unsigned rCommonOffset, bool LParentBeforeRParent) { CommonFID = commonFID; LCommonOffset = lCommonOffset; RCommonOffset = rCommonOffset; + LChildBeforeRChild = LParentBeforeRParent; } }; @@ -637,7 +670,7 @@ class SourceManager : public RefCountedBase<SourceManager> { /// This map allows us to merge ContentCache entries based /// on their FileEntry*. All ContentCache objects will thus have unique, /// non-null, FileEntry pointers. - llvm::DenseMap<const FileEntry*, SrcMgr::ContentCache*> FileInfos; + llvm::DenseMap<FileEntryRef, SrcMgr::ContentCache*> FileInfos; /// True if the ContentCache for files that are overridden by other /// files, should report the original file name. Defaults to true. @@ -655,7 +688,7 @@ class SourceManager : public RefCountedBase<SourceManager> { struct OverriddenFilesInfoTy { /// Files that have been overridden with the contents from another /// file. - llvm::DenseMap<const FileEntry *, const FileEntry *> OverriddenFiles; + llvm::DenseMap<const FileEntry *, FileEntryRef> OverriddenFiles; /// Files that were overridden with a memory buffer. llvm::DenseSet<const FileEntry *> OverriddenFilesWithBuffer; @@ -687,7 +720,12 @@ class SourceManager : public RefCountedBase<SourceManager> { /// /// Negative FileIDs are indexes into this table. To get from ID to an index, /// use (-ID - 2). - SmallVector<SrcMgr::SLocEntry, 0> LoadedSLocEntryTable; + llvm::PagedVector<SrcMgr::SLocEntry> LoadedSLocEntryTable; + + /// For each allocation in LoadedSLocEntryTable, we keep the first FileID. + /// We assume exactly one allocation per AST file, and use that to determine + /// whether two FileIDs come from the same AST file. + SmallVector<FileID, 0> LoadedSLocEntryAllocBegin; /// The starting offset of the next local SLocEntry. /// @@ -700,7 +738,7 @@ class SourceManager : public RefCountedBase<SourceManager> { /// not have been loaded, so that value would be unknown. SourceLocation::UIntTy CurrentLoadedOffset; - /// The highest possible offset is 2^32-1 (2^63-1 for 64-bit source + /// The highest possible offset is 2^31-1 (2^63-1 for 64-bit source /// locations), so CurrentLoadedOffset starts at 2^31 (2^63 resp.). static const SourceLocation::UIntTy MaxLoadedOffset = 1ULL << (8 * sizeof(SourceLocation::UIntTy) - 1); @@ -711,6 +749,12 @@ class SourceManager : public RefCountedBase<SourceManager> { /// Same indexing as LoadedSLocEntryTable. llvm::BitVector SLocEntryLoaded; + /// A bitmap that indicates whether the entries of LoadedSLocEntryTable + /// have already had their offset loaded from the external source. + /// + /// Superset of SLocEntryLoaded. Same indexing as SLocEntryLoaded. + llvm::BitVector SLocEntryOffsetLoaded; + /// An external source for source location entries. ExternalSLocEntrySource *ExternalSLocEntries = nullptr; @@ -864,13 +908,6 @@ public: /// Create a new FileID that represents the specified file /// being \#included from the specified IncludePosition. - /// - /// This translates NULL into standard input. - FileID createFileID(const FileEntry *SourceFile, SourceLocation IncludePos, - SrcMgr::CharacteristicKind FileCharacter, - int LoadedID = 0, - SourceLocation::UIntTy LoadedOffset = 0); - FileID createFileID(FileEntryRef SourceFile, SourceLocation IncludePos, SrcMgr::CharacteristicKind FileCharacter, int LoadedID = 0, @@ -896,25 +933,29 @@ public: /// Get the FileID for \p SourceFile if it exists. Otherwise, create a /// new FileID for the \p SourceFile. - FileID getOrCreateFileID(const FileEntry *SourceFile, + FileID getOrCreateFileID(FileEntryRef SourceFile, SrcMgr::CharacteristicKind FileCharacter); - /// Return a new SourceLocation that encodes the - /// fact that a token from SpellingLoc should actually be referenced from - /// ExpansionLoc, and that it represents the expansion of a macro argument - /// into the function-like macro body. - SourceLocation createMacroArgExpansionLoc(SourceLocation Loc, + /// Creates an expansion SLocEntry for the substitution of an argument into a + /// function-like macro's body. Returns the start of the expansion. + /// + /// The macro argument was written at \p SpellingLoc with length \p Length. + /// \p ExpansionLoc is the parameter name in the (expanded) macro body. + SourceLocation createMacroArgExpansionLoc(SourceLocation SpellingLoc, SourceLocation ExpansionLoc, - unsigned TokLength); + unsigned Length); - /// Return a new SourceLocation that encodes the fact - /// that a token from SpellingLoc should actually be referenced from - /// ExpansionLoc. - SourceLocation - createExpansionLoc(SourceLocation Loc, SourceLocation ExpansionLocStart, - SourceLocation ExpansionLocEnd, unsigned TokLength, - bool ExpansionIsTokenRange = true, int LoadedID = 0, - SourceLocation::UIntTy LoadedOffset = 0); + /// Creates an expansion SLocEntry for a macro use. Returns its start. + /// + /// The macro body begins at \p SpellingLoc with length \p Length. + /// The macro use spans [ExpansionLocStart, ExpansionLocEnd]. + SourceLocation createExpansionLoc(SourceLocation SpellingLoc, + SourceLocation ExpansionLocStart, + SourceLocation ExpansionLocEnd, + unsigned Length, + bool ExpansionIsTokenRange = true, + int LoadedID = 0, + SourceLocation::UIntTy LoadedOffset = 0); /// Return a new SourceLocation that encodes that the token starting /// at \p TokenStart ends prematurely at \p TokenEnd. @@ -924,14 +965,14 @@ public: /// Retrieve the memory buffer associated with the given file. /// - /// Returns None if the buffer is not valid. - llvm::Optional<llvm::MemoryBufferRef> - getMemoryBufferForFileOrNone(const FileEntry *File); + /// Returns std::nullopt if the buffer is not valid. + std::optional<llvm::MemoryBufferRef> + getMemoryBufferForFileOrNone(FileEntryRef File); /// Retrieve the memory buffer associated with the given file. /// /// Returns a fake buffer if there isn't a real one. - llvm::MemoryBufferRef getMemoryBufferForFileOrFake(const FileEntry *File) { + llvm::MemoryBufferRef getMemoryBufferForFileOrFake(FileEntryRef File) { if (auto B = getMemoryBufferForFileOrNone(File)) return *B; return getFakeBufferForRecovery(); @@ -944,7 +985,7 @@ public: /// /// \param Buffer the memory buffer whose contents will be used as the /// data in the given source file. - void overrideFileContents(const FileEntry *SourceFile, + void overrideFileContents(FileEntryRef SourceFile, const llvm::MemoryBufferRef &Buffer) { overrideFileContents(SourceFile, llvm::MemoryBuffer::getMemBuffer(Buffer)); } @@ -956,12 +997,8 @@ public: /// /// \param Buffer the memory buffer whose contents will be used as the /// data in the given source file. - void overrideFileContents(const FileEntry *SourceFile, - std::unique_ptr<llvm::MemoryBuffer> Buffer); void overrideFileContents(FileEntryRef SourceFile, - std::unique_ptr<llvm::MemoryBuffer> Buffer) { - overrideFileContents(&SourceFile.getFileEntry(), std::move(Buffer)); - } + std::unique_ptr<llvm::MemoryBuffer> Buffer); /// Override the given source file with another one. /// @@ -969,30 +1006,28 @@ public: /// /// \param NewFile the file whose contents will be used as the /// data instead of the contents of the given source file. - void overrideFileContents(const FileEntry *SourceFile, - const FileEntry *NewFile); + void overrideFileContents(const FileEntry *SourceFile, FileEntryRef NewFile); /// Returns true if the file contents have been overridden. bool isFileOverridden(const FileEntry *File) const { if (OverriddenFilesInfo) { if (OverriddenFilesInfo->OverriddenFilesWithBuffer.count(File)) return true; - if (OverriddenFilesInfo->OverriddenFiles.find(File) != - OverriddenFilesInfo->OverriddenFiles.end()) + if (OverriddenFilesInfo->OverriddenFiles.contains(File)) return true; } return false; } /// Bypass the overridden contents of a file. This creates a new FileEntry - /// and initializes the content cache for it. Returns None if there is no - /// such file in the filesystem. + /// and initializes the content cache for it. Returns std::nullopt if there + /// is no such file in the filesystem. /// /// This should be called before parsing has begun. - Optional<FileEntryRef> bypassFileContentsOverride(FileEntryRef File); + OptionalFileEntryRef bypassFileContentsOverride(FileEntryRef File); /// Specify that a file is transient. - void setFileIsTransient(const FileEntry *SourceFile); + void setFileIsTransient(FileEntryRef SourceFile); /// Specify that all files that are read during this compilation are /// transient. @@ -1006,13 +1041,14 @@ public: /// Return the buffer for the specified FileID. /// - /// If there is an error opening this buffer the first time, return None. - llvm::Optional<llvm::MemoryBufferRef> + /// If there is an error opening this buffer the first time, return + /// std::nullopt. + std::optional<llvm::MemoryBufferRef> getBufferOrNone(FileID FID, SourceLocation Loc = SourceLocation()) const { if (auto *Entry = getSLocEntryForFile(FID)) return Entry->getFile().getContentCache().getBufferOrNone( Diag, getFileManager(), Loc); - return None; + return std::nullopt; } /// Return the buffer for the specified FileID. @@ -1028,28 +1064,30 @@ public: /// Returns the FileEntry record for the provided FileID. const FileEntry *getFileEntryForID(FileID FID) const { - if (auto *Entry = getSLocEntryForFile(FID)) - return Entry->getFile().getContentCache().OrigEntry; + if (auto FE = getFileEntryRefForID(FID)) + return *FE; return nullptr; } /// Returns the FileEntryRef for the provided FileID. - Optional<FileEntryRef> getFileEntryRefForID(FileID FID) const { - if (auto *Entry = getFileEntryForID(FID)) - return Entry->getLastRef(); - return None; + OptionalFileEntryRef getFileEntryRefForID(FileID FID) const { + if (auto *Entry = getSLocEntryForFile(FID)) + return Entry->getFile().getContentCache().OrigEntry; + return std::nullopt; } /// Returns the filename for the provided FileID, unless it's a built-in /// buffer that's not represented by a filename. /// - /// Returns None for non-files and built-in files. - Optional<StringRef> getNonBuiltinFilenameForID(FileID FID) const; + /// Returns std::nullopt for non-files and built-in files. + std::optional<StringRef> getNonBuiltinFilenameForID(FileID FID) const; /// Returns the FileEntry record for the provided SLocEntry. - const FileEntry *getFileEntryForSLocEntry(const SrcMgr::SLocEntry &sloc) const - { - return sloc.getFile().getContentCache().OrigEntry; + const FileEntry * + getFileEntryForSLocEntry(const SrcMgr::SLocEntry &SLocEntry) const { + if (auto FE = SLocEntry.getFile().getContentCache().OrigEntry) + return *FE; + return nullptr; } /// Return a StringRef to the source buffer data for the @@ -1060,16 +1098,16 @@ public: StringRef getBufferData(FileID FID, bool *Invalid = nullptr) const; /// Return a StringRef to the source buffer data for the - /// specified FileID, returning None if invalid. + /// specified FileID, returning std::nullopt if invalid. /// /// \param FID The file ID whose contents will be returned. - llvm::Optional<StringRef> getBufferDataOrNone(FileID FID) const; + std::optional<StringRef> getBufferDataOrNone(FileID FID) const; /// Return a StringRef to the source buffer data for the - /// specified FileID, returning None if it's not yet loaded. + /// specified FileID, returning std::nullopt if it's not yet loaded. /// /// \param FID The file ID whose contents will be returned. - llvm::Optional<StringRef> getBufferDataIfLoaded(FileID FID) const; + std::optional<StringRef> getBufferDataIfLoaded(FileID FID) const; /// Get the number of FileIDs (files and macros) that were created /// during preprocessing of \p FID, including it. @@ -1101,13 +1139,7 @@ public: /// the entry in SLocEntryTable which contains the specified location. /// FileID getFileID(SourceLocation SpellingLoc) const { - SourceLocation::UIntTy SLocOffset = SpellingLoc.getOffset(); - - // If our one-entry cache covers this offset, just return it. - if (isOffsetInFileID(LastFileIDLookup, SLocOffset)) - return LastFileIDLookup; - - return getFileIDSlow(SLocOffset); + return getFileID(SpellingLoc.getOffset()); } /// Return the filename of the file containing a SourceLocation. @@ -1468,24 +1500,35 @@ public: /// Returns whether \p Loc is located in a <built-in> file. bool isWrittenInBuiltinFile(SourceLocation Loc) const { - StringRef Filename(getPresumedLoc(Loc).getFilename()); + PresumedLoc Presumed = getPresumedLoc(Loc); + if (Presumed.isInvalid()) + return false; + StringRef Filename(Presumed.getFilename()); return Filename.equals("<built-in>"); } /// Returns whether \p Loc is located in a <command line> file. bool isWrittenInCommandLineFile(SourceLocation Loc) const { - StringRef Filename(getPresumedLoc(Loc).getFilename()); + PresumedLoc Presumed = getPresumedLoc(Loc); + if (Presumed.isInvalid()) + return false; + StringRef Filename(Presumed.getFilename()); return Filename.equals("<command line>"); } /// Returns whether \p Loc is located in a <scratch space> file. bool isWrittenInScratchSpace(SourceLocation Loc) const { - StringRef Filename(getPresumedLoc(Loc).getFilename()); + PresumedLoc Presumed = getPresumedLoc(Loc); + if (Presumed.isInvalid()) + return false; + StringRef Filename(Presumed.getFilename()); return Filename.equals("<scratch space>"); } /// Returns if a SourceLocation is in a system header. bool isInSystemHeader(SourceLocation Loc) const { + if (Loc.isInvalid()) + return false; return isSystem(getFileCharacteristic(Loc)); } @@ -1629,6 +1672,11 @@ public: isInTheSameTranslationUnit(std::pair<FileID, unsigned> &LOffs, std::pair<FileID, unsigned> &ROffs) const; + /// Determines whether the two decomposed source location is in the same TU. + bool isInTheSameTranslationUnitImpl( + const std::pair<FileID, unsigned> &LOffs, + const std::pair<FileID, unsigned> &ROffs) const; + /// Determines the order of 2 source locations in the "source location /// address space". bool isBeforeInSLocAddrSpace(SourceLocation LHS, SourceLocation RHS) const { @@ -1660,12 +1708,12 @@ public: // Iterators over FileInfos. using fileinfo_iterator = - llvm::DenseMap<const FileEntry*, SrcMgr::ContentCache*>::const_iterator; + llvm::DenseMap<FileEntryRef, SrcMgr::ContentCache *>::const_iterator; fileinfo_iterator fileinfo_begin() const { return FileInfos.begin(); } fileinfo_iterator fileinfo_end() const { return FileInfos.end(); } bool hasFileInfo(const FileEntry *File) const { - return FileInfos.find(File) != FileInfos.end(); + return FileInfos.find_as(File) != FileInfos.end(); } /// Print statistics to stderr. @@ -1673,6 +1721,10 @@ public: void dump() const; + // Produce notes describing the current source location address space usage. + void noteSLocAddressSpaceUsage(DiagnosticsEngine &Diag, + std::optional<unsigned> MaxNotes = 32) const; + /// Get the number of local SLocEntries we have. unsigned local_sloc_entry_size() const { return LocalSLocEntryTable.size(); } @@ -1723,12 +1775,12 @@ public: /// Returns true if \p Loc came from a PCH/Module. bool isLoadedSourceLocation(SourceLocation Loc) const { - return Loc.getOffset() >= CurrentLoadedOffset; + return isLoadedOffset(Loc.getOffset()); } /// Returns true if \p Loc did not come from a PCH/Module. bool isLocalSourceLocation(SourceLocation Loc) const { - return Loc.getOffset() < NextLocalOffset; + return isLocalOffset(Loc.getOffset()); } /// Returns true if \p FID came from a PCH/Module. @@ -1798,11 +1850,27 @@ private: return getLoadedSLocEntry(static_cast<unsigned>(-ID - 2), Invalid); } + FileID getFileID(SourceLocation::UIntTy SLocOffset) const { + // If our one-entry cache covers this offset, just return it. + if (isOffsetInFileID(LastFileIDLookup, SLocOffset)) + return LastFileIDLookup; + + return getFileIDSlow(SLocOffset); + } + + bool isLocalOffset(SourceLocation::UIntTy SLocOffset) const { + return SLocOffset < CurrentLoadedOffset; + } + + bool isLoadedOffset(SourceLocation::UIntTy SLocOffset) const { + return SLocOffset >= CurrentLoadedOffset; + } + /// Implements the common elements of storing an expansion info struct into /// the SLocEntry table and producing a source location that refers to it. SourceLocation createExpansionLocImpl(const SrcMgr::ExpansionInfo &Expansion, - unsigned TokLength, int LoadedID = 0, + unsigned Length, int LoadedID = 0, SourceLocation::UIntTy LoadedOffset = 0); /// Return true if the specified FileID contains the @@ -1902,11 +1970,11 @@ public: } }; -/// SourceManager and necessary depdencies (e.g. VFS, FileManager) for a single -/// in-memorty file. +/// SourceManager and necessary dependencies (e.g. VFS, FileManager) for a +/// single in-memorty file. class SourceManagerForFile { public: - /// Creates SourceManager and necessary depdencies (e.g. VFS, FileManager). + /// Creates SourceManager and necessary dependencies (e.g. VFS, FileManager). /// The main file in the SourceManager will be \p FileName with \p Content. SourceManagerForFile(StringRef FileName, StringRef Content); diff --git a/contrib/llvm-project/clang/include/clang/Basic/SourceMgrAdapter.h b/contrib/llvm-project/clang/include/clang/Basic/SourceMgrAdapter.h new file mode 100644 index 000000000000..be7f9d5051fb --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/SourceMgrAdapter.h @@ -0,0 +1,85 @@ +//=== SourceMgrAdapter.h - SourceMgr to SourceManager Adapter ---*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file provides an adapter that maps diagnostics from llvm::SourceMgr +// to Clang's SourceManager. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CLANG_SOURCEMGRADAPTER_H +#define LLVM_CLANG_SOURCEMGRADAPTER_H + +#include "clang/Basic/SourceManager.h" +#include "llvm/ADT/DenseMap.h" +#include "llvm/Support/SourceMgr.h" +#include <string> +#include <utility> + +namespace clang { + +class DiagnosticsEngine; +class FileEntry; + +/// An adapter that can be used to translate diagnostics from one or more +/// llvm::SourceMgr instances to a , +class SourceMgrAdapter { + /// Clang source manager. + SourceManager &SrcMgr; + + /// Clang diagnostics engine. + DiagnosticsEngine &Diagnostics; + + /// Diagnostic IDs for errors, warnings, and notes. + unsigned ErrorDiagID, WarningDiagID, NoteDiagID; + + /// The default file to use when mapping buffers. + OptionalFileEntryRef DefaultFile; + + /// A mapping from (LLVM source manager, buffer ID) pairs to the + /// corresponding file ID within the Clang source manager. + llvm::DenseMap<std::pair<const llvm::SourceMgr *, unsigned>, FileID> + FileIDMapping; + + /// Diagnostic handler. + static void handleDiag(const llvm::SMDiagnostic &Diag, void *Context); + +public: + /// Create a new \c SourceMgr adaptor that maps to the given source + /// manager and diagnostics engine. + SourceMgrAdapter(SourceManager &SM, DiagnosticsEngine &Diagnostics, + unsigned ErrorDiagID, unsigned WarningDiagID, + unsigned NoteDiagID, + OptionalFileEntryRef DefaultFile = std::nullopt); + + ~SourceMgrAdapter(); + + /// Map a source location in the given LLVM source manager to its + /// corresponding location in the Clang source manager. + SourceLocation mapLocation(const llvm::SourceMgr &LLVMSrcMgr, + llvm::SMLoc Loc); + + /// Map a source range in the given LLVM source manager to its corresponding + /// range in the Clang source manager. + SourceRange mapRange(const llvm::SourceMgr &LLVMSrcMgr, llvm::SMRange Range); + + /// Handle the given diagnostic from an LLVM source manager. + void handleDiag(const llvm::SMDiagnostic &Diag); + + /// Retrieve the diagnostic handler to use with the underlying SourceMgr. + llvm::SourceMgr::DiagHandlerTy getDiagHandler() { + return &SourceMgrAdapter::handleDiag; + } + + /// Retrieve the context to use with the diagnostic handler produced by + /// \c getDiagHandler(). + void *getDiagContext() { return this; } +}; + +} // end namespace clang + +#endif diff --git a/contrib/llvm-project/clang/include/clang/Basic/Specifiers.h b/contrib/llvm-project/clang/include/clang/Basic/Specifiers.h index 1c38b411e083..87f29c8ae10b 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Specifiers.h +++ b/contrib/llvm-project/clang/include/clang/Basic/Specifiers.h @@ -19,6 +19,9 @@ #include "llvm/Support/DataTypes.h" #include "llvm/Support/ErrorHandling.h" +namespace llvm { +class raw_ostream; +} // namespace llvm namespace clang { /// Define the meaning of possible values of the kind in ExplicitSpecifier. @@ -31,6 +34,15 @@ namespace clang { /// Define the kind of constexpr specifier. enum class ConstexprSpecKind { Unspecified, Constexpr, Consteval, Constinit }; + /// In an if statement, this denotes whether the statement is + /// a constexpr or consteval if statement. + enum class IfStatementKind : unsigned { + Ordinary, + Constexpr, + ConstevalNonNegated, + ConstevalNegated + }; + /// Specifies the width of a type, e.g., short, long, or long long. enum class TypeSpecifierWidth { Unspecified, Short, Long, LongLong }; @@ -44,40 +56,44 @@ namespace clang { TST_unspecified, TST_void, TST_char, - TST_wchar, // C++ wchar_t - TST_char8, // C++20 char8_t (proposed) - TST_char16, // C++11 char16_t - TST_char32, // C++11 char32_t + TST_wchar, // C++ wchar_t + TST_char8, // C++20 char8_t (proposed) + TST_char16, // C++11 char16_t + TST_char32, // C++11 char32_t TST_int, TST_int128, - TST_extint, // Extended Int types. - TST_half, // OpenCL half, ARM NEON __fp16 - TST_Float16, // C11 extension ISO/IEC TS 18661-3 - TST_Accum, // ISO/IEC JTC1 SC22 WG14 N1169 Extension + TST_bitint, // Bit-precise integer types. + TST_half, // OpenCL half, ARM NEON __fp16 + TST_Float16, // C11 extension ISO/IEC TS 18661-3 + TST_Accum, // ISO/IEC JTC1 SC22 WG14 N1169 Extension TST_Fract, TST_BFloat16, TST_float, TST_double, TST_float128, - TST_bool, // _Bool - TST_decimal32, // _Decimal32 - TST_decimal64, // _Decimal64 - TST_decimal128, // _Decimal128 + TST_ibm128, + TST_bool, // _Bool + TST_decimal32, // _Decimal32 + TST_decimal64, // _Decimal64 + TST_decimal128, // _Decimal128 TST_enum, TST_union, TST_struct, - TST_class, // C++ class type - TST_interface, // C++ (Microsoft-specific) __interface type - TST_typename, // Typedef, C++ class-name or enum name, etc. - TST_typeofType, - TST_typeofExpr, - TST_decltype, // C++11 decltype - TST_underlyingType, // __underlying_type for C++11 - TST_auto, // C++11 auto - TST_decltype_auto, // C++1y decltype(auto) - TST_auto_type, // __auto_type extension - TST_unknown_anytype, // __unknown_anytype extension - TST_atomic, // C11 _Atomic + TST_class, // C++ class type + TST_interface, // C++ (Microsoft-specific) __interface type + TST_typename, // Typedef, C++ class-name or enum name, etc. + TST_typeofType, // C23 (and GNU extension) typeof(type-name) + TST_typeofExpr, // C23 (and GNU extension) typeof(expression) + TST_typeof_unqualType, // C23 typeof_unqual(type-name) + TST_typeof_unqualExpr, // C23 typeof_unqual(expression) + TST_decltype, // C++11 decltype +#define TRANSFORM_TYPE_TRAIT_DEF(_, Trait) TST_##Trait, +#include "clang/Basic/TransformTypeTraits.def" + TST_auto, // C++11 auto + TST_decltype_auto, // C++1y decltype(auto) + TST_auto_type, // __auto_type extension + TST_unknown_anytype, // __unknown_anytype extension + TST_atomic, // C11 _Atomic #define GENERIC_IMAGE_TYPE(ImgType, Id) TST_##ImgType##_t, // OpenCL image types #include "clang/Basic/OpenCLImageTypes.def" TST_error // erroneous type @@ -86,10 +102,14 @@ namespace clang { /// Structure that packs information about the type specifiers that /// were written in a particular type specifier sequence. struct WrittenBuiltinSpecs { - static_assert(TST_error < 1 << 6, "Type bitfield not wide enough for TST"); - /*DeclSpec::TST*/ unsigned Type : 6; - /*DeclSpec::TSS*/ unsigned Sign : 2; - /*TypeSpecifierWidth*/ unsigned Width : 2; + static_assert(TST_error < 1 << 7, "Type bitfield not wide enough for TST"); + LLVM_PREFERRED_TYPE(TypeSpecifierType) + unsigned Type : 7; + LLVM_PREFERRED_TYPE(TypeSpecifierSign) + unsigned Sign : 2; + LLVM_PREFERRED_TYPE(TypeSpecifierWidth) + unsigned Width : 2; + LLVM_PREFERRED_TYPE(bool) unsigned ModeAttr : 1; }; @@ -270,6 +290,9 @@ namespace clang { CC_PreserveMost, // __attribute__((preserve_most)) CC_PreserveAll, // __attribute__((preserve_all)) CC_AArch64VectorCall, // __attribute__((aarch64_vector_pcs)) + CC_AArch64SVEPCS, // __attribute__((aarch64_sve_pcs)) + CC_AMDGPUKernelCall, // __attribute__((amdgpu_kernel)) + CC_M68kRTD, // __attribute__((m68k_rtd)) }; /// Checks whether the given calling convention supports variadic @@ -286,6 +309,7 @@ namespace clang { case CC_OpenCLKernel: case CC_Swift: case CC_SwiftAsync: + case CC_M68kRTD: return false; default: return true; @@ -314,10 +338,12 @@ namespace clang { Unspecified, // Generally behaves like Nullable, except when used in a block parameter // that was imported into a swift async method. There, swift will assume - // that the parameter can get null even if no error occured. _Nullable + // that the parameter can get null even if no error occurred. _Nullable // parameters are assumed to only get null on error. NullableResult, }; + /// Prints human-readable debug representation. + llvm::raw_ostream &operator<<(llvm::raw_ostream&, NullabilityKind); /// Return true if \p L has a weaker nullability annotation than \p R. The /// ordering is: Unspecified < Nullable < NonNull. diff --git a/contrib/llvm-project/clang/include/clang/Basic/Stack.h b/contrib/llvm-project/clang/include/clang/Basic/Stack.h index 3418c3bad11b..30ebd94aedd1 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Stack.h +++ b/contrib/llvm-project/clang/include/clang/Basic/Stack.h @@ -39,7 +39,7 @@ namespace clang { /// is insufficient, calls Diag to emit a diagnostic before calling Fn. inline void runWithSufficientStackSpace(llvm::function_ref<void()> Diag, llvm::function_ref<void()> Fn) { -#ifdef LLVM_ENABLE_THREADS +#if LLVM_ENABLE_THREADS if (LLVM_UNLIKELY(isStackNearlyExhausted())) runWithSufficientStackSpaceSlow(Diag, Fn); else diff --git a/contrib/llvm-project/clang/include/clang/Basic/StmtNodes.td b/contrib/llvm-project/clang/include/clang/Basic/StmtNodes.td index 508f1fddf1b3..cec301dfca28 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/StmtNodes.td +++ b/contrib/llvm-project/clang/include/clang/Basic/StmtNodes.td @@ -50,7 +50,7 @@ def CXXCatchStmt : StmtNode<Stmt>; def CXXTryStmt : StmtNode<Stmt>; def CXXForRangeStmt : StmtNode<Stmt>; -// C++ Coroutines TS statements +// C++ Coroutines statements def CoroutineBodyStmt : StmtNode<Stmt>; def CoreturnStmt : StmtNode<Stmt>; @@ -160,8 +160,9 @@ def FunctionParmPackExpr : StmtNode<Expr>; def MaterializeTemporaryExpr : StmtNode<Expr>; def LambdaExpr : StmtNode<Expr>; def CXXFoldExpr : StmtNode<Expr>; +def CXXParenListInitExpr: StmtNode<Expr>; -// C++ Coroutines TS expressions +// C++ Coroutines expressions def CoroutineSuspendExpr : StmtNode<Expr, 1>; def CoawaitExpr : StmtNode<CoroutineSuspendExpr>; def DependentCoawaitExpr : StmtNode<Expr>; @@ -219,12 +220,14 @@ def AsTypeExpr : StmtNode<Expr>; // OpenMP Directives. def OMPCanonicalLoop : StmtNode<Stmt>; def OMPExecutableDirective : StmtNode<Stmt, 1>; +def OMPMetaDirective : StmtNode<OMPExecutableDirective>; def OMPLoopBasedDirective : StmtNode<OMPExecutableDirective, 1>; def OMPLoopDirective : StmtNode<OMPLoopBasedDirective, 1>; def OMPParallelDirective : StmtNode<OMPExecutableDirective>; def OMPSimdDirective : StmtNode<OMPLoopDirective>; -def OMPTileDirective : StmtNode<OMPLoopBasedDirective>; -def OMPUnrollDirective : StmtNode<OMPLoopBasedDirective>; +def OMPLoopTransformationDirective : StmtNode<OMPLoopBasedDirective, 1>; +def OMPTileDirective : StmtNode<OMPLoopTransformationDirective>; +def OMPUnrollDirective : StmtNode<OMPLoopTransformationDirective>; def OMPForDirective : StmtNode<OMPLoopDirective>; def OMPForSimdDirective : StmtNode<OMPLoopDirective>; def OMPSectionsDirective : StmtNode<OMPExecutableDirective>; @@ -256,12 +259,17 @@ def OMPTargetUpdateDirective : StmtNode<OMPExecutableDirective>; def OMPTeamsDirective : StmtNode<OMPExecutableDirective>; def OMPCancellationPointDirective : StmtNode<OMPExecutableDirective>; def OMPCancelDirective : StmtNode<OMPExecutableDirective>; +def OMPScopeDirective : StmtNode<OMPExecutableDirective>; def OMPTaskLoopDirective : StmtNode<OMPLoopDirective>; def OMPTaskLoopSimdDirective : StmtNode<OMPLoopDirective>; def OMPMasterTaskLoopDirective : StmtNode<OMPLoopDirective>; def OMPMasterTaskLoopSimdDirective : StmtNode<OMPLoopDirective>; def OMPParallelMasterTaskLoopDirective : StmtNode<OMPLoopDirective>; def OMPParallelMasterTaskLoopSimdDirective : StmtNode<OMPLoopDirective>; +def OMPMaskedTaskLoopDirective : StmtNode<OMPLoopDirective>; +def OMPMaskedTaskLoopSimdDirective : StmtNode<OMPLoopDirective>; +def OMPParallelMaskedTaskLoopDirective : StmtNode<OMPLoopDirective>; +def OMPParallelMaskedTaskLoopSimdDirective : StmtNode<OMPLoopDirective>; def OMPDistributeDirective : StmtNode<OMPLoopDirective>; def OMPDistributeParallelForDirective : StmtNode<OMPLoopDirective>; def OMPDistributeParallelForSimdDirective : StmtNode<OMPLoopDirective>; @@ -280,3 +288,10 @@ def OMPTargetTeamsDistributeSimdDirective : StmtNode<OMPLoopDirective>; def OMPInteropDirective : StmtNode<OMPExecutableDirective>; def OMPDispatchDirective : StmtNode<OMPExecutableDirective>; def OMPMaskedDirective : StmtNode<OMPExecutableDirective>; +def OMPParallelMaskedDirective : StmtNode<OMPExecutableDirective>; +def OMPGenericLoopDirective : StmtNode<OMPLoopDirective>; +def OMPTeamsGenericLoopDirective : StmtNode<OMPLoopDirective>; +def OMPTargetTeamsGenericLoopDirective : StmtNode<OMPLoopDirective>; +def OMPParallelGenericLoopDirective : StmtNode<OMPLoopDirective>; +def OMPTargetParallelGenericLoopDirective : StmtNode<OMPLoopDirective>; +def OMPErrorDirective : StmtNode<OMPExecutableDirective>; diff --git a/contrib/llvm-project/clang/include/clang/Basic/SyncScope.h b/contrib/llvm-project/clang/include/clang/Basic/SyncScope.h index ce8fb9cbed13..bc7ec7b5cf77 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/SyncScope.h +++ b/contrib/llvm-project/clang/include/clang/Basic/SyncScope.h @@ -40,6 +40,16 @@ namespace clang { /// Update getAsString. /// enum class SyncScope { + SystemScope, + DeviceScope, + WorkgroupScope, + WavefrontScope, + SingleScope, + HIPSingleThread, + HIPWavefront, + HIPWorkgroup, + HIPAgent, + HIPSystem, OpenCLWorkGroup, OpenCLDevice, OpenCLAllSVMDevices, @@ -49,6 +59,26 @@ enum class SyncScope { inline llvm::StringRef getAsString(SyncScope S) { switch (S) { + case SyncScope::SystemScope: + return "system_scope"; + case SyncScope::DeviceScope: + return "device_scope"; + case SyncScope::WorkgroupScope: + return "workgroup_scope"; + case SyncScope::WavefrontScope: + return "wavefront_scope"; + case SyncScope::SingleScope: + return "single_scope"; + case SyncScope::HIPSingleThread: + return "hip_singlethread"; + case SyncScope::HIPWavefront: + return "hip_wavefront"; + case SyncScope::HIPWorkgroup: + return "hip_workgroup"; + case SyncScope::HIPAgent: + return "hip_agent"; + case SyncScope::HIPSystem: + return "hip_system"; case SyncScope::OpenCLWorkGroup: return "opencl_workgroup"; case SyncScope::OpenCLDevice: @@ -62,7 +92,7 @@ inline llvm::StringRef getAsString(SyncScope S) { } /// Defines the kind of atomic scope models. -enum class AtomicScopeModelKind { None, OpenCL }; +enum class AtomicScopeModelKind { None, OpenCL, HIP, Generic }; /// Defines the interface for synch scope model. class AtomicScopeModel { @@ -130,7 +160,7 @@ public: static const unsigned Scopes[] = { static_cast<unsigned>(WorkGroup), static_cast<unsigned>(Device), static_cast<unsigned>(AllSVMDevices), static_cast<unsigned>(SubGroup)}; - return llvm::makeArrayRef(Scopes); + return llvm::ArrayRef(Scopes); } unsigned getFallBackValue() const override { @@ -138,6 +168,108 @@ public: } }; +/// Defines the synch scope model for HIP. +class AtomicScopeHIPModel : public AtomicScopeModel { +public: + /// The enum values match the pre-defined macros + /// __HIP_MEMORY_SCOPE_*, which are used to define memory_scope_* + /// enums in hip-c.h. + enum ID { + SingleThread = 1, + Wavefront = 2, + Workgroup = 3, + Agent = 4, + System = 5, + Last = System + }; + + AtomicScopeHIPModel() {} + + SyncScope map(unsigned S) const override { + switch (static_cast<ID>(S)) { + case SingleThread: + return SyncScope::HIPSingleThread; + case Wavefront: + return SyncScope::HIPWavefront; + case Workgroup: + return SyncScope::HIPWorkgroup; + case Agent: + return SyncScope::HIPAgent; + case System: + return SyncScope::HIPSystem; + } + llvm_unreachable("Invalid language synch scope value"); + } + + bool isValid(unsigned S) const override { + return S >= static_cast<unsigned>(SingleThread) && + S <= static_cast<unsigned>(Last); + } + + ArrayRef<unsigned> getRuntimeValues() const override { + static_assert(Last == System, "Does not include all synch scopes"); + static const unsigned Scopes[] = { + static_cast<unsigned>(SingleThread), static_cast<unsigned>(Wavefront), + static_cast<unsigned>(Workgroup), static_cast<unsigned>(Agent), + static_cast<unsigned>(System)}; + return llvm::ArrayRef(Scopes); + } + + unsigned getFallBackValue() const override { + return static_cast<unsigned>(System); + } +}; + +/// Defines the generic atomic scope model. +class AtomicScopeGenericModel : public AtomicScopeModel { +public: + /// The enum values match predefined built-in macros __ATOMIC_SCOPE_*. + enum ID { + System = 0, + Device = 1, + Workgroup = 2, + Wavefront = 3, + Single = 4, + Last = Single + }; + + AtomicScopeGenericModel() = default; + + SyncScope map(unsigned S) const override { + switch (static_cast<ID>(S)) { + case Device: + return SyncScope::DeviceScope; + case System: + return SyncScope::SystemScope; + case Workgroup: + return SyncScope::WorkgroupScope; + case Wavefront: + return SyncScope::WavefrontScope; + case Single: + return SyncScope::SingleScope; + } + llvm_unreachable("Invalid language sync scope value"); + } + + bool isValid(unsigned S) const override { + return S >= static_cast<unsigned>(System) && + S <= static_cast<unsigned>(Last); + } + + ArrayRef<unsigned> getRuntimeValues() const override { + static_assert(Last == Single, "Does not include all sync scopes"); + static const unsigned Scopes[] = { + static_cast<unsigned>(Device), static_cast<unsigned>(System), + static_cast<unsigned>(Workgroup), static_cast<unsigned>(Wavefront), + static_cast<unsigned>(Single)}; + return llvm::ArrayRef(Scopes); + } + + unsigned getFallBackValue() const override { + return static_cast<unsigned>(System); + } +}; + inline std::unique_ptr<AtomicScopeModel> AtomicScopeModel::create(AtomicScopeModelKind K) { switch (K) { @@ -145,9 +277,13 @@ AtomicScopeModel::create(AtomicScopeModelKind K) { return std::unique_ptr<AtomicScopeModel>{}; case AtomicScopeModelKind::OpenCL: return std::make_unique<AtomicScopeOpenCLModel>(); + case AtomicScopeModelKind::HIP: + return std::make_unique<AtomicScopeHIPModel>(); + case AtomicScopeModelKind::Generic: + return std::make_unique<AtomicScopeGenericModel>(); } llvm_unreachable("Invalid atomic scope model kind"); } -} +} // namespace clang #endif diff --git a/contrib/llvm-project/clang/include/clang/Basic/TargetBuiltins.h b/contrib/llvm-project/clang/include/clang/Basic/TargetBuiltins.h index ed53b10f61ef..c31834fb52a9 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/TargetBuiltins.h +++ b/contrib/llvm-project/clang/include/clang/Basic/TargetBuiltins.h @@ -27,6 +27,7 @@ namespace clang { enum { LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1, #define BUILTIN(ID, TYPE, ATTRS) BI##ID, +#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BI##ID, #include "clang/Basic/BuiltinsNEON.def" FirstTSBuiltin }; @@ -47,11 +48,22 @@ namespace clang { enum { LastNEONBuiltin = NEON::FirstTSBuiltin - 1, #define BUILTIN(ID, TYPE, ATTRS) BI##ID, +#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BI##ID, #include "clang/Basic/BuiltinsSVE.def" FirstTSBuiltin, }; } + namespace SME { + enum { + LastSVEBuiltin = SVE::FirstTSBuiltin - 1, +#define BUILTIN(ID, TYPE, ATTRS) BI##ID, +#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BI##ID, +#include "clang/Basic/BuiltinsSME.def" + FirstTSBuiltin, + }; + } + /// AArch64 builtins namespace AArch64 { enum { @@ -59,6 +71,8 @@ namespace clang { LastNEONBuiltin = NEON::FirstTSBuiltin - 1, FirstSVEBuiltin = NEON::FirstTSBuiltin, LastSVEBuiltin = SVE::FirstTSBuiltin - 1, + FirstSMEBuiltin = SVE::FirstTSBuiltin, + LastSMEBuiltin = SME::FirstTSBuiltin - 1, #define BUILTIN(ID, TYPE, ATTRS) BI##ID, #include "clang/Basic/BuiltinsAArch64.def" LastTSBuiltin @@ -121,19 +135,45 @@ namespace clang { /// VE builtins namespace VE { - enum { LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1, LastTSBuiltin }; + enum { + LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1, +#define BUILTIN(ID, TYPE, ATTRS) BI##ID, +#include "clang/Basic/BuiltinsVE.def" + LastTSBuiltin + }; + } + + namespace RISCVVector { + enum { + LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1, +#define BUILTIN(ID, TYPE, ATTRS) BI##ID, +#include "clang/Basic/BuiltinsRISCVVector.def" + FirstTSBuiltin, + }; } /// RISCV builtins namespace RISCV { enum { LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1, + FirstRVVBuiltin = clang::Builtin::FirstTSBuiltin, + LastRVVBuiltin = RISCVVector::FirstTSBuiltin - 1, #define BUILTIN(ID, TYPE, ATTRS) BI##ID, #include "clang/Basic/BuiltinsRISCV.def" LastTSBuiltin }; } // namespace RISCV + /// LoongArch builtins + namespace LoongArch { + enum { + LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1, +#define BUILTIN(ID, TYPE, ATTRS) BI##ID, +#include "clang/Basic/BuiltinsLoongArch.def" + LastTSBuiltin + }; + } // namespace LoongArch + /// Flags to identify the types for overloaded Neon builtins. /// /// These must be kept in sync with the flags in utils/TableGen/NeonEmitter.h. @@ -216,10 +256,10 @@ namespace clang { }; SVETypeFlags(uint64_t F) : Flags(F) { - EltTypeShift = llvm::countTrailingZeros(EltTypeMask); - MemEltTypeShift = llvm::countTrailingZeros(MemEltTypeMask); - MergeTypeShift = llvm::countTrailingZeros(MergeTypeMask); - SplatOperandMaskShift = llvm::countTrailingZeros(SplatOperandMask); + EltTypeShift = llvm::countr_zero(EltTypeMask); + MemEltTypeShift = llvm::countr_zero(MemEltTypeMask); + MergeTypeShift = llvm::countr_zero(MergeTypeMask); + SplatOperandMaskShift = llvm::countr_zero(SplatOperandMask); } EltType getEltType() const { @@ -251,7 +291,9 @@ namespace clang { bool isZExtReturn() const { return Flags & IsZExtReturn; } bool isByteIndexed() const { return Flags & IsByteIndexed; } bool isOverloadNone() const { return Flags & IsOverloadNone; } - bool isOverloadWhile() const { return Flags & IsOverloadWhile; } + bool isOverloadWhileOrMultiVecCvt() const { + return Flags & IsOverloadWhileOrMultiVecCvt; + } bool isOverloadDefault() const { return !(Flags & OverloadKindMask); } bool isOverloadWhileRW() const { return Flags & IsOverloadWhileRW; } bool isOverloadCvt() const { return Flags & IsOverloadCvt; } @@ -261,11 +303,15 @@ namespace clang { bool isInsertOp1SVALL() const { return Flags & IsInsertOp1SVALL; } bool isGatherPrefetch() const { return Flags & IsGatherPrefetch; } bool isReverseUSDOT() const { return Flags & ReverseUSDOT; } + bool isReverseMergeAnyBinOp() const { return Flags & ReverseMergeAnyBinOp; } + bool isReverseMergeAnyAccOp() const { return Flags & ReverseMergeAnyAccOp; } bool isUndef() const { return Flags & IsUndef; } bool isTupleCreate() const { return Flags & IsTupleCreate; } bool isTupleGet() const { return Flags & IsTupleGet; } bool isTupleSet() const { return Flags & IsTupleSet; } - + bool isReadZA() const { return Flags & IsReadZA; } + bool isWriteZA() const { return Flags & IsWriteZA; } + bool isReductionQV() const { return Flags & IsReductionQV; } uint64_t getBits() const { return Flags; } bool isFlagSet(uint64_t Flag) const { return Flags & Flag; } }; diff --git a/contrib/llvm-project/clang/include/clang/Basic/TargetCXXABI.h b/contrib/llvm-project/clang/include/clang/Basic/TargetCXXABI.h index e727f85edad7..c113a6a048ad 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/TargetCXXABI.h +++ b/contrib/llvm-project/clang/include/clang/Basic/TargetCXXABI.h @@ -19,8 +19,8 @@ #include "clang/Basic/LLVM.h" #include "llvm/ADT/StringMap.h" -#include "llvm/ADT/Triple.h" #include "llvm/Support/ErrorHandling.h" +#include "llvm/TargetParser/Triple.h" namespace clang { @@ -60,9 +60,7 @@ public: static const auto &getSpelling(Kind ABIKind) { return getSpellingMap().find(ABIKind)->second; } - static bool isABI(StringRef Name) { - return getABIMap().find(Name) != getABIMap().end(); - } + static bool isABI(StringRef Name) { return getABIMap().contains(Name); } // Return true if this target should use the relative vtables C++ ABI by // default. diff --git a/contrib/llvm-project/clang/include/clang/Basic/TargetID.h b/contrib/llvm-project/clang/include/clang/Basic/TargetID.h index 1a9785574d06..cef9cb5f0fb2 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/TargetID.h +++ b/contrib/llvm-project/clang/include/clang/Basic/TargetID.h @@ -6,12 +6,13 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_CLANG_BASIC_TARGET_ID_H -#define LLVM_CLANG_BASIC_TARGET_ID_H +#ifndef LLVM_CLANG_BASIC_TARGETID_H +#define LLVM_CLANG_BASIC_TARGETID_H #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringMap.h" -#include "llvm/ADT/Triple.h" +#include "llvm/TargetParser/Triple.h" +#include <optional> #include <set> namespace clang { @@ -21,7 +22,7 @@ namespace clang { /// postfixed by a plus or minus sign delimited by colons, e.g. /// gfx908:xnack+:sramecc-. Each processor have a limited /// number of predefined features when showing up in a target ID. -const llvm::SmallVector<llvm::StringRef, 4> +llvm::SmallVector<llvm::StringRef, 4> getAllPossibleTargetIDFeatures(const llvm::Triple &T, llvm::StringRef Processor); @@ -31,15 +32,15 @@ llvm::StringRef getProcessorFromTargetID(const llvm::Triple &T, llvm::StringRef OffloadArch); /// Parse a target ID to get processor and feature map. -/// Returns canonicalized processor name or None if the target ID is invalid. -/// Returns target ID features in \p FeatureMap if it is not null pointer. -/// This function assumes \p OffloadArch is a valid target ID. +/// Returns canonicalized processor name or std::nullopt if the target ID is +/// invalid. Returns target ID features in \p FeatureMap if it is not null +/// pointer. This function assumes \p OffloadArch is a valid target ID. /// If the target ID contains feature+, map it to true. /// If the target ID contains feature-, map it to false. /// If the target ID does not contain a feature (default), do not map it. -llvm::Optional<llvm::StringRef> -parseTargetID(const llvm::Triple &T, llvm::StringRef OffloadArch, - llvm::StringMap<bool> *FeatureMap); +std::optional<llvm::StringRef> parseTargetID(const llvm::Triple &T, + llvm::StringRef OffloadArch, + llvm::StringMap<bool> *FeatureMap); /// Returns canonical target ID, assuming \p Processor is canonical and all /// entries in \p Features are valid. @@ -48,9 +49,13 @@ std::string getCanonicalTargetID(llvm::StringRef Processor, /// Get the conflicted pair of target IDs for a compilation or a bundled code /// object, assuming \p TargetIDs are canonicalized. If there is no conflicts, -/// returns None. -llvm::Optional<std::pair<llvm::StringRef, llvm::StringRef>> +/// returns std::nullopt. +std::optional<std::pair<llvm::StringRef, llvm::StringRef>> getConflictTargetIDCombination(const std::set<llvm::StringRef> &TargetIDs); + +/// Check whether the provided target ID is compatible with the requested +/// target ID. +bool isCompatibleTargetID(llvm::StringRef Provided, llvm::StringRef Requested); } // namespace clang #endif diff --git a/contrib/llvm-project/clang/include/clang/Basic/TargetInfo.h b/contrib/llvm-project/clang/include/clang/Basic/TargetInfo.h index 4f0cbf986b31..3eb23ebdacf0 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/TargetInfo.h +++ b/contrib/llvm-project/clang/include/clang/Basic/TargetInfo.h @@ -15,6 +15,7 @@ #define LLVM_CLANG_BASIC_TARGETINFO_H #include "clang/Basic/AddressSpaces.h" +#include "clang/Basic/BitmaskEnum.h" #include "clang/Basic/CodeGenOptions.h" #include "clang/Basic/LLVM.h" #include "clang/Basic/LangOptions.h" @@ -25,16 +26,18 @@ #include "llvm/ADT/APInt.h" #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/IntrusiveRefCntPtr.h" -#include "llvm/ADT/Optional.h" #include "llvm/ADT/SmallSet.h" #include "llvm/ADT/StringMap.h" #include "llvm/ADT/StringRef.h" -#include "llvm/ADT/Triple.h" +#include "llvm/ADT/StringSet.h" #include "llvm/Frontend/OpenMP/OMPGridValues.h" +#include "llvm/IR/DerivedTypes.h" #include "llvm/Support/DataTypes.h" #include "llvm/Support/Error.h" #include "llvm/Support/VersionTuple.h" +#include "llvm/TargetParser/Triple.h" #include <cassert> +#include <optional> #include <string> #include <vector> @@ -47,12 +50,34 @@ class DiagnosticsEngine; class LangOptions; class CodeGenOptions; class MacroBuilder; -class QualType; -class SourceLocation; -class SourceManager; + +/// Contains information gathered from parsing the contents of TargetAttr. +struct ParsedTargetAttr { + std::vector<std::string> Features; + StringRef CPU; + StringRef Tune; + StringRef BranchProtection; + StringRef Duplicate; + bool operator ==(const ParsedTargetAttr &Other) const { + return Duplicate == Other.Duplicate && CPU == Other.CPU && + Tune == Other.Tune && BranchProtection == Other.BranchProtection && + Features == Other.Features; + } +}; namespace Builtin { struct Info; } +enum class FloatModeKind { + NoFloat = 0, + Half = 1 << 0, + Float = 1 << 1, + Double = 1 << 2, + LongDouble = 1 << 3, + Float128 = 1 << 4, + Ibm128 = 1 << 5, + LLVM_MARK_AS_BITMASK_ENUM(Ibm128) +}; + /// Fields controlling how types are laid out in memory; these may need to /// be copied for targets like AMDGPU that base their ABIs on an auxiliary /// CPU target. @@ -64,10 +89,11 @@ struct TransferrableTargetInfo { unsigned char BFloat16Width, BFloat16Align; unsigned char FloatWidth, FloatAlign; unsigned char DoubleWidth, DoubleAlign; - unsigned char LongDoubleWidth, LongDoubleAlign, Float128Align; + unsigned char LongDoubleWidth, LongDoubleAlign, Float128Align, Ibm128Align; unsigned char LargeArrayMinWidth, LargeArrayAlign; unsigned char LongWidth, LongAlign; unsigned char LongLongWidth, LongLongAlign; + unsigned char Int128Align; // Fixed point bit widths unsigned char ShortAccumWidth, ShortAccumAlign; @@ -95,16 +121,16 @@ struct TransferrableTargetInfo { unsigned char AccumScale; unsigned char LongAccumScale; - unsigned char SuitableAlign; unsigned char DefaultAlignForAttributeAligned; unsigned char MinGlobalAlign; + unsigned short SuitableAlign; unsigned short NewAlign; unsigned MaxVectorAlign; unsigned MaxTLSAlign; const llvm::fltSemantics *HalfFormat, *BFloat16Format, *FloatFormat, - *DoubleFormat, *LongDoubleFormat, *Float128Format; + *DoubleFormat, *LongDoubleFormat, *Float128Format, *Ibm128Format; ///===---- Target Data Type Query Methods -------------------------------===// enum IntType { @@ -121,13 +147,6 @@ struct TransferrableTargetInfo { UnsignedLongLong }; - enum RealType { - NoFloat = 255, - Float = 0, - Double, - LongDouble, - Float128 - }; protected: IntType SizeType, IntMaxType, PtrDiffType, IntPtrType, WCharType, WIntType, Char16Type, Char32Type, Int64Type, Int16Type, SigAtomicType, @@ -137,6 +156,7 @@ protected: /// /// Otherwise, when this flag is not set, the normal built-in boolean type is /// used. + LLVM_PREFERRED_TYPE(bool) unsigned UseSignedCharForObjCBool : 1; /// Control whether the alignment of bit-field types is respected when laying @@ -144,6 +164,7 @@ protected: /// used to (a) impact the alignment of the containing structure, and (b) /// ensure that the individual bit-field will not straddle an alignment /// boundary. + LLVM_PREFERRED_TYPE(bool) unsigned UseBitFieldTypeAlignment : 1; /// Whether zero length bitfields (e.g., int : 0;) force alignment of @@ -152,13 +173,16 @@ protected: /// If the alignment of the zero length bitfield is greater than the member /// that follows it, `bar', `bar' will be aligned as the type of the /// zero-length bitfield. + LLVM_PREFERRED_TYPE(bool) unsigned UseZeroLengthBitfieldAlignment : 1; /// Whether zero length bitfield alignment is respected if they are the /// leading members. + LLVM_PREFERRED_TYPE(bool) unsigned UseLeadingZeroLengthBitfield : 1; /// Whether explicit bit field alignment attributes are honored. + LLVM_PREFERRED_TYPE(bool) unsigned UseExplicitBitFieldAlignment : 1; /// If non-zero, specifies a fixed alignment value for bitfields that follow @@ -184,7 +208,7 @@ enum OpenCLTypeKind : uint8_t { /// Exposes information about the current target. /// -class TargetInfo : public virtual TransferrableTargetInfo, +class TargetInfo : public TransferrableTargetInfo, public RefCountedBase<TargetInfo> { std::shared_ptr<TargetOptions> TargetOpts; llvm::Triple Triple; @@ -197,44 +221,59 @@ protected: bool NoAsmVariants; // True if {|} are normal characters. bool HasLegalHalfType; // True if the backend supports operations on the half // LLVM IR type. + bool HalfArgsAndReturns; bool HasFloat128; bool HasFloat16; bool HasBFloat16; + bool HasFullBFloat16; // True if the backend supports native bfloat16 + // arithmetic. Used to determine excess precision + // support in the frontend. + bool HasIbm128; + bool HasLongDouble; + bool HasFPReturn; bool HasStrictFP; unsigned char MaxAtomicPromoteWidth, MaxAtomicInlineWidth; - unsigned short SimdDefaultAlign; std::string DataLayoutString; const char *UserLabelPrefix; const char *MCountName; unsigned char RegParmMax, SSERegParmMax; TargetCXXABI TheCXXABI; const LangASMap *AddrSpaceMap; - const unsigned *GridValues = - nullptr; // Array of target-specific GPU grid values that must be - // consistent between host RTL (plugin), device RTL, and clang. mutable StringRef PlatformName; mutable VersionTuple PlatformMinVersion; + LLVM_PREFERRED_TYPE(bool) unsigned HasAlignMac68kSupport : 1; - unsigned RealTypeUsesObjCFPRet : 3; + LLVM_PREFERRED_TYPE(FloatModeKind) + unsigned RealTypeUsesObjCFPRetMask : llvm::BitWidth<FloatModeKind>; + LLVM_PREFERRED_TYPE(bool) unsigned ComplexLongDoubleUsesFP2Ret : 1; + LLVM_PREFERRED_TYPE(bool) unsigned HasBuiltinMSVaList : 1; + LLVM_PREFERRED_TYPE(bool) unsigned IsRenderScriptTarget : 1; + LLVM_PREFERRED_TYPE(bool) unsigned HasAArch64SVETypes : 1; + LLVM_PREFERRED_TYPE(bool) unsigned HasRISCVVTypes : 1; + LLVM_PREFERRED_TYPE(bool) unsigned AllowAMDGPUUnsafeFPAtomics : 1; unsigned ARMCDECoprocMask : 8; unsigned MaxOpenCLWorkGroupSize; + std::optional<unsigned> MaxBitIntWidth; + + std::optional<llvm::Triple> DarwinTargetVariantTriple; + // TargetInfo Constructor. Default initializes all fields. TargetInfo(const llvm::Triple &T); @@ -242,6 +281,12 @@ protected: // as a DataLayout object. void resetDataLayout(StringRef DL, const char *UserLabelPrefix = ""); + // Target features that are read-only and should not be disabled/enabled + // by command line options. Such features are for emitting predefined + // macros or checking availability of builtin functions and can be omitted + // in function attributes in IR. + llvm::StringSet<> ReadOnlyFeatures; + public: /// Construct a target for the given options. /// @@ -333,10 +378,11 @@ public: IntType getUIntMaxType() const { return getCorrespondingUnsignedType(IntMaxType); } - IntType getPtrDiffType(unsigned AddrSpace) const { - return AddrSpace == 0 ? PtrDiffType : getPtrDiffTypeV(AddrSpace); + IntType getPtrDiffType(LangAS AddrSpace) const { + return AddrSpace == LangAS::Default ? PtrDiffType + : getPtrDiffTypeV(AddrSpace); } - IntType getUnsignedPtrDiffType(unsigned AddrSpace) const { + IntType getUnsignedPtrDiffType(LangAS AddrSpace) const { return getCorrespondingUnsignedType(getPtrDiffType(AddrSpace)); } IntType getIntPtrType() const { return IntPtrType; } @@ -401,7 +447,8 @@ public: /// is represented as one of those two). At this time, there is no support /// for an explicit "PPC double-double" type (i.e. __ibm128) so we only /// need to differentiate between "long double" and IEEE quad precision. - RealType getRealTypeByWidth(unsigned BitWidth, bool ExplicitIEEE) const; + FloatModeKind getRealTypeByWidth(unsigned BitWidth, + FloatModeKind ExplicitType) const; /// Return the alignment (in bits) of the specified integer type enum. /// @@ -413,11 +460,13 @@ public: /// Return the width of pointers on this target, for the /// specified address space. - uint64_t getPointerWidth(unsigned AddrSpace) const { - return AddrSpace == 0 ? PointerWidth : getPointerWidthV(AddrSpace); + uint64_t getPointerWidth(LangAS AddrSpace) const { + return AddrSpace == LangAS::Default ? PointerWidth + : getPointerWidthV(AddrSpace); } - uint64_t getPointerAlign(unsigned AddrSpace) const { - return AddrSpace == 0 ? PointerAlign : getPointerAlignV(AddrSpace); + uint64_t getPointerAlign(LangAS AddrSpace) const { + return AddrSpace == LangAS::Default ? PointerAlign + : getPointerAlignV(AddrSpace); } /// Return the maximum width of pointers on this target. @@ -461,6 +510,9 @@ public: unsigned getLongLongWidth() const { return LongLongWidth; } unsigned getLongLongAlign() const { return LongLongAlign; } + /// getInt128Align() - Returns the alignment of Int128. + unsigned getInt128Align() const { return Int128Align; } + /// getShortAccumWidth/Align - Return the size of 'signed short _Accum' and /// 'unsigned short _Accum' for this target, in bits. unsigned getShortAccumWidth() const { return ShortAccumWidth; } @@ -576,18 +628,42 @@ public: /// Determine whether the __int128 type is supported on this target. virtual bool hasInt128Type() const { - return (getPointerWidth(0) >= 64) || getTargetOpts().ForceEnableInt128; + return (getPointerWidth(LangAS::Default) >= 64) || + getTargetOpts().ForceEnableInt128; } // FIXME - /// Determine whether the _ExtInt type is supported on this target. This + /// Determine whether the _BitInt type is supported on this target. This /// limitation is put into place for ABI reasons. - virtual bool hasExtIntType() const { + /// FIXME: _BitInt is a required type in C23, so there's not much utility in + /// asking whether the target supported it or not; I think this should be + /// removed once backends have been alerted to the type and have had the + /// chance to do implementation work if needed. + virtual bool hasBitIntType() const { return false; } + // Different targets may support a different maximum width for the _BitInt + // type, depending on what operations are supported. + virtual size_t getMaxBitIntWidth() const { + // Consider -fexperimental-max-bitint-width= first. + if (MaxBitIntWidth) + return std::min<size_t>(*MaxBitIntWidth, llvm::IntegerType::MAX_INT_BITS); + + // FIXME: this value should be llvm::IntegerType::MAX_INT_BITS, which is + // maximum bit width that LLVM claims its IR can support. However, most + // backends currently have a bug where they only support float to int + // conversion (and vice versa) on types that are <= 128 bits and crash + // otherwise. We're setting the max supported value to 128 to be + // conservative. + return 128; + } + /// Determine whether _Float16 is supported on this target. virtual bool hasLegalHalfType() const { return HasLegalHalfType; } + /// Whether half args and returns are supported. + virtual bool allowHalfArgsAndReturns() const { return HalfArgsAndReturns; } + /// Determine whether the __float128 type is supported on this target. virtual bool hasFloat128Type() const { return HasFloat128; } @@ -595,7 +671,23 @@ public: virtual bool hasFloat16Type() const { return HasFloat16; } /// Determine whether the _BFloat16 type is supported on this target. - virtual bool hasBFloat16Type() const { return HasBFloat16; } + virtual bool hasBFloat16Type() const { + return HasBFloat16 || HasFullBFloat16; + } + + /// Determine whether the BFloat type is fully supported on this target, i.e + /// arithemtic operations. + virtual bool hasFullBFloat16Type() const { return HasFullBFloat16; } + + /// Determine whether the __ibm128 type is supported on this target. + virtual bool hasIbm128Type() const { return HasIbm128; } + + /// Determine whether the long double type is supported on this target. + virtual bool hasLongDoubleType() const { return HasLongDouble; } + + /// Determine whether return of a floating point value is supported + /// on this target. + virtual bool hasFPReturn() const { return HasFPReturn; } /// Determine whether constrained floating point is supported on this target. virtual bool hasStrictFP() const { return HasStrictFP; } @@ -618,8 +710,8 @@ public: } /// Return the largest alignment for which a suitably-sized allocation with - /// '::operator new(size_t)' or 'malloc' is guaranteed to produce a - /// correctly-aligned pointer. + /// '::operator new(size_t)' is guaranteed to produce a correctly-aligned + /// pointer. unsigned getNewAlign() const { return NewAlign ? NewAlign : std::max(LongDoubleAlign, LongLongAlign); } @@ -675,19 +767,32 @@ public: return *Float128Format; } + /// getIbm128Width/Align/Format - Return the size/align/format of + /// '__ibm128'. + unsigned getIbm128Width() const { return 128; } + unsigned getIbm128Align() const { return Ibm128Align; } + const llvm::fltSemantics &getIbm128Format() const { return *Ibm128Format; } + /// Return the mangled code of long double. virtual const char *getLongDoubleMangling() const { return "e"; } /// Return the mangled code of __float128. virtual const char *getFloat128Mangling() const { return "g"; } - /// Return the mangled code of bfloat. - virtual const char *getBFloat16Mangling() const { - llvm_unreachable("bfloat not implemented on this target"); + /// Return the mangled code of __ibm128. + virtual const char *getIbm128Mangling() const { + llvm_unreachable("ibm128 not implemented on this target"); } + /// Return the mangled code of bfloat. + virtual const char *getBFloat16Mangling() const { return "DF16b"; } + /// Return the value for the C99 FLT_EVAL_METHOD macro. - virtual unsigned getFloatEvalMethod() const { return 0; } + virtual LangOptions::FPEvalMethodKind getFPEvalMethod() const { + return LangOptions::FPEvalMethodKind::FEM_Source; + } + + virtual bool supportSourceEvalMethod() const { return true; } // getLargeArrayMinWidth/Align - Return the minimum array size that is // 'large' and its alignment. @@ -715,10 +820,6 @@ public: /// Return the maximum vector alignment supported for the given target. unsigned getMaxVectorAlign() const { return MaxVectorAlign; } - /// Return default simd alignment for the given target. Generally, this - /// value is type-specific, but this alignment can be used for most of the - /// types for the given target. - unsigned getSimdDefaultAlign() const { return SimdDefaultAlign; } unsigned getMaxOpenCLWorkGroupSize() const { return MaxOpenCLWorkGroupSize; } @@ -743,7 +844,9 @@ public: } // Return the size of unwind_word for this target. - virtual unsigned getUnwindWordWidth() const { return getPointerWidth(0); } + virtual unsigned getUnwindWordWidth() const { + return getPointerWidth(LangAS::Default); + } /// Return the "preferred" register width on this target. virtual unsigned getRegisterWidth() const { @@ -833,8 +936,8 @@ public: /// Check whether the given real type should use the "fpret" flavor of /// Objective-C message passing on this target. - bool useObjCFPRetForRealType(RealType T) const { - return RealTypeUsesObjCFPRet & (1 << T); + bool useObjCFPRetForRealType(FloatModeKind T) const { + return (int)((FloatModeKind)RealTypeUsesObjCFPRetMask & T); } /// Check whether _Complex long double should use the "fp2ret" flavor @@ -870,6 +973,11 @@ public: /// across the current set of primary and secondary targets. virtual ArrayRef<Builtin::Info> getTargetBuiltins() const = 0; + /// Returns target-specific min and max values VScale_Range. + virtual std::optional<std::pair<unsigned, unsigned>> + getVScaleRange(const LangOptions &LangOpts) const { + return std::nullopt; + } /// The __builtin_clz* and __builtin_ctz* built-in /// functions are specified to have undefined results for zero inputs, but /// on targets that support these operations in a way that provides @@ -993,8 +1101,7 @@ public: } bool isValidAsmImmediate(const llvm::APInt &Value) const { if (!ImmSet.empty()) - return Value.isSignedIntN(32) && - ImmSet.count(Value.getZExtValue()) != 0; + return Value.isSignedIntN(32) && ImmSet.contains(Value.getZExtValue()); return !ImmRange.isConstrained || (Value.sge(ImmRange.Min) && Value.sle(ImmRange.Max)); } @@ -1093,12 +1200,12 @@ public: /// Replace some escaped characters with another string based on /// target-specific rules - virtual llvm::Optional<std::string> handleAsmEscapedChar(char C) const { - return llvm::None; + virtual std::optional<std::string> handleAsmEscapedChar(char C) const { + return std::nullopt; } /// Returns a string of target-specific clobbers, in LLVM format. - virtual const char *getClobbers() const = 0; + virtual std::string_view getClobbers() const = 0; /// Returns true if NaN encoding is IEEE 754-2008. /// Only MIPS allows a different encoding. @@ -1112,7 +1219,9 @@ public: } /// Returns the target ID if supported. - virtual llvm::Optional<std::string> getTargetID() const { return llvm::None; } + virtual std::optional<std::string> getTargetID() const { + return std::nullopt; + } const char *getDataLayoutString() const { assert(!DataLayoutString.empty() && "Uninitialized DataLayout!"); @@ -1145,12 +1254,12 @@ public: /// Microsoft C++ code using dllimport/export attributes? virtual bool shouldDLLImportComdatSymbols() const { return getTriple().isWindowsMSVCEnvironment() || - getTriple().isWindowsItaniumEnvironment() || getTriple().isPS4CPU(); + getTriple().isWindowsItaniumEnvironment() || getTriple().isPS(); } // Does this target have PS4 specific dllimport/export handling? virtual bool hasPS4DLLImportExport() const { - return getTriple().isPS4CPU() || + return getTriple().isPS() || // Windows Itanium support allows for testing the SCEI flavour of // dllimport/export handling on a Windows system. (getTriple().isWindowsItaniumEnvironment() && @@ -1164,10 +1273,6 @@ public: /// the language based on the target options where applicable. virtual void adjust(DiagnosticsEngine &Diags, LangOptions &Opts); - /// Adjust target options based on codegen options. - virtual void adjustTargetOptions(const CodeGenOptions &CGOpts, - TargetOptions &TargetOpts) const {} - /// Initialize the map with the default set of target features for the /// CPU this should include all legal feature strings on the target. /// @@ -1199,18 +1304,20 @@ public: fillValidCPUList(Values); } - /// brief Determine whether this TargetInfo supports the given CPU name. + /// Determine whether this TargetInfo supports the given CPU name. virtual bool isValidCPUName(StringRef Name) const { return true; } - /// brief Determine whether this TargetInfo supports the given CPU name for - // tuning. + /// Determine whether this TargetInfo supports the given CPU name for + /// tuning. virtual bool isValidTuneCPUName(StringRef Name) const { return isValidCPUName(Name); } - /// brief Determine whether this TargetInfo supports tune in target attribute. + virtual ParsedTargetAttr parseTargetAttr(StringRef Str) const; + + /// Determine whether this TargetInfo supports tune in target attribute. virtual bool supportsTargetAttributeTune() const { return false; } @@ -1248,17 +1355,36 @@ public: return true; } + /// Returns true if feature has an impact on target code + /// generation. + virtual bool doesFeatureAffectCodeGen(StringRef Feature) const { + return true; + } + + /// For given feature return dependent ones. + virtual StringRef getFeatureDependencies(StringRef Feature) const { + return StringRef(); + } + struct BranchProtectionInfo { LangOptions::SignReturnAddressScopeKind SignReturnAddr = LangOptions::SignReturnAddressScopeKind::None; LangOptions::SignReturnAddressKeyKind SignKey = LangOptions::SignReturnAddressKeyKind::AKey; bool BranchTargetEnforcement = false; + bool BranchProtectionPAuthLR = false; + bool GuardedControlStack = false; }; + /// Determine if the Architecture in this TargetInfo supports branch + /// protection + virtual bool isBranchProtectionSupportedArch(StringRef Arch) const { + return false; + } + /// Determine if this TargetInfo supports the given branch protection /// specification - virtual bool validateBranchProtection(StringRef Spec, + virtual bool validateBranchProtection(StringRef Spec, StringRef Arch, BranchProtectionInfo &BPI, StringRef &Err) const { Err = ""; @@ -1286,12 +1412,25 @@ public: return false; } + /// Determine whether the given target feature is read only. + bool isReadOnlyFeature(StringRef Feature) const { + return ReadOnlyFeatures.count(Feature); + } + /// Identify whether this target supports multiversioning of functions, /// which requires support for cpu_supports and cpu_is functionality. - bool supportsMultiVersioning() const { return getTriple().isX86(); } + bool supportsMultiVersioning() const { + return getTriple().isX86() || getTriple().isAArch64(); + } /// Identify whether this target supports IFuncs. - bool supportsIFunc() const { return getTriple().isOSBinFormatELF(); } + bool supportsIFunc() const { + if (getTriple().isOSBinFormatMachO()) + return true; + return getTriple().isOSBinFormatELF() && + ((getTriple().isOSLinux() && !getTriple().isMusl()) || + getTriple().isOSFreeBSD()); + } // Validate the contents of the __builtin_cpu_supports(const char*) // argument. @@ -1303,6 +1442,10 @@ public: return 0; } + // Return the target-specific cost for feature + // that taken into account in priority sorting. + virtual unsigned multiVersionFeatureCost() const { return 0; } + // Validate the contents of the __builtin_cpu_is(const char*) // argument. virtual bool validateCpuIs(StringRef Name) const { return false; } @@ -1319,6 +1462,13 @@ public: "cpu_specific Multiversioning not implemented on this target"); } + // Get the value for the 'tune-cpu' flag for a cpu_specific variant with the + // programmer-specified 'Name'. + virtual StringRef getCPUSpecificTuneName(StringRef Name) const { + llvm_unreachable( + "cpu_specific Multiversioning not implemented on this target"); + } + // Get a list of the features that make up the CPU option for // cpu_specific/cpu_dispatch so that it can be passed to llvm as optimization // options. @@ -1329,8 +1479,10 @@ public: } // Get the cache line size of a given cpu. This method switches over - // the given cpu and returns "None" if the CPU is not found. - virtual Optional<unsigned> getCPUCacheLineSize() const { return None; } + // the given cpu and returns "std::nullopt" if the CPU is not found. + virtual std::optional<unsigned> getCPUCacheLineSize() const { + return std::nullopt; + } // Returns maximal number of args passed in registers. unsigned getRegParmMax() const { @@ -1383,6 +1535,11 @@ public: } const LangASMap &getAddressSpaceMap() const { return *AddrSpaceMap; } + unsigned getTargetAddressSpace(LangAS AS) const { + if (isTargetAddressSpace(AS)) + return toTargetAddressSpace(AS); + return getAddressSpaceMap()[(unsigned)AS]; + } /// Map from the address space field in builtin description strings to the /// language address space. @@ -1399,15 +1556,15 @@ public: /// Return an AST address space which can be used opportunistically /// for constant global memory. It must be possible to convert pointers into /// this address space to LangAS::Default. If no such address space exists, - /// this may return None, and such optimizations will be disabled. - virtual llvm::Optional<LangAS> getConstantAddressSpace() const { + /// this may return std::nullopt, and such optimizations will be disabled. + virtual std::optional<LangAS> getConstantAddressSpace() const { return LangAS::Default; } - /// Return a target-specific GPU grid value based on the GVIDX enum \p gv - unsigned getGridValue(llvm::omp::GVIDX gv) const { - assert(GridValues != nullptr && "GridValues not initialized"); - return GridValues[gv]; + // access target-specific GPU grid values that must be consistent between + // host RTL (plugin), deviceRTL and clang. + virtual const llvm::omp::GV &getGridValue() const { + llvm_unreachable("getGridValue not implemented on this target"); } /// Retrieve the name of the platform as it is used in the @@ -1464,6 +1621,14 @@ public: virtual CallingConvKind getCallingConvKind(bool ClangABICompat4) const; + /// Controls whether explicitly defaulted (`= default`) special member + /// functions disqualify something from being POD-for-the-purposes-of-layout. + /// Historically, Clang didn't consider these acceptable for POD, but GCC + /// does. So in newer Clang ABIs they are acceptable for POD to be compatible + /// with GCC/Itanium ABI, and remains disqualifying for targets that need + /// Clang backwards compatibility rather than GCC/Itanium ABI compatibility. + virtual bool areDefaultedSMFStillPOD(const LangOptions&) const; + /// Controls if __builtin_longjmp / __builtin_setjmp can be lowered to /// llvm.eh.sjlj.longjmp / llvm.eh.sjlj.setjmp. virtual bool hasSjLjLowering() const { @@ -1474,7 +1639,7 @@ public: virtual bool checkCFProtectionBranchSupported(DiagnosticsEngine &Diags) const; - /// Check if the target supports CFProtection branch. + /// Check if the target supports CFProtection return. virtual bool checkCFProtectionReturnSupported(DiagnosticsEngine &Diags) const; @@ -1531,10 +1696,11 @@ public: /// space \p AddressSpace to be converted in order to be used, then return the /// corresponding target specific DWARF address space. /// - /// \returns Otherwise return None and no conversion will be emitted in the - /// DWARF. - virtual Optional<unsigned> getDWARFAddressSpace(unsigned AddressSpace) const { - return None; + /// \returns Otherwise return std::nullopt and no conversion will be emitted + /// in the DWARF. + virtual std::optional<unsigned> getDWARFAddressSpace(unsigned AddressSpace) + const { + return std::nullopt; } /// \returns The version of the SDK which was used during the compilation if @@ -1558,22 +1724,39 @@ public: /// Whether target allows debuginfo types for decl only variables/functions. virtual bool allowDebugInfoForExternalRef() const { return false; } + /// Returns the darwin target variant triple, the variant of the deployment + /// target for which the code is being compiled. + const llvm::Triple *getDarwinTargetVariantTriple() const { + return DarwinTargetVariantTriple ? &*DarwinTargetVariantTriple : nullptr; + } + + /// Returns the version of the darwin target variant SDK which was used during + /// the compilation if one was specified, or an empty version otherwise. + const std::optional<VersionTuple> getDarwinTargetVariantSDKVersion() const { + return !getTargetOpts().DarwinTargetVariantSDKVersion.empty() + ? getTargetOpts().DarwinTargetVariantSDKVersion + : std::optional<VersionTuple>(); + } + + /// Whether to support HIP image/texture API's. + virtual bool hasHIPImageSupport() const { return true; } + protected: /// Copy type and layout related info. void copyAuxTarget(const TargetInfo *Aux); - virtual uint64_t getPointerWidthV(unsigned AddrSpace) const { + virtual uint64_t getPointerWidthV(LangAS AddrSpace) const { return PointerWidth; } - virtual uint64_t getPointerAlignV(unsigned AddrSpace) const { + virtual uint64_t getPointerAlignV(LangAS AddrSpace) const { return PointerAlign; } - virtual enum IntType getPtrDiffTypeV(unsigned AddrSpace) const { + virtual enum IntType getPtrDiffTypeV(LangAS AddrSpace) const { return PtrDiffType; } virtual ArrayRef<const char *> getGCCRegNames() const = 0; virtual ArrayRef<GCCRegAlias> getGCCRegAliases() const = 0; virtual ArrayRef<AddlRegName> getGCCAddlRegNames() const { - return None; + return std::nullopt; } private: diff --git a/contrib/llvm-project/clang/include/clang/Basic/TargetOSMacros.def b/contrib/llvm-project/clang/include/clang/Basic/TargetOSMacros.def new file mode 100644 index 000000000000..dfc2e033f6fd --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/TargetOSMacros.def @@ -0,0 +1,55 @@ +//===--- TargetOSMacros.def - Target OS macros ------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file specifies the predefined TARGET_OS_* conditional macros. +// A target macro `Name` should be defined if `Predicate` evaluates to true. +// The macro expects `const llvm::Triple &Triple` and the class `llvm::Triple` +// to be available for the predicate. +// +//===----------------------------------------------------------------------===// + +#ifndef TARGET_OS +#define TARGET_OS(Name, Predicate) +#endif + +// Windows targets. +TARGET_OS(TARGET_OS_WIN32, Triple.isOSWindows()) +TARGET_OS(TARGET_OS_WINDOWS, Triple.isOSWindows()) + +// Linux target. +TARGET_OS(TARGET_OS_LINUX, Triple.isOSLinux()) + +// Unix target. +TARGET_OS(TARGET_OS_UNIX, Triple.isOSNetBSD() || + Triple.isOSFreeBSD() || + Triple.isOSOpenBSD() || + Triple.isOSSolaris()) + +// Apple (Mac) targets. +TARGET_OS(TARGET_OS_MAC, Triple.isOSDarwin()) +TARGET_OS(TARGET_OS_OSX, Triple.isMacOSX()) +TARGET_OS(TARGET_OS_IPHONE, Triple.isiOS() || Triple.isTvOS() || + Triple.isWatchOS()) +// Triple::isiOS() also includes tvOS +TARGET_OS(TARGET_OS_IOS, Triple.getOS() == llvm::Triple::IOS) +TARGET_OS(TARGET_OS_TV, Triple.isTvOS()) +TARGET_OS(TARGET_OS_WATCH, Triple.isWatchOS()) +TARGET_OS(TARGET_OS_DRIVERKIT, Triple.isDriverKit()) +TARGET_OS(TARGET_OS_MACCATALYST, Triple.isMacCatalystEnvironment()) +TARGET_OS(TARGET_OS_SIMULATOR, Triple.isSimulatorEnvironment()) + +// Deprecated Apple target conditionals. +TARGET_OS(TARGET_OS_EMBEDDED, (Triple.isiOS() || Triple.isTvOS() \ + || Triple.isWatchOS()) \ + && !Triple.isMacCatalystEnvironment() \ + && !Triple.isSimulatorEnvironment()) +TARGET_OS(TARGET_OS_NANO, Triple.isWatchOS()) +TARGET_OS(TARGET_IPHONE_SIMULATOR, Triple.isSimulatorEnvironment()) +TARGET_OS(TARGET_OS_UIKITFORMAC, Triple.isMacCatalystEnvironment()) + +#undef TARGET_OS diff --git a/contrib/llvm-project/clang/include/clang/Basic/TargetOptions.h b/contrib/llvm-project/clang/include/clang/Basic/TargetOptions.h index 81c15adb8248..2049f03b2889 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/TargetOptions.h +++ b/contrib/llvm-project/clang/include/clang/Basic/TargetOptions.h @@ -45,7 +45,7 @@ public: std::string ABI; /// The EABI version to use - llvm::EABI EABIVersion; + llvm::EABI EABIVersion = llvm::EABI::Default; /// If given, the version string of the linker in use. std::string LinkerVersion; @@ -78,12 +78,33 @@ public: /// \brief If enabled, allow AMDGPU unsafe floating point atomics. bool AllowAMDGPUUnsafeFPAtomics = false; + /// \brief Code object version for AMDGPU. + llvm::CodeObjectVersionKind CodeObjectVersion = + llvm::CodeObjectVersionKind::COV_None; + + /// \brief Enumeration values for AMDGPU printf lowering scheme + enum class AMDGPUPrintfKind { + /// printf lowering scheme involving hostcalls, currently used by HIP + /// programs by default + Hostcall = 0, + + /// printf lowering scheme involving implicit printf buffers, + Buffered = 1, + }; + + /// \brief AMDGPU Printf lowering scheme + AMDGPUPrintfKind AMDGPUPrintfKindVal = AMDGPUPrintfKind::Hostcall; + // The code model to be used as specified by the user. Corresponds to // CodeModel::Model enum defined in include/llvm/Support/CodeGen.h, plus // "default" for the case when the user has not explicitly specified a // code model. std::string CodeModel; + // The large data threshold used for certain code models on certain + // architectures. + uint64_t LargeDataThreshold; + /// The version of the SDK which was used during the compilation. /// The option is used for two different purposes: /// * on darwin the version is propagated to LLVM where it's used @@ -91,8 +112,21 @@ public: /// * CUDA compilation uses it to control parts of CUDA compilation /// in clang that depend on specific version of the CUDA SDK. llvm::VersionTuple SDKVersion; + + /// The name of the darwin target- ariant triple to compile for. + std::string DarwinTargetVariantTriple; + + /// The version of the darwin target variant SDK which was used during the + /// compilation. + llvm::VersionTuple DarwinTargetVariantSDKVersion; + + /// The validator version for dxil. + std::string DxilValidatorVersion; + + /// The entry point name for HLSL shader being compiled as specified by -E. + std::string HLSLEntry; }; -} // end namespace clang +} // end namespace clang #endif diff --git a/contrib/llvm-project/clang/include/clang/Basic/Thunk.h b/contrib/llvm-project/clang/include/clang/Basic/Thunk.h index 91088be6ae73..0247e279408f 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Thunk.h +++ b/contrib/llvm-project/clang/include/clang/Basic/Thunk.h @@ -26,7 +26,7 @@ class CXXMethodDecl; struct ReturnAdjustment { /// The non-virtual adjustment from the derived object to its /// nearest virtual base. - int64_t NonVirtual; + int64_t NonVirtual = 0; /// Holds the ABI-specific information about the virtual return /// adjustment, if needed. @@ -64,7 +64,7 @@ struct ReturnAdjustment { } } Virtual; - ReturnAdjustment() : NonVirtual(0) {} + ReturnAdjustment() = default; bool isEmpty() const { return !NonVirtual && Virtual.isEmpty(); } @@ -91,7 +91,7 @@ struct ReturnAdjustment { struct ThisAdjustment { /// The non-virtual adjustment from the derived object to its /// nearest virtual base. - int64_t NonVirtual; + int64_t NonVirtual = 0; /// Holds the ABI-specific information about the virtual this /// adjustment, if needed. @@ -131,7 +131,7 @@ struct ThisAdjustment { } } Virtual; - ThisAdjustment() : NonVirtual(0) {} + ThisAdjustment() = default; bool isEmpty() const { return !NonVirtual && Virtual.isEmpty(); } diff --git a/contrib/llvm-project/clang/include/clang/Basic/TokenKinds.def b/contrib/llvm-project/clang/include/clang/Basic/TokenKinds.def index 48a664e3494e..c10e2adfbe6e 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/TokenKinds.def +++ b/contrib/llvm-project/clang/include/clang/Basic/TokenKinds.def @@ -9,8 +9,7 @@ // This file defines the TokenKind database. This includes normal tokens like // tok::ampamp (corresponding to the && token) as well as keywords for various // languages. Users of this file must optionally #define the TOK, KEYWORD, -// CXX11_KEYWORD, CONCEPTS_KEYWORD, ALIAS, or PPKEYWORD macros to make use of -// this file. +// CXX11_KEYWORD, ALIAS, or PPKEYWORD macros to make use of this file. // //===----------------------------------------------------------------------===// @@ -29,8 +28,11 @@ #ifndef CXX20_KEYWORD #define CXX20_KEYWORD(X,Y) KEYWORD(X,KEYCXX20|(Y)) #endif -#ifndef CONCEPTS_KEYWORD -#define CONCEPTS_KEYWORD(X) CXX20_KEYWORD(X,KEYCONCEPTS) +#ifndef C99_KEYWORD +#define C99_KEYWORD(X,Y) KEYWORD(X,KEYC99|(Y)) +#endif +#ifndef C23_KEYWORD +#define C23_KEYWORD(X,Y) KEYWORD(X,KEYC23|(Y)) #endif #ifndef COROUTINES_KEYWORD #define COROUTINES_KEYWORD(X) CXX20_KEYWORD(X,KEYCOROUTINES) @@ -83,6 +85,9 @@ #ifndef PRAGMA_ANNOTATION #define PRAGMA_ANNOTATION(X) ANNOTATION(X) #endif +#ifndef INTERESTING_IDENTIFIER +#define INTERESTING_IDENTIFIER(X) +#endif //===----------------------------------------------------------------------===// // Preprocessor keywords. @@ -254,13 +259,12 @@ PUNCTUATOR(caretcaret, "^^") // always be treated as a keyword // KEYC99 - This is a keyword introduced to C in C99 // KEYC11 - This is a keyword introduced to C in C11 +// KEYC23 - This is a keyword introduced to C in C23 // KEYCXX - This is a C++ keyword, or a C++-specific keyword in the // implementation namespace // KEYNOCXX - This is a keyword in every non-C++ dialect. // KEYCXX11 - This is a C++ keyword introduced to C++ in C++11 // KEYCXX20 - This is a C++ keyword introduced to C++ in C++20 -// KEYCONCEPTS - This is a keyword if the C++ extensions for concepts -// are enabled. // KEYMODULES - This is a keyword if the C++ extensions for modules // are enabled. // KEYGNU - This is a keyword if GNU extensions are enabled @@ -280,6 +284,8 @@ PUNCTUATOR(caretcaret, "^^") // HALFSUPPORT - This is a keyword if 'half' is a built-in type // WCHARSUPPORT - This is a keyword if 'wchar_t' is a built-in type // CHAR8SUPPORT - This is a keyword if 'char8_t' is a built-in type +// KEYFIXEDPOINT - This is a keyword according to the N1169 fixed point +// extension. // KEYWORD(auto , KEYALL) KEYWORD(break , KEYALL) @@ -297,16 +303,16 @@ KEYWORD(float , KEYALL) KEYWORD(for , KEYALL) KEYWORD(goto , KEYALL) KEYWORD(if , KEYALL) -KEYWORD(inline , KEYC99|KEYCXX|KEYGNU) KEYWORD(int , KEYALL) KEYWORD(_ExtInt , KEYALL) +KEYWORD(_BitInt , KEYALL) KEYWORD(long , KEYALL) KEYWORD(register , KEYALL) -KEYWORD(restrict , KEYC99) KEYWORD(return , KEYALL) KEYWORD(short , KEYALL) KEYWORD(signed , KEYALL) UNARY_EXPR_OR_TYPE_TRAIT(sizeof, SizeOf, KEYALL) +UNARY_EXPR_OR_TYPE_TRAIT(__datasizeof, DataSizeOf, KEYCXX) KEYWORD(static , KEYALL) KEYWORD(struct , KEYALL) KEYWORD(switch , KEYALL) @@ -333,7 +339,7 @@ KEYWORD(__objc_no , KEYALL) // C++ 2.11p1: Keywords. KEYWORD(asm , KEYCXX|KEYGNU) -KEYWORD(bool , BOOLSUPPORT) +KEYWORD(bool , BOOLSUPPORT|KEYC23) KEYWORD(catch , KEYCXX) KEYWORD(class , KEYCXX) KEYWORD(const_cast , KEYCXX) @@ -341,7 +347,7 @@ KEYWORD(delete , KEYCXX) KEYWORD(dynamic_cast , KEYCXX) KEYWORD(explicit , KEYCXX) KEYWORD(export , KEYCXX) -KEYWORD(false , BOOLSUPPORT) +KEYWORD(false , BOOLSUPPORT|KEYC23) KEYWORD(friend , KEYCXX) KEYWORD(mutable , KEYCXX) KEYWORD(namespace , KEYCXX) @@ -355,7 +361,7 @@ KEYWORD(static_cast , KEYCXX) KEYWORD(template , KEYCXX) KEYWORD(this , KEYCXX) KEYWORD(throw , KEYCXX) -KEYWORD(true , BOOLSUPPORT) +KEYWORD(true , BOOLSUPPORT|KEYC23) KEYWORD(try , KEYCXX) KEYWORD(typename , KEYCXX) KEYWORD(typeid , KEYCXX) @@ -376,45 +382,53 @@ CXX_KEYWORD_OPERATOR(or_eq , pipeequal) CXX_KEYWORD_OPERATOR(xor , caret) CXX_KEYWORD_OPERATOR(xor_eq , caretequal) +// C99 Keywords. +C99_KEYWORD(restrict , 0) +C99_KEYWORD(inline , KEYCXX|KEYGNU) + + // C++11 keywords -CXX11_KEYWORD(alignas , 0) +CXX11_KEYWORD(alignas , KEYC23) // alignof and _Alignof return the required ABI alignment -CXX11_UNARY_EXPR_OR_TYPE_TRAIT(alignof, AlignOf, 0) +CXX11_UNARY_EXPR_OR_TYPE_TRAIT(alignof, AlignOf, KEYC23) CXX11_KEYWORD(char16_t , KEYNOMS18) CXX11_KEYWORD(char32_t , KEYNOMS18) CXX11_KEYWORD(constexpr , 0) CXX11_KEYWORD(decltype , 0) CXX11_KEYWORD(noexcept , 0) -CXX11_KEYWORD(nullptr , 0) -CXX11_KEYWORD(static_assert , KEYMSCOMPAT) -CXX11_KEYWORD(thread_local , 0) +CXX11_KEYWORD(nullptr , KEYC23) +CXX11_KEYWORD(static_assert , KEYMSCOMPAT|KEYC23) +CXX11_KEYWORD(thread_local , KEYC23) -// C++20 keywords -CONCEPTS_KEYWORD(concept) -CONCEPTS_KEYWORD(requires) - -// C++20 / coroutines TS keywords +// C++20 / coroutines keywords COROUTINES_KEYWORD(co_await) COROUTINES_KEYWORD(co_return) COROUTINES_KEYWORD(co_yield) -// C++ modules TS keywords +// C++20 keywords MODULES_KEYWORD(module) MODULES_KEYWORD(import) // C++20 keywords. CXX20_KEYWORD(consteval , 0) CXX20_KEYWORD(constinit , 0) +CXX20_KEYWORD(concept , 0) +CXX20_KEYWORD(requires , 0) + // Not a CXX20_KEYWORD because it is disabled by -fno-char8_t. KEYWORD(char8_t , CHAR8SUPPORT) // C11 Extension KEYWORD(_Float16 , KEYALL) +// C23 keywords +C23_KEYWORD(typeof , KEYGNU) +C23_KEYWORD(typeof_unqual , 0) + // ISO/IEC JTC1 SC22 WG14 N1169 Extension -KEYWORD(_Accum , KEYNOCXX) -KEYWORD(_Fract , KEYNOCXX) -KEYWORD(_Sat , KEYNOCXX) +KEYWORD(_Accum , KEYFIXEDPOINT) +KEYWORD(_Fract , KEYFIXEDPOINT) +KEYWORD(_Sat , KEYFIXEDPOINT) // GNU Extensions (in impl-reserved namespace) KEYWORD(_Decimal32 , KEYALL) @@ -428,9 +442,12 @@ KEYWORD(__attribute , KEYALL) KEYWORD(__builtin_choose_expr , KEYALL) KEYWORD(__builtin_offsetof , KEYALL) KEYWORD(__builtin_FILE , KEYALL) +KEYWORD(__builtin_FILE_NAME , KEYALL) KEYWORD(__builtin_FUNCTION , KEYALL) +KEYWORD(__builtin_FUNCSIG , KEYMS) KEYWORD(__builtin_LINE , KEYALL) KEYWORD(__builtin_COLUMN , KEYALL) +KEYWORD(__builtin_source_location , KEYCXX) // __builtin_types_compatible_p is a GNU C extension that we handle like a C++ // type trait. @@ -438,6 +455,7 @@ TYPE_TRAIT_2(__builtin_types_compatible_p, TypeCompatible, KEYNOCXX) KEYWORD(__builtin_va_arg , KEYALL) KEYWORD(__extension__ , KEYALL) KEYWORD(__float128 , KEYALL) +KEYWORD(__ibm128 , KEYALL) KEYWORD(__imag , KEYALL) KEYWORD(__int128 , KEYALL) KEYWORD(__label__ , KEYALL) @@ -447,9 +465,6 @@ KEYWORD(__FUNCTION__ , KEYALL) KEYWORD(__PRETTY_FUNCTION__ , KEYALL) KEYWORD(__auto_type , KEYALL) -// GNU Extensions (outside impl-reserved namespace) -KEYWORD(typeof , KEYGNU) - // MS Extensions KEYWORD(__FUNCDNAME__ , KEYMS) KEYWORD(__FUNCSIG__ , KEYMS) @@ -459,9 +474,9 @@ TYPE_TRAIT_1(__is_interface_class, IsInterfaceClass, KEYMS) TYPE_TRAIT_1(__is_sealed, IsSealed, KEYMS) // MSVC12.0 / VS2013 Type Traits -TYPE_TRAIT_1(__is_destructible, IsDestructible, KEYMS) +TYPE_TRAIT_1(__is_destructible, IsDestructible, KEYALL) TYPE_TRAIT_1(__is_trivially_destructible, IsTriviallyDestructible, KEYCXX) -TYPE_TRAIT_1(__is_nothrow_destructible, IsNothrowDestructible, KEYMS) +TYPE_TRAIT_1(__is_nothrow_destructible, IsNothrowDestructible, KEYALL) TYPE_TRAIT_2(__is_nothrow_assignable, IsNothrowAssignable, KEYCXX) TYPE_TRAIT_N(__is_constructible, IsConstructible, KEYCXX) TYPE_TRAIT_N(__is_nothrow_constructible, IsNothrowConstructible, KEYCXX) @@ -505,10 +520,21 @@ TYPE_TRAIT_1(__is_trivially_copyable, IsTriviallyCopyable, KEYCXX) TYPE_TRAIT_1(__is_union, IsUnion, KEYCXX) TYPE_TRAIT_1(__has_unique_object_representations, HasUniqueObjectRepresentations, KEYCXX) -KEYWORD(__underlying_type , KEYCXX) + +#define TRANSFORM_TYPE_TRAIT_DEF(_, Trait) KEYWORD(__##Trait, KEYCXX) +#include "clang/Basic/TransformTypeTraits.def" // Clang-only C++ Type Traits +TYPE_TRAIT_1(__is_trivially_relocatable, IsTriviallyRelocatable, KEYCXX) +TYPE_TRAIT_1(__is_trivially_equality_comparable, IsTriviallyEqualityComparable, KEYCXX) +TYPE_TRAIT_1(__is_bounded_array, IsBoundedArray, KEYCXX) +TYPE_TRAIT_1(__is_unbounded_array, IsUnboundedArray, KEYCXX) +TYPE_TRAIT_1(__is_nullptr, IsNullPointer, KEYCXX) +TYPE_TRAIT_1(__is_scoped_enum, IsScopedEnum, KEYCXX) +TYPE_TRAIT_1(__is_referenceable, IsReferenceable, KEYCXX) +TYPE_TRAIT_1(__can_pass_in_regs, CanPassInRegs, KEYCXX) TYPE_TRAIT_2(__reference_binds_to_temporary, ReferenceBindsToTemporary, KEYCXX) +TYPE_TRAIT_2(__reference_constructs_from_temporary, ReferenceConstructsFromTemporary, KEYCXX) // Embarcadero Expression Traits EXPRESSION_TRAIT(__is_lvalue_expr, IsLValueExpr, KEYCXX) @@ -595,6 +621,17 @@ KEYWORD(pipe , KEYOPENCLC | KEYOPENCLCXX) // C++ for OpenCL s2.3.1: addrspace_cast operator KEYWORD(addrspace_cast , KEYOPENCLCXX) +// CUDA/HIP function attributes +KEYWORD(__noinline__ , KEYCUDA) + +// HLSL keywords. +KEYWORD(cbuffer , KEYHLSL) +KEYWORD(tbuffer , KEYHLSL) +KEYWORD(groupshared , KEYHLSL) +KEYWORD(in , KEYHLSL) +KEYWORD(inout , KEYHLSL) +KEYWORD(out , KEYHLSL) + // OpenMP Type Traits UNARY_EXPR_OR_TYPE_TRAIT(__builtin_omp_required_simd_align, OpenMPRequiredSimdAlign, KEYALL) @@ -655,6 +692,9 @@ KEYWORD(_Nullable , KEYALL) KEYWORD(_Nullable_result , KEYALL) KEYWORD(_Null_unspecified , KEYALL) +// WebAssembly Type Extension +KEYWORD(__funcref , KEYALL) + // Microsoft extensions which should be disabled in strict conformance mode KEYWORD(__ptr64 , KEYMS) KEYWORD(__ptr32 , KEYMS) @@ -673,36 +713,59 @@ KEYWORD(__multiple_inheritance , KEYMS) KEYWORD(__virtual_inheritance , KEYMS) KEYWORD(__interface , KEYMS) ALIAS("__int8" , char , KEYMS) -ALIAS("_int8" , char , KEYMS) ALIAS("__int16" , short , KEYMS) -ALIAS("_int16" , short , KEYMS) ALIAS("__int32" , int , KEYMS) -ALIAS("_int32" , int , KEYMS) -ALIAS("_int64" , __int64 , KEYMS) ALIAS("__wchar_t" , wchar_t , KEYMS) -ALIAS("_asm" , asm , KEYMS) -ALIAS("_alignof" , __alignof , KEYMS) ALIAS("__builtin_alignof", __alignof , KEYMS) -ALIAS("_cdecl" , __cdecl , KEYMS | KEYBORLAND) -ALIAS("_fastcall" , __fastcall , KEYMS | KEYBORLAND) -ALIAS("_stdcall" , __stdcall , KEYMS | KEYBORLAND) -ALIAS("_thiscall" , __thiscall , KEYMS) -ALIAS("_vectorcall" , __vectorcall, KEYMS) -ALIAS("_uuidof" , __uuidof , KEYMS | KEYBORLAND) -ALIAS("_inline" , inline , KEYMS) -ALIAS("_declspec" , __declspec , KEYMS) + +// Microsoft single-underscore prefixed aliases for double-underscore prefixed +// keywords. +ALIAS("_asm" , asm , KEYMS) +ALIAS("_alignof" , __alignof , KEYMS) +ALIAS("_cdecl" , __cdecl , KEYMS | KEYBORLAND) +ALIAS("_declspec" , __declspec , KEYMS) +ALIAS("_fastcall" , __fastcall , KEYMS | KEYBORLAND) +ALIAS("_finally" , __finally , KEYMSCOMPAT) +ALIAS("_forceinline" , __forceinline, KEYMSCOMPAT) +ALIAS("_inline" , inline , KEYMS) +ALIAS("_int8" , char , KEYMS) +ALIAS("_int16" , short , KEYMS) +ALIAS("_int32" , int , KEYMS) +ALIAS("_int64" , __int64 , KEYMS) +ALIAS("_leave" , __leave , KEYMSCOMPAT) +ALIAS("_multiple_inheritance", __multiple_inheritance, KEYMSCOMPAT) +ALIAS("_ptr32" , __ptr32 , KEYMSCOMPAT) +ALIAS("_ptr64" , __ptr64 , KEYMSCOMPAT) +ALIAS("_restrict" , restrict , KEYMSCOMPAT) +ALIAS("_stdcall" , __stdcall , KEYMS | KEYBORLAND) +ALIAS("_thiscall" , __thiscall , KEYMS) +ALIAS("_try" , __try , KEYMSCOMPAT) +ALIAS("_vectorcall" , __vectorcall , KEYMS) +ALIAS("_unaligned" , __unaligned , KEYMSCOMPAT) +ALIAS("_uptr" , __uptr , KEYMSCOMPAT) +ALIAS("_uuidof" , __uuidof , KEYMS | KEYBORLAND) +ALIAS("_virtual_inheritance", __virtual_inheritance, KEYMSCOMPAT) +ALIAS("_w64" , __w64 , KEYMSCOMPAT) // Borland Extensions which should be disabled in strict conformance mode. ALIAS("_pascal" , __pascal , KEYBORLAND) // Clang Extensions. KEYWORD(__builtin_convertvector , KEYALL) +UNARY_EXPR_OR_TYPE_TRAIT(__builtin_vectorelements, VectorElements, KEYALL) ALIAS("__char16_t" , char16_t , KEYCXX) ALIAS("__char32_t" , char32_t , KEYCXX) KEYWORD(__builtin_bit_cast , KEYALL) KEYWORD(__builtin_available , KEYALL) KEYWORD(__builtin_sycl_unique_stable_name, KEYSYCL) +// Keywords defined by Attr.td. +// The "EMPTY ## X" is used to prevent early macro-expansion of the keyword. +#ifndef KEYWORD_ATTRIBUTE +#define KEYWORD_ATTRIBUTE(X, HASARG, EMPTY) KEYWORD(EMPTY ## X, KEYALL) +#endif +#include "clang/Basic/RegularKeywordAttrInfo.inc" + // Clang-specific keywords enabled only in testing. TESTING_KEYWORD(__unknown_anytype , KEYALL) @@ -743,6 +806,17 @@ OBJC_AT_KEYWORD(dynamic) OBJC_AT_KEYWORD(import) OBJC_AT_KEYWORD(available) +//===----------------------------------------------------------------------===// +// Interesting identifiers. +//===----------------------------------------------------------------------===// +INTERESTING_IDENTIFIER(not_interesting) +INTERESTING_IDENTIFIER(FILE) +INTERESTING_IDENTIFIER(jmp_buf) +INTERESTING_IDENTIFIER(sigjmp_buf) +INTERESTING_IDENTIFIER(ucontext_t) +INTERESTING_IDENTIFIER(float_t) +INTERESTING_IDENTIFIER(double_t) + // TODO: What to do about context-sensitive keywords like: // bycopy/byref/in/inout/oneway/out? @@ -827,16 +901,22 @@ PRAGMA_ANNOTATION(pragma_redefine_extname) // handles them. PRAGMA_ANNOTATION(pragma_fp_contract) -// Annotation for #pragma STDC FENV_ACCESS +// Annotations for #pragma STDC FENV_ACCESS and #pragma fenv_access (MS compat) // The lexer produces these so that they only take effect when the parser // handles them. PRAGMA_ANNOTATION(pragma_fenv_access) +PRAGMA_ANNOTATION(pragma_fenv_access_ms) // Annotation for #pragma STDC FENV_ROUND // The lexer produces these so that they only take effect when the parser // handles them. PRAGMA_ANNOTATION(pragma_fenv_round) +// Annotation for #pragma STDC CX_LIMITED_RANGE +// The lexer produces these so that they only take effect when the parser +// handles them. +PRAGMA_ANNOTATION(pragma_cx_limited_range) + // Annotation for #pragma float_control // The lexer produces these so that they only take effect when the parser // handles them. @@ -875,6 +955,12 @@ ANNOTATION(attr_openmp) PRAGMA_ANNOTATION(pragma_openmp) PRAGMA_ANNOTATION(pragma_openmp_end) +// Annotations for OpenACC pragma directives - #pragma acc. +// Like with OpenMP, these are produced by the lexer when it parses a +// #pragma acc directive so it can be handled during parsing of the directives. +PRAGMA_ANNOTATION(pragma_openacc) +PRAGMA_ANNOTATION(pragma_openacc_end) + // Annotations for loop pragma directives #pragma clang loop ... // The lexer produces these so that they only take effect when the parser // handles #pragma loop ... directives. @@ -885,6 +971,9 @@ PRAGMA_ANNOTATION(pragma_fp) // Annotation for the attribute pragma directives - #pragma clang attribute ... PRAGMA_ANNOTATION(pragma_attribute) +// Annotation for the riscv pragma directives - #pragma clang riscv intrinsic ... +PRAGMA_ANNOTATION(pragma_riscv) + // Annotations for module import translated from #include etc. ANNOTATION(module_include) ANNOTATION(module_begin) @@ -894,6 +983,9 @@ ANNOTATION(module_end) // into the name of a header unit. ANNOTATION(header_unit) +// Annotation for end of input in clang-repl. +ANNOTATION(repl_input_end) + #undef PRAGMA_ANNOTATION #undef ANNOTATION #undef TESTING_KEYWORD @@ -909,9 +1001,11 @@ ANNOTATION(header_unit) #undef TYPE_TRAIT_2 #undef TYPE_TRAIT_1 #undef TYPE_TRAIT -#undef CONCEPTS_KEYWORD #undef CXX20_KEYWORD #undef CXX11_KEYWORD #undef KEYWORD #undef PUNCTUATOR #undef TOK +#undef C99_KEYWORD +#undef C23_KEYWORD +#undef INTERESTING_IDENTIFIER diff --git a/contrib/llvm-project/clang/include/clang/Basic/TokenKinds.h b/contrib/llvm-project/clang/include/clang/Basic/TokenKinds.h index 4e66aa1c8c2d..7529b922619a 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/TokenKinds.h +++ b/contrib/llvm-project/clang/include/clang/Basic/TokenKinds.h @@ -44,6 +44,14 @@ enum ObjCKeywordKind { NUM_OBJC_KEYWORDS }; +/// Provides a namespace for interesting identifers such as float_t and +/// double_t. +enum InterestingIdentifierKind { +#define INTERESTING_IDENTIFIER(X) X, +#include "clang/Basic/TokenKinds.def" + NUM_INTERESTING_IDENTIFIERS +}; + /// Defines the possible values of an on-off-switch (C99 6.10.6p2). enum OnOffSwitch { OOS_ON, OOS_OFF, OOS_DEFAULT @@ -68,6 +76,9 @@ const char *getPunctuatorSpelling(TokenKind Kind) LLVM_READNONE; /// tokens like 'int' and 'dynamic_cast'. Returns NULL for other token kinds. const char *getKeywordSpelling(TokenKind Kind) LLVM_READNONE; +/// Returns the spelling of preprocessor keywords, such as "else". +const char *getPPKeywordSpelling(PPKeywordKind Kind) LLVM_READNONE; + /// Return true if this is a raw identifier or an identifier kind. inline bool isAnyIdentifier(TokenKind K) { return (K == tok::identifier) || (K == tok::raw_identifier); @@ -96,6 +107,13 @@ bool isAnnotation(TokenKind K); /// Return true if this is an annotation token representing a pragma. bool isPragmaAnnotation(TokenKind K); +inline constexpr bool isRegularKeywordAttribute(TokenKind K) { + return (false +#define KEYWORD_ATTRIBUTE(X, ...) || (K == tok::kw_##X) +#include "clang/Basic/RegularKeywordAttrInfo.inc" + ); +} + } // end namespace tok } // end namespace clang diff --git a/contrib/llvm-project/clang/include/clang/Basic/TransformTypeTraits.def b/contrib/llvm-project/clang/include/clang/Basic/TransformTypeTraits.def new file mode 100644 index 000000000000..e27a2719a968 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/TransformTypeTraits.def @@ -0,0 +1,29 @@ +//==--- TransformTypeTraits.def - type trait transformations --------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines transform type traits' names. +// +//===----------------------------------------------------------------------===// + +TRANSFORM_TYPE_TRAIT_DEF(AddLvalueReference, add_lvalue_reference) +TRANSFORM_TYPE_TRAIT_DEF(AddPointer, add_pointer) +TRANSFORM_TYPE_TRAIT_DEF(AddRvalueReference, add_rvalue_reference) +TRANSFORM_TYPE_TRAIT_DEF(Decay, decay) +TRANSFORM_TYPE_TRAIT_DEF(MakeSigned, make_signed) +TRANSFORM_TYPE_TRAIT_DEF(MakeUnsigned, make_unsigned) +TRANSFORM_TYPE_TRAIT_DEF(RemoveAllExtents, remove_all_extents) +TRANSFORM_TYPE_TRAIT_DEF(RemoveConst, remove_const) +TRANSFORM_TYPE_TRAIT_DEF(RemoveCV, remove_cv) +TRANSFORM_TYPE_TRAIT_DEF(RemoveCVRef, remove_cvref) +TRANSFORM_TYPE_TRAIT_DEF(RemoveExtent, remove_extent) +TRANSFORM_TYPE_TRAIT_DEF(RemovePointer, remove_pointer) +TRANSFORM_TYPE_TRAIT_DEF(RemoveReference, remove_reference_t) +TRANSFORM_TYPE_TRAIT_DEF(RemoveRestrict, remove_restrict) +TRANSFORM_TYPE_TRAIT_DEF(RemoveVolatile, remove_volatile) +TRANSFORM_TYPE_TRAIT_DEF(EnumUnderlyingType, underlying_type) +#undef TRANSFORM_TYPE_TRAIT_DEF diff --git a/contrib/llvm-project/clang/include/clang/Basic/TypeNodes.td b/contrib/llvm-project/clang/include/clang/Basic/TypeNodes.td index 011394c3ef45..649b071cebb9 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/TypeNodes.td +++ b/contrib/llvm-project/clang/include/clang/Basic/TypeNodes.td @@ -3,7 +3,7 @@ include "clang/Basic/ASTNode.td" class TypeNode<TypeNode base, bit abstract = 0> : ASTNode { TypeNode Base = base; bit Abstract = abstract; -} +} /// A type node that is only used to represent dependent types in C++. For /// example, DependentTemplateSpecializationType is used to represent types @@ -75,6 +75,7 @@ def DependentSizedMatrixType : TypeNode<MatrixType>, AlwaysDependent; def FunctionType : TypeNode<Type, 1>; def FunctionProtoType : TypeNode<FunctionType>; def FunctionNoProtoType : TypeNode<FunctionType>; +def UsingType : TypeNode<Type>, NeverCanonical; def UnresolvedUsingType : TypeNode<Type>, AlwaysDependent; def ParenType : TypeNode<Type>, NeverCanonical; def TypedefType : TypeNode<Type>, NeverCanonical; @@ -90,6 +91,7 @@ def RecordType : TypeNode<TagType>, LeafType; def EnumType : TypeNode<TagType>, LeafType; def ElaboratedType : TypeNode<Type>, NeverCanonical; def AttributedType : TypeNode<Type>, NeverCanonical; +def BTFTagAttributedType : TypeNode<Type>, NeverCanonical; def TemplateTypeParmType : TypeNode<Type>, AlwaysDependent, LeafType; def SubstTemplateTypeParmType : TypeNode<Type>, NeverCanonical; def SubstTemplateTypeParmPackType : TypeNode<Type>, AlwaysDependent; @@ -107,5 +109,5 @@ def ObjCInterfaceType : TypeNode<ObjCObjectType>, LeafType; def ObjCObjectPointerType : TypeNode<Type>; def PipeType : TypeNode<Type>; def AtomicType : TypeNode<Type>; -def ExtIntType : TypeNode<Type>; -def DependentExtIntType : TypeNode<Type>, AlwaysDependent; +def BitIntType : TypeNode<Type>; +def DependentBitIntType : TypeNode<Type>, AlwaysDependent; diff --git a/contrib/llvm-project/clang/include/clang/Basic/TypeTraits.h b/contrib/llvm-project/clang/include/clang/Basic/TypeTraits.h index a0f06bec6697..eb8b1923152d 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/TypeTraits.h +++ b/contrib/llvm-project/clang/include/clang/Basic/TypeTraits.h @@ -67,6 +67,10 @@ const char *getTraitName(UnaryExprOrTypeTrait T) LLVM_READONLY; const char *getTraitSpelling(TypeTrait T) LLVM_READONLY; const char *getTraitSpelling(ArrayTypeTrait T) LLVM_READONLY; const char *getTraitSpelling(UnaryExprOrTypeTrait T) LLVM_READONLY; + +/// Return the arity of the type trait \p T. +unsigned getTypeTraitArity(TypeTrait T) LLVM_READONLY; + } // namespace clang #endif diff --git a/contrib/llvm-project/clang/include/clang/Basic/Version.h b/contrib/llvm-project/clang/include/clang/Basic/Version.h index 2881d8db954e..8e4e6928fded 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Version.h +++ b/contrib/llvm-project/clang/include/clang/Basic/Version.h @@ -40,6 +40,9 @@ namespace clang { /// string as getClangRevision. std::string getLLVMRevision(); + /// Retrieves the Clang vendor tag. + std::string getClangVendor(); + /// Retrieves the full repository version that is an amalgamation of /// the information in getClangRepositoryPath() and getClangRevision(). std::string getClangFullRepositoryVersion(); diff --git a/contrib/llvm-project/clang/include/clang/Basic/Visibility.h b/contrib/llvm-project/clang/include/clang/Basic/Visibility.h index 57d9754ae4a9..1e196300be42 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/Visibility.h +++ b/contrib/llvm-project/clang/include/clang/Basic/Visibility.h @@ -15,6 +15,7 @@ #define LLVM_CLANG_BASIC_VISIBILITY_H #include "clang/Basic/Linkage.h" +#include "llvm/ADT/STLForwardCompat.h" #include <cassert> #include <cstdint> @@ -56,10 +57,11 @@ class LinkageInfo { void setVisibility(Visibility V, bool E) { visibility_ = V; explicit_ = E; } public: - LinkageInfo() : linkage_(ExternalLinkage), visibility_(DefaultVisibility), - explicit_(false) {} + LinkageInfo() + : linkage_(llvm::to_underlying(Linkage::External)), + visibility_(DefaultVisibility), explicit_(false) {} LinkageInfo(Linkage L, Visibility V, bool E) - : linkage_(L), visibility_(V), explicit_(E) { + : linkage_(llvm::to_underlying(L)), visibility_(V), explicit_(E) { assert(getLinkage() == L && getVisibility() == V && isVisibilityExplicit() == E && "Enum truncated!"); } @@ -68,23 +70,23 @@ public: return LinkageInfo(); } static LinkageInfo internal() { - return LinkageInfo(InternalLinkage, DefaultVisibility, false); + return LinkageInfo(Linkage::Internal, DefaultVisibility, false); } static LinkageInfo uniqueExternal() { - return LinkageInfo(UniqueExternalLinkage, DefaultVisibility, false); + return LinkageInfo(Linkage::UniqueExternal, DefaultVisibility, false); } static LinkageInfo none() { - return LinkageInfo(NoLinkage, DefaultVisibility, false); + return LinkageInfo(Linkage::None, DefaultVisibility, false); } static LinkageInfo visible_none() { - return LinkageInfo(VisibleNoLinkage, DefaultVisibility, false); + return LinkageInfo(Linkage::VisibleNone, DefaultVisibility, false); } - Linkage getLinkage() const { return (Linkage)linkage_; } + Linkage getLinkage() const { return static_cast<Linkage>(linkage_); } Visibility getVisibility() const { return (Visibility)visibility_; } bool isVisibilityExplicit() const { return explicit_; } - void setLinkage(Linkage L) { linkage_ = L; } + void setLinkage(Linkage L) { linkage_ = llvm::to_underlying(L); } void mergeLinkage(Linkage L) { setLinkage(minLinkage(getLinkage(), L)); @@ -96,10 +98,10 @@ public: void mergeExternalVisibility(Linkage L) { Linkage ThisL = getLinkage(); if (!isExternallyVisible(L)) { - if (ThisL == VisibleNoLinkage) - ThisL = NoLinkage; - else if (ThisL == ExternalLinkage) - ThisL = UniqueExternalLinkage; + if (ThisL == Linkage::VisibleNone) + ThisL = Linkage::None; + else if (ThisL == Linkage::External) + ThisL = Linkage::UniqueExternal; } setLinkage(ThisL); } diff --git a/contrib/llvm-project/clang/include/clang/Basic/WebAssemblyReferenceTypes.def b/contrib/llvm-project/clang/include/clang/Basic/WebAssemblyReferenceTypes.def new file mode 100644 index 000000000000..7c83da15150c --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/WebAssemblyReferenceTypes.def @@ -0,0 +1,40 @@ +//===-- WebAssemblyReferenceTypes.def - Wasm reference types ----*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines externref_t. The macros are: +// +// WASM_TYPE(Name, Id, SingletonId) +// WASM_REF_TYPE(Name, MangledName, Id, SingletonId, AS) +// +// where: +// +// - Name is the name of the builtin type. +// +// - MangledNameBase is the base used for name mangling. +// +// - BuiltinType::Id is the enumerator defining the type. +// +// - Context.SingletonId is the global singleton of this type. +// +// - AS indicates the address space for values of this type. +// +// To include this file, define either WASM_REF_TYPE or WASM_TYPE, depending on +// how much information you want. The macros will be undefined after inclusion. +// +//===----------------------------------------------------------------------===// + + +#ifndef WASM_REF_TYPE +#define WASM_REF_TYPE(Name, MangledNameBase, Id, SingletonId, AS) \ + WASM_TYPE(Name, Id, SingletonId) +#endif + +WASM_REF_TYPE("__externref_t", "externref_t", WasmExternRef, WasmExternRefTy, 10) + +#undef WASM_TYPE +#undef WASM_REF_TYPE diff --git a/contrib/llvm-project/clang/include/clang/Basic/X86Target.def b/contrib/llvm-project/clang/include/clang/Basic/X86Target.def deleted file mode 100644 index 70f3879f33a1..000000000000 --- a/contrib/llvm-project/clang/include/clang/Basic/X86Target.def +++ /dev/null @@ -1,110 +0,0 @@ -//===--- X86Target.def - X86 Feature/Processor Database ---------*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This file defines the X86-specific Features and Processors, as used by -// the X86 Targets. -// -//===----------------------------------------------------------------------===// - -#ifndef FEATURE -#define FEATURE(ENUM) -#endif - -#ifndef CPU_SPECIFIC -#define CPU_SPECIFIC(NAME, MANGLING, FEATURES) -#endif - -#ifndef CPU_SPECIFIC_ALIAS -#define CPU_SPECIFIC_ALIAS(NEW_NAME, NAME) -#endif - -// List of CPU Supports features in order. These need to remain in the order -// required by attribute 'target' checking. Note that not all are supported/ -// prioritized by GCC, so synchronization with GCC's implementation may require -// changing some existing values. -FEATURE(FEATURE_CMOV) -FEATURE(FEATURE_MMX) -FEATURE(FEATURE_SSE) -FEATURE(FEATURE_SSE2) -FEATURE(FEATURE_SSE3) -FEATURE(FEATURE_SSSE3) -FEATURE(FEATURE_SSE4_A) -FEATURE(FEATURE_SSE4_1) -FEATURE(FEATURE_SSE4_2) -FEATURE(FEATURE_POPCNT) -FEATURE(FEATURE_AES) -FEATURE(FEATURE_PCLMUL) -FEATURE(FEATURE_AVX) -FEATURE(FEATURE_BMI) -FEATURE(FEATURE_FMA4) -FEATURE(FEATURE_XOP) -FEATURE(FEATURE_FMA) -FEATURE(FEATURE_BMI2) -FEATURE(FEATURE_AVX2) -FEATURE(FEATURE_AVX512F) -FEATURE(FEATURE_AVX512VL) -FEATURE(FEATURE_AVX512BW) -FEATURE(FEATURE_AVX512DQ) -FEATURE(FEATURE_AVX512CD) -FEATURE(FEATURE_AVX512ER) -FEATURE(FEATURE_AVX512PF) -FEATURE(FEATURE_AVX512VBMI) -FEATURE(FEATURE_AVX512IFMA) -FEATURE(FEATURE_AVX5124VNNIW) -FEATURE(FEATURE_AVX5124FMAPS) -FEATURE(FEATURE_AVX512VPOPCNTDQ) -FEATURE(FEATURE_AVX512VBMI2) -FEATURE(FEATURE_GFNI) -FEATURE(FEATURE_VPCLMULQDQ) -FEATURE(FEATURE_AVX512VNNI) -FEATURE(FEATURE_AVX512BITALG) -FEATURE(FEATURE_AVX512BF16) -FEATURE(FEATURE_AVX512VP2INTERSECT) - - -// FIXME: When commented out features are supported in LLVM, enable them here. -CPU_SPECIFIC("generic", 'A', "") -CPU_SPECIFIC("pentium", 'B', "") -CPU_SPECIFIC("pentium_pro", 'C', "+cmov") -CPU_SPECIFIC("pentium_mmx", 'D', "+mmx") -CPU_SPECIFIC("pentium_ii", 'E', "+cmov,+mmx") -CPU_SPECIFIC("pentium_iii", 'H', "+cmov,+mmx,+sse") -CPU_SPECIFIC_ALIAS("pentium_iii_no_xmm_regs", "pentium_iii") -CPU_SPECIFIC("pentium_4", 'J', "+cmov,+mmx,+sse,+sse2") -CPU_SPECIFIC("pentium_m", 'K', "+cmov,+mmx,+sse,+sse2") -CPU_SPECIFIC("pentium_4_sse3", 'L', "+cmov,+mmx,+sse,+sse2,+sse3") -CPU_SPECIFIC("core_2_duo_ssse3", 'M', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3") -CPU_SPECIFIC("core_2_duo_sse4_1", 'N', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1") -CPU_SPECIFIC("atom", 'O', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+movbe") -CPU_SPECIFIC("atom_sse4_2", 'c', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt") -CPU_SPECIFIC("core_i7_sse4_2", 'P', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt") -CPU_SPECIFIC("core_aes_pclmulqdq", 'Q', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt") -CPU_SPECIFIC("atom_sse4_2_movbe", 'd', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt") -CPU_SPECIFIC("goldmont", 'i', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt") -CPU_SPECIFIC("sandybridge", 'R', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt,+avx") -CPU_SPECIFIC_ALIAS("core_2nd_gen_avx", "sandybridge") -CPU_SPECIFIC("ivybridge", 'S', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt,+f16c,+avx") -CPU_SPECIFIC_ALIAS("core_3rd_gen_avx", "ivybridge") -CPU_SPECIFIC("haswell", 'V', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2") -CPU_SPECIFIC_ALIAS("core_4th_gen_avx", "haswell") -CPU_SPECIFIC("core_4th_gen_avx_tsx", 'W', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2") -CPU_SPECIFIC("broadwell", 'X', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx") -CPU_SPECIFIC_ALIAS("core_5th_gen_avx", "broadwell") -CPU_SPECIFIC("core_5th_gen_avx_tsx", 'Y', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx") -CPU_SPECIFIC("knl", 'Z', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512f,+adx,+avx512er,+avx512pf,+avx512cd") -CPU_SPECIFIC_ALIAS("mic_avx512", "knl") -CPU_SPECIFIC("skylake", 'b', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx,+mpx") -CPU_SPECIFIC( "skylake_avx512", 'a', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512dq,+avx512f,+adx,+avx512cd,+avx512bw,+avx512vl,+clwb") -CPU_SPECIFIC("cannonlake", 'e', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512dq,+avx512f,+adx,+avx512ifma,+avx512cd,+avx512bw,+avx512vl,+avx512vbmi") -CPU_SPECIFIC("knm", 'j', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512f,+adx,+avx512er,+avx512pf,+avx512cd,+avx5124fmaps,+avx5124vnniw,+avx512vpopcntdq") - -#undef CPU_SPECIFIC_ALIAS -#undef CPU_SPECIFIC -#undef PROC_64_BIT -#undef PROC_32_BIT -#undef FEATURE diff --git a/contrib/llvm-project/clang/include/clang/Basic/arm_bf16.td b/contrib/llvm-project/clang/include/clang/Basic/arm_bf16.td index d837a7666d40..f70c7221f8d6 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/arm_bf16.td +++ b/contrib/llvm-project/clang/include/clang/Basic/arm_bf16.td @@ -1,4 +1,4 @@ -//===--- arm_fp16.td - ARM BF16 compiler interface ------------------------===// +//===--- arm_bf16.td - ARM BF16 compiler interface ------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. diff --git a/contrib/llvm-project/clang/include/clang/Basic/arm_fp16.td b/contrib/llvm-project/clang/include/clang/Basic/arm_fp16.td index 79cd16233c10..cb2a09303e8e 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/arm_fp16.td +++ b/contrib/llvm-project/clang/include/clang/Basic/arm_fp16.td @@ -14,7 +14,7 @@ include "arm_neon_incl.td" // ARMv8.2-A FP16 intrinsics. -let ArchGuard = "defined(__ARM_FEATURE_FP16_SCALAR_ARITHMETIC) && defined(__aarch64__)" in { +let ArchGuard = "defined(__aarch64__)", TargetGuard = "fullfp16" in { // Negate def VNEGSH : SInst<"vneg", "11", "Sh">; diff --git a/contrib/llvm-project/clang/include/clang/Basic/arm_neon.td b/contrib/llvm-project/clang/include/clang/Basic/arm_neon.td index 173003d171ee..9cb7e0981384 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/arm_neon.td +++ b/contrib/llvm-project/clang/include/clang/Basic/arm_neon.td @@ -80,10 +80,8 @@ def OP_QDMULH_N : Op<(call "vqdmulh", $p0, (dup $p1))>; def OP_QDMULH_LN : Op<(call "vqdmulh", $p0, (call_mangled "splat_lane", $p1, $p2))>; def OP_QRDMULH_LN : Op<(call "vqrdmulh", $p0, (call_mangled "splat_lane", $p1, $p2))>; def OP_QRDMULH_N : Op<(call "vqrdmulh", $p0, (dup $p1))>; -def OP_QRDMLAH : Op<(call "vqadd", $p0, (call "vqrdmulh", $p1, $p2))>; -def OP_QRDMLSH : Op<(call "vqsub", $p0, (call "vqrdmulh", $p1, $p2))>; -def OP_QRDMLAH_LN : Op<(call "vqadd", $p0, (call "vqrdmulh", $p1, (call_mangled "splat_lane", $p2, $p3)))>; -def OP_QRDMLSH_LN : Op<(call "vqsub", $p0, (call "vqrdmulh", $p1, (call_mangled "splat_lane", $p2, $p3)))>; +def OP_QRDMLAH_LN : Op<(call "vqrdmlah", $p0, $p1, (call_mangled "splat_lane", $p2, $p3))>; +def OP_QRDMLSH_LN : Op<(call "vqrdmlsh", $p0, $p1, (call_mangled "splat_lane", $p2, $p3))>; def OP_FMS_LN : Op<(call "vfma_lane", $p0, (op "-", $p1), $p2, $p3)>; def OP_FMS_LNQ : Op<(call "vfma_laneq", $p0, (op "-", $p1), $p2, $p3)>; def OP_TRN1 : Op<(shuffle $p0, $p1, (interleave (decimate mask0, 2), @@ -185,10 +183,10 @@ def OP_SCALAR_QDMULL_LN : ScalarMulOp<"vqdmull">; def OP_SCALAR_QDMULH_LN : ScalarMulOp<"vqdmulh">; def OP_SCALAR_QRDMULH_LN : ScalarMulOp<"vqrdmulh">; -def OP_SCALAR_QRDMLAH_LN : Op<(call "vqadd", $p0, (call "vqrdmulh", $p1, - (call "vget_lane", $p2, $p3)))>; -def OP_SCALAR_QRDMLSH_LN : Op<(call "vqsub", $p0, (call "vqrdmulh", $p1, - (call "vget_lane", $p2, $p3)))>; +def OP_SCALAR_QRDMLAH_LN : Op<(call "vqrdmlah", $p0, $p1, + (call "vget_lane", $p2, $p3))>; +def OP_SCALAR_QRDMLSH_LN : Op<(call "vqrdmlsh", $p0, $p1, + (call "vget_lane", $p2, $p3))>; def OP_SCALAR_HALF_GET_LN : Op<(bitcast "float16_t", (call "vget_lane", @@ -291,7 +289,7 @@ def SPLATQ : WInst<"splat_laneq", ".(!Q)I", "UcUsUicsilPcPsfQUcQUsQUiQcQsQiQPcQPsQflUlQlQUlhdQhQdPlQPl"> { let isLaneQ = 1; } -let ArchGuard = "defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC)" in { +let TargetGuard = "bf16" in { def SPLAT_BF : WInst<"splat_lane", ".(!q)I", "bQb">; def SPLATQ_BF : WInst<"splat_laneq", ".(!Q)I", "bQb"> { let isLaneQ = 1; @@ -325,9 +323,9 @@ def VMLSL : SOpInst<"vmlsl", "(>Q)(>Q)..", "csiUcUsUi", OP_MLSL>; def VQDMULH : SInst<"vqdmulh", "...", "siQsQi">; def VQRDMULH : SInst<"vqrdmulh", "...", "siQsQi">; -let ArchGuard = "defined(__ARM_FEATURE_QRDMX)" in { -def VQRDMLAH : SOpInst<"vqrdmlah", "....", "siQsQi", OP_QRDMLAH>; -def VQRDMLSH : SOpInst<"vqrdmlsh", "....", "siQsQi", OP_QRDMLSH>; +let TargetGuard = "v8.1a" in { +def VQRDMLAH : SInst<"vqrdmlah", "....", "siQsQi">; +def VQRDMLSH : SInst<"vqrdmlsh", "....", "siQsQi">; } def VQDMLAL : SInst<"vqdmlal", "(>Q)(>Q)..", "si">; @@ -532,7 +530,7 @@ def VMOV_N : WOpInst<"vmov_n", ".1", } let InstName = "" in def VDUP_LANE: WOpInst<"vdup_lane", ".qI", - "UcUsUicsiPcPsfQUcQUsQUiQcQsQiQPcQPsQflUlQlQUl", + "UcUsUicsiPcPshfQUcQUsQUiQcQsQiQPcQPsQhQflUlQlQUl", OP_DUP_LN>; //////////////////////////////////////////////////////////////////////////////// @@ -616,7 +614,7 @@ def A64_VQDMULH_LANE : SInst<"vqdmulh_lane", "..(!q)I", "siQsQi">; def A64_VQRDMULH_LANE : SInst<"vqrdmulh_lane", "..(!q)I", "siQsQi">; } -let ArchGuard = "defined(__ARM_FEATURE_QRDMX)" in { +let TargetGuard = "v8.1a" in { def VQRDMLAH_LANE : SOpInst<"vqrdmlah_lane", "...qI", "siQsQi", OP_QRDMLAH_LN>; def VQRDMLSH_LANE : SOpInst<"vqrdmlsh_lane", "...qI", "siQsQi", OP_QRDMLSH_LN>; } @@ -959,8 +957,10 @@ def VQDMLAL_HIGH : SOpInst<"vqdmlal_high", "(>Q)(>Q)QQ", "si", OP_QDMLALHi>; def VQDMLAL_HIGH_N : SOpInst<"vqdmlal_high_n", "(>Q)(>Q)Q1", "si", OP_QDMLALHi_N>; def VQDMLSL_HIGH : SOpInst<"vqdmlsl_high", "(>Q)(>Q)QQ", "si", OP_QDMLSLHi>; def VQDMLSL_HIGH_N : SOpInst<"vqdmlsl_high_n", "(>Q)(>Q)Q1", "si", OP_QDMLSLHi_N>; -def VMULL_P64 : SInst<"vmull", "(1>)11", "Pl">; -def VMULL_HIGH_P64 : SOpInst<"vmull_high", "(1>)..", "HPl", OP_MULLHi_P64>; +let TargetGuard = "aes" in { + def VMULL_P64 : SInst<"vmull", "(1>)11", "Pl">; + def VMULL_HIGH_P64 : SOpInst<"vmull_high", "(1>)..", "HPl", OP_MULLHi_P64>; +} //////////////////////////////////////////////////////////////////////////////// @@ -982,7 +982,7 @@ def COPYQ_LANEQ : IOpInst<"vcopy_laneq", "..I.I", //////////////////////////////////////////////////////////////////////////////// // Set all lanes to same value -def VDUP_LANE1: WOpInst<"vdup_lane", ".qI", "hdQhQdPlQPl", OP_DUP_LN>; +def VDUP_LANE1: WOpInst<"vdup_lane", ".qI", "dQdPlQPl", OP_DUP_LN>; def VDUP_LANE2: WOpInst<"vdup_laneq", ".QI", "csilUcUsUiUlPcPshfdQcQsQiQlQPcQPsQUcQUsQUiQUlQhQfQdPlQPl", OP_DUP_LN> { @@ -1091,14 +1091,14 @@ let isLaneQ = 1 in { def VQDMULH_LANEQ : SInst<"vqdmulh_laneq", "..QI", "siQsQi">; def VQRDMULH_LANEQ : SInst<"vqrdmulh_laneq", "..QI", "siQsQi">; } -let ArchGuard = "defined(__ARM_FEATURE_QRDMX) && defined(__aarch64__)" in { +let ArchGuard = "defined(__aarch64__)", TargetGuard = "v8.1a" in { def VQRDMLAH_LANEQ : SOpInst<"vqrdmlah_laneq", "...QI", "siQsQi", OP_QRDMLAH_LN> { let isLaneQ = 1; } def VQRDMLSH_LANEQ : SOpInst<"vqrdmlsh_laneq", "...QI", "siQsQi", OP_QRDMLSH_LN> { let isLaneQ = 1; } -} +} // ArchGuard = "defined(__aarch64__)", TargetGuard = "v8.1a" // Note: d type implemented by SCALAR_VMULX_LANE def VMULX_LANE : IOpInst<"vmulx_lane", "..qI", "fQfQd", OP_MULX_LN>; @@ -1122,14 +1122,14 @@ def VEXT_A64 : WInst<"vext", "...I", "dQdPlQPl">; //////////////////////////////////////////////////////////////////////////////// // Crypto -let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_AES)" in { +let ArchGuard = "__ARM_ARCH >= 8", TargetGuard = "aes" in { def AESE : SInst<"vaese", "...", "QUc">; def AESD : SInst<"vaesd", "...", "QUc">; def AESMC : SInst<"vaesmc", "..", "QUc">; def AESIMC : SInst<"vaesimc", "..", "QUc">; } -let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_SHA2)" in { +let ArchGuard = "__ARM_ARCH >= 8", TargetGuard = "sha2" in { def SHA1H : SInst<"vsha1h", "11", "Ui">; def SHA1SU1 : SInst<"vsha1su1", "...", "QUi">; def SHA256SU0 : SInst<"vsha256su0", "...", "QUi">; @@ -1143,7 +1143,7 @@ def SHA256H2 : SInst<"vsha256h2", "....", "QUi">; def SHA256SU1 : SInst<"vsha256su1", "....", "QUi">; } -let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_SHA3) && defined(__aarch64__)" in { +let ArchGuard = "defined(__aarch64__)", TargetGuard = "sha3" in { def BCAX : SInst<"vbcax", "....", "QUcQUsQUiQUlQcQsQiQl">; def EOR3 : SInst<"veor3", "....", "QUcQUsQUiQUlQcQsQiQl">; def RAX1 : SInst<"vrax1", "...", "QUl">; @@ -1153,15 +1153,14 @@ def XAR : SInst<"vxar", "...I", "QUl">; } } -let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_SHA512) && defined(__aarch64__)" in { - +let ArchGuard = "defined(__aarch64__)", TargetGuard = "sha3" in { def SHA512SU0 : SInst<"vsha512su0", "...", "QUl">; def SHA512su1 : SInst<"vsha512su1", "....", "QUl">; def SHA512H : SInst<"vsha512h", "....", "QUl">; def SHA512H2 : SInst<"vsha512h2", "....", "QUl">; } -let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_SM3) && defined(__aarch64__)" in { +let ArchGuard = "defined(__aarch64__)", TargetGuard = "sm4" in { def SM3SS1 : SInst<"vsm3ss1", "....", "QUi">; def SM3TT1A : SInst<"vsm3tt1a", "....I", "QUi">; def SM3TT1B : SInst<"vsm3tt1b", "....I", "QUi">; @@ -1171,7 +1170,7 @@ def SM3PARTW1 : SInst<"vsm3partw1", "....", "QUi">; def SM3PARTW2 : SInst<"vsm3partw2", "....", "QUi">; } -let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_SM4) && defined(__aarch64__)" in { +let ArchGuard = "defined(__aarch64__)", TargetGuard = "sm4" in { def SM4E : SInst<"vsm4e", "...", "QUi">; def SM4EKEY : SInst<"vsm4ekey", "...", "QUi">; } @@ -1194,7 +1193,7 @@ def FCVTAS_S32 : SInst<"vcvta_s32", "S.", "fQf">; def FCVTAU_S32 : SInst<"vcvta_u32", "U.", "fQf">; } -let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__)" in { +let ArchGuard = "defined(__aarch64__)" in { def FCVTNS_S64 : SInst<"vcvtn_s64", "S.", "dQd">; def FCVTNU_S64 : SInst<"vcvtn_u64", "U.", "dQd">; def FCVTPS_S64 : SInst<"vcvtp_s64", "S.", "dQd">; @@ -1218,7 +1217,7 @@ def FRINTZ_S32 : SInst<"vrnd", "..", "fQf">; def FRINTI_S32 : SInst<"vrndi", "..", "fQf">; } -let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__) && defined(__ARM_FEATURE_DIRECTED_ROUNDING)" in { +let ArchGuard = "defined(__aarch64__) && defined(__ARM_FEATURE_DIRECTED_ROUNDING)" in { def FRINTN_S64 : SInst<"vrndn", "..", "dQd">; def FRINTA_S64 : SInst<"vrnda", "..", "dQd">; def FRINTP_S64 : SInst<"vrndp", "..", "dQd">; @@ -1228,11 +1227,16 @@ def FRINTZ_S64 : SInst<"vrnd", "..", "dQd">; def FRINTI_S64 : SInst<"vrndi", "..", "dQd">; } -let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__) && defined(__ARM_FEATURE_FRINT)" in { +let ArchGuard = "defined(__aarch64__)", TargetGuard = "v8.5a" in { def FRINT32X_S32 : SInst<"vrnd32x", "..", "fQf">; def FRINT32Z_S32 : SInst<"vrnd32z", "..", "fQf">; def FRINT64X_S32 : SInst<"vrnd64x", "..", "fQf">; def FRINT64Z_S32 : SInst<"vrnd64z", "..", "fQf">; + +def FRINT32X_S64 : SInst<"vrnd32x", "..", "dQd">; +def FRINT32Z_S64 : SInst<"vrnd32z", "..", "dQd">; +def FRINT64X_S64 : SInst<"vrnd64x", "..", "dQd">; +def FRINT64Z_S64 : SInst<"vrnd64z", "..", "dQd">; } //////////////////////////////////////////////////////////////////////////////// @@ -1243,7 +1247,7 @@ def FMAXNM_S32 : SInst<"vmaxnm", "...", "fQf">; def FMINNM_S32 : SInst<"vminnm", "...", "fQf">; } -let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__) && defined(__ARM_FEATURE_NUMERIC_MAXMIN)" in { +let ArchGuard = "defined(__aarch64__) && defined(__ARM_FEATURE_NUMERIC_MAXMIN)" in { def FMAXNM_S64 : SInst<"vmaxnm", "...", "dQd">; def FMINNM_S64 : SInst<"vminnm", "...", "dQd">; } @@ -1285,7 +1289,7 @@ def VQTBX4_A64 : WInst<"vqtbx4", "..(4Q)U", "UccPcQUcQcQPc">; // itself during generation so, unlike all other intrinsics, this one should // include *all* types, not just additional ones. def VVREINTERPRET : REINTERPRET_CROSS_SELF<"csilUcUsUiUlhfdPcPsPlQcQsQiQlQUcQUsQUiQUlQhQfQdQPcQPsQPlQPk"> { - let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__)"; + let ArchGuard = "defined(__aarch64__)"; let BigEndianSafe = 1; } @@ -1397,15 +1401,15 @@ def SCALAR_SQDMULH : SInst<"vqdmulh", "111", "SsSi">; // Scalar Integer Saturating Rounding Doubling Multiply Half High def SCALAR_SQRDMULH : SInst<"vqrdmulh", "111", "SsSi">; -let ArchGuard = "defined(__ARM_FEATURE_QRDMX) && defined(__aarch64__)" in { +let ArchGuard = "defined(__aarch64__)", TargetGuard = "v8.1a" in { //////////////////////////////////////////////////////////////////////////////// // Signed Saturating Rounding Doubling Multiply Accumulate Returning High Half -def SCALAR_SQRDMLAH : SOpInst<"vqrdmlah", "1111", "SsSi", OP_QRDMLAH>; +def SCALAR_SQRDMLAH : SInst<"vqrdmlah", "1111", "SsSi">; //////////////////////////////////////////////////////////////////////////////// // Signed Saturating Rounding Doubling Multiply Subtract Returning High Half -def SCALAR_SQRDMLSH : SOpInst<"vqrdmlsh", "1111", "SsSi", OP_QRDMLSH>; -} +def SCALAR_SQRDMLSH : SInst<"vqrdmlsh", "1111", "SsSi">; +} // ArchGuard = "defined(__aarch64__)", TargetGuard = "v8.1a" //////////////////////////////////////////////////////////////////////////////// // Scalar Floating-point Multiply Extended @@ -1628,7 +1632,7 @@ def SCALAR_SQRDMULH_LANEQ : SOpInst<"vqrdmulh_laneq", "11QI", "SsSi", OP_SCALAR_ let isLaneQ = 1; } -let ArchGuard = "defined(__ARM_FEATURE_QRDMX) && defined(__aarch64__)" in { +let TargetGuard = "v8.1a" in { // Signed Saturating Rounding Doubling Multiply Accumulate Returning High Half def SCALAR_SQRDMLAH_LANE : SOpInst<"vqrdmlah_lane", "111.I", "SsSi", OP_SCALAR_QRDMLAH_LN>; def SCALAR_SQRDMLAH_LANEQ : SOpInst<"vqrdmlah_laneq", "111QI", "SsSi", OP_SCALAR_QRDMLAH_LN> { @@ -1640,16 +1644,17 @@ def SCALAR_SQRDMLSH_LANE : SOpInst<"vqrdmlsh_lane", "111.I", "SsSi", OP_SCALAR_Q def SCALAR_SQRDMLSH_LANEQ : SOpInst<"vqrdmlsh_laneq", "111QI", "SsSi", OP_SCALAR_QRDMLSH_LN> { let isLaneQ = 1; } -} +} // TargetGuard = "v8.1a" def SCALAR_VDUP_LANE : IInst<"vdup_lane", "1.I", "ScSsSiSlSfSdSUcSUsSUiSUlSPcSPs">; def SCALAR_VDUP_LANEQ : IInst<"vdup_laneq", "1QI", "ScSsSiSlSfSdSUcSUsSUiSUlSPcSPs"> { let isLaneQ = 1; } -} + +} // ArchGuard = "defined(__aarch64__)" // ARMv8.2-A FP16 vector intrinsics for A32/A64. -let ArchGuard = "defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)" in { +let TargetGuard = "fullfp16" in { // ARMv8.2-A FP16 one-operand vector intrinsics. @@ -1674,7 +1679,7 @@ let ArchGuard = "defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)" in { def VCVTP_U16 : SInst<"vcvtp_u16", "U.", "hQh">; // Vector rounding - let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_DIRECTED_ROUNDING) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)" in { + let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_DIRECTED_ROUNDING)", TargetGuard = "fullfp16" in { def FRINTZH : SInst<"vrnd", "..", "hQh">; def FRINTNH : SInst<"vrndn", "..", "hQh">; def FRINTAH : SInst<"vrnda", "..", "hQh">; @@ -1723,7 +1728,7 @@ let ArchGuard = "defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)" in { // Max/Min def VMAXH : SInst<"vmax", "...", "hQh">; def VMINH : SInst<"vmin", "...", "hQh">; - let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_NUMERIC_MAXMIN) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)" in { + let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_NUMERIC_MAXMIN)", TargetGuard = "fullfp16" in { def FMAXNMH : SInst<"vmaxnm", "...", "hQh">; def FMINNMH : SInst<"vminnm", "...", "hQh">; } @@ -1765,15 +1770,6 @@ let ArchGuard = "defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)" in { def VUZPH : WInst<"vuzp", "2..", "hQh">; def VTRNH : WInst<"vtrn", "2..", "hQh">; - - let ArchGuard = "!defined(__aarch64__)" in { - // Set all lanes to same value. - // Already implemented prior to ARMv8.2-A. - def VMOV_NH : WOpInst<"vmov_n", ".1", "hQh", OP_DUP>; - def VDUP_NH : WOpInst<"vdup_n", ".1", "hQh", OP_DUP>; - def VDUP_LANE1H : WOpInst<"vdup_lane", ".qI", "hQh", OP_DUP_LN>; - } - // Vector Extract def VEXTH : WInst<"vext", "...I", "hQh">; @@ -1782,7 +1778,7 @@ let ArchGuard = "defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)" in { } // ARMv8.2-A FP16 vector intrinsics for A64 only. -let ArchGuard = "defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(__aarch64__)" in { +let ArchGuard = "defined(__aarch64__)", TargetGuard = "fullfp16" in { // Vector rounding def FRINTIH : SInst<"vrndi", "..", "hQh">; @@ -1877,11 +1873,11 @@ let ArchGuard = "defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(__aarc } // v8.2-A dot product instructions. -let ArchGuard = "defined(__ARM_FEATURE_DOTPROD)" in { +let TargetGuard = "dotprod" in { def DOT : SInst<"vdot", "..(<<)(<<)", "iQiUiQUi">; def DOT_LANE : SOpInst<"vdot_lane", "..(<<)(<<q)I", "iUiQiQUi", OP_DOT_LN>; } -let ArchGuard = "defined(__ARM_FEATURE_DOTPROD) && defined(__aarch64__)" in { +let ArchGuard = "defined(__aarch64__)", TargetGuard = "dotprod" in { // Variants indexing into a 128-bit vector are A64 only. def UDOT_LANEQ : SOpInst<"vdot_laneq", "..(<<)(<<Q)I", "iUiQiQUi", OP_DOT_LNQ> { let isLaneQ = 1; @@ -1889,7 +1885,7 @@ let ArchGuard = "defined(__ARM_FEATURE_DOTPROD) && defined(__aarch64__)" in { } // v8.2-A FP16 fused multiply-add long instructions. -let ArchGuard = "defined(__ARM_FEATURE_FP16_FML) && defined(__aarch64__)" in { +let ArchGuard = "defined(__aarch64__)", TargetGuard = "fp16fml" in { def VFMLAL_LOW : SInst<"vfmlal_low", ">>..", "hQh">; def VFMLSL_LOW : SInst<"vfmlsl_low", ">>..", "hQh">; def VFMLAL_HIGH : SInst<"vfmlal_high", ">>..", "hQh">; @@ -1914,7 +1910,7 @@ let ArchGuard = "defined(__ARM_FEATURE_FP16_FML) && defined(__aarch64__)" in { } } -let ArchGuard = "defined(__ARM_FEATURE_MATMUL_INT8)" in { +let TargetGuard = "i8mm" in { def VMMLA : SInst<"vmmla", "..(<<)(<<)", "QUiQi">; def VUSMMLA : SInst<"vusmmla", "..(<<U)(<<)", "Qi">; @@ -1931,7 +1927,7 @@ let ArchGuard = "defined(__ARM_FEATURE_MATMUL_INT8)" in { } } -let ArchGuard = "defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC)" in { +let TargetGuard = "bf16" in { def VDOT_BF : SInst<"vbfdot", "..BB", "fQf">; def VDOT_LANE_BF : SOpInst<"vbfdot_lane", "..B(Bq)I", "fQf", OP_BFDOT_LN>; def VDOT_LANEQ_BF : SOpInst<"vbfdot_laneq", "..B(BQ)I", "fQf", OP_BFDOT_LNQ> { @@ -1975,7 +1971,7 @@ multiclass VCMLA_ROTS<string type, string lanety, string laneqty> { } // v8.3-A Vector complex addition intrinsics -let ArchGuard = "defined(__ARM_FEATURE_COMPLEX) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)" in { +let TargetGuard = "v8.3a,fullfp16" in { def VCADD_ROT90_FP16 : SInst<"vcadd_rot90", "...", "h">; def VCADD_ROT270_FP16 : SInst<"vcadd_rot270", "...", "h">; def VCADDQ_ROT90_FP16 : SInst<"vcaddq_rot90", "QQQ", "h">; @@ -1983,7 +1979,7 @@ let ArchGuard = "defined(__ARM_FEATURE_COMPLEX) && defined(__ARM_FEATURE_FP16_VE defm VCMLA_FP16 : VCMLA_ROTS<"h", "uint32x2_t", "uint32x4_t">; } -let ArchGuard = "defined(__ARM_FEATURE_COMPLEX)" in { +let TargetGuard = "v8.3a" in { def VCADD_ROT90 : SInst<"vcadd_rot90", "...", "f">; def VCADD_ROT270 : SInst<"vcadd_rot270", "...", "f">; def VCADDQ_ROT90 : SInst<"vcaddq_rot90", "QQQ", "f">; @@ -1991,7 +1987,7 @@ let ArchGuard = "defined(__ARM_FEATURE_COMPLEX)" in { defm VCMLA_F32 : VCMLA_ROTS<"f", "uint64x1_t", "uint64x2_t">; } -let ArchGuard = "defined(__ARM_FEATURE_COMPLEX) && defined(__aarch64__)" in { +let ArchGuard = "defined(__aarch64__)", TargetGuard = "v8.3a" in { def VCADDQ_ROT90_FP64 : SInst<"vcaddq_rot90", "QQQ", "d">; def VCADDQ_ROT270_FP64 : SInst<"vcaddq_rot270", "QQQ", "d">; @@ -1999,7 +1995,7 @@ let ArchGuard = "defined(__ARM_FEATURE_COMPLEX) && defined(__aarch64__)" in { } // V8.2-A BFloat intrinsics -let ArchGuard = "defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC)" in { +let TargetGuard = "bf16" in { def VCREATE_BF : NoTestOpInst<"vcreate", ".(IU>)", "b", OP_CAST> { let BigEndianSafe = 1; } @@ -2063,14 +2059,14 @@ let ArchGuard = "defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC)" in { def SCALAR_CVT_F32_BF16 : SOpInst<"vcvtah_f32", "(1F>)(1!)", "b", OP_CVT_F32_BF16>; } -let ArchGuard = "defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC) && !defined(__aarch64__)" in { +let ArchGuard = "!defined(__aarch64__)", TargetGuard = "bf16" in { def VCVT_BF16_F32_A32_INTERNAL : WInst<"__a32_vcvt_bf16", "BQ", "f">; def VCVT_BF16_F32_A32 : SOpInst<"vcvt_bf16", "BQ", "f", OP_VCVT_BF16_F32_A32>; def VCVT_LOW_BF16_F32_A32 : SOpInst<"vcvt_low_bf16", "BQ", "Qf", OP_VCVT_BF16_F32_LO_A32>; def VCVT_HIGH_BF16_F32_A32 : SOpInst<"vcvt_high_bf16", "BBQ", "Qf", OP_VCVT_BF16_F32_HI_A32>; } -let ArchGuard = "defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC) && defined(__aarch64__)" in { +let ArchGuard = "defined(__aarch64__)", TargetGuard = "bf16" in { def VCVT_LOW_BF16_F32_A64_INTERNAL : WInst<"__a64_vcvtq_low_bf16", "BQ", "Hf">; def VCVT_LOW_BF16_F32_A64 : SOpInst<"vcvt_low_bf16", "BQ", "Qf", OP_VCVT_BF16_F32_LO_A64>; def VCVT_HIGH_BF16_F32_A64 : SInst<"vcvt_high_bf16", "BBQ", "Qf">; @@ -2082,16 +2078,22 @@ let ArchGuard = "defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC) && defined(__aarc def COPYQ_LANEQ_BF16 : IOpInst<"vcopy_laneq", "..I.I", "Qb", OP_COPY_LN>; } -let ArchGuard = "defined(__ARM_FEATURE_BF16) && !defined(__aarch64__)" in { +let ArchGuard = "!defined(__aarch64__)", TargetGuard = "bf16" in { let BigEndianSafe = 1 in { defm VREINTERPRET_BF : REINTERPRET_CROSS_TYPES< "csilUcUsUiUlhfPcPsPlQcQsQiQlQUcQUsQUiQUlQhQfQPcQPsQPl", "bQb">; } } -let ArchGuard = "defined(__ARM_FEATURE_BF16) && defined(__aarch64__)" in { +let ArchGuard = "defined(__aarch64__)", TargetGuard = "bf16" in { let BigEndianSafe = 1 in { defm VVREINTERPRET_BF : REINTERPRET_CROSS_TYPES< "csilUcUsUiUlhfdPcPsPlQcQsQiQlQUcQUsQUiQUlQhQfQdQPcQPsQPlQPk", "bQb">; } } + +// v8.9a/v9.4a LRCPC3 intrinsics +let ArchGuard = "defined(__aarch64__)", TargetGuard = "rcpc3" in { + def VLDAP1_LANE : WInst<"vldap1_lane", ".(c*!).I", "QUlQlUlldQdPlQPl">; + def VSTL1_LANE : WInst<"vstl1_lane", "v*(.!)I", "QUlQlUlldQdPlQPl">; +} diff --git a/contrib/llvm-project/clang/include/clang/Basic/arm_neon_incl.td b/contrib/llvm-project/clang/include/clang/Basic/arm_neon_incl.td index 60dbea627d58..4f969ac1c78a 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/arm_neon_incl.td +++ b/contrib/llvm-project/clang/include/clang/Basic/arm_neon_incl.td @@ -265,6 +265,7 @@ class Inst <string n, string p, string t, Operation o> { string Prototype = p; string Types = t; string ArchGuard = ""; + string TargetGuard = ""; Operation Operation = o; bit BigEndianSafe = 0; diff --git a/contrib/llvm-project/clang/include/clang/Basic/arm_sme.td b/contrib/llvm-project/clang/include/clang/Basic/arm_sme.td new file mode 100644 index 000000000000..2da0e8d2aba9 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/arm_sme.td @@ -0,0 +1,676 @@ +//===--- arm_sme.td - ARM SME compiler interface ------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the TableGen definitions from which the ARM SME header +// file will be generated. See: +// +// https://developer.arm.com/architectures/system-architectures/software-standards/acle +// +//===----------------------------------------------------------------------===// + +include "arm_sve_sme_incl.td" + +//////////////////////////////////////////////////////////////////////////////// +// Loads + +multiclass ZALoad<string n_suffix, string t, string i_prefix, list<ImmCheck> ch> { + let TargetGuard = "sme" in { + def NAME # _H : MInst<"svld1_hor_" # n_suffix, "vimPQ", t, + [IsLoad, IsOverloadNone, IsStreaming, IsInOutZA], + MemEltTyDefault, i_prefix # "_horiz", ch>; + + def NAME # _H_VNUM : MInst<"svld1_hor_vnum_" # n_suffix, "vimPQl", t, + [IsLoad, IsOverloadNone, IsStreaming, IsInOutZA], + MemEltTyDefault, i_prefix # "_horiz", ch>; + + def NAME # _V : MInst<"svld1_ver_" # n_suffix, "vimPQ", t, + [IsLoad, IsOverloadNone, IsStreaming, IsInOutZA], + MemEltTyDefault, i_prefix # "_vert", ch>; + + def NAME # _V_VNUM : MInst<"svld1_ver_vnum_" # n_suffix, "vimPQl", t, + [IsLoad, IsOverloadNone, IsStreaming, IsInOutZA], + MemEltTyDefault, i_prefix # "_vert", ch>; + } +} + +defm SVLD1_ZA8 : ZALoad<"za8", "c", "aarch64_sme_ld1b", [ImmCheck<0, ImmCheck0_0>]>; +defm SVLD1_ZA16 : ZALoad<"za16", "s", "aarch64_sme_ld1h", [ImmCheck<0, ImmCheck0_1>]>; +defm SVLD1_ZA32 : ZALoad<"za32", "i", "aarch64_sme_ld1w", [ImmCheck<0, ImmCheck0_3>]>; +defm SVLD1_ZA64 : ZALoad<"za64", "l", "aarch64_sme_ld1d", [ImmCheck<0, ImmCheck0_7>]>; +defm SVLD1_ZA128 : ZALoad<"za128", "q", "aarch64_sme_ld1q", [ImmCheck<0, ImmCheck0_15>]>; + +let TargetGuard = "sme" in { +def SVLDR_VNUM_ZA : MInst<"svldr_vnum_za", "vmQl", "", + [IsOverloadNone, IsStreamingCompatible, IsInOutZA], + MemEltTyDefault, "aarch64_sme_ldr">; + +def SVLDR_ZA : MInst<"svldr_za", "vmQ", "", + [IsOverloadNone, IsStreamingCompatible, IsInOutZA], + MemEltTyDefault, "aarch64_sme_ldr", []>; +} + +//////////////////////////////////////////////////////////////////////////////// +// Stores + +multiclass ZAStore<string n_suffix, string t, string i_prefix, list<ImmCheck> ch> { + let TargetGuard = "sme" in { + def NAME # _H : MInst<"svst1_hor_" # n_suffix, "vimP%", t, + [IsStore, IsOverloadNone, IsStreaming, IsInZA], + MemEltTyDefault, i_prefix # "_horiz", ch>; + + def NAME # _H_VNUM : MInst<"svst1_hor_vnum_" # n_suffix, "vimP%l", t, + [IsStore, IsOverloadNone, IsStreaming, IsInZA], + MemEltTyDefault, i_prefix # "_horiz", ch>; + + def NAME # _V : MInst<"svst1_ver_" # n_suffix, "vimP%", t, + [IsStore, IsOverloadNone, IsStreaming, IsInZA], + MemEltTyDefault, i_prefix # "_vert", ch>; + + def NAME # _V_VNUM : MInst<"svst1_ver_vnum_" # n_suffix, "vimP%l", t, + [IsStore, IsOverloadNone, IsStreaming, IsInZA], + MemEltTyDefault, i_prefix # "_vert", ch>; + } +} + +defm SVST1_ZA8 : ZAStore<"za8", "c", "aarch64_sme_st1b", [ImmCheck<0, ImmCheck0_0>]>; +defm SVST1_ZA16 : ZAStore<"za16", "s", "aarch64_sme_st1h", [ImmCheck<0, ImmCheck0_1>]>; +defm SVST1_ZA32 : ZAStore<"za32", "i", "aarch64_sme_st1w", [ImmCheck<0, ImmCheck0_3>]>; +defm SVST1_ZA64 : ZAStore<"za64", "l", "aarch64_sme_st1d", [ImmCheck<0, ImmCheck0_7>]>; +defm SVST1_ZA128 : ZAStore<"za128", "q", "aarch64_sme_st1q", [ImmCheck<0, ImmCheck0_15>]>; + +let TargetGuard = "sme" in { +def SVSTR_VNUM_ZA : MInst<"svstr_vnum_za", "vm%l", "", + [IsOverloadNone, IsStreamingCompatible, IsInZA], + MemEltTyDefault, "aarch64_sme_str">; + +def SVSTR_ZA : MInst<"svstr_za", "vm%", "", + [IsOverloadNone, IsStreamingCompatible, IsInZA], + MemEltTyDefault, "aarch64_sme_str", []>; +} + +//////////////////////////////////////////////////////////////////////////////// +// Read horizontal/vertical ZA slices + +multiclass ZARead<string n_suffix, string t, string i_prefix, list<ImmCheck> ch> { + let TargetGuard = "sme" in { + def NAME # _H : SInst<"svread_hor_" # n_suffix # "[_{d}]", "ddPim", t, + MergeOp1, i_prefix # "_horiz", + [IsReadZA, IsStreaming, IsInZA], ch>; + + def NAME # _V : SInst<"svread_ver_" # n_suffix # "[_{d}]", "ddPim", t, + MergeOp1, i_prefix # "_vert", + [IsReadZA, IsStreaming, IsInZA], ch>; + } +} + +defm SVREAD_ZA8 : ZARead<"za8", "cUc", "aarch64_sme_read", [ImmCheck<2, ImmCheck0_0>]>; +defm SVREAD_ZA16 : ZARead<"za16", "sUshb", "aarch64_sme_read", [ImmCheck<2, ImmCheck0_1>]>; +defm SVREAD_ZA32 : ZARead<"za32", "iUif", "aarch64_sme_read", [ImmCheck<2, ImmCheck0_3>]>; +defm SVREAD_ZA64 : ZARead<"za64", "lUld", "aarch64_sme_read", [ImmCheck<2, ImmCheck0_7>]>; +defm SVREAD_ZA128 : ZARead<"za128", "csilUcUsUiUlhbfd", "aarch64_sme_readq", [ImmCheck<2, ImmCheck0_15>]>; + +//////////////////////////////////////////////////////////////////////////////// +// Write horizontal/vertical ZA slices + +multiclass ZAWrite<string n_suffix, string t, string i_prefix, list<ImmCheck> ch> { + let TargetGuard = "sme" in { + def NAME # _H : SInst<"svwrite_hor_" # n_suffix # "[_{d}]", "vimPd", t, + MergeOp1, i_prefix # "_horiz", + [IsWriteZA, IsStreaming, IsInOutZA], ch>; + + def NAME # _V : SInst<"svwrite_ver_" # n_suffix # "[_{d}]", "vimPd", t, + MergeOp1, i_prefix # "_vert", + [IsWriteZA, IsStreaming, IsInOutZA], ch>; + } +} + +defm SVWRITE_ZA8 : ZAWrite<"za8", "cUc", "aarch64_sme_write", [ImmCheck<0, ImmCheck0_0>]>; +defm SVWRITE_ZA16 : ZAWrite<"za16", "sUshb", "aarch64_sme_write", [ImmCheck<0, ImmCheck0_1>]>; +defm SVWRITE_ZA32 : ZAWrite<"za32", "iUif", "aarch64_sme_write", [ImmCheck<0, ImmCheck0_3>]>; +defm SVWRITE_ZA64 : ZAWrite<"za64", "lUld", "aarch64_sme_write", [ImmCheck<0, ImmCheck0_7>]>; +defm SVWRITE_ZA128 : ZAWrite<"za128", "csilUcUsUiUlhbfd", "aarch64_sme_writeq", [ImmCheck<0, ImmCheck0_15>]>; + +//////////////////////////////////////////////////////////////////////////////// +// SME - Zero + +let TargetGuard = "sme" in { + def SVZERO_MASK_ZA : SInst<"svzero_mask_za", "vi", "", MergeNone, "aarch64_sme_zero", + [IsOverloadNone, IsStreamingCompatible, IsInOutZA], + [ImmCheck<0, ImmCheck0_255>]>; + def SVZERO_ZA : SInst<"svzero_za", "v", "", MergeNone, "aarch64_sme_zero", + [IsOverloadNone, IsStreamingCompatible, IsOutZA]>; +} + +//////////////////////////////////////////////////////////////////////////////// +// SME - Counting elements in a streaming vector + +multiclass ZACount<string n_suffix> { + let TargetGuard = "sme" in { + def NAME : SInst<"sv" # n_suffix, "nv", "", MergeNone, + "aarch64_sme_" # n_suffix, + [IsOverloadNone, IsStreamingCompatible]>; + } +} + +defm SVCNTSB : ZACount<"cntsb">; +defm SVCNTSH : ZACount<"cntsh">; +defm SVCNTSW : ZACount<"cntsw">; +defm SVCNTSD : ZACount<"cntsd">; + +//////////////////////////////////////////////////////////////////////////////// +// SME - ADDHA/ADDVA + +multiclass ZAAdd<string n_suffix> { + let TargetGuard = "sme" in { + def NAME # _ZA32: SInst<"sv" # n_suffix # "_za32[_{d}]", "viPPd", "iUi", MergeOp1, + "aarch64_sme_" # n_suffix, [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_3>]>; + } + + let TargetGuard = "sme-i16i64" in { + def NAME # _ZA64: SInst<"sv" # n_suffix # "_za64[_{d}]", "viPPd", "lUl", MergeOp1, + "aarch64_sme_" # n_suffix, [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_7>]>; + } +} + +defm SVADDHA : ZAAdd<"addha">; +defm SVADDVA : ZAAdd<"addva">; + +//////////////////////////////////////////////////////////////////////////////// +// SME - SMOPA, SMOPS, UMOPA, UMOPS + +multiclass ZAIntOuterProd<string n_suffix1, string n_suffix2> { + let TargetGuard = "sme" in { + def NAME # _ZA32_B: SInst<"sv" # n_suffix2 # "_za32[_{d}]", + "viPPdd", !cond(!eq(n_suffix1, "s") : "", true: "U") # "c", + MergeOp1, "aarch64_sme_" # n_suffix1 # n_suffix2 # "_wide", + [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_3>]>; + } + + let TargetGuard = "sme-i16i64" in { + def NAME # _ZA64_H: SInst<"sv" # n_suffix2 # "_za64[_{d}]", + "viPPdd", !cond(!eq(n_suffix1, "s") : "", true: "U") # "s", + MergeOp1, "aarch64_sme_" # n_suffix1 # n_suffix2 # "_wide", + [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_7>]>; + } +} + +defm SVSMOPA : ZAIntOuterProd<"s", "mopa">; +defm SVSMOPS : ZAIntOuterProd<"s", "mops">; +defm SVUMOPA : ZAIntOuterProd<"u", "mopa">; +defm SVUMOPS : ZAIntOuterProd<"u", "mops">; + +//////////////////////////////////////////////////////////////////////////////// +// SME - SUMOPA, SUMOPS, USMOPA, USMOPS + +multiclass ZAIntOuterProdMixedSigns<string n_suffix1, string n_suffix2> { + let TargetGuard = "sme" in { + def NAME # _ZA32_B: SInst<"sv" # n_suffix1 # n_suffix2 # "_za32[_{d}]", + "viPPd" # !cond(!eq(n_suffix1, "su") : "u", true: "x"), + !cond(!eq(n_suffix1, "su") : "", true: "U") # "c", + MergeOp1, "aarch64_sme_" # n_suffix1 # n_suffix2 # "_wide", + [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_3>]>; + } + + let TargetGuard = "sme-i16i64" in { + def NAME # _ZA64_H: SInst<"sv" # n_suffix1 # n_suffix2 # "_za64[_{d}]", + "viPPd" # !cond(!eq(n_suffix1, "su") : "u", true: "x"), + !cond(!eq(n_suffix1, "su") : "", true: "U") # "s", + MergeOp1, "aarch64_sme_" # n_suffix1 # n_suffix2 # "_wide", + [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_7>]>; + } +} + +defm SVSUMOPA : ZAIntOuterProdMixedSigns<"su", "mopa">; +defm SVSUMOPS : ZAIntOuterProdMixedSigns<"su", "mops">; +defm SVUSMOPA : ZAIntOuterProdMixedSigns<"us", "mopa">; +defm SVUSMOPS : ZAIntOuterProdMixedSigns<"us", "mops">; + +//////////////////////////////////////////////////////////////////////////////// +// SME - FMOPA, FMOPS + +multiclass ZAFPOuterProd<string n_suffix> { + let TargetGuard = "sme" in { + def NAME # _ZA32_B: SInst<"sv" # n_suffix # "_za32[_{d}]", "viPPdd", "h", + MergeOp1, "aarch64_sme_" # n_suffix # "_wide", + [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_3>]>; + + def NAME # _ZA32_H: SInst<"sv" # n_suffix # "_za32[_{d}]", "viPPdd", "b", + MergeOp1, "aarch64_sme_" # n_suffix # "_wide", + [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_3>]>; + + def NAME # _ZA32_S: SInst<"sv" # n_suffix # "_za32[_{d}]", "viPPdd", "f", + MergeOp1, "aarch64_sme_" # n_suffix, + [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_3>]>; + } + + let TargetGuard = "sme-f64f64" in { + def NAME # _ZA64_D: SInst<"sv" # n_suffix # "_za64[_{d}]", "viPPdd", "d", + MergeOp1, "aarch64_sme_" # n_suffix, + [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_7>]>; + } +} + +defm SVMOPA : ZAFPOuterProd<"mopa">; +defm SVMOPS : ZAFPOuterProd<"mops">; + +//////////////////////////////////////////////////////////////////////////////// +// SME2 - ADD, SUB + +multiclass ZAAddSub<string n_suffix> { + let TargetGuard = "sme2" in { + def NAME # _WRITE_SINGLE_ZA32_VG1X2_I32 : Inst<"sv" # n_suffix # "_write[_single]_za32[_{d}]_vg1x2", "vm2d", "iUi", MergeNone, "aarch64_sme_" # n_suffix # "_write_single_za_vg1x2", [IsStreaming, IsInOutZA], []>; + def NAME # _WRITE_SINGLE_ZA32_VG1X4_I32 : Inst<"sv" # n_suffix # "_write[_single]_za32[_{d}]_vg1x4", "vm4d", "iUi", MergeNone, "aarch64_sme_" # n_suffix # "_write_single_za_vg1x4", [IsStreaming, IsInOutZA], []>; + + def NAME # _WRITE_ZA32_VG1X2_I32 : Inst<"sv" # n_suffix # "_write_za32[_{d}]_vg1x2", "vm22", "iUi", MergeNone, "aarch64_sme_" # n_suffix # "_write_za_vg1x2", [IsStreaming, IsInOutZA], []>; + def NAME # _WRITE_ZA32_VG1X4_I32 : Inst<"sv" # n_suffix # "_write_za32[_{d}]_vg1x4", "vm44", "iUi", MergeNone, "aarch64_sme_" # n_suffix # "_write_za_vg1x4", [IsStreaming, IsInOutZA], []>; + + def NAME # _ZA32_VG1x2_I32 : Inst<"sv" # n_suffix # "_za32[_{d}]_vg1x2", "vm2", "iUif", MergeNone, "aarch64_sme_" # n_suffix # "_za32_vg1x2", [IsStreaming, IsInOutZA], []>; + def NAME # _ZA32_VG1X4_I32 : Inst<"sv" # n_suffix # "_za32[_{d}]_vg1x4", "vm4", "iUif", MergeNone, "aarch64_sme_" # n_suffix # "_za32_vg1x4", [IsStreaming, IsInOutZA], []>; + } + + let TargetGuard = "sme2,sme-i16i64" in { + def NAME # _WRITE_SINGLE_ZA64_VG1X2_I64 : Inst<"sv" # n_suffix # "_write[_single]_za64[_{d}]_vg1x2", "vm2d", "lUl", MergeNone, "aarch64_sme_" # n_suffix # "_write_single_za_vg1x2", [IsStreaming, IsInOutZA], []>; + def NAME # _WRITE_SINGLE_ZA64_VG1X4_I64 : Inst<"sv" # n_suffix # "_write[_single]_za64[_{d}]_vg1x4", "vm4d", "lUl", MergeNone, "aarch64_sme_" # n_suffix # "_write_single_za_vg1x4", [IsStreaming, IsInOutZA], []>; + + def NAME # _WRITE_ZA64_VG1x2_I64 : Inst<"sv" # n_suffix # "_write_za64[_{d}]_vg1x2", "vm22", "lUl", MergeNone, "aarch64_sme_" # n_suffix # "_write_za_vg1x2", [IsStreaming, IsInOutZA], []>; + def NAME # _WRITE_ZA64_VG1x4_I64 : Inst<"sv" # n_suffix # "_write_za64[_{d}]_vg1x4", "vm44", "lUl", MergeNone, "aarch64_sme_" # n_suffix # "_write_za_vg1x4", [IsStreaming, IsInOutZA], []>; + + def NAME # _ZA64_VG1X2_I64 : Inst<"sv" # n_suffix # "_za64[_{d}]_vg1x2", "vm2", "lUl", MergeNone, "aarch64_sme_" # n_suffix # "_za64_vg1x2", [IsStreaming, IsInOutZA], []>; + def NAME # _ZA64_VG1X4_I64 : Inst<"sv" # n_suffix # "_za64[_{d}]_vg1x4", "vm4", "lUl", MergeNone, "aarch64_sme_" # n_suffix # "_za64_vg1x4", [IsStreaming, IsInOutZA], []>; + } + + let TargetGuard = "sme2,sme-f64f64" in { + def NAME # _ZA64_VG1X2_F64 : Inst<"sv" # n_suffix # "_za64[_{d}]_vg1x2", "vm2", "d", MergeNone, "aarch64_sme_" # n_suffix # "_za64_vg1x2", [IsStreaming, IsInOutZA], []>; + def NAME # _ZA64_VG1X4_F64 : Inst<"sv" # n_suffix # "_za64[_{d}]_vg1x4", "vm4", "d", MergeNone, "aarch64_sme_" # n_suffix # "_za64_vg1x4", [IsStreaming, IsInOutZA], []>; + } +} + +defm SVADD : ZAAddSub<"add">; +defm SVSUB : ZAAddSub<"sub">; + +// SME2 - MOVA + +// +// Single, 2 and 4 vector-group read/write intrinsics. +// + +multiclass ZAWrite_VG<string n, string t, string i, list<ImmCheck> checks> { + def NAME # _VG2_H : Inst<"svwrite_hor_" # n # "[_{d}]_vg2", "vim2", t, MergeNone, i # "_hor_vg2", [IsInOutZA, IsStreaming], checks>; + def NAME # _VG2_V : Inst<"svwrite_ver_" # n # "[_{d}]_vg2", "vim2", t, MergeNone, i # "_ver_vg2", [IsInOutZA, IsStreaming], checks>; + def NAME # _VG4_H : Inst<"svwrite_hor_" # n # "[_{d}]_vg4", "vim4", t, MergeNone, i # "_hor_vg4", [IsInOutZA, IsStreaming], checks>; + def NAME # _VG4_V : Inst<"svwrite_ver_" # n # "[_{d}]_vg4", "vim4", t, MergeNone, i # "_ver_vg4", [IsInOutZA, IsStreaming], checks>; + def NAME # _VG1x2 : Inst<"svwrite_" # n # "[_{d}]_vg1x2", "vm2", t, MergeNone, i # "_vg1x2", [IsInOutZA, IsStreaming], []>; + def NAME # _VG1x4 : Inst<"svwrite_" # n # "[_{d}]_vg1x4", "vm4", t, MergeNone, i # "_vg1x4", [IsInOutZA, IsStreaming], []>; +} + +let TargetGuard = "sme2" in { + defm SVWRITE_ZA8 : ZAWrite_VG<"za8", "cUc", "aarch64_sme_write", [ImmCheck<0, ImmCheck0_0>]>; + defm SVWRITE_ZA16 : ZAWrite_VG<"za16", "sUshb", "aarch64_sme_write", [ImmCheck<0, ImmCheck0_1>]>; + defm SVWRITE_ZA32 : ZAWrite_VG<"za32", "iUif", "aarch64_sme_write", [ImmCheck<0, ImmCheck0_3>]>; + defm SVWRITE_ZA64 : ZAWrite_VG<"za64", "lUld", "aarch64_sme_write", [ImmCheck<0, ImmCheck0_7>]>; +} + +multiclass ZARead_VG<string n, string t, string i, list<ImmCheck> checks> { + def NAME # _VG2_H : Inst<"svread_hor_" # n # "_{d}_vg2", "2im", t, MergeNone, i # "_hor_vg2", [IsInZA, IsStreaming], checks>; + def NAME # _VG2_V : Inst<"svread_ver_" # n # "_{d}_vg2", "2im", t, MergeNone, i # "_ver_vg2", [IsInZA, IsStreaming], checks>; + def NAME # _VG4_H : Inst<"svread_hor_" # n # "_{d}_vg4", "4im", t, MergeNone, i # "_hor_vg4", [IsInZA, IsStreaming], checks>; + def NAME # _VG4_V : Inst<"svread_ver_" # n # "_{d}_vg4", "4im", t, MergeNone, i # "_ver_vg4", [IsInZA, IsStreaming], checks>; + def NAME # _VG1x2 : Inst<"svread_" # n # "_{d}_vg1x2", "2m", t, MergeNone, i # "_vg1x2", [IsInZA, IsStreaming], []>; + def NAME # _VG1x4 : Inst<"svread_" # n # "_{d}_vg1x4", "4m", t, MergeNone, i # "_vg1x4", [IsInZA, IsStreaming], []>; +} + +let TargetGuard = "sme2" in { + defm SVREAD_ZA8 : ZARead_VG<"za8", "cUc", "aarch64_sme_read", [ImmCheck<0, ImmCheck0_0>]>; + defm SVREAD_ZA16 : ZARead_VG<"za16", "sUshb", "aarch64_sme_read", [ImmCheck<0, ImmCheck0_1>]>; + defm SVREAD_ZA32 : ZARead_VG<"za32", "iUif", "aarch64_sme_read", [ImmCheck<0, ImmCheck0_3>]>; + defm SVREAD_ZA64 : ZARead_VG<"za64", "lUld", "aarch64_sme_read", [ImmCheck<0, ImmCheck0_7>]>; +} + +// +// Outer product and accumulate/subtract +// + +let TargetGuard = "sme2" in { + def SVSMOPA : Inst<"svmopa_za32[_{d}]_m", "viPPdd", "s", MergeNone, "aarch64_sme_smopa_za32", [IsInOutZA, IsStreaming], [ImmCheck<0, ImmCheck0_3>]>; + def SVUSMOPA : Inst<"svmopa_za32[_{d}]_m", "viPPdd", "Us", MergeNone, "aarch64_sme_umopa_za32", [IsInOutZA, IsStreaming], [ImmCheck<0, ImmCheck0_3>]>; + + def SVSMOPS : Inst<"svmops_za32[_{d}]_m", "viPPdd", "s", MergeNone, "aarch64_sme_smops_za32", [IsInOutZA, IsStreaming], [ImmCheck<0, ImmCheck0_3>]>; + def SVUSMOPS : Inst<"svmops_za32[_{d}]_m", "viPPdd", "Us", MergeNone, "aarch64_sme_umops_za32", [IsInOutZA, IsStreaming], [ImmCheck<0, ImmCheck0_3>]>; + + def SVBMOPA : Inst<"svbmopa_za32[_{d}]_m", "viPPdd", "iUi", MergeNone, "aarch64_sme_bmopa_za32", [IsInOutZA, IsStreaming], [ImmCheck<0, ImmCheck0_3>]>; + + def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNone, "aarch64_sme_bmops_za32", [IsInOutZA, IsStreaming], [ImmCheck<0, ImmCheck0_3>]>; + + // VERTICAL DOT-PRODUCT + def SVVDOT_LANE_ZA32_VG1x2_S : Inst<"svvdot_lane_za32[_{d}]_vg1x2", "vm2di", "s", MergeNone, "aarch64_sme_svdot_lane_za32_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVVDOT_LANE_ZA32_VG1x4_S : Inst<"svvdot_lane_za32[_{d}]_vg1x4", "vm4di", "c", MergeNone, "aarch64_sme_svdot_lane_za32_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVVDOT_LANE_ZA32_VG1x2_U : Inst<"svvdot_lane_za32[_{d}]_vg1x2", "vm2di", "Us", MergeNone, "aarch64_sme_uvdot_lane_za32_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVVDOT_LANE_ZA32_VG1x4_U : Inst<"svvdot_lane_za32[_{d}]_vg1x4", "vm4di", "Uc", MergeNone, "aarch64_sme_uvdot_lane_za32_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVVDOT_LANE_ZA32_VG1x2_F : Inst<"svvdot_lane_za32[_{d}]_vg1x2", "vm2di", "hb", MergeNone, "aarch64_sme_fvdot_lane_za32_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVSUVDOT_LANE_ZA32_VG1x4 : Inst<"svsuvdot_lane_za32[_{d}]_vg1x4", "vm4di", "c", MergeNone, "aarch64_sme_suvdot_lane_za32_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVUSVDOT_LANE_ZA32_VG1x4 : Inst<"svusvdot_lane_za32[_{d}]_vg1x4", "vm4di", "Uc", MergeNone, "aarch64_sme_usvdot_lane_za32_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + + // Multi-vector signed & unsigned integer dot-product + def SVDOT_MULTI_ZA32_VG1x2_S : Inst<"svdot_za32[_{d}]_vg1x2", "vm22", "cs", MergeNone, "aarch64_sme_sdot_za32_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVDOT_MULTI_ZA32_VG1x4_S : Inst<"svdot_za32[_{d}]_vg1x4", "vm44", "cs", MergeNone, "aarch64_sme_sdot_za32_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVDOT_MULTI_ZA32_VG1x2_U : Inst<"svdot_za32[_{d}]_vg1x2", "vm22", "UcUs", MergeNone, "aarch64_sme_udot_za32_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVDOT_MULTI_ZA32_VG1x4_U : Inst<"svdot_za32[_{d}]_vg1x4", "vm44", "UcUs", MergeNone, "aarch64_sme_udot_za32_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVDOT_SINGLE_ZA32_VG1x2_S : Inst<"svdot[_single]_za32[_{d}]_vg1x2", "vm2d", "cs", MergeNone, "aarch64_sme_sdot_single_za32_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVDOT_SINGLE_ZA32_VG1x4_S : Inst<"svdot[_single]_za32[_{d}]_vg1x4", "vm4d", "cs", MergeNone, "aarch64_sme_sdot_single_za32_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVDOT_SINGLE_ZA32_VG1x2_U : Inst<"svdot[_single]_za32[_{d}]_vg1x2", "vm2d", "UcUs", MergeNone, "aarch64_sme_udot_single_za32_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVDOT_SINGLE_ZA32_VG1x4_U : Inst<"svdot[_single]_za32[_{d}]_vg1x4", "vm4d", "UcUs", MergeNone, "aarch64_sme_udot_single_za32_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVDOT_LANE_ZA32_VG1x2_S : Inst<"svdot_lane_za32[_{d}]_vg1x2", "vm2di", "cs", MergeNone, "aarch64_sme_sdot_lane_za32_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVDOT_LANE_ZA32_VG1x4_S : Inst<"svdot_lane_za32[_{d}]_vg1x4", "vm4di", "cs", MergeNone, "aarch64_sme_sdot_lane_za32_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVDOT_LANE_ZA32_VG1x2_U : Inst<"svdot_lane_za32[_{d}]_vg1x2", "vm2di", "UcUs", MergeNone, "aarch64_sme_udot_lane_za32_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVDOT_LANE_ZA32_VG1x4_U : Inst<"svdot_lane_za32[_{d}]_vg1x4", "vm4di", "UcUs", MergeNone, "aarch64_sme_udot_lane_za32_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + + def SVUSDOT_SINGLE_ZA32_VG1x2 : Inst<"svusdot[_single]_za32[_{d}]_vg1x2", "vm2.dx", "Uc", MergeNone, "aarch64_sme_usdot_single_za32_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVUSDOT_SINGLE_ZA32_VG1x4 : Inst<"svusdot[_single]_za32[_{d}]_vg1x4", "vm4.dx", "Uc", MergeNone, "aarch64_sme_usdot_single_za32_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVUSDOT_MULTI_ZA32_VG1x2 : Inst<"svusdot_za32[_{d}]_vg1x2", "vm2.d2.x", "Uc", MergeNone, "aarch64_sme_usdot_za32_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVUSDOT_MULTI_ZA32_VG1x4 : Inst<"svusdot_za32[_{d}]_vg1x4", "vm4.d4.x", "Uc", MergeNone, "aarch64_sme_usdot_za32_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVUSDOT_LANE_ZA32_VG1x2 : Inst<"svusdot_lane_za32[_{d}]_vg1x2", "vm2.dxi", "Uc", MergeNone, "aarch64_sme_usdot_lane_za32_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVUSDOT_LANE_ZA32_VG1x4 : Inst<"svusdot_lane_za32[_{d}]_vg1x4", "vm4.dxi", "Uc", MergeNone, "aarch64_sme_usdot_lane_za32_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + + def SVSUDOT_SINGLE_ZA32_VG1x2 : Inst<"svsudot[_single]_za32[_{d}]_vg1x2", "vm2.du", "c", MergeNone, "aarch64_sme_sudot_single_za32_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVSUDOT_SINGLE_ZA32_VG1x4 : Inst<"svsudot[_single]_za32[_{d}]_vg1x4", "vm4.du", "c", MergeNone, "aarch64_sme_sudot_single_za32_vg1x4", [IsStreaming, IsInOutZA], []>; + + // Multi-multi sudot builtins are mapped to usdot, with zn & zm operands swapped + def SVSUDOT_MULTI_ZA32_VG1x2 : Inst<"svsudot_za32[_{d}]_vg1x2", "vm2.d2.u", "c", MergeNone, "aarch64_sme_usdot_za32_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVSUDOT_MULTI_ZA32_VG1x4 : Inst<"svsudot_za32[_{d}]_vg1x4", "vm4.d4.u", "c", MergeNone, "aarch64_sme_usdot_za32_vg1x4", [IsStreaming, IsInOutZA], []>; + + def SVSUDOT_LANE_ZA32_VG1x2 : Inst<"svsudot_lane_za32[_{d}]_vg1x2", "vm2.dui", "c", MergeNone, "aarch64_sme_sudot_lane_za32_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVSUDOT_LANE_ZA32_VG1x4 : Inst<"svsudot_lane_za32[_{d}]_vg1x4", "vm4.dui", "c", MergeNone, "aarch64_sme_sudot_lane_za32_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + + // Multi-vector half-precision/BFloat16 floating-point dot-product + def SVDOT_MULTI_ZA32_VG1x2_F16 : Inst<"svdot_za32[_{d}]_vg1x2", "vm22", "bh", MergeNone, "aarch64_sme_fdot_za32_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVDOT_MULTI_ZA32_VG1x4_F16 : Inst<"svdot_za32[_{d}]_vg1x4", "vm44", "bh", MergeNone, "aarch64_sme_fdot_za32_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVDOT_SINGLE_ZA32_VG1x2_F16 : Inst<"svdot[_single]_za32[_{d}]_vg1x2", "vm2d", "bh", MergeNone, "aarch64_sme_fdot_single_za32_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVDOT_SINGLE_ZA32_VG1x4_F16 : Inst<"svdot[_single]_za32[_{d}]_vg1x4", "vm4d", "bh", MergeNone, "aarch64_sme_fdot_single_za32_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVDOT_LANE_ZA32_VG1x2_F16 : Inst<"svdot_lane_za32[_{d}]_vg1x2", "vm2di", "bh", MergeNone, "aarch64_sme_fdot_lane_za32_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVDOT_LANE_ZA32_VG1x4_F16 : Inst<"svdot_lane_za32[_{d}]_vg1x4", "vm4di", "bh", MergeNone, "aarch64_sme_fdot_lane_za32_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; +} + +let TargetGuard = "sme2,sme-i16i64" in { + def SVVDOT_LANE_ZA64_VG1x4_S : Inst<"svvdot_lane_za64[_{d}]_vg1x4", "vm4di", "s", MergeNone, "aarch64_sme_svdot_lane_za64_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>; + def SVVDOT_LANE_ZA64_VG1x4_U : Inst<"svvdot_lane_za64[_{d}]_vg1x4", "vm4di", "Us", MergeNone, "aarch64_sme_uvdot_lane_za64_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>; + + def SVDOT_MULTI_ZA64_VG1x2_S16 : Inst<"svdot_za64[_{d}]_vg1x2", "vm22", "s", MergeNone, "aarch64_sme_sdot_za64_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVDOT_MULTI_ZA64_VG1x4_S16 : Inst<"svdot_za64[_{d}]_vg1x4", "vm44", "s", MergeNone, "aarch64_sme_sdot_za64_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVDOT_MULTI_ZA64_VG1x2_U16 : Inst<"svdot_za64[_{d}]_vg1x2", "vm22", "Us", MergeNone, "aarch64_sme_udot_za64_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVDOT_MULTI_ZA64_VG1x4_U16 : Inst<"svdot_za64[_{d}]_vg1x4", "vm44", "Us", MergeNone, "aarch64_sme_udot_za64_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVDOT_SINGLE_ZA64_VG1x2_S16 : Inst<"svdot[_single]_za64[_{d}]_vg1x2", "vm2d", "s", MergeNone, "aarch64_sme_sdot_single_za64_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVDOT_SINGLE_ZA64_VG1x4_S16 : Inst<"svdot[_single]_za64[_{d}]_vg1x4", "vm4d", "s", MergeNone, "aarch64_sme_sdot_single_za64_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVDOT_SINGLE_ZA64_VG1x2_U16 : Inst<"svdot[_single]_za64[_{d}]_vg1x2", "vm2d", "Us", MergeNone, "aarch64_sme_udot_single_za64_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVDOT_SINGLE_ZA64_VG1x4_U16 : Inst<"svdot[_single]_za64[_{d}]_vg1x4", "vm4d", "Us", MergeNone, "aarch64_sme_udot_single_za64_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVDOT_LANE_ZA64_VG1x2_S16 : Inst<"svdot_lane_za64[_{d}]_vg1x2", "vm2di", "s", MergeNone, "aarch64_sme_sdot_lane_za64_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>; + def SVDOT_LANE_ZA64_VG1x4_S16 : Inst<"svdot_lane_za64[_{d}]_vg1x4", "vm4di", "s", MergeNone, "aarch64_sme_sdot_lane_za64_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>; + def SVDOT_LANE_ZA64_VG1x2_U16 : Inst<"svdot_lane_za64[_{d}]_vg1x2", "vm2di", "Us", MergeNone, "aarch64_sme_udot_lane_za64_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>; + def SVDOT_LANE_ZA64_VG1x4_U16 : Inst<"svdot_lane_za64[_{d}]_vg1x4", "vm4di", "Us", MergeNone, "aarch64_sme_udot_lane_za64_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>; +} + +// FMLA/FMLS +let TargetGuard = "sme2" in { + def SVMLA_MULTI_VG1x2_F32 : Inst<"svmla_za32[_{d}]_vg1x2", "vm22", "f", MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVMLA_MULTI_VG1x4_F32 : Inst<"svmla_za32[_{d}]_vg1x4", "vm44", "f", MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVMLS_MULTI_VG1x2_F32 : Inst<"svmls_za32[_{d}]_vg1x2", "vm22", "f", MergeNone, "aarch64_sme_fmls_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVMLS_MULTI_VG1x4_F32 : Inst<"svmls_za32[_{d}]_vg1x4", "vm44", "f", MergeNone, "aarch64_sme_fmls_vg1x4", [IsStreaming, IsInOutZA], []>; + + def SVMLA_SINGLE_VG1x2_F32 : Inst<"svmla[_single]_za32[_{d}]_vg1x2", "vm2d", "f", MergeNone, "aarch64_sme_fmla_single_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVMLA_SINGLE_VG1x4_F32 : Inst<"svmla[_single]_za32[_{d}]_vg1x4", "vm4d", "f", MergeNone, "aarch64_sme_fmla_single_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVMLS_SINGLE_VG1x2_F32 : Inst<"svmls[_single]_za32[_{d}]_vg1x2", "vm2d", "f", MergeNone, "aarch64_sme_fmls_single_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVMLS_SINGLE_VG1x4_F32 : Inst<"svmls[_single]_za32[_{d}]_vg1x4", "vm4d", "f", MergeNone, "aarch64_sme_fmls_single_vg1x4", [IsStreaming, IsInOutZA], []>; + + def SVMLA_LANE_VG1x2_F32 : Inst<"svmla_lane_za32[_{d}]_vg1x2", "vm2di", "f", MergeNone, "aarch64_sme_fmla_lane_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVMLA_LANE_VG1x4_F32 : Inst<"svmla_lane_za32[_{d}]_vg1x4", "vm4di", "f", MergeNone, "aarch64_sme_fmla_lane_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVMLS_LANE_VG1x2_F32 : Inst<"svmls_lane_za32[_{d}]_vg1x2", "vm2di", "f", MergeNone, "aarch64_sme_fmls_lane_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; + def SVMLS_LANE_VG1x4_F32 : Inst<"svmls_lane_za32[_{d}]_vg1x4", "vm4di", "f", MergeNone, "aarch64_sme_fmls_lane_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>; +} + +let TargetGuard = "sme2,sme-f64f64" in { + def SVMLA_MULTI_VG1x2_F64 : Inst<"svmla_za64[_{d}]_vg1x2", "vm22", "d", MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVMLA_MULTI_VG1x4_F64 : Inst<"svmla_za64[_{d}]_vg1x4", "vm44", "d", MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVMLS_MULTI_VG1x2_F64 : Inst<"svmls_za64[_{d}]_vg1x2", "vm22", "d", MergeNone, "aarch64_sme_fmls_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVMLS_MULTI_VG1x4_F64 : Inst<"svmls_za64[_{d}]_vg1x4", "vm44", "d", MergeNone, "aarch64_sme_fmls_vg1x4", [IsStreaming, IsInOutZA], []>; + + def SVMLA_SINGLE_VG1x2_F64 : Inst<"svmla[_single]_za64[_{d}]_vg1x2", "vm2d", "d", MergeNone, "aarch64_sme_fmla_single_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVMLA_SINGLE_VG1x4_F64 : Inst<"svmla[_single]_za64[_{d}]_vg1x4", "vm4d", "d", MergeNone, "aarch64_sme_fmla_single_vg1x4", [IsStreaming, IsInOutZA], []>; + def SVMLS_SINGLE_VG1x2_F64 : Inst<"svmls[_single]_za64[_{d}]_vg1x2", "vm2d", "d", MergeNone, "aarch64_sme_fmls_single_vg1x2", [IsStreaming, IsInOutZA], []>; + def SVMLS_SINGLE_VG1x4_F64 : Inst<"svmls[_single]_za64[_{d}]_vg1x4", "vm4d", "d", MergeNone, "aarch64_sme_fmls_single_vg1x4", [IsStreaming, IsInOutZA], []>; + + def SVMLA_LANE_VG1x2_F64 : Inst<"svmla_lane_za64[_{d}]_vg1x2", "vm2di", "d", MergeNone, "aarch64_sme_fmla_lane_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>; + def SVMLA_LANE_VG1x4_F64 : Inst<"svmla_lane_za64[_{d}]_vg1x4", "vm4di", "d", MergeNone, "aarch64_sme_fmla_lane_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>; + def SVMLS_LANE_VG1x2_F64 : Inst<"svmls_lane_za64[_{d}]_vg1x2", "vm2di", "d", MergeNone, "aarch64_sme_fmls_lane_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>; + def SVMLS_LANE_VG1x4_F64 : Inst<"svmls_lane_za64[_{d}]_vg1x4", "vm4di", "d", MergeNone, "aarch64_sme_fmls_lane_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>; +} + +// FMLAL/FMLSL/UMLAL/SMLAL +// SMLALL/UMLALL/USMLALL/SUMLALL +let TargetGuard = "sme2" in { + // MULTI MLAL + def SVMLAL_MULTI_VG2x2_F16 : Inst<"svmla_za32[_{d}]_vg2x2", "vm22", "bh", MergeNone, "aarch64_sme_fmlal_vg2x2", [IsStreaming, IsInOutZA], []>; + def SVMLAL_MULTI_VG2x4_F16 : Inst<"svmla_za32[_{d}]_vg2x4", "vm44", "bh", MergeNone, "aarch64_sme_fmlal_vg2x4", [IsStreaming, IsInOutZA], []>; + def SVMLAL_MULTI_VG2x2_S16 : Inst<"svmla_za32[_{d}]_vg2x2", "vm22", "s", MergeNone, "aarch64_sme_smlal_vg2x2", [IsStreaming, IsInOutZA], []>; + def SVMLAL_MULTI_VG2x4_S16 : Inst<"svmla_za32[_{d}]_vg2x4", "vm44", "s", MergeNone, "aarch64_sme_smlal_vg2x4", [IsStreaming, IsInOutZA], []>; + def SVMLAL_MULTI_VG2x2_U16 : Inst<"svmla_za32[_{d}]_vg2x2", "vm22", "Us", MergeNone, "aarch64_sme_umlal_vg2x2", [IsStreaming, IsInOutZA], []>; + def SVMLAL_MULTI_VG2x4_U16 : Inst<"svmla_za32[_{d}]_vg2x4", "vm44", "Us", MergeNone, "aarch64_sme_umlal_vg2x4", [IsStreaming, IsInOutZA], []>; + + def SVMLAL_MULTI_VG4x2_S8 : Inst<"svmla_za32[_{d}]_vg4x2", "vm22", "c", MergeNone, "aarch64_sme_smla_za32_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLAL_MULTI_VG4x2_U8 : Inst<"svmla_za32[_{d}]_vg4x2", "vm22", "Uc", MergeNone, "aarch64_sme_umla_za32_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLAL_MULTI_VG4x4_S8 : Inst<"svmla_za32[_{d}]_vg4x4", "vm44", "c", MergeNone, "aarch64_sme_smla_za32_vg4x4", [IsStreaming, IsInOutZA], []>; + def SVMLAL_MULTI_VG4x4_U8 : Inst<"svmla_za32[_{d}]_vg4x4", "vm44", "Uc", MergeNone, "aarch64_sme_umla_za32_vg4x4", [IsStreaming, IsInOutZA], []>; + + // MULTI MLSL + def SVMLSL_MULTI_VG2x2_F16 : Inst<"svmls_za32[_{d}]_vg2x2", "vm22", "bh", MergeNone, "aarch64_sme_fmlsl_vg2x2", [IsStreaming, IsInOutZA], []>; + def SVMLSL_MULTI_VG2x4_F16 : Inst<"svmls_za32[_{d}]_vg2x4", "vm44", "bh", MergeNone, "aarch64_sme_fmlsl_vg2x4", [IsStreaming, IsInOutZA], []>; + def SVMLSL_MULTI_VG2x2_S16 : Inst<"svmls_za32[_{d}]_vg2x2", "vm22", "s", MergeNone, "aarch64_sme_smlsl_vg2x2", [IsStreaming, IsInOutZA], []>; + def SVMLSL_MULTI_VG2x4_S16 : Inst<"svmls_za32[_{d}]_vg2x4", "vm44", "s", MergeNone, "aarch64_sme_smlsl_vg2x4", [IsStreaming, IsInOutZA], []>; + def SVMLSL_MULTI_VG2x2_U16 : Inst<"svmls_za32[_{d}]_vg2x2", "vm22", "Us", MergeNone, "aarch64_sme_umlsl_vg2x2", [IsStreaming, IsInOutZA], []>; + def SVMLSL_MULTI_VG2x4_U16 : Inst<"svmls_za32[_{d}]_vg2x4", "vm44", "Us", MergeNone, "aarch64_sme_umlsl_vg2x4", [IsStreaming, IsInOutZA], []>; + + def SVMLSL_MULTI_VG4x2_S8 : Inst<"svmls_za32[_{d}]_vg4x2", "vm22", "c", MergeNone, "aarch64_sme_smls_za32_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLSL_MULTI_VG4x2_U8 : Inst<"svmls_za32[_{d}]_vg4x2", "vm22", "Uc", MergeNone, "aarch64_sme_umls_za32_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLSL_MULTI_VG4x4_S8 : Inst<"svmls_za32[_{d}]_vg4x4", "vm44", "c", MergeNone, "aarch64_sme_smls_za32_vg4x4", [IsStreaming, IsInOutZA], []>; + def SVMLSL_MULTI_VG4x4_U8 : Inst<"svmls_za32[_{d}]_vg4x4", "vm44", "Uc", MergeNone, "aarch64_sme_umls_za32_vg4x4", [IsStreaming, IsInOutZA], []>; + + // SINGLE MLAL + def SVMLAL_SINGLE_VG2x1_F16 : Inst<"svmla_za32[_{d}]_vg2x1", "vmdd", "bh", MergeNone, "aarch64_sme_fmlal_single_vg2x1", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG2x2_F16 : Inst<"svmla[_single]_za32[_{d}]_vg2x2", "vm2d", "bh", MergeNone, "aarch64_sme_fmlal_single_vg2x2", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG2x4_F16 : Inst<"svmla[_single]_za32[_{d}]_vg2x4", "vm4d", "bh", MergeNone, "aarch64_sme_fmlal_single_vg2x4", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG2x1_S16 : Inst<"svmla_za32[_{d}]_vg2x1", "vmdd", "s", MergeNone, "aarch64_sme_smlal_single_vg2x1", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG2x2_S16 : Inst<"svmla[_single]_za32[_{d}]_vg2x2", "vm2d", "s", MergeNone, "aarch64_sme_smlal_single_vg2x2", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG2x4_S16 : Inst<"svmla[_single]_za32[_{d}]_vg2x4", "vm4d", "s", MergeNone, "aarch64_sme_smlal_single_vg2x4", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG2x1_U16 : Inst<"svmla_za32[_{d}]_vg2x1", "vmdd", "Us", MergeNone, "aarch64_sme_umlal_single_vg2x1", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG2x2_U16 : Inst<"svmla[_single]_za32[_{d}]_vg2x2", "vm2d", "Us", MergeNone, "aarch64_sme_umlal_single_vg2x2", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG2x4_U16 : Inst<"svmla[_single]_za32[_{d}]_vg2x4", "vm4d", "Us", MergeNone, "aarch64_sme_umlal_single_vg2x4", [IsStreaming, IsInOutZA], []>; + + def SVMLAL_SINGLE_VG4x1_S8 : Inst<"svmla_za32[_{d}]_vg4x1", "vmdd", "c", MergeNone, "aarch64_sme_smla_za32_single_vg4x1", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG4x1_U8 : Inst<"svmla_za32[_{d}]_vg4x1", "vmdd", "Uc", MergeNone, "aarch64_sme_umla_za32_single_vg4x1", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG4x2_S8 : Inst<"svmla[_single]_za32[_{d}]_vg4x2", "vm2d", "c", MergeNone, "aarch64_sme_smla_za32_single_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG4x2_U8 : Inst<"svmla[_single]_za32[_{d}]_vg4x2", "vm2d", "Uc", MergeNone, "aarch64_sme_umla_za32_single_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG4x4_S8 : Inst<"svmla[_single]_za32[_{d}]_vg4x4", "vm4d", "c", MergeNone, "aarch64_sme_smla_za32_single_vg4x4", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG4x4_U8 : Inst<"svmla[_single]_za32[_{d}]_vg4x4", "vm4d", "Uc", MergeNone, "aarch64_sme_umla_za32_single_vg4x4", [IsStreaming, IsInOutZA], []>; + + // SINGLE MLSL + def SVMLSL_SINGLE_VG2x1_F16 : Inst<"svmls_za32[_{d}]_vg2x1", "vmdd", "bh", MergeNone, "aarch64_sme_fmlsl_single_vg2x1", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG2x2_F16 : Inst<"svmls[_single]_za32[_{d}]_vg2x2", "vm2d", "bh", MergeNone, "aarch64_sme_fmlsl_single_vg2x2", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG2x4_F16 : Inst<"svmls[_single]_za32[_{d}]_vg2x4", "vm4d", "bh", MergeNone, "aarch64_sme_fmlsl_single_vg2x4", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG2x1_S16 : Inst<"svmls_za32[_{d}]_vg2x1", "vmdd", "s", MergeNone, "aarch64_sme_smlsl_single_vg2x1", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG2x2_S16 : Inst<"svmls[_single]_za32[_{d}]_vg2x2", "vm2d", "s", MergeNone, "aarch64_sme_smlsl_single_vg2x2", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG2x4_S16 : Inst<"svmls[_single]_za32[_{d}]_vg2x4", "vm4d", "s", MergeNone, "aarch64_sme_smlsl_single_vg2x4", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG2x1_U16 : Inst<"svmls_za32[_{d}]_vg2x1", "vmdd", "Us", MergeNone, "aarch64_sme_umlsl_single_vg2x1", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG2x2_U16 : Inst<"svmls[_single]_za32[_{d}]_vg2x2", "vm2d", "Us", MergeNone, "aarch64_sme_umlsl_single_vg2x2", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG2x4_U16 : Inst<"svmls[_single]_za32[_{d}]_vg2x4", "vm4d", "Us", MergeNone, "aarch64_sme_umlsl_single_vg2x4", [IsStreaming, IsInOutZA], []>; + + def SVMLSL_SINGLE_VG4x1_S8 : Inst<"svmls_za32[_{d}]_vg4x1", "vmdd", "c", MergeNone, "aarch64_sme_smls_za32_single_vg4x1", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG4x1_U8 : Inst<"svmls_za32[_{d}]_vg4x1", "vmdd", "Uc", MergeNone, "aarch64_sme_umls_za32_single_vg4x1", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG4x2_S8 : Inst<"svmls[_single]_za32[_{d}]_vg4x2", "vm2d", "c", MergeNone, "aarch64_sme_smls_za32_single_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG4x2_U8 : Inst<"svmls[_single]_za32[_{d}]_vg4x2", "vm2d", "Uc", MergeNone, "aarch64_sme_umls_za32_single_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG4x4_S8 : Inst<"svmls[_single]_za32[_{d}]_vg4x4", "vm4d", "c", MergeNone, "aarch64_sme_smls_za32_single_vg4x4", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG4x4_U8 : Inst<"svmls[_single]_za32[_{d}]_vg4x4", "vm4d", "Uc", MergeNone, "aarch64_sme_umls_za32_single_vg4x4", [IsStreaming, IsInOutZA], []>; + + // INDEXED MLAL + def SVMLAL_LANE_VG2x1_F16 : Inst<"svmla_lane_za32[_{d}]_vg2x1", "vmddi", "bh", MergeNone, "aarch64_sme_fmlal_lane_vg2x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLAL_LANE_VG2x2_F16 : Inst<"svmla_lane_za32[_{d}]_vg2x2", "vm2di", "bh", MergeNone, "aarch64_sme_fmlal_lane_vg2x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLAL_LANE_VG2x4_F16 : Inst<"svmla_lane_za32[_{d}]_vg2x4", "vm4di", "bh", MergeNone, "aarch64_sme_fmlal_lane_vg2x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLAL_LANE_VG2x1_S16 : Inst<"svmla_lane_za32[_{d}]_vg2x1", "vmddi", "s", MergeNone, "aarch64_sme_smlal_lane_vg2x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLAL_LANE_VG2x2_S16 : Inst<"svmla_lane_za32[_{d}]_vg2x2", "vm2di", "s", MergeNone, "aarch64_sme_smlal_lane_vg2x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLAL_LANE_VG2x4_S16 : Inst<"svmla_lane_za32[_{d}]_vg2x4", "vm4di", "s", MergeNone, "aarch64_sme_smlal_lane_vg2x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLAL_LANE_VG2x1_U16 : Inst<"svmla_lane_za32[_{d}]_vg2x1", "vmddi", "Us", MergeNone, "aarch64_sme_umlal_lane_vg2x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLAL_LANE_VG2x2_U16 : Inst<"svmla_lane_za32[_{d}]_vg2x2", "vm2di", "Us", MergeNone, "aarch64_sme_umlal_lane_vg2x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLAL_LANE_VG2x4_U16 : Inst<"svmla_lane_za32[_{d}]_vg2x4", "vm4di", "Us", MergeNone, "aarch64_sme_umlal_lane_vg2x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + + def SVMLAL_LANE_VG4x1_S8 : Inst<"svmla_lane_za32[_{d}]_vg4x1", "vmddi", "c", MergeNone, "aarch64_sme_smla_za32_lane_vg4x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + def SVMLAL_LANE_VG4x1_U8 : Inst<"svmla_lane_za32[_{d}]_vg4x1", "vmddi", "Uc", MergeNone, "aarch64_sme_umla_za32_lane_vg4x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + def SVMLAL_LANE_VG4x2_S8 : Inst<"svmla_lane_za32[_{d}]_vg4x2", "vm2di", "c", MergeNone, "aarch64_sme_smla_za32_lane_vg4x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + def SVMLAL_LANE_VG4x2_U8 : Inst<"svmla_lane_za32[_{d}]_vg4x2", "vm2di", "Uc", MergeNone, "aarch64_sme_umla_za32_lane_vg4x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + def SVMLAL_LANE_VG4x4_S8 : Inst<"svmla_lane_za32[_{d}]_vg4x4", "vm4di", "c", MergeNone, "aarch64_sme_smla_za32_lane_vg4x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + def SVMLAL_LANE_VG4x4_U8 : Inst<"svmla_lane_za32[_{d}]_vg4x4", "vm4di", "Uc", MergeNone, "aarch64_sme_umla_za32_lane_vg4x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + + // INDEXED MLSL + def SVMLSL_LANE_VG2x1_F16 : Inst<"svmls_lane_za32[_{d}]_vg2x1", "vmddi", "bh", MergeNone, "aarch64_sme_fmlsl_lane_vg2x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLSL_LANE_VG2x2_F16 : Inst<"svmls_lane_za32[_{d}]_vg2x2", "vm2di", "bh", MergeNone, "aarch64_sme_fmlsl_lane_vg2x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLSL_LANE_VG2x4_F16 : Inst<"svmls_lane_za32[_{d}]_vg2x4", "vm4di", "bh", MergeNone, "aarch64_sme_fmlsl_lane_vg2x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLSL_LANE_VG2x1_S16 : Inst<"svmls_lane_za32[_{d}]_vg2x1", "vmddi", "s", MergeNone, "aarch64_sme_smlsl_lane_vg2x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLSL_LANE_VG2x2_S16 : Inst<"svmls_lane_za32[_{d}]_vg2x2", "vm2di", "s", MergeNone, "aarch64_sme_smlsl_lane_vg2x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLSL_LANE_VG2x4_S16 : Inst<"svmls_lane_za32[_{d}]_vg2x4", "vm4di", "s", MergeNone, "aarch64_sme_smlsl_lane_vg2x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLSL_LANE_VG2x1_U16 : Inst<"svmls_lane_za32[_{d}]_vg2x1", "vmddi", "Us", MergeNone, "aarch64_sme_umlsl_lane_vg2x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLSL_LANE_VG2x2_U16 : Inst<"svmls_lane_za32[_{d}]_vg2x2", "vm2di", "Us", MergeNone, "aarch64_sme_umlsl_lane_vg2x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLSL_LANE_VG2x4_U16 : Inst<"svmls_lane_za32[_{d}]_vg2x4", "vm4di", "Us", MergeNone, "aarch64_sme_umlsl_lane_vg2x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + + def SVMLSL_LANE_VG4x1_S8 : Inst<"svmls_lane_za32[_{d}]_vg4x1", "vmddi", "c", MergeNone, "aarch64_sme_smls_za32_lane_vg4x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + def SVMLSL_LANE_VG4x1_U8 : Inst<"svmls_lane_za32[_{d}]_vg4x1", "vmddi", "Uc", MergeNone, "aarch64_sme_umls_za32_lane_vg4x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + def SVMLSL_LANE_VG4x2_S8 : Inst<"svmls_lane_za32[_{d}]_vg4x2", "vm2di", "c", MergeNone, "aarch64_sme_smls_za32_lane_vg4x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + def SVMLSL_LANE_VG4x2_U8 : Inst<"svmls_lane_za32[_{d}]_vg4x2", "vm2di", "Uc", MergeNone, "aarch64_sme_umls_za32_lane_vg4x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + def SVMLSL_LANE_VG4x4_S8 : Inst<"svmls_lane_za32[_{d}]_vg4x4", "vm4di", "c", MergeNone, "aarch64_sme_smls_za32_lane_vg4x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + def SVMLSL_LANE_VG4x4_U8 : Inst<"svmls_lane_za32[_{d}]_vg4x4", "vm4di", "Uc", MergeNone, "aarch64_sme_umls_za32_lane_vg4x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + + // SINGLE SUMLALL + // Single sumla maps to usmla, with zn & zm operands swapped + def SVSUMLALL_SINGLE_VG4x1 : Inst<"svsumla_za32[_{d}]_vg4x1", "vmdu", "c", MergeNone, "aarch64_sme_usmla_za32_single_vg4x1", [IsStreaming, IsInOutZA], []>; + + def SVSUMLALL_SINGLE_VG4x2 : Inst<"svsumla[_single]_za32[_{d}]_vg4x2", "vm2.du", "c", MergeNone, "aarch64_sme_sumla_za32_single_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVSUMLALL_SINGLE_VG4x4 : Inst<"svsumla[_single]_za32[_{d}]_vg4x4", "vm4.du", "c", MergeNone, "aarch64_sme_sumla_za32_single_vg4x4", [IsStreaming, IsInOutZA], []>; + + // Multi-multi sumla builtins are mapped to usmla, with zn & zm operands swapped + def SVSUMLALL_MULTI_VG4x2 : Inst<"svsumla_za32[_{d}]_vg4x2", "vm2.d2.u", "c", MergeNone, "aarch64_sme_usmla_za32_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVSUMLALL_MULTI_VG4x4 : Inst<"svsumla_za32[_{d}]_vg4x4", "vm4.d4.u", "c", MergeNone, "aarch64_sme_usmla_za32_vg4x4", [IsStreaming, IsInOutZA], []>; + + // INDEXED SUMLALL + def SVSUMLALL_LANE_VG4x1 : Inst<"svsumla_lane_za32[_{d}]_vg4x1", "vmdui", "c", MergeNone, "aarch64_sme_sumla_za32_lane_vg4x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + def SVSUMLALL_LANE_VG4x2 : Inst<"svsumla_lane_za32[_{d}]_vg4x2", "vm2ui", "c", MergeNone, "aarch64_sme_sumla_za32_lane_vg4x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + def SVSUMLALL_LANE_VG4x4 : Inst<"svsumla_lane_za32[_{d}]_vg4x4", "vm4ui", "c", MergeNone, "aarch64_sme_sumla_za32_lane_vg4x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + + // SINGLE USMLALL + def SVUSMLALL_SINGLE_VG4x1 : Inst<"svusmla_za32[_{d}]_vg4x1", "vmdx", "Uc", MergeNone, "aarch64_sme_usmla_za32_single_vg4x1", [IsStreaming, IsInOutZA], []>; + def SVUSMLALL_SINGLE_VG4x2 : Inst<"svusmla[_single]_za32[_{d}]_vg4x2", "vm2.dx", "Uc", MergeNone, "aarch64_sme_usmla_za32_single_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVUSMLALL_SINGLE_VG4x4 : Inst<"svusmla[_single]_za32[_{d}]_vg4x4", "vm4.dx", "Uc", MergeNone, "aarch64_sme_usmla_za32_single_vg4x4", [IsStreaming, IsInOutZA], []>; + + // MULTI USMLALL + def SVUSMLALL_MULTI_VG4x2 : Inst<"svusmla_za32[_{d}]_vg4x2", "vm2.d2.x", "Uc", MergeNone, "aarch64_sme_usmla_za32_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVUSMLALL_MULTI_VG4x4 : Inst<"svusmla_za32[_{d}]_vg4x4", "vm4.d4.x", "Uc", MergeNone, "aarch64_sme_usmla_za32_vg4x4", [IsStreaming, IsInOutZA], []>; + + // INDEXED USMLALL + def SVUSMLALL_LANE_VG4x1 : Inst<"svusmla_lane_za32[_{d}]_vg4x1", "vmdxi", "Uc", MergeNone, "aarch64_sme_usmla_za32_lane_vg4x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + def SVUSMLALL_LANE_VG4x2 : Inst<"svusmla_lane_za32[_{d}]_vg4x2", "vm2xi", "Uc", MergeNone, "aarch64_sme_usmla_za32_lane_vg4x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; + def SVUSMLALL_LANE_VG4x4 : Inst<"svusmla_lane_za32[_{d}]_vg4x4", "vm4xi", "Uc", MergeNone, "aarch64_sme_usmla_za32_lane_vg4x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_15>]>; +} + +let TargetGuard = "sme2,sme-i16i64" in { + // MULTI MLAL + def SVMLAL_MULTI_VG4x2_S16 : Inst<"svmla_za64[_{d}]_vg4x2", "vm22", "s", MergeNone, "aarch64_sme_smla_za64_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLAL_MULTI_VG4x2_U16 : Inst<"svmla_za64[_{d}]_vg4x2", "vm22", "Us", MergeNone, "aarch64_sme_umla_za64_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLAL_MULTI_VG4x4_S16 : Inst<"svmla_za64[_{d}]_vg4x4", "vm44", "s", MergeNone, "aarch64_sme_smla_za64_vg4x4", [IsStreaming, IsInOutZA], []>; + def SVMLAL_MULTI_VG4x4_U16 : Inst<"svmla_za64[_{d}]_vg4x4", "vm44", "Us", MergeNone, "aarch64_sme_umla_za64_vg4x4", [IsStreaming, IsInOutZA], []>; + + // MULTI MLSL + def SVMLSL_MULTI_VG4x2_S16 : Inst<"svmls_za64[_{d}]_vg4x2", "vm22", "s", MergeNone, "aarch64_sme_smls_za64_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLSL_MULTI_VG4x2_U16 : Inst<"svmls_za64[_{d}]_vg4x2", "vm22", "Us", MergeNone, "aarch64_sme_umls_za64_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLSL_MULTI_VG4x4_S16 : Inst<"svmls_za64[_{d}]_vg4x4", "vm44", "s", MergeNone, "aarch64_sme_smls_za64_vg4x4", [IsStreaming, IsInOutZA], []>; + def SVMLSL_MULTI_VG4x4_U16 : Inst<"svmls_za64[_{d}]_vg4x4", "vm44", "Us", MergeNone, "aarch64_sme_umls_za64_vg4x4", [IsStreaming, IsInOutZA], []>; + + // SINGLE MLAL + def SVMLAL_SINGLE_VG4x1_S16 : Inst<"svmla_za64[_{d}]_vg4x1", "vmdd", "s", MergeNone, "aarch64_sme_smla_za64_single_vg4x1", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG4x1_U16 : Inst<"svmla_za64[_{d}]_vg4x1", "vmdd", "Us", MergeNone, "aarch64_sme_umla_za64_single_vg4x1", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG4x2_S16 : Inst<"svmla[_single]_za64[_{d}]_vg4x2", "vm2d", "s", MergeNone, "aarch64_sme_smla_za64_single_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG4x2_U16 : Inst<"svmla[_single]_za64[_{d}]_vg4x2", "vm2d", "Us", MergeNone, "aarch64_sme_umla_za64_single_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG4x4_S16 : Inst<"svmla[_single]_za64[_{d}]_vg4x4", "vm4d", "s", MergeNone, "aarch64_sme_smla_za64_single_vg4x4", [IsStreaming, IsInOutZA], []>; + def SVMLAL_SINGLE_VG4x4_U16 : Inst<"svmla[_single]_za64[_{d}]_vg4x4", "vm4d", "Us", MergeNone, "aarch64_sme_umla_za64_single_vg4x4", [IsStreaming, IsInOutZA], []>; + + // SINGLE MLSL + def SVMLSL_SINGLE_VG4x1_S16 : Inst<"svmls_za64[_{d}]_vg4x1", "vmdd", "s", MergeNone, "aarch64_sme_smls_za64_single_vg4x1", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG4x1_U16 : Inst<"svmls_za64[_{d}]_vg4x1", "vmdd", "Us", MergeNone, "aarch64_sme_umls_za64_single_vg4x1", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG4x2_S16 : Inst<"svmls[_single]_za64[_{d}]_vg4x2", "vm2d", "s", MergeNone, "aarch64_sme_smls_za64_single_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG4x2_U16 : Inst<"svmls[_single]_za64[_{d}]_vg4x2", "vm2d", "Us", MergeNone, "aarch64_sme_umls_za64_single_vg4x2", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG4x4_S16 : Inst<"svmls[_single]_za64[_{d}]_vg4x4", "vm4d", "s", MergeNone, "aarch64_sme_smls_za64_single_vg4x4", [IsStreaming, IsInOutZA], []>; + def SVMLSL_SINGLE_VG4x4_U16 : Inst<"svmls[_single]_za64[_{d}]_vg4x4", "vm4d", "Us", MergeNone, "aarch64_sme_umls_za64_single_vg4x4", [IsStreaming, IsInOutZA], []>; + + // INDEXED MLAL + def SVMLAL_LANE_VG4x1_S16 : Inst<"svmla_lane_za64[_{d}]_vg4x1", "vmddi", "s", MergeNone, "aarch64_sme_smla_za64_lane_vg4x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLAL_LANE_VG4x1_U16 : Inst<"svmla_lane_za64[_{d}]_vg4x1", "vmddi", "Us", MergeNone, "aarch64_sme_umla_za64_lane_vg4x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLAL_LANE_VG4x2_S16 : Inst<"svmla_lane_za64[_{d}]_vg4x2", "vm2di", "s", MergeNone, "aarch64_sme_smla_za64_lane_vg4x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLAL_LANE_VG4x2_U16 : Inst<"svmla_lane_za64[_{d}]_vg4x2", "vm2di", "Us", MergeNone, "aarch64_sme_umla_za64_lane_vg4x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLAL_LANE_VG4x4_S16 : Inst<"svmla_lane_za64[_{d}]_vg4x4", "vm4di", "s", MergeNone, "aarch64_sme_smla_za64_lane_vg4x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLAL_LANE_VG4x4_U16 : Inst<"svmla_lane_za64[_{d}]_vg4x4", "vm4di", "Us", MergeNone, "aarch64_sme_umla_za64_lane_vg4x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + + // INDEXED MLSL + def SVMLSL_LANE_VG4x1_S16 : Inst<"svmls_lane_za64[_{d}]_vg4x1", "vmddi", "s", MergeNone, "aarch64_sme_smls_za64_lane_vg4x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLSL_LANE_VG4x1_U16 : Inst<"svmls_lane_za64[_{d}]_vg4x1", "vmddi", "Us", MergeNone, "aarch64_sme_umls_za64_lane_vg4x1", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLSL_LANE_VG4x2_S16 : Inst<"svmls_lane_za64[_{d}]_vg4x2", "vm2di", "s", MergeNone, "aarch64_sme_smls_za64_lane_vg4x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLSL_LANE_VG4x2_U16 : Inst<"svmls_lane_za64[_{d}]_vg4x2", "vm2di", "Us", MergeNone, "aarch64_sme_umls_za64_lane_vg4x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLSL_LANE_VG4x4_S16 : Inst<"svmls_lane_za64[_{d}]_vg4x4", "vm4di", "s", MergeNone, "aarch64_sme_smls_za64_lane_vg4x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; + def SVMLSL_LANE_VG4x4_U16 : Inst<"svmls_lane_za64[_{d}]_vg4x4", "vm4di", "Us", MergeNone, "aarch64_sme_umls_za64_lane_vg4x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>; +} + +// +// Spill and fill of ZT0 +// +let TargetGuard = "sme2" in { + def SVLDR_ZT : Inst<"svldr_zt", "viQ", "", MergeNone, "aarch64_sme_ldr_zt", [IsOverloadNone, IsStreamingCompatible, IsInOutZT0], [ImmCheck<0, ImmCheck0_0>]>; + def SVSTR_ZT : Inst<"svstr_zt", "vi%", "", MergeNone, "aarch64_sme_str_zt", [IsOverloadNone, IsStreamingCompatible, IsInZT0], [ImmCheck<0, ImmCheck0_0>]>; +} + +// +// Zero ZT0 +// +let TargetGuard = "sme2" in { + def SVZERO_ZT : Inst<"svzero_zt", "vi", "", MergeNone, "aarch64_sme_zero_zt", [IsOverloadNone, IsStreamingCompatible, IsOutZT0], [ImmCheck<0, ImmCheck0_0>]>; +} + +// +// lookup table expand four contiguous registers +// +let TargetGuard = "sme2" in { + def SVLUTI2_LANE_ZT_X4 : Inst<"svluti2_lane_zt_{d}_x4", "4.di[i", "cUcsUsiUibhf", MergeNone, "aarch64_sme_luti2_lane_zt_x4", [IsStreaming, IsInZT0], [ImmCheck<0, ImmCheck0_0>, ImmCheck<2, ImmCheck0_3>]>; + def SVLUTI4_LANE_ZT_X4 : Inst<"svluti4_lane_zt_{d}_x4", "4.di[i", "sUsiUibhf", MergeNone, "aarch64_sme_luti4_lane_zt_x4", [IsStreaming, IsInZT0], [ImmCheck<0, ImmCheck0_0>, ImmCheck<2, ImmCheck0_1>]>; +} + +// +// lookup table expand one register +// +let TargetGuard = "sme2" in { + def SVLUTI2_LANE_ZT : Inst<"svluti2_lane_zt_{d}", "di[i", "cUcsUsiUibhf", MergeNone, "aarch64_sme_luti2_lane_zt", [IsStreaming, IsInZT0], [ImmCheck<0, ImmCheck0_0>, ImmCheck<2, ImmCheck0_15>]>; + def SVLUTI4_LANE_ZT : Inst<"svluti4_lane_zt_{d}", "di[i", "cUcsUsiUibhf", MergeNone, "aarch64_sme_luti4_lane_zt", [IsStreaming, IsInZT0], [ImmCheck<0, ImmCheck0_0>, ImmCheck<2, ImmCheck0_7>]>; +} + +// +// lookup table expand two contiguous registers +// +let TargetGuard = "sme2" in { + def SVLUTI2_LANE_ZT_X2 : Inst<"svluti2_lane_zt_{d}_x2", "2.di[i", "cUcsUsiUibhf", MergeNone, "aarch64_sme_luti2_lane_zt_x2", [IsStreaming, IsInZT0], [ImmCheck<0, ImmCheck0_0>, ImmCheck<2, ImmCheck0_7>]>; + def SVLUTI4_LANE_ZT_X2 : Inst<"svluti4_lane_zt_{d}_x2", "2.di[i", "cUcsUsiUibhf", MergeNone, "aarch64_sme_luti4_lane_zt_x2", [IsStreaming, IsInZT0], [ImmCheck<0, ImmCheck0_0>, ImmCheck<2, ImmCheck0_3>]>; +} diff --git a/contrib/llvm-project/clang/include/clang/Basic/arm_sve.td b/contrib/llvm-project/clang/include/clang/Basic/arm_sve.td index 5e9d1c96558b..6da30e08e752 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/arm_sve.td +++ b/contrib/llvm-project/clang/include/clang/Basic/arm_sve.td @@ -13,277 +13,33 @@ // //===----------------------------------------------------------------------===// -//===----------------------------------------------------------------------===// -// Instruction definitions -//===----------------------------------------------------------------------===// -// Every intrinsic subclasses "Inst". An intrinsic has a name, a prototype and -// a sequence of typespecs. -// -// The name is the base name of the intrinsic, for example "svld1". This is -// then mangled by the tblgen backend to add type information ("svld1_s16"). -// -// A typespec is a sequence of uppercase characters (modifiers) followed by one -// lowercase character. A typespec encodes a particular "base type" of the -// intrinsic. -// -// An example typespec is "Us" - unsigned short - svuint16_t. The available -// typespec codes are given below. -// -// The string given to an Inst class is a sequence of typespecs. The intrinsic -// is instantiated for every typespec in the sequence. For example "sdUsUd". -// -// The prototype is a string that defines the return type of the intrinsic -// and the type of each argument. The return type and every argument gets a -// "modifier" that can change in some way the "base type" of the intrinsic. -// -// The modifier 'd' means "default" and does not modify the base type in any -// way. The available modifiers are given below. -// -// Typespecs -// --------- -// c: char -// s: short -// i: int -// l: long -// f: float -// h: half-float -// d: double -// b: bfloat - -// Typespec modifiers -// ------------------ -// P: boolean -// U: unsigned - -// Prototype modifiers -// ------------------- -// prototype: return (arg, arg, ...) -// -// 2,3,4: array of default vectors -// v: void -// x: vector of signed integers -// u: vector of unsigned integers -// d: default -// c: const pointer type -// P: predicate type -// s: scalar of element type -// a: scalar of element type (splat to vector type) -// R: scalar of 1/2 width element type (splat to vector type) -// r: scalar of 1/4 width element type (splat to vector type) -// @: unsigned scalar of 1/4 width element type (splat to vector type) -// e: 1/2 width unsigned elements, 2x element count -// b: 1/4 width unsigned elements, 4x element count -// h: 1/2 width elements, 2x element count -// q: 1/4 width elements, 4x element count -// o: 4x width elements, 1/4 element count -// -// w: vector of element type promoted to 64bits, vector maintains -// signedness of its element type. -// f: element type promoted to uint64_t (splat to vector type) -// j: element type promoted to 64bits (splat to vector type) -// K: element type bitcast to a signed integer (splat to vector type) -// L: element type bitcast to an unsigned integer (splat to vector type) -// -// i: constant uint64_t -// k: int32_t -// l: int64_t -// m: uint32_t -// n: uint64_t - -// t: svint32_t -// z: svuint32_t -// g: svuint64_t -// O: svfloat16_t -// M: svfloat32_t -// N: svfloat64_t - -// J: Prefetch type (sv_prfop) -// A: pointer to int8_t -// B: pointer to int16_t -// C: pointer to int32_t -// D: pointer to int64_t - -// E: pointer to uint8_t -// F: pointer to uint16_t -// G: pointer to uint32_t -// H: pointer to uint64_t - -// Q: const pointer to void - -// S: const pointer to int8_t -// T: const pointer to int16_t -// U: const pointer to int32_t -// V: const pointer to int64_t -// -// W: const pointer to uint8_t -// X: const pointer to uint16_t -// Y: const pointer to uint32_t -// Z: const pointer to uint64_t - -class MergeType<int val, string suffix=""> { - int Value = val; - string Suffix = suffix; -} -def MergeNone : MergeType<0>; -def MergeAny : MergeType<1, "_x">; -def MergeOp1 : MergeType<2, "_m">; -def MergeZero : MergeType<3, "_z">; -def MergeAnyExp : MergeType<4, "_x">; // Use merged builtin with explicit -def MergeZeroExp : MergeType<5, "_z">; // generation of its inactive argument. - -class EltType<int val> { - int Value = val; -} -def EltTyInvalid : EltType<0>; -def EltTyInt8 : EltType<1>; -def EltTyInt16 : EltType<2>; -def EltTyInt32 : EltType<3>; -def EltTyInt64 : EltType<4>; -def EltTyFloat16 : EltType<5>; -def EltTyFloat32 : EltType<6>; -def EltTyFloat64 : EltType<7>; -def EltTyBool8 : EltType<8>; -def EltTyBool16 : EltType<9>; -def EltTyBool32 : EltType<10>; -def EltTyBool64 : EltType<11>; -def EltTyBFloat16 : EltType<12>; - -class MemEltType<int val> { - int Value = val; -} -def MemEltTyDefault : MemEltType<0>; -def MemEltTyInt8 : MemEltType<1>; -def MemEltTyInt16 : MemEltType<2>; -def MemEltTyInt32 : MemEltType<3>; -def MemEltTyInt64 : MemEltType<4>; - -class FlagType<int val> { - int Value = val; -} - -// These must be kept in sync with the flags in utils/TableGen/SveEmitter.h -// and include/clang/Basic/TargetBuiltins.h -def NoFlags : FlagType<0x00000000>; -def FirstEltType : FlagType<0x00000001>; -// : : -// : : -def EltTypeMask : FlagType<0x0000000f>; -def FirstMemEltType : FlagType<0x00000010>; -// : : -// : : -def MemEltTypeMask : FlagType<0x00000070>; -def FirstMergeTypeMask : FlagType<0x00000080>; -// : : -// : : -def MergeTypeMask : FlagType<0x00000380>; -def FirstSplatOperand : FlagType<0x00000400>; -// : : -// These flags are used to specify which scalar operand -// needs to be duplicated/splatted into a vector. -// : : -def SplatOperandMask : FlagType<0x00001C00>; -def IsLoad : FlagType<0x00002000>; -def IsStore : FlagType<0x00004000>; -def IsGatherLoad : FlagType<0x00008000>; -def IsScatterStore : FlagType<0x00010000>; -def IsStructLoad : FlagType<0x00020000>; -def IsStructStore : FlagType<0x00040000>; -def IsZExtReturn : FlagType<0x00080000>; // Return value is sign-extend by default -def IsOverloadNone : FlagType<0x00100000>; // Intrinsic does not take any overloaded types. -def IsOverloadWhile : FlagType<0x00200000>; // Use {default type, typeof(operand1)} as overloaded types. -def IsOverloadWhileRW : FlagType<0x00400000>; // Use {pred(default type), typeof(operand0)} as overloaded types. -def IsOverloadCvt : FlagType<0x00800000>; // Use {typeof(operand0), typeof(last operand)} as overloaded types. -def OverloadKindMask : FlagType<0x00E00000>; // When the masked values are all '0', the default type is used as overload type. -def IsByteIndexed : FlagType<0x01000000>; -def IsAppendSVALL : FlagType<0x02000000>; // Appends SV_ALL as the last operand. -def IsInsertOp1SVALL : FlagType<0x04000000>; // Inserts SV_ALL as the second operand. -def IsPrefetch : FlagType<0x08000000>; // Contiguous prefetches. -def IsGatherPrefetch : FlagType<0x10000000>; -def ReverseCompare : FlagType<0x20000000>; // Compare operands must be swapped. -def ReverseUSDOT : FlagType<0x40000000>; // Unsigned/signed operands must be swapped. -def IsUndef : FlagType<0x80000000>; // Codegen `undef` of given type. -def IsTupleCreate : FlagType<0x100000000>; -def IsTupleGet : FlagType<0x200000000>; -def IsTupleSet : FlagType<0x400000000>; - -// These must be kept in sync with the flags in include/clang/Basic/TargetBuiltins.h -class ImmCheckType<int val> { - int Value = val; -} -def ImmCheck0_31 : ImmCheckType<0>; // 0..31 (used for e.g. predicate patterns) -def ImmCheck1_16 : ImmCheckType<1>; // 1..16 -def ImmCheckExtract : ImmCheckType<2>; // 0..(2048/sizeinbits(elt) - 1) -def ImmCheckShiftRight : ImmCheckType<3>; // 1..sizeinbits(elt) -def ImmCheckShiftRightNarrow : ImmCheckType<4>; // 1..sizeinbits(elt)/2 -def ImmCheckShiftLeft : ImmCheckType<5>; // 0..(sizeinbits(elt) - 1) -def ImmCheck0_7 : ImmCheckType<6>; // 0..7 -def ImmCheckLaneIndex : ImmCheckType<7>; // 0..(128/(1*sizeinbits(elt)) - 1) -def ImmCheckLaneIndexCompRotate : ImmCheckType<8>; // 0..(128/(2*sizeinbits(elt)) - 1) -def ImmCheckLaneIndexDot : ImmCheckType<9>; // 0..(128/(4*sizeinbits(elt)) - 1) -def ImmCheckComplexRot90_270 : ImmCheckType<10>; // [90,270] -def ImmCheckComplexRotAll90 : ImmCheckType<11>; // [0, 90, 180,270] -def ImmCheck0_13 : ImmCheckType<12>; // 0..13 -def ImmCheck0_1 : ImmCheckType<13>; // 0..1 -def ImmCheck0_2 : ImmCheckType<14>; // 0..2 -def ImmCheck0_3 : ImmCheckType<15>; // 0..3 - -class ImmCheck<int arg, ImmCheckType kind, int eltSizeArg = -1> { - int Arg = arg; - int EltSizeArg = eltSizeArg; - ImmCheckType Kind = kind; -} - -class Inst<string n, string p, string t, MergeType mt, string i, - list<FlagType> ft, list<ImmCheck> ch, MemEltType met> { - string Name = n; - string Prototype = p; - string Types = t; - string ArchGuard = ""; - int Merge = mt.Value; - string MergeSuffix = mt.Suffix; - string LLVMIntrinsic = i; - list<FlagType> Flags = ft; - list<ImmCheck> ImmChecks = ch; - int MemEltType = met.Value; -} - -// SInst: Instruction with signed/unsigned suffix (e.g., "s8", "u8") -class SInst<string n, string p, string t, MergeType mt, string i = "", - list<FlagType> ft = [], list<ImmCheck> ch = []> - : Inst<n, p, t, mt, i, ft, ch, MemEltTyDefault> { -} - -// MInst: Instructions which access memory -class MInst<string n, string p, string t, list<FlagType> f, - MemEltType met = MemEltTyDefault, string i = ""> - : Inst<n, p, t, MergeNone, i, f, [], met> { -} +include "arm_sve_sme_incl.td" //////////////////////////////////////////////////////////////////////////////// // Loads // Load one vector (scalar base) -def SVLD1 : MInst<"svld1[_{2}]", "dPc", "csilUcUsUiUlhfd", [IsLoad], MemEltTyDefault, "aarch64_sve_ld1">; -def SVLD1SB : MInst<"svld1sb_{d}", "dPS", "silUsUiUl", [IsLoad], MemEltTyInt8, "aarch64_sve_ld1">; -def SVLD1UB : MInst<"svld1ub_{d}", "dPW", "silUsUiUl", [IsLoad, IsZExtReturn], MemEltTyInt8, "aarch64_sve_ld1">; -def SVLD1SH : MInst<"svld1sh_{d}", "dPT", "ilUiUl", [IsLoad], MemEltTyInt16, "aarch64_sve_ld1">; -def SVLD1UH : MInst<"svld1uh_{d}", "dPX", "ilUiUl", [IsLoad, IsZExtReturn], MemEltTyInt16, "aarch64_sve_ld1">; -def SVLD1SW : MInst<"svld1sw_{d}", "dPU", "lUl", [IsLoad], MemEltTyInt32, "aarch64_sve_ld1">; -def SVLD1UW : MInst<"svld1uw_{d}", "dPY", "lUl", [IsLoad, IsZExtReturn], MemEltTyInt32, "aarch64_sve_ld1">; +def SVLD1 : MInst<"svld1[_{2}]", "dPc", "csilUcUsUiUlhfd", [IsLoad, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_ld1">; +def SVLD1SB : MInst<"svld1sb_{d}", "dPS", "silUsUiUl", [IsLoad, IsStreamingCompatible], MemEltTyInt8, "aarch64_sve_ld1">; +def SVLD1UB : MInst<"svld1ub_{d}", "dPW", "silUsUiUl", [IsLoad, IsZExtReturn, IsStreamingCompatible], MemEltTyInt8, "aarch64_sve_ld1">; +def SVLD1SH : MInst<"svld1sh_{d}", "dPT", "ilUiUl", [IsLoad, IsStreamingCompatible], MemEltTyInt16, "aarch64_sve_ld1">; +def SVLD1UH : MInst<"svld1uh_{d}", "dPX", "ilUiUl", [IsLoad, IsZExtReturn, IsStreamingCompatible], MemEltTyInt16, "aarch64_sve_ld1">; +def SVLD1SW : MInst<"svld1sw_{d}", "dPU", "lUl", [IsLoad, IsStreamingCompatible], MemEltTyInt32, "aarch64_sve_ld1">; +def SVLD1UW : MInst<"svld1uw_{d}", "dPY", "lUl", [IsLoad, IsZExtReturn, IsStreamingCompatible], MemEltTyInt32, "aarch64_sve_ld1">; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - def SVLD1_BF : MInst<"svld1[_{2}]", "dPc", "b", [IsLoad], MemEltTyDefault, "aarch64_sve_ld1">; - def SVLD1_VNUM_BF : MInst<"svld1_vnum[_{2}]", "dPcl", "b", [IsLoad], MemEltTyDefault, "aarch64_sve_ld1">; +let TargetGuard = "sve,bf16" in { + def SVLD1_BF : MInst<"svld1[_{2}]", "dPc", "b", [IsLoad, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_ld1">; + def SVLD1_VNUM_BF : MInst<"svld1_vnum[_{2}]", "dPcl", "b", [IsLoad, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_ld1">; } // Load one vector (scalar base, VL displacement) -def SVLD1_VNUM : MInst<"svld1_vnum[_{2}]", "dPcl", "csilUcUsUiUlhfd", [IsLoad], MemEltTyDefault, "aarch64_sve_ld1">; -def SVLD1SB_VNUM : MInst<"svld1sb_vnum_{d}", "dPSl", "silUsUiUl", [IsLoad], MemEltTyInt8, "aarch64_sve_ld1">; -def SVLD1UB_VNUM : MInst<"svld1ub_vnum_{d}", "dPWl", "silUsUiUl", [IsLoad, IsZExtReturn], MemEltTyInt8, "aarch64_sve_ld1">; -def SVLD1SH_VNUM : MInst<"svld1sh_vnum_{d}", "dPTl", "ilUiUl", [IsLoad], MemEltTyInt16, "aarch64_sve_ld1">; -def SVLD1UH_VNUM : MInst<"svld1uh_vnum_{d}", "dPXl", "ilUiUl", [IsLoad, IsZExtReturn], MemEltTyInt16, "aarch64_sve_ld1">; -def SVLD1SW_VNUM : MInst<"svld1sw_vnum_{d}", "dPUl", "lUl", [IsLoad], MemEltTyInt32, "aarch64_sve_ld1">; -def SVLD1UW_VNUM : MInst<"svld1uw_vnum_{d}", "dPYl", "lUl", [IsLoad, IsZExtReturn], MemEltTyInt32, "aarch64_sve_ld1">; +def SVLD1_VNUM : MInst<"svld1_vnum[_{2}]", "dPcl", "csilUcUsUiUlhfd", [IsLoad, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_ld1">; +def SVLD1SB_VNUM : MInst<"svld1sb_vnum_{d}", "dPSl", "silUsUiUl", [IsLoad, IsStreamingCompatible], MemEltTyInt8, "aarch64_sve_ld1">; +def SVLD1UB_VNUM : MInst<"svld1ub_vnum_{d}", "dPWl", "silUsUiUl", [IsLoad, IsZExtReturn, IsStreamingCompatible], MemEltTyInt8, "aarch64_sve_ld1">; +def SVLD1SH_VNUM : MInst<"svld1sh_vnum_{d}", "dPTl", "ilUiUl", [IsLoad, IsStreamingCompatible], MemEltTyInt16, "aarch64_sve_ld1">; +def SVLD1UH_VNUM : MInst<"svld1uh_vnum_{d}", "dPXl", "ilUiUl", [IsLoad, IsZExtReturn, IsStreamingCompatible], MemEltTyInt16, "aarch64_sve_ld1">; +def SVLD1SW_VNUM : MInst<"svld1sw_vnum_{d}", "dPUl", "lUl", [IsLoad, IsStreamingCompatible], MemEltTyInt32, "aarch64_sve_ld1">; +def SVLD1UW_VNUM : MInst<"svld1uw_vnum_{d}", "dPYl", "lUl", [IsLoad, IsZExtReturn, IsStreamingCompatible], MemEltTyInt32, "aarch64_sve_ld1">; // Load one vector (vector base) def SVLD1_GATHER_BASES_U : MInst<"svld1_gather[_{2}base]_{d}", "dPu", "ilUiUlfd", [IsGatherLoad], MemEltTyDefault, "aarch64_sve_ld1_gather_scalar_offset">; @@ -381,7 +137,7 @@ def SVLDFF1UH_VNUM : MInst<"svldff1uh_vnum_{d}", "dPXl", "ilUiUl", [IsL def SVLDFF1SW_VNUM : MInst<"svldff1sw_vnum_{d}", "dPUl", "lUl", [IsLoad], MemEltTyInt32, "aarch64_sve_ldff1">; def SVLDFF1UW_VNUM : MInst<"svldff1uw_vnum_{d}", "dPYl", "lUl", [IsLoad, IsZExtReturn], MemEltTyInt32, "aarch64_sve_ldff1">; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { +let TargetGuard = "sve,bf16" in { def SVLDFF1_BF : MInst<"svldff1[_{2}]", "dPc", "b", [IsLoad], MemEltTyDefault, "aarch64_sve_ldff1">; def SVLDFF1_VNUM_BF : MInst<"svldff1_vnum[_{2}]", "dPcl", "b", [IsLoad], MemEltTyDefault, "aarch64_sve_ldff1">; } @@ -481,91 +237,123 @@ def SVLDNF1UH_VNUM : MInst<"svldnf1uh_vnum_{d}", "dPXl", "ilUiUl", [IsL def SVLDNF1SW_VNUM : MInst<"svldnf1sw_vnum_{d}", "dPUl", "lUl", [IsLoad], MemEltTyInt32, "aarch64_sve_ldnf1">; def SVLDNF1UW_VNUM : MInst<"svldnf1uw_vnum_{d}", "dPYl", "lUl", [IsLoad, IsZExtReturn], MemEltTyInt32, "aarch64_sve_ldnf1">; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { +let TargetGuard = "sve,bf16" in { def SVLDNF1_BF : MInst<"svldnf1[_{2}]", "dPc", "b", [IsLoad], MemEltTyDefault, "aarch64_sve_ldnf1">; def SVLDNF1_VNUM_BF : MInst<"svldnf1_vnum[_{2}]", "dPcl", "b", [IsLoad], MemEltTyDefault, "aarch64_sve_ldnf1">; } // Load one vector, unextended load, non-temporal (scalar base) -def SVLDNT1 : MInst<"svldnt1[_{2}]", "dPc", "csilUcUsUiUlhfd", [IsLoad], MemEltTyDefault, "aarch64_sve_ldnt1">; +def SVLDNT1 : MInst<"svldnt1[_{2}]", "dPc", "csilUcUsUiUlhfd", [IsLoad, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_ldnt1">; // Load one vector, unextended load, non-temporal (scalar base, VL displacement) -def SVLDNT1_VNUM : MInst<"svldnt1_vnum[_{2}]", "dPcl", "csilUcUsUiUlhfd", [IsLoad], MemEltTyDefault, "aarch64_sve_ldnt1">; +def SVLDNT1_VNUM : MInst<"svldnt1_vnum[_{2}]", "dPcl", "csilUcUsUiUlhfd", [IsLoad, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_ldnt1">; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - def SVLDNT1_BF : MInst<"svldnt1[_{2}]", "dPc", "b", [IsLoad], MemEltTyDefault, "aarch64_sve_ldnt1">; - def SVLDNT1_VNUM_BF : MInst<"svldnt1_vnum[_{2}]", "dPcl", "b", [IsLoad], MemEltTyDefault, "aarch64_sve_ldnt1">; +let TargetGuard = "sve,bf16" in { + def SVLDNT1_BF : MInst<"svldnt1[_{2}]", "dPc", "b", [IsLoad, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_ldnt1">; + def SVLDNT1_VNUM_BF : MInst<"svldnt1_vnum[_{2}]", "dPcl", "b", [IsLoad, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_ldnt1">; } // Load one quadword and replicate (scalar base) -def SVLD1RQ : SInst<"svld1rq[_{2}]", "dPc", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_ld1rq">; +def SVLD1RQ : SInst<"svld1rq[_{2}]", "dPc", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_ld1rq", [IsStreamingCompatible]>; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - def SVLD1RQ_BF : SInst<"svld1rq[_{2}]", "dPc", "b", MergeNone, "aarch64_sve_ld1rq">; +let TargetGuard = "sve,bf16" in { + def SVLD1RQ_BF : SInst<"svld1rq[_{2}]", "dPc", "b", MergeNone, "aarch64_sve_ld1rq", [IsStreamingCompatible]>; } multiclass StructLoad<string name, string proto, string i> { - def : SInst<name, proto, "csilUcUsUiUlhfd", MergeNone, i, [IsStructLoad]>; - let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - def: SInst<name, proto, "b", MergeNone, i, [IsStructLoad]>; + def : SInst<name, proto, "csilUcUsUiUlhfd", MergeNone, i, [IsStructLoad, IsStreamingCompatible]>; + let TargetGuard = "sve,bf16" in { + def: SInst<name, proto, "b", MergeNone, i, [IsStructLoad, IsStreamingCompatible]>; } } // Load N-element structure into N vectors (scalar base) -defm SVLD2 : StructLoad<"svld2[_{2}]", "2Pc", "aarch64_sve_ld2">; -defm SVLD3 : StructLoad<"svld3[_{2}]", "3Pc", "aarch64_sve_ld3">; -defm SVLD4 : StructLoad<"svld4[_{2}]", "4Pc", "aarch64_sve_ld4">; +defm SVLD2 : StructLoad<"svld2[_{2}]", "2Pc", "aarch64_sve_ld2_sret">; +defm SVLD3 : StructLoad<"svld3[_{2}]", "3Pc", "aarch64_sve_ld3_sret">; +defm SVLD4 : StructLoad<"svld4[_{2}]", "4Pc", "aarch64_sve_ld4_sret">; // Load N-element structure into N vectors (scalar base, VL displacement) -defm SVLD2_VNUM : StructLoad<"svld2_vnum[_{2}]", "2Pcl", "aarch64_sve_ld2">; -defm SVLD3_VNUM : StructLoad<"svld3_vnum[_{2}]", "3Pcl", "aarch64_sve_ld3">; -defm SVLD4_VNUM : StructLoad<"svld4_vnum[_{2}]", "4Pcl", "aarch64_sve_ld4">; +defm SVLD2_VNUM : StructLoad<"svld2_vnum[_{2}]", "2Pcl", "aarch64_sve_ld2_sret">; +defm SVLD3_VNUM : StructLoad<"svld3_vnum[_{2}]", "3Pcl", "aarch64_sve_ld3_sret">; +defm SVLD4_VNUM : StructLoad<"svld4_vnum[_{2}]", "4Pcl", "aarch64_sve_ld4_sret">; // Load one octoword and replicate (scalar base) -let ArchGuard = "defined(__ARM_FEATURE_SVE_MATMUL_FP64)" in { +let TargetGuard = "sve,f64mm" in { def SVLD1RO : SInst<"svld1ro[_{2}]", "dPc", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_ld1ro">; } -let ArchGuard = "defined(__ARM_FEATURE_SVE_MATMUL_FP64) && defined(__ARM_FEATURE_SVE_BF16)" in { +let TargetGuard = "sve,f64mm,bf16" in { def SVLD1RO_BF16 : SInst<"svld1ro[_{2}]", "dPc", "b", MergeNone, "aarch64_sve_ld1ro">; } -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - def SVBFDOT : SInst<"svbfdot[_{0}]", "MMdd", "b", MergeNone, "aarch64_sve_bfdot", [IsOverloadNone]>; - def SVBFMLALB : SInst<"svbfmlalb[_{0}]", "MMdd", "b", MergeNone, "aarch64_sve_bfmlalb", [IsOverloadNone]>; - def SVBFMLALT : SInst<"svbfmlalt[_{0}]", "MMdd", "b", MergeNone, "aarch64_sve_bfmlalt", [IsOverloadNone]>; - def SVBFMMLA : SInst<"svbfmmla[_{0}]", "MMdd", "b", MergeNone, "aarch64_sve_bfmmla", [IsOverloadNone]>; - def SVBFDOT_N : SInst<"svbfdot[_n_{0}]", "MMda", "b", MergeNone, "aarch64_sve_bfdot", [IsOverloadNone]>; - def SVBFMLAL_N : SInst<"svbfmlalb[_n_{0}]", "MMda", "b", MergeNone, "aarch64_sve_bfmlalb", [IsOverloadNone]>; - def SVBFMLALT_N : SInst<"svbfmlalt[_n_{0}]", "MMda", "b", MergeNone, "aarch64_sve_bfmlalt", [IsOverloadNone]>; - def SVBFDOT_LANE : SInst<"svbfdot_lane[_{0}]", "MMddn", "b", MergeNone, "aarch64_sve_bfdot_lane", [IsOverloadNone], [ImmCheck<3, ImmCheck0_3>]>; - def SVBFMLALB_LANE : SInst<"svbfmlalb_lane[_{0}]", "MMddn", "b", MergeNone, "aarch64_sve_bfmlalb_lane", [IsOverloadNone], [ImmCheck<3, ImmCheck0_7>]>; - def SVBFMLALT_LANE : SInst<"svbfmlalt_lane[_{0}]", "MMddn", "b", MergeNone, "aarch64_sve_bfmlalt_lane", [IsOverloadNone], [ImmCheck<3, ImmCheck0_7>]>; +let TargetGuard = "sve,bf16" in { + def SVBFDOT : SInst<"svbfdot[_{0}]", "MMdd", "b", MergeNone, "aarch64_sve_bfdot", [IsOverloadNone, IsStreamingCompatible]>; + def SVBFMLALB : SInst<"svbfmlalb[_{0}]", "MMdd", "b", MergeNone, "aarch64_sve_bfmlalb", [IsOverloadNone, IsStreamingCompatible]>; + def SVBFMLALT : SInst<"svbfmlalt[_{0}]", "MMdd", "b", MergeNone, "aarch64_sve_bfmlalt", [IsOverloadNone, IsStreamingCompatible]>; + def SVBFMMLA : SInst<"svbfmmla[_{0}]", "MMdd", "b", MergeNone, "aarch64_sve_bfmmla", [IsOverloadNone, IsStreamingCompatible]>; + def SVBFDOT_N : SInst<"svbfdot[_n_{0}]", "MMda", "b", MergeNone, "aarch64_sve_bfdot", [IsOverloadNone, IsStreamingCompatible]>; + def SVBFMLAL_N : SInst<"svbfmlalb[_n_{0}]", "MMda", "b", MergeNone, "aarch64_sve_bfmlalb", [IsOverloadNone, IsStreamingCompatible]>; + def SVBFMLALT_N : SInst<"svbfmlalt[_n_{0}]", "MMda", "b", MergeNone, "aarch64_sve_bfmlalt", [IsOverloadNone, IsStreamingCompatible]>; + def SVBFDOT_LANE : SInst<"svbfdot_lane[_{0}]", "MMddi", "b", MergeNone, "aarch64_sve_bfdot_lane_v2", [IsOverloadNone, IsStreamingCompatible], [ImmCheck<3, ImmCheck0_3>]>; + def SVBFMLALB_LANE : SInst<"svbfmlalb_lane[_{0}]", "MMddi", "b", MergeNone, "aarch64_sve_bfmlalb_lane_v2", [IsOverloadNone, IsStreamingCompatible], [ImmCheck<3, ImmCheck0_7>]>; + def SVBFMLALT_LANE : SInst<"svbfmlalt_lane[_{0}]", "MMddi", "b", MergeNone, "aarch64_sve_bfmlalt_lane_v2", [IsOverloadNone, IsStreamingCompatible], [ImmCheck<3, ImmCheck0_7>]>; +} + +let TargetGuard = "sve2p1" in { + // Contiguous zero-extending load to quadword (single vector). + def SVLD1UWQ : MInst<"svld1uwq[_{d}]", "dPc", "iUif", [IsLoad], MemEltTyInt32, "aarch64_sve_ld1uwq">; + def SVLD1UWQ_VNUM : MInst<"svld1uwq_vnum[_{d}]", "dPcl", "iUif", [IsLoad], MemEltTyInt32, "aarch64_sve_ld1uwq">; + + def SVLD1UDQ : MInst<"svld1udq[_{d}]", "dPc", "lUld", [IsLoad], MemEltTyInt64, "aarch64_sve_ld1udq">; + def SVLD1UDQ_VNUM : MInst<"svld1udq_vnum[_{d}]", "dPcl", "lUld", [IsLoad], MemEltTyInt64, "aarch64_sve_ld1udq">; + + // Load one vector (vector base + scalar offset) + def SVLD1Q_GATHER_U64BASE_OFFSET : MInst<"svld1q_gather[_{2}base]_offset_{d}", "dPgl", "cUcsUsiUilUlfhdb", [IsGatherLoad, IsByteIndexed], MemEltTyDefault, "aarch64_sve_ld1q_gather_scalar_offset">; + def SVLD1Q_GATHER_U64BASE : MInst<"svld1q_gather[_{2}base]_{d}", "dPg", "cUcsUsiUilUlfhdb", [IsGatherLoad, IsByteIndexed], MemEltTyDefault, "aarch64_sve_ld1q_gather_scalar_offset">; + + // Load one vector (scalar base + vector offset) + def SVLD1Q_GATHER_U64OFFSET : MInst<"svld1q_gather_[{3}]offset[_{d}]", "dPcg", "cUcsUsiUilUlfhdb", [IsGatherLoad, IsByteIndexed], MemEltTyDefault, "aarch64_sve_ld1q_gather_vector_offset">; + + // Load N-element structure into N vectors (scalar base) + defm SVLD2Q : StructLoad<"svld2q[_{2}]", "2Pc", "aarch64_sve_ld2q_sret">; + defm SVLD3Q : StructLoad<"svld3q[_{2}]", "3Pc", "aarch64_sve_ld3q_sret">; + defm SVLD4Q : StructLoad<"svld4q[_{2}]", "4Pc", "aarch64_sve_ld4q_sret">; + + // Load N-element structure into N vectors (scalar base, VL displacement) + defm SVLD2Q_VNUM : StructLoad<"svld2q_vnum[_{2}]", "2Pcl", "aarch64_sve_ld2q_sret">; + defm SVLD3Q_VNUM : StructLoad<"svld3q_vnum[_{2}]", "3Pcl", "aarch64_sve_ld3q_sret">; + defm SVLD4Q_VNUM : StructLoad<"svld4q_vnum[_{2}]", "4Pcl", "aarch64_sve_ld4q_sret">; + + // Load quadwords (scalar base + vector index) + def SVLD1Q_GATHER_INDICES_U : MInst<"svld1q_gather_[{3}]index[_{d}]", "dPcg", "sUsiUilUlbhfd", [IsGatherLoad], MemEltTyDefault, "aarch64_sve_ld1q_gather_index">; + + // Load quadwords (vector base + scalar index) + def SVLD1Q_GATHER_INDEX_S : MInst<"svld1q_gather[_{2}base]_index_{d}", "dPgl", "sUsiUilUlbhfd", [IsGatherLoad], MemEltTyDefault, "aarch64_sve_ld1q_gather_scalar_offset">; } //////////////////////////////////////////////////////////////////////////////// // Stores // Store one vector (scalar base) -def SVST1 : MInst<"svst1[_{d}]", "vPpd", "csilUcUsUiUlhfd", [IsStore], MemEltTyDefault, "aarch64_sve_st1">; -def SVST1B_S : MInst<"svst1b[_{d}]", "vPAd", "sil", [IsStore], MemEltTyInt8, "aarch64_sve_st1">; -def SVST1B_U : MInst<"svst1b[_{d}]", "vPEd", "UsUiUl", [IsStore], MemEltTyInt8, "aarch64_sve_st1">; -def SVST1H_S : MInst<"svst1h[_{d}]", "vPBd", "il", [IsStore], MemEltTyInt16, "aarch64_sve_st1">; -def SVST1H_U : MInst<"svst1h[_{d}]", "vPFd", "UiUl", [IsStore], MemEltTyInt16, "aarch64_sve_st1">; -def SVST1W_S : MInst<"svst1w[_{d}]", "vPCd", "l", [IsStore], MemEltTyInt32, "aarch64_sve_st1">; -def SVST1W_U : MInst<"svst1w[_{d}]", "vPGd", "Ul", [IsStore], MemEltTyInt32, "aarch64_sve_st1">; +def SVST1 : MInst<"svst1[_{d}]", "vPpd", "csilUcUsUiUlhfd", [IsStore, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_st1">; +def SVST1B_S : MInst<"svst1b[_{d}]", "vPAd", "sil", [IsStore, IsStreamingCompatible], MemEltTyInt8, "aarch64_sve_st1">; +def SVST1B_U : MInst<"svst1b[_{d}]", "vPEd", "UsUiUl", [IsStore, IsStreamingCompatible], MemEltTyInt8, "aarch64_sve_st1">; +def SVST1H_S : MInst<"svst1h[_{d}]", "vPBd", "il", [IsStore, IsStreamingCompatible], MemEltTyInt16, "aarch64_sve_st1">; +def SVST1H_U : MInst<"svst1h[_{d}]", "vPFd", "UiUl", [IsStore, IsStreamingCompatible], MemEltTyInt16, "aarch64_sve_st1">; +def SVST1W_S : MInst<"svst1w[_{d}]", "vPCd", "l", [IsStore, IsStreamingCompatible], MemEltTyInt32, "aarch64_sve_st1">; +def SVST1W_U : MInst<"svst1w[_{d}]", "vPGd", "Ul", [IsStore, IsStreamingCompatible], MemEltTyInt32, "aarch64_sve_st1">; // Store one vector (scalar base, VL displacement) -def SVST1_VNUM : MInst<"svst1_vnum[_{d}]", "vPpld", "csilUcUsUiUlhfd", [IsStore], MemEltTyDefault, "aarch64_sve_st1">; -def SVST1B_VNUM_S : MInst<"svst1b_vnum[_{d}]", "vPAld", "sil", [IsStore], MemEltTyInt8, "aarch64_sve_st1">; -def SVST1B_VNUM_U : MInst<"svst1b_vnum[_{d}]", "vPEld", "UsUiUl", [IsStore], MemEltTyInt8, "aarch64_sve_st1">; -def SVST1H_VNUM_S : MInst<"svst1h_vnum[_{d}]", "vPBld", "il", [IsStore], MemEltTyInt16, "aarch64_sve_st1">; -def SVST1H_VNUM_U : MInst<"svst1h_vnum[_{d}]", "vPFld", "UiUl", [IsStore], MemEltTyInt16, "aarch64_sve_st1">; -def SVST1W_VNUM_S : MInst<"svst1w_vnum[_{d}]", "vPCld", "l", [IsStore], MemEltTyInt32, "aarch64_sve_st1">; -def SVST1W_VNUM_U : MInst<"svst1w_vnum[_{d}]", "vPGld", "Ul", [IsStore], MemEltTyInt32, "aarch64_sve_st1">; +def SVST1_VNUM : MInst<"svst1_vnum[_{d}]", "vPpld", "csilUcUsUiUlhfd", [IsStore, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_st1">; +def SVST1B_VNUM_S : MInst<"svst1b_vnum[_{d}]", "vPAld", "sil", [IsStore, IsStreamingCompatible], MemEltTyInt8, "aarch64_sve_st1">; +def SVST1B_VNUM_U : MInst<"svst1b_vnum[_{d}]", "vPEld", "UsUiUl", [IsStore, IsStreamingCompatible], MemEltTyInt8, "aarch64_sve_st1">; +def SVST1H_VNUM_S : MInst<"svst1h_vnum[_{d}]", "vPBld", "il", [IsStore, IsStreamingCompatible], MemEltTyInt16, "aarch64_sve_st1">; +def SVST1H_VNUM_U : MInst<"svst1h_vnum[_{d}]", "vPFld", "UiUl", [IsStore, IsStreamingCompatible], MemEltTyInt16, "aarch64_sve_st1">; +def SVST1W_VNUM_S : MInst<"svst1w_vnum[_{d}]", "vPCld", "l", [IsStore, IsStreamingCompatible], MemEltTyInt32, "aarch64_sve_st1">; +def SVST1W_VNUM_U : MInst<"svst1w_vnum[_{d}]", "vPGld", "Ul", [IsStore, IsStreamingCompatible], MemEltTyInt32, "aarch64_sve_st1">; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - def SVST1_BF : MInst<"svst1[_{d}]", "vPpd", "b", [IsStore], MemEltTyDefault, "aarch64_sve_st1">; - def SVST1_VNUM_BF : MInst<"svst1_vnum[_{d}]", "vPpld", "b", [IsStore], MemEltTyDefault, "aarch64_sve_st1">; +let TargetGuard = "sve,bf16" in { + def SVST1_BF : MInst<"svst1[_{d}]", "vPpd", "b", [IsStore, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_st1">; + def SVST1_VNUM_BF : MInst<"svst1_vnum[_{d}]", "vPpld", "b", [IsStore, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_st1">; } // Store one vector (vector base) @@ -638,9 +426,9 @@ def SVST1H_SCATTER_INDEX_S : MInst<"svst1h_scatter[_{2}base]_index[_{d}]", "v def SVST1W_SCATTER_INDEX_S : MInst<"svst1w_scatter[_{2}base]_index[_{d}]", "vPuld", "lUl", [IsScatterStore], MemEltTyInt32, "aarch64_sve_st1_scatter_scalar_offset">; multiclass StructStore<string name, string proto, string i> { - def : SInst<name, proto, "csilUcUsUiUlhfd", MergeNone, i, [IsStructStore]>; - let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - def: SInst<name, proto, "b", MergeNone, i, [IsStructStore]>; + def : SInst<name, proto, "csilUcUsUiUlhfd", MergeNone, i, [IsStructStore, IsStreamingCompatible]>; + let TargetGuard = "sve,bf16" in { + def: SInst<name, proto, "b", MergeNone, i, [IsStructStore, IsStreamingCompatible]>; } } // Store N vectors into N-element structure (scalar base) @@ -654,30 +442,62 @@ defm SVST3_VNUM : StructStore<"svst3_vnum[_{d}]", "vPpl3", "aarch64_sve_st3">; defm SVST4_VNUM : StructStore<"svst4_vnum[_{d}]", "vPpl4", "aarch64_sve_st4">; // Store one vector, with no truncation, non-temporal (scalar base) -def SVSTNT1 : MInst<"svstnt1[_{d}]", "vPpd", "csilUcUsUiUlhfd", [IsStore], MemEltTyDefault, "aarch64_sve_stnt1">; +def SVSTNT1 : MInst<"svstnt1[_{d}]", "vPpd", "csilUcUsUiUlhfd", [IsStore, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_stnt1">; // Store one vector, with no truncation, non-temporal (scalar base, VL displacement) -def SVSTNT1_VNUM : MInst<"svstnt1_vnum[_{d}]", "vPpld", "csilUcUsUiUlhfd", [IsStore], MemEltTyDefault, "aarch64_sve_stnt1">; +def SVSTNT1_VNUM : MInst<"svstnt1_vnum[_{d}]", "vPpld", "csilUcUsUiUlhfd", [IsStore, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_stnt1">; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - def SVSTNT1_BF : MInst<"svstnt1[_{d}]", "vPpd", "b", [IsStore], MemEltTyDefault, "aarch64_sve_stnt1">; - def SVSTNT1_VNUM_BF : MInst<"svstnt1_vnum[_{d}]", "vPpld", "b", [IsStore], MemEltTyDefault, "aarch64_sve_stnt1">; +let TargetGuard = "sve,bf16" in { + def SVSTNT1_BF : MInst<"svstnt1[_{d}]", "vPpd", "b", [IsStore, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_stnt1">; + def SVSTNT1_VNUM_BF : MInst<"svstnt1_vnum[_{d}]", "vPpld", "b", [IsStore, IsStreamingCompatible], MemEltTyDefault, "aarch64_sve_stnt1">; +} + +let TargetGuard = "sve2p1" in { + // Contiguous truncating store from quadword (single vector). + def SVST1UWQ : MInst<"svst1wq[_{d}]", "vPcd", "iUif", [IsStore], MemEltTyInt32, "aarch64_sve_st1wq">; + def SVST1UWQ_VNUM : MInst<"svst1wq_vnum[_{d}]", "vPcld", "iUif", [IsStore], MemEltTyInt32, "aarch64_sve_st1wq">; + + def SVST1UDQ : MInst<"svst1dq[_{d}]", "vPcd", "lUld", [IsStore], MemEltTyInt64, "aarch64_sve_st1dq">; + def SVST1UDQ_VNUM : MInst<"svst1dq_vnum[_{d}]", "vPcld", "lUld", [IsStore], MemEltTyInt64, "aarch64_sve_st1dq">; + + // Store one vector (vector base + scalar offset) + def SVST1Q_SCATTER_U64BASE_OFFSET : MInst<"svst1q_scatter[_{2}base]_offset[_{d}]", "vPgld", "cUcsUsiUilUlfhdb", [IsScatterStore, IsByteIndexed], MemEltTyDefault, "aarch64_sve_st1q_scatter_scalar_offset">; + def SVST1Q_SCATTER_U64BASE : MInst<"svst1q_scatter[_{2}base][_{d}]", "vPgd", "cUcsUsiUilUlfhdb", [IsScatterStore, IsByteIndexed], MemEltTyDefault, "aarch64_sve_st1q_scatter_scalar_offset">; + + // Store one vector (scalar base + vector offset) + def SVST1Q_SCATTER_U64OFFSET : MInst<"svst1q_scatter_[{3}]offset[_{d}]", "vPpgd", "cUcsUsiUilUlfhdb", [IsScatterStore, IsByteIndexed], MemEltTyDefault, "aarch64_sve_st1q_scatter_vector_offset">; + + // Store N vectors into N-element structure (scalar base) + defm SVST2Q : StructStore<"svst2q[_{d}]", "vPc2", "aarch64_sve_st2q">; + defm SVST3Q : StructStore<"svst3q[_{d}]", "vPc3", "aarch64_sve_st3q">; + defm SVST4Q : StructStore<"svst4q[_{d}]", "vPc4", "aarch64_sve_st4q">; + + // Store N vectors into N-element structure (scalar base, VL displacement) + defm SVST2Q_VNUM : StructStore<"svst2q_vnum[_{d}]", "vPcl2", "aarch64_sve_st2q">; + defm SVST3Q_VNUM : StructStore<"svst3q_vnum[_{d}]", "vPcl3", "aarch64_sve_st3q">; + defm SVST4Q_VNUM : StructStore<"svst4q_vnum[_{d}]", "vPcl4", "aarch64_sve_st4q">; + + // Scatter store quadwords (scalar base + vector index) + def SVST1Q_SCATTER_INDICES_U : MInst<"svst1q_scatter_[{3}]index[_{d}]", "vPpgd", "sUsiUilUlbhfd", [IsScatterStore], MemEltTyDefault, "aarch64_sve_st1q_scatter_index">; + + // Scatter store quadwords (vector base + scalar index) + def SVST1Q_SCATTER_INDEX_S : MInst<"svst1q_scatter[_{2}base]_index[_{d}]", "vPgld", "sUsiUilUlbhfd", [IsScatterStore], MemEltTyDefault, "aarch64_sve_st1q_scatter_scalar_offset">; } //////////////////////////////////////////////////////////////////////////////// // Prefetches // Prefetch (Scalar base) -def SVPRFB : MInst<"svprfb", "vPQJ", "c", [IsPrefetch], MemEltTyInt8, "aarch64_sve_prf">; -def SVPRFH : MInst<"svprfh", "vPQJ", "s", [IsPrefetch], MemEltTyInt16, "aarch64_sve_prf">; -def SVPRFW : MInst<"svprfw", "vPQJ", "i", [IsPrefetch], MemEltTyInt32, "aarch64_sve_prf">; -def SVPRFD : MInst<"svprfd", "vPQJ", "l", [IsPrefetch], MemEltTyInt64, "aarch64_sve_prf">; +def SVPRFB : MInst<"svprfb", "vPQJ", "c", [IsPrefetch, IsStreamingCompatible], MemEltTyInt8, "aarch64_sve_prf">; +def SVPRFH : MInst<"svprfh", "vPQJ", "s", [IsPrefetch, IsStreamingCompatible], MemEltTyInt16, "aarch64_sve_prf">; +def SVPRFW : MInst<"svprfw", "vPQJ", "i", [IsPrefetch, IsStreamingCompatible], MemEltTyInt32, "aarch64_sve_prf">; +def SVPRFD : MInst<"svprfd", "vPQJ", "l", [IsPrefetch, IsStreamingCompatible], MemEltTyInt64, "aarch64_sve_prf">; // Prefetch (Scalar base, VL displacement) -def SVPRFB_VNUM : MInst<"svprfb_vnum", "vPQlJ", "c", [IsPrefetch], MemEltTyInt8, "aarch64_sve_prf">; -def SVPRFH_VNUM : MInst<"svprfh_vnum", "vPQlJ", "s", [IsPrefetch], MemEltTyInt16, "aarch64_sve_prf">; -def SVPRFW_VNUM : MInst<"svprfw_vnum", "vPQlJ", "i", [IsPrefetch], MemEltTyInt32, "aarch64_sve_prf">; -def SVPRFD_VNUM : MInst<"svprfd_vnum", "vPQlJ", "l", [IsPrefetch], MemEltTyInt64, "aarch64_sve_prf">; +def SVPRFB_VNUM : MInst<"svprfb_vnum", "vPQlJ", "c", [IsPrefetch, IsStreamingCompatible], MemEltTyInt8, "aarch64_sve_prf">; +def SVPRFH_VNUM : MInst<"svprfh_vnum", "vPQlJ", "s", [IsPrefetch, IsStreamingCompatible], MemEltTyInt16, "aarch64_sve_prf">; +def SVPRFW_VNUM : MInst<"svprfw_vnum", "vPQlJ", "i", [IsPrefetch, IsStreamingCompatible], MemEltTyInt32, "aarch64_sve_prf">; +def SVPRFD_VNUM : MInst<"svprfd_vnum", "vPQlJ", "l", [IsPrefetch, IsStreamingCompatible], MemEltTyInt64, "aarch64_sve_prf">; // Prefetch (Vector bases) def SVPRFB_GATHER_BASES : MInst<"svprfb_gather[_{2}base]", "vPdJ", "UiUl", [IsGatherPrefetch], MemEltTyInt8, "aarch64_sve_prfb_gather_scalar_offset">; @@ -723,18 +543,18 @@ def SVADRD : SInst<"svadrd[_{0}base]_[{2}]index", "uud", "ilUiUl", MergeNone, " //////////////////////////////////////////////////////////////////////////////// // Scalar to vector -def SVDUPQ_8 : SInst<"svdupq[_n]_{d}", "dssssssssssssssss", "cUc", MergeNone>; -def SVDUPQ_16 : SInst<"svdupq[_n]_{d}", "dssssssss", "sUsh", MergeNone>; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - def SVDUPQ_BF16 : SInst<"svdupq[_n]_{d}", "dssssssss", "b", MergeNone>; +def SVDUPQ_8 : SInst<"svdupq[_n]_{d}", "dssssssssssssssss", "cUc", MergeNone, "", [IsStreamingCompatible]>; +def SVDUPQ_16 : SInst<"svdupq[_n]_{d}", "dssssssss", "sUsh", MergeNone, "", [IsStreamingCompatible]>; +let TargetGuard = "sve,bf16" in { + def SVDUPQ_BF16 : SInst<"svdupq[_n]_{d}", "dssssssss", "b", MergeNone, "", [IsStreamingCompatible]>; } -def SVDUPQ_32 : SInst<"svdupq[_n]_{d}", "dssss", "iUif", MergeNone>; -def SVDUPQ_64 : SInst<"svdupq[_n]_{d}", "dss", "lUld", MergeNone>; +def SVDUPQ_32 : SInst<"svdupq[_n]_{d}", "dssss", "iUif", MergeNone, "", [IsStreamingCompatible]>; +def SVDUPQ_64 : SInst<"svdupq[_n]_{d}", "dss", "lUld", MergeNone, "", [IsStreamingCompatible]>; multiclass svdup_base<string n, string p, MergeType mt, string i> { - def NAME : SInst<n, p, "csilUcUsUiUlhfd", mt, i>; - let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - def _BF16: SInst<n, p, "b", mt, i>; + def NAME : SInst<n, p, "csilUcUsUiUlhfd", mt, i, [IsStreamingCompatible]>; + let TargetGuard = "sve,bf16" in { + def _BF16: SInst<n, p, "b", mt, i, [IsStreamingCompatible]>; } } @@ -743,14 +563,14 @@ defm SVDUP_M : svdup_base<"svdup[_n]_{d}", "ddPs", MergeOp1, "aarch64_sve_du defm SVDUP_X : svdup_base<"svdup[_n]_{d}", "dPs", MergeAnyExp, "aarch64_sve_dup">; defm SVDUP_Z : svdup_base<"svdup[_n]_{d}", "dPs", MergeZeroExp, "aarch64_sve_dup">; -def SVINDEX : SInst<"svindex_{d}", "dss", "csilUcUsUiUl", MergeNone, "aarch64_sve_index">; +def SVINDEX : SInst<"svindex_{d}", "dss", "csilUcUsUiUl", MergeNone, "aarch64_sve_index", [IsStreamingCompatible]>; // Integer arithmetic -multiclass SInstZPZ<string name, string types, string intrinsic, list<FlagType> flags=[]> { - def _M : SInst<name # "[_{d}]", "ddPd", types, MergeOp1, intrinsic, flags>; - def _X : SInst<name # "[_{d}]", "dPd", types, MergeAnyExp, intrinsic, flags>; - def _Z : SInst<name # "[_{d}]", "dPd", types, MergeZeroExp, intrinsic, flags>; +multiclass SInstZPZ<string name, string types, string intrinsic> { + def _M : SInst<name # "[_{d}]", "ddPd", types, MergeOp1, intrinsic, [IsStreamingCompatible]>; + def _X : SInst<name # "[_{d}]", "dPd", types, MergeAnyExp, intrinsic, [IsStreamingCompatible]>; + def _Z : SInst<name # "[_{d}]", "dPd", types, MergeZeroExp, intrinsic, [IsStreamingCompatible]>; } defm SVABS : SInstZPZ<"svabs", "csil", "aarch64_sve_abs">; @@ -758,76 +578,76 @@ defm SVNEG : SInstZPZ<"svneg", "csil", "aarch64_sve_neg">; //------------------------------------------------------------------------------ -multiclass SInstZPZZ<string name, string types, string intrinsic, list<FlagType> flags=[]> { - def _M : SInst<name # "[_{d}]", "dPdd", types, MergeOp1, intrinsic, flags>; - def _X : SInst<name # "[_{d}]", "dPdd", types, MergeAny, intrinsic, flags>; - def _Z : SInst<name # "[_{d}]", "dPdd", types, MergeZero, intrinsic, flags>; - - def _N_M : SInst<name # "[_n_{d}]", "dPda", types, MergeOp1, intrinsic, flags>; - def _N_X : SInst<name # "[_n_{d}]", "dPda", types, MergeAny, intrinsic, flags>; - def _N_Z : SInst<name # "[_n_{d}]", "dPda", types, MergeZero, intrinsic, flags>; -} - -defm SVABD_S : SInstZPZZ<"svabd", "csil", "aarch64_sve_sabd">; -defm SVABD_U : SInstZPZZ<"svabd", "UcUsUiUl", "aarch64_sve_uabd">; -defm SVADD : SInstZPZZ<"svadd", "csilUcUsUiUl", "aarch64_sve_add">; -defm SVDIV_S : SInstZPZZ<"svdiv", "il", "aarch64_sve_sdiv">; -defm SVDIV_U : SInstZPZZ<"svdiv", "UiUl", "aarch64_sve_udiv">; -defm SVDIVR_S : SInstZPZZ<"svdivr", "il", "aarch64_sve_sdivr">; -defm SVDIVR_U : SInstZPZZ<"svdivr", "UiUl", "aarch64_sve_udivr">; -defm SVMAX_S : SInstZPZZ<"svmax", "csil", "aarch64_sve_smax">; -defm SVMAX_U : SInstZPZZ<"svmax", "UcUsUiUl", "aarch64_sve_umax">; -defm SVMIN_S : SInstZPZZ<"svmin", "csil", "aarch64_sve_smin">; -defm SVMIN_U : SInstZPZZ<"svmin", "UcUsUiUl", "aarch64_sve_umin">; -defm SVMUL : SInstZPZZ<"svmul", "csilUcUsUiUl", "aarch64_sve_mul">; -defm SVMULH_S : SInstZPZZ<"svmulh", "csil", "aarch64_sve_smulh">; -defm SVMULH_U : SInstZPZZ<"svmulh", "UcUsUiUl", "aarch64_sve_umulh">; -defm SVSUB : SInstZPZZ<"svsub", "csilUcUsUiUl", "aarch64_sve_sub">; -defm SVSUBR : SInstZPZZ<"svsubr", "csilUcUsUiUl", "aarch64_sve_subr">; +multiclass SInstZPZZ<string name, string types, string m_intrinsic, string x_intrinsic, list<FlagType> flags=[]> { + def _M : SInst<name # "[_{d}]", "dPdd", types, MergeOp1, m_intrinsic, !listconcat(flags, [IsStreamingCompatible])>; + def _X : SInst<name # "[_{d}]", "dPdd", types, MergeAny, x_intrinsic, !listconcat(flags, [IsStreamingCompatible])>; + def _Z : SInst<name # "[_{d}]", "dPdd", types, MergeZero, m_intrinsic, !listconcat(flags, [IsStreamingCompatible])>; + + def _N_M : SInst<name # "[_n_{d}]", "dPda", types, MergeOp1, m_intrinsic, !listconcat(flags, [IsStreamingCompatible])>; + def _N_X : SInst<name # "[_n_{d}]", "dPda", types, MergeAny, x_intrinsic, !listconcat(flags, [IsStreamingCompatible])>; + def _N_Z : SInst<name # "[_n_{d}]", "dPda", types, MergeZero, m_intrinsic, !listconcat(flags, [IsStreamingCompatible])>; +} + +defm SVABD_S : SInstZPZZ<"svabd", "csil", "aarch64_sve_sabd", "aarch64_sve_sabd_u">; +defm SVABD_U : SInstZPZZ<"svabd", "UcUsUiUl", "aarch64_sve_uabd", "aarch64_sve_uabd_u">; +defm SVADD : SInstZPZZ<"svadd", "csilUcUsUiUl", "aarch64_sve_add", "aarch64_sve_add_u">; +defm SVDIV_S : SInstZPZZ<"svdiv", "il", "aarch64_sve_sdiv", "aarch64_sve_sdiv_u">; +defm SVDIV_U : SInstZPZZ<"svdiv", "UiUl", "aarch64_sve_udiv", "aarch64_sve_udiv_u">; +defm SVDIVR_S : SInstZPZZ<"svdivr", "il", "aarch64_sve_sdivr", "aarch64_sve_sdiv_u", [ReverseMergeAnyBinOp]>; +defm SVDIVR_U : SInstZPZZ<"svdivr", "UiUl", "aarch64_sve_udivr", "aarch64_sve_udiv_u", [ReverseMergeAnyBinOp]>; +defm SVMAX_S : SInstZPZZ<"svmax", "csil", "aarch64_sve_smax", "aarch64_sve_smax_u">; +defm SVMAX_U : SInstZPZZ<"svmax", "UcUsUiUl", "aarch64_sve_umax", "aarch64_sve_umax_u">; +defm SVMIN_S : SInstZPZZ<"svmin", "csil", "aarch64_sve_smin", "aarch64_sve_smin_u">; +defm SVMIN_U : SInstZPZZ<"svmin", "UcUsUiUl", "aarch64_sve_umin", "aarch64_sve_umin_u">; +defm SVMUL : SInstZPZZ<"svmul", "csilUcUsUiUl", "aarch64_sve_mul", "aarch64_sve_mul_u">; +defm SVMULH_S : SInstZPZZ<"svmulh", "csil", "aarch64_sve_smulh", "aarch64_sve_smulh_u">; +defm SVMULH_U : SInstZPZZ<"svmulh", "UcUsUiUl", "aarch64_sve_umulh", "aarch64_sve_umulh_u">; +defm SVSUB : SInstZPZZ<"svsub", "csilUcUsUiUl", "aarch64_sve_sub", "aarch64_sve_sub_u">; +defm SVSUBR : SInstZPZZ<"svsubr", "csilUcUsUiUl", "aarch64_sve_subr", "aarch64_sve_sub_u", [ReverseMergeAnyBinOp]>; //------------------------------------------------------------------------------ -multiclass SInstZPZZZ<string name, string types, string intrinsic, list<FlagType> flags=[]> { - def _M : SInst<name # "[_{d}]", "dPddd", types, MergeOp1, intrinsic, flags>; - def _X : SInst<name # "[_{d}]", "dPddd", types, MergeAny, intrinsic, flags>; - def _Z : SInst<name # "[_{d}]", "dPddd", types, MergeZero, intrinsic, flags>; +multiclass SInstZPZZZ<string name, string types, string m_intrinsic, string x_intrinsic, list<FlagType> flags=[]> { + def _M : SInst<name # "[_{d}]", "dPddd", types, MergeOp1, m_intrinsic, flags>; + def _X : SInst<name # "[_{d}]", "dPddd", types, MergeAny, x_intrinsic, flags>; + def _Z : SInst<name # "[_{d}]", "dPddd", types, MergeZero, m_intrinsic, flags>; - def _N_M : SInst<name # "[_n_{d}]", "dPdda", types, MergeOp1, intrinsic, flags>; - def _N_X : SInst<name # "[_n_{d}]", "dPdda", types, MergeAny, intrinsic, flags>; - def _N_Z : SInst<name # "[_n_{d}]", "dPdda", types, MergeZero, intrinsic, flags>; + def _N_M : SInst<name # "[_n_{d}]", "dPdda", types, MergeOp1, m_intrinsic, flags>; + def _N_X : SInst<name # "[_n_{d}]", "dPdda", types, MergeAny, x_intrinsic, flags>; + def _N_Z : SInst<name # "[_n_{d}]", "dPdda", types, MergeZero, m_intrinsic, flags>; } -defm SVMAD : SInstZPZZZ<"svmad", "csilUcUsUiUl", "aarch64_sve_mad">; -defm SVMLA : SInstZPZZZ<"svmla", "csilUcUsUiUl", "aarch64_sve_mla">; -defm SVMLS : SInstZPZZZ<"svmls", "csilUcUsUiUl", "aarch64_sve_mls">; -defm SVMSB : SInstZPZZZ<"svmsb", "csilUcUsUiUl", "aarch64_sve_msb">; +defm SVMAD : SInstZPZZZ<"svmad", "csilUcUsUiUl", "aarch64_sve_mad", "aarch64_sve_mla_u", [ReverseMergeAnyAccOp, IsStreamingCompatible]>; +defm SVMLA : SInstZPZZZ<"svmla", "csilUcUsUiUl", "aarch64_sve_mla", "aarch64_sve_mla_u", [IsStreamingCompatible]>; +defm SVMLS : SInstZPZZZ<"svmls", "csilUcUsUiUl", "aarch64_sve_mls", "aarch64_sve_mls_u", [IsStreamingCompatible]>; +defm SVMSB : SInstZPZZZ<"svmsb", "csilUcUsUiUl", "aarch64_sve_msb", "aarch64_sve_mls_u", [ReverseMergeAnyAccOp, IsStreamingCompatible]>; //------------------------------------------------------------------------------ -def SVDOT_S : SInst<"svdot[_{0}]", "ddqq", "il", MergeNone, "aarch64_sve_sdot">; -def SVDOT_U : SInst<"svdot[_{0}]", "ddqq", "UiUl", MergeNone, "aarch64_sve_udot">; -def SVQADD_S : SInst<"svqadd[_{d}]", "ddd", "csil", MergeNone, "aarch64_sve_sqadd_x">; -def SVQADD_U : SInst<"svqadd[_{d}]", "ddd", "UcUsUiUl", MergeNone, "aarch64_sve_uqadd_x">; -def SVQSUB_S : SInst<"svqsub[_{d}]", "ddd", "csil", MergeNone, "aarch64_sve_sqsub_x">; -def SVQSUB_U : SInst<"svqsub[_{d}]", "ddd", "UcUsUiUl", MergeNone, "aarch64_sve_uqsub_x">; +def SVDOT_S : SInst<"svdot[_{0}]", "ddqq", "il", MergeNone, "aarch64_sve_sdot", [IsStreamingCompatible]>; +def SVDOT_U : SInst<"svdot[_{0}]", "ddqq", "UiUl", MergeNone, "aarch64_sve_udot", [IsStreamingCompatible]>; +def SVQADD_S : SInst<"svqadd[_{d}]", "ddd", "csil", MergeNone, "aarch64_sve_sqadd_x", [IsStreamingCompatible]>; +def SVQADD_U : SInst<"svqadd[_{d}]", "ddd", "UcUsUiUl", MergeNone, "aarch64_sve_uqadd_x", [IsStreamingCompatible]>; +def SVQSUB_S : SInst<"svqsub[_{d}]", "ddd", "csil", MergeNone, "aarch64_sve_sqsub_x", [IsStreamingCompatible]>; +def SVQSUB_U : SInst<"svqsub[_{d}]", "ddd", "UcUsUiUl", MergeNone, "aarch64_sve_uqsub_x", [IsStreamingCompatible]>; -def SVDOT_N_S : SInst<"svdot[_n_{0}]", "ddqr", "il", MergeNone, "aarch64_sve_sdot">; -def SVDOT_N_U : SInst<"svdot[_n_{0}]", "ddqr", "UiUl", MergeNone, "aarch64_sve_udot">; -def SVQADD_N_S : SInst<"svqadd[_n_{d}]", "dda", "csil", MergeNone, "aarch64_sve_sqadd_x">; -def SVQADD_N_U : SInst<"svqadd[_n_{d}]", "dda", "UcUsUiUl", MergeNone, "aarch64_sve_uqadd_x">; -def SVQSUB_N_S : SInst<"svqsub[_n_{d}]", "dda", "csil", MergeNone, "aarch64_sve_sqsub_x">; -def SVQSUB_N_U : SInst<"svqsub[_n_{d}]", "dda", "UcUsUiUl", MergeNone, "aarch64_sve_uqsub_x">; +def SVDOT_N_S : SInst<"svdot[_n_{0}]", "ddqr", "il", MergeNone, "aarch64_sve_sdot", [IsStreamingCompatible]>; +def SVDOT_N_U : SInst<"svdot[_n_{0}]", "ddqr", "UiUl", MergeNone, "aarch64_sve_udot", [IsStreamingCompatible]>; +def SVQADD_N_S : SInst<"svqadd[_n_{d}]", "dda", "csil", MergeNone, "aarch64_sve_sqadd_x", [IsStreamingCompatible]>; +def SVQADD_N_U : SInst<"svqadd[_n_{d}]", "dda", "UcUsUiUl", MergeNone, "aarch64_sve_uqadd_x", [IsStreamingCompatible]>; +def SVQSUB_N_S : SInst<"svqsub[_n_{d}]", "dda", "csil", MergeNone, "aarch64_sve_sqsub_x", [IsStreamingCompatible]>; +def SVQSUB_N_U : SInst<"svqsub[_n_{d}]", "dda", "UcUsUiUl", MergeNone, "aarch64_sve_uqsub_x", [IsStreamingCompatible]>; -def SVDOT_LANE_S : SInst<"svdot_lane[_{d}]", "ddqqi", "il", MergeNone, "aarch64_sve_sdot_lane", [], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>; -def SVDOT_LANE_U : SInst<"svdot_lane[_{d}]", "ddqqi", "UiUl", MergeNone, "aarch64_sve_udot_lane", [], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>; +def SVDOT_LANE_S : SInst<"svdot_lane[_{d}]", "ddqqi", "il", MergeNone, "aarch64_sve_sdot_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>; +def SVDOT_LANE_U : SInst<"svdot_lane[_{d}]", "ddqqi", "UiUl", MergeNone, "aarch64_sve_udot_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>; //////////////////////////////////////////////////////////////////////////////// // Logical operations -defm SVAND : SInstZPZZ<"svand", "csilUcUsUiUl", "aarch64_sve_and">; -defm SVBIC : SInstZPZZ<"svbic", "csilUcUsUiUl", "aarch64_sve_bic">; -defm SVEOR : SInstZPZZ<"sveor", "csilUcUsUiUl", "aarch64_sve_eor">; -defm SVORR : SInstZPZZ<"svorr", "csilUcUsUiUl", "aarch64_sve_orr">; +defm SVAND : SInstZPZZ<"svand", "csilUcUsUiUl", "aarch64_sve_and", "aarch64_sve_and_u">; +defm SVBIC : SInstZPZZ<"svbic", "csilUcUsUiUl", "aarch64_sve_bic", "aarch64_sve_bic_u">; +defm SVEOR : SInstZPZZ<"sveor", "csilUcUsUiUl", "aarch64_sve_eor", "aarch64_sve_eor_u">; +defm SVORR : SInstZPZZ<"svorr", "csilUcUsUiUl", "aarch64_sve_orr", "aarch64_sve_orr_u">; defm SVCNOT : SInstZPZ<"svcnot", "csilUcUsUiUl", "aarch64_sve_cnot">; defm SVNOT : SInstZPZ<"svnot", "csilUcUsUiUl", "aarch64_sve_not">; @@ -836,107 +656,107 @@ defm SVNOT : SInstZPZ<"svnot", "csilUcUsUiUl", "aarch64_sve_not">; // Shifts multiclass SInst_SHIFT<string name, string intrinsic, string ts, string wide_ts> { - def _M : SInst<name # "[_{d}]", "dPdu", ts, MergeOp1, intrinsic>; - def _X : SInst<name # "[_{d}]", "dPdu", ts, MergeAny, intrinsic>; - def _Z : SInst<name # "[_{d}]", "dPdu", ts, MergeZero, intrinsic>; + def _M : SInst<name # "[_{d}]", "dPdu", ts, MergeOp1, intrinsic, [IsStreamingCompatible]>; + def _X : SInst<name # "[_{d}]", "dPdu", ts, MergeAny, intrinsic # _u, [IsStreamingCompatible]>; + def _Z : SInst<name # "[_{d}]", "dPdu", ts, MergeZero, intrinsic, [IsStreamingCompatible]>; - def _N_M : SInst<name # "[_n_{d}]", "dPdL", ts, MergeOp1, intrinsic>; - def _N_X : SInst<name # "[_n_{d}]", "dPdL", ts, MergeAny, intrinsic>; - def _N_Z : SInst<name # "[_n_{d}]", "dPdL", ts, MergeZero, intrinsic>; + def _N_M : SInst<name # "[_n_{d}]", "dPdL", ts, MergeOp1, intrinsic, [IsStreamingCompatible]>; + def _N_X : SInst<name # "[_n_{d}]", "dPdL", ts, MergeAny, intrinsic # _u, [IsStreamingCompatible]>; + def _N_Z : SInst<name # "[_n_{d}]", "dPdL", ts, MergeZero, intrinsic, [IsStreamingCompatible]>; - def _WIDE_M : SInst<name # _wide # "[_{d}]", "dPdg", wide_ts, MergeOp1, intrinsic # _wide>; - def _WIDE_X : SInst<name # _wide # "[_{d}]", "dPdg", wide_ts, MergeAny, intrinsic # _wide>; - def _WIDE_Z : SInst<name # _wide # "[_{d}]", "dPdg", wide_ts, MergeZero, intrinsic # _wide>; + def _WIDE_M : SInst<name # _wide # "[_{d}]", "dPdg", wide_ts, MergeOp1, intrinsic # _wide, [IsStreamingCompatible]>; + def _WIDE_X : SInst<name # _wide # "[_{d}]", "dPdg", wide_ts, MergeAny, intrinsic # _wide, [IsStreamingCompatible]>; + def _WIDE_Z : SInst<name # _wide # "[_{d}]", "dPdg", wide_ts, MergeZero, intrinsic # _wide, [IsStreamingCompatible]>; - def _WIDE_N_M : SInst<name # _wide # "[_n_{d}]", "dPdf", wide_ts, MergeOp1, intrinsic # _wide>; - def _WIDE_N_X : SInst<name # _wide # "[_n_{d}]", "dPdf", wide_ts, MergeAny, intrinsic # _wide>; - def _WIDE_N_Z : SInst<name # _wide # "[_n_{d}]", "dPdf", wide_ts, MergeZero, intrinsic # _wide>; + def _WIDE_N_M : SInst<name # _wide # "[_n_{d}]", "dPdf", wide_ts, MergeOp1, intrinsic # _wide, [IsStreamingCompatible]>; + def _WIDE_N_X : SInst<name # _wide # "[_n_{d}]", "dPdf", wide_ts, MergeAny, intrinsic # _wide, [IsStreamingCompatible]>; + def _WIDE_N_Z : SInst<name # _wide # "[_n_{d}]", "dPdf", wide_ts, MergeZero, intrinsic # _wide, [IsStreamingCompatible]>; } defm SVASR : SInst_SHIFT<"svasr", "aarch64_sve_asr", "csil", "csi">; defm SVLSL : SInst_SHIFT<"svlsl", "aarch64_sve_lsl", "csilUcUsUiUl", "csiUcUsUi">; defm SVLSR : SInst_SHIFT<"svlsr", "aarch64_sve_lsr", "UcUsUiUl", "UcUsUi">; -def SVASRD_M : SInst<"svasrd[_n_{d}]", "dPdi", "csil", MergeOp1, "aarch64_sve_asrd", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; -def SVASRD_X : SInst<"svasrd[_n_{d}]", "dPdi", "csil", MergeAny, "aarch64_sve_asrd", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; -def SVASRD_Z : SInst<"svasrd[_n_{d}]", "dPdi", "csil", MergeZero, "aarch64_sve_asrd", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +def SVASRD_M : SInst<"svasrd[_n_{d}]", "dPdi", "csil", MergeOp1, "aarch64_sve_asrd", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +def SVASRD_X : SInst<"svasrd[_n_{d}]", "dPdi", "csil", MergeAny, "aarch64_sve_asrd", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +def SVASRD_Z : SInst<"svasrd[_n_{d}]", "dPdi", "csil", MergeZero, "aarch64_sve_asrd", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; -def SVINSR : SInst<"svinsr[_n_{d}]", "dds", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_insr">; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - def SVINSR_BF16 : SInst<"svinsr[_n_{d}]", "dds", "b", MergeNone, "aarch64_sve_insr">; +def SVINSR : SInst<"svinsr[_n_{d}]", "dds", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_insr", [IsStreamingCompatible]>; +let TargetGuard = "sve,bf16" in { + def SVINSR_BF16 : SInst<"svinsr[_n_{d}]", "dds", "b", MergeNone, "aarch64_sve_insr", [IsStreamingCompatible]>; } //////////////////////////////////////////////////////////////////////////////// // Integer reductions -def SVADDV_S : SInst<"svaddv[_{d}]", "lPd", "csil", MergeNone, "aarch64_sve_saddv">; -def SVADDV_U : SInst<"svaddv[_{d}]", "nPd", "UcUsUiUl", MergeNone, "aarch64_sve_uaddv">; -def SVANDV : SInst<"svandv[_{d}]", "sPd", "csilUcUsUiUl", MergeNone, "aarch64_sve_andv">; -def SVEORV : SInst<"sveorv[_{d}]", "sPd", "csilUcUsUiUl", MergeNone, "aarch64_sve_eorv">; -def SVMAXV_S : SInst<"svmaxv[_{d}]", "sPd", "csil", MergeNone, "aarch64_sve_smaxv">; -def SVMAXV_U : SInst<"svmaxv[_{d}]", "sPd", "UcUsUiUl", MergeNone, "aarch64_sve_umaxv">; -def SVMINV_S : SInst<"svminv[_{d}]", "sPd", "csil", MergeNone, "aarch64_sve_sminv">; -def SVMINV_U : SInst<"svminv[_{d}]", "sPd", "UcUsUiUl", MergeNone, "aarch64_sve_uminv">; -def SVORV : SInst<"svorv[_{d}]", "sPd", "csilUcUsUiUl", MergeNone, "aarch64_sve_orv">; +def SVADDV_S : SInst<"svaddv[_{d}]", "lPd", "csil", MergeNone, "aarch64_sve_saddv", [IsStreamingCompatible]>; +def SVADDV_U : SInst<"svaddv[_{d}]", "nPd", "UcUsUiUl", MergeNone, "aarch64_sve_uaddv", [IsStreamingCompatible]>; +def SVANDV : SInst<"svandv[_{d}]", "sPd", "csilUcUsUiUl", MergeNone, "aarch64_sve_andv", [IsStreamingCompatible]>; +def SVEORV : SInst<"sveorv[_{d}]", "sPd", "csilUcUsUiUl", MergeNone, "aarch64_sve_eorv", [IsStreamingCompatible]>; +def SVMAXV_S : SInst<"svmaxv[_{d}]", "sPd", "csil", MergeNone, "aarch64_sve_smaxv", [IsStreamingCompatible]>; +def SVMAXV_U : SInst<"svmaxv[_{d}]", "sPd", "UcUsUiUl", MergeNone, "aarch64_sve_umaxv", [IsStreamingCompatible]>; +def SVMINV_S : SInst<"svminv[_{d}]", "sPd", "csil", MergeNone, "aarch64_sve_sminv", [IsStreamingCompatible]>; +def SVMINV_U : SInst<"svminv[_{d}]", "sPd", "UcUsUiUl", MergeNone, "aarch64_sve_uminv", [IsStreamingCompatible]>; +def SVORV : SInst<"svorv[_{d}]", "sPd", "csilUcUsUiUl", MergeNone, "aarch64_sve_orv", [IsStreamingCompatible]>; //////////////////////////////////////////////////////////////////////////////// // Integer comparisons -def SVCMPEQ : SInst<"svcmpeq[_{d}]", "PPdd", "csilUcUsUiUl", MergeNone, "aarch64_sve_cmpeq">; -def SVCMPNE : SInst<"svcmpne[_{d}]", "PPdd", "csilUcUsUiUl", MergeNone, "aarch64_sve_cmpne">; -def SVCMPGE : SInst<"svcmpge[_{d}]", "PPdd", "csil", MergeNone, "aarch64_sve_cmpge">; -def SVCMPGT : SInst<"svcmpgt[_{d}]", "PPdd", "csil", MergeNone, "aarch64_sve_cmpgt">; -def SVCMPLE : SInst<"svcmple[_{d}]", "PPdd", "csil", MergeNone, "aarch64_sve_cmpge", [ReverseCompare]>; -def SVCMPLT : SInst<"svcmplt[_{d}]", "PPdd", "csil", MergeNone, "aarch64_sve_cmpgt", [ReverseCompare]>; -def SVCMPHI : SInst<"svcmpgt[_{d}]", "PPdd", "UcUsUiUl", MergeNone, "aarch64_sve_cmphi">; -def SVCMPHS : SInst<"svcmpge[_{d}]", "PPdd", "UcUsUiUl", MergeNone, "aarch64_sve_cmphs">; -def SVCMPLO : SInst<"svcmplt[_{d}]", "PPdd", "UcUsUiUl", MergeNone, "aarch64_sve_cmphi", [ReverseCompare]>; -def SVCMPLS : SInst<"svcmple[_{d}]", "PPdd", "UcUsUiUl", MergeNone, "aarch64_sve_cmphs", [ReverseCompare]>; - -def SVCMPEQ_N : SInst<"svcmpeq[_n_{d}]", "PPda", "csilUcUsUiUl", MergeNone, "aarch64_sve_cmpeq">; -def SVCMPNE_N : SInst<"svcmpne[_n_{d}]", "PPda", "csilUcUsUiUl", MergeNone, "aarch64_sve_cmpne">; -def SVCMPGE_N : SInst<"svcmpge[_n_{d}]", "PPda", "csil", MergeNone, "aarch64_sve_cmpge">; -def SVCMPGT_N : SInst<"svcmpgt[_n_{d}]", "PPda", "csil", MergeNone, "aarch64_sve_cmpgt">; -def SVCMPLE_N : SInst<"svcmple[_n_{d}]", "PPda", "csil", MergeNone, "aarch64_sve_cmpge", [ReverseCompare]>; -def SVCMPLT_N : SInst<"svcmplt[_n_{d}]", "PPda", "csil", MergeNone, "aarch64_sve_cmpgt", [ReverseCompare]>; -def SVCMPHS_N : SInst<"svcmpge[_n_{d}]", "PPda", "UcUsUiUl", MergeNone, "aarch64_sve_cmphs">; -def SVCMPHI_N : SInst<"svcmpgt[_n_{d}]", "PPda", "UcUsUiUl", MergeNone, "aarch64_sve_cmphi">; -def SVCMPLS_N : SInst<"svcmple[_n_{d}]", "PPda", "UcUsUiUl", MergeNone, "aarch64_sve_cmphs", [ReverseCompare]>; -def SVCMPLO_N : SInst<"svcmplt[_n_{d}]", "PPda", "UcUsUiUl", MergeNone, "aarch64_sve_cmphi", [ReverseCompare]>; - -def SVCMPEQ_WIDE : SInst<"svcmpeq_wide[_{d}]", "PPdw", "csi", MergeNone, "aarch64_sve_cmpeq_wide">; -def SVCMPNE_WIDE : SInst<"svcmpne_wide[_{d}]", "PPdw", "csi", MergeNone, "aarch64_sve_cmpne_wide">; -def SVCMPGE_WIDE : SInst<"svcmpge_wide[_{d}]", "PPdw", "csi", MergeNone, "aarch64_sve_cmpge_wide">; -def SVCMPGT_WIDE : SInst<"svcmpgt_wide[_{d}]", "PPdw", "csi", MergeNone, "aarch64_sve_cmpgt_wide">; -def SVCMPLE_WIDE : SInst<"svcmple_wide[_{d}]", "PPdw", "csi", MergeNone, "aarch64_sve_cmple_wide">; -def SVCMPLT_WIDE : SInst<"svcmplt_wide[_{d}]", "PPdw", "csi", MergeNone, "aarch64_sve_cmplt_wide">; -def SVCMPHI_WIDE : SInst<"svcmpgt_wide[_{d}]", "PPdw", "UcUsUi", MergeNone, "aarch64_sve_cmphi_wide">; -def SVCMPHS_WIDE : SInst<"svcmpge_wide[_{d}]", "PPdw", "UcUsUi", MergeNone, "aarch64_sve_cmphs_wide">; -def SVCMPLO_WIDE : SInst<"svcmplt_wide[_{d}]", "PPdw", "UcUsUi", MergeNone, "aarch64_sve_cmplo_wide">; -def SVCMPLS_WIDE : SInst<"svcmple_wide[_{d}]", "PPdw", "UcUsUi", MergeNone, "aarch64_sve_cmpls_wide">; - -def SVCMPEQ_WIDE_N : SInst<"svcmpeq_wide[_n_{d}]", "PPdj", "csi", MergeNone, "aarch64_sve_cmpeq_wide">; -def SVCMPNE_WIDE_N : SInst<"svcmpne_wide[_n_{d}]", "PPdj", "csi", MergeNone, "aarch64_sve_cmpne_wide">; -def SVCMPGE_WIDE_N : SInst<"svcmpge_wide[_n_{d}]", "PPdj", "csi", MergeNone, "aarch64_sve_cmpge_wide">; -def SVCMPGT_WIDE_N : SInst<"svcmpgt_wide[_n_{d}]", "PPdj", "csi", MergeNone, "aarch64_sve_cmpgt_wide">; -def SVCMPLE_WIDE_N : SInst<"svcmple_wide[_n_{d}]", "PPdj", "csi", MergeNone, "aarch64_sve_cmple_wide">; -def SVCMPLT_WIDE_N : SInst<"svcmplt_wide[_n_{d}]", "PPdj", "csi", MergeNone, "aarch64_sve_cmplt_wide">; -def SVCMPHS_WIDE_N : SInst<"svcmpge_wide[_n_{d}]", "PPdj", "UcUsUi", MergeNone, "aarch64_sve_cmphs_wide">; -def SVCMPHI_WIDE_N : SInst<"svcmpgt_wide[_n_{d}]", "PPdj", "UcUsUi", MergeNone, "aarch64_sve_cmphi_wide">; -def SVCMPLO_WIDE_N : SInst<"svcmplt_wide[_n_{d}]", "PPdj", "UcUsUi", MergeNone, "aarch64_sve_cmplo_wide">; -def SVCMPLS_WIDE_N : SInst<"svcmple_wide[_n_{d}]", "PPdj", "UcUsUi", MergeNone, "aarch64_sve_cmpls_wide">; +def SVCMPEQ : SInst<"svcmpeq[_{d}]", "PPdd", "csilUcUsUiUl", MergeNone, "aarch64_sve_cmpeq", [IsStreamingCompatible]>; +def SVCMPNE : SInst<"svcmpne[_{d}]", "PPdd", "csilUcUsUiUl", MergeNone, "aarch64_sve_cmpne", [IsStreamingCompatible]>; +def SVCMPGE : SInst<"svcmpge[_{d}]", "PPdd", "csil", MergeNone, "aarch64_sve_cmpge", [IsStreamingCompatible]>; +def SVCMPGT : SInst<"svcmpgt[_{d}]", "PPdd", "csil", MergeNone, "aarch64_sve_cmpgt", [IsStreamingCompatible]>; +def SVCMPLE : SInst<"svcmple[_{d}]", "PPdd", "csil", MergeNone, "aarch64_sve_cmpge", [ReverseCompare, IsStreamingCompatible]>; +def SVCMPLT : SInst<"svcmplt[_{d}]", "PPdd", "csil", MergeNone, "aarch64_sve_cmpgt", [ReverseCompare, IsStreamingCompatible]>; +def SVCMPHI : SInst<"svcmpgt[_{d}]", "PPdd", "UcUsUiUl", MergeNone, "aarch64_sve_cmphi", [IsStreamingCompatible]>; +def SVCMPHS : SInst<"svcmpge[_{d}]", "PPdd", "UcUsUiUl", MergeNone, "aarch64_sve_cmphs", [IsStreamingCompatible]>; +def SVCMPLO : SInst<"svcmplt[_{d}]", "PPdd", "UcUsUiUl", MergeNone, "aarch64_sve_cmphi", [ReverseCompare, IsStreamingCompatible]>; +def SVCMPLS : SInst<"svcmple[_{d}]", "PPdd", "UcUsUiUl", MergeNone, "aarch64_sve_cmphs", [ReverseCompare, IsStreamingCompatible]>; + +def SVCMPEQ_N : SInst<"svcmpeq[_n_{d}]", "PPda", "csilUcUsUiUl", MergeNone, "aarch64_sve_cmpeq", [IsStreamingCompatible]>; +def SVCMPNE_N : SInst<"svcmpne[_n_{d}]", "PPda", "csilUcUsUiUl", MergeNone, "aarch64_sve_cmpne", [IsStreamingCompatible]>; +def SVCMPGE_N : SInst<"svcmpge[_n_{d}]", "PPda", "csil", MergeNone, "aarch64_sve_cmpge", [IsStreamingCompatible]>; +def SVCMPGT_N : SInst<"svcmpgt[_n_{d}]", "PPda", "csil", MergeNone, "aarch64_sve_cmpgt", [IsStreamingCompatible]>; +def SVCMPLE_N : SInst<"svcmple[_n_{d}]", "PPda", "csil", MergeNone, "aarch64_sve_cmpge", [ReverseCompare, IsStreamingCompatible]>; +def SVCMPLT_N : SInst<"svcmplt[_n_{d}]", "PPda", "csil", MergeNone, "aarch64_sve_cmpgt", [ReverseCompare, IsStreamingCompatible]>; +def SVCMPHS_N : SInst<"svcmpge[_n_{d}]", "PPda", "UcUsUiUl", MergeNone, "aarch64_sve_cmphs", [IsStreamingCompatible]>; +def SVCMPHI_N : SInst<"svcmpgt[_n_{d}]", "PPda", "UcUsUiUl", MergeNone, "aarch64_sve_cmphi", [IsStreamingCompatible]>; +def SVCMPLS_N : SInst<"svcmple[_n_{d}]", "PPda", "UcUsUiUl", MergeNone, "aarch64_sve_cmphs", [ReverseCompare, IsStreamingCompatible]>; +def SVCMPLO_N : SInst<"svcmplt[_n_{d}]", "PPda", "UcUsUiUl", MergeNone, "aarch64_sve_cmphi", [ReverseCompare, IsStreamingCompatible]>; + +def SVCMPEQ_WIDE : SInst<"svcmpeq_wide[_{d}]", "PPdw", "csi", MergeNone, "aarch64_sve_cmpeq_wide", [IsStreamingCompatible]>; +def SVCMPNE_WIDE : SInst<"svcmpne_wide[_{d}]", "PPdw", "csi", MergeNone, "aarch64_sve_cmpne_wide", [IsStreamingCompatible]>; +def SVCMPGE_WIDE : SInst<"svcmpge_wide[_{d}]", "PPdw", "csi", MergeNone, "aarch64_sve_cmpge_wide", [IsStreamingCompatible]>; +def SVCMPGT_WIDE : SInst<"svcmpgt_wide[_{d}]", "PPdw", "csi", MergeNone, "aarch64_sve_cmpgt_wide", [IsStreamingCompatible]>; +def SVCMPLE_WIDE : SInst<"svcmple_wide[_{d}]", "PPdw", "csi", MergeNone, "aarch64_sve_cmple_wide", [IsStreamingCompatible]>; +def SVCMPLT_WIDE : SInst<"svcmplt_wide[_{d}]", "PPdw", "csi", MergeNone, "aarch64_sve_cmplt_wide", [IsStreamingCompatible]>; +def SVCMPHI_WIDE : SInst<"svcmpgt_wide[_{d}]", "PPdw", "UcUsUi", MergeNone, "aarch64_sve_cmphi_wide", [IsStreamingCompatible]>; +def SVCMPHS_WIDE : SInst<"svcmpge_wide[_{d}]", "PPdw", "UcUsUi", MergeNone, "aarch64_sve_cmphs_wide", [IsStreamingCompatible]>; +def SVCMPLO_WIDE : SInst<"svcmplt_wide[_{d}]", "PPdw", "UcUsUi", MergeNone, "aarch64_sve_cmplo_wide", [IsStreamingCompatible]>; +def SVCMPLS_WIDE : SInst<"svcmple_wide[_{d}]", "PPdw", "UcUsUi", MergeNone, "aarch64_sve_cmpls_wide", [IsStreamingCompatible]>; + +def SVCMPEQ_WIDE_N : SInst<"svcmpeq_wide[_n_{d}]", "PPdj", "csi", MergeNone, "aarch64_sve_cmpeq_wide", [IsStreamingCompatible]>; +def SVCMPNE_WIDE_N : SInst<"svcmpne_wide[_n_{d}]", "PPdj", "csi", MergeNone, "aarch64_sve_cmpne_wide", [IsStreamingCompatible]>; +def SVCMPGE_WIDE_N : SInst<"svcmpge_wide[_n_{d}]", "PPdj", "csi", MergeNone, "aarch64_sve_cmpge_wide", [IsStreamingCompatible]>; +def SVCMPGT_WIDE_N : SInst<"svcmpgt_wide[_n_{d}]", "PPdj", "csi", MergeNone, "aarch64_sve_cmpgt_wide", [IsStreamingCompatible]>; +def SVCMPLE_WIDE_N : SInst<"svcmple_wide[_n_{d}]", "PPdj", "csi", MergeNone, "aarch64_sve_cmple_wide", [IsStreamingCompatible]>; +def SVCMPLT_WIDE_N : SInst<"svcmplt_wide[_n_{d}]", "PPdj", "csi", MergeNone, "aarch64_sve_cmplt_wide", [IsStreamingCompatible]>; +def SVCMPHS_WIDE_N : SInst<"svcmpge_wide[_n_{d}]", "PPdj", "UcUsUi", MergeNone, "aarch64_sve_cmphs_wide", [IsStreamingCompatible]>; +def SVCMPHI_WIDE_N : SInst<"svcmpgt_wide[_n_{d}]", "PPdj", "UcUsUi", MergeNone, "aarch64_sve_cmphi_wide", [IsStreamingCompatible]>; +def SVCMPLO_WIDE_N : SInst<"svcmplt_wide[_n_{d}]", "PPdj", "UcUsUi", MergeNone, "aarch64_sve_cmplo_wide", [IsStreamingCompatible]>; +def SVCMPLS_WIDE_N : SInst<"svcmple_wide[_n_{d}]", "PPdj", "UcUsUi", MergeNone, "aarch64_sve_cmpls_wide", [IsStreamingCompatible]>; //////////////////////////////////////////////////////////////////////////////// // While comparisons -def SVWHILELE_S32 : SInst<"svwhilele_{d}[_{1}]", "Pkk", "PcPsPiPl", MergeNone, "aarch64_sve_whilele", [IsOverloadWhile]>; -def SVWHILELE_S64 : SInst<"svwhilele_{d}[_{1}]", "Pll", "PcPsPiPl", MergeNone, "aarch64_sve_whilele", [IsOverloadWhile]>; -def SVWHILELO_U32 : SInst<"svwhilelt_{d}[_{1}]", "Pmm", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilelo", [IsOverloadWhile]>; -def SVWHILELO_U64 : SInst<"svwhilelt_{d}[_{1}]", "Pnn", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilelo", [IsOverloadWhile]>; -def SVWHILELS_U32 : SInst<"svwhilele_{d}[_{1}]", "Pmm", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilels", [IsOverloadWhile]>; -def SVWHILELS_U64 : SInst<"svwhilele_{d}[_{1}]", "Pnn", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilels", [IsOverloadWhile]>; -def SVWHILELT_S32 : SInst<"svwhilelt_{d}[_{1}]", "Pkk", "PcPsPiPl", MergeNone, "aarch64_sve_whilelt", [IsOverloadWhile]>; -def SVWHILELT_S64 : SInst<"svwhilelt_{d}[_{1}]", "Pll", "PcPsPiPl", MergeNone, "aarch64_sve_whilelt", [IsOverloadWhile]>; +def SVWHILELE_S32 : SInst<"svwhilele_{d}[_{1}]", "Pkk", "PcPsPiPl", MergeNone, "aarch64_sve_whilele", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +def SVWHILELE_S64 : SInst<"svwhilele_{d}[_{1}]", "Pll", "PcPsPiPl", MergeNone, "aarch64_sve_whilele", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +def SVWHILELO_U32 : SInst<"svwhilelt_{d}[_{1}]", "Pmm", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilelo", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +def SVWHILELO_U64 : SInst<"svwhilelt_{d}[_{1}]", "Pnn", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilelo", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +def SVWHILELS_U32 : SInst<"svwhilele_{d}[_{1}]", "Pmm", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilels", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +def SVWHILELS_U64 : SInst<"svwhilele_{d}[_{1}]", "Pnn", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilels", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +def SVWHILELT_S32 : SInst<"svwhilelt_{d}[_{1}]", "Pkk", "PcPsPiPl", MergeNone, "aarch64_sve_whilelt", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +def SVWHILELT_S64 : SInst<"svwhilelt_{d}[_{1}]", "Pll", "PcPsPiPl", MergeNone, "aarch64_sve_whilelt", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; //////////////////////////////////////////////////////////////////////////////// // Counting bit @@ -947,12 +767,12 @@ multiclass SInstCLS<string name, string types, string intrinsic, list<FlagType> def _Z : SInst<name # "[_{d}]", "uPd", types, MergeZeroExp, intrinsic, flags>; } -defm SVCLS : SInstCLS<"svcls", "csil", "aarch64_sve_cls">; -defm SVCLZ : SInstCLS<"svclz", "csilUcUsUiUl", "aarch64_sve_clz">; -defm SVCNT : SInstCLS<"svcnt", "csilUcUsUiUlhfd", "aarch64_sve_cnt">; +defm SVCLS : SInstCLS<"svcls", "csil", "aarch64_sve_cls", [IsStreamingCompatible]>; +defm SVCLZ : SInstCLS<"svclz", "csilUcUsUiUl", "aarch64_sve_clz", [IsStreamingCompatible]>; +defm SVCNT : SInstCLS<"svcnt", "csilUcUsUiUlhfd", "aarch64_sve_cnt", [IsStreamingCompatible]>; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - defm SVCNT_BF16 : SInstCLS<"svcnt", "b", "aarch64_sve_cnt">; +let TargetGuard = "sve,bf16" in { + defm SVCNT_BF16 : SInstCLS<"svcnt", "b", "aarch64_sve_cnt", [IsStreamingCompatible]>; } //////////////////////////////////////////////////////////////////////////////// @@ -979,18 +799,18 @@ defm SVREVW : SInstZPZ<"svrevw", "lUl", "aarch64_sve_revw">; defm SVABS_F : SInstZPZ<"svabs", "hfd", "aarch64_sve_fabs">; defm SVNEG_F : SInstZPZ<"svneg", "hfd", "aarch64_sve_fneg">; -defm SVABD_F : SInstZPZZ<"svabd", "hfd", "aarch64_sve_fabd">; -defm SVADD_F : SInstZPZZ<"svadd", "hfd", "aarch64_sve_fadd">; -defm SVDIV_F : SInstZPZZ<"svdiv", "hfd", "aarch64_sve_fdiv">; -defm SVDIVR_F : SInstZPZZ<"svdivr", "hfd", "aarch64_sve_fdivr">; -defm SVMAX_F : SInstZPZZ<"svmax", "hfd", "aarch64_sve_fmax">; -defm SVMAXNM : SInstZPZZ<"svmaxnm","hfd", "aarch64_sve_fmaxnm">; -defm SVMIN_F : SInstZPZZ<"svmin", "hfd", "aarch64_sve_fmin">; -defm SVMINNM : SInstZPZZ<"svminnm","hfd", "aarch64_sve_fminnm">; -defm SVMUL_F : SInstZPZZ<"svmul", "hfd", "aarch64_sve_fmul">; -defm SVMULX : SInstZPZZ<"svmulx", "hfd", "aarch64_sve_fmulx">; -defm SVSUB_F : SInstZPZZ<"svsub", "hfd", "aarch64_sve_fsub">; -defm SVSUBR_F : SInstZPZZ<"svsubr", "hfd", "aarch64_sve_fsubr">; +defm SVABD_F : SInstZPZZ<"svabd", "hfd", "aarch64_sve_fabd", "aarch64_sve_fabd_u">; +defm SVADD_F : SInstZPZZ<"svadd", "hfd", "aarch64_sve_fadd", "aarch64_sve_fadd_u">; +defm SVDIV_F : SInstZPZZ<"svdiv", "hfd", "aarch64_sve_fdiv", "aarch64_sve_fdiv_u">; +defm SVDIVR_F : SInstZPZZ<"svdivr", "hfd", "aarch64_sve_fdivr", "aarch64_sve_fdiv_u", [ReverseMergeAnyBinOp]>; +defm SVMAX_F : SInstZPZZ<"svmax", "hfd", "aarch64_sve_fmax", "aarch64_sve_fmax_u">; +defm SVMAXNM : SInstZPZZ<"svmaxnm","hfd", "aarch64_sve_fmaxnm", "aarch64_sve_fmaxnm_u">; +defm SVMIN_F : SInstZPZZ<"svmin", "hfd", "aarch64_sve_fmin", "aarch64_sve_fmin_u">; +defm SVMINNM : SInstZPZZ<"svminnm","hfd", "aarch64_sve_fminnm", "aarch64_sve_fminnm_u">; +defm SVMUL_F : SInstZPZZ<"svmul", "hfd", "aarch64_sve_fmul", "aarch64_sve_fmul_u">; +defm SVMULX : SInstZPZZ<"svmulx", "hfd", "aarch64_sve_fmulx", "aarch64_sve_fmulx_u">; +defm SVSUB_F : SInstZPZZ<"svsub", "hfd", "aarch64_sve_fsub", "aarch64_sve_fsub_u">; +defm SVSUBR_F : SInstZPZZ<"svsubr", "hfd", "aarch64_sve_fsubr", "aarch64_sve_fsub_u", [ReverseMergeAnyBinOp]>; defm SVRECPX : SInstZPZ<"svrecpx", "hfd", "aarch64_sve_frecpx">; defm SVRINTA : SInstZPZ<"svrinta", "hfd", "aarch64_sve_frinta">; @@ -1007,79 +827,79 @@ def SVTMAD : SInst<"svtmad[_{d}]", "dddi", "hfd", MergeNone, "aarch64_sve_ftma def SVTSMUL : SInst<"svtsmul[_{d}]", "ddu", "hfd", MergeNone, "aarch64_sve_ftsmul_x">; def SVTSSEL : SInst<"svtssel[_{d}]", "ddu", "hfd", MergeNone, "aarch64_sve_ftssel_x">; -def SVSCALE_M : SInst<"svscale[_{d}]", "dPdx", "hfd", MergeOp1, "aarch64_sve_fscale">; -def SVSCALE_X : SInst<"svscale[_{d}]", "dPdx", "hfd", MergeAny, "aarch64_sve_fscale">; -def SVSCALE_Z : SInst<"svscale[_{d}]", "dPdx", "hfd", MergeZero, "aarch64_sve_fscale">; - -def SVSCALE_N_M : SInst<"svscale[_n_{d}]", "dPdK", "hfd", MergeOp1, "aarch64_sve_fscale">; -def SVSCALE_N_X : SInst<"svscale[_n_{d}]", "dPdK", "hfd", MergeAny, "aarch64_sve_fscale">; -def SVSCALE_N_Z : SInst<"svscale[_n_{d}]", "dPdK", "hfd", MergeZero, "aarch64_sve_fscale">; - -defm SVMAD_F : SInstZPZZZ<"svmad", "hfd", "aarch64_sve_fmad">; -defm SVMLA_F : SInstZPZZZ<"svmla", "hfd", "aarch64_sve_fmla">; -defm SVMLS_F : SInstZPZZZ<"svmls", "hfd", "aarch64_sve_fmls">; -defm SVMSB_F : SInstZPZZZ<"svmsb", "hfd", "aarch64_sve_fmsb">; -defm SVNMAD_F : SInstZPZZZ<"svnmad", "hfd", "aarch64_sve_fnmad">; -defm SVNMLA_F : SInstZPZZZ<"svnmla", "hfd", "aarch64_sve_fnmla">; -defm SVNMLS_F : SInstZPZZZ<"svnmls", "hfd", "aarch64_sve_fnmls">; -defm SVNMSB_F : SInstZPZZZ<"svnmsb", "hfd", "aarch64_sve_fnmsb">; - -def SVCADD_M : SInst<"svcadd[_{d}]", "dPddi", "hfd", MergeOp1, "aarch64_sve_fcadd", [], [ImmCheck<3, ImmCheckComplexRot90_270>]>; -def SVCADD_X : SInst<"svcadd[_{d}]", "dPddi", "hfd", MergeAny, "aarch64_sve_fcadd", [], [ImmCheck<3, ImmCheckComplexRot90_270>]>; -def SVCADD_Z : SInst<"svcadd[_{d}]", "dPddi", "hfd", MergeZero, "aarch64_sve_fcadd", [], [ImmCheck<3, ImmCheckComplexRot90_270>]>; -def SVCMLA_M : SInst<"svcmla[_{d}]", "dPdddi", "hfd", MergeOp1, "aarch64_sve_fcmla", [], [ImmCheck<4, ImmCheckComplexRotAll90>]>; -def SVCMLA_X : SInst<"svcmla[_{d}]", "dPdddi", "hfd", MergeAny, "aarch64_sve_fcmla", [], [ImmCheck<4, ImmCheckComplexRotAll90>]>; -def SVCMLA_Z : SInst<"svcmla[_{d}]", "dPdddi", "hfd", MergeZero, "aarch64_sve_fcmla", [], [ImmCheck<4, ImmCheckComplexRotAll90>]>; - -def SVCMLA_LANE : SInst<"svcmla_lane[_{d}]", "ddddii", "hf", MergeNone, "aarch64_sve_fcmla_lane", [], [ImmCheck<3, ImmCheckLaneIndexCompRotate, 2>, +def SVSCALE_M : SInst<"svscale[_{d}]", "dPdx", "hfd", MergeOp1, "aarch64_sve_fscale", [IsStreamingCompatible]>; +def SVSCALE_X : SInst<"svscale[_{d}]", "dPdx", "hfd", MergeAny, "aarch64_sve_fscale", [IsStreamingCompatible]>; +def SVSCALE_Z : SInst<"svscale[_{d}]", "dPdx", "hfd", MergeZero, "aarch64_sve_fscale", [IsStreamingCompatible]>; + +def SVSCALE_N_M : SInst<"svscale[_n_{d}]", "dPdK", "hfd", MergeOp1, "aarch64_sve_fscale", [IsStreamingCompatible]>; +def SVSCALE_N_X : SInst<"svscale[_n_{d}]", "dPdK", "hfd", MergeAny, "aarch64_sve_fscale", [IsStreamingCompatible]>; +def SVSCALE_N_Z : SInst<"svscale[_n_{d}]", "dPdK", "hfd", MergeZero, "aarch64_sve_fscale", [IsStreamingCompatible]>; + +defm SVMAD_F : SInstZPZZZ<"svmad", "hfd", "aarch64_sve_fmad", "aarch64_sve_fmla_u", [IsStreamingCompatible, ReverseMergeAnyAccOp]>; +defm SVMLA_F : SInstZPZZZ<"svmla", "hfd", "aarch64_sve_fmla", "aarch64_sve_fmla_u", [IsStreamingCompatible]>; +defm SVMLS_F : SInstZPZZZ<"svmls", "hfd", "aarch64_sve_fmls", "aarch64_sve_fmls_u", [IsStreamingCompatible]>; +defm SVMSB_F : SInstZPZZZ<"svmsb", "hfd", "aarch64_sve_fmsb", "aarch64_sve_fmls_u", [IsStreamingCompatible, ReverseMergeAnyAccOp]>; +defm SVNMAD_F : SInstZPZZZ<"svnmad", "hfd", "aarch64_sve_fnmad", "aarch64_sve_fnmla_u", [IsStreamingCompatible, ReverseMergeAnyAccOp]>; +defm SVNMLA_F : SInstZPZZZ<"svnmla", "hfd", "aarch64_sve_fnmla", "aarch64_sve_fnmla_u", [IsStreamingCompatible]>; +defm SVNMLS_F : SInstZPZZZ<"svnmls", "hfd", "aarch64_sve_fnmls", "aarch64_sve_fnmls_u", [IsStreamingCompatible]>; +defm SVNMSB_F : SInstZPZZZ<"svnmsb", "hfd", "aarch64_sve_fnmsb", "aarch64_sve_fnmls_u", [IsStreamingCompatible, ReverseMergeAnyAccOp]>; + +def SVCADD_M : SInst<"svcadd[_{d}]", "dPddi", "hfd", MergeOp1, "aarch64_sve_fcadd", [IsStreamingCompatible], [ImmCheck<3, ImmCheckComplexRot90_270>]>; +def SVCADD_X : SInst<"svcadd[_{d}]", "dPddi", "hfd", MergeAny, "aarch64_sve_fcadd", [IsStreamingCompatible], [ImmCheck<3, ImmCheckComplexRot90_270>]>; +def SVCADD_Z : SInst<"svcadd[_{d}]", "dPddi", "hfd", MergeZero, "aarch64_sve_fcadd", [IsStreamingCompatible], [ImmCheck<3, ImmCheckComplexRot90_270>]>; +def SVCMLA_M : SInst<"svcmla[_{d}]", "dPdddi", "hfd", MergeOp1, "aarch64_sve_fcmla", [IsStreamingCompatible], [ImmCheck<4, ImmCheckComplexRotAll90>]>; +def SVCMLA_X : SInst<"svcmla[_{d}]", "dPdddi", "hfd", MergeAny, "aarch64_sve_fcmla", [IsStreamingCompatible], [ImmCheck<4, ImmCheckComplexRotAll90>]>; +def SVCMLA_Z : SInst<"svcmla[_{d}]", "dPdddi", "hfd", MergeZero, "aarch64_sve_fcmla", [IsStreamingCompatible], [ImmCheck<4, ImmCheckComplexRotAll90>]>; + +def SVCMLA_LANE : SInst<"svcmla_lane[_{d}]", "ddddii", "hf", MergeNone, "aarch64_sve_fcmla_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndexCompRotate, 2>, ImmCheck<4, ImmCheckComplexRotAll90>]>; -def SVMLA_LANE : SInst<"svmla_lane[_{d}]", "ddddi", "hfd", MergeNone, "aarch64_sve_fmla_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMLS_LANE : SInst<"svmls_lane[_{d}]", "ddddi", "hfd", MergeNone, "aarch64_sve_fmls_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMUL_LANE : SInst<"svmul_lane[_{d}]", "dddi", "hfd", MergeNone, "aarch64_sve_fmul_lane", [], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; +def SVMLA_LANE : SInst<"svmla_lane[_{d}]", "ddddi", "hfd", MergeNone, "aarch64_sve_fmla_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLS_LANE : SInst<"svmls_lane[_{d}]", "ddddi", "hfd", MergeNone, "aarch64_sve_fmls_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMUL_LANE : SInst<"svmul_lane[_{d}]", "dddi", "hfd", MergeNone, "aarch64_sve_fmul_lane", [IsStreamingCompatible], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; -def SVRECPE : SInst<"svrecpe[_{d}]", "dd", "hfd", MergeNone, "aarch64_sve_frecpe_x">; -def SVRECPS : SInst<"svrecps[_{d}]", "ddd", "hfd", MergeNone, "aarch64_sve_frecps_x">; -def SVRSQRTE : SInst<"svrsqrte[_{d}]", "dd", "hfd", MergeNone, "aarch64_sve_frsqrte_x">; -def SVRSQRTS : SInst<"svrsqrts[_{d}]", "ddd", "hfd", MergeNone, "aarch64_sve_frsqrts_x">; +def SVRECPE : SInst<"svrecpe[_{d}]", "dd", "hfd", MergeNone, "aarch64_sve_frecpe_x", [IsStreamingCompatible]>; +def SVRECPS : SInst<"svrecps[_{d}]", "ddd", "hfd", MergeNone, "aarch64_sve_frecps_x", [IsStreamingCompatible]>; +def SVRSQRTE : SInst<"svrsqrte[_{d}]", "dd", "hfd", MergeNone, "aarch64_sve_frsqrte_x", [IsStreamingCompatible]>; +def SVRSQRTS : SInst<"svrsqrts[_{d}]", "ddd", "hfd", MergeNone, "aarch64_sve_frsqrts_x", [IsStreamingCompatible]>; //////////////////////////////////////////////////////////////////////////////// // Floating-point reductions -def SVFADDA : SInst<"svadda[_{d}]", "sPsd", "hfd", MergeNone, "aarch64_sve_fadda">; -def SVFADDV : SInst<"svaddv[_{d}]", "sPd", "hfd", MergeNone, "aarch64_sve_faddv">; -def SVFMAXV : SInst<"svmaxv[_{d}]", "sPd", "hfd", MergeNone, "aarch64_sve_fmaxv">; -def SVFMAXNMV : SInst<"svmaxnmv[_{d}]", "sPd", "hfd", MergeNone, "aarch64_sve_fmaxnmv">; -def SVFMINV : SInst<"svminv[_{d}]", "sPd", "hfd", MergeNone, "aarch64_sve_fminv">; -def SVFMINNMV : SInst<"svminnmv[_{d}]", "sPd", "hfd", MergeNone, "aarch64_sve_fminnmv">; +def SVFADDA : SInst<"svadda[_{d}]", "sPsd", "hfd", MergeNone, "aarch64_sve_fadda", [IsStreamingCompatible]>; +def SVFADDV : SInst<"svaddv[_{d}]", "sPd", "hfd", MergeNone, "aarch64_sve_faddv", [IsStreamingCompatible]>; +def SVFMAXV : SInst<"svmaxv[_{d}]", "sPd", "hfd", MergeNone, "aarch64_sve_fmaxv", [IsStreamingCompatible]>; +def SVFMAXNMV : SInst<"svmaxnmv[_{d}]", "sPd", "hfd", MergeNone, "aarch64_sve_fmaxnmv", [IsStreamingCompatible]>; +def SVFMINV : SInst<"svminv[_{d}]", "sPd", "hfd", MergeNone, "aarch64_sve_fminv", [IsStreamingCompatible]>; +def SVFMINNMV : SInst<"svminnmv[_{d}]", "sPd", "hfd", MergeNone, "aarch64_sve_fminnmv", [IsStreamingCompatible]>; //////////////////////////////////////////////////////////////////////////////// // Floating-point comparisons -def SVACGE : SInst<"svacge[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_facge">; -def SVACGT : SInst<"svacgt[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_facgt">; -def SVACLE : SInst<"svacle[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_facge", [ReverseCompare]>; -def SVACLT : SInst<"svaclt[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_facgt", [ReverseCompare]>; -def SVCMPUO : SInst<"svcmpuo[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_fcmpuo">; - -def SVACGE_N : SInst<"svacge[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_facge">; -def SVACGT_N : SInst<"svacgt[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_facgt">; -def SVACLE_N : SInst<"svacle[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_facge", [ReverseCompare]>; -def SVACLT_N : SInst<"svaclt[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_facgt", [ReverseCompare]>; -def SVCMPUO_N : SInst<"svcmpuo[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_fcmpuo">; - -def SVCMPEQ_F : SInst<"svcmpeq[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_fcmpeq">; -def SVCMPNE_F : SInst<"svcmpne[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_fcmpne">; -def SVCMPGE_F : SInst<"svcmpge[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_fcmpge">; -def SVCMPGT_F : SInst<"svcmpgt[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_fcmpgt">; -def SVCMPLE_F : SInst<"svcmple[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_fcmpge", [ReverseCompare]>; -def SVCMPLT_F : SInst<"svcmplt[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_fcmpgt", [ReverseCompare]>; - -def SVCMPEQ_F_N : SInst<"svcmpeq[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_fcmpeq">; -def SVCMPNE_F_N : SInst<"svcmpne[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_fcmpne">; -def SVCMPGE_F_N : SInst<"svcmpge[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_fcmpge">; -def SVCMPGT_F_N : SInst<"svcmpgt[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_fcmpgt">; -def SVCMPLE_F_N : SInst<"svcmple[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_fcmpge", [ReverseCompare]>; -def SVCMPLT_F_N : SInst<"svcmplt[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_fcmpgt", [ReverseCompare]>; +def SVACGE : SInst<"svacge[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_facge", [IsStreamingCompatible]>; +def SVACGT : SInst<"svacgt[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_facgt", [IsStreamingCompatible]>; +def SVACLE : SInst<"svacle[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_facge", [ReverseCompare, IsStreamingCompatible]>; +def SVACLT : SInst<"svaclt[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_facgt", [ReverseCompare, IsStreamingCompatible]>; +def SVCMPUO : SInst<"svcmpuo[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_fcmpuo", [IsStreamingCompatible]>; + +def SVACGE_N : SInst<"svacge[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_facge", [IsStreamingCompatible]>; +def SVACGT_N : SInst<"svacgt[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_facgt", [IsStreamingCompatible]>; +def SVACLE_N : SInst<"svacle[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_facge", [ReverseCompare, IsStreamingCompatible]>; +def SVACLT_N : SInst<"svaclt[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_facgt", [ReverseCompare, IsStreamingCompatible]>; +def SVCMPUO_N : SInst<"svcmpuo[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_fcmpuo", [IsStreamingCompatible]>; + +def SVCMPEQ_F : SInst<"svcmpeq[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_fcmpeq", [IsStreamingCompatible]>; +def SVCMPNE_F : SInst<"svcmpne[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_fcmpne", [IsStreamingCompatible]>; +def SVCMPGE_F : SInst<"svcmpge[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_fcmpge", [IsStreamingCompatible]>; +def SVCMPGT_F : SInst<"svcmpgt[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_fcmpgt", [IsStreamingCompatible]>; +def SVCMPLE_F : SInst<"svcmple[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_fcmpge", [ReverseCompare, IsStreamingCompatible]>; +def SVCMPLT_F : SInst<"svcmplt[_{d}]", "PPdd", "hfd", MergeNone, "aarch64_sve_fcmpgt", [ReverseCompare, IsStreamingCompatible]>; + +def SVCMPEQ_F_N : SInst<"svcmpeq[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_fcmpeq", [IsStreamingCompatible]>; +def SVCMPNE_F_N : SInst<"svcmpne[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_fcmpne", [IsStreamingCompatible]>; +def SVCMPGE_F_N : SInst<"svcmpge[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_fcmpge", [IsStreamingCompatible]>; +def SVCMPGT_F_N : SInst<"svcmpgt[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_fcmpgt", [IsStreamingCompatible]>; +def SVCMPLE_F_N : SInst<"svcmple[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_fcmpge", [ReverseCompare, IsStreamingCompatible]>; +def SVCMPLT_F_N : SInst<"svcmplt[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sve_fcmpgt", [ReverseCompare, IsStreamingCompatible]>; //////////////////////////////////////////////////////////////////////////////// // Floating-point conversions @@ -1087,16 +907,16 @@ def SVCMPLT_F_N : SInst<"svcmplt[_n_{d}]", "PPda", "hfd", MergeNone, "aarch64_sv multiclass SInstCvtMXZ< string name, string m_types, string xz_types, string types, string intrinsic, list<FlagType> flags = [IsOverloadNone]> { - def _M : SInst<name, m_types, types, MergeOp1, intrinsic, flags>; - def _X : SInst<name, xz_types, types, MergeAnyExp, intrinsic, flags>; - def _Z : SInst<name, xz_types, types, MergeZeroExp, intrinsic, flags>; + def _M : SInst<name, m_types, types, MergeOp1, intrinsic, !listconcat(flags, [IsStreamingCompatible])>; + def _X : SInst<name, xz_types, types, MergeAnyExp, intrinsic, !listconcat(flags, [IsStreamingCompatible])>; + def _Z : SInst<name, xz_types, types, MergeZeroExp, intrinsic, !listconcat(flags, [IsStreamingCompatible])>; } multiclass SInstCvtMX<string name, string m_types, string xz_types, string types, string intrinsic, list<FlagType> flags = [IsOverloadNone]> { - def _M : SInst<name, m_types, types, MergeOp1, intrinsic, flags>; - def _X : SInst<name, xz_types, types, MergeAnyExp, intrinsic, flags>; + def _M : SInst<name, m_types, types, MergeOp1, intrinsic, !listconcat(flags, [IsStreamingCompatible])>; + def _X : SInst<name, xz_types, types, MergeAnyExp, intrinsic, !listconcat(flags, [IsStreamingCompatible])>; } // svcvt_s##_f16 @@ -1108,9 +928,9 @@ defm SVFCVTZS_S64_F16 : SInstCvtMXZ<"svcvt_s64[_f16]", "ddPO", "dPO", "l", "aar defm SVFCVTZS_S32_F32 : SInstCvtMXZ<"svcvt_s32[_f32]", "ddPM", "dPM", "i", "aarch64_sve_fcvtzs", [IsOverloadCvt]>; defm SVFCVTZS_S64_F32 : SInstCvtMXZ<"svcvt_s64[_f32]", "ddPM", "dPM", "l", "aarch64_sve_fcvtzs_i64f32">; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { +let TargetGuard = "sve,bf16" in { defm SVCVT_BF16_F32 : SInstCvtMXZ<"svcvt_bf16[_f32]", "ddPM", "dPM", "b", "aarch64_sve_fcvt_bf16f32">; - def SVCVTNT_BF16_F32 : SInst<"svcvtnt_bf16[_f32]", "ddPM", "b", MergeOp1, "aarch64_sve_fcvtnt_bf16f32", [IsOverloadNone]>; + def SVCVTNT_BF16_F32 : SInst<"svcvtnt_bf16[_f32]", "ddPM", "b", MergeOp1, "aarch64_sve_fcvtnt_bf16f32", [IsOverloadNone, IsStreamingCompatible]>; } // svcvt_s##_f64 @@ -1168,17 +988,17 @@ defm SVFCVT_F32_F64 : SInstCvtMXZ<"svcvt_f32[_f64]", "MMPd", "MPd", "d", "aarc defm SVFCVT_F64_F16 : SInstCvtMXZ<"svcvt_f64[_f16]", "ddPO", "dPO", "d", "aarch64_sve_fcvt_f64f16">; defm SVFCVT_F64_F32 : SInstCvtMXZ<"svcvt_f64[_f32]", "ddPM", "dPM", "d", "aarch64_sve_fcvt_f64f32">; -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { +let TargetGuard = "sve2" in { defm SVCVTLT_F32 : SInstCvtMX<"svcvtlt_f32[_f16]", "ddPh", "dPh", "f", "aarch64_sve_fcvtlt_f32f16">; defm SVCVTLT_F64 : SInstCvtMX<"svcvtlt_f64[_f32]", "ddPh", "dPh", "d", "aarch64_sve_fcvtlt_f64f32">; defm SVCVTX_F32 : SInstCvtMXZ<"svcvtx_f32[_f64]", "MMPd", "MPd", "d", "aarch64_sve_fcvtx_f32f64">; -def SVCVTNT_F32 : SInst<"svcvtnt_f16[_f32]", "hhPd", "f", MergeOp1, "aarch64_sve_fcvtnt_f16f32", [IsOverloadNone]>; -def SVCVTNT_F64 : SInst<"svcvtnt_f32[_f64]", "hhPd", "d", MergeOp1, "aarch64_sve_fcvtnt_f32f64", [IsOverloadNone]>; +def SVCVTNT_F32 : SInst<"svcvtnt_f16[_f32]", "hhPd", "f", MergeOp1, "aarch64_sve_fcvtnt_f16f32", [IsOverloadNone, IsStreamingCompatible]>; +def SVCVTNT_F64 : SInst<"svcvtnt_f32[_f64]", "hhPd", "d", MergeOp1, "aarch64_sve_fcvtnt_f32f64", [IsOverloadNone, IsStreamingCompatible]>; // SVCVTNT_X : Implemented as macro by SveEmitter.cpp -def SVCVTXNT_F32 : SInst<"svcvtxnt_f32[_f64]", "MMPd", "d", MergeOp1, "aarch64_sve_fcvtxnt_f32f64", [IsOverloadNone]>; +def SVCVTXNT_F32 : SInst<"svcvtxnt_f32[_f64]", "MMPd", "d", MergeOp1, "aarch64_sve_fcvtxnt_f32f64", [IsOverloadNone, IsStreamingCompatible]>; // SVCVTXNT_X_F32 : Implemented as macro by SveEmitter.cpp } @@ -1187,9 +1007,9 @@ def SVCVTXNT_F32 : SInst<"svcvtxnt_f32[_f64]", "MMPd", "d", MergeOp1, "aarch6 // Permutations and selection multiclass SVEPerm<string name, string proto, string i> { - def : SInst<name, proto, "csilUcUsUiUlhfd", MergeNone, i>; - let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - def: SInst<name, proto, "b", MergeNone, i>; + def : SInst<name, proto, "csilUcUsUiUlhfd", MergeNone, i, [IsStreamingCompatible]>; + let TargetGuard = "sve,bf16" in { + def: SInst<name, proto, "b", MergeNone, i, [IsStreamingCompatible]>; } } @@ -1203,135 +1023,156 @@ def SVCOMPACT : SInst<"svcompact[_{d}]", "dPd", "ilUiUlfd", MergeNo // splat of any possible lane. It is upto LLVM to pick a more efficient // instruction such as DUP (indexed) if the lane index fits the range of the // instruction's immediate. -def SVDUP_LANE : SInst<"svdup_lane[_{d}]", "ddL", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tbl">; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { +def SVDUP_LANE : SInst<"svdup_lane[_{d}]", "ddL", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tbl", [IsStreamingCompatible]>; +let TargetGuard = "sve,bf16" in { def SVDUP_LANE_BF16 : - SInst<"svdup_lane[_{d}]", "ddL", "b", MergeNone, "aarch64_sve_tbl">; + SInst<"svdup_lane[_{d}]", "ddL", "b", MergeNone, "aarch64_sve_tbl", [IsStreamingCompatible]>; } -def SVDUPQ_LANE : SInst<"svdupq_lane[_{d}]", "ddn", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_dupq_lane">; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - def SVDUPQ_LANE_BF16 : SInst<"svdupq_lane[_{d}]", "ddn", "b", MergeNone, "aarch64_sve_dupq_lane">; +def SVDUPQ_LANE : SInst<"svdupq_lane[_{d}]", "ddn", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_dupq_lane", [IsStreamingCompatible]>; +let TargetGuard = "sve,bf16" in { + def SVDUPQ_LANE_BF16 : SInst<"svdupq_lane[_{d}]", "ddn", "b", MergeNone, "aarch64_sve_dupq_lane", [IsStreamingCompatible]>; } -def SVEXT : SInst<"svext[_{d}]", "dddi", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_ext", [], [ImmCheck<2, ImmCheckExtract, 1>]>; +def SVEXT : SInst<"svext[_{d}]", "dddi", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_ext", [IsStreamingCompatible], [ImmCheck<2, ImmCheckExtract, 1>]>; defm SVLASTA : SVEPerm<"svlasta[_{d}]", "sPd", "aarch64_sve_lasta">; defm SVLASTB : SVEPerm<"svlastb[_{d}]", "sPd", "aarch64_sve_lastb">; -def SVREV : SInst<"svrev[_{d}]", "dd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_rev">; -def SVSEL : SInst<"svsel[_{d}]", "dPdd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_sel">; -def SVSPLICE : SInst<"svsplice[_{d}]", "dPdd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_splice">; -def SVTBL : SInst<"svtbl[_{d}]", "ddu", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tbl">; - -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { - def SVTBL_BF16 : SInst<"svtbl[_{d}]", "ddu", "b", MergeNone, "aarch64_sve_tbl">; -} - -def SVTRN1 : SInst<"svtrn1[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_trn1">; -def SVTRN2 : SInst<"svtrn2[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_trn2">; -def SVUNPKHI_S : SInst<"svunpkhi[_{d}]", "dh", "sil", MergeNone, "aarch64_sve_sunpkhi">; -def SVUNPKHI_U : SInst<"svunpkhi[_{d}]", "dh", "UsUiUl", MergeNone, "aarch64_sve_uunpkhi">; -def SVUNPKLO_S : SInst<"svunpklo[_{d}]", "dh", "sil", MergeNone, "aarch64_sve_sunpklo">; -def SVUNPKLO_U : SInst<"svunpklo[_{d}]", "dh", "UsUiUl", MergeNone, "aarch64_sve_uunpklo">; -def SVUZP1 : SInst<"svuzp1[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_uzp1">; -def SVUZP2 : SInst<"svuzp2[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_uzp2">; -def SVZIP1 : SInst<"svzip1[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_zip1">; -def SVZIP2 : SInst<"svzip2[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_zip2">; - -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { -def SVEXT_BF16 : SInst<"svext[_{d}]", "dddi", "b", MergeNone, "aarch64_sve_ext", [], [ImmCheck<2, ImmCheckExtract, 1>]>; -def SVREV_BF16 : SInst<"svrev[_{d}]", "dd", "b", MergeNone, "aarch64_sve_rev">; -def SVSEL_BF16 : SInst<"svsel[_{d}]", "dPdd", "b", MergeNone, "aarch64_sve_sel">; -def SVSPLICE_BF16 : SInst<"svsplice[_{d}]", "dPdd", "b", MergeNone, "aarch64_sve_splice">; -def SVTRN1_BF16 : SInst<"svtrn1[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_trn1">; -def SVTRN2_BF16 : SInst<"svtrn2[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_trn2">; -def SVUZP1_BF16 : SInst<"svuzp1[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_uzp1">; -def SVUZP2_BF16 : SInst<"svuzp2[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_uzp2">; -def SVZIP1_BF16 : SInst<"svzip1[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_zip1">; -def SVZIP2_BF16 : SInst<"svzip2[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_zip2">; -} - -def SVREV_B : SInst<"svrev_{d}", "PP", "PcPsPiPl", MergeNone, "aarch64_sve_rev">; -def SVSEL_B : SInst<"svsel[_b]", "PPPP", "Pc", MergeNone, "aarch64_sve_sel">; -def SVTRN1_B : SInst<"svtrn1_{d}", "PPP", "PcPsPiPl", MergeNone, "aarch64_sve_trn1">; -def SVTRN2_B : SInst<"svtrn2_{d}", "PPP", "PcPsPiPl", MergeNone, "aarch64_sve_trn2">; -def SVPUNPKHI : SInst<"svunpkhi[_b]", "PP", "Pc", MergeNone, "aarch64_sve_punpkhi">; -def SVPUNPKLO : SInst<"svunpklo[_b]", "PP", "Pc", MergeNone, "aarch64_sve_punpklo">; -def SVUZP1_B : SInst<"svuzp1_{d}", "PPP", "PcPsPiPl", MergeNone, "aarch64_sve_uzp1">; -def SVUZP2_B : SInst<"svuzp2_{d}", "PPP", "PcPsPiPl", MergeNone, "aarch64_sve_uzp2">; -def SVZIP1_B : SInst<"svzip1_{d}", "PPP", "PcPsPiPl", MergeNone, "aarch64_sve_zip1">; -def SVZIP2_B : SInst<"svzip2_{d}", "PPP", "PcPsPiPl", MergeNone, "aarch64_sve_zip2">; +def SVREV : SInst<"svrev[_{d}]", "dd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_rev", [IsStreamingCompatible]>; +def SVSEL : SInst<"svsel[_{d}]", "dPdd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_sel", [IsStreamingCompatible]>; +def SVSPLICE : SInst<"svsplice[_{d}]", "dPdd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_splice", [IsStreamingCompatible]>; +def SVTBL : SInst<"svtbl[_{d}]", "ddu", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tbl", [IsStreamingCompatible]>; + +let TargetGuard = "sve,bf16" in { + def SVTBL_BF16 : SInst<"svtbl[_{d}]", "ddu", "b", MergeNone, "aarch64_sve_tbl", [IsStreamingCompatible]>; +} + +def SVTRN1 : SInst<"svtrn1[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_trn1", [IsStreamingCompatible]>; +def SVTRN2 : SInst<"svtrn2[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_trn2", [IsStreamingCompatible]>; +def SVUNPKHI_S : SInst<"svunpkhi[_{d}]", "dh", "sil", MergeNone, "aarch64_sve_sunpkhi", [IsStreamingCompatible]>; +def SVUNPKHI_U : SInst<"svunpkhi[_{d}]", "dh", "UsUiUl", MergeNone, "aarch64_sve_uunpkhi", [IsStreamingCompatible]>; +def SVUNPKLO_S : SInst<"svunpklo[_{d}]", "dh", "sil", MergeNone, "aarch64_sve_sunpklo", [IsStreamingCompatible]>; +def SVUNPKLO_U : SInst<"svunpklo[_{d}]", "dh", "UsUiUl", MergeNone, "aarch64_sve_uunpklo", [IsStreamingCompatible]>; +def SVUZP1 : SInst<"svuzp1[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_uzp1", [IsStreamingCompatible]>; +def SVUZP2 : SInst<"svuzp2[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_uzp2", [IsStreamingCompatible]>; +def SVZIP1 : SInst<"svzip1[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_zip1", [IsStreamingCompatible]>; +def SVZIP2 : SInst<"svzip2[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_zip2", [IsStreamingCompatible]>; + +let TargetGuard = "sve,bf16" in { +def SVEXT_BF16 : SInst<"svext[_{d}]", "dddi", "b", MergeNone, "aarch64_sve_ext", [IsStreamingCompatible], [ImmCheck<2, ImmCheckExtract, 1>]>; +def SVREV_BF16 : SInst<"svrev[_{d}]", "dd", "b", MergeNone, "aarch64_sve_rev", [IsStreamingCompatible]>; +def SVSEL_BF16 : SInst<"svsel[_{d}]", "dPdd", "b", MergeNone, "aarch64_sve_sel", [IsStreamingCompatible]>; +def SVSPLICE_BF16 : SInst<"svsplice[_{d}]", "dPdd", "b", MergeNone, "aarch64_sve_splice", [IsStreamingCompatible]>; +def SVTRN1_BF16 : SInst<"svtrn1[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_trn1", [IsStreamingCompatible]>; +def SVTRN2_BF16 : SInst<"svtrn2[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_trn2", [IsStreamingCompatible]>; +def SVUZP1_BF16 : SInst<"svuzp1[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_uzp1", [IsStreamingCompatible]>; +def SVUZP2_BF16 : SInst<"svuzp2[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_uzp2", [IsStreamingCompatible]>; +def SVZIP1_BF16 : SInst<"svzip1[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_zip1", [IsStreamingCompatible]>; +def SVZIP2_BF16 : SInst<"svzip2[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_zip2", [IsStreamingCompatible]>; +} + +def SVREV_B8 : SInst<"svrev_b8", "PP", "Pc", MergeNone, "aarch64_sve_rev", [IsStreamingCompatible]>; +def SVREV_B16 : SInst<"svrev_b16", "PP", "Pc", MergeNone, "aarch64_sve_rev_b16", [IsOverloadNone, IsStreamingCompatible]>; +def SVREV_B32 : SInst<"svrev_b32", "PP", "Pc", MergeNone, "aarch64_sve_rev_b32", [IsOverloadNone, IsStreamingCompatible]>; +def SVREV_B64 : SInst<"svrev_b64", "PP", "Pc", MergeNone, "aarch64_sve_rev_b64", [IsOverloadNone, IsStreamingCompatible]>; +def SVSEL_B : SInst<"svsel[_b]", "PPPP", "Pc", MergeNone, "aarch64_sve_sel", [IsStreamingCompatible]>; +def SVTRN1_B8 : SInst<"svtrn1_b8", "PPP", "Pc", MergeNone, "aarch64_sve_trn1", [IsStreamingCompatible]>; +def SVTRN1_B16 : SInst<"svtrn1_b16", "PPP", "Pc", MergeNone, "aarch64_sve_trn1_b16", [IsOverloadNone, IsStreamingCompatible]>; +def SVTRN1_B32 : SInst<"svtrn1_b32", "PPP", "Pc", MergeNone, "aarch64_sve_trn1_b32", [IsOverloadNone, IsStreamingCompatible]>; +def SVTRN1_B64 : SInst<"svtrn1_b64", "PPP", "Pc", MergeNone, "aarch64_sve_trn1_b64", [IsOverloadNone, IsStreamingCompatible]>; +def SVTRN2_B8 : SInst<"svtrn2_b8", "PPP", "Pc", MergeNone, "aarch64_sve_trn2", [IsStreamingCompatible]>; +def SVTRN2_B16 : SInst<"svtrn2_b16", "PPP", "Pc", MergeNone, "aarch64_sve_trn2_b16", [IsOverloadNone, IsStreamingCompatible]>; +def SVTRN2_B32 : SInst<"svtrn2_b32", "PPP", "Pc", MergeNone, "aarch64_sve_trn2_b32", [IsOverloadNone, IsStreamingCompatible]>; +def SVTRN2_B64 : SInst<"svtrn2_b64", "PPP", "Pc", MergeNone, "aarch64_sve_trn2_b64", [IsOverloadNone, IsStreamingCompatible]>; +def SVPUNPKHI : SInst<"svunpkhi[_b]", "PP", "Pc", MergeNone, "aarch64_sve_punpkhi", [IsStreamingCompatible]>; +def SVPUNPKLO : SInst<"svunpklo[_b]", "PP", "Pc", MergeNone, "aarch64_sve_punpklo", [IsStreamingCompatible]>; +def SVUZP1_B8 : SInst<"svuzp1_b8", "PPP", "Pc", MergeNone, "aarch64_sve_uzp1", [IsStreamingCompatible]>; +def SVUZP1_B16 : SInst<"svuzp1_b16", "PPP", "Pc", MergeNone, "aarch64_sve_uzp1_b16", [IsOverloadNone, IsStreamingCompatible]>; +def SVUZP1_B32 : SInst<"svuzp1_b32", "PPP", "Pc", MergeNone, "aarch64_sve_uzp1_b32", [IsOverloadNone, IsStreamingCompatible]>; +def SVUZP1_B64 : SInst<"svuzp1_b64", "PPP", "Pc", MergeNone, "aarch64_sve_uzp1_b64", [IsOverloadNone, IsStreamingCompatible]>; +def SVUZP2_B8 : SInst<"svuzp2_b8", "PPP", "Pc", MergeNone, "aarch64_sve_uzp2", [IsStreamingCompatible]>; +def SVUZP2_B16 : SInst<"svuzp2_b16", "PPP", "Pc", MergeNone, "aarch64_sve_uzp2_b16", [IsOverloadNone, IsStreamingCompatible]>; +def SVUZP2_B32 : SInst<"svuzp2_b32", "PPP", "Pc", MergeNone, "aarch64_sve_uzp2_b32", [IsOverloadNone, IsStreamingCompatible]>; +def SVUZP2_B64 : SInst<"svuzp2_b64", "PPP", "Pc", MergeNone, "aarch64_sve_uzp2_b64", [IsOverloadNone, IsStreamingCompatible]>; +def SVZIP1_B8 : SInst<"svzip1_b8", "PPP", "Pc", MergeNone, "aarch64_sve_zip1", [IsStreamingCompatible]>; +def SVZIP1_B16 : SInst<"svzip1_b16", "PPP", "Pc", MergeNone, "aarch64_sve_zip1_b16", [IsOverloadNone, IsStreamingCompatible]>; +def SVZIP1_B32 : SInst<"svzip1_b32", "PPP", "Pc", MergeNone, "aarch64_sve_zip1_b32", [IsOverloadNone, IsStreamingCompatible]>; +def SVZIP1_B64 : SInst<"svzip1_b64", "PPP", "Pc", MergeNone, "aarch64_sve_zip1_b64", [IsOverloadNone, IsStreamingCompatible]>; +def SVZIP2_B : SInst<"svzip2_b8", "PPP", "Pc", MergeNone, "aarch64_sve_zip2", [IsStreamingCompatible]>; +def SVZIP2_B16 : SInst<"svzip2_b16", "PPP", "Pc", MergeNone, "aarch64_sve_zip2_b16", [IsOverloadNone, IsStreamingCompatible]>; +def SVZIP2_B32 : SInst<"svzip2_b32", "PPP", "Pc", MergeNone, "aarch64_sve_zip2_b32", [IsOverloadNone, IsStreamingCompatible]>; +def SVZIP2_B64 : SInst<"svzip2_b64", "PPP", "Pc", MergeNone, "aarch64_sve_zip2_b64", [IsOverloadNone, IsStreamingCompatible]>; //////////////////////////////////////////////////////////////////////////////// // Predicate creation -def SVPFALSE : SInst<"svpfalse[_b]", "P", "", MergeNone, "", [IsOverloadNone]>; +def SVPFALSE : SInst<"svpfalse[_b]", "Pv", "", MergeNone, "", [IsOverloadNone, IsStreamingCompatible]>; -def SVPTRUE_PAT : SInst<"svptrue_pat_{d}", "PI", "PcPsPiPl", MergeNone, "aarch64_sve_ptrue">; -def SVPTRUE : SInst<"svptrue_{d}", "P", "PcPsPiPl", MergeNone, "aarch64_sve_ptrue", [IsAppendSVALL]>; +def SVPTRUE_PAT : SInst<"svptrue_pat_{d}", "PI", "PcPsPiPl", MergeNone, "aarch64_sve_ptrue", [IsStreamingCompatible]>; +def SVPTRUE : SInst<"svptrue_{d}", "Pv", "PcPsPiPl", MergeNone, "aarch64_sve_ptrue", [IsAppendSVALL, IsStreamingCompatible]>; -def SVDUPQ_B8 : SInst<"svdupq[_n]_{d}", "Pssssssssssssssss", "Pc", MergeNone>; -def SVDUPQ_B16 : SInst<"svdupq[_n]_{d}", "Pssssssss", "Ps", MergeNone>; -def SVDUPQ_B32 : SInst<"svdupq[_n]_{d}", "Pssss", "Pi", MergeNone>; -def SVDUPQ_B64 : SInst<"svdupq[_n]_{d}", "Pss", "Pl", MergeNone>; -def SVDUP_N_B : SInst<"svdup[_n]_{d}", "Ps", "PcPsPiPl", MergeNone>; +def SVDUPQ_B8 : SInst<"svdupq[_n]_{d}", "Pssssssssssssssss", "Pc", MergeNone, "", [IsStreamingCompatible]>; +def SVDUPQ_B16 : SInst<"svdupq[_n]_{d}", "Pssssssss", "Ps", MergeNone, "", [IsStreamingCompatible]>; +def SVDUPQ_B32 : SInst<"svdupq[_n]_{d}", "Pssss", "Pi", MergeNone, "", [IsStreamingCompatible]>; +def SVDUPQ_B64 : SInst<"svdupq[_n]_{d}", "Pss", "Pl", MergeNone, "", [IsStreamingCompatible]>; +def SVDUP_N_B : SInst<"svdup[_n]_{d}", "Ps", "PcPsPiPl", MergeNone, "", [IsStreamingCompatible]>; //////////////////////////////////////////////////////////////////////////////// // Predicate operations -def SVAND_B_Z : SInst<"svand[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_and_z">; -def SVBIC_B_Z : SInst<"svbic[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_bic_z">; -def SVEOR_B_Z : SInst<"sveor[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_eor_z">; -def SVMOV_B_Z : SInst<"svmov[_b]_z", "PPP", "Pc", MergeNone>; // Uses custom expansion -def SVNAND_B_Z : SInst<"svnand[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_nand_z">; -def SVNOR_B_Z : SInst<"svnor[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_nor_z">; -def SVNOT_B_Z : SInst<"svnot[_b]_z", "PPP", "Pc", MergeNone>; // Uses custom expansion -def SVORN_B_Z : SInst<"svorn[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_orn_z">; -def SVORR_B_Z : SInst<"svorr[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_orr_z">; - -def SVBRKA : SInst<"svbrka[_b]_m", "PPPP", "Pc", MergeNone, "aarch64_sve_brka">; -def SVBRKA_Z : SInst<"svbrka[_b]_z", "PPP", "Pc", MergeNone, "aarch64_sve_brka_z">; -def SVBRKB : SInst<"svbrkb[_b]_m", "PPPP", "Pc", MergeNone, "aarch64_sve_brkb">; -def SVBRKB_Z : SInst<"svbrkb[_b]_z", "PPP", "Pc", MergeNone, "aarch64_sve_brkb_z">; -def SVBRKN_Z : SInst<"svbrkn[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_brkn_z">; -def SVBRKPA_Z : SInst<"svbrkpa[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_brkpa_z">; -def SVBRKPB_Z : SInst<"svbrkpb[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_brkpb_z">; - -def SVPFIRST : SInst<"svpfirst[_b]", "PPP", "Pc", MergeNone, "aarch64_sve_pfirst">; -def SVPNEXT : SInst<"svpnext_{d}", "PPP", "PcPsPiPl", MergeNone, "aarch64_sve_pnext">; +def SVAND_B_Z : SInst<"svand[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_and_z", [IsStreamingCompatible]>; +def SVBIC_B_Z : SInst<"svbic[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_bic_z", [IsStreamingCompatible]>; +def SVEOR_B_Z : SInst<"sveor[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_eor_z", [IsStreamingCompatible]>; +def SVMOV_B_Z : SInst<"svmov[_b]_z", "PPP", "Pc", MergeNone, "", [IsStreamingCompatible]>; // Uses custom expansion +def SVNAND_B_Z : SInst<"svnand[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_nand_z", [IsStreamingCompatible]>; +def SVNOR_B_Z : SInst<"svnor[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_nor_z", [IsStreamingCompatible]>; +def SVNOT_B_Z : SInst<"svnot[_b]_z", "PPP", "Pc", MergeNone, "", [IsStreamingCompatible]>; // Uses custom expansion +def SVORN_B_Z : SInst<"svorn[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_orn_z", [IsStreamingCompatible]>; +def SVORR_B_Z : SInst<"svorr[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_orr_z", [IsStreamingCompatible]>; + +def SVBRKA : SInst<"svbrka[_b]_m", "PPPP", "Pc", MergeNone, "aarch64_sve_brka", [IsStreamingCompatible]>; +def SVBRKA_Z : SInst<"svbrka[_b]_z", "PPP", "Pc", MergeNone, "aarch64_sve_brka_z", [IsStreamingCompatible]>; +def SVBRKB : SInst<"svbrkb[_b]_m", "PPPP", "Pc", MergeNone, "aarch64_sve_brkb", [IsStreamingCompatible]>; +def SVBRKB_Z : SInst<"svbrkb[_b]_z", "PPP", "Pc", MergeNone, "aarch64_sve_brkb_z", [IsStreamingCompatible]>; +def SVBRKN_Z : SInst<"svbrkn[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_brkn_z", [IsStreamingCompatible]>; +def SVBRKPA_Z : SInst<"svbrkpa[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_brkpa_z", [IsStreamingCompatible]>; +def SVBRKPB_Z : SInst<"svbrkpb[_b]_z", "PPPP", "Pc", MergeNone, "aarch64_sve_brkpb_z", [IsStreamingCompatible]>; + +def SVPFIRST : SInst<"svpfirst[_b]", "PPP", "Pc", MergeNone, "aarch64_sve_pfirst", [IsStreamingCompatible]>; +def SVPNEXT : SInst<"svpnext_{d}", "PPP", "PcPsPiPl", MergeNone, "aarch64_sve_pnext", [IsStreamingCompatible]>; //////////////////////////////////////////////////////////////////////////////// // Testing predicates -def SVPTEST_ANY : SInst<"svptest_any", "sPP", "Pc", MergeNone, "aarch64_sve_ptest_any">; -def SVPTEST_FIRST : SInst<"svptest_first", "sPP", "Pc", MergeNone, "aarch64_sve_ptest_first">; -def SVPTEST_LAST : SInst<"svptest_last", "sPP", "Pc", MergeNone, "aarch64_sve_ptest_last">; +def SVPTEST_ANY : SInst<"svptest_any", "sPP", "Pc", MergeNone, "aarch64_sve_ptest_any", [IsStreamingCompatible]>; +def SVPTEST_FIRST : SInst<"svptest_first", "sPP", "Pc", MergeNone, "aarch64_sve_ptest_first", [IsStreamingCompatible]>; +def SVPTEST_LAST : SInst<"svptest_last", "sPP", "Pc", MergeNone, "aarch64_sve_ptest_last", [IsStreamingCompatible]>; //////////////////////////////////////////////////////////////////////////////// // FFR manipulation -def SVRDFFR : SInst<"svrdffr", "P", "Pc", MergeNone, "", [IsOverloadNone]>; +def SVRDFFR : SInst<"svrdffr", "Pv", "Pc", MergeNone, "", [IsOverloadNone]>; def SVRDFFR_Z : SInst<"svrdffr_z", "PP", "Pc", MergeNone, "", [IsOverloadNone]>; -def SVSETFFR : SInst<"svsetffr", "v", "", MergeNone, "", [IsOverloadNone]>; +def SVSETFFR : SInst<"svsetffr", "vv", "", MergeNone, "", [IsOverloadNone]>; def SVWRFFR : SInst<"svwrffr", "vP", "Pc", MergeNone, "", [IsOverloadNone]>; //////////////////////////////////////////////////////////////////////////////// // Counting elements -def SVCNTB_PAT : SInst<"svcntb_pat", "nI", "", MergeNone, "aarch64_sve_cntb", [IsOverloadNone]>; -def SVCNTH_PAT : SInst<"svcnth_pat", "nI", "", MergeNone, "aarch64_sve_cnth", [IsOverloadNone]>; -def SVCNTW_PAT : SInst<"svcntw_pat", "nI", "", MergeNone, "aarch64_sve_cntw", [IsOverloadNone]>; -def SVCNTD_PAT : SInst<"svcntd_pat", "nI", "", MergeNone, "aarch64_sve_cntd", [IsOverloadNone]>; +def SVCNTB_PAT : SInst<"svcntb_pat", "nI", "", MergeNone, "aarch64_sve_cntb", [IsOverloadNone, IsStreamingCompatible]>; +def SVCNTH_PAT : SInst<"svcnth_pat", "nI", "", MergeNone, "aarch64_sve_cnth", [IsOverloadNone, IsStreamingCompatible]>; +def SVCNTW_PAT : SInst<"svcntw_pat", "nI", "", MergeNone, "aarch64_sve_cntw", [IsOverloadNone, IsStreamingCompatible]>; +def SVCNTD_PAT : SInst<"svcntd_pat", "nI", "", MergeNone, "aarch64_sve_cntd", [IsOverloadNone, IsStreamingCompatible]>; -def SVCNTB : SInst<"svcntb", "n", "", MergeNone, "aarch64_sve_cntb", [IsAppendSVALL, IsOverloadNone]>; -def SVCNTH : SInst<"svcnth", "n", "", MergeNone, "aarch64_sve_cnth", [IsAppendSVALL, IsOverloadNone]>; -def SVCNTW : SInst<"svcntw", "n", "", MergeNone, "aarch64_sve_cntw", [IsAppendSVALL, IsOverloadNone]>; -def SVCNTD : SInst<"svcntd", "n", "", MergeNone, "aarch64_sve_cntd", [IsAppendSVALL, IsOverloadNone]>; +def SVCNTB : SInst<"svcntb", "nv", "", MergeNone, "aarch64_sve_cntb", [IsAppendSVALL, IsOverloadNone, IsStreamingCompatible]>; +def SVCNTH : SInst<"svcnth", "nv", "", MergeNone, "aarch64_sve_cnth", [IsAppendSVALL, IsOverloadNone, IsStreamingCompatible]>; +def SVCNTW : SInst<"svcntw", "nv", "", MergeNone, "aarch64_sve_cntw", [IsAppendSVALL, IsOverloadNone, IsStreamingCompatible]>; +def SVCNTD : SInst<"svcntd", "nv", "", MergeNone, "aarch64_sve_cntd", [IsAppendSVALL, IsOverloadNone, IsStreamingCompatible]>; -def SVCNTP : SInst<"svcntp_{d}", "nPP", "PcPsPiPl", MergeNone, "aarch64_sve_cntp">; -def SVLEN : SInst<"svlen[_{d}]", "nd", "csilUcUsUiUlhfd", MergeNone>; +def SVCNTP : SInst<"svcntp_{d}", "nPP", "PcPsPiPl", MergeNone, "aarch64_sve_cntp", [IsStreamingCompatible]>; +def SVLEN : SInst<"svlen[_{d}]", "nd", "csilUcUsUiUlhfd", MergeNone, "", [IsStreamingCompatible]>; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { -def SVLEN_BF16 : SInst<"svlen[_{d}]", "nd", "b", MergeNone>; +let TargetGuard = "sve,bf16" in { +def SVLEN_BF16 : SInst<"svlen[_{d}]", "nd", "b", MergeNone, "", [IsStreamingCompatible]>; } //////////////////////////////////////////////////////////////////////////////// @@ -1348,20 +1189,20 @@ def UnsignedWord : sat_type<"U", "Ui">; def UnsignedDoubleWord : sat_type<"U", "Ul">; multiclass SInst_SAT1<string name, string intrinsic, sat_type type> { - def _N32 : SInst<name # "_pat[_n_{d}]", "ssIi", type.U # "i", MergeNone, intrinsic # "_n32", [IsOverloadNone], [ImmCheck<2, ImmCheck1_16>]>; - def _N64 : SInst<name # "_pat[_n_{d}]", "ssIi", type.U # "l", MergeNone, intrinsic # "_n64", [IsOverloadNone], [ImmCheck<2, ImmCheck1_16>]>; - def _N32_ALL : SInst<name # "[_n_{d}]", "ssi", type.U # "i", MergeNone, intrinsic # "_n32", [IsOverloadNone, IsInsertOp1SVALL], [ImmCheck<1, ImmCheck1_16>]>; - def _N64_ALL : SInst<name # "[_n_{d}]", "ssi", type.U # "l", MergeNone, intrinsic # "_n64", [IsOverloadNone, IsInsertOp1SVALL], [ImmCheck<1, ImmCheck1_16>]>; + def _N32 : SInst<name # "_pat[_n_{d}]", "ssIi", type.U # "i", MergeNone, intrinsic # "_n32", [IsOverloadNone, IsStreamingCompatible], [ImmCheck<2, ImmCheck1_16>]>; + def _N64 : SInst<name # "_pat[_n_{d}]", "ssIi", type.U # "l", MergeNone, intrinsic # "_n64", [IsOverloadNone, IsStreamingCompatible], [ImmCheck<2, ImmCheck1_16>]>; + def _N32_ALL : SInst<name # "[_n_{d}]", "ssi", type.U # "i", MergeNone, intrinsic # "_n32", [IsOverloadNone, IsInsertOp1SVALL, IsStreamingCompatible], [ImmCheck<1, ImmCheck1_16>]>; + def _N64_ALL : SInst<name # "[_n_{d}]", "ssi", type.U # "l", MergeNone, intrinsic # "_n64", [IsOverloadNone, IsInsertOp1SVALL, IsStreamingCompatible], [ImmCheck<1, ImmCheck1_16>]>; } multiclass SInst_SAT2<string name, string intrinsic, sat_type type> { - def "" : SInst<name # "_pat[_{d}]", "ddIi", type.T, MergeNone, intrinsic, [], [ImmCheck<2, ImmCheck1_16>]>; - def _ALL : SInst<name # "[_{d}]", "ddi", type.T, MergeNone, intrinsic, [IsInsertOp1SVALL], [ImmCheck<1, ImmCheck1_16>]>; + def "" : SInst<name # "_pat[_{d}]", "ddIi", type.T, MergeNone, intrinsic, [IsStreamingCompatible], [ImmCheck<2, ImmCheck1_16>]>; + def _ALL : SInst<name # "[_{d}]", "ddi", type.T, MergeNone, intrinsic, [IsInsertOp1SVALL, IsStreamingCompatible], [ImmCheck<1, ImmCheck1_16>]>; - def _N32 : SInst<name # "_pat[_n_{d}]", "ssIi", type.U # "i", MergeNone, intrinsic # "_n32", [IsOverloadNone], [ImmCheck<2, ImmCheck1_16>]>; - def _N64 : SInst<name # "_pat[_n_{d}]", "ssIi", type.U # "l", MergeNone, intrinsic # "_n64", [IsOverloadNone], [ImmCheck<2, ImmCheck1_16>]>; - def _N32_ALL : SInst<name # "[_n_{d}]", "ssi", type.U # "i", MergeNone, intrinsic # "_n32", [IsOverloadNone, IsInsertOp1SVALL], [ImmCheck<1, ImmCheck1_16>]>; - def _N64_ALL : SInst<name # "[_n_{d}]", "ssi", type.U # "l", MergeNone, intrinsic # "_n64", [IsOverloadNone, IsInsertOp1SVALL], [ImmCheck<1, ImmCheck1_16>]>; + def _N32 : SInst<name # "_pat[_n_{d}]", "ssIi", type.U # "i", MergeNone, intrinsic # "_n32", [IsOverloadNone, IsStreamingCompatible], [ImmCheck<2, ImmCheck1_16>]>; + def _N64 : SInst<name # "_pat[_n_{d}]", "ssIi", type.U # "l", MergeNone, intrinsic # "_n64", [IsOverloadNone, IsStreamingCompatible], [ImmCheck<2, ImmCheck1_16>]>; + def _N32_ALL : SInst<name # "[_n_{d}]", "ssi", type.U # "i", MergeNone, intrinsic # "_n32", [IsOverloadNone, IsInsertOp1SVALL, IsStreamingCompatible], [ImmCheck<1, ImmCheck1_16>]>; + def _N64_ALL : SInst<name # "[_n_{d}]", "ssi", type.U # "l", MergeNone, intrinsic # "_n64", [IsOverloadNone, IsInsertOp1SVALL, IsStreamingCompatible], [ImmCheck<1, ImmCheck1_16>]>; } defm SVQDECB_S : SInst_SAT1<"svqdecb", "aarch64_sve_sqdecb", SignedByte>; @@ -1382,131 +1223,160 @@ defm SVQINCW_U : SInst_SAT2<"svqincw", "aarch64_sve_uqincw", UnsignedWord>; defm SVQINCD_S : SInst_SAT2<"svqincd", "aarch64_sve_sqincd", SignedDoubleWord>; defm SVQINCD_U : SInst_SAT2<"svqincd", "aarch64_sve_uqincd", UnsignedDoubleWord>; -def SVQDECP_S : SInst<"svqdecp[_{d}]", "ddP", "sil", MergeNone, "aarch64_sve_sqdecp">; -def SVQDECP_U : SInst<"svqdecp[_{d}]", "ddP", "UsUiUl", MergeNone, "aarch64_sve_uqdecp">; -def SVQINCP_S : SInst<"svqincp[_{d}]", "ddP", "sil", MergeNone, "aarch64_sve_sqincp">; -def SVQINCP_U : SInst<"svqincp[_{d}]", "ddP", "UsUiUl", MergeNone, "aarch64_sve_uqincp">; - -def SVQDECP_N_S32 : SInst<"svqdecp[_n_s32]_{d}", "kkP", "PcPsPiPl", MergeNone, "aarch64_sve_sqdecp_n32">; -def SVQDECP_N_S64 : SInst<"svqdecp[_n_s64]_{d}", "llP", "PcPsPiPl", MergeNone, "aarch64_sve_sqdecp_n64">; -def SVQDECP_N_U32 : SInst<"svqdecp[_n_u32]_{d}", "mmP", "PcPsPiPl", MergeNone, "aarch64_sve_uqdecp_n32">; -def SVQDECP_N_U64 : SInst<"svqdecp[_n_u64]_{d}", "nnP", "PcPsPiPl", MergeNone, "aarch64_sve_uqdecp_n64">; -def SVQINCP_N_S32 : SInst<"svqincp[_n_s32]_{d}", "kkP", "PcPsPiPl", MergeNone, "aarch64_sve_sqincp_n32">; -def SVQINCP_N_S64 : SInst<"svqincp[_n_s64]_{d}", "llP", "PcPsPiPl", MergeNone, "aarch64_sve_sqincp_n64">; -def SVQINCP_N_U32 : SInst<"svqincp[_n_u32]_{d}", "mmP", "PcPsPiPl", MergeNone, "aarch64_sve_uqincp_n32">; -def SVQINCP_N_U64 : SInst<"svqincp[_n_u64]_{d}", "nnP", "PcPsPiPl", MergeNone, "aarch64_sve_uqincp_n64">; - -let ArchGuard = "defined(__ARM_FEATURE_SVE_MATMUL_INT8)" in { +def SVQDECP_S : SInst<"svqdecp[_{d}]", "ddP", "sil", MergeNone, "aarch64_sve_sqdecp", [IsStreamingCompatible]>; +def SVQDECP_U : SInst<"svqdecp[_{d}]", "ddP", "UsUiUl", MergeNone, "aarch64_sve_uqdecp", [IsStreamingCompatible]>; +def SVQINCP_S : SInst<"svqincp[_{d}]", "ddP", "sil", MergeNone, "aarch64_sve_sqincp", [IsStreamingCompatible]>; +def SVQINCP_U : SInst<"svqincp[_{d}]", "ddP", "UsUiUl", MergeNone, "aarch64_sve_uqincp", [IsStreamingCompatible]>; + +def SVQDECP_N_S32 : SInst<"svqdecp[_n_s32]_{d}", "kkP", "PcPsPiPl", MergeNone, "aarch64_sve_sqdecp_n32", [IsStreamingCompatible]>; +def SVQDECP_N_S64 : SInst<"svqdecp[_n_s64]_{d}", "llP", "PcPsPiPl", MergeNone, "aarch64_sve_sqdecp_n64", [IsStreamingCompatible]>; +def SVQDECP_N_U32 : SInst<"svqdecp[_n_u32]_{d}", "mmP", "PcPsPiPl", MergeNone, "aarch64_sve_uqdecp_n32", [IsStreamingCompatible]>; +def SVQDECP_N_U64 : SInst<"svqdecp[_n_u64]_{d}", "nnP", "PcPsPiPl", MergeNone, "aarch64_sve_uqdecp_n64", [IsStreamingCompatible]>; +def SVQINCP_N_S32 : SInst<"svqincp[_n_s32]_{d}", "kkP", "PcPsPiPl", MergeNone, "aarch64_sve_sqincp_n32", [IsStreamingCompatible]>; +def SVQINCP_N_S64 : SInst<"svqincp[_n_s64]_{d}", "llP", "PcPsPiPl", MergeNone, "aarch64_sve_sqincp_n64", [IsStreamingCompatible]>; +def SVQINCP_N_U32 : SInst<"svqincp[_n_u32]_{d}", "mmP", "PcPsPiPl", MergeNone, "aarch64_sve_uqincp_n32", [IsStreamingCompatible]>; +def SVQINCP_N_U64 : SInst<"svqincp[_n_u64]_{d}", "nnP", "PcPsPiPl", MergeNone, "aarch64_sve_uqincp_n64", [IsStreamingCompatible]>; + +let TargetGuard = "sve,i8mm" in { def SVMLLA_S32 : SInst<"svmmla[_s32]", "ddqq","i", MergeNone, "aarch64_sve_smmla">; def SVMLLA_U32 : SInst<"svmmla[_u32]", "ddqq","Ui", MergeNone, "aarch64_sve_ummla">; def SVUSMLLA_S32 : SInst<"svusmmla[_s32]", "ddbq","i", MergeNone, "aarch64_sve_usmmla">; -def SVUSDOT_S : SInst<"svusdot[_s32]", "ddbq", "i", MergeNone, "aarch64_sve_usdot">; -def SVUSDOT_N_S : SInst<"svusdot[_n_s32]", "ddbr", "i", MergeNone, "aarch64_sve_usdot">; -def SVSUDOT_S : SInst<"svsudot[_s32]", "ddqb", "i", MergeNone, "aarch64_sve_usdot", [ReverseUSDOT]>; -def SVSUDOT_N_S : SInst<"svsudot[_n_s32]", "ddq@", "i", MergeNone, "aarch64_sve_usdot", [ReverseUSDOT]>; +def SVUSDOT_S : SInst<"svusdot[_s32]", "ddbq", "i", MergeNone, "aarch64_sve_usdot", [IsStreamingCompatible]>; +def SVUSDOT_N_S : SInst<"svusdot[_n_s32]", "ddbr", "i", MergeNone, "aarch64_sve_usdot", [IsStreamingCompatible]>; +def SVSUDOT_S : SInst<"svsudot[_s32]", "ddqb", "i", MergeNone, "aarch64_sve_usdot", [ReverseUSDOT, IsStreamingCompatible]>; +def SVSUDOT_N_S : SInst<"svsudot[_n_s32]", "ddq@", "i", MergeNone, "aarch64_sve_usdot", [ReverseUSDOT, IsStreamingCompatible]>; -def SVUSDOT_LANE_S : SInst<"svusdot_lane[_s32]", "ddbqi", "i", MergeNone, "aarch64_sve_usdot_lane", [], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>; -def SVSUDOT_LANE_S : SInst<"svsudot_lane[_s32]", "ddqbi", "i", MergeNone, "aarch64_sve_sudot_lane", [], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>; +def SVUSDOT_LANE_S : SInst<"svusdot_lane[_s32]", "ddbqi", "i", MergeNone, "aarch64_sve_usdot_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>; +def SVSUDOT_LANE_S : SInst<"svsudot_lane[_s32]", "ddqbi", "i", MergeNone, "aarch64_sve_sudot_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>; } -let ArchGuard = "defined(__ARM_FEATURE_SVE_MATMUL_FP32)" in { +let TargetGuard = "sve,f32mm" in { def SVMLLA_F32 : SInst<"svmmla[_f32]", "dddd","f", MergeNone, "aarch64_sve_fmmla">; } -let ArchGuard = "defined(__ARM_FEATURE_SVE_MATMUL_FP64)" in { +let TargetGuard = "sve,f64mm" in { def SVMLLA_F64 : SInst<"svmmla[_f64]", "dddd","d", MergeNone, "aarch64_sve_fmmla">; -def SVTRN1Q : SInst<"svtrn1q[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_trn1q">; -def SVTRN2Q : SInst<"svtrn2q[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_trn2q">; -def SVUZP1Q : SInst<"svuzp1q[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_uzp1q">; -def SVUZP2Q : SInst<"svuzp2q[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_uzp2q">; -def SVZIP1Q : SInst<"svzip1q[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_zip1q">; -def SVZIP2Q : SInst<"svzip2q[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_zip2q">; +def SVTRN1Q : SInst<"svtrn1q[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_trn1q", [IsStreamingCompatible]>; +def SVTRN2Q : SInst<"svtrn2q[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_trn2q", [IsStreamingCompatible]>; +def SVUZP1Q : SInst<"svuzp1q[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_uzp1q", [IsStreamingCompatible]>; +def SVUZP2Q : SInst<"svuzp2q[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_uzp2q", [IsStreamingCompatible]>; +def SVZIP1Q : SInst<"svzip1q[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_zip1q", [IsStreamingCompatible]>; +def SVZIP2Q : SInst<"svzip2q[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_zip2q", [IsStreamingCompatible]>; } -let ArchGuard = "defined(__ARM_FEATURE_SVE_MATMUL_FP64) && defined(__ARM_FEATURE_SVE_BF16)" in { +let TargetGuard = "sve,bf16,f64mm" in { def SVTRN1Q_BF16 : SInst<"svtrn1q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_trn1q">; def SVTRN2Q_BF16 : SInst<"svtrn2q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_trn2q">; -def SVUZP1Q_BF16 : SInst<"svuzp1q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_uzp1q">; -def SVUZP2Q_BF16 : SInst<"svuzp2q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_uzp2q">; -def SVZIP1Q_BF16 : SInst<"svzip1q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_zip1q">; -def SVZIP2Q_BF16 : SInst<"svzip2q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_zip2q">; +def SVUZP1Q_BF16 : SInst<"svuzp1q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_uzp1q", [IsStreamingCompatible]>; +def SVUZP2Q_BF16 : SInst<"svuzp2q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_uzp2q", [IsStreamingCompatible]>; +def SVZIP1Q_BF16 : SInst<"svzip1q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_zip1q", [IsStreamingCompatible]>; +def SVZIP2Q_BF16 : SInst<"svzip2q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_zip2q", [IsStreamingCompatible]>; } //////////////////////////////////////////////////////////////////////////////// // Vector creation -def SVUNDEF_1 : SInst<"svundef_{d}", "d", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef]>; -def SVUNDEF_2 : SInst<"svundef2_{d}", "2", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef]>; -def SVUNDEF_3 : SInst<"svundef3_{d}", "3", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef]>; -def SVUNDEF_4 : SInst<"svundef4_{d}", "4", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef]>; +def SVUNDEF_1 : SInst<"svundef_{d}", "dv", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef, IsStreamingCompatible]>; +def SVUNDEF_2 : SInst<"svundef2_{d}", "2v", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef, IsStreamingCompatible]>; +def SVUNDEF_3 : SInst<"svundef3_{d}", "3v", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef, IsStreamingCompatible]>; +def SVUNDEF_4 : SInst<"svundef4_{d}", "4v", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef, IsStreamingCompatible]>; -def SVCREATE_2 : SInst<"svcreate2[_{d}]", "2dd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tuple_create2", [IsTupleCreate]>; -def SVCREATE_3 : SInst<"svcreate3[_{d}]", "3ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tuple_create3", [IsTupleCreate]>; -def SVCREATE_4 : SInst<"svcreate4[_{d}]", "4dddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tuple_create4", [IsTupleCreate]>; +def SVCREATE_2 : SInst<"svcreate2[_{d}]", "2dd", "csilUcUsUiUlhfd", MergeNone, "", [IsTupleCreate, IsStreamingCompatible]>; +def SVCREATE_3 : SInst<"svcreate3[_{d}]", "3ddd", "csilUcUsUiUlhfd", MergeNone, "", [IsTupleCreate, IsStreamingCompatible]>; +def SVCREATE_4 : SInst<"svcreate4[_{d}]", "4dddd", "csilUcUsUiUlhfd", MergeNone, "", [IsTupleCreate, IsStreamingCompatible]>; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { -def SVUNDEF_1_BF16 : SInst<"svundef_{d}", "d", "b", MergeNone, "", [IsUndef]>; -def SVUNDEF_2_BF16 : SInst<"svundef2_{d}", "2", "b", MergeNone, "", [IsUndef]>; -def SVUNDEF_3_BF16 : SInst<"svundef3_{d}", "3", "b", MergeNone, "", [IsUndef]>; -def SVUNDEF_4_BF16 : SInst<"svundef4_{d}", "4", "b", MergeNone, "", [IsUndef]>; +let TargetGuard = "sve,bf16" in { +def SVUNDEF_1_BF16 : SInst<"svundef_{d}", "dv", "b", MergeNone, "", [IsUndef, IsStreamingCompatible]>; +def SVUNDEF_2_BF16 : SInst<"svundef2_{d}", "2v", "b", MergeNone, "", [IsUndef, IsStreamingCompatible]>; +def SVUNDEF_3_BF16 : SInst<"svundef3_{d}", "3v", "b", MergeNone, "", [IsUndef, IsStreamingCompatible]>; +def SVUNDEF_4_BF16 : SInst<"svundef4_{d}", "4v", "b", MergeNone, "", [IsUndef, IsStreamingCompatible]>; + +def SVCREATE_2_BF16 : SInst<"svcreate2[_{d}]", "2dd", "b", MergeNone, "", [IsTupleCreate, IsStreamingCompatible]>; +def SVCREATE_3_BF16 : SInst<"svcreate3[_{d}]", "3ddd", "b", MergeNone, "", [IsTupleCreate, IsStreamingCompatible]>; +def SVCREATE_4_BF16 : SInst<"svcreate4[_{d}]", "4dddd", "b", MergeNone, "", [IsTupleCreate, IsStreamingCompatible]>; +} -def SVCREATE_2_BF16 : SInst<"svcreate2[_{d}]", "2dd", "b", MergeNone, "aarch64_sve_tuple_create2", [IsTupleCreate]>; -def SVCREATE_3_BF16 : SInst<"svcreate3[_{d}]", "3ddd", "b", MergeNone, "aarch64_sve_tuple_create3", [IsTupleCreate]>; -def SVCREATE_4_BF16 : SInst<"svcreate4[_{d}]", "4dddd", "b", MergeNone, "aarch64_sve_tuple_create4", [IsTupleCreate]>; +let TargetGuard = "sve2p1|sme2" in { + def SVCREATE_2_B : SInst<"svcreate2[_b]", "2dd", "Pc", MergeNone, "", [IsTupleCreate, IsStreamingCompatible]>; + def SVCREATE_4_B : SInst<"svcreate4[_b]", "4dddd", "Pc", MergeNone, "", [IsTupleCreate, IsStreamingCompatible]>; } //////////////////////////////////////////////////////////////////////////////// // Vector insertion and extraction -def SVGET_2 : SInst<"svget2[_{d}]", "d2i", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tuple_get", [IsTupleGet], [ImmCheck<1, ImmCheck0_1>]>; -def SVGET_3 : SInst<"svget3[_{d}]", "d3i", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tuple_get", [IsTupleGet], [ImmCheck<1, ImmCheck0_2>]>; -def SVGET_4 : SInst<"svget4[_{d}]", "d4i", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tuple_get", [IsTupleGet], [ImmCheck<1, ImmCheck0_3>]>; +def SVGET_2 : SInst<"svget2[_{d}]", "d2i", "csilUcUsUiUlhfd", MergeNone, "", [IsTupleGet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_1>]>; +def SVGET_3 : SInst<"svget3[_{d}]", "d3i", "csilUcUsUiUlhfd", MergeNone, "", [IsTupleGet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_2>]>; +def SVGET_4 : SInst<"svget4[_{d}]", "d4i", "csilUcUsUiUlhfd", MergeNone, "", [IsTupleGet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_3>]>; -def SVSET_2 : SInst<"svset2[_{d}]", "22id", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tuple_set", [IsTupleSet], [ImmCheck<1, ImmCheck0_1>]>; -def SVSET_3 : SInst<"svset3[_{d}]", "33id", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tuple_set", [IsTupleSet], [ImmCheck<1, ImmCheck0_2>]>; -def SVSET_4 : SInst<"svset4[_{d}]", "44id", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tuple_set", [IsTupleSet], [ImmCheck<1, ImmCheck0_3>]>; +def SVSET_2 : SInst<"svset2[_{d}]", "22id", "csilUcUsUiUlhfd", MergeNone, "", [IsTupleSet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_1>]>; +def SVSET_3 : SInst<"svset3[_{d}]", "33id", "csilUcUsUiUlhfd", MergeNone, "", [IsTupleSet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_2>]>; +def SVSET_4 : SInst<"svset4[_{d}]", "44id", "csilUcUsUiUlhfd", MergeNone, "", [IsTupleSet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_3>]>; -let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { -def SVGET_2_BF16 : SInst<"svget2[_{d}]", "d2i", "b", MergeNone, "aarch64_sve_tuple_get", [IsTupleGet], [ImmCheck<1, ImmCheck0_1>]>; -def SVGET_3_BF16 : SInst<"svget3[_{d}]", "d3i", "b", MergeNone, "aarch64_sve_tuple_get", [IsTupleGet], [ImmCheck<1, ImmCheck0_2>]>; -def SVGET_4_BF16 : SInst<"svget4[_{d}]", "d4i", "b", MergeNone, "aarch64_sve_tuple_get", [IsTupleGet], [ImmCheck<1, ImmCheck0_3>]>; +let TargetGuard = "sve,bf16" in { +def SVGET_2_BF16 : SInst<"svget2[_{d}]", "d2i", "b", MergeNone, "", [IsTupleGet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_1>]>; +def SVGET_3_BF16 : SInst<"svget3[_{d}]", "d3i", "b", MergeNone, "", [IsTupleGet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_2>]>; +def SVGET_4_BF16 : SInst<"svget4[_{d}]", "d4i", "b", MergeNone, "", [IsTupleGet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_3>]>; -def SVSET_2_BF16 : SInst<"svset2[_{d}]", "22id", "b", MergeNone, "aarch64_sve_tuple_set", [IsTupleSet], [ImmCheck<1, ImmCheck0_1>]>; -def SVSET_3_BF16 : SInst<"svset3[_{d}]", "33id", "b", MergeNone, "aarch64_sve_tuple_set", [IsTupleSet], [ImmCheck<1, ImmCheck0_2>]>; -def SVSET_4_BF16 : SInst<"svset4[_{d}]", "44id", "b", MergeNone, "aarch64_sve_tuple_set", [IsTupleSet], [ImmCheck<1, ImmCheck0_3>]>; +def SVSET_2_BF16 : SInst<"svset2[_{d}]", "22id", "b", MergeNone, "", [IsTupleSet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_1>]>; +def SVSET_3_BF16 : SInst<"svset3[_{d}]", "33id", "b", MergeNone, "", [IsTupleSet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_2>]>; +def SVSET_4_BF16 : SInst<"svset4[_{d}]", "44id", "b", MergeNone, "", [IsTupleSet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_3>]>; } +let TargetGuard = "sve2p1|sme2" in { + def SVGET_2_B : SInst<"svget2[_b]", "d2i", "Pc", MergeNone, "", [IsTupleGet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_1>]>; + def SVGET_4_B : SInst<"svget4[_b]", "d4i", "Pc", MergeNone, "", [IsTupleGet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_3>]>; + + def SVSET_2_B : SInst<"svset2[_b]", "22id", "Pc", MergeNone, "", [IsTupleSet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_1>]>; + def SVSET_4_B : SInst<"svset4[_b]", "44id", "Pc", MergeNone, "", [IsTupleSet, IsStreamingCompatible], [ImmCheck<1, ImmCheck0_3>]>; +} + +let TargetGuard = "sve2p1|sme2" in { + def SVUNDEF_2_B: Inst<"svundef2_b", "2", "Pc", MergeNone, "", [IsUndef, IsStreamingCompatible], []>; + def SVUNDEF_4_B: Inst<"svundef4_b", "4", "Pc", MergeNone, "", [IsUndef, IsStreamingCompatible], []>; +} //////////////////////////////////////////////////////////////////////////////// // SVE2 WhileGE/GT -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -def SVWHILEGE_S32 : SInst<"svwhilege_{d}[_{1}]", "Pkk", "PcPsPiPl", MergeNone, "aarch64_sve_whilege", [IsOverloadWhile]>; -def SVWHILEGE_S64 : SInst<"svwhilege_{d}[_{1}]", "Pll", "PcPsPiPl", MergeNone, "aarch64_sve_whilege", [IsOverloadWhile]>; -def SVWHILEGT_S32 : SInst<"svwhilegt_{d}[_{1}]", "Pkk", "PcPsPiPl", MergeNone, "aarch64_sve_whilegt", [IsOverloadWhile]>; -def SVWHILEGT_S64 : SInst<"svwhilegt_{d}[_{1}]", "Pll", "PcPsPiPl", MergeNone, "aarch64_sve_whilegt", [IsOverloadWhile]>; -def SVWHILEHI_U32 : SInst<"svwhilegt_{d}[_{1}]", "Pmm", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilehi", [IsOverloadWhile]>; -def SVWHILEHI_U64 : SInst<"svwhilegt_{d}[_{1}]", "Pnn", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilehi", [IsOverloadWhile]>; -def SVWHILEHS_U32 : SInst<"svwhilege_{d}[_{1}]", "Pmm", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilehs", [IsOverloadWhile]>; -def SVWHILEHS_U64 : SInst<"svwhilege_{d}[_{1}]", "Pnn", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilehs", [IsOverloadWhile]>; +let TargetGuard = "sve2" in { +def SVWHILEGE_S32 : SInst<"svwhilege_{d}[_{1}]", "Pkk", "PcPsPiPl", MergeNone, "aarch64_sve_whilege", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +def SVWHILEGE_S64 : SInst<"svwhilege_{d}[_{1}]", "Pll", "PcPsPiPl", MergeNone, "aarch64_sve_whilege", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +def SVWHILEGT_S32 : SInst<"svwhilegt_{d}[_{1}]", "Pkk", "PcPsPiPl", MergeNone, "aarch64_sve_whilegt", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +def SVWHILEGT_S64 : SInst<"svwhilegt_{d}[_{1}]", "Pll", "PcPsPiPl", MergeNone, "aarch64_sve_whilegt", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +def SVWHILEHI_U32 : SInst<"svwhilegt_{d}[_{1}]", "Pmm", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilehi", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +def SVWHILEHI_U64 : SInst<"svwhilegt_{d}[_{1}]", "Pnn", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilehi", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +def SVWHILEHS_U32 : SInst<"svwhilege_{d}[_{1}]", "Pmm", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilehs", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +def SVWHILEHS_U64 : SInst<"svwhilege_{d}[_{1}]", "Pnn", "PUcPUsPUiPUl", MergeNone, "aarch64_sve_whilehs", [IsOverloadWhileOrMultiVecCvt, IsStreamingCompatible]>; +} + +let TargetGuard = "sve2p1|sme2" in { + def SVWHILEGE_S64_X2 : SInst<"svwhilege_{d}[_{1}]_x2", "2ll", "PcPsPiPl", MergeNone, "aarch64_sve_whilege_x2", [IsStreamingOrSVE2p1]>; + def SVWHILEGT_S64_X2 : SInst<"svwhilegt_{d}[_{1}]_x2", "2ll", "PcPsPiPl", MergeNone, "aarch64_sve_whilegt_x2", [IsStreamingOrSVE2p1]>; + def SVWHILEHI_U64_X2 : SInst<"svwhilegt_{d}[_{1}]_x2", "2nn", "PcPsPiPl", MergeNone, "aarch64_sve_whilehi_x2", [IsStreamingOrSVE2p1]>; + def SVWHILEHS_U64_X2 : SInst<"svwhilege_{d}[_{1}]_x2", "2nn", "PcPsPiPl", MergeNone, "aarch64_sve_whilehs_x2", [IsStreamingOrSVE2p1]>; + def SVWHILELE_S64_X2 : SInst<"svwhilele_{d}[_{1}]_x2", "2ll", "PcPsPiPl", MergeNone, "aarch64_sve_whilele_x2", [IsStreamingOrSVE2p1]>; + def SVWHILELT_S64_X2 : SInst<"svwhilelt_{d}[_{1}]_x2", "2ll", "PcPsPiPl", MergeNone, "aarch64_sve_whilelt_x2", [IsStreamingOrSVE2p1]>; + def SVWHILELO_U64_X2 : SInst<"svwhilelt_{d}[_{1}]_x2", "2nn", "PcPsPiPl", MergeNone, "aarch64_sve_whilelo_x2", [IsStreamingOrSVE2p1]>; + def SVWHILELS_U64_X2 : SInst<"svwhilele_{d}[_{1}]_x2", "2nn", "PcPsPiPl", MergeNone, "aarch64_sve_whilels_x2", [IsStreamingOrSVE2p1]>; + } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Uniform DSP operations -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -defm SVQADD_S : SInstZPZZ<"svqadd", "csli", "aarch64_sve_sqadd">; -defm SVQADD_U : SInstZPZZ<"svqadd", "UcUsUiUl", "aarch64_sve_uqadd">; -defm SVHADD_S : SInstZPZZ<"svhadd", "csli", "aarch64_sve_shadd">; -defm SVHADD_U : SInstZPZZ<"svhadd", "UcUsUiUl", "aarch64_sve_uhadd">; -defm SVRHADD_S : SInstZPZZ<"svrhadd", "csli", "aarch64_sve_srhadd">; -defm SVRHADD_U : SInstZPZZ<"svrhadd", "UcUsUiUl", "aarch64_sve_urhadd">; - -defm SVQSUB_S : SInstZPZZ<"svqsub", "csli", "aarch64_sve_sqsub">; -defm SVQSUB_U : SInstZPZZ<"svqsub", "UcUsUiUl", "aarch64_sve_uqsub">; -defm SVQSUBR_S : SInstZPZZ<"svqsubr", "csli", "aarch64_sve_sqsubr">; -defm SVQSUBR_U : SInstZPZZ<"svqsubr", "UcUsUiUl", "aarch64_sve_uqsubr">; -defm SVHSUB_S : SInstZPZZ<"svhsub", "csli", "aarch64_sve_shsub">; -defm SVHSUB_U : SInstZPZZ<"svhsub", "UcUsUiUl", "aarch64_sve_uhsub">; -defm SVHSUBR_S : SInstZPZZ<"svhsubr", "csli", "aarch64_sve_shsubr">; -defm SVHSUBR_U : SInstZPZZ<"svhsubr", "UcUsUiUl", "aarch64_sve_uhsubr">; +let TargetGuard = "sve2" in { +defm SVQADD_S : SInstZPZZ<"svqadd", "csli", "aarch64_sve_sqadd", "aarch64_sve_sqadd">; +defm SVQADD_U : SInstZPZZ<"svqadd", "UcUsUiUl", "aarch64_sve_uqadd", "aarch64_sve_uqadd">; +defm SVHADD_S : SInstZPZZ<"svhadd", "csli", "aarch64_sve_shadd", "aarch64_sve_shadd">; +defm SVHADD_U : SInstZPZZ<"svhadd", "UcUsUiUl", "aarch64_sve_uhadd", "aarch64_sve_uhadd">; +defm SVRHADD_S : SInstZPZZ<"svrhadd", "csli", "aarch64_sve_srhadd", "aarch64_sve_srhadd">; +defm SVRHADD_U : SInstZPZZ<"svrhadd", "UcUsUiUl", "aarch64_sve_urhadd", "aarch64_sve_urhadd">; + +defm SVQSUB_S : SInstZPZZ<"svqsub", "csli", "aarch64_sve_sqsub", "aarch64_sve_sqsub_u">; +defm SVQSUB_U : SInstZPZZ<"svqsub", "UcUsUiUl", "aarch64_sve_uqsub", "aarch64_sve_uqsub_u">; +defm SVQSUBR_S : SInstZPZZ<"svqsubr", "csli", "aarch64_sve_sqsubr", "aarch64_sve_sqsub_u", [ReverseMergeAnyBinOp]>; +defm SVQSUBR_U : SInstZPZZ<"svqsubr", "UcUsUiUl", "aarch64_sve_uqsubr", "aarch64_sve_uqsub_u", [ReverseMergeAnyBinOp]>; +defm SVHSUB_S : SInstZPZZ<"svhsub", "csli", "aarch64_sve_shsub", "aarch64_sve_shsub">; +defm SVHSUB_U : SInstZPZZ<"svhsub", "UcUsUiUl", "aarch64_sve_uhsub", "aarch64_sve_uhsub">; +defm SVHSUBR_S : SInstZPZZ<"svhsubr", "csli", "aarch64_sve_shsubr", "aarch64_sve_shsubr">; +defm SVHSUBR_U : SInstZPZZ<"svhsubr", "UcUsUiUl", "aarch64_sve_uhsubr", "aarch64_sve_uhsubr">; defm SVQABS : SInstZPZ<"svqabs", "csil", "aarch64_sve_sqabs">; defm SVQNEG : SInstZPZ<"svqneg", "csil", "aarch64_sve_sqneg">; @@ -1526,50 +1396,50 @@ multiclass SInstZPZxZ<string name, string types, string pat_v, string pat_n, str def _N_Z : SInst<name # "[_n_{d}]", pat_n, types, MergeZero, intrinsic, flags>; } -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -defm SVQRSHL_S : SInstZPZxZ<"svqrshl", "csil", "dPdx", "dPdK", "aarch64_sve_sqrshl">; -defm SVQRSHL_U : SInstZPZxZ<"svqrshl", "UcUsUiUl", "dPdx", "dPdK", "aarch64_sve_uqrshl">; -defm SVQSHL_S : SInstZPZxZ<"svqshl", "csil", "dPdx", "dPdK", "aarch64_sve_sqshl">; -defm SVQSHL_U : SInstZPZxZ<"svqshl", "UcUsUiUl", "dPdx", "dPdK", "aarch64_sve_uqshl">; -defm SVRSHL_S : SInstZPZxZ<"svrshl", "csil", "dPdx", "dPdK", "aarch64_sve_srshl">; -defm SVRSHL_U : SInstZPZxZ<"svrshl", "UcUsUiUl", "dPdx", "dPdK", "aarch64_sve_urshl">; -defm SVSQADD : SInstZPZxZ<"svsqadd", "UcUsUiUl", "dPdx", "dPdK", "aarch64_sve_usqadd">; -defm SVUQADD : SInstZPZxZ<"svuqadd", "csil", "dPdu", "dPdL", "aarch64_sve_suqadd">; - -def SVABA_S : SInst<"svaba[_{d}]", "dddd", "csil" , MergeNone, "aarch64_sve_saba">; -def SVABA_U : SInst<"svaba[_{d}]", "dddd", "UcUsUiUl", MergeNone, "aarch64_sve_uaba">; -def SVQDMULH : SInst<"svqdmulh[_{d}]", "ddd", "csil", MergeNone, "aarch64_sve_sqdmulh">; -def SVQRDMULH : SInst<"svqrdmulh[_{d}]", "ddd", "csil", MergeNone, "aarch64_sve_sqrdmulh">; -def SVQRDMLAH : SInst<"svqrdmlah[_{d}]", "dddd", "csil", MergeNone, "aarch64_sve_sqrdmlah">; -def SVQRDMLSH : SInst<"svqrdmlsh[_{d}]", "dddd", "csil", MergeNone, "aarch64_sve_sqrdmlsh">; - -def SVABA_S_N : SInst<"svaba[_n_{d}]", "ddda", "csil", MergeNone, "aarch64_sve_saba">; -def SVABA_U_N : SInst<"svaba[_n_{d}]", "ddda", "UcUsUiUl", MergeNone, "aarch64_sve_uaba">; -def SVQDMULH_N : SInst<"svqdmulh[_n_{d}]", "dda", "csil", MergeNone, "aarch64_sve_sqdmulh">; -def SVQRDMULH_N : SInst<"svqrdmulh[_n_{d}]", "dda", "csil", MergeNone, "aarch64_sve_sqrdmulh">; -def SVQRDMLAH_N : SInst<"svqrdmlah[_n_{d}]", "ddda", "csil", MergeNone, "aarch64_sve_sqrdmlah">; -def SVQRDMLSH_N : SInst<"svqrdmlsh[_n_{d}]", "ddda", "csil", MergeNone, "aarch64_sve_sqrdmlsh">; - -def SVQDMULH_LANE : SInst<"svqdmulh_lane[_{d}]", "dddi", "sil", MergeNone, "aarch64_sve_sqdmulh_lane", [], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; -def SVQRDMULH_LANE : SInst<"svqrdmulh_lane[_{d}]", "dddi", "sil", MergeNone, "aarch64_sve_sqrdmulh_lane", [], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; -def SVQRDMLAH_LANE : SInst<"svqrdmlah_lane[_{d}]", "ddddi", "sil", MergeNone, "aarch64_sve_sqrdmlah_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVQRDMLSH_LANE : SInst<"svqrdmlsh_lane[_{d}]", "ddddi", "sil", MergeNone, "aarch64_sve_sqrdmlsh_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; - -def SVQSHLU_M : SInst<"svqshlu[_n_{d}]", "uPdi", "csil", MergeOp1, "aarch64_sve_sqshlu", [], [ImmCheck<2, ImmCheckShiftLeft, 1>]>; -def SVQSHLU_X : SInst<"svqshlu[_n_{d}]", "uPdi", "csil", MergeAny, "aarch64_sve_sqshlu", [], [ImmCheck<2, ImmCheckShiftLeft, 1>]>; -def SVQSHLU_Z : SInst<"svqshlu[_n_{d}]", "uPdi", "csil", MergeZero, "aarch64_sve_sqshlu", [], [ImmCheck<2, ImmCheckShiftLeft, 1>]>; -def SVRSHR_M_S : SInst<"svrshr[_n_{d}]", "dPdi", "csil", MergeOp1, "aarch64_sve_srshr", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; -def SVRSHR_M_U : SInst<"svrshr[_n_{d}]", "dPdi", "UcUsUiUl", MergeOp1, "aarch64_sve_urshr", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; -def SVRSHR_X_S : SInst<"svrshr[_n_{d}]", "dPdi", "csil", MergeAny, "aarch64_sve_srshr", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; -def SVRSHR_X_U : SInst<"svrshr[_n_{d}]", "dPdi", "UcUsUiUl", MergeAny, "aarch64_sve_urshr", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; -def SVRSHR_Z_S : SInst<"svrshr[_n_{d}]", "dPdi", "csil", MergeZero, "aarch64_sve_srshr", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; -def SVRSHR_Z_U : SInst<"svrshr[_n_{d}]", "dPdi", "UcUsUiUl", MergeZero, "aarch64_sve_urshr", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; -def SVRSRA_S : SInst<"svrsra[_n_{d}]", "dddi", "csil", MergeNone, "aarch64_sve_srsra", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; -def SVRSRA_U : SInst<"svrsra[_n_{d}]", "dddi", "UcUsUiUl", MergeNone, "aarch64_sve_ursra", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; -def SVSLI : SInst<"svsli[_n_{d}]", "dddi", "csilUcUsUiUl", MergeNone, "aarch64_sve_sli", [], [ImmCheck<2, ImmCheckShiftLeft, 1>]>; -def SVSRA_S : SInst<"svsra[_n_{d}]", "dddi", "csil", MergeNone, "aarch64_sve_ssra", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; -def SVSRA_U : SInst<"svsra[_n_{d}]", "dddi", "UcUsUiUl", MergeNone, "aarch64_sve_usra", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; -def SVSRI : SInst<"svsri[_n_{d}]", "dddi", "csilUcUsUiUl", MergeNone, "aarch64_sve_sri", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +let TargetGuard = "sve2" in { +defm SVQRSHL_S : SInstZPZxZ<"svqrshl", "csil", "dPdx", "dPdK", "aarch64_sve_sqrshl", [IsStreamingCompatible]>; +defm SVQRSHL_U : SInstZPZxZ<"svqrshl", "UcUsUiUl", "dPdx", "dPdK", "aarch64_sve_uqrshl", [IsStreamingCompatible]>; +defm SVQSHL_S : SInstZPZxZ<"svqshl", "csil", "dPdx", "dPdK", "aarch64_sve_sqshl", [IsStreamingCompatible]>; +defm SVQSHL_U : SInstZPZxZ<"svqshl", "UcUsUiUl", "dPdx", "dPdK", "aarch64_sve_uqshl", [IsStreamingCompatible]>; +defm SVRSHL_S : SInstZPZxZ<"svrshl", "csil", "dPdx", "dPdK", "aarch64_sve_srshl", [IsStreamingCompatible]>; +defm SVRSHL_U : SInstZPZxZ<"svrshl", "UcUsUiUl", "dPdx", "dPdK", "aarch64_sve_urshl", [IsStreamingCompatible]>; +defm SVSQADD : SInstZPZxZ<"svsqadd", "UcUsUiUl", "dPdx", "dPdK", "aarch64_sve_usqadd", [IsStreamingCompatible]>; +defm SVUQADD : SInstZPZxZ<"svuqadd", "csil", "dPdu", "dPdL", "aarch64_sve_suqadd", [IsStreamingCompatible]>; + +def SVABA_S : SInst<"svaba[_{d}]", "dddd", "csil" , MergeNone, "aarch64_sve_saba", [IsStreamingCompatible]>; +def SVABA_U : SInst<"svaba[_{d}]", "dddd", "UcUsUiUl", MergeNone, "aarch64_sve_uaba", [IsStreamingCompatible]>; +def SVQDMULH : SInst<"svqdmulh[_{d}]", "ddd", "csil", MergeNone, "aarch64_sve_sqdmulh", [IsStreamingCompatible]>; +def SVQRDMULH : SInst<"svqrdmulh[_{d}]", "ddd", "csil", MergeNone, "aarch64_sve_sqrdmulh", [IsStreamingCompatible]>; +def SVQRDMLAH : SInst<"svqrdmlah[_{d}]", "dddd", "csil", MergeNone, "aarch64_sve_sqrdmlah", [IsStreamingCompatible]>; +def SVQRDMLSH : SInst<"svqrdmlsh[_{d}]", "dddd", "csil", MergeNone, "aarch64_sve_sqrdmlsh", [IsStreamingCompatible]>; + +def SVABA_S_N : SInst<"svaba[_n_{d}]", "ddda", "csil", MergeNone, "aarch64_sve_saba", [IsStreamingCompatible]>; +def SVABA_U_N : SInst<"svaba[_n_{d}]", "ddda", "UcUsUiUl", MergeNone, "aarch64_sve_uaba", [IsStreamingCompatible]>; +def SVQDMULH_N : SInst<"svqdmulh[_n_{d}]", "dda", "csil", MergeNone, "aarch64_sve_sqdmulh", [IsStreamingCompatible]>; +def SVQRDMULH_N : SInst<"svqrdmulh[_n_{d}]", "dda", "csil", MergeNone, "aarch64_sve_sqrdmulh", [IsStreamingCompatible]>; +def SVQRDMLAH_N : SInst<"svqrdmlah[_n_{d}]", "ddda", "csil", MergeNone, "aarch64_sve_sqrdmlah", [IsStreamingCompatible]>; +def SVQRDMLSH_N : SInst<"svqrdmlsh[_n_{d}]", "ddda", "csil", MergeNone, "aarch64_sve_sqrdmlsh", [IsStreamingCompatible]>; + +def SVQDMULH_LANE : SInst<"svqdmulh_lane[_{d}]", "dddi", "sil", MergeNone, "aarch64_sve_sqdmulh_lane", [IsStreamingCompatible], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; +def SVQRDMULH_LANE : SInst<"svqrdmulh_lane[_{d}]", "dddi", "sil", MergeNone, "aarch64_sve_sqrdmulh_lane", [IsStreamingCompatible], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; +def SVQRDMLAH_LANE : SInst<"svqrdmlah_lane[_{d}]", "ddddi", "sil", MergeNone, "aarch64_sve_sqrdmlah_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVQRDMLSH_LANE : SInst<"svqrdmlsh_lane[_{d}]", "ddddi", "sil", MergeNone, "aarch64_sve_sqrdmlsh_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; + +def SVQSHLU_M : SInst<"svqshlu[_n_{d}]", "uPdi", "csil", MergeOp1, "aarch64_sve_sqshlu", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftLeft, 1>]>; +def SVQSHLU_X : SInst<"svqshlu[_n_{d}]", "uPdi", "csil", MergeAny, "aarch64_sve_sqshlu", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftLeft, 1>]>; +def SVQSHLU_Z : SInst<"svqshlu[_n_{d}]", "uPdi", "csil", MergeZero, "aarch64_sve_sqshlu", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftLeft, 1>]>; +def SVRSHR_M_S : SInst<"svrshr[_n_{d}]", "dPdi", "csil", MergeOp1, "aarch64_sve_srshr", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +def SVRSHR_M_U : SInst<"svrshr[_n_{d}]", "dPdi", "UcUsUiUl", MergeOp1, "aarch64_sve_urshr", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +def SVRSHR_X_S : SInst<"svrshr[_n_{d}]", "dPdi", "csil", MergeAny, "aarch64_sve_srshr", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +def SVRSHR_X_U : SInst<"svrshr[_n_{d}]", "dPdi", "UcUsUiUl", MergeAny, "aarch64_sve_urshr", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +def SVRSHR_Z_S : SInst<"svrshr[_n_{d}]", "dPdi", "csil", MergeZero, "aarch64_sve_srshr", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +def SVRSHR_Z_U : SInst<"svrshr[_n_{d}]", "dPdi", "UcUsUiUl", MergeZero, "aarch64_sve_urshr", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +def SVRSRA_S : SInst<"svrsra[_n_{d}]", "dddi", "csil", MergeNone, "aarch64_sve_srsra", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +def SVRSRA_U : SInst<"svrsra[_n_{d}]", "dddi", "UcUsUiUl", MergeNone, "aarch64_sve_ursra", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +def SVSLI : SInst<"svsli[_n_{d}]", "dddi", "csilUcUsUiUl", MergeNone, "aarch64_sve_sli", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftLeft, 1>]>; +def SVSRA_S : SInst<"svsra[_n_{d}]", "dddi", "csil", MergeNone, "aarch64_sve_ssra", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +def SVSRA_U : SInst<"svsra[_n_{d}]", "dddi", "UcUsUiUl", MergeNone, "aarch64_sve_usra", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +def SVSRI : SInst<"svsri[_n_{d}]", "dddi", "csilUcUsUiUl", MergeNone, "aarch64_sve_sri", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; } //////////////////////////////////////////////////////////////////////////////// @@ -1580,87 +1450,87 @@ multiclass SInstPairwise<string name, string types, string intrinsic, list<FlagT def _X : SInst<name # "[_{d}]", "dPdd", types, MergeAny, intrinsic, flags>; } -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -defm SVADDP : SInstPairwise<"svaddp", "csliUcUsUiUl", "aarch64_sve_addp">; -defm SVADDP_F : SInstPairwise<"svaddp", "hfd", "aarch64_sve_faddp">; -defm SVMAXNMP : SInstPairwise<"svmaxnmp", "hfd", "aarch64_sve_fmaxnmp">; -defm SVMAXP_F : SInstPairwise<"svmaxp", "hfd", "aarch64_sve_fmaxp">; -defm SVMAXP_S : SInstPairwise<"svmaxp", "csli", "aarch64_sve_smaxp">; -defm SVMAXP_U : SInstPairwise<"svmaxp", "UcUsUiUl", "aarch64_sve_umaxp">; -defm SVMINNMP : SInstPairwise<"svminnmp", "hfd", "aarch64_sve_fminnmp">; -defm SVMINP_F : SInstPairwise<"svminp", "hfd", "aarch64_sve_fminp">; -defm SVMINP_S : SInstPairwise<"svminp", "csli", "aarch64_sve_sminp">; -defm SVMINP_U : SInstPairwise<"svminp", "UcUsUiUl", "aarch64_sve_uminp">; +let TargetGuard = "sve2" in { +defm SVADDP : SInstPairwise<"svaddp", "csliUcUsUiUl", "aarch64_sve_addp", [IsStreamingCompatible]>; +defm SVADDP_F : SInstPairwise<"svaddp", "hfd", "aarch64_sve_faddp", [IsStreamingCompatible]>; +defm SVMAXNMP : SInstPairwise<"svmaxnmp", "hfd", "aarch64_sve_fmaxnmp", [IsStreamingCompatible]>; +defm SVMAXP_F : SInstPairwise<"svmaxp", "hfd", "aarch64_sve_fmaxp", [IsStreamingCompatible]>; +defm SVMAXP_S : SInstPairwise<"svmaxp", "csli", "aarch64_sve_smaxp", [IsStreamingCompatible]>; +defm SVMAXP_U : SInstPairwise<"svmaxp", "UcUsUiUl", "aarch64_sve_umaxp", [IsStreamingCompatible]>; +defm SVMINNMP : SInstPairwise<"svminnmp", "hfd", "aarch64_sve_fminnmp", [IsStreamingCompatible]>; +defm SVMINP_F : SInstPairwise<"svminp", "hfd", "aarch64_sve_fminp", [IsStreamingCompatible]>; +defm SVMINP_S : SInstPairwise<"svminp", "csli", "aarch64_sve_sminp", [IsStreamingCompatible]>; +defm SVMINP_U : SInstPairwise<"svminp", "UcUsUiUl", "aarch64_sve_uminp", [IsStreamingCompatible]>; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Widening pairwise arithmetic -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -def SVADALP_S_M : SInst<"svadalp[_{d}]", "dPdh", "sil", MergeOp1, "aarch64_sve_sadalp">; -def SVADALP_S_X : SInst<"svadalp[_{d}]", "dPdh", "sil", MergeAny, "aarch64_sve_sadalp">; -def SVADALP_S_Z : SInst<"svadalp[_{d}]", "dPdh", "sil", MergeZero, "aarch64_sve_sadalp">; +let TargetGuard = "sve2" in { +def SVADALP_S_M : SInst<"svadalp[_{d}]", "dPdh", "sil", MergeOp1, "aarch64_sve_sadalp", [IsStreamingCompatible]>; +def SVADALP_S_X : SInst<"svadalp[_{d}]", "dPdh", "sil", MergeAny, "aarch64_sve_sadalp", [IsStreamingCompatible]>; +def SVADALP_S_Z : SInst<"svadalp[_{d}]", "dPdh", "sil", MergeZero, "aarch64_sve_sadalp", [IsStreamingCompatible]>; -def SVADALP_U_M : SInst<"svadalp[_{d}]", "dPdh", "UsUiUl", MergeOp1, "aarch64_sve_uadalp">; -def SVADALP_U_X : SInst<"svadalp[_{d}]", "dPdh", "UsUiUl", MergeAny, "aarch64_sve_uadalp">; -def SVADALP_U_Z : SInst<"svadalp[_{d}]", "dPdh", "UsUiUl", MergeZero, "aarch64_sve_uadalp">; +def SVADALP_U_M : SInst<"svadalp[_{d}]", "dPdh", "UsUiUl", MergeOp1, "aarch64_sve_uadalp", [IsStreamingCompatible]>; +def SVADALP_U_X : SInst<"svadalp[_{d}]", "dPdh", "UsUiUl", MergeAny, "aarch64_sve_uadalp", [IsStreamingCompatible]>; +def SVADALP_U_Z : SInst<"svadalp[_{d}]", "dPdh", "UsUiUl", MergeZero, "aarch64_sve_uadalp", [IsStreamingCompatible]>; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Bitwise ternary logical instructions // -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -def SVBCAX : SInst<"svbcax[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_bcax">; -def SVBSL : SInst<"svbsl[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_bsl">; -def SVBSL1N : SInst<"svbsl1n[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_bsl1n">; -def SVBSL2N : SInst<"svbsl2n[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_bsl2n">; -def SVEOR3 : SInst<"sveor3[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_eor3">; -def SVNBSL : SInst<"svnbsl[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_nbsl">; +let TargetGuard = "sve2" in { +def SVBCAX : SInst<"svbcax[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_bcax", [IsStreamingCompatible]>; +def SVBSL : SInst<"svbsl[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_bsl", [IsStreamingCompatible]>; +def SVBSL1N : SInst<"svbsl1n[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_bsl1n", [IsStreamingCompatible]>; +def SVBSL2N : SInst<"svbsl2n[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_bsl2n", [IsStreamingCompatible]>; +def SVEOR3 : SInst<"sveor3[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_eor3", [IsStreamingCompatible]>; +def SVNBSL : SInst<"svnbsl[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_nbsl", [IsStreamingCompatible]>; -def SVBCAX_N : SInst<"svbcax[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_bcax">; -def SVBSL_N : SInst<"svbsl[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_bsl">; -def SVBSL1N_N : SInst<"svbsl1n[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_bsl1n">; -def SVBSL2N_N : SInst<"svbsl2n[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_bsl2n">; -def SVEOR3_N : SInst<"sveor3[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_eor3">; -def SVNBSL_N : SInst<"svnbsl[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_nbsl">; -def SVXAR_N : SInst<"svxar[_n_{d}]", "dddi", "csilUcUsUiUl", MergeNone, "aarch64_sve_xar", [], [ImmCheck<2, ImmCheckShiftRight, 1>]>; +def SVBCAX_N : SInst<"svbcax[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_bcax", [IsStreamingCompatible]>; +def SVBSL_N : SInst<"svbsl[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_bsl", [IsStreamingCompatible]>; +def SVBSL1N_N : SInst<"svbsl1n[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_bsl1n", [IsStreamingCompatible]>; +def SVBSL2N_N : SInst<"svbsl2n[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_bsl2n", [IsStreamingCompatible]>; +def SVEOR3_N : SInst<"sveor3[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_eor3", [IsStreamingCompatible]>; +def SVNBSL_N : SInst<"svnbsl[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_nbsl", [IsStreamingCompatible]>; +def SVXAR_N : SInst<"svxar[_n_{d}]", "dddi", "csilUcUsUiUl", MergeNone, "aarch64_sve_xar", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRight, 1>]>; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Large integer arithmetic -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -def SVADCLB : SInst<"svadclb[_{d}]", "dddd", "UiUl", MergeNone, "aarch64_sve_adclb">; -def SVADCLT : SInst<"svadclt[_{d}]", "dddd", "UiUl", MergeNone, "aarch64_sve_adclt">; -def SVSBCLB : SInst<"svsbclb[_{d}]", "dddd", "UiUl", MergeNone, "aarch64_sve_sbclb">; -def SVSBCLT : SInst<"svsbclt[_{d}]", "dddd", "UiUl", MergeNone, "aarch64_sve_sbclt">; +let TargetGuard = "sve2" in { +def SVADCLB : SInst<"svadclb[_{d}]", "dddd", "UiUl", MergeNone, "aarch64_sve_adclb", [IsStreamingCompatible]>; +def SVADCLT : SInst<"svadclt[_{d}]", "dddd", "UiUl", MergeNone, "aarch64_sve_adclt", [IsStreamingCompatible]>; +def SVSBCLB : SInst<"svsbclb[_{d}]", "dddd", "UiUl", MergeNone, "aarch64_sve_sbclb", [IsStreamingCompatible]>; +def SVSBCLT : SInst<"svsbclt[_{d}]", "dddd", "UiUl", MergeNone, "aarch64_sve_sbclt", [IsStreamingCompatible]>; -def SVADCLB_N : SInst<"svadclb[_n_{d}]", "ddda", "UiUl", MergeNone, "aarch64_sve_adclb">; -def SVADCLT_N : SInst<"svadclt[_n_{d}]", "ddda", "UiUl", MergeNone, "aarch64_sve_adclt">; -def SVSBCLB_N : SInst<"svsbclb[_n_{d}]", "ddda", "UiUl", MergeNone, "aarch64_sve_sbclb">; -def SVSBCLT_N : SInst<"svsbclt[_n_{d}]", "ddda", "UiUl", MergeNone, "aarch64_sve_sbclt">; +def SVADCLB_N : SInst<"svadclb[_n_{d}]", "ddda", "UiUl", MergeNone, "aarch64_sve_adclb", [IsStreamingCompatible]>; +def SVADCLT_N : SInst<"svadclt[_n_{d}]", "ddda", "UiUl", MergeNone, "aarch64_sve_adclt", [IsStreamingCompatible]>; +def SVSBCLB_N : SInst<"svsbclb[_n_{d}]", "ddda", "UiUl", MergeNone, "aarch64_sve_sbclb", [IsStreamingCompatible]>; +def SVSBCLT_N : SInst<"svsbclt[_n_{d}]", "ddda", "UiUl", MergeNone, "aarch64_sve_sbclt", [IsStreamingCompatible]>; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Multiplication by indexed elements -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -def SVMLA_LANE_2 : SInst<"svmla_lane[_{d}]", "ddddi", "silUsUiUl", MergeNone, "aarch64_sve_mla_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMLS_LANE_2 : SInst<"svmls_lane[_{d}]", "ddddi", "silUsUiUl", MergeNone, "aarch64_sve_mls_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMUL_LANE_2 : SInst<"svmul_lane[_{d}]", "dddi", "silUsUiUl", MergeNone, "aarch64_sve_mul_lane", [], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; +let TargetGuard = "sve2" in { +def SVMLA_LANE_2 : SInst<"svmla_lane[_{d}]", "ddddi", "silUsUiUl", MergeNone, "aarch64_sve_mla_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLS_LANE_2 : SInst<"svmls_lane[_{d}]", "ddddi", "silUsUiUl", MergeNone, "aarch64_sve_mls_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMUL_LANE_2 : SInst<"svmul_lane[_{d}]", "dddi", "silUsUiUl", MergeNone, "aarch64_sve_mul_lane", [IsStreamingCompatible], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Uniform complex integer arithmetic -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -def SVCADD : SInst<"svcadd[_{d}]", "dddi", "csilUcUsUiUl", MergeNone, "aarch64_sve_cadd_x", [], [ImmCheck<2, ImmCheckComplexRot90_270>]>; -def SVSQCADD : SInst<"svqcadd[_{d}]", "dddi", "csil", MergeNone, "aarch64_sve_sqcadd_x", [], [ImmCheck<2, ImmCheckComplexRot90_270>]>; -def SVCMLA : SInst<"svcmla[_{d}]", "ddddi", "csilUcUsUiUl", MergeNone, "aarch64_sve_cmla_x", [], [ImmCheck<3, ImmCheckComplexRotAll90>]>; -def SVCMLA_LANE_X : SInst<"svcmla_lane[_{d}]", "ddddii", "siUsUi", MergeNone, "aarch64_sve_cmla_lane_x", [], [ImmCheck<3, ImmCheckLaneIndexCompRotate, 2>, +let TargetGuard = "sve2" in { +def SVCADD : SInst<"svcadd[_{d}]", "dddi", "csilUcUsUiUl", MergeNone, "aarch64_sve_cadd_x", [IsStreamingCompatible], [ImmCheck<2, ImmCheckComplexRot90_270>]>; +def SVSQCADD : SInst<"svqcadd[_{d}]", "dddi", "csil", MergeNone, "aarch64_sve_sqcadd_x", [IsStreamingCompatible], [ImmCheck<2, ImmCheckComplexRot90_270>]>; +def SVCMLA : SInst<"svcmla[_{d}]", "ddddi", "csilUcUsUiUl", MergeNone, "aarch64_sve_cmla_x", [IsStreamingCompatible], [ImmCheck<3, ImmCheckComplexRotAll90>]>; +def SVCMLA_LANE_X : SInst<"svcmla_lane[_{d}]", "ddddii", "siUsUi", MergeNone, "aarch64_sve_cmla_lane_x", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndexCompRotate, 2>, ImmCheck<4, ImmCheckComplexRotAll90>]>; -def SVSQRDCMLAH_X : SInst<"svqrdcmlah[_{d}]", "ddddi", "csil", MergeNone, "aarch64_sve_sqrdcmlah_x", [], [ImmCheck<3, ImmCheckComplexRotAll90>]>; -def SVSQRDCMLAH_LANE_X : SInst<"svqrdcmlah_lane[_{d}]", "ddddii", "si", MergeNone, "aarch64_sve_sqrdcmlah_lane_x", [], [ImmCheck<3, ImmCheckLaneIndexCompRotate, 2>, +def SVSQRDCMLAH_X : SInst<"svqrdcmlah[_{d}]", "ddddi", "csil", MergeNone, "aarch64_sve_sqrdcmlah_x", [IsStreamingCompatible], [ImmCheck<3, ImmCheckComplexRotAll90>]>; +def SVSQRDCMLAH_LANE_X : SInst<"svqrdcmlah_lane[_{d}]", "ddddii", "si", MergeNone, "aarch64_sve_sqrdcmlah_lane_x", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndexCompRotate, 2>, ImmCheck<4, ImmCheckComplexRotAll90>]>; } @@ -1668,21 +1538,21 @@ def SVSQRDCMLAH_LANE_X : SInst<"svqrdcmlah_lane[_{d}]", "ddddii", "si", // SVE2 - Widening DSP operations multiclass SInstWideDSPAcc<string name, string types, string intrinsic> { - def : SInst<name # "[_{d}]", "ddhh", types, MergeNone, intrinsic>; - def _N : SInst<name # "[_n_{d}]", "ddhR", types, MergeNone, intrinsic>; + def : SInst<name # "[_{d}]", "ddhh", types, MergeNone, intrinsic, [IsStreamingCompatible]>; + def _N : SInst<name # "[_n_{d}]", "ddhR", types, MergeNone, intrinsic, [IsStreamingCompatible]>; } multiclass SInstWideDSPLong<string name, string types, string intrinsic> { - def : SInst<name # "[_{d}]", "dhh", types, MergeNone, intrinsic>; - def _N : SInst<name # "[_n_{d}]", "dhR", types, MergeNone, intrinsic>; + def : SInst<name # "[_{d}]", "dhh", types, MergeNone, intrinsic, [IsStreamingCompatible]>; + def _N : SInst<name # "[_n_{d}]", "dhR", types, MergeNone, intrinsic, [IsStreamingCompatible]>; } multiclass SInstWideDSPWide<string name, string types, string intrinsic> { - def : SInst<name # "[_{d}]", "ddh", types, MergeNone, intrinsic>; - def _N : SInst<name # "[_n_{d}]", "ddR", types, MergeNone, intrinsic>; + def : SInst<name # "[_{d}]", "ddh", types, MergeNone, intrinsic, [IsStreamingCompatible]>; + def _N : SInst<name # "[_n_{d}]", "ddR", types, MergeNone, intrinsic, [IsStreamingCompatible]>; } -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { +let TargetGuard = "sve2" in { defm SVABALB_S : SInstWideDSPAcc<"svabalb", "sil", "aarch64_sve_sabalb">; defm SVABALB_U : SInstWideDSPAcc<"svabalb", "UsUiUl", "aarch64_sve_uabalb">; defm SVABALT_S : SInstWideDSPAcc<"svabalt", "sil", "aarch64_sve_sabalt">; @@ -1728,93 +1598,93 @@ defm SVSUBWB_U : SInstWideDSPWide<"svsubwb", "UsUiUl", "aarch64_sve_usubwb">; defm SVSUBWT_S : SInstWideDSPWide<"svsubwt", "sil", "aarch64_sve_ssubwt">; defm SVSUBWT_U : SInstWideDSPWide<"svsubwt", "UsUiUl", "aarch64_sve_usubwt">; -def SVSHLLB_S_N : SInst<"svshllb[_n_{d}]", "dhi", "sil", MergeNone, "aarch64_sve_sshllb", [], [ImmCheck<1, ImmCheckShiftLeft, 0>]>; -def SVSHLLB_U_N : SInst<"svshllb[_n_{d}]", "dhi", "UsUiUl", MergeNone, "aarch64_sve_ushllb", [], [ImmCheck<1, ImmCheckShiftLeft, 0>]>; -def SVSHLLT_S_N : SInst<"svshllt[_n_{d}]", "dhi", "sil", MergeNone, "aarch64_sve_sshllt", [], [ImmCheck<1, ImmCheckShiftLeft, 0>]>; -def SVSHLLT_U_N : SInst<"svshllt[_n_{d}]", "dhi", "UsUiUl", MergeNone, "aarch64_sve_ushllt", [], [ImmCheck<1, ImmCheckShiftLeft, 0>]>; - -def SVMOVLB_S_N : SInst<"svmovlb[_{d}]", "dh", "sil", MergeNone>; -def SVMOVLB_U_N : SInst<"svmovlb[_{d}]", "dh", "UsUiUl", MergeNone>; -def SVMOVLT_S_N : SInst<"svmovlt[_{d}]", "dh", "sil", MergeNone>; -def SVMOVLT_U_N : SInst<"svmovlt[_{d}]", "dh", "UsUiUl", MergeNone>; - -def SVMLALB_S_LANE : SInst<"svmlalb_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_smlalb_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMLALB_U_LANE : SInst<"svmlalb_lane[_{d}]", "ddhhi", "UiUl", MergeNone, "aarch64_sve_umlalb_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMLALT_S_LANE : SInst<"svmlalt_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_smlalt_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMLALT_U_LANE : SInst<"svmlalt_lane[_{d}]", "ddhhi", "UiUl", MergeNone, "aarch64_sve_umlalt_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMLSLB_S_LANE : SInst<"svmlslb_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_smlslb_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMLSLB_U_LANE : SInst<"svmlslb_lane[_{d}]", "ddhhi", "UiUl", MergeNone, "aarch64_sve_umlslb_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMLSLT_S_LANE : SInst<"svmlslt_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_smlslt_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMLSLT_U_LANE : SInst<"svmlslt_lane[_{d}]", "ddhhi", "UiUl", MergeNone, "aarch64_sve_umlslt_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMULLB_S_LANE : SInst<"svmullb_lane[_{d}]", "dhhi", "il", MergeNone, "aarch64_sve_smullb_lane", [], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; -def SVMULLB_U_LANE : SInst<"svmullb_lane[_{d}]", "dhhi", "UiUl", MergeNone, "aarch64_sve_umullb_lane", [], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; -def SVMULLT_S_LANE : SInst<"svmullt_lane[_{d}]", "dhhi", "il", MergeNone, "aarch64_sve_smullt_lane", [], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; -def SVMULLT_U_LANE : SInst<"svmullt_lane[_{d}]", "dhhi", "UiUl", MergeNone, "aarch64_sve_umullt_lane", [], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; -def SVQDMLALB_LANE : SInst<"svqdmlalb_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_sqdmlalb_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVQDMLALT_LANE : SInst<"svqdmlalt_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_sqdmlalt_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVQDMLSLB_LANE : SInst<"svqdmlslb_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_sqdmlslb_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVQDMLSLT_LANE : SInst<"svqdmlslt_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_sqdmlslt_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVQDMULLB_LANE : SInst<"svqdmullb_lane[_{d}]", "dhhi", "il", MergeNone, "aarch64_sve_sqdmullb_lane", [], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; -def SVQDMULLT_LANE : SInst<"svqdmullt_lane[_{d}]", "dhhi", "il", MergeNone, "aarch64_sve_sqdmullt_lane", [], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; +def SVSHLLB_S_N : SInst<"svshllb[_n_{d}]", "dhi", "sil", MergeNone, "aarch64_sve_sshllb", [IsStreamingCompatible], [ImmCheck<1, ImmCheckShiftLeft, 0>]>; +def SVSHLLB_U_N : SInst<"svshllb[_n_{d}]", "dhi", "UsUiUl", MergeNone, "aarch64_sve_ushllb", [IsStreamingCompatible], [ImmCheck<1, ImmCheckShiftLeft, 0>]>; +def SVSHLLT_S_N : SInst<"svshllt[_n_{d}]", "dhi", "sil", MergeNone, "aarch64_sve_sshllt", [IsStreamingCompatible], [ImmCheck<1, ImmCheckShiftLeft, 0>]>; +def SVSHLLT_U_N : SInst<"svshllt[_n_{d}]", "dhi", "UsUiUl", MergeNone, "aarch64_sve_ushllt", [IsStreamingCompatible], [ImmCheck<1, ImmCheckShiftLeft, 0>]>; + +def SVMOVLB_S_N : SInst<"svmovlb[_{d}]", "dh", "sil", MergeNone, "", [IsStreamingCompatible]>; +def SVMOVLB_U_N : SInst<"svmovlb[_{d}]", "dh", "UsUiUl", MergeNone, "", [IsStreamingCompatible]>; +def SVMOVLT_S_N : SInst<"svmovlt[_{d}]", "dh", "sil", MergeNone, "", [IsStreamingCompatible]>; +def SVMOVLT_U_N : SInst<"svmovlt[_{d}]", "dh", "UsUiUl", MergeNone, "", [IsStreamingCompatible]>; + +def SVMLALB_S_LANE : SInst<"svmlalb_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_smlalb_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLALB_U_LANE : SInst<"svmlalb_lane[_{d}]", "ddhhi", "UiUl", MergeNone, "aarch64_sve_umlalb_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLALT_S_LANE : SInst<"svmlalt_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_smlalt_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLALT_U_LANE : SInst<"svmlalt_lane[_{d}]", "ddhhi", "UiUl", MergeNone, "aarch64_sve_umlalt_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLSLB_S_LANE : SInst<"svmlslb_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_smlslb_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLSLB_U_LANE : SInst<"svmlslb_lane[_{d}]", "ddhhi", "UiUl", MergeNone, "aarch64_sve_umlslb_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLSLT_S_LANE : SInst<"svmlslt_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_smlslt_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLSLT_U_LANE : SInst<"svmlslt_lane[_{d}]", "ddhhi", "UiUl", MergeNone, "aarch64_sve_umlslt_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMULLB_S_LANE : SInst<"svmullb_lane[_{d}]", "dhhi", "il", MergeNone, "aarch64_sve_smullb_lane", [IsStreamingCompatible], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; +def SVMULLB_U_LANE : SInst<"svmullb_lane[_{d}]", "dhhi", "UiUl", MergeNone, "aarch64_sve_umullb_lane", [IsStreamingCompatible], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; +def SVMULLT_S_LANE : SInst<"svmullt_lane[_{d}]", "dhhi", "il", MergeNone, "aarch64_sve_smullt_lane", [IsStreamingCompatible], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; +def SVMULLT_U_LANE : SInst<"svmullt_lane[_{d}]", "dhhi", "UiUl", MergeNone, "aarch64_sve_umullt_lane", [IsStreamingCompatible], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; +def SVQDMLALB_LANE : SInst<"svqdmlalb_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_sqdmlalb_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVQDMLALT_LANE : SInst<"svqdmlalt_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_sqdmlalt_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVQDMLSLB_LANE : SInst<"svqdmlslb_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_sqdmlslb_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVQDMLSLT_LANE : SInst<"svqdmlslt_lane[_{d}]", "ddhhi", "il", MergeNone, "aarch64_sve_sqdmlslt_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVQDMULLB_LANE : SInst<"svqdmullb_lane[_{d}]", "dhhi", "il", MergeNone, "aarch64_sve_sqdmullb_lane", [IsStreamingCompatible], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; +def SVQDMULLT_LANE : SInst<"svqdmullt_lane[_{d}]", "dhhi", "il", MergeNone, "aarch64_sve_sqdmullt_lane", [IsStreamingCompatible], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Narrowing DSP operations -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -def SVADDHNB : SInst<"svaddhnb[_{d}]", "hdd", "silUsUiUl", MergeNone, "aarch64_sve_addhnb">; -def SVADDHNT : SInst<"svaddhnt[_{d}]", "hhdd", "silUsUiUl", MergeNone, "aarch64_sve_addhnt">; -def SVRADDHNB : SInst<"svraddhnb[_{d}]", "hdd", "silUsUiUl", MergeNone, "aarch64_sve_raddhnb">; -def SVRADDHNT : SInst<"svraddhnt[_{d}]", "hhdd", "silUsUiUl", MergeNone, "aarch64_sve_raddhnt">; -def SVRSUBHNB : SInst<"svrsubhnb[_{d}]", "hdd", "silUsUiUl", MergeNone, "aarch64_sve_rsubhnb">; -def SVRSUBHNT : SInst<"svrsubhnt[_{d}]", "hhdd", "silUsUiUl", MergeNone, "aarch64_sve_rsubhnt">; -def SVSUBHNB : SInst<"svsubhnb[_{d}]", "hdd", "silUsUiUl", MergeNone, "aarch64_sve_subhnb">; -def SVSUBHNT : SInst<"svsubhnt[_{d}]", "hhdd", "silUsUiUl", MergeNone, "aarch64_sve_subhnt">; - -def SVADDHNB_N : SInst<"svaddhnb[_n_{d}]", "hda", "silUsUiUl", MergeNone, "aarch64_sve_addhnb">; -def SVADDHNT_N : SInst<"svaddhnt[_n_{d}]", "hhda", "silUsUiUl", MergeNone, "aarch64_sve_addhnt">; -def SVRADDHNB_N : SInst<"svraddhnb[_n_{d}]", "hda", "silUsUiUl", MergeNone, "aarch64_sve_raddhnb">; -def SVRADDHNT_N : SInst<"svraddhnt[_n_{d}]", "hhda", "silUsUiUl", MergeNone, "aarch64_sve_raddhnt">; -def SVRSUBHNB_N : SInst<"svrsubhnb[_n_{d}]", "hda", "silUsUiUl", MergeNone, "aarch64_sve_rsubhnb">; -def SVRSUBHNT_N : SInst<"svrsubhnt[_n_{d}]", "hhda", "silUsUiUl", MergeNone, "aarch64_sve_rsubhnt">; -def SVSUBHNB_N : SInst<"svsubhnb[_n_{d}]", "hda", "silUsUiUl", MergeNone, "aarch64_sve_subhnb">; -def SVSUBHNT_N : SInst<"svsubhnt[_n_{d}]", "hhda", "silUsUiUl", MergeNone, "aarch64_sve_subhnt">; - -def SVSHRNB : SInst<"svshrnb[_n_{d}]", "hdi", "silUsUiUl", MergeNone, "aarch64_sve_shrnb", [], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; -def SVRSHRNB : SInst<"svrshrnb[_n_{d}]", "hdi", "silUsUiUl", MergeNone, "aarch64_sve_rshrnb", [], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; -def SVQSHRUNB : SInst<"svqshrunb[_n_{d}]", "edi", "sil", MergeNone, "aarch64_sve_sqshrunb", [], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; -def SVQRSHRUNB : SInst<"svqrshrunb[_n_{d}]", "edi", "sil", MergeNone, "aarch64_sve_sqrshrunb", [], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; -def SVQSHRNB_S : SInst<"svqshrnb[_n_{d}]", "hdi", "sil", MergeNone, "aarch64_sve_sqshrnb", [], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; -def SVQSHRNB_U : SInst<"svqshrnb[_n_{d}]", "hdi", "UsUiUl", MergeNone, "aarch64_sve_uqshrnb", [], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; -def SVQRSHRNB_S : SInst<"svqrshrnb[_n_{d}]", "hdi", "sil", MergeNone, "aarch64_sve_sqrshrnb", [], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; -def SVQRSHRNB_U : SInst<"svqrshrnb[_n_{d}]", "hdi", "UsUiUl", MergeNone, "aarch64_sve_uqrshrnb", [], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; - -def SVSHRNT : SInst<"svshrnt[_n_{d}]", "hhdi", "silUsUiUl", MergeNone, "aarch64_sve_shrnt", [], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; -def SVRSHRNT : SInst<"svrshrnt[_n_{d}]", "hhdi", "silUsUiUl", MergeNone, "aarch64_sve_rshrnt", [], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; -def SVQSHRUNT : SInst<"svqshrunt[_n_{d}]", "eedi", "sil", MergeNone, "aarch64_sve_sqshrunt", [], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; -def SVQRSHRUNT : SInst<"svqrshrunt[_n_{d}]", "eedi", "sil", MergeNone, "aarch64_sve_sqrshrunt", [], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; -def SVQSHRNT_S : SInst<"svqshrnt[_n_{d}]", "hhdi", "sil", MergeNone, "aarch64_sve_sqshrnt", [], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; -def SVQSHRNT_U : SInst<"svqshrnt[_n_{d}]", "hhdi", "UsUiUl", MergeNone, "aarch64_sve_uqshrnt", [], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; -def SVQRSHRNT_S : SInst<"svqrshrnt[_n_{d}]", "hhdi", "sil", MergeNone, "aarch64_sve_sqrshrnt", [], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; -def SVQRSHRNT_U : SInst<"svqrshrnt[_n_{d}]", "hhdi", "UsUiUl", MergeNone, "aarch64_sve_uqrshrnt", [], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; +let TargetGuard = "sve2" in { +def SVADDHNB : SInst<"svaddhnb[_{d}]", "hdd", "silUsUiUl", MergeNone, "aarch64_sve_addhnb", [IsStreamingCompatible]>; +def SVADDHNT : SInst<"svaddhnt[_{d}]", "hhdd", "silUsUiUl", MergeNone, "aarch64_sve_addhnt", [IsStreamingCompatible]>; +def SVRADDHNB : SInst<"svraddhnb[_{d}]", "hdd", "silUsUiUl", MergeNone, "aarch64_sve_raddhnb", [IsStreamingCompatible]>; +def SVRADDHNT : SInst<"svraddhnt[_{d}]", "hhdd", "silUsUiUl", MergeNone, "aarch64_sve_raddhnt", [IsStreamingCompatible]>; +def SVRSUBHNB : SInst<"svrsubhnb[_{d}]", "hdd", "silUsUiUl", MergeNone, "aarch64_sve_rsubhnb", [IsStreamingCompatible]>; +def SVRSUBHNT : SInst<"svrsubhnt[_{d}]", "hhdd", "silUsUiUl", MergeNone, "aarch64_sve_rsubhnt", [IsStreamingCompatible]>; +def SVSUBHNB : SInst<"svsubhnb[_{d}]", "hdd", "silUsUiUl", MergeNone, "aarch64_sve_subhnb", [IsStreamingCompatible]>; +def SVSUBHNT : SInst<"svsubhnt[_{d}]", "hhdd", "silUsUiUl", MergeNone, "aarch64_sve_subhnt", [IsStreamingCompatible]>; + +def SVADDHNB_N : SInst<"svaddhnb[_n_{d}]", "hda", "silUsUiUl", MergeNone, "aarch64_sve_addhnb", [IsStreamingCompatible]>; +def SVADDHNT_N : SInst<"svaddhnt[_n_{d}]", "hhda", "silUsUiUl", MergeNone, "aarch64_sve_addhnt", [IsStreamingCompatible]>; +def SVRADDHNB_N : SInst<"svraddhnb[_n_{d}]", "hda", "silUsUiUl", MergeNone, "aarch64_sve_raddhnb", [IsStreamingCompatible]>; +def SVRADDHNT_N : SInst<"svraddhnt[_n_{d}]", "hhda", "silUsUiUl", MergeNone, "aarch64_sve_raddhnt", [IsStreamingCompatible]>; +def SVRSUBHNB_N : SInst<"svrsubhnb[_n_{d}]", "hda", "silUsUiUl", MergeNone, "aarch64_sve_rsubhnb", [IsStreamingCompatible]>; +def SVRSUBHNT_N : SInst<"svrsubhnt[_n_{d}]", "hhda", "silUsUiUl", MergeNone, "aarch64_sve_rsubhnt", [IsStreamingCompatible]>; +def SVSUBHNB_N : SInst<"svsubhnb[_n_{d}]", "hda", "silUsUiUl", MergeNone, "aarch64_sve_subhnb", [IsStreamingCompatible]>; +def SVSUBHNT_N : SInst<"svsubhnt[_n_{d}]", "hhda", "silUsUiUl", MergeNone, "aarch64_sve_subhnt", [IsStreamingCompatible]>; + +def SVSHRNB : SInst<"svshrnb[_n_{d}]", "hdi", "silUsUiUl", MergeNone, "aarch64_sve_shrnb", [IsStreamingCompatible], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; +def SVRSHRNB : SInst<"svrshrnb[_n_{d}]", "hdi", "silUsUiUl", MergeNone, "aarch64_sve_rshrnb", [IsStreamingCompatible], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; +def SVQSHRUNB : SInst<"svqshrunb[_n_{d}]", "edi", "sil", MergeNone, "aarch64_sve_sqshrunb", [IsStreamingCompatible], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; +def SVQRSHRUNB : SInst<"svqrshrunb[_n_{d}]", "edi", "sil", MergeNone, "aarch64_sve_sqrshrunb", [IsStreamingCompatible], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; +def SVQSHRNB_S : SInst<"svqshrnb[_n_{d}]", "hdi", "sil", MergeNone, "aarch64_sve_sqshrnb", [IsStreamingCompatible], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; +def SVQSHRNB_U : SInst<"svqshrnb[_n_{d}]", "hdi", "UsUiUl", MergeNone, "aarch64_sve_uqshrnb", [IsStreamingCompatible], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; +def SVQRSHRNB_S : SInst<"svqrshrnb[_n_{d}]", "hdi", "sil", MergeNone, "aarch64_sve_sqrshrnb", [IsStreamingCompatible], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; +def SVQRSHRNB_U : SInst<"svqrshrnb[_n_{d}]", "hdi", "UsUiUl", MergeNone, "aarch64_sve_uqrshrnb", [IsStreamingCompatible], [ImmCheck<1, ImmCheckShiftRightNarrow, 0>]>; + +def SVSHRNT : SInst<"svshrnt[_n_{d}]", "hhdi", "silUsUiUl", MergeNone, "aarch64_sve_shrnt", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; +def SVRSHRNT : SInst<"svrshrnt[_n_{d}]", "hhdi", "silUsUiUl", MergeNone, "aarch64_sve_rshrnt", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; +def SVQSHRUNT : SInst<"svqshrunt[_n_{d}]", "eedi", "sil", MergeNone, "aarch64_sve_sqshrunt", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; +def SVQRSHRUNT : SInst<"svqrshrunt[_n_{d}]", "eedi", "sil", MergeNone, "aarch64_sve_sqrshrunt", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; +def SVQSHRNT_S : SInst<"svqshrnt[_n_{d}]", "hhdi", "sil", MergeNone, "aarch64_sve_sqshrnt", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; +def SVQSHRNT_U : SInst<"svqshrnt[_n_{d}]", "hhdi", "UsUiUl", MergeNone, "aarch64_sve_uqshrnt", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; +def SVQRSHRNT_S : SInst<"svqrshrnt[_n_{d}]", "hhdi", "sil", MergeNone, "aarch64_sve_sqrshrnt", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; +def SVQRSHRNT_U : SInst<"svqrshrnt[_n_{d}]", "hhdi", "UsUiUl", MergeNone, "aarch64_sve_uqrshrnt", [IsStreamingCompatible], [ImmCheck<2, ImmCheckShiftRightNarrow, 1>]>; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Unary narrowing operations -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -def SVQXTNB_S : SInst<"svqxtnb[_{d}]", "hd", "sil", MergeNone, "aarch64_sve_sqxtnb">; -def SVQXTNB_U : SInst<"svqxtnb[_{d}]", "hd", "UsUiUl", MergeNone, "aarch64_sve_uqxtnb">; -def SVQXTUNB_S : SInst<"svqxtunb[_{d}]", "ed", "sil", MergeNone, "aarch64_sve_sqxtunb">; +let TargetGuard = "sve2" in { +def SVQXTNB_S : SInst<"svqxtnb[_{d}]", "hd", "sil", MergeNone, "aarch64_sve_sqxtnb", [IsStreamingCompatible]>; +def SVQXTNB_U : SInst<"svqxtnb[_{d}]", "hd", "UsUiUl", MergeNone, "aarch64_sve_uqxtnb", [IsStreamingCompatible]>; +def SVQXTUNB_S : SInst<"svqxtunb[_{d}]", "ed", "sil", MergeNone, "aarch64_sve_sqxtunb", [IsStreamingCompatible]>; -def SVQXTNT_S : SInst<"svqxtnt[_{d}]", "hhd", "sil", MergeNone, "aarch64_sve_sqxtnt">; -def SVQXTNT_U : SInst<"svqxtnt[_{d}]", "hhd", "UsUiUl", MergeNone, "aarch64_sve_uqxtnt">; -def SVQXTUNT_S : SInst<"svqxtunt[_{d}]", "eed", "sil", MergeNone, "aarch64_sve_sqxtunt">; +def SVQXTNT_S : SInst<"svqxtnt[_{d}]", "hhd", "sil", MergeNone, "aarch64_sve_sqxtnt", [IsStreamingCompatible]>; +def SVQXTNT_U : SInst<"svqxtnt[_{d}]", "hhd", "UsUiUl", MergeNone, "aarch64_sve_uqxtnt", [IsStreamingCompatible]>; +def SVQXTUNT_S : SInst<"svqxtunt[_{d}]", "eed", "sil", MergeNone, "aarch64_sve_sqxtunt", [IsStreamingCompatible]>; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Widening complex integer arithmetic -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { +let TargetGuard = "sve2" in { defm SVADDLBT : SInstWideDSPLong<"svaddlbt", "sil", "aarch64_sve_saddlbt">; defm SVSUBLBT : SInstWideDSPLong<"svsublbt", "sil", "aarch64_sve_ssublbt">; defm SVSUBLTB : SInstWideDSPLong<"svsubltb", "sil", "aarch64_sve_ssubltb">; @@ -1825,7 +1695,7 @@ defm SVQDMLSLBT : SInstWideDSPAcc<"svqdmlslbt", "sil", "aarch64_sve_sqdmlslbt">; //////////////////////////////////////////////////////////////////////////////// // SVE2 - Non-temporal gather/scatter -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { +let TargetGuard = "sve2" in { // Non-temporal gather load one vector (vector base) def SVLDNT1_GATHER_BASES_U : MInst<"svldnt1_gather[_{2}base]_{0}", "dPu", "ilUiUlfd", [IsGatherLoad], MemEltTyDefault, "aarch64_sve_ldnt1_gather_scalar_offset">; def SVLDNT1SB_GATHER_BASES_U : MInst<"svldnt1sb_gather[_{2}base]_{0}", "dPu", "ilUiUl", [IsGatherLoad], MemEltTyInt8, "aarch64_sve_ldnt1_gather_scalar_offset">; @@ -1948,63 +1818,63 @@ def SVSTNT1W_SCATTER_INDEX_S : MInst<"svstnt1w_scatter[_{2}base]_index[_{d}]", " //////////////////////////////////////////////////////////////////////////////// // SVE2 - Polynomial arithmetic -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -def SVEORBT : SInst<"sveorbt[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_eorbt">; -def SVEORBT_N : SInst<"sveorbt[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_eorbt">; -def SVEORTB : SInst<"sveortb[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_eortb">; -def SVEORTB_N : SInst<"sveortb[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_eortb">; -def SVPMUL : SInst<"svpmul[_{d}]", "ddd", "Uc", MergeNone, "aarch64_sve_pmul">; -def SVPMUL_N : SInst<"svpmul[_n_{d}]", "dda", "Uc", MergeNone, "aarch64_sve_pmul">; -def SVPMULLB : SInst<"svpmullb[_{d}]", "dhh", "UsUl", MergeNone>; -def SVPMULLB_N : SInst<"svpmullb[_n_{d}]", "dhR", "UsUl", MergeNone>; -def SVPMULLB_PAIR : SInst<"svpmullb_pair[_{d}]", "ddd", "UcUi", MergeNone, "aarch64_sve_pmullb_pair">; -def SVPMULLB_PAIR_N : SInst<"svpmullb_pair[_n_{d}]", "dda", "UcUi", MergeNone, "aarch64_sve_pmullb_pair">; -def SVPMULLT : SInst<"svpmullt[_{d}]", "dhh", "UsUl", MergeNone>; -def SVPMULLT_N : SInst<"svpmullt[_n_{d}]", "dhR", "UsUl", MergeNone>; -def SVPMULLT_PAIR : SInst<"svpmullt_pair[_{d}]", "ddd", "UcUi", MergeNone, "aarch64_sve_pmullt_pair">; -def SVPMULLT_PAIR_N : SInst<"svpmullt_pair[_n_{d}]", "dda", "UcUi", MergeNone, "aarch64_sve_pmullt_pair">; +let TargetGuard = "sve2" in { +def SVEORBT : SInst<"sveorbt[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_eorbt", [IsStreamingCompatible]>; +def SVEORBT_N : SInst<"sveorbt[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_eorbt", [IsStreamingCompatible]>; +def SVEORTB : SInst<"sveortb[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_eortb", [IsStreamingCompatible]>; +def SVEORTB_N : SInst<"sveortb[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_eortb", [IsStreamingCompatible]>; +def SVPMUL : SInst<"svpmul[_{d}]", "ddd", "Uc", MergeNone, "aarch64_sve_pmul", [IsStreamingCompatible]>; +def SVPMUL_N : SInst<"svpmul[_n_{d}]", "dda", "Uc", MergeNone, "aarch64_sve_pmul", [IsStreamingCompatible]>; +def SVPMULLB : SInst<"svpmullb[_{d}]", "dhh", "UsUl", MergeNone, "", [IsStreamingCompatible]>; +def SVPMULLB_N : SInst<"svpmullb[_n_{d}]", "dhR", "UsUl", MergeNone, "", [IsStreamingCompatible]>; +def SVPMULLB_PAIR : SInst<"svpmullb_pair[_{d}]", "ddd", "UcUi", MergeNone, "aarch64_sve_pmullb_pair", [IsStreamingCompatible]>; +def SVPMULLB_PAIR_N : SInst<"svpmullb_pair[_n_{d}]", "dda", "UcUi", MergeNone, "aarch64_sve_pmullb_pair", [IsStreamingCompatible]>; +def SVPMULLT : SInst<"svpmullt[_{d}]", "dhh", "UsUl", MergeNone, "", [IsStreamingCompatible]>; +def SVPMULLT_N : SInst<"svpmullt[_n_{d}]", "dhR", "UsUl", MergeNone, "", [IsStreamingCompatible]>; +def SVPMULLT_PAIR : SInst<"svpmullt_pair[_{d}]", "ddd", "UcUi", MergeNone, "aarch64_sve_pmullt_pair", [IsStreamingCompatible]>; +def SVPMULLT_PAIR_N : SInst<"svpmullt_pair[_n_{d}]", "dda", "UcUi", MergeNone, "aarch64_sve_pmullt_pair", [IsStreamingCompatible]>; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Complex integer dot product -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -def SVCDOT : SInst<"svcdot[_{d}]", "ddqqi", "il", MergeNone, "aarch64_sve_cdot", [], [ImmCheck<3, ImmCheckComplexRotAll90>]>; -def SVCDOT_LANE : SInst<"svcdot_lane[_{d}]", "ddqqii", "il", MergeNone, "aarch64_sve_cdot_lane", [], [ImmCheck<4, ImmCheckComplexRotAll90>, +let TargetGuard = "sve2" in { +def SVCDOT : SInst<"svcdot[_{d}]", "ddqqi", "il", MergeNone, "aarch64_sve_cdot", [IsStreamingCompatible], [ImmCheck<3, ImmCheckComplexRotAll90>]>; +def SVCDOT_LANE : SInst<"svcdot_lane[_{d}]", "ddqqii", "il", MergeNone, "aarch64_sve_cdot_lane", [IsStreamingCompatible], [ImmCheck<4, ImmCheckComplexRotAll90>, ImmCheck<3, ImmCheckLaneIndexDot, 2>]>; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Floating-point widening multiply-accumulate -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -def SVMLALB_F : SInst<"svmlalb[_{d}]", "ddhh", "f", MergeNone, "aarch64_sve_fmlalb">; -def SVMLALB_F_N : SInst<"svmlalb[_n_{d}]", "ddhR", "f", MergeNone, "aarch64_sve_fmlalb">; -def SVMLALB_F_LANE : SInst<"svmlalb_lane[_{d}]", "ddhhi", "f", MergeNone, "aarch64_sve_fmlalb_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMLALT_F : SInst<"svmlalt[_{d}]", "ddhh", "f", MergeNone, "aarch64_sve_fmlalt">; -def SVMLALT_F_N : SInst<"svmlalt[_n_{d}]", "ddhR", "f", MergeNone, "aarch64_sve_fmlalt">; -def SVMLALT_F_LANE : SInst<"svmlalt_lane[_{d}]", "ddhhi", "f", MergeNone, "aarch64_sve_fmlalt_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMLSLB_F : SInst<"svmlslb[_{d}]", "ddhh", "f", MergeNone, "aarch64_sve_fmlslb">; -def SVMLSLB_F_N : SInst<"svmlslb[_n_{d}]", "ddhR", "f", MergeNone, "aarch64_sve_fmlslb">; -def SVMLSLB_F_LANE : SInst<"svmlslb_lane[_{d}]", "ddhhi", "f", MergeNone, "aarch64_sve_fmlslb_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; -def SVMLSLT_F : SInst<"svmlslt[_{d}]", "ddhh", "f", MergeNone, "aarch64_sve_fmlslt">; -def SVMLSLT_F_N : SInst<"svmlslt[_n_{d}]", "ddhR", "f", MergeNone, "aarch64_sve_fmlslt">; -def SVMLSLT_F_LANE : SInst<"svmlslt_lane[_{d}]", "ddhhi", "f", MergeNone, "aarch64_sve_fmlslt_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +let TargetGuard = "sve2" in { +def SVMLALB_F : SInst<"svmlalb[_{d}]", "ddhh", "f", MergeNone, "aarch64_sve_fmlalb", [IsStreamingCompatible]>; +def SVMLALB_F_N : SInst<"svmlalb[_n_{d}]", "ddhR", "f", MergeNone, "aarch64_sve_fmlalb", [IsStreamingCompatible]>; +def SVMLALB_F_LANE : SInst<"svmlalb_lane[_{d}]", "ddhhi", "f", MergeNone, "aarch64_sve_fmlalb_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLALT_F : SInst<"svmlalt[_{d}]", "ddhh", "f", MergeNone, "aarch64_sve_fmlalt", [IsStreamingCompatible]>; +def SVMLALT_F_N : SInst<"svmlalt[_n_{d}]", "ddhR", "f", MergeNone, "aarch64_sve_fmlalt", [IsStreamingCompatible]>; +def SVMLALT_F_LANE : SInst<"svmlalt_lane[_{d}]", "ddhhi", "f", MergeNone, "aarch64_sve_fmlalt_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLSLB_F : SInst<"svmlslb[_{d}]", "ddhh", "f", MergeNone, "aarch64_sve_fmlslb", [IsStreamingCompatible]>; +def SVMLSLB_F_N : SInst<"svmlslb[_n_{d}]", "ddhR", "f", MergeNone, "aarch64_sve_fmlslb", [IsStreamingCompatible]>; +def SVMLSLB_F_LANE : SInst<"svmlslb_lane[_{d}]", "ddhhi", "f", MergeNone, "aarch64_sve_fmlslb_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLSLT_F : SInst<"svmlslt[_{d}]", "ddhh", "f", MergeNone, "aarch64_sve_fmlslt", [IsStreamingCompatible]>; +def SVMLSLT_F_N : SInst<"svmlslt[_n_{d}]", "ddhR", "f", MergeNone, "aarch64_sve_fmlslt", [IsStreamingCompatible]>; +def SVMLSLT_F_LANE : SInst<"svmlslt_lane[_{d}]", "ddhhi", "f", MergeNone, "aarch64_sve_fmlslt_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Floating-point integer binary logarithm -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -def SVLOGB_M : SInst<"svlogb[_{d}]", "xxPd", "hfd", MergeOp1, "aarch64_sve_flogb">; -def SVLOGB_X : SInst<"svlogb[_{d}]", "xPd", "hfd", MergeAnyExp, "aarch64_sve_flogb">; -def SVLOGB_Z : SInst<"svlogb[_{d}]", "xPd", "hfd", MergeZeroExp, "aarch64_sve_flogb">; +let TargetGuard = "sve2" in { +def SVLOGB_M : SInst<"svlogb[_{d}]", "xxPd", "hfd", MergeOp1, "aarch64_sve_flogb", [IsStreamingCompatible]>; +def SVLOGB_X : SInst<"svlogb[_{d}]", "xPd", "hfd", MergeAnyExp, "aarch64_sve_flogb", [IsStreamingCompatible]>; +def SVLOGB_Z : SInst<"svlogb[_{d}]", "xPd", "hfd", MergeZeroExp, "aarch64_sve_flogb", [IsStreamingCompatible]>; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Vector Histogram count -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { +let TargetGuard = "sve2" in { def SVHISTCNT : SInst<"svhistcnt[_{d}]_z", "uPdd", "ilUiUl", MergeNone, "aarch64_sve_histcnt">; def SVHISTSEG : SInst<"svhistseg[_{d}]", "udd", "cUc", MergeNone, "aarch64_sve_histseg">; } @@ -2012,46 +1882,46 @@ def SVHISTSEG : SInst<"svhistseg[_{d}]", "udd", "cUc", MergeNone, "aarch6 //////////////////////////////////////////////////////////////////////////////// // SVE2 - Character match -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { +let TargetGuard = "sve2" in { def SVMATCH : SInst<"svmatch[_{d}]", "PPdd", "csUcUs", MergeNone, "aarch64_sve_match">; def SVNMATCH : SInst<"svnmatch[_{d}]", "PPdd", "csUcUs", MergeNone, "aarch64_sve_nmatch">; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Contiguous conflict detection -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -def SVWHILERW_B : SInst<"svwhilerw[_{1}]", "Pcc", "cUc", MergeNone, "aarch64_sve_whilerw_b", [IsOverloadWhileRW]>; -def SVWHILERW_H : SInst<"svwhilerw[_{1}]", "Pcc", "sUsh", MergeNone, "aarch64_sve_whilerw_h", [IsOverloadWhileRW]>; -def SVWHILERW_S : SInst<"svwhilerw[_{1}]", "Pcc", "iUif", MergeNone, "aarch64_sve_whilerw_s", [IsOverloadWhileRW]>; -def SVWHILERW_D : SInst<"svwhilerw[_{1}]", "Pcc", "lUld", MergeNone, "aarch64_sve_whilerw_d", [IsOverloadWhileRW]>; +let TargetGuard = "sve2" in { +def SVWHILERW_B : SInst<"svwhilerw[_{1}]", "Pcc", "cUc", MergeNone, "aarch64_sve_whilerw_b", [IsOverloadWhileRW, IsStreamingCompatible]>; +def SVWHILERW_H : SInst<"svwhilerw[_{1}]", "Pcc", "sUsh", MergeNone, "aarch64_sve_whilerw_h", [IsOverloadWhileRW, IsStreamingCompatible]>; +def SVWHILERW_S : SInst<"svwhilerw[_{1}]", "Pcc", "iUif", MergeNone, "aarch64_sve_whilerw_s", [IsOverloadWhileRW, IsStreamingCompatible]>; +def SVWHILERW_D : SInst<"svwhilerw[_{1}]", "Pcc", "lUld", MergeNone, "aarch64_sve_whilerw_d", [IsOverloadWhileRW, IsStreamingCompatible]>; -def SVWHILEWR_B : SInst<"svwhilewr[_{1}]", "Pcc", "cUc", MergeNone, "aarch64_sve_whilewr_b", [IsOverloadWhileRW]>; -def SVWHILEWR_H : SInst<"svwhilewr[_{1}]", "Pcc", "sUsh", MergeNone, "aarch64_sve_whilewr_h", [IsOverloadWhileRW]>; -def SVWHILEWR_S : SInst<"svwhilewr[_{1}]", "Pcc", "iUif", MergeNone, "aarch64_sve_whilewr_s", [IsOverloadWhileRW]>; -def SVWHILEWR_D : SInst<"svwhilewr[_{1}]", "Pcc", "lUld", MergeNone, "aarch64_sve_whilewr_d", [IsOverloadWhileRW]>; +def SVWHILEWR_B : SInst<"svwhilewr[_{1}]", "Pcc", "cUc", MergeNone, "aarch64_sve_whilewr_b", [IsOverloadWhileRW, IsStreamingCompatible]>; +def SVWHILEWR_H : SInst<"svwhilewr[_{1}]", "Pcc", "sUsh", MergeNone, "aarch64_sve_whilewr_h", [IsOverloadWhileRW, IsStreamingCompatible]>; +def SVWHILEWR_S : SInst<"svwhilewr[_{1}]", "Pcc", "iUif", MergeNone, "aarch64_sve_whilewr_s", [IsOverloadWhileRW, IsStreamingCompatible]>; +def SVWHILEWR_D : SInst<"svwhilewr[_{1}]", "Pcc", "lUld", MergeNone, "aarch64_sve_whilewr_d", [IsOverloadWhileRW, IsStreamingCompatible]>; } -let ArchGuard = "defined(__ARM_FEATURE_SVE2) && defined(__ARM_FEATURE_BF16_SCALAR_ARITHMETIC)" in { -def SVWHILERW_H_BF16 : SInst<"svwhilerw[_{1}]", "Pcc", "b", MergeNone, "aarch64_sve_whilerw_h", [IsOverloadWhileRW]>; -def SVWHILEWR_H_BF16 : SInst<"svwhilewr[_{1}]", "Pcc", "b", MergeNone, "aarch64_sve_whilewr_h", [IsOverloadWhileRW]>; +let TargetGuard = "sve2,bf16" in { +def SVWHILERW_H_BF16 : SInst<"svwhilerw[_{1}]", "Pcc", "b", MergeNone, "aarch64_sve_whilerw_h", [IsOverloadWhileRW, IsStreamingCompatible]>; +def SVWHILEWR_H_BF16 : SInst<"svwhilewr[_{1}]", "Pcc", "b", MergeNone, "aarch64_sve_whilewr_h", [IsOverloadWhileRW, IsStreamingCompatible]>; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Extended table lookup/permute -let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { -def SVTBL2 : SInst<"svtbl2[_{d}]", "d2u", "csilUcUsUiUlhfd", MergeNone>; -def SVTBX : SInst<"svtbx[_{d}]", "dddu", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tbx">; +let TargetGuard = "sve2" in { +def SVTBL2 : SInst<"svtbl2[_{d}]", "d2u", "csilUcUsUiUlhfd", MergeNone, "", [IsStreamingCompatible]>; +def SVTBX : SInst<"svtbx[_{d}]", "dddu", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tbx", [IsStreamingCompatible]>; } -let ArchGuard = "defined(__ARM_FEATURE_SVE2) && defined(__ARM_FEATURE_SVE_BF16)" in { -def SVTBL2_BF16 : SInst<"svtbl2[_{d}]", "d2u", "b", MergeNone>; -def SVTBX_BF16 : SInst<"svtbx[_{d}]", "dddu", "b", MergeNone, "aarch64_sve_tbx">; +let TargetGuard = "sve2,bf16" in { +def SVTBL2_BF16 : SInst<"svtbl2[_{d}]", "d2u", "b", MergeNone, "", [IsStreamingCompatible]>; +def SVTBX_BF16 : SInst<"svtbx[_{d}]", "dddu", "b", MergeNone, "aarch64_sve_tbx", [IsStreamingCompatible]>; } //////////////////////////////////////////////////////////////////////////////// // SVE2 - Optional -let ArchGuard = "defined(__ARM_FEATURE_SVE2_AES)" in { +let TargetGuard = "sve2-aes" in { def SVAESD : SInst<"svaesd[_{d}]", "ddd", "Uc", MergeNone, "aarch64_sve_aesd", [IsOverloadNone]>; def SVAESIMC : SInst<"svaesimc[_{d}]", "dd", "Uc", MergeNone, "aarch64_sve_aesimc", [IsOverloadNone]>; def SVAESE : SInst<"svaese[_{d}]", "ddd", "Uc", MergeNone, "aarch64_sve_aese", [IsOverloadNone]>; @@ -2064,16 +1934,16 @@ def SVPMULLT_PAIR_U64 : SInst<"svpmullt_pair[_{d}]", "ddd", "Ul", MergeNone, def SVPMULLT_PAIR_N_U64 : SInst<"svpmullt_pair[_n_{d}]", "dda", "Ul", MergeNone, "aarch64_sve_pmullt_pair">; } -let ArchGuard = "defined(__ARM_FEATURE_SVE2_SHA3)" in { +let TargetGuard = "sve2-sha3" in { def SVRAX1 : SInst<"svrax1[_{d}]", "ddd", "lUl", MergeNone, "aarch64_sve_rax1", [IsOverloadNone]>; } -let ArchGuard = "defined(__ARM_FEATURE_SVE2_SM4)" in { +let TargetGuard = "sve2-sm4" in { def SVSM4E : SInst<"svsm4e[_{d}]", "ddd", "Ui", MergeNone, "aarch64_sve_sm4e", [IsOverloadNone]>; def SVSM4EKEY : SInst<"svsm4ekey[_{d}]", "ddd", "Ui", MergeNone, "aarch64_sve_sm4ekey", [IsOverloadNone]>; } -let ArchGuard = "defined (__ARM_FEATURE_SVE2_BITPERM)" in { +let TargetGuard = "sve2-bitperm" in { def SVBDEP : SInst<"svbdep[_{d}]", "ddd", "UcUsUiUl", MergeNone, "aarch64_sve_bdep_x">; def SVBDEP_N : SInst<"svbdep[_n_{d}]", "dda", "UcUsUiUl", MergeNone, "aarch64_sve_bdep_x">; def SVBEXT : SInst<"svbext[_{d}]", "ddd", "UcUsUiUl", MergeNone, "aarch64_sve_bext_x">; @@ -2081,3 +1951,386 @@ def SVBEXT_N : SInst<"svbext[_n_{d}]", "dda", "UcUsUiUl", MergeNone, "aarch64_sv def SVBGRP : SInst<"svbgrp[_{d}]", "ddd", "UcUsUiUl", MergeNone, "aarch64_sve_bgrp_x">; def SVBGRP_N : SInst<"svbgrp[_n_{d}]", "dda", "UcUsUiUl", MergeNone, "aarch64_sve_bgrp_x">; } + +let TargetGuard = "sve2p1|sme" in { +def SVPSEL_B : SInst<"svpsel_lane_b8", "PPPm", "Pc", MergeNone, "", [IsStreamingOrSVE2p1], []>; +def SVPSEL_H : SInst<"svpsel_lane_b16", "PPPm", "Ps", MergeNone, "", [IsStreamingOrSVE2p1], []>; +def SVPSEL_S : SInst<"svpsel_lane_b32", "PPPm", "Pi", MergeNone, "", [IsStreamingOrSVE2p1], []>; +def SVPSEL_D : SInst<"svpsel_lane_b64", "PPPm", "Pl", MergeNone, "", [IsStreamingOrSVE2p1], []>; +} + +// Standalone sve2.1 builtins +let TargetGuard = "sve2p1" in { +def SVORQV : SInst<"svorqv[_{d}]", "{Pd", "csilUcUsUiUl", MergeNone, "aarch64_sve_orqv", [IsReductionQV]>; +def SVEORQV : SInst<"sveorqv[_{d}]", "{Pd", "csilUcUsUiUl", MergeNone, "aarch64_sve_eorqv", [IsReductionQV]>; +def SVADDQV : SInst<"svaddqv[_{d}]", "{Pd", "hfdcsilUcUsUiUl", MergeNone, "aarch64_sve_addqv", [IsReductionQV]>; +def SVANDQV : SInst<"svandqv[_{d}]", "{Pd", "csilUcUsUiUl", MergeNone, "aarch64_sve_andqv", [IsReductionQV]>; +def SVSMAXQV : SInst<"svmaxqv[_{d}]", "{Pd", "csil", MergeNone, "aarch64_sve_smaxqv", [IsReductionQV]>; +def SVUMAXQV : SInst<"svmaxqv[_{d}]", "{Pd", "UcUsUiUl", MergeNone, "aarch64_sve_umaxqv", [IsReductionQV]>; +def SVSMINQV : SInst<"svminqv[_{d}]", "{Pd", "csil", MergeNone, "aarch64_sve_sminqv", [IsReductionQV]>; +def SVUMINQV : SInst<"svminqv[_{d}]", "{Pd", "UcUsUiUl", MergeNone, "aarch64_sve_uminqv", [IsReductionQV]>; + +def SVFMAXNMQV: SInst<"svmaxnmqv[_{d}]", "{Pd", "hfd", MergeNone, "aarch64_sve_fmaxnmqv", [IsReductionQV]>; +def SVFMINNMQV: SInst<"svminnmqv[_{d}]", "{Pd", "hfd", MergeNone, "aarch64_sve_fminnmqv", [IsReductionQV]>; +def SVFMAXQV: SInst<"svmaxqv[_{d}]", "{Pd", "hfd", MergeNone, "aarch64_sve_fmaxqv", [IsReductionQV]>; +def SVFMINQV: SInst<"svminqv[_{d}]", "{Pd", "hfd", MergeNone, "aarch64_sve_fminqv", [IsReductionQV]>; +} + +let TargetGuard = "sve2p1|sme2" in { +def SVPEXT_SINGLE : SInst<"svpext_lane_{d}", "P}i", "QcQsQiQl", MergeNone, "aarch64_sve_pext", [IsStreamingOrSVE2p1], [ImmCheck<1, ImmCheck0_3>]>; +def SVPEXT_X2 : SInst<"svpext_lane_{d}_x2", "2.P}i", "QcQsQiQl", MergeNone, "aarch64_sve_pext_x2", [IsStreamingOrSVE2p1], [ImmCheck<1, ImmCheck0_1>]>; + +def SVPSEL_COUNT_ALIAS_B : SInst<"svpsel_lane_c8", "}}Pm", "Pc", MergeNone, "", [IsStreamingOrSVE2p1], []>; +def SVPSEL_COUNT_ALIAS_H : SInst<"svpsel_lane_c16", "}}Pm", "Ps", MergeNone, "", [IsStreamingOrSVE2p1], []>; +def SVPSEL_COUNT_ALIAS_S : SInst<"svpsel_lane_c32", "}}Pm", "Pi", MergeNone, "", [IsStreamingOrSVE2p1], []>; +def SVPSEL_COUNT_ALIAS_D : SInst<"svpsel_lane_c64", "}}Pm", "Pl", MergeNone, "", [IsStreamingOrSVE2p1], []>; + +def SVWHILEGE_COUNT : SInst<"svwhilege_{d}[_{1}]", "}lli", "QcQsQiQl", MergeNone, "aarch64_sve_whilege_{d}", [IsOverloadNone, IsStreamingOrSVE2p1], [ImmCheck<2, ImmCheck2_4_Mul2>]>; +def SVWHILEGT_COUNT : SInst<"svwhilegt_{d}[_{1}]", "}lli", "QcQsQiQl", MergeNone, "aarch64_sve_whilegt_{d}", [IsOverloadNone, IsStreamingOrSVE2p1], [ImmCheck<2, ImmCheck2_4_Mul2>]>; +def SVWHILELE_COUNT : SInst<"svwhilele_{d}[_{1}]", "}lli", "QcQsQiQl", MergeNone, "aarch64_sve_whilele_{d}", [IsOverloadNone, IsStreamingOrSVE2p1], [ImmCheck<2, ImmCheck2_4_Mul2>]>; +def SVWHILELT_COUNT : SInst<"svwhilelt_{d}[_{1}]", "}lli", "QcQsQiQl", MergeNone, "aarch64_sve_whilelt_{d}", [IsOverloadNone, IsStreamingOrSVE2p1], [ImmCheck<2, ImmCheck2_4_Mul2>]>; +def SVWHILELO_COUNT : SInst<"svwhilelt_{d}[_{1}]", "}nni", "QcQsQiQl", MergeNone, "aarch64_sve_whilelo_{d}", [IsOverloadNone, IsStreamingOrSVE2p1], [ImmCheck<2, ImmCheck2_4_Mul2>]>; +def SVWHILELS_COUNT : SInst<"svwhilele_{d}[_{1}]", "}nni", "QcQsQiQl", MergeNone, "aarch64_sve_whilels_{d}", [IsOverloadNone, IsStreamingOrSVE2p1], [ImmCheck<2, ImmCheck2_4_Mul2>]>; +def SVWHILEHI_COUNT : SInst<"svwhilegt_{d}[_{1}]", "}nni", "QcQsQiQl", MergeNone, "aarch64_sve_whilehi_{d}", [IsOverloadNone, IsStreamingOrSVE2p1], [ImmCheck<2, ImmCheck2_4_Mul2>]>; +def SVWHILEHS_COUNT : SInst<"svwhilege_{d}[_{1}]", "}nni", "QcQsQiQl", MergeNone, "aarch64_sve_whilehs_{d}", [IsOverloadNone, IsStreamingOrSVE2p1], [ImmCheck<2, ImmCheck2_4_Mul2>]>; +} + +multiclass MultiVecLoad<string i> { + def SV # NAME # B_X2 : MInst<"sv" # i # "[_{2}]_x2", "2}c", "cUc", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # H_X2 : MInst<"sv" # i # "[_{2}]_x2", "2}c", "sUshb", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # W_X2 : MInst<"sv" # i # "[_{2}]_x2", "2}c", "iUif", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # D_X2 : MInst<"sv" # i # "[_{2}]_x2", "2}c", "lUld", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # B_X4 : MInst<"sv" # i # "[_{2}]_x4", "4}c", "cUc", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; + def SV # NAME # H_X4 : MInst<"sv" # i # "[_{2}]_x4", "4}c", "sUshb", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; + def SV # NAME # W_X4 : MInst<"sv" # i # "[_{2}]_x4", "4}c", "iUif", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; + def SV # NAME # D_X4 : MInst<"sv" # i # "[_{2}]_x4", "4}c", "lUld", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; + + def SV # NAME # B_VNUM_X2 : MInst<"sv" # i # "_vnum" # "[_{2}]_x2", "2}cl", "cUc", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # H_VNUM_X2 : MInst<"sv" # i # "_vnum" # "[_{2}]_x2", "2}cl", "sUshb", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # W_VNUM_X2 : MInst<"sv" # i # "_vnum" # "[_{2}]_x2", "2}cl", "iUif", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # D_VNUM_X2 : MInst<"sv" # i # "_vnum" # "[_{2}]_x2", "2}cl", "lUld", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # B_VNUM_X4 : MInst<"sv" # i # "_vnum" # "[_{2}]_x4", "4}cl", "cUc", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; + def SV # NAME # H_VNUM_X4 : MInst<"sv" # i # "_vnum" # "[_{2}]_x4", "4}cl", "sUshb", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; + def SV # NAME # W_VNUM_X4 : MInst<"sv" # i # "_vnum" # "[_{2}]_x4", "4}cl", "iUif", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; + def SV # NAME # D_VNUM_X4 : MInst<"sv" # i # "_vnum" # "[_{2}]_x4", "4}cl", "lUld", [IsStructLoad, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; +} + +let TargetGuard = "sve2p1|sme2" in { + defm LD1 : MultiVecLoad<"ld1">; + defm LDNT1 : MultiVecLoad<"ldnt1">; +} + +multiclass MultiVecStore<string i> { + def SV # NAME # B_X2 : MInst<"sv" # i # "[_{2}_x2]", "v}p2", "cUc", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # H_X2 : MInst<"sv" # i # "[_{2}_x2]", "v}p2", "sUshb", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # W_X2 : MInst<"sv" # i # "[_{2}_x2]", "v}p2", "iUif", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # D_X2 : MInst<"sv" # i # "[_{2}_x2]", "v}p2", "lUld", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # B_X4 : MInst<"sv" # i # "[_{2}_x4]", "v}p4", "cUc", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; + def SV # NAME # H_X4 : MInst<"sv" # i # "[_{2}_x4]", "v}p4", "sUshb", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; + def SV # NAME # W_X4 : MInst<"sv" # i # "[_{2}_x4]", "v}p4", "iUif", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; + def SV # NAME # D_X4 : MInst<"sv" # i # "[_{2}_x4]", "v}p4", "lUld", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; + + def SV # NAME # B_VNUM_X2 : MInst<"sv" # i # "_vnum" # "[_{2}_x2]", "v}pl2", "cUc", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # H_VNUM_X2 : MInst<"sv" # i # "_vnum" # "[_{2}_x2]", "v}pl2", "sUshb", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # W_VNUM_X2 : MInst<"sv" # i # "_vnum" # "[_{2}_x2]", "v}pl2", "iUif", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # D_VNUM_X2 : MInst<"sv" # i # "_vnum" # "[_{2}_x2]", "v}pl2", "lUld", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x2">; + def SV # NAME # B_VNUM_X4 : MInst<"sv" # i # "_vnum" # "[_{2}_x4]", "v}pl4", "cUc", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; + def SV # NAME # H_VNUM_X4 : MInst<"sv" # i # "_vnum" # "[_{2}_x4]", "v}pl4", "sUshb", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; + def SV # NAME # W_VNUM_X4 : MInst<"sv" # i # "_vnum" # "[_{2}_x4]", "v}pl4", "iUif", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; + def SV # NAME # D_VNUM_X4 : MInst<"sv" # i # "_vnum" # "[_{2}_x4]", "v}pl4", "lUld", [IsStructStore, IsStreamingOrSVE2p1], MemEltTyDefault, "aarch64_sve_" # i # "_pn_x4">; +} + +let TargetGuard = "sve2p1|sme2" in { + defm ST1 : MultiVecStore<"st1">; + defm STNT1 : MultiVecStore<"stnt1">; +} + +let TargetGuard = "sve2p1|sme2" in { +def SVDOT_X2_S : SInst<"svdot[_{d}_{2}]", "ddhh", "i", MergeNone, "aarch64_sve_sdot_x2", [IsStreamingOrSVE2p1], []>; +def SVDOT_X2_U : SInst<"svdot[_{d}_{2}]", "ddhh", "Ui", MergeNone, "aarch64_sve_udot_x2", [IsStreamingOrSVE2p1], []>; +def SVDOT_X2_F : SInst<"svdot[_{d}_{2}]", "ddhh", "f", MergeNone, "aarch64_sve_fdot_x2", [IsStreamingOrSVE2p1], []>; +def SVDOT_LANE_X2_S : SInst<"svdot_lane[_{d}_{2}]", "ddhhi", "i", MergeNone, "aarch64_sve_sdot_lane_x2", [IsStreamingOrSVE2p1], [ImmCheck<3, ImmCheck0_3>]>; +def SVDOT_LANE_X2_U : SInst<"svdot_lane[_{d}_{2}]", "ddhhi", "Ui", MergeNone, "aarch64_sve_udot_lane_x2", [IsStreamingOrSVE2p1], [ImmCheck<3, ImmCheck0_3>]>; +def SVDOT_LANE_X2_F : SInst<"svdot_lane[_{d}_{2}]", "ddhhi", "f", MergeNone, "aarch64_sve_fdot_lane_x2", [IsStreamingOrSVE2p1], [ImmCheck<3, ImmCheck0_3>]>; +} + +let TargetGuard = "sve2p1|sme2" in { +def SVSCLAMP : SInst<"svclamp[_{d}]", "dddd", "csil", MergeNone, "aarch64_sve_sclamp", [IsStreamingOrSVE2p1], []>; +def SVUCLAMP : SInst<"svclamp[_{d}]", "dddd", "UcUsUiUl", MergeNone, "aarch64_sve_uclamp", [IsStreamingOrSVE2p1], []>; + +defm SVREVD : SInstZPZ<"svrevd", "csilUcUsUiUlbhfd", "aarch64_sve_revd">; +} + +let TargetGuard = "sve2p1|sme2" in { + def SVPTRUE_COUNT : SInst<"svptrue_{d}", "}v", "QcQsQiQl", MergeNone, "aarch64_sve_ptrue_{d}", [IsOverloadNone, IsStreamingOrSVE2p1], []>; + + def SVPFALSE_COUNT_ALIAS : SInst<"svpfalse_c", "}v", "", MergeNone, "", [IsOverloadNone, IsStreamingOrSVE2p1]>; + + def SVFCLAMP : SInst<"svclamp[_{d}]", "dddd", "hfd", MergeNone, "aarch64_sve_fclamp", [IsStreamingOrSVE2p1], []>; + def SVCNTP_COUNT : SInst<"svcntp_{d}", "n}i", "QcQsQiQl", MergeNone, "aarch64_sve_cntp_{d}", [IsOverloadNone, IsStreamingOrSVE2p1], [ImmCheck<1, ImmCheck2_4_Mul2>]>; +} + +let TargetGuard = "(sve2|sme2),b16b16" in { +defm SVMUL_BF : SInstZPZZ<"svmul", "b", "aarch64_sve_fmul", "aarch64_sve_fmul_u", [IsStreamingCompatible]>; +defm SVADD_BF : SInstZPZZ<"svadd", "b", "aarch64_sve_fadd", "aarch64_sve_fadd_u", [IsStreamingCompatible]>; +defm SVSUB_BF : SInstZPZZ<"svsub", "b", "aarch64_sve_fsub", "aarch64_sve_fsub_u", [IsStreamingCompatible]>; +defm SVMAXNM_BF : SInstZPZZ<"svmaxnm","b", "aarch64_sve_fmaxnm", "aarch64_sve_fmaxnm_u", [IsStreamingCompatible]>; +defm SVMINNM_BF : SInstZPZZ<"svminnm","b", "aarch64_sve_fminnm", "aarch64_sve_fminnm_u", [IsStreamingCompatible]>; +defm SVMAX_BF : SInstZPZZ<"svmax", "b", "aarch64_sve_fmax", "aarch64_sve_fmax_u", [IsStreamingCompatible]>; +defm SVMIN_BF : SInstZPZZ<"svmin", "b", "aarch64_sve_fmin", "aarch64_sve_fmin_u", [IsStreamingCompatible]>; +defm SVMLA_BF : SInstZPZZZ<"svmla", "b", "aarch64_sve_fmla", "aarch64_sve_fmla_u", [IsStreamingCompatible]>; +defm SVMLS_BF : SInstZPZZZ<"svmls", "b", "aarch64_sve_fmls", "aarch64_sve_fmls_u", [IsStreamingCompatible]>; +def SVMLA_LANE_BF : SInst<"svmla_lane[_{d}]", "ddddi", "b", MergeNone, "aarch64_sve_fmla_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLS_LANE_BF : SInst<"svmls_lane[_{d}]", "ddddi", "b", MergeNone, "aarch64_sve_fmls_lane", [IsStreamingCompatible], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMUL_LANE_BF : SInst<"svmul_lane[_{d}]", "dddi", "b", MergeNone, "aarch64_sve_fmul_lane", [IsStreamingCompatible], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; +def SVFCLAMP_BF : SInst<"svclamp[_{d}]", "dddd", "b", MergeNone, "aarch64_sve_fclamp", [IsStreamingCompatible], []>; +} + +// SME2 + +// SME intrinsics which operate only on vectors and do not require ZA should be added here, +// as they could possibly become SVE instructions in the future. + +multiclass MinMaxIntr<string i, string zm, string mul, string t> { + def SVS # NAME : SInst<"sv" # i # "[" # zm # "_{d}_" # mul # "]", t, "csil", MergeNone, "aarch64_sve_s" # i # zm # "_" # mul, [IsStreaming], []>; + def SVU # NAME : SInst<"sv" # i # "[" # zm # "_{d}_" # mul # "]", t, "UcUsUiUl", MergeNone, "aarch64_sve_u" # i # zm # "_" # mul, [IsStreaming], []>; + def SVF # NAME : SInst<"sv" # i # "[" # zm # "_{d}_" # mul # "]", t, "hfd", MergeNone, "aarch64_sve_f" # i # zm # "_" # mul, [IsStreaming], []>; +} + +let TargetGuard = "sme2" in { +// == SMAX / UMAX / FMAX == + defm MAX_SINGLE_X2 : MinMaxIntr<"max", "_single", "x2", "22d">; + defm MAX_MULTI_X2 : MinMaxIntr<"max", "", "x2", "222">; + defm MAX_SINGLE_X4 : MinMaxIntr<"max", "_single", "x4", "44d">; + defm MAX_MULTI_X4 : MinMaxIntr<"max", "", "x4", "444">; + +// == SMIN / UMIN / FMIN == + defm MIN_SINGLE_X2 : MinMaxIntr<"min", "_single", "x2", "22d">; + defm MIN_MULTI_X2 : MinMaxIntr<"min", "", "x2", "222">; + defm MIN_SINGLE_X4 : MinMaxIntr<"min", "_single", "x4", "44d">; + defm MIN_MULTI_X4 : MinMaxIntr<"min", "", "x4", "444">; +} + +multiclass SInstMinMaxByVector<string name> { + def NAME # _SINGLE_X2 : SInst<"sv" # name # "nm[_single_{d}_x2]", "22d", "hfd", MergeNone, "aarch64_sve_f" # name # "nm_single_x2", [IsStreaming], []>; + def NAME # _SINGLE_X4 : SInst<"sv" # name # "nm[_single_{d}_x4]", "44d", "hfd", MergeNone, "aarch64_sve_f" # name # "nm_single_x4", [IsStreaming], []>; + + def NAME # _X2 : SInst<"sv" # name # "nm[_{d}_x2]", "222", "hfd", MergeNone, "aarch64_sve_f" # name # "nm_x2", [IsStreaming], []>; + def NAME # _X4 : SInst<"sv" # name # "nm[_{d}_x4]", "444", "hfd", MergeNone, "aarch64_sve_f" # name # "nm_x4", [IsStreaming], []>; +} + +let TargetGuard = "sme2" in { +// == FMINNM / FMAXNM == + defm SVMINNM : SInstMinMaxByVector<"min">; + defm SVMAXNM : SInstMinMaxByVector<"max">; +} + +let TargetGuard = "sme2" in { + // FRINTA / FRINTM / FRINTN / FRINTP + def SVRINTA_X2 : SInst<"svrinta[_{d}_x2]", "22", "f", MergeNone, "aarch64_sve_frinta_x2", [IsStreaming], []>; + def SVRINTA_X4 : SInst<"svrinta[_{d}_x4]", "44", "f", MergeNone, "aarch64_sve_frinta_x4", [IsStreaming], []>; + + def SVRINTM_X2 : SInst<"svrintm[_{d}_x2]", "22", "f", MergeNone, "aarch64_sve_frintm_x2", [IsStreaming], []>; + def SVRINTM_X4 : SInst<"svrintm[_{d}_x4]", "44", "f", MergeNone, "aarch64_sve_frintm_x4", [IsStreaming], []>; + + def SVRINTN_X2 : SInst<"svrintn[_{d}_x2]", "22", "f", MergeNone, "aarch64_sve_frintn_x2", [IsStreaming], []>; + def SVRINTN_X4 : SInst<"svrintn[_{d}_x4]", "44", "f", MergeNone, "aarch64_sve_frintn_x4", [IsStreaming], []>; + + def SVRINTP_X2 : SInst<"svrintp[_{d}_x2]", "22", "f", MergeNone, "aarch64_sve_frintp_x2", [IsStreaming], []>; + def SVRINTP_X4 : SInst<"svrintp[_{d}_x4]", "44", "f", MergeNone, "aarch64_sve_frintp_x4", [IsStreaming], []>; +} + +let TargetGuard = "sme2" in { + def SVSCLAMP_X2 : SInst<"svclamp[_single_{d}_x2]", "22dd", "csil", MergeNone, "aarch64_sve_sclamp_single_x2", [IsStreaming], []>; + def SVUCLAMP_X2 : SInst<"svclamp[_single_{d}_x2]", "22dd", "UcUsUiUl", MergeNone, "aarch64_sve_uclamp_single_x2", [IsStreaming], []>; + def SVFCLAMP_X2 : SInst<"svclamp[_single_{d}_x2]", "22dd", "hfd", MergeNone, "aarch64_sve_fclamp_single_x2", [IsStreaming], []>; + + def SVSCLAMP_X4 : SInst<"svclamp[_single_{d}_x4]", "44dd", "csil", MergeNone, "aarch64_sve_sclamp_single_x4", [IsStreaming], []>; + def SVUCLAMP_X4 : SInst<"svclamp[_single_{d}_x4]", "44dd", "UcUsUiUl", MergeNone, "aarch64_sve_uclamp_single_x4", [IsStreaming], []>; + def SVFCLAMP_X4 : SInst<"svclamp[_single_{d}_x4]", "44dd", "hfd", MergeNone, "aarch64_sve_fclamp_single_x4", [IsStreaming], []>; +} + +let TargetGuard = "sme2" in { +// == ADD (vectors) == + def SVADD_SINGLE_X2 : SInst<"svadd[_single_{d}_x2]", "22d", "cUcsUsiUilUl", MergeNone, "aarch64_sve_add_single_x2", [IsStreaming], []>; + def SVADD_SINGLE_X4 : SInst<"svadd[_single_{d}_x4]", "44d", "cUcsUsiUilUl", MergeNone, "aarch64_sve_add_single_x4", [IsStreaming], []>; + + // 2-way and 4-way selects + def SVSEL_X2 : SInst<"svsel[_{d}_x2]", "2}22", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_sel_x2", [IsStreaming], []>; + def SVSEL_X4 : SInst<"svsel[_{d}_x4]", "4}44", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_sel_x4", [IsStreaming], []>; + + // SRSHL / URSHL + def SVSRSHL_SINGLE_X2 : SInst<"svrshl[_single_{d}_x2]", "22d", "csil", MergeNone, "aarch64_sve_srshl_single_x2", [IsStreaming], []>; + def SVURSHL_SINGLE_X2 : SInst<"svrshl[_single_{d}_x2]", "22d", "UcUsUiUl", MergeNone, "aarch64_sve_urshl_single_x2", [IsStreaming], []>; + def SVSRSHL_SINGLE_X4 : SInst<"svrshl[_single_{d}_x4]", "44d", "csil", MergeNone, "aarch64_sve_srshl_single_x4", [IsStreaming], []>; + def SVURSHL_SINGLE_X4 : SInst<"svrshl[_single_{d}_x4]", "44d", "UcUsUiUl", MergeNone, "aarch64_sve_urshl_single_x4", [IsStreaming], []>; + + def SVSRSHL_X2 : SInst<"svrshl[_{d}_x2]", "222", "csil", MergeNone, "aarch64_sve_srshl_x2", [IsStreaming], []>; + def SVURSHL_X2 : SInst<"svrshl[_{d}_x2]", "222", "UcUsUiUl", MergeNone, "aarch64_sve_urshl_x2", [IsStreaming], []>; + def SVSRSHL_X4 : SInst<"svrshl[_{d}_x4]", "444", "csil", MergeNone, "aarch64_sve_srshl_x4", [IsStreaming], []>; + def SVURSHL_X4 : SInst<"svrshl[_{d}_x4]", "444", "UcUsUiUl", MergeNone, "aarch64_sve_urshl_x4", [IsStreaming], []>; + + def SVQRSHRN_X4 : SInst<"svqrshrn[_n]_{0}[_{d}_x4]", "q4i", "il", MergeNone, "aarch64_sve_sqrshrn_x4", [IsStreaming], [ImmCheck<1, ImmCheckShiftRight, 0>]>; + def SVUQRSHRN_X4 : SInst<"svqrshrn[_n]_{0}[_{d}_x4]", "b4i", "UiUl", MergeNone, "aarch64_sve_uqrshrn_x4", [IsStreaming], [ImmCheck<1, ImmCheckShiftRight, 0>]>; + + // SQRSHR / UQRSHR + def SVQRSHR_X2 : SInst<"svqrshr[_n]_{0}[_{d}_x2]", "h2i", "i", MergeNone, "aarch64_sve_sqrshr_x2", [IsStreaming], [ImmCheck<1, ImmCheck1_16>]>; + def SVUQRSHR_X2 : SInst<"svqrshr[_n]_{0}[_{d}_x2]", "e2i", "Ui", MergeNone, "aarch64_sve_uqrshr_x2", [IsStreaming], [ImmCheck<1, ImmCheck1_16>]>; + def SVQRSHR_X4 : SInst<"svqrshr[_n]_{0}[_{d}_x4]", "q4i", "il", MergeNone, "aarch64_sve_sqrshr_x4", [IsStreaming], [ImmCheck<1, ImmCheckShiftRight, 0>]>; + def SVUQRSHR_X4 : SInst<"svqrshr[_n]_{0}[_{d}_x4]", "b4i", "UiUl", MergeNone, "aarch64_sve_uqrshr_x4", [IsStreaming], [ImmCheck<1, ImmCheckShiftRight, 0>]>; + + // SQRSHRU + def SVSQRSHRU_X2 : SInst<"svqrshru[_n]_{0}[_{d}_x2]", "e2i", "i", MergeNone, "aarch64_sve_sqrshru_x2", [IsStreaming], [ImmCheck<1, ImmCheck1_16>]>; + def SVSQRSHRU_X4 : SInst<"svqrshru[_n]_{0}[_{d}_x4]", "b4i", "il", MergeNone, "aarch64_sve_sqrshru_x4", [IsStreaming], [ImmCheck<1, ImmCheckShiftRight, 0>]>; + + def SVSQRSHRUN_X4 : SInst<"svqrshrun[_n]_{0}[_{d}_x4]", "b4i", "il", MergeNone, "aarch64_sve_sqrshrun_x4", [IsStreaming], [ImmCheck<1, ImmCheckShiftRight, 0>]>; + + def REINTERPRET_SVBOOL_TO_SVCOUNT : Inst<"svreinterpret[_c]", "}P", "Pc", MergeNone, "", [IsStreamingCompatible], []>; + def REINTERPRET_SVCOUNT_TO_SVBOOL : Inst<"svreinterpret[_b]", "P}", "Pc", MergeNone, "", [IsStreamingCompatible], []>; + + // SQDMULH + def SVSQDMULH_SINGLE_X2 : SInst<"svqdmulh[_single_{d}_x2]", "22d", "csil", MergeNone, "aarch64_sve_sqdmulh_single_vgx2", [IsStreaming], []>; + def SVSQDMULH_SINGLE_X4 : SInst<"svqdmulh[_single_{d}_x4]", "44d", "csil", MergeNone, "aarch64_sve_sqdmulh_single_vgx4", [IsStreaming], []>; + def SVSQDMULH_X2 : SInst<"svqdmulh[_{d}_x2]", "222", "csil", MergeNone, "aarch64_sve_sqdmulh_vgx2", [IsStreaming], []>; + def SVSQDMULH_X4 : SInst<"svqdmulh[_{d}_x4]", "444", "csil", MergeNone, "aarch64_sve_sqdmulh_vgx4", [IsStreaming], []>; +} + +let TargetGuard = "sve2p1|sme2" in { + // SQRSHRN / UQRSHRN + def SVQRSHRN_X2 : SInst<"svqrshrn[_n]_{0}[_{d}_x2]", "h2i", "i", MergeNone, "aarch64_sve_sqrshrn_x2", [IsStreamingCompatible], [ImmCheck<1, ImmCheck1_16>]>; + def SVUQRSHRN_X2 : SInst<"svqrshrn[_n]_{0}[_{d}_x2]", "e2i", "Ui", MergeNone, "aarch64_sve_uqrshrn_x2", [IsStreamingCompatible], [ImmCheck<1, ImmCheck1_16>]>; + + // SQRSHRUN + def SVSQRSHRUN_X2 : SInst<"svqrshrun[_n]_{0}[_{d}_x2]", "e2i", "i", MergeNone, "aarch64_sve_sqrshrun_x2", [IsStreamingCompatible], [ImmCheck<1, ImmCheck1_16>]>; +} + +let TargetGuard = "sve2p1" in { + // ZIPQ1, ZIPQ2, UZPQ1, UZPQ2 + def SVZIPQ1 : SInst<"svzipq1[_{d}]", "ddd", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_zipq1", [], []>; + def SVZIPQ2 : SInst<"svzipq2[_{d}]", "ddd", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_zipq2", [], []>; + def SVUZPQ1 : SInst<"svuzpq1[_{d}]", "ddd", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_uzpq1", [], []>; + def SVUZPQ2 : SInst<"svuzpq2[_{d}]", "ddd", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_uzpq2", [], []>; + // TBLQ, TBXQ + def SVTBLQ : SInst<"svtblq[_{d}]", "ddu", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_tblq">; + def SVTBXQ : SInst<"svtbxq[_{d}]", "dddu", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_tbxq">; + // EXTQ + def EXTQ : SInst<"svextq[_{d}]", "dddk", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_extq", [], [ImmCheck<2, ImmCheck0_15>]>; + // PMOV + // Move to Pred + multiclass PMOV_TO_PRED<string name, string types, string intrinsic, list<FlagType> flags=[], ImmCheckType immCh > { + def _LANE : Inst<name # "_lane[_{d}]", "Pdi", types, MergeNone, intrinsic, flags, [ImmCheck<1, immCh>]>; + def _LANE_ZERO : SInst<name # "[_{d}]", "Pd", types, MergeNone, intrinsic # "_zero", flags, []>; + } + defm SVPMOV_B_TO_PRED : PMOV_TO_PRED<"svpmov", "cUc", "aarch64_sve_pmov_to_pred_lane", [], ImmCheck0_0>; + defm SVPMOV_H_TO_PRED : PMOV_TO_PRED<"svpmov", "sUs", "aarch64_sve_pmov_to_pred_lane", [], ImmCheck0_1>; + defm SVPMOV_S_TO_PRED : PMOV_TO_PRED<"svpmov", "iUi", "aarch64_sve_pmov_to_pred_lane", [], ImmCheck0_3>; + defm SVPMOV_D_TO_PRED : PMOV_TO_PRED<"svpmov", "lUl", "aarch64_sve_pmov_to_pred_lane", [], ImmCheck0_7>; + + // Move to Vector + multiclass PMOV_TO_VEC<string name, string types, string intrinsic, list<FlagType> flags=[], ImmCheckType immCh > { + def _M : SInst<name # "_lane[_{d}]", "ddPi", types, MergeOp1, intrinsic # "_merging", flags, [ImmCheck<2, immCh>]>; + def _Z : SInst<name # "_{d}_z", "dP", types, MergeNone, intrinsic # "_zeroing", flags, []>; + } + def SVPMOV_TO_VEC_LANE_B : SInst<"svpmov_{d}_z", "dP", "cUc", MergeNone, "aarch64_sve_pmov_to_vector_lane_zeroing", [], []>; + defm SVPMOV_TO_VEC_LANE_H : PMOV_TO_VEC<"svpmov", "sUs", "aarch64_sve_pmov_to_vector_lane", [], ImmCheck1_1>; + defm SVPMOV_TO_VEC_LANE_S : PMOV_TO_VEC<"svpmov", "iUi", "aarch64_sve_pmov_to_vector_lane", [], ImmCheck1_3>; + defm SVPMOV_TO_VEC_LANE_D : PMOV_TO_VEC<"svpmov", "lUl", "aarch64_sve_pmov_to_vector_lane" ,[], ImmCheck1_7>; +} + +// +// Multi-vector convert to/from floating-point. +// +let TargetGuard = "sme2" in { + def SVCVT_F16_X2 : SInst<"svcvt_f16[_f32_x2]", "e2", "f", MergeNone, "aarch64_sve_fcvt_x2", [IsStreaming],[]>; + def SVCVT_BF16_X2 : SInst<"svcvt_bf16[_f32_x2]", "$2", "f", MergeNone, "aarch64_sve_bfcvt_x2", [IsOverloadNone, IsStreaming],[]>; + + def SVCVT_F32_U32_X2 : SInst<"svcvt_{d}[_u32_x2]", "2.d2.u", "f", MergeNone, "aarch64_sve_ucvtf_x2", [IsStreaming, IsOverloadWhileOrMultiVecCvt], []>; + def SVCVT_U32_F32_X2 : SInst<"svcvt_{d}[_f32_x2]", "2.d2.M", "Ui", MergeNone, "aarch64_sve_fcvtzu_x2", [IsStreaming, IsOverloadWhileOrMultiVecCvt], []>; + def SVCVT_F32_S32_X2 : SInst<"svcvt_{d}[_s32_x2]", "2.d2.x", "f", MergeNone, "aarch64_sve_scvtf_x2", [IsStreaming, IsOverloadWhileOrMultiVecCvt], []>; + def SVCVT_S32_F32_X2 : SInst<"svcvt_{d}[_f32_x2]", "2.d2.M", "i", MergeNone, "aarch64_sve_fcvtzs_x2", [IsStreaming, IsOverloadWhileOrMultiVecCvt], []>; + + def SVCVT_F32_U32_X4 : SInst<"svcvt_{d}[_u32_x4]", "4.d4.u", "f", MergeNone, "aarch64_sve_ucvtf_x4", [IsStreaming, IsOverloadWhileOrMultiVecCvt], []>; + def SVCVT_U32_F32_X4 : SInst<"svcvt_{d}[_f32_x4]", "4.d4.M", "Ui", MergeNone, "aarch64_sve_fcvtzu_x4", [IsStreaming, IsOverloadWhileOrMultiVecCvt], []>; + def SVCVT_F32_S32_X4 : SInst<"svcvt_{d}[_s32_x4]", "4.d4.x", "f", MergeNone, "aarch64_sve_scvtf_x4", [IsStreaming, IsOverloadWhileOrMultiVecCvt], []>; + def SVCVT_S32_F32_X4 : SInst<"svcvt_{d}[_f32_x4]", "4.d4.M", "i", MergeNone, "aarch64_sve_fcvtzs_x4", [IsStreaming, IsOverloadWhileOrMultiVecCvt], []>; +} + +// +// Multi-vector floating-point convert from single-precision to interleaved half-precision/BFloat16 +// +let TargetGuard = "sme2" in { + def SVCVTN_F16_X2 : SInst<"svcvtn_f16[_f32_x2]", "e2", "f", MergeNone, "aarch64_sve_fcvtn_x2", [IsStreaming],[]>; + def SVCVTN_BF16_X2 : SInst<"svcvtn_bf16[_f32_x2]", "$2", "f", MergeNone, "aarch64_sve_bfcvtn_x2", [IsOverloadNone, IsStreaming],[]>; +} + +// +// Multi-vector saturating extract narrow +// +let TargetGuard = "sme2" in { + def SVQCVT_S16_S32_X2 : SInst<"svqcvt_s16[_{d}_x2]", "h2.d", "i", MergeNone, "aarch64_sve_sqcvt_x2", [IsStreaming], []>; + def SVQCVT_U16_U32_X2 : SInst<"svqcvt_u16[_{d}_x2]", "e2.d", "Ui", MergeNone, "aarch64_sve_uqcvt_x2", [IsStreaming], []>; + def SVQCVT_U16_S32_X2 : SInst<"svqcvt_u16[_{d}_x2]", "e2.d", "i", MergeNone, "aarch64_sve_sqcvtu_x2", [IsStreaming], []>; + + def SVQCVT_S8_S32_X4 : SInst<"svqcvt_s8[_{d}_x4]", "q4.d", "i", MergeNone, "aarch64_sve_sqcvt_x4", [IsStreaming], []>; + def SVQCVT_U8_U32_X4 : SInst<"svqcvt_u8[_{d}_x4]", "b4.d", "Ui", MergeNone, "aarch64_sve_uqcvt_x4", [IsStreaming], []>; + def SVQCVT_U8_S32_X4 : SInst<"svqcvt_u8[_{d}_x4]", "b4.d", "i", MergeNone, "aarch64_sve_sqcvtu_x4", [IsStreaming], []>; + + def SVQCVT_S16_S64_X4 : SInst<"svqcvt_s16[_{d}_x4]", "q4.d", "l", MergeNone, "aarch64_sve_sqcvt_x4", [IsStreaming], []>; + def SVQCVT_U16_U64_X4 : SInst<"svqcvt_u16[_{d}_x4]", "b4.d", "Ul", MergeNone, "aarch64_sve_uqcvt_x4", [IsStreaming], []>; + def SVQCVT_U16_S64_X4 : SInst<"svqcvt_u16[_{d}_x4]", "b4.d", "l", MergeNone, "aarch64_sve_sqcvtu_x4", [IsStreaming], []>; +} + +// +// Multi-vector saturating extract narrow and interleave +// +let TargetGuard = "sme2|sve2p1" in { + def SVQCVTN_S16_S32_X2 : SInst<"svqcvtn_s16[_{d}_x2]", "h2.d", "i", MergeNone, "aarch64_sve_sqcvtn_x2", [IsStreamingCompatible], []>; + def SVQCVTN_U16_U32_X2 : SInst<"svqcvtn_u16[_{d}_x2]", "e2.d", "Ui", MergeNone, "aarch64_sve_uqcvtn_x2", [IsStreamingCompatible], []>; + def SVQCVTN_U16_S32_X2 : SInst<"svqcvtn_u16[_{d}_x2]", "e2.d", "i", MergeNone, "aarch64_sve_sqcvtun_x2", [IsStreamingCompatible], []>; +} + +let TargetGuard = "sme2" in { + def SVQCVTN_S8_S32_X4 : SInst<"svqcvtn_s8[_{d}_x4]", "q4.d", "i", MergeNone, "aarch64_sve_sqcvtn_x4", [IsStreaming], []>; + def SVQCVTN_U8_U32_X4 : SInst<"svqcvtn_u8[_{d}_x4]", "b4.d", "Ui", MergeNone, "aarch64_sve_uqcvtn_x4", [IsStreaming], []>; + def SVQCVTN_U8_S32_X4 : SInst<"svqcvtn_u8[_{d}_x4]", "b4.d", "i", MergeNone, "aarch64_sve_sqcvtun_x4", [IsStreaming], []>; + + def SVQCVTN_S16_S64_X4 : SInst<"svqcvtn_s16[_{d}_x4]", "q4.d", "l", MergeNone, "aarch64_sve_sqcvtn_x4", [IsStreaming], []>; + def SVQCVTN_U16_U64_X4 : SInst<"svqcvtn_u16[_{d}_x4]", "b4.d", "Ul", MergeNone, "aarch64_sve_uqcvtn_x4", [IsStreaming], []>; + def SVQCVTN_U16_S64_X4 : SInst<"svqcvtn_u16[_{d}_x4]", "b4.d", "l", MergeNone, "aarch64_sve_sqcvtun_x4", [IsStreaming], []>; +} + +// +// Multi-vector zip/unzip +// + +let TargetGuard = "sme2" in { + def SVZIP_X2 : SInst<"svzip[_{d}_x2]", "22", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_zip_x2", [IsStreaming], []>; + def SVZIPQ_X2 : SInst<"svzipq[_{d}_x2]", "22", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_zipq_x2", [IsStreaming], []>; + def SVZIP_X4 : SInst<"svzip[_{d}_x4]", "44", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_zip_x4", [IsStreaming], []>; + def SVZIPQ_X4 : SInst<"svzipq[_{d}_x4]", "44", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_zipq_x4", [IsStreaming], []>; + + def SVUZP_X2 : SInst<"svuzp[_{d}_x2]", "22", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_uzp_x2", [IsStreaming], []>; + def SVUZPQ_X2 : SInst<"svuzpq[_{d}_x2]", "22", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_uzpq_x2", [IsStreaming], []>; + def SVUZP_X4 : SInst<"svuzp[_{d}_x4]", "44", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_uzp_x4", [IsStreaming], []>; + def SVUZPQ_X4 : SInst<"svuzpq[_{d}_x4]", "44", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_uzpq_x4", [IsStreaming], []>; +} + +// +// Multi-vector unpack +// + +let TargetGuard = "sme2" in { + def SVSUNPK_X2 : SInst<"svunpk_{d}[_{1}_x2]", "2h", "sil", MergeNone, "aarch64_sve_sunpk_x2", [IsStreaming], []>; + def SVUUNPK_X2 : SInst<"svunpk_{d}[_{1}_x2]", "2h", "UsUiUl", MergeNone, "aarch64_sve_uunpk_x2", [IsStreaming], []>; + def SVSUNPK_X4 : SInst<"svunpk_{d}[_{3}_x4]", "42.h", "sil", MergeNone, "aarch64_sve_sunpk_x4", [IsStreaming], []>; + def SVUUNPK_X4 : SInst<"svunpk_{d}[_{3}_x4]", "42.h", "UsUiUl", MergeNone, "aarch64_sve_uunpk_x4", [IsStreaming], []>; +} + +let TargetGuard = "sve2p1|sme2" in { +// == BFloat16 multiply-subtract == + def SVBFMLSLB : SInst<"svbfmlslb[_{d}]", "dd$$", "f", MergeNone, "aarch64_sve_bfmlslb", [IsOverloadNone, IsStreamingOrSVE2p1], []>; + def SVBFMLSLT : SInst<"svbfmlslt[_{d}]", "dd$$", "f", MergeNone, "aarch64_sve_bfmlslt", [IsOverloadNone, IsStreamingOrSVE2p1], []>; + + def SVBFMLSLB_LANE : SInst<"svbfmlslb_lane[_{d}]", "dd$$i", "f", MergeNone, "aarch64_sve_bfmlslb_lane", [IsOverloadNone, IsStreamingOrSVE2p1], [ImmCheck<3, ImmCheck0_7>]>; + def SVBFMLSLT_LANE : SInst<"svbfmlslt_lane[_{d}]", "dd$$i", "f", MergeNone, "aarch64_sve_bfmlslt_lane", [IsOverloadNone, IsStreamingOrSVE2p1], [ImmCheck<3, ImmCheck0_7>]>; +} diff --git a/contrib/llvm-project/clang/include/clang/Basic/arm_sve_sme_incl.td b/contrib/llvm-project/clang/include/clang/Basic/arm_sve_sme_incl.td new file mode 100644 index 000000000000..9a6ea9898ef7 --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/arm_sve_sme_incl.td @@ -0,0 +1,295 @@ +//===--- arm_sve_sme_incl.td - ARM SVE/SME compiler interface -------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines common properites of TableGen definitions use for both +// SVE and SME intrinsics. +// +// https://developer.arm.com/architectures/system-architectures/software-standards/acle +// +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +// Instruction definitions +//===----------------------------------------------------------------------===// +// Every intrinsic subclasses "Inst". An intrinsic has a name, a prototype and +// a sequence of typespecs. +// +// The name is the base name of the intrinsic, for example "svld1". This is +// then mangled by the tblgen backend to add type information ("svld1_s16"). +// +// A typespec is a sequence of uppercase characters (modifiers) followed by one +// lowercase character. A typespec encodes a particular "base type" of the +// intrinsic. +// +// An example typespec is "Us" - unsigned short - svuint16_t. The available +// typespec codes are given below. +// +// The string given to an Inst class is a sequence of typespecs. The intrinsic +// is instantiated for every typespec in the sequence. For example "sdUsUd". +// +// The prototype is a string that defines the return type of the intrinsic +// and the type of each argument. The return type and every argument gets a +// "modifier" that can change in some way the "base type" of the intrinsic. +// +// The modifier 'd' means "default" and does not modify the base type in any +// way. The available modifiers are given below. +// +// Typespecs +// --------- +// c: char +// s: short +// i: int +// l: long +// q: int128_t +// f: float +// h: half-float +// d: double +// b: bfloat + +// Typespec modifiers +// ------------------ +// P: boolean +// U: unsigned +// Q: svcount + +// Prototype modifiers +// ------------------- +// prototype: return (arg, arg, ...) +// +// 2,3,4: array of vectors +// .: indicator for multi-vector modifier that will follow (e.g. 2.x) +// v: void +// x: vector of signed integers +// u: vector of unsigned integers +// d: default +// c: const pointer type +// P: predicate type +// s: scalar of element type +// a: scalar of element type (splat to vector type) +// R: scalar of 1/2 width element type (splat to vector type) +// r: scalar of 1/4 width element type (splat to vector type) +// @: unsigned scalar of 1/4 width element type (splat to vector type) +// e: 1/2 width unsigned elements, 2x element count +// b: 1/4 width unsigned elements, 4x element count +// h: 1/2 width elements, 2x element count +// q: 1/4 width elements, 4x element count +// o: 4x width elements, 1/4 element count +// +// w: vector of element type promoted to 64bits, vector maintains +// signedness of its element type. +// f: element type promoted to uint64_t (splat to vector type) +// j: element type promoted to 64bits (splat to vector type) +// K: element type bitcast to a signed integer (splat to vector type) +// L: element type bitcast to an unsigned integer (splat to vector type) +// +// i: constant uint64_t +// k: int32_t +// l: int64_t +// m: uint32_t +// n: uint64_t + +// [: svuint8_t +// t: svint32_t +// z: svuint32_t +// g: svuint64_t +// O: svfloat16_t +// M: svfloat32_t +// N: svfloat64_t +// $: svbfloat16_t + +// J: Prefetch type (sv_prfop) + +// %: pointer to void + +// A: pointer to int8_t +// B: pointer to int16_t +// C: pointer to int32_t +// D: pointer to int64_t + +// E: pointer to uint8_t +// F: pointer to uint16_t +// G: pointer to uint32_t +// H: pointer to uint64_t + +// Q: const pointer to void + +// S: const pointer to int8_t +// T: const pointer to int16_t +// U: const pointer to int32_t +// V: const pointer to int64_t +// +// W: const pointer to uint8_t +// X: const pointer to uint16_t +// Y: const pointer to uint32_t +// Z: const pointer to uint64_t + +// Prototype modifiers added for SVE2p1 +// {: 128b vector +// }: svcount_t + +class MergeType<int val, string suffix=""> { + int Value = val; + string Suffix = suffix; +} +def MergeNone : MergeType<0>; +def MergeAny : MergeType<1, "_x">; +def MergeOp1 : MergeType<2, "_m">; +def MergeZero : MergeType<3, "_z">; +def MergeAnyExp : MergeType<4, "_x">; // Use merged builtin with explicit +def MergeZeroExp : MergeType<5, "_z">; // generation of its inactive argument. + +class EltType<int val> { + int Value = val; +} +def EltTyInvalid : EltType<0>; +def EltTyInt8 : EltType<1>; +def EltTyInt16 : EltType<2>; +def EltTyInt32 : EltType<3>; +def EltTyInt64 : EltType<4>; +def EltTyInt128 : EltType<5>; +def EltTyFloat16 : EltType<6>; +def EltTyFloat32 : EltType<7>; +def EltTyFloat64 : EltType<8>; +def EltTyBool8 : EltType<9>; +def EltTyBool16 : EltType<10>; +def EltTyBool32 : EltType<11>; +def EltTyBool64 : EltType<12>; +def EltTyBFloat16 : EltType<13>; + +class MemEltType<int val> { + int Value = val; +} +def MemEltTyDefault : MemEltType<0>; +def MemEltTyInt8 : MemEltType<1>; +def MemEltTyInt16 : MemEltType<2>; +def MemEltTyInt32 : MemEltType<3>; +def MemEltTyInt64 : MemEltType<4>; + +class FlagType<int val> { + int Value = val; +} + +// These must be kept in sync with the flags in utils/TableGen/SveEmitter.h +// and include/clang/Basic/TargetBuiltins.h +def NoFlags : FlagType<0x00000000>; +def FirstEltType : FlagType<0x00000001>; +// : : +// : : +def EltTypeMask : FlagType<0x0000000f>; +def FirstMemEltType : FlagType<0x00000010>; +// : : +// : : +def MemEltTypeMask : FlagType<0x00000070>; +def FirstMergeTypeMask : FlagType<0x00000080>; +// : : +// : : +def MergeTypeMask : FlagType<0x00000380>; +def FirstSplatOperand : FlagType<0x00000400>; +// : : +// These flags are used to specify which scalar operand +// needs to be duplicated/splatted into a vector. +// : : +def SplatOperandMask : FlagType<0x00001C00>; +def IsLoad : FlagType<0x00002000>; +def IsStore : FlagType<0x00004000>; +def IsGatherLoad : FlagType<0x00008000>; +def IsScatterStore : FlagType<0x00010000>; +def IsStructLoad : FlagType<0x00020000>; +def IsStructStore : FlagType<0x00040000>; +def IsZExtReturn : FlagType<0x00080000>; // Return value is sign-extend by default +def IsOverloadNone : FlagType<0x00100000>; // Intrinsic does not take any overloaded types. +def IsOverloadWhileOrMultiVecCvt : FlagType<0x00200000>; // Use {default type, typeof(operand1)} as overloaded types. +def IsOverloadWhileRW : FlagType<0x00400000>; // Use {pred(default type), typeof(operand0)} as overloaded types. +def IsOverloadCvt : FlagType<0x00800000>; // Use {typeof(operand0), typeof(last operand)} as overloaded types. +def OverloadKindMask : FlagType<0x00E00000>; // When the masked values are all '0', the default type is used as overload type. +def IsByteIndexed : FlagType<0x01000000>; +def IsAppendSVALL : FlagType<0x02000000>; // Appends SV_ALL as the last operand. +def IsInsertOp1SVALL : FlagType<0x04000000>; // Inserts SV_ALL as the second operand. +def IsPrefetch : FlagType<0x08000000>; // Contiguous prefetches. +def IsGatherPrefetch : FlagType<0x10000000>; +def ReverseCompare : FlagType<0x20000000>; // Compare operands must be swapped. +def ReverseUSDOT : FlagType<0x40000000>; // Unsigned/signed operands must be swapped. +def IsUndef : FlagType<0x80000000>; // Codegen `undef` of given type. +def IsTupleCreate : FlagType<0x100000000>; +def IsTupleGet : FlagType<0x200000000>; +def IsTupleSet : FlagType<0x400000000>; +def ReverseMergeAnyBinOp : FlagType<0x800000000>; // e.g. Implement SUBR_X using SUB_X. +def ReverseMergeAnyAccOp : FlagType<0x1000000000>; // e.g. Implement MSB_X using MLS_X. +def IsStreaming : FlagType<0x2000000000>; +def IsStreamingCompatible : FlagType<0x4000000000>; +def IsReadZA : FlagType<0x8000000000>; +def IsWriteZA : FlagType<0x10000000000>; +def IsReductionQV : FlagType<0x20000000000>; +def IsStreamingOrSVE2p1 : FlagType<0x40000000000>; // Use for intrinsics that are common between sme/sme2 and sve2p1. +def IsInZA : FlagType<0x80000000000>; +def IsOutZA : FlagType<0x100000000000>; +def IsInOutZA : FlagType<0x200000000000>; +def IsInZT0 : FlagType<0x400000000000>; +def IsOutZT0 : FlagType<0x800000000000>; +def IsInOutZT0 : FlagType<0x1000000000000>; + +// These must be kept in sync with the flags in include/clang/Basic/TargetBuiltins.h +class ImmCheckType<int val> { + int Value = val; +} +def ImmCheck0_31 : ImmCheckType<0>; // 0..31 (used for e.g. predicate patterns) +def ImmCheck1_16 : ImmCheckType<1>; // 1..16 +def ImmCheckExtract : ImmCheckType<2>; // 0..(2048/sizeinbits(elt) - 1) +def ImmCheckShiftRight : ImmCheckType<3>; // 1..sizeinbits(elt) +def ImmCheckShiftRightNarrow : ImmCheckType<4>; // 1..sizeinbits(elt)/2 +def ImmCheckShiftLeft : ImmCheckType<5>; // 0..(sizeinbits(elt) - 1) +def ImmCheck0_7 : ImmCheckType<6>; // 0..7 +def ImmCheckLaneIndex : ImmCheckType<7>; // 0..(128/(1*sizeinbits(elt)) - 1) +def ImmCheckLaneIndexCompRotate : ImmCheckType<8>; // 0..(128/(2*sizeinbits(elt)) - 1) +def ImmCheckLaneIndexDot : ImmCheckType<9>; // 0..(128/(4*sizeinbits(elt)) - 1) +def ImmCheckComplexRot90_270 : ImmCheckType<10>; // [90,270] +def ImmCheckComplexRotAll90 : ImmCheckType<11>; // [0, 90, 180,270] +def ImmCheck0_13 : ImmCheckType<12>; // 0..13 +def ImmCheck0_1 : ImmCheckType<13>; // 0..1 +def ImmCheck0_2 : ImmCheckType<14>; // 0..2 +def ImmCheck0_3 : ImmCheckType<15>; // 0..3 +def ImmCheck0_0 : ImmCheckType<16>; // 0..0 +def ImmCheck0_15 : ImmCheckType<17>; // 0..15 +def ImmCheck0_255 : ImmCheckType<18>; // 0..255 +def ImmCheck2_4_Mul2 : ImmCheckType<19>; // 2, 4 +def ImmCheck1_1 : ImmCheckType<20>; // 1..1 +def ImmCheck1_3 : ImmCheckType<21>; // 1..3 +def ImmCheck1_7 : ImmCheckType<22>; // 1..7 + +class ImmCheck<int arg, ImmCheckType kind, int eltSizeArg = -1> { + int Arg = arg; + int EltSizeArg = eltSizeArg; + ImmCheckType Kind = kind; +} + +class Inst<string n, string p, string t, MergeType mt, string i, + list<FlagType> ft, list<ImmCheck> ch, MemEltType met = MemEltTyDefault> { + string Name = n; + string Prototype = p; + string Types = t; + string TargetGuard = "sve"; + int Merge = mt.Value; + string MergeSuffix = mt.Suffix; + string LLVMIntrinsic = i; + list<FlagType> Flags = ft; + list<ImmCheck> ImmChecks = ch; + int MemEltType = met.Value; +} + +// SInst: Instruction with signed/unsigned suffix (e.g., "s8", "u8") +class SInst<string n, string p, string t, MergeType mt, string i = "", + list<FlagType> ft = [], list<ImmCheck> ch = []> + : Inst<n, p, t, mt, i, ft, ch, MemEltTyDefault> { +} + +// MInst: Instructions which access memory +class MInst<string n, string p, string t, list<FlagType> f, + MemEltType met = MemEltTyDefault, string i = "", + list<ImmCheck> ch = []> + : Inst<n, p, t, MergeNone, i, f, ch, met> { +} diff --git a/contrib/llvm-project/clang/include/clang/Basic/riscv_sifive_vector.td b/contrib/llvm-project/clang/include/clang/Basic/riscv_sifive_vector.td new file mode 100644 index 000000000000..ef5114d6105e --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/riscv_sifive_vector.td @@ -0,0 +1,211 @@ +//==--- riscv_sifive_vector.td - RISC-V SiFive VCIX function list ---------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the builtins for RISC-V SiFive VCIX. See: +// +// https://sifive.cdn.prismic.io/sifive/c3829e36-8552-41f0-a841-79945784241b_vcix-spec-software.pdf +// +//===----------------------------------------------------------------------===// + +include "riscv_vector_common.td" + +//===----------------------------------------------------------------------===// +// Instruction definitions +//===----------------------------------------------------------------------===// + +class VCIXSuffix<string range> { + list<string> suffix = !cond(!eq(range, "c"): ["8mf8", "8mf4", "8mf2", "8m1", "8m2", "8m4", "8m8"], + !eq(range, "s"): ["16mf4", "16mf2", "16m1", "16m2", "16m4", "16m8"], + !eq(range, "i"): ["32mf2", "32m1", "32m2", "32m4", "32m8"], + !eq(range, "l"): ["64m1", "64m2", "64m4", "64m8"]); +} + +class VCIXBuiltinSet<string name, string IR_name, string suffix, + string prototype, string type_range, + list<int> intrinsic_types> + : RVVBuiltin<suffix, prototype, type_range> { + let Name = name; + let OverloadedName = name; + let IRName = IR_name; + let HasMasked = false; + let IntrinsicTypes = intrinsic_types; +} + +multiclass VCIXBuiltinSet<string name, string IR_name, string suffix, + string prototype, string type_range, + list<int> intrinsic_types> { + if !find(prototype, "0") then { + def : VCIXBuiltinSet<name, IR_name, suffix, prototype, type_range, intrinsic_types>; + } + def : VCIXBuiltinSet<name # "_se", IR_name # "_se", suffix, prototype, type_range, intrinsic_types>; +} + +multiclass RVVVCIXBuiltinSet<list<string> range, string prototype, + list<int> intrinsic_types, bit UseGPR> { + foreach r = range in + let RequiredFeatures = !if(!and(UseGPR, !eq(r, "l")), + ["Xsfvcp", "RV64"], ["Xsfvcp"]) in + defm : VCIXBuiltinSet<NAME, NAME, "Uv", prototype, r, intrinsic_types>; +} + +multiclass RVVVCIXBuiltinSetWVType<list<string> range, string prototype, + list<int> intrinsic_types, bit UseGPR> { + foreach r = range in + let RequiredFeatures = !if(!and(UseGPR, !eq(r, "l")), + ["Xsfvcp", "RV64"], ["Xsfvcp"]) in + // These intrinsics don't have any vector types in the output and inputs, + // but we still need to add vetvli for them. So we encode different + // VTYPE into the intrinsic names, and then will know which vsetvli is + // correct. + foreach s = VCIXSuffix<r>.suffix in + // Since we already encode the Vtype into the name, so just set + // Log2LMUL to zero. Otherwise the RISCVVEmitter will expand + // lots of redundant intrinsic but have same names. + let Log2LMUL = [0] in + def : VCIXBuiltinSet<NAME # "_u" # s, NAME # "_e" # s, + "", prototype, r, intrinsic_types>; +} + +let SupportOverloading = false in { + defm sf_vc_x_se : RVVVCIXBuiltinSetWVType<["c", "s", "i", "l"], "0KzKzKzUe", [0, 3], UseGPR=1>; + defm sf_vc_i_se : RVVVCIXBuiltinSetWVType<["c", "s", "i", "l"], "0KzKzKzKz", [2, 3], UseGPR=0>; + defm sf_vc_xv : RVVVCIXBuiltinSet<["csi", "l"], "0KzKzUvUe", [0, 2, 3], UseGPR=1>; + defm sf_vc_iv : RVVVCIXBuiltinSet<["csi", "l"], "0KzKzUvKz", [0, 2, 3], UseGPR=0>; + defm sf_vc_vv : RVVVCIXBuiltinSet<["csi", "l"], "0KzKzUvUv", [0, 2, 3], UseGPR=0>; + defm sf_vc_fv : RVVVCIXBuiltinSet<["si", "l"], "0KzKzUvFe", [0, 2, 3], UseGPR=0>; + defm sf_vc_xvv : RVVVCIXBuiltinSet<["csi", "l"], "0KzUvUvUe", [0, 1, 2, 3], UseGPR=1>; + defm sf_vc_ivv : RVVVCIXBuiltinSet<["csi", "l"], "0KzUvUvKz", [0, 1, 2, 3], UseGPR=0>; + defm sf_vc_vvv : RVVVCIXBuiltinSet<["csi", "l"], "0KzUvUvUv", [0, 1, 2, 3], UseGPR=0>; + defm sf_vc_fvv : RVVVCIXBuiltinSet<["si", "l"], "0KzUvUvFe", [0, 1, 2, 3], UseGPR=0>; + defm sf_vc_v_x : RVVVCIXBuiltinSet<["csi", "l"], "UvKzKzUe", [-1, 1, 2], UseGPR=1>; + defm sf_vc_v_i : RVVVCIXBuiltinSet<["csi", "l"], "UvKzKzKz", [-1, 1, 2], UseGPR=0>; + defm sf_vc_v_xv : RVVVCIXBuiltinSet<["csi", "l"], "UvKzUvUe", [-1, 0, 1, 2], UseGPR=1>; + defm sf_vc_v_iv : RVVVCIXBuiltinSet<["csi", "l"], "UvKzUvKz", [-1, 0, 1, 2], UseGPR=0>; + defm sf_vc_v_vv : RVVVCIXBuiltinSet<["csi", "l"], "UvKzUvUv", [-1, 0, 1, 2], UseGPR=0>; + defm sf_vc_v_fv : RVVVCIXBuiltinSet<["si", "l"], "UvKzUvFe", [-1, 0, 1, 2], UseGPR=0>; + defm sf_vc_v_xvv : RVVVCIXBuiltinSet<["csi", "l"], "UvKzUvUvUe", [-1, 0, 1, 2, 3], UseGPR=1>; + defm sf_vc_v_ivv : RVVVCIXBuiltinSet<["csi", "l"], "UvKzUvUvKz", [-1, 0, 1, 2, 3], UseGPR=0>; + defm sf_vc_v_vvv : RVVVCIXBuiltinSet<["csi", "l"], "UvKzUvUvUv", [-1, 0, 1, 2, 3], UseGPR=0>; + defm sf_vc_v_fvv : RVVVCIXBuiltinSet<["si", "l"], "UvKzUvUvFe", [-1, 0, 1, 2, 3], UseGPR=0>; + let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { + defm sf_vc_xvw : RVVVCIXBuiltinSet<["csi"], "0KzUwUvUe", [0, 1, 2, 3], UseGPR=1>; + defm sf_vc_ivw : RVVVCIXBuiltinSet<["csi"], "0KzUwUvKz", [0, 1, 2, 3], UseGPR=0>; + defm sf_vc_vvw : RVVVCIXBuiltinSet<["csi"], "0KzUwUvUv", [0, 1, 2, 3], UseGPR=0>; + defm sf_vc_fvw : RVVVCIXBuiltinSet<["si"], "0KzUwUvFe", [0, 1, 2, 3], UseGPR=0>; + defm sf_vc_v_xvw : RVVVCIXBuiltinSet<["csi"], "UwKzUwUvUe", [-1, 0, 1, 2, 3], UseGPR=1>; + defm sf_vc_v_ivw : RVVVCIXBuiltinSet<["csi"], "UwKzUwUvKz", [-1, 0, 1, 2, 3], UseGPR=0>; + defm sf_vc_v_vvw : RVVVCIXBuiltinSet<["csi"], "UwKzUwUvUv", [-1, 0, 1, 2, 3], UseGPR=0>; + defm sf_vc_v_fvw : RVVVCIXBuiltinSet<["si"], "UwKzUwUvFe", [-1, 0, 1, 2, 3], UseGPR=0>; + } +} + +multiclass RVVVFWMACCBuiltinSet<list<list<string>> suffixes_prototypes> { + let OverloadedName = NAME, + Name = NAME, + HasMasked = false, + Log2LMUL = [-2, -1, 0, 1, 2] in + defm NAME : RVVOutOp1Op2BuiltinSet<NAME, "y", suffixes_prototypes>; +} + +multiclass RVVVQMACCDODBuiltinSet<list<list<string>> suffixes_prototypes> { + let OverloadedName = NAME, + Name = NAME, + HasMasked = false, + Log2LMUL = [0, 1, 2, 3] in + defm NAME : RVVOutOp1Op2BuiltinSet<NAME, "i", suffixes_prototypes>; +} + +multiclass RVVVQMACCQOQBuiltinSet<list<list<string>> suffixes_prototypes> { + let OverloadedName = NAME, + Name = NAME, + HasMasked = false, + Log2LMUL = [-1, 0, 1, 2] in + defm NAME : RVVOutOp1Op2BuiltinSet<NAME, "s", suffixes_prototypes>; +} + +multiclass RVVVFNRCLIPBuiltinSet<string suffix, string prototype, string type_range> { + let Log2LMUL = [-3, -2, -1, 0, 1, 2], + Name = NAME, + IRName = NAME, + MaskedIRName = NAME # "_mask" in + def : RVVConvBuiltin<suffix, prototype, type_range, NAME>; +} + +let UnMaskedPolicyScheme = HasPolicyOperand in + let RequiredFeatures = ["Xsfvqmaccdod"] in { + defm sf_vqmaccu_2x8x2 : RVVVQMACCDODBuiltinSet<[["", "v", "vv(FixedSEW:8)SUv(FixedSEW:8)Uv"]]>; + defm sf_vqmacc_2x8x2 : RVVVQMACCDODBuiltinSet<[["", "v", "vv(FixedSEW:8)Sv(FixedSEW:8)v"]]>; + defm sf_vqmaccus_2x8x2 : RVVVQMACCDODBuiltinSet<[["", "v", "vv(FixedSEW:8)SUv(FixedSEW:8)v"]]>; + defm sf_vqmaccsu_2x8x2 : RVVVQMACCDODBuiltinSet<[["", "v", "vv(FixedSEW:8)Sv(FixedSEW:8)Uv"]]>; + } + +let UnMaskedPolicyScheme = HasPolicyOperand in + let RequiredFeatures = ["Xsfvqmaccqoq"] in { + defm sf_vqmaccu_4x8x4 : RVVVQMACCQOQBuiltinSet<[["", "w", "ww(FixedSEW:8)SUv(FixedSEW:8)Uv"]]>; + defm sf_vqmacc_4x8x4 : RVVVQMACCQOQBuiltinSet<[["", "w", "ww(FixedSEW:8)Sv(FixedSEW:8)v"]]>; + defm sf_vqmaccus_4x8x4 : RVVVQMACCQOQBuiltinSet<[["", "w", "ww(FixedSEW:8)SUv(FixedSEW:8)v"]]>; + defm sf_vqmaccsu_4x8x4 : RVVVQMACCQOQBuiltinSet<[["", "w", "ww(FixedSEW:8)Sv(FixedSEW:8)Uv"]]>; + } + +let UnMaskedPolicyScheme = HasPolicyOperand in + let RequiredFeatures = ["Xsfvfwmaccqqq"] in + defm sf_vfwmacc_4x4x4 : RVVVFWMACCBuiltinSet<[["", "Fw", "FwFwSvv"]]>; + +let UnMaskedPolicyScheme = HasPassthruOperand, RequiredFeatures = ["Xsfvfnrclipxfqf"] in { +let ManualCodegen = [{ + { + // LLVM intrinsic + // Unmasked: (passthru, vector_in, scalar_in, frm, vl) + // Masked: (passthru, vector_in, scalar_in, mask, frm, vl, policy) + + SmallVector<llvm::Value*, 7> Operands; + bool HasMaskedOff = !( + (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) || + (!IsMasked && PolicyAttrs & RVV_VTA)); + bool HasRoundModeOp = IsMasked ? + (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) : + (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4); + + unsigned Offset = IsMasked ? + (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0); + + if (!HasMaskedOff) + Operands.push_back(llvm::PoisonValue::get(ResultType)); + else + Operands.push_back(Ops[IsMasked ? 1 : 0]); + + Operands.push_back(Ops[Offset]); // op0 + Operands.push_back(Ops[Offset + 1]); // op1 + + if (IsMasked) + Operands.push_back(Ops[0]); // mask + + if (HasRoundModeOp) { + Operands.push_back(Ops[Offset + 2]); // frm + Operands.push_back(Ops[Offset + 3]); // vl + } else { + Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm + Operands.push_back(Ops[Offset + 2]); // vl + } + + if (IsMasked) + Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + + IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Operands.back()->getType()}; + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + return Builder.CreateCall(F, Operands, ""); + } +}] in { + let HasFRMRoundModeOp = true in { + defm sf_vfnrclip_x_f_qf : RVVVFNRCLIPBuiltinSet<"v", "vFqfu", "c">; + defm sf_vfnrclip_xu_f_qf : RVVVFNRCLIPBuiltinSet<"Uv", "UvFqfu", "c">; + } + defm sf_vfnrclip_x_f_qf : RVVVFNRCLIPBuiltinSet<"v", "vFqf", "c">; + defm sf_vfnrclip_xu_f_qf : RVVVFNRCLIPBuiltinSet<"Uv", "UvFqf", "c">; +} +} diff --git a/contrib/llvm-project/clang/include/clang/Basic/riscv_vector.td b/contrib/llvm-project/clang/include/clang/Basic/riscv_vector.td index 48c032dd1422..8bde08105250 100644 --- a/contrib/llvm-project/clang/include/clang/Basic/riscv_vector.td +++ b/contrib/llvm-project/clang/include/clang/Basic/riscv_vector.td @@ -12,539 +12,7 @@ // //===----------------------------------------------------------------------===// -//===----------------------------------------------------------------------===// -// Instruction definitions -//===----------------------------------------------------------------------===// -// Each record of the class RVVBuiltin defines a collection of builtins (i.e. -// "def vadd : RVVBuiltin" will be used to define things like "vadd_vv_i32m1", -// "vadd_vv_i32m2", etc). -// -// The elements of this collection are defined by an instantiation process the -// range of which is specified by the cross product of the LMUL attribute and -// every element in the attribute TypeRange. By default builtins have LMUL = [1, -// 2, 4, 8, 1/2, 1/4, 1/8] so the process is repeated 7 times. In tablegen we -// use the Log2LMUL [0, 1, 2, 3, -1, -2, -3] to represent the LMUL. -// -// LMUL represents the fact that the types of values used by that builtin are -// values generated by instructions that are executed under that LMUL. However, -// this does not mean the builtin is necessarily lowered into an instruction -// that executes under the specified LMUL. An example where this happens are -// loads and stores of masks. A mask like `vbool8_t` can be generated, for -// instance, by comparing two `__rvv_int8m1_t` (this is LMUL=1) or comparing two -// `__rvv_int16m2_t` (this is LMUL=2). The actual load or store, however, will -// be performed under LMUL=1 because mask registers are not grouped. -// -// TypeRange is a non-empty sequence of basic types: -// -// c: int8_t (i8) -// s: int16_t (i16) -// i: int32_t (i32) -// l: int64_t (i64) -// x: float16_t (half) -// f: float32_t (float) -// d: float64_t (double) -// -// This way, given an LMUL, a record with a TypeRange "sil" will cause the -// definition of 3 builtins. Each type "t" in the TypeRange (in this example -// they are int16_t, int32_t, int64_t) is used as a parameter that drives the -// definition of that particular builtin (for the given LMUL). -// -// During the instantiation, types can be transformed or modified using type -// transformers. Given a type "t" the following primitive type transformers can -// be applied to it to yield another type. -// -// e: type of "t" as is (identity) -// v: computes a vector type whose element type is "t" for the current LMUL -// w: computes a vector type identical to what 'v' computes except for the -// element type which is twice as wide as the element type of 'v' -// q: computes a vector type identical to what 'v' computes except for the -// element type which is four times as wide as the element type of 'v' -// o: computes a vector type identical to what 'v' computes except for the -// element type which is eight times as wide as the element type of 'v' -// m: computes a vector type identical to what 'v' computes except for the -// element type which is bool -// 0: void type, ignores "t" -// z: size_t, ignores "t" -// t: ptrdiff_t, ignores "t" -// u: unsigned long, ignores "t" -// l: long, ignores "t" -// -// So for instance if t is "i", i.e. int, then "e" will yield int again. "v" -// will yield an RVV vector type (assume LMUL=1), so __rvv_int32m1_t. -// Accordingly "w" would yield __rvv_int64m2_t. -// -// A type transformer can be prefixed by other non-primitive type transformers. -// -// P: constructs a pointer to the current type -// C: adds const to the type -// K: requires the integer type to be a constant expression -// U: given an integer type or vector type, computes its unsigned variant -// I: given a vector type, compute the vector type with integer type -// elements of the same width -// F: given a vector type, compute the vector type with floating-point type -// elements of the same width -// S: given a vector type, computes its equivalent one for LMUL=1. This is a -// no-op if the vector was already LMUL=1 -// (Log2EEW:Value): Log2EEW value could be 3/4/5/6 (8/16/32/64), given a -// vector type (SEW and LMUL) and EEW (8/16/32/64), computes its -// equivalent integer vector type with EEW and corresponding ELMUL (elmul = -// (eew/sew) * lmul). For example, vector type is __rvv_float16m4 -// (SEW=16, LMUL=4) and Log2EEW is 3 (EEW=8), and then equivalent vector -// type is __rvv_uint8m2_t (elmul=(8/16)*4 = 2). Ignore to define a new -// builtins if its equivalent type has illegal lmul. -// (FixedSEW:Value): Given a vector type (SEW and LMUL), and computes another -// vector type which only changed SEW as given value. Ignore to define a new -// builtin if its equivalent type has illegal lmul or the SEW does not changed. -// (SFixedLog2LMUL:Value): Smaller Fixed Log2LMUL. Given a vector type (SEW -// and LMUL), and computes another vector type which only changed LMUL as -// given value. The new LMUL should be smaller than the old one. Ignore to -// define a new builtin if its equivalent type has illegal lmul. -// (LFixedLog2LMUL:Value): Larger Fixed Log2LMUL. Given a vector type (SEW -// and LMUL), and computes another vector type which only changed LMUL as -// given value. The new LMUL should be larger than the old one. Ignore to -// define a new builtin if its equivalent type has illegal lmul. -// -// Following with the example above, if t is "i", then "Ue" will yield unsigned -// int and "Fv" will yield __rvv_float32m1_t (again assuming LMUL=1), Fw would -// yield __rvv_float64m2_t, etc. -// -// Each builtin is then defined by applying each type in TypeRange against the -// sequence of type transformers described in Suffix and Prototype. -// -// The name of the builtin is defined by the Name attribute (which defaults to -// the name of the class) appended (separated with an underscore) the Suffix -// attribute. For instance with Name="foo", Suffix = "v" and TypeRange = "il", -// the builtin generated will be __builtin_rvv_foo_i32m1 and -// __builtin_rvv_foo_i64m1 (under LMUL=1). If Suffix contains more than one -// type transformer (say "vv") each of the types is separated with an -// underscore as in "__builtin_rvv_foo_i32m1_i32m1". -// -// The C/C++ prototype of the builtin is defined by the Prototype attribute. -// Prototype is a non-empty sequence of type transformers, the first of which -// is the return type of the builtin and the rest are the parameters of the -// builtin, in order. For instance if Prototype is "wvv" and TypeRange is "si" -// a first builtin will have type -// __rvv_int32m2_t (__rvv_int16m1_t, __rvv_int16m1_t) and the second builtin -// will have type __rvv_int64m2_t (__rvv_int32m1_t, __rvv_int32m1_t) (again -// under LMUL=1). -// -// There are a number of attributes that are used to constraint the number and -// shape of the builtins generated. Refer to the comments below for them. -class RVVBuiltin<string suffix, string prototype, string type_range, - string mangled_suffix = ""> { - // Base name that will be prepended in __builtin_rvv_ and appended the - // computed Suffix. - string Name = NAME; - - // If not empty, each instantiated builtin will have this appended after an - // underscore (_). It is instantiated like Prototype. - string Suffix = suffix; - - // If empty, default MangledName is sub string of `Name` which end of first - // '_'. For example, the default mangled name is `vadd` for Name `vadd_vv`. - // It's used for describe some special naming cases. - string MangledName = ""; - - // If not empty, each MangledName will have this appended after an - // underscore (_). It is instantiated like Prototype. - string MangledSuffix = mangled_suffix; - - // The different variants of the builtin, parameterised with a type. - string TypeRange = type_range; - - // We use each type described in TypeRange and LMUL with prototype to - // instantiate a specific element of the set of builtins being defined. - // Prototype attribute defines the C/C++ prototype of the builtin. It is a - // non-empty sequence of type transformers, the first of which is the return - // type of the builtin and the rest are the parameters of the builtin, in - // order. For instance if Prototype is "wvv", TypeRange is "si" and LMUL=1, a - // first builtin will have type - // __rvv_int32m2_t (__rvv_int16m1_t, __rvv_int16m1_t), and the second builtin - // will have type __rvv_int64m2_t (__rvv_int32m1_t, __rvv_int32m1_t). - string Prototype = prototype; - - // This builtin has a masked form. - bit HasMask = true; - - // If HasMask, this flag states that this builtin has a maskedoff operand. It - // is always the first operand in builtin and IR intrinsic. - bit HasMaskedOffOperand = true; - - // This builtin has a granted vector length parameter in the last position. - bit HasVL = true; - - // This builtin supports non-masked function overloading api. - // All masked operations support overloading api. - bit HasNoMaskedOverloaded = true; - - // Reads or writes "memory" or has other side-effects. - bit HasSideEffects = false; - - // This builtin is valid for the given Log2LMULs. - list<int> Log2LMUL = [0, 1, 2, 3, -1, -2, -3]; - - // Manual code in clang codegen riscv_vector_builtin_cg.inc - code ManualCodegen = [{}]; - code ManualCodegenMask = [{}]; - - // When emit the automatic clang codegen, it describes what types we have to use - // to obtain the specific LLVM intrinsic. -1 means the return type, otherwise, - // k >= 0 meaning the k-th operand (counting from zero) of the codegen'd - // parameter of the unmasked version. k can't be the mask operand's position. - list<int> IntrinsicTypes = []; - - // If these names are not empty, this is the ID of the LLVM intrinsic - // we want to lower to. - string IRName = NAME; - - // If HasMask, this is the ID of the LLVM intrinsic we want to lower to. - string IRNameMask = NAME #"_mask"; - - // If non empty, this is the code emitted in the header, otherwise - // an automatic definition in header is emitted. - string HeaderCode = ""; - - // Sub extension of vector spec. Currently only support Zvamo or Zvlsseg. - string RequiredExtension = ""; - - // Number of fields for Zvlsseg. - int NF = 1; -} - -//===----------------------------------------------------------------------===// -// Basic classes with automatic codegen. -//===----------------------------------------------------------------------===// - -class RVVOutBuiltin<string suffix, string prototype, string type_range> - : RVVBuiltin<suffix, prototype, type_range> { - let IntrinsicTypes = [-1]; -} - -class RVVOp0Builtin<string suffix, string prototype, string type_range> - : RVVBuiltin<suffix, prototype, type_range> { - let IntrinsicTypes = [0]; -} - -class RVVOutOp1Builtin<string suffix, string prototype, string type_range> - : RVVBuiltin<suffix, prototype, type_range> { - let IntrinsicTypes = [-1, 1]; -} - -class RVVOutOp0Op1Builtin<string suffix, string prototype, string type_range> - : RVVBuiltin<suffix, prototype, type_range> { - let IntrinsicTypes = [-1, 0, 1]; -} - -multiclass RVVBuiltinSet<string intrinsic_name, string type_range, - list<list<string>> suffixes_prototypes, - list<int> intrinsic_types> { - let IRName = intrinsic_name, IRNameMask = intrinsic_name # "_mask", - IntrinsicTypes = intrinsic_types in { - foreach s_p = suffixes_prototypes in { - let Name = NAME # "_" # s_p[0] in { - defvar suffix = s_p[1]; - defvar prototype = s_p[2]; - def : RVVBuiltin<suffix, prototype, type_range>; - } - } - } -} - -// IntrinsicTypes is output, op0, op1 [-1, 0, 1] -multiclass RVVOutOp0Op1BuiltinSet<string intrinsic_name, string type_range, - list<list<string>> suffixes_prototypes> - : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, - [-1, 0, 1]>; - -multiclass RVVOutBuiltinSet<string intrinsic_name, string type_range, - list<list<string>> suffixes_prototypes> - : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [-1]>; - -multiclass RVVOp0BuiltinSet<string intrinsic_name, string type_range, - list<list<string>> suffixes_prototypes> - : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [0]>; - -// IntrinsicTypes is output, op1 [-1, 1] -multiclass RVVOutOp1BuiltinSet<string intrinsic_name, string type_range, - list<list<string>> suffixes_prototypes> - : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [-1, 1]>; - -multiclass RVVOp0Op1BuiltinSet<string intrinsic_name, string type_range, - list<list<string>> suffixes_prototypes> - : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [0, 1]>; - -multiclass RVVOutOp1Op2BuiltinSet<string intrinsic_name, string type_range, - list<list<string>> suffixes_prototypes> - : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [-1, 1, 2]>; - -multiclass RVVSignedBinBuiltinSet - : RVVOutOp1BuiltinSet<NAME, "csil", - [["vv", "v", "vvv"], - ["vx", "v", "vve"]]>; - -multiclass RVVUnsignedBinBuiltinSet - : RVVOutOp1BuiltinSet<NAME, "csil", - [["vv", "Uv", "UvUvUv"], - ["vx", "Uv", "UvUvUe"]]>; - -multiclass RVVIntBinBuiltinSet - : RVVSignedBinBuiltinSet, - RVVUnsignedBinBuiltinSet; - -multiclass RVVSlideOneBuiltinSet - : RVVOutOp1BuiltinSet<NAME, "csil", - [["vx", "v", "vve"], - ["vx", "Uv", "UvUve"]]>; - -multiclass RVVSignedShiftBuiltinSet - : RVVOutOp1BuiltinSet<NAME, "csil", - [["vv", "v", "vvUv"], - ["vx", "v", "vvz"]]>; - -multiclass RVVUnsignedShiftBuiltinSet - : RVVOutOp1BuiltinSet<NAME, "csil", - [["vv", "Uv", "UvUvUv"], - ["vx", "Uv", "UvUvz"]]>; - -multiclass RVVShiftBuiltinSet - : RVVSignedShiftBuiltinSet, - RVVUnsignedShiftBuiltinSet; - -let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { - multiclass RVVSignedNShiftBuiltinSet - : RVVOutOp0Op1BuiltinSet<NAME, "csil", - [["wv", "v", "vwUv"], - ["wx", "v", "vwz"]]>; - multiclass RVVUnsignedNShiftBuiltinSet - : RVVOutOp0Op1BuiltinSet<NAME, "csil", - [["wv", "Uv", "UvUwUv"], - ["wx", "Uv", "UvUwz"]]>; -} - -multiclass RVVCarryinBuiltinSet - : RVVOutOp1BuiltinSet<NAME, "csil", - [["vvm", "v", "vvvm"], - ["vxm", "v", "vvem"], - ["vvm", "Uv", "UvUvUvm"], - ["vxm", "Uv", "UvUvUem"]]>; - -multiclass RVVCarryOutInBuiltinSet<string intrinsic_name> - : RVVOp0Op1BuiltinSet<intrinsic_name, "csil", - [["vvm", "vm", "mvvm"], - ["vxm", "vm", "mvem"], - ["vvm", "Uvm", "mUvUvm"], - ["vxm", "Uvm", "mUvUem"]]>; - -multiclass RVVSignedMaskOutBuiltinSet - : RVVOp0Op1BuiltinSet<NAME, "csil", - [["vv", "vm", "mvv"], - ["vx", "vm", "mve"]]>; - -multiclass RVVUnsignedMaskOutBuiltinSet - : RVVOp0Op1BuiltinSet<NAME, "csil", - [["vv", "Uvm", "mUvUv"], - ["vx", "Uvm", "mUvUe"]]>; - -multiclass RVVIntMaskOutBuiltinSet - : RVVSignedMaskOutBuiltinSet, - RVVUnsignedMaskOutBuiltinSet; - -class RVVIntExt<string intrinsic_name, string suffix, string prototype, - string type_range> - : RVVBuiltin<suffix, prototype, type_range> { - let IRName = intrinsic_name; - let IRNameMask = intrinsic_name # "_mask"; - let MangledName = NAME; - let IntrinsicTypes = [-1, 0]; -} - -let HasMaskedOffOperand = false in { - multiclass RVVIntTerBuiltinSet { - defm "" : RVVOutOp1BuiltinSet<NAME, "csil", - [["vv", "v", "vvvv"], - ["vx", "v", "vvev"], - ["vv", "Uv", "UvUvUvUv"], - ["vx", "Uv", "UvUvUeUv"]]>; - } - multiclass RVVFloatingTerBuiltinSet { - defm "" : RVVOutOp1BuiltinSet<NAME, "xfd", - [["vv", "v", "vvvv"], - ["vf", "v", "vvev"]]>; - } -} - -let HasMaskedOffOperand = false, Log2LMUL = [-2, -1, 0, 1, 2] in { - multiclass RVVFloatingWidenTerBuiltinSet { - defm "" : RVVOutOp1Op2BuiltinSet<NAME, "xf", - [["vv", "w", "wwvv"], - ["vf", "w", "wwev"]]>; - } -} - -multiclass RVVFloatingBinBuiltinSet - : RVVOutOp1BuiltinSet<NAME, "xfd", - [["vv", "v", "vvv"], - ["vf", "v", "vve"]]>; - -multiclass RVVFloatingBinVFBuiltinSet - : RVVOutOp1BuiltinSet<NAME, "xfd", - [["vf", "v", "vve"]]>; - -multiclass RVVFloatingMaskOutBuiltinSet - : RVVOp0Op1BuiltinSet<NAME, "xfd", - [["vv", "vm", "mvv"], - ["vf", "vm", "mve"]]>; - -multiclass RVVFloatingMaskOutVFBuiltinSet - : RVVOp0Op1BuiltinSet<NAME, "fd", - [["vf", "vm", "mve"]]>; - -class RVVMaskBinBuiltin : RVVOutBuiltin<"m", "mmm", "c"> { - let Name = NAME # "_mm"; - let HasMask = false; -} - -class RVVMaskUnaryBuiltin : RVVOutBuiltin<"m", "mm", "c"> { - let Name = NAME # "_m"; -} - -class RVVMaskNullaryBuiltin : RVVOutBuiltin<"m", "m", "c"> { - let Name = NAME # "_m"; - let HasMask = false; - let HasNoMaskedOverloaded = false; -} - -class RVVMaskOp0Builtin<string prototype> : RVVOp0Builtin<"m", prototype, "c"> { - let Name = NAME # "_m"; - let HasMaskedOffOperand = false; -} - -let HasMaskedOffOperand = false in { - multiclass RVVSlideBuiltinSet { - defm "" : RVVOutBuiltinSet<NAME, "csilxfd", - [["vx","v", "vvvz"]]>; - defm "" : RVVOutBuiltinSet<NAME, "csil", - [["vx","Uv", "UvUvUvz"]]>; - } -} - -class RVVFloatingUnaryBuiltin<string builtin_suffix, string ir_suffix, - string prototype> - : RVVOutBuiltin<ir_suffix, prototype, "xfd"> { - let Name = NAME # "_" # builtin_suffix; -} - -class RVVFloatingUnaryVVBuiltin : RVVFloatingUnaryBuiltin<"v", "v", "vv">; - -class RVVConvBuiltin<string suffix, string prototype, string type_range, - string mangled_name> - : RVVBuiltin<suffix, prototype, type_range> { - let IntrinsicTypes = [-1, 0]; - let MangledName = mangled_name; -} - -class RVVConvToSignedBuiltin<string mangled_name> - : RVVConvBuiltin<"Iv", "Ivv", "xfd", mangled_name>; - -class RVVConvToUnsignedBuiltin<string mangled_name> - : RVVConvBuiltin<"Uv", "Uvv", "xfd", mangled_name>; - -class RVVConvToWidenSignedBuiltin<string mangled_name> - : RVVConvBuiltin<"Iw", "Iwv", "xf", mangled_name>; - -class RVVConvToWidenUnsignedBuiltin<string mangled_name> - : RVVConvBuiltin<"Uw", "Uwv", "xf", mangled_name>; - -class RVVConvToNarrowingSignedBuiltin<string mangled_name> - : RVVConvBuiltin<"Iv", "IvFw", "csi", mangled_name>; - -class RVVConvToNarrowingUnsignedBuiltin<string mangled_name> - : RVVConvBuiltin<"Uv", "UvFw", "csi", mangled_name>; - -let HasMaskedOffOperand = false in { - multiclass RVVSignedReductionBuiltin { - defm "" : RVVOutOp1BuiltinSet<NAME, "csil", - [["vs", "vSv", "SvSvvSv"]]>; - } - multiclass RVVUnsignedReductionBuiltin { - defm "" : RVVOutOp1BuiltinSet<NAME, "csil", - [["vs", "UvUSv", "USvUSvUvUSv"]]>; - } - multiclass RVVFloatingReductionBuiltin { - defm "" : RVVOutOp1BuiltinSet<NAME, "xfd", - [["vs", "vSv", "SvSvvSv"]]>; - } - multiclass RVVFloatingWidenReductionBuiltin { - defm "" : RVVOutOp1BuiltinSet<NAME, "xf", - [["vs", "vSw", "SwSwvSw"]]>; - } -} - -multiclass RVVIntReductionBuiltinSet - : RVVSignedReductionBuiltin, - RVVUnsignedReductionBuiltin; - -// For widen operation which has different mangling name. -multiclass RVVWidenBuiltinSet<string intrinsic_name, string type_range, - list<list<string>> suffixes_prototypes> { - let Log2LMUL = [-3, -2, -1, 0, 1, 2], - IRName = intrinsic_name, IRNameMask = intrinsic_name # "_mask" in { - foreach s_p = suffixes_prototypes in { - let Name = NAME # "_" # s_p[0], - MangledName = NAME # "_" # s_p[0] in { - defvar suffix = s_p[1]; - defvar prototype = s_p[2]; - def : RVVOutOp0Op1Builtin<suffix, prototype, type_range>; - } - } - } -} - -// For widen operation with widen operand which has different mangling name. -multiclass RVVWidenWOp0BuiltinSet<string intrinsic_name, string type_range, - list<list<string>> suffixes_prototypes> { - let Log2LMUL = [-3, -2, -1, 0, 1, 2], - IRName = intrinsic_name, IRNameMask = intrinsic_name # "_mask" in { - foreach s_p = suffixes_prototypes in { - let Name = NAME # "_" # s_p[0], - MangledName = NAME # "_" # s_p[0] in { - defvar suffix = s_p[1]; - defvar prototype = s_p[2]; - def : RVVOutOp1Builtin<suffix, prototype, type_range>; - } - } - } -} - -multiclass RVVSignedWidenBinBuiltinSet - : RVVWidenBuiltinSet<NAME, "csi", - [["vv", "w", "wvv"], - ["vx", "w", "wve"]]>; - -multiclass RVVSignedWidenOp0BinBuiltinSet - : RVVWidenWOp0BuiltinSet<NAME # "_w", "csi", - [["wv", "w", "wwv"], - ["wx", "w", "wwe"]]>; - -multiclass RVVUnsignedWidenBinBuiltinSet - : RVVWidenBuiltinSet<NAME, "csi", - [["vv", "Uw", "UwUvUv"], - ["vx", "Uw", "UwUvUe"]]>; - -multiclass RVVUnsignedWidenOp0BinBuiltinSet - : RVVWidenWOp0BuiltinSet<NAME # "_w", "csi", - [["wv", "Uw", "UwUwUv"], - ["wx", "Uw", "UwUwUe"]]>; - -multiclass RVVFloatingWidenBinBuiltinSet - : RVVWidenBuiltinSet<NAME, "xf", - [["vv", "w", "wvv"], - ["vf", "w", "wve"]]>; - -multiclass RVVFloatingWidenOp0BinBuiltinSet - : RVVWidenWOp0BuiltinSet<NAME # "_w", "xf", - [["wv", "w", "wwv"], - ["wf", "w", "wwe"]]>; +include "riscv_vector_common.td" defvar TypeList = ["c","s","i","l","x","f","d"]; defvar EEWList = [["8", "(Log2EEW:3)"], @@ -556,30 +24,25 @@ class IsFloat<string type> { bit val = !or(!eq(type, "x"), !eq(type, "f"), !eq(type, "d")); } -let HasNoMaskedOverloaded = false, - ManualCodegen = [{ - IntrinsicTypes = {ResultType, Ops[1]->getType()}; - Ops[0] = Builder.CreateBitCast(Ops[0], ResultType->getPointerTo()); - }], - ManualCodegenMask= [{ - // Move mask to right before vl. - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); - IntrinsicTypes = {ResultType, Ops[3]->getType()}; - Ops[1] = Builder.CreateBitCast(Ops[1], ResultType->getPointerTo()); - }] in { - class RVVVLEMaskBuiltin : RVVBuiltin<"m", "mPCUe", "c"> { - let Name = "vle1_v"; - let IRName = "vle1"; - let HasMask = false; +let SupportOverloading = false, + MaskedPolicyScheme = NonePolicy in { + class RVVVLEMaskBuiltin : RVVOutBuiltin<"m", "mPCUe", "c"> { + let Name = "vlm_v"; + let IRName = "vlm"; + let HasMasked = false; } +} + +let SupportOverloading = false, + UnMaskedPolicyScheme = HasPassthruOperand in { multiclass RVVVLEBuiltin<list<string> types> { let Name = NAME # "_v", IRName = "vle", - IRNameMask ="vle_mask" in { + MaskedIRName ="vle_mask" in { foreach type = types in { - def : RVVBuiltin<"v", "vPCe", type>; + def : RVVOutBuiltin<"v", "vPCe", type>; if !not(IsFloat<type>.val) then { - def : RVVBuiltin<"Uv", "UvPCUe", type>; + def : RVVOutBuiltin<"Uv", "UvPCUe", type>; } } } @@ -589,41 +52,36 @@ let HasNoMaskedOverloaded = false, multiclass RVVVLEFFBuiltin<list<string> types> { let Name = NAME # "_v", IRName = "vleff", - IRNameMask = "vleff_mask", - HasNoMaskedOverloaded = false, + MaskedIRName = "vleff_mask", + SupportOverloading = false, + UnMaskedPolicyScheme = HasPassthruOperand, ManualCodegen = [{ { - IntrinsicTypes = {ResultType, Ops[2]->getType()}; - Ops[0] = Builder.CreateBitCast(Ops[0], ResultType->getPointerTo()); - Value *NewVL = Ops[1]; - Ops.erase(Ops.begin() + 1); - llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); - llvm::Value *LoadValue = Builder.CreateCall(F, Ops, ""); - llvm::Value *V = Builder.CreateExtractValue(LoadValue, {0}); - // Store new_vl. - clang::CharUnits Align = - CGM.getNaturalTypeAlignment(getContext().getSizeType()); - Builder.CreateStore(Builder.CreateExtractValue(LoadValue, {1}), - Address(NewVL, Align)); - return V; - } - }], - ManualCodegenMask = [{ - { - // Move mask to right before vl. - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); - IntrinsicTypes = {ResultType, Ops[4]->getType()}; - Ops[1] = Builder.CreateBitCast(Ops[1], ResultType->getPointerTo()); + if (IsMasked) { + // Move mask to right before vl. + std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); + if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + IntrinsicTypes = {ResultType, Ops[4]->getType()}; + } else { + if (PolicyAttrs & RVV_VTA) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + IntrinsicTypes = {ResultType, Ops[3]->getType()}; + } Value *NewVL = Ops[2]; Ops.erase(Ops.begin() + 2); llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); llvm::Value *LoadValue = Builder.CreateCall(F, Ops, ""); llvm::Value *V = Builder.CreateExtractValue(LoadValue, {0}); // Store new_vl. - clang::CharUnits Align = - CGM.getNaturalTypeAlignment(getContext().getSizeType()); - Builder.CreateStore(Builder.CreateExtractValue(LoadValue, {1}), - Address(NewVL, Align)); + clang::CharUnits Align; + if (IsMasked) + Align = CGM.getNaturalPointeeTypeAlignment(E->getArg(E->getNumArgs()-2)->getType()); + else + Align = CGM.getNaturalPointeeTypeAlignment(E->getArg(1)->getType()); + llvm::Value *Val = Builder.CreateExtractValue(LoadValue, {1}); + Builder.CreateStore(Val, Address(NewVL, Val->getType(), Align)); return V; } }] in { @@ -640,75 +98,71 @@ multiclass RVVVLEFFBuiltin<list<string> types> { multiclass RVVVLSEBuiltin<list<string> types> { let Name = NAME # "_v", IRName = "vlse", - IRNameMask ="vlse_mask", - HasNoMaskedOverloaded = false, - ManualCodegen = [{ - IntrinsicTypes = {ResultType, Ops[2]->getType()}; - Ops[0] = Builder.CreateBitCast(Ops[0], ResultType->getPointerTo()); - }], - ManualCodegenMask= [{ - // Move mask to right before vl. - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); - IntrinsicTypes = {ResultType, Ops[4]->getType()}; - Ops[1] = Builder.CreateBitCast(Ops[1], ResultType->getPointerTo()); - }] in { + MaskedIRName ="vlse_mask", + SupportOverloading = false, + UnMaskedPolicyScheme = HasPassthruOperand in { foreach type = types in { - def : RVVBuiltin<"v", "vPCet", type>; + def : RVVOutBuiltin<"v", "vPCet", type>; if !not(IsFloat<type>.val) then { - def : RVVBuiltin<"Uv", "UvPCUet", type>; + def : RVVOutBuiltin<"Uv", "UvPCUet", type>; } } } } multiclass RVVIndexedLoad<string op> { - let ManualCodegen = [{ - IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType()}; - Ops[0] = Builder.CreateBitCast(Ops[0], ResultType->getPointerTo()); - }], - ManualCodegenMask = [{ - // Move mask to right before vl. - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); - IntrinsicTypes = {ResultType, Ops[2]->getType(), Ops[4]->getType()}; - Ops[1] = Builder.CreateBitCast(Ops[1], ResultType->getPointerTo()); - }] in { - foreach type = TypeList in { - foreach eew_list = EEWList in { - defvar eew = eew_list[0]; - defvar eew_type = eew_list[1]; - let Name = op # eew # "_v", IRName = op, IRNameMask = op # "_mask" in { - def: RVVBuiltin<"v", "vPCe" # eew_type # "Uv", type>; - if !not(IsFloat<type>.val) then { - def: RVVBuiltin<"Uv", "UvPCUe" # eew_type # "Uv", type>; - } - } + let UnMaskedPolicyScheme = HasPassthruOperand in { + foreach type = TypeList in { + foreach eew_list = EEWList[0-2] in { + defvar eew = eew_list[0]; + defvar eew_type = eew_list[1]; + let Name = op # eew # "_v", IRName = op, MaskedIRName = op # "_mask", + RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin"], + []<string>) in { + def: RVVOutOp1Builtin<"v", "vPCe" # eew_type # "Uv", type>; + if !not(IsFloat<type>.val) then { + def: RVVOutOp1Builtin<"Uv", "UvPCUe" # eew_type # "Uv", type>; + } } } + defvar eew64 = "64"; + defvar eew64_type = "(Log2EEW:6)"; + let Name = op # eew64 # "_v", IRName = op, MaskedIRName = op # "_mask", + RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin", "RV64"], + ["RV64"]) in { + def: RVVOutOp1Builtin<"v", "vPCe" # eew64_type # "Uv", type>; + if !not(IsFloat<type>.val) then { + def: RVVOutOp1Builtin<"Uv", "UvPCUe" # eew64_type # "Uv", type>; + } + } + } } } let HasMaskedOffOperand = false, + MaskedPolicyScheme = NonePolicy, ManualCodegen = [{ - // Builtin: (ptr, value, vl). Intrinsic: (value, ptr, vl) - std::swap(Ops[0], Ops[1]); - Ops[1] = Builder.CreateBitCast(Ops[1], Ops[0]->getType()->getPointerTo()); - IntrinsicTypes = {Ops[0]->getType(), Ops[2]->getType()}; - }], - ManualCodegenMask= [{ - // Builtin: (mask, ptr, value, vl). Intrinsic: (value, ptr, mask, vl) - std::swap(Ops[0], Ops[2]); - Ops[1] = Builder.CreateBitCast(Ops[1], Ops[0]->getType()->getPointerTo()); - IntrinsicTypes = {Ops[0]->getType(), Ops[3]->getType()}; + if (IsMasked) { + // Builtin: (mask, ptr, value, vl). Intrinsic: (value, ptr, mask, vl) + std::swap(Ops[0], Ops[2]); + } else { + // Builtin: (ptr, value, vl). Intrinsic: (value, ptr, vl) + std::swap(Ops[0], Ops[1]); + } + if (IsMasked) + IntrinsicTypes = {Ops[0]->getType(), Ops[3]->getType()}; + else + IntrinsicTypes = {Ops[0]->getType(), Ops[2]->getType()}; }] in { class RVVVSEMaskBuiltin : RVVBuiltin<"m", "0PUem", "c"> { - let Name = "vse1_v"; - let IRName = "vse1"; - let HasMask = false; + let Name = "vsm_v"; + let IRName = "vsm"; + let HasMasked = false; } multiclass RVVVSEBuiltin<list<string> types> { let Name = NAME # "_v", IRName = "vse", - IRNameMask = "vse_mask" in { + MaskedIRName = "vse_mask" in { foreach type = types in { def : RVVBuiltin<"v", "0Pev", type>; if !not(IsFloat<type>.val) then { @@ -722,19 +176,21 @@ let HasMaskedOffOperand = false, multiclass RVVVSSEBuiltin<list<string> types> { let Name = NAME # "_v", IRName = "vsse", - IRNameMask = "vsse_mask", + MaskedIRName = "vsse_mask", HasMaskedOffOperand = false, + MaskedPolicyScheme = NonePolicy, ManualCodegen = [{ - // Builtin: (ptr, stride, value, vl). Intrinsic: (value, ptr, stride, vl) - std::rotate(Ops.begin(), Ops.begin() + 2, Ops.begin() + 3); - Ops[1] = Builder.CreateBitCast(Ops[1], Ops[0]->getType()->getPointerTo()); - IntrinsicTypes = {Ops[0]->getType(), Ops[3]->getType()}; - }], - ManualCodegenMask= [{ - // Builtin: (mask, ptr, stride, value, vl). Intrinsic: (value, ptr, stride, mask, vl) - std::swap(Ops[0], Ops[3]); - Ops[1] = Builder.CreateBitCast(Ops[1], Ops[0]->getType()->getPointerTo()); - IntrinsicTypes = {Ops[0]->getType(), Ops[4]->getType()}; + if (IsMasked) { + // Builtin: (mask, ptr, stride, value, vl). Intrinsic: (value, ptr, stride, mask, vl) + std::swap(Ops[0], Ops[3]); + } else { + // Builtin: (ptr, stride, value, vl). Intrinsic: (value, ptr, stride, vl) + std::rotate(Ops.begin(), Ops.begin() + 2, Ops.begin() + 3); + } + if (IsMasked) + IntrinsicTypes = {Ops[0]->getType(), Ops[4]->getType()}; + else + IntrinsicTypes = {Ops[0]->getType(), Ops[3]->getType()}; }] in { foreach type = types in { def : RVVBuiltin<"v", "0Petv", type>; @@ -747,34 +203,122 @@ multiclass RVVVSSEBuiltin<list<string> types> { multiclass RVVIndexedStore<string op> { let HasMaskedOffOperand = false, + MaskedPolicyScheme = NonePolicy, ManualCodegen = [{ - // Builtin: (ptr, index, value, vl). Intrinsic: (value, ptr, index, vl) - std::rotate(Ops.begin(), Ops.begin() + 2, Ops.begin() + 3); - Ops[1] = Builder.CreateBitCast(Ops[1],Ops[0]->getType()->getPointerTo()); - IntrinsicTypes = {Ops[0]->getType(), Ops[2]->getType(), Ops[3]->getType()}; - }], - ManualCodegenMask= [{ - // Builtin: (mask, ptr, index, value, vl). Intrinsic: (value, ptr, index, mask, vl) - std::swap(Ops[0], Ops[3]); - Ops[1] = Builder.CreateBitCast(Ops[1], Ops[0]->getType()->getPointerTo()); - IntrinsicTypes = {Ops[0]->getType(), Ops[2]->getType(), Ops[4]->getType()}; + if (IsMasked) { + // Builtin: (mask, ptr, index, value, vl). Intrinsic: (value, ptr, index, mask, vl) + std::swap(Ops[0], Ops[3]); + } else { + // Builtin: (ptr, index, value, vl). Intrinsic: (value, ptr, index, vl) + std::rotate(Ops.begin(), Ops.begin() + 2, Ops.begin() + 3); + } + if (IsMasked) + IntrinsicTypes = {Ops[0]->getType(), Ops[2]->getType(), Ops[4]->getType()}; + else + IntrinsicTypes = {Ops[0]->getType(), Ops[2]->getType(), Ops[3]->getType()}; }] in { foreach type = TypeList in { - foreach eew_list = EEWList in { + foreach eew_list = EEWList[0-2] in { defvar eew = eew_list[0]; defvar eew_type = eew_list[1]; - let Name = op # eew # "_v", IRName = op, IRNameMask = op # "_mask" in { + let Name = op # eew # "_v", IRName = op, MaskedIRName = op # "_mask", + RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin"], + []<string>) in { def : RVVBuiltin<"v", "0Pe" # eew_type # "Uvv", type>; if !not(IsFloat<type>.val) then { def : RVVBuiltin<"Uv", "0PUe" # eew_type # "UvUv", type>; } } } + defvar eew64 = "64"; + defvar eew64_type = "(Log2EEW:6)"; + let Name = op # eew64 # "_v", IRName = op, MaskedIRName = op # "_mask", + RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin", "RV64"], + ["RV64"]) in { + def : RVVBuiltin<"v", "0Pe" # eew64_type # "Uvv", type>; + if !not(IsFloat<type>.val) then { + def : RVVBuiltin<"Uv", "0PUe" # eew64_type # "UvUv", type>; + } + } } } } defvar NFList = [2, 3, 4, 5, 6, 7, 8]; +/* +A segment load builtin has different variants. + +Therefore a segment unit-stride load builtin can have 4 variants, +1. When unmasked and the policies are all specified as agnostic: +(Address0, ..., Address{NF - 1}, Ptr, VL) +2. When masked and the policies are all specified as agnostic: +(Address0, ..., Address{NF - 1}, Mask, Ptr, VL) +3. When unmasked and one of the policies is specified as undisturbed: +(Address0, ..., Address{NF - 1}, Maskedoff0, ..., Maskedoff{NF - 1}, + Ptr, VL) +4. When masked and one of the policies is specified as undisturbed: +(Address0, ..., Address{NF - 1}, Mask, Maskedoff0, ..., Maskedoff{NF - 1}, + Ptr, VL) + +Other variants of segment load builtin share the same structure, but they +have their own extra parameter. + +The segment unit-stride fault-only-first load builtin has a 'NewVL' +operand after the 'Ptr' operand. +1. When unmasked and the policies are all specified as agnostic: +(Address0, ..., Address{NF - 1}, Ptr, NewVL, VL) +2. When masked and the policies are all specified as agnostic: +(Address0, ..., Address{NF - 1}, Mask, Ptr, NewVL, VL) +3. When unmasked and one of the policies is specified as undisturbed: +(Address0, ..., Address{NF - 1}, Maskedoff0, ..., Maskedoff{NF - 1}, + Ptr, NewVL, VL) +4. When masked and one of the policies is specified as undisturbed: +(Address0, ..., Address{NF - 1}, Mask, Maskedoff0, ..., Maskedoff{NF - 1}, + Ptr, NewVL, VL) + +The segment strided load builtin has a 'Stride' operand after the 'Ptr' +operand. +1. When unmasked and the policies are all specified as agnostic: +(Address0, ..., Address{NF - 1}, Ptr, Stride, VL) +2. When masked and the policies are all specified as agnostic: +(Address0, ..., Address{NF - 1}, Mask, Ptr, Stride, VL) +3. When unmasked and one of the policies is specified as undisturbed: +(Address0, ..., Address{NF - 1}, Maskedoff0, ..., Maskedoff{NF - 1}, + Ptr, Stride, VL) +4. When masked and one of the policies is specified as undisturbed: +(Address0, ..., Address{NF - 1}, Mask, Maskedoff0, ..., Maskedoff{NF - 1}, + Ptr, Stride, VL) + +The segment indexed load builtin has a 'Idx' operand after the 'Ptr' operand. +1. When unmasked and the policies are all specified as agnostic: +(Address0, ..., Address{NF - 1}, Ptr, Idx, VL) +2. When masked and the policies are all specified as agnostic: +(Address0, ..., Address{NF - 1}, Mask, Ptr, Idx, VL) +3. When unmasked and one of the policies is specified as undisturbed: +(Address0, ..., Address{NF - 1}, Maskedoff0, ..., Maskedoff{NF - 1}, + Ptr, Idx, VL) +4. When masked and one of the policies is specified as undisturbed: +(Address0, ..., Address{NF - 1}, Mask, Maskedoff0, ..., Maskedoff{NF - 1}, + Ptr, Idx, VL) + +Segment load intrinsics has different variants similar to their builtins. + +Segment unit-stride load intrinsic, + Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Mask, VL, Policy) + Unmasked: (Vector0, ..., Vector{NF - 1}, Ptr, VL) +Segment unit-stride fault-only-first load intrinsic, + Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Mask, VL, Policy) + Unmasked: (Vector0, ..., Vector{NF - 1}, Ptr, VL) +Segment strided load intrinsic, + Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Stride, Mask, VL, Policy) + Unmasked: (Vector0, ..., Vector{NF - 1}, Ptr, Stride, VL) +Segment indexed load intrinsic, + Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Index, Mask, VL, Policy) + Unmasked: (Vector0, ..., Vector{NF - 1}, Ptr, Index, VL) + +The Vector(s) is poison when the policy behavior allows us to not care +about any masked-off elements. +*/ class PVString<int nf, bit signed> { string S = @@ -787,7 +331,400 @@ class PVString<int nf, bit signed> { !eq(nf, 8): !if(signed, "PvPvPvPvPvPvPvPv", "PUvPUvPUvPUvPUvPUvPUvPUv")); } -multiclass RVVUnitStridedSegLoad<string op> { +class VString<int nf, bit signed> { + string S = !cond(!eq(nf, 2): !if(signed, "vv", "UvUv"), + !eq(nf, 3): !if(signed, "vvv", "UvUvUv"), + !eq(nf, 4): !if(signed, "vvvv", "UvUvUvUv"), + !eq(nf, 5): !if(signed, "vvvvv", "UvUvUvUvUv"), + !eq(nf, 6): !if(signed, "vvvvvv", "UvUvUvUvUvUv"), + !eq(nf, 7): !if(signed, "vvvvvvv", "UvUvUvUvUvUvUv"), + !eq(nf, 8): !if(signed, "vvvvvvvv", "UvUvUvUvUvUvUvUv")); +} + + +class FixedVString<int fixed_lmul, int num, string vec> { + string V = "(LFixedLog2LMUL:" # fixed_lmul # ")" # vec; + string S = !interleave(!listsplat(V, num), ""); +} + +multiclass RVVNonTupleVCreateBuiltin<int dst_lmul, list<int> src_lmul_list> { + defvar dst_v = FixedVString<dst_lmul, 1, "v">.V; + defvar dst_uv = FixedVString<dst_lmul, 1, "Uv">.V; + foreach src_lmul = src_lmul_list in { + defvar num = !shl(1, !sub(dst_lmul, src_lmul)); + + defvar src_v = FixedVString<src_lmul, num, "v">.V; + defvar src_s = FixedVString<src_lmul, num, "v">.S; + def vcreate # src_v # dst_v : RVVBuiltin<src_v # dst_v, + dst_v # src_s, + "csilxfd", dst_v>; + + defvar src_uv = FixedVString<src_lmul, num, "Uv">.V; + defvar src_us = FixedVString<src_lmul, num, "Uv">.S; + def vcreate_u # src_uv # dst_uv : RVVBuiltin<src_uv # dst_uv, + dst_uv # src_us, + "csil", dst_uv>; + } +} + +multiclass RVVPseudoUnaryBuiltin<string IR, string type_range> { + let Name = NAME, + IRName = IR, + MaskedIRName = IR # "_mask", + UnMaskedPolicyScheme = HasPassthruOperand, + ManualCodegen = [{ + { + if (IsMasked) { + std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); + if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + } else { + if (PolicyAttrs & RVV_VTA) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + } + auto ElemTy = cast<llvm::VectorType>(ResultType)->getElementType(); + Ops.insert(Ops.begin() + 2, llvm::Constant::getNullValue(ElemTy)); + + if (IsMasked) { + Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + // maskedoff, op1, op2, mask, vl, policy + IntrinsicTypes = {ResultType, ElemTy, Ops[4]->getType()}; + } else { + // passthru, op1, op2, vl + IntrinsicTypes = {ResultType, ElemTy, Ops[3]->getType()}; + } + break; + } + }] in { + def : RVVBuiltin<"v", "vv", type_range>; + } +} + +multiclass RVVPseudoVNotBuiltin<string IR, string type_range> { + let Name = NAME, + IRName = IR, + MaskedIRName = IR # "_mask", + UnMaskedPolicyScheme = HasPassthruOperand, + ManualCodegen = [{ + { + if (IsMasked) { + std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); + if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + } else { + if (PolicyAttrs & RVV_VTA) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + } + auto ElemTy = cast<llvm::VectorType>(ResultType)->getElementType(); + Ops.insert(Ops.begin() + 2, + llvm::Constant::getAllOnesValue(ElemTy)); + if (IsMasked) { + Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + // maskedoff, op1, po2, mask, vl, policy + IntrinsicTypes = {ResultType, + ElemTy, + Ops[4]->getType()}; + } else { + // passthru, op1, op2, vl + IntrinsicTypes = {ResultType, + ElemTy, + Ops[3]->getType()}; + } + break; + } + }] in { + def : RVVBuiltin<"v", "vv", type_range>; + def : RVVBuiltin<"Uv", "UvUv", type_range>; + } +} + +multiclass RVVPseudoMaskBuiltin<string IR, string type_range> { + let Name = NAME, + IRName = IR, + HasMasked = false, + ManualCodegen = [{ + { + // op1, vl + IntrinsicTypes = {ResultType, + Ops[1]->getType()}; + Ops.insert(Ops.begin() + 1, Ops[0]); + break; + } + }] in { + def : RVVBuiltin<"m", "mm", type_range>; + } +} + +multiclass RVVPseudoVFUnaryBuiltin<string IR, string type_range> { + let Name = NAME, + IRName = IR, + MaskedIRName = IR # "_mask", + UnMaskedPolicyScheme = HasPassthruOperand, + ManualCodegen = [{ + { + if (IsMasked) { + std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); + if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + Ops.insert(Ops.begin() + 2, Ops[1]); + Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + // maskedoff, op1, op2, mask, vl + IntrinsicTypes = {ResultType, + Ops[2]->getType(), + Ops.back()->getType()}; + } else { + if (PolicyAttrs & RVV_VTA) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + // op1, po2, vl + IntrinsicTypes = {ResultType, + Ops[1]->getType(), Ops[2]->getType()}; + Ops.insert(Ops.begin() + 2, Ops[1]); + break; + } + break; + } + }] in { + def : RVVBuiltin<"v", "vv", type_range>; + } +} + +multiclass RVVPseudoVWCVTBuiltin<string IR, string MName, string type_range, + list<list<string>> suffixes_prototypes> { + let Name = NAME, + OverloadedName = MName, + IRName = IR, + MaskedIRName = IR # "_mask", + UnMaskedPolicyScheme = HasPassthruOperand, + ManualCodegen = [{ + { + if (IsMasked) { + std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); + if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + } else { + if (PolicyAttrs & RVV_VTA) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + } + auto ElemTy = cast<llvm::VectorType>(ResultType)->getElementType(); + Ops.insert(Ops.begin() + 2, llvm::Constant::getNullValue(ElemTy)); + if (IsMasked) { + Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + // maskedoff, op1, op2, mask, vl, policy + IntrinsicTypes = {ResultType, + Ops[1]->getType(), + ElemTy, + Ops[4]->getType()}; + } else { + // passtru, op1, op2, vl + IntrinsicTypes = {ResultType, + Ops[1]->getType(), + ElemTy, + Ops[3]->getType()}; + } + break; + } + }] in { + foreach s_p = suffixes_prototypes in { + def : RVVBuiltin<s_p[0], s_p[1], type_range>; + } + } +} + +multiclass RVVPseudoVNCVTBuiltin<string IR, string MName, string type_range, + list<list<string>> suffixes_prototypes> { + let Name = NAME, + OverloadedName = MName, + IRName = IR, + MaskedIRName = IR # "_mask", + UnMaskedPolicyScheme = HasPassthruOperand, + ManualCodegen = [{ + { + if (IsMasked) { + std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); + if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + } else { + if (PolicyAttrs & RVV_VTA) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + } + Ops.insert(Ops.begin() + 2, llvm::Constant::getNullValue(Ops.back()->getType())); + if (IsMasked) { + Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + // maskedoff, op1, xlen, mask, vl + IntrinsicTypes = {ResultType, + Ops[1]->getType(), + Ops[4]->getType(), + Ops[4]->getType()}; + } else { + // passthru, op1, xlen, vl + IntrinsicTypes = {ResultType, + Ops[1]->getType(), + Ops[3]->getType(), + Ops[3]->getType()}; + } + break; + } + }] in { + foreach s_p = suffixes_prototypes in { + def : RVVBuiltin<s_p[0], s_p[1], type_range>; + } + } +} + +let HeaderCode = +[{ +#define __riscv_vlenb() __builtin_rvv_vlenb() +}] in +def vlenb_macro: RVVHeader; + +let HasBuiltinAlias = false, HasVL = false, HasMasked = false, + UnMaskedPolicyScheme = NonePolicy, MaskedPolicyScheme = NonePolicy, + Log2LMUL = [0], IRName = "", + ManualCodegen = [{ + { + LLVMContext &Context = CGM.getLLVMContext(); + llvm::MDBuilder MDHelper(Context); + + llvm::Metadata *Ops[] = {llvm::MDString::get(Context, "vlenb")}; + llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); + llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); + llvm::Function *F = + CGM.getIntrinsic(llvm::Intrinsic::read_register, {SizeTy}); + return Builder.CreateCall(F, Metadata); + } + }] in +{ + def vlenb : RVVBuiltin<"", "u", "i">; +} + +// 6. Configuration-Setting Instructions +// 6.1. vsetvli/vsetvl instructions + +// vsetvl/vsetvlmax are a macro because they require constant integers in SEW +// and LMUL. +let HeaderCode = +[{ +#define __riscv_vsetvl_e8mf4(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 6) +#define __riscv_vsetvl_e8mf2(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 7) +#define __riscv_vsetvl_e8m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 0) +#define __riscv_vsetvl_e8m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 1) +#define __riscv_vsetvl_e8m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 2) +#define __riscv_vsetvl_e8m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 3) + +#define __riscv_vsetvl_e16mf2(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 7) +#define __riscv_vsetvl_e16m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 0) +#define __riscv_vsetvl_e16m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 1) +#define __riscv_vsetvl_e16m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 2) +#define __riscv_vsetvl_e16m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 3) + +#define __riscv_vsetvl_e32m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 0) +#define __riscv_vsetvl_e32m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 1) +#define __riscv_vsetvl_e32m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 2) +#define __riscv_vsetvl_e32m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 3) + +#if __riscv_v_elen >= 64 +#define __riscv_vsetvl_e8mf8(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 5) +#define __riscv_vsetvl_e16mf4(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 6) +#define __riscv_vsetvl_e32mf2(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 7) + +#define __riscv_vsetvl_e64m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 0) +#define __riscv_vsetvl_e64m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 1) +#define __riscv_vsetvl_e64m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 2) +#define __riscv_vsetvl_e64m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 3) +#endif + +#define __riscv_vsetvlmax_e8mf4() __builtin_rvv_vsetvlimax(0, 6) +#define __riscv_vsetvlmax_e8mf2() __builtin_rvv_vsetvlimax(0, 7) +#define __riscv_vsetvlmax_e8m1() __builtin_rvv_vsetvlimax(0, 0) +#define __riscv_vsetvlmax_e8m2() __builtin_rvv_vsetvlimax(0, 1) +#define __riscv_vsetvlmax_e8m4() __builtin_rvv_vsetvlimax(0, 2) +#define __riscv_vsetvlmax_e8m8() __builtin_rvv_vsetvlimax(0, 3) + +#define __riscv_vsetvlmax_e16mf2() __builtin_rvv_vsetvlimax(1, 7) +#define __riscv_vsetvlmax_e16m1() __builtin_rvv_vsetvlimax(1, 0) +#define __riscv_vsetvlmax_e16m2() __builtin_rvv_vsetvlimax(1, 1) +#define __riscv_vsetvlmax_e16m4() __builtin_rvv_vsetvlimax(1, 2) +#define __riscv_vsetvlmax_e16m8() __builtin_rvv_vsetvlimax(1, 3) + +#define __riscv_vsetvlmax_e32m1() __builtin_rvv_vsetvlimax(2, 0) +#define __riscv_vsetvlmax_e32m2() __builtin_rvv_vsetvlimax(2, 1) +#define __riscv_vsetvlmax_e32m4() __builtin_rvv_vsetvlimax(2, 2) +#define __riscv_vsetvlmax_e32m8() __builtin_rvv_vsetvlimax(2, 3) + +#if __riscv_v_elen >= 64 +#define __riscv_vsetvlmax_e8mf8() __builtin_rvv_vsetvlimax(0, 5) +#define __riscv_vsetvlmax_e16mf4() __builtin_rvv_vsetvlimax(1, 6) +#define __riscv_vsetvlmax_e32mf2() __builtin_rvv_vsetvlimax(2, 7) + +#define __riscv_vsetvlmax_e64m1() __builtin_rvv_vsetvlimax(3, 0) +#define __riscv_vsetvlmax_e64m2() __builtin_rvv_vsetvlimax(3, 1) +#define __riscv_vsetvlmax_e64m4() __builtin_rvv_vsetvlimax(3, 2) +#define __riscv_vsetvlmax_e64m8() __builtin_rvv_vsetvlimax(3, 3) +#endif + +}] in +def vsetvl_macro: RVVHeader; + +let HasBuiltinAlias = false, + HasVL = false, + HasMasked = false, + MaskedPolicyScheme = NonePolicy, + Log2LMUL = [0], + ManualCodegen = [{IntrinsicTypes = {ResultType};}] in // Set XLEN type +{ + def vsetvli : RVVBuiltin<"", "zzKzKz", "i">; + def vsetvlimax : RVVBuiltin<"", "zKzKz", "i">; +} + +// 7. Vector Loads and Stores +// 7.4. Vector Unit-Stride Instructions +def vlm: RVVVLEMaskBuiltin; +defm vle8: RVVVLEBuiltin<["c"]>; +defm vle16: RVVVLEBuiltin<["s"]>; +let Name = "vle16_v", RequiredFeatures = ["Zvfhmin"] in + defm vle16_h: RVVVLEBuiltin<["x"]>; +defm vle32: RVVVLEBuiltin<["i","f"]>; +defm vle64: RVVVLEBuiltin<["l","d"]>; + +def vsm : RVVVSEMaskBuiltin; +defm vse8 : RVVVSEBuiltin<["c"]>; +defm vse16: RVVVSEBuiltin<["s"]>; +let Name = "vse16_v", RequiredFeatures = ["Zvfhmin"] in + defm vse16_h: RVVVSEBuiltin<["x"]>; +defm vse32: RVVVSEBuiltin<["i","f"]>; +defm vse64: RVVVSEBuiltin<["l","d"]>; + +// 7.5. Vector Strided Instructions +defm vlse8: RVVVLSEBuiltin<["c"]>; +defm vlse16: RVVVLSEBuiltin<["s"]>; +let Name = "vlse16_v", RequiredFeatures = ["Zvfhmin"] in + defm vlse16_h: RVVVLSEBuiltin<["x"]>; +defm vlse32: RVVVLSEBuiltin<["i","f"]>; +defm vlse64: RVVVLSEBuiltin<["l","d"]>; + +defm vsse8 : RVVVSSEBuiltin<["c"]>; +defm vsse16: RVVVSSEBuiltin<["s"]>; +let Name = "vsse16_v", RequiredFeatures = ["Zvfhmin"] in + defm vsse16_h: RVVVSSEBuiltin<["x"]>; +defm vsse32: RVVVSSEBuiltin<["i","f"]>; +defm vsse64: RVVVSSEBuiltin<["l","d"]>; + +// 7.6. Vector Indexed Instructions +defm : RVVIndexedLoad<"vluxei">; +defm : RVVIndexedLoad<"vloxei">; + +defm : RVVIndexedStore<"vsuxei">; +defm : RVVIndexedStore<"vsoxei">; + +// 7.7. Unit-stride Fault-Only-First Loads +defm vle8ff: RVVVLEFFBuiltin<["c"]>; +defm vle16ff: RVVVLEFFBuiltin<["s"]>; +let Name = "vle16ff_v", RequiredFeatures = ["Zvfhmin"] in + defm vle16ff: RVVVLEFFBuiltin<["x"]>; +defm vle32ff: RVVVLEFFBuiltin<["i", "f"]>; +defm vle64ff: RVVVLEFFBuiltin<["l", "d"]>; + +multiclass RVVUnitStridedSegLoadTuple<string op> { foreach type = TypeList in { defvar eew = !cond(!eq(type, "c") : "8", !eq(type, "s") : "16", @@ -799,65 +736,56 @@ multiclass RVVUnitStridedSegLoad<string op> { foreach nf = NFList in { let Name = op # nf # "e" # eew # "_v", IRName = op # nf, - IRNameMask = op # nf # "_mask", + MaskedIRName = op # nf # "_mask", NF = nf, - HasNoMaskedOverloaded = false, + RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin"], + []<string>), ManualCodegen = [{ { - // builtin: (val0 address, val1 address, ..., ptr, vl) - IntrinsicTypes = {Ops[0]->getType()->getPointerElementType(), - Ops[NF + 1]->getType()}; - // intrinsic: (ptr, vl) - llvm::Value *Operands[] = {Ops[NF], Ops[NF + 1]}; - llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); - llvm::Value *LoadValue = Builder.CreateCall(F, Operands, ""); - clang::CharUnits Align = CharUnits::fromQuantity( - IntrinsicTypes[0]->getScalarSizeInBits() / 8); - llvm::Value *V; - for (unsigned I = 0; I < NF; ++I) { - V = Builder.CreateStore(Builder.CreateExtractValue(LoadValue, {I}), - Address(Ops[I], Align)); - } - return V; - } - }], - ManualCodegenMask = [{ - { - // builtin: (val0 address, ..., mask, maskedoff0, ..., ptr, vl) - // intrinsic: (maskedoff0, ..., ptr, mask, vl) - IntrinsicTypes = {Ops[0]->getType()->getPointerElementType(), - Ops[2 * NF + 2]->getType()}; + llvm::Type *ElementVectorType = cast<StructType>(ResultType)->elements()[0]; + IntrinsicTypes = {ElementVectorType, Ops.back()->getType()}; SmallVector<llvm::Value*, 12> Operands; - for (unsigned I = 0; I < NF; ++I) - Operands.push_back(Ops[NF + I + 1]); - Operands.push_back(Ops[2 * NF + 1]); - Operands.push_back(Ops[NF]); - Operands.push_back(Ops[2 * NF + 2]); - assert(Operands.size() == NF + 3); + + bool NoPassthru = + (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) | + (!IsMasked && (PolicyAttrs & RVV_VTA)); + unsigned Offset = IsMasked ? NoPassthru ? 1 : 2 : NoPassthru ? 0 : 1; + + if (NoPassthru) { // Push poison into passthru + Operands.append(NF, llvm::PoisonValue::get(ElementVectorType)); + } else { // Push intrinsics operands into passthru + llvm::Value *PassthruOperand = IsMasked ? Ops[1] : Ops[0]; + for (unsigned I = 0; I < NF; ++I) + Operands.push_back(Builder.CreateExtractValue(PassthruOperand, {I})); + } + + Operands.push_back(Ops[Offset]); // Ptr + if (IsMasked) + Operands.push_back(Ops[0]); + Operands.push_back(Ops[Offset + 1]); // VL + if (IsMasked) + Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + llvm::Value *LoadValue = Builder.CreateCall(F, Operands, ""); - clang::CharUnits Align = CharUnits::fromQuantity( - IntrinsicTypes[0]->getScalarSizeInBits() / 8); - llvm::Value *V; - for (unsigned I = 0; I < NF; ++I) { - V = Builder.CreateStore(Builder.CreateExtractValue(LoadValue, {I}), - Address(Ops[I], Align)); - } - return V; + if (ReturnValue.isNull()) + return LoadValue; + else + return Builder.CreateStore(LoadValue, ReturnValue.getValue()); } - }] in { - defvar PV = PVString<nf, /*signed=*/true>.S; - defvar PUV = PVString<nf, /*signed=*/false>.S; - def : RVVBuiltin<"v", "0" # PV # "PCe", type>; - if !not(IsFloat<type>.val) then { - def : RVVBuiltin<"Uv", "0" # PUV # "PCUe", type>; + }] in { + defvar T = "(Tuple:" # nf # ")"; + def : RVVBuiltin<T # "v", T # "vPCe", type>; + if !not(IsFloat<type>.val) then { + def : RVVBuiltin<T # "Uv", T # "UvPCUe", type>; } } } } } -multiclass RVVUnitStridedSegLoadFF<string op> { +multiclass RVVUnitStridedSegStoreTuple<string op> { foreach type = TypeList in { defvar eew = !cond(!eq(type, "c") : "8", !eq(type, "s") : "16", @@ -867,71 +795,50 @@ multiclass RVVUnitStridedSegLoadFF<string op> { !eq(type, "f") : "32", !eq(type, "d") : "64"); foreach nf = NFList in { - let Name = op # nf # "e" # eew # "ff_v", - IRName = op # nf # "ff", - IRNameMask = op # nf # "ff_mask", - NF = nf, - HasNoMaskedOverloaded = false, - ManualCodegen = [{ - { - // builtin: (val0 address, val1 address, ..., ptr, new_vl, vl) - IntrinsicTypes = {Ops[0]->getType()->getPointerElementType(), - Ops[NF + 2]->getType()}; - // intrinsic: (ptr, vl) - llvm::Value *Operands[] = {Ops[NF], Ops[NF + 2]}; - Value *NewVL = Ops[NF + 1]; - llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); - llvm::Value *LoadValue = Builder.CreateCall(F, Operands, ""); - clang::CharUnits Align = CharUnits::fromQuantity( - IntrinsicTypes[0]->getScalarSizeInBits() / 8); - for (unsigned I = 0; I < NF; ++I) { - Builder.CreateStore(Builder.CreateExtractValue(LoadValue, {I}), - Address(Ops[I], Align)); - } - // Store new_vl. - return Builder.CreateStore(Builder.CreateExtractValue(LoadValue, {NF}), - Address(NewVL, Align)); - } - }], - ManualCodegenMask = [{ + let Name = op # nf # "e" # eew # "_v", + IRName = op # nf, + MaskedIRName = op # nf # "_mask", + NF = nf, + HasMaskedOffOperand = false, + RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin"], + []<string>), + ManualCodegen = [{ { - // builtin: (val0 address, ..., mask, maskedoff0, ..., ptr, new_vl, vl) - // intrinsic: (maskedoff0, ..., ptr, mask, vl) - IntrinsicTypes = {Ops[0]->getType()->getPointerElementType(), - Ops[2 * NF + 3]->getType()}; + // Masked + // Builtin: (mask, ptr, v_tuple, vl) + // Intrinsic: (val0, val1, ..., ptr, mask, vl) + // Unmasked + // Builtin: (ptr, v_tuple, vl) + // Intrinsic: (val0, val1, ..., ptr, vl) + unsigned Offset = IsMasked ? 1 : 0; + llvm::Value *VTupleOperand = Ops[Offset + 1]; + SmallVector<llvm::Value*, 12> Operands; - for (unsigned I = 0; I < NF; ++I) - Operands.push_back(Ops[NF + I + 1]); - Operands.push_back(Ops[2 * NF + 1]); - Operands.push_back(Ops[NF]); - Operands.push_back(Ops[2 * NF + 3]); - Value *NewVL = Ops[2 * NF + 2]; - assert(Operands.size() == NF + 3); - llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); - llvm::Value *LoadValue = Builder.CreateCall(F, Operands, ""); - clang::CharUnits Align = CharUnits::fromQuantity( - IntrinsicTypes[0]->getScalarSizeInBits() / 8); for (unsigned I = 0; I < NF; ++I) { - Builder.CreateStore(Builder.CreateExtractValue(LoadValue, {I}), - Address(Ops[I], Align)); + llvm::Value *V = Builder.CreateExtractValue(VTupleOperand, {I}); + Operands.push_back(V); } - // Store new_vl. - return Builder.CreateStore(Builder.CreateExtractValue(LoadValue, {NF}), - Address(NewVL, Align)); - } - }] in { - defvar PV = PVString<nf, /*signed=*/true>.S; - defvar PUV = PVString<nf, /*signed=*/false>.S; - def : RVVBuiltin<"v", "0" # PV # "PCe" # "Pz", type>; - if !not(IsFloat<type>.val) then { - def : RVVBuiltin<"Uv", "0" # PUV # "PCUe" # "Pz", type>; + Operands.push_back(Ops[Offset]); // Ptr + if (IsMasked) + Operands.push_back(Ops[0]); + Operands.push_back(Ops[Offset + 2]); // VL + + IntrinsicTypes = {Operands[0]->getType(), Operands.back()->getType()}; + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + return Builder.CreateCall(F, Operands, ""); + } + }] in { + defvar T = "(Tuple:" # nf # ")"; + def : RVVBuiltin<T # "v", "0Pe" # T # "v", type>; + if !not(IsFloat<type>.val) then { + def : RVVBuiltin<T # "Uv", "0PUe" # T # "Uv", type>; } } } } } -multiclass RVVStridedSegLoad<string op> { +multiclass RVVUnitStridedSegLoadFFTuple<string op> { foreach type = TypeList in { defvar eew = !cond(!eq(type, "c") : "8", !eq(type, "s") : "16", @@ -941,145 +848,134 @@ multiclass RVVStridedSegLoad<string op> { !eq(type, "f") : "32", !eq(type, "d") : "64"); foreach nf = NFList in { - let Name = op # nf # "e" # eew # "_v", - IRName = op # nf, - IRNameMask = op # nf # "_mask", + let Name = op # nf # "e" # eew # "ff_v", + IRName = op # nf # "ff", + MaskedIRName = op # nf # "ff_mask", NF = nf, - HasNoMaskedOverloaded = false, + RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin"], + []<string>), ManualCodegen = [{ { - // builtin: (val0 address, val1 address, ..., ptr, stride, vl) - IntrinsicTypes = {Ops[0]->getType()->getPointerElementType(), - Ops[NF + 2]->getType()}; - // intrinsic: (ptr, stride, vl) - llvm::Value *Operands[] = {Ops[NF], Ops[NF + 1], Ops[NF + 2]}; - llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); - llvm::Value *LoadValue = Builder.CreateCall(F, Operands, ""); - clang::CharUnits Align = CharUnits::fromQuantity( - IntrinsicTypes[0]->getScalarSizeInBits() / 8); - llvm::Value *V; - for (unsigned I = 0; I < NF; ++I) { - V = Builder.CreateStore(Builder.CreateExtractValue(LoadValue, {I}), - Address(Ops[I], Align)); - } - return V; - } - }], - ManualCodegenMask = [{ - { - // builtin: (val0 address, ..., mask, maskedoff0, ..., ptr, stride, vl) - // intrinsic: (maskedoff0, ..., ptr, stride, mask, vl) - IntrinsicTypes = {Ops[0]->getType()->getPointerElementType(), - Ops[2 * NF + 3]->getType()}; + llvm::Type *ElementVectorType = cast<StructType>(ResultType)->elements()[0]; + IntrinsicTypes = {ElementVectorType, Ops.back()->getType()}; SmallVector<llvm::Value*, 12> Operands; - for (unsigned I = 0; I < NF; ++I) - Operands.push_back(Ops[NF + I + 1]); - Operands.push_back(Ops[2 * NF + 1]); - Operands.push_back(Ops[2 * NF + 2]); - Operands.push_back(Ops[NF]); - Operands.push_back(Ops[2 * NF + 3]); - assert(Operands.size() == NF + 4); + + bool NoPassthru = + (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) | + (!IsMasked && (PolicyAttrs & RVV_VTA)); + unsigned Offset = IsMasked ? NoPassthru ? 1 : 2 : NoPassthru ? 0 : 1; + + if (NoPassthru) { // Push poison into passthru + Operands.append(NF, llvm::PoisonValue::get(ElementVectorType)); + } else { // Push intrinsics operands into passthru + llvm::Value *PassthruOperand = IsMasked ? Ops[1] : Ops[0]; + for (unsigned I = 0; I < NF; ++I) + Operands.push_back(Builder.CreateExtractValue(PassthruOperand, {I})); + } + + Operands.push_back(Ops[Offset]); // Ptr + if (IsMasked) + Operands.push_back(Ops[0]); + Operands.push_back(Ops[Offset + 2]); // vl + if (IsMasked) + Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + llvm::Value *LoadValue = Builder.CreateCall(F, Operands, ""); - clang::CharUnits Align = CharUnits::fromQuantity( - IntrinsicTypes[0]->getScalarSizeInBits() / 8); - llvm::Value *V; + // Get alignment from the new vl operand + clang::CharUnits Align = + CGM.getNaturalPointeeTypeAlignment(E->getArg(Offset + 1)->getType()); + + llvm::Value *ReturnTuple = llvm::PoisonValue::get(ResultType); for (unsigned I = 0; I < NF; ++I) { - V = Builder.CreateStore(Builder.CreateExtractValue(LoadValue, {I}), - Address(Ops[I], Align)); + llvm::Value *V = Builder.CreateExtractValue(LoadValue, {I}); + ReturnTuple = Builder.CreateInsertValue(ReturnTuple, V, {I}); } - return V; + + // Store new_vl + llvm::Value *V = Builder.CreateExtractValue(LoadValue, {NF}); + Builder.CreateStore(V, Address(Ops[Offset + 1], V->getType(), Align)); + + if (ReturnValue.isNull()) + return ReturnTuple; + else + return Builder.CreateStore(ReturnTuple, ReturnValue.getValue()); } - }] in { - defvar PV = PVString<nf, /*signed=*/true>.S; - defvar PUV = PVString<nf, /*signed=*/false>.S; - def : RVVBuiltin<"v", "0" # PV # "PCe" # "t", type>; - if !not(IsFloat<type>.val) then { - def : RVVBuiltin<"Uv", "0" # PUV # "PCUe" # "t", type>; + }] in { + defvar T = "(Tuple:" # nf # ")"; + def : RVVBuiltin<T # "v", T # "vPCePz", type>; + if !not(IsFloat<type>.val) then { + def : RVVBuiltin<T # "Uv", T # "UvPCUePz", type>; } } } } } -multiclass RVVIndexedSegLoad<string op> { +multiclass RVVStridedSegLoadTuple<string op> { foreach type = TypeList in { - foreach eew_info = EEWList in { - defvar eew = eew_info[0]; - defvar eew_type = eew_info[1]; + defvar eew = !cond(!eq(type, "c") : "8", + !eq(type, "s") : "16", + !eq(type, "i") : "32", + !eq(type, "l") : "64", + !eq(type, "x") : "16", + !eq(type, "f") : "32", + !eq(type, "d") : "64"); foreach nf = NFList in { - let Name = op # nf # "ei" # eew # "_v", + let Name = op # nf # "e" # eew # "_v", IRName = op # nf, - IRNameMask = op # nf # "_mask", + MaskedIRName = op # nf # "_mask", NF = nf, + RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin"], + []<string>), ManualCodegen = [{ { - // builtin: (val0 address, val1 address, ..., ptr, index, vl) - IntrinsicTypes = {Ops[0]->getType()->getPointerElementType(), - Ops[NF + 1]->getType(), Ops[NF + 2]->getType()}; - // intrinsic: (ptr, index, vl) - llvm::Value *Operands[] = {Ops[NF], Ops[NF + 1], Ops[NF + 2]}; - llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); - llvm::Value *LoadValue = Builder.CreateCall(F, Operands, ""); - clang::CharUnits Align = CharUnits::fromQuantity( - IntrinsicTypes[0]->getScalarSizeInBits() / 8); - llvm::Value *V; - for (unsigned I = 0; I < NF; ++I) { - V = Builder.CreateStore(Builder.CreateExtractValue(LoadValue, {I}), - Address(Ops[I], Align)); - } - return V; - } - }], - ManualCodegenMask = [{ - { - // builtin: (val0 address, ..., mask, maskedoff0, ..., ptr, index, vl) - IntrinsicTypes = {Ops[0]->getType()->getPointerElementType(), - Ops[2 * NF + 2]->getType(), Ops[2 * NF + 3]->getType()}; - // intrinsic: (maskedoff0, ..., ptr, index, mask, vl) + llvm::Type *ElementVectorType = cast<StructType>(ResultType)->elements()[0]; + IntrinsicTypes = {ElementVectorType, Ops.back()->getType()}; SmallVector<llvm::Value*, 12> Operands; - for (unsigned I = 0; I < NF; ++I) - Operands.push_back(Ops[NF + I + 1]); - Operands.push_back(Ops[2 * NF + 1]); - Operands.push_back(Ops[2 * NF + 2]); - Operands.push_back(Ops[NF]); - Operands.push_back(Ops[2 * NF + 3]); - assert(Operands.size() == NF + 4); + + bool NoPassthru = + (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) | + (!IsMasked && (PolicyAttrs & RVV_VTA)); + unsigned Offset = IsMasked ? NoPassthru ? 1 : 2 : NoPassthru ? 0 : 1; + + if (NoPassthru) { // Push poison into passthru + Operands.append(NF, llvm::PoisonValue::get(ElementVectorType)); + } else { // Push intrinsics operands into passthru + llvm::Value *PassthruOperand = IsMasked ? Ops[1] : Ops[0]; + for (unsigned I = 0; I < NF; ++I) + Operands.push_back(Builder.CreateExtractValue(PassthruOperand, {I})); + } + + Operands.push_back(Ops[Offset]); // Ptr + Operands.push_back(Ops[Offset + 1]); // Stride + if (IsMasked) + Operands.push_back(Ops[0]); + Operands.push_back(Ops[Offset + 2]); // VL + if (IsMasked) + Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); llvm::Value *LoadValue = Builder.CreateCall(F, Operands, ""); - clang::CharUnits Align = CharUnits::fromQuantity( - IntrinsicTypes[0]->getScalarSizeInBits() / 8); - llvm::Value *V; - for (unsigned I = 0; I < NF; ++I) { - V = Builder.CreateStore(Builder.CreateExtractValue(LoadValue, {I}), - Address(Ops[I], Align)); - } - return V; + + if (ReturnValue.isNull()) + return LoadValue; + else + return Builder.CreateStore(LoadValue, ReturnValue.getValue()); } - }] in { - defvar PV = PVString<nf, /*signed=*/true>.S; - defvar PUV = PVString<nf, /*signed=*/false>.S; - def : RVVBuiltin<"v", "0" # PV # "PCe" # eew_type # "Uv", type>; - if !not(IsFloat<type>.val) then { - def : RVVBuiltin<"Uv", "0" # PUV # "PCUe" # eew_type # "Uv", type>; - } + }] in { + defvar T = "(Tuple:" # nf # ")"; + def : RVVBuiltin<T # "v", T # "vPCet", type>; + if !not(IsFloat<type>.val) then { + def : RVVBuiltin<T # "Uv", T # "UvPCUet", type>; } } } } } -class VString<int nf, bit signed> { - string S = !cond(!eq(nf, 2): !if(signed, "vv", "UvUv"), - !eq(nf, 3): !if(signed, "vvv", "UvUvUv"), - !eq(nf, 4): !if(signed, "vvvv", "UvUvUvUv"), - !eq(nf, 5): !if(signed, "vvvvv", "UvUvUvUvUv"), - !eq(nf, 6): !if(signed, "vvvvvv", "UvUvUvUvUvUv"), - !eq(nf, 7): !if(signed, "vvvvvvv", "UvUvUvUvUvUvUv"), - !eq(nf, 8): !if(signed, "vvvvvvvv", "UvUvUvUvUvUvUvUv")); -} - -multiclass RVVUnitStridedSegStore<string op> { +multiclass RVVStridedSegStoreTuple<string op> { foreach type = TypeList in { defvar eew = !cond(!eq(type, "c") : "8", !eq(type, "s") : "16", @@ -1091,85 +987,111 @@ multiclass RVVUnitStridedSegStore<string op> { foreach nf = NFList in { let Name = op # nf # "e" # eew # "_v", IRName = op # nf, - IRNameMask = op # nf # "_mask", + MaskedIRName = op # nf # "_mask", NF = nf, HasMaskedOffOperand = false, + MaskedPolicyScheme = NonePolicy, + RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin"], + []<string>), ManualCodegen = [{ { - // Builtin: (ptr, val0, val1, ..., vl) - // Intrinsic: (val0, val1, ..., ptr, vl) - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); - IntrinsicTypes = {Ops[0]->getType(), Ops[NF + 1]->getType()}; - assert(Ops.size() == NF + 2); - } - }], - ManualCodegenMask = [{ - { - // Builtin: (mask, ptr, val0, val1, ..., vl) - // Intrinsic: (val0, val1, ..., ptr, mask, vl) - std::rotate(Ops.begin(), Ops.begin() + 2, Ops.end() - 1); - std::swap(Ops[NF], Ops[NF + 1]); - IntrinsicTypes = {Ops[0]->getType(), Ops[NF + 2]->getType()}; - assert(Ops.size() == NF + 3); + // Masked + // Builtin: (mask, ptr, stride, v_tuple, vl) + // Intrinsic: (val0, val1, ..., ptr, stride, mask, vl) + // Unmasked + // Builtin: (ptr, stride, v_tuple, vl) + // Intrinsic: (val0, val1, ..., ptr, stride, vl) + unsigned Offset = IsMasked ? 1 : 0; + llvm::Value *VTupleOperand = Ops[Offset + 2]; + + SmallVector<llvm::Value*, 12> Operands; + for (unsigned I = 0; I < NF; ++I) { + llvm::Value *V = Builder.CreateExtractValue(VTupleOperand, {I}); + Operands.push_back(V); + } + Operands.push_back(Ops[Offset]); // Ptr + Operands.push_back(Ops[Offset + 1]); // Stride + if (IsMasked) + Operands.push_back(Ops[0]); + Operands.push_back(Ops[Offset + 3]); // VL + + IntrinsicTypes = {Operands[0]->getType(), Operands.back()->getType()}; + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + return Builder.CreateCall(F, Operands, ""); } }] in { - defvar V = VString<nf, /*signed=*/true>.S; - defvar UV = VString<nf, /*signed=*/false>.S; - def : RVVBuiltin<"v", "0Pe" # V, type>; - if !not(IsFloat<type>.val) then { - def : RVVBuiltin<"Uv", "0PUe" # UV, type>; + defvar T = "(Tuple:" # nf # ")"; + def : RVVBuiltin<T # "v", "0Pet" # T # "v", type>; + if !not(IsFloat<type>.val) then { + def : RVVBuiltin<T # "Uv", "0PUet" # T # "Uv", type>; } } } } } -multiclass RVVStridedSegStore<string op> { +multiclass RVVIndexedSegLoadTuple<string op> { foreach type = TypeList in { - defvar eew = !cond(!eq(type, "c") : "8", - !eq(type, "s") : "16", - !eq(type, "i") : "32", - !eq(type, "l") : "64", - !eq(type, "x") : "16", - !eq(type, "f") : "32", - !eq(type, "d") : "64"); + foreach eew_info = EEWList in { + defvar eew = eew_info[0]; + defvar eew_type = eew_info[1]; foreach nf = NFList in { - let Name = op # nf # "e" # eew # "_v", + let Name = op # nf # "ei" # eew # "_v", IRName = op # nf, - IRNameMask = op # nf # "_mask", + MaskedIRName = op # nf # "_mask", NF = nf, - HasMaskedOffOperand = false, + RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin"], + []<string>), ManualCodegen = [{ { - // Builtin: (ptr, stride, val0, val1, ..., vl). - // Intrinsic: (val0, val1, ..., ptr, stride, vl) - std::rotate(Ops.begin(), Ops.begin() + 2, Ops.end() - 1); - IntrinsicTypes = {Ops[0]->getType(), Ops[NF + 1]->getType()}; - assert(Ops.size() == NF + 3); - } - }], - ManualCodegenMask = [{ - { - // Builtin: (mask, ptr, stride, val0, val1, ..., vl). - // Intrinsic: (val0, val1, ..., ptr, stride, mask, vl) - std::rotate(Ops.begin(), Ops.begin() + 3, Ops.end() - 1); - std::rotate(Ops.begin() + NF, Ops.begin() + NF + 1, Ops.begin() + NF + 3); - IntrinsicTypes = {Ops[0]->getType(), Ops[NF + 1]->getType()}; - assert(Ops.size() == NF + 4); + llvm::Type *ElementVectorType = cast<StructType>(ResultType)->elements()[0]; + IntrinsicTypes = {ElementVectorType, Ops.back()->getType()}; + SmallVector<llvm::Value*, 12> Operands; + + bool NoPassthru = + (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) | + (!IsMasked && (PolicyAttrs & RVV_VTA)); + unsigned Offset = IsMasked ? NoPassthru ? 1 : 2 : NoPassthru ? 0 : 1; + + if (NoPassthru) { // Push poison into passthru + Operands.append(NF, llvm::PoisonValue::get(ElementVectorType)); + } else { // Push intrinsics operands into passthru + llvm::Value *PassthruOperand = IsMasked ? Ops[1] : Ops[0]; + for (unsigned I = 0; I < NF; ++I) + Operands.push_back(Builder.CreateExtractValue(PassthruOperand, {I})); + } + + Operands.push_back(Ops[Offset]); // Ptr + Operands.push_back(Ops[Offset + 1]); // Idx + if (IsMasked) + Operands.push_back(Ops[0]); + Operands.push_back(Ops[Offset + 2]); // VL + if (IsMasked) + Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + + IntrinsicTypes = {ElementVectorType, Ops[Offset + 1]->getType(), + Ops.back()->getType()}; + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + llvm::Value *LoadValue = Builder.CreateCall(F, Operands, ""); + + if (ReturnValue.isNull()) + return LoadValue; + else + return Builder.CreateStore(LoadValue, ReturnValue.getValue()); } - }] in { - defvar V = VString<nf, /*signed=*/true>.S; - defvar UV = VString<nf, /*signed=*/false>.S; - def : RVVBuiltin<"v", "0Pet" # V, type>; + }] in { + defvar T = "(Tuple:" # nf # ")"; + def : RVVBuiltin<T # "v", T # "vPCe" # eew_type # "Uv", type>; if !not(IsFloat<type>.val) then { - def : RVVBuiltin<"Uv", "0PUet" # UV, type>; + def : RVVBuiltin<T # "Uv", T # "UvPCUe" # eew_type # "Uv", type>; + } } } } } } -multiclass RVVIndexedSegStore<string op> { +multiclass RVVIndexedSegStoreTuple<string op> { foreach type = TypeList in { foreach eew_info = EEWList in { defvar eew = eew_info[0]; @@ -1177,35 +1099,44 @@ multiclass RVVIndexedSegStore<string op> { foreach nf = NFList in { let Name = op # nf # "ei" # eew # "_v", IRName = op # nf, - IRNameMask = op # nf # "_mask", + MaskedIRName = op # nf # "_mask", NF = nf, HasMaskedOffOperand = false, + MaskedPolicyScheme = NonePolicy, + RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin"], + []<string>), ManualCodegen = [{ { - // Builtin: (ptr, index, val0, val1, ..., vl) - // Intrinsic: (val0, val1, ..., ptr, index, vl) - std::rotate(Ops.begin(), Ops.begin() + 2, Ops.end() - 1); - IntrinsicTypes = {Ops[0]->getType(), - Ops[NF + 1]->getType(), Ops[NF + 2]->getType()}; - assert(Ops.size() == NF + 3); - } - }], - ManualCodegenMask = [{ - { - // Builtin: (mask, ptr, index, val0, val1, ..., vl) + // Masked + // Builtin: (mask, ptr, index, v_tuple, vl) // Intrinsic: (val0, val1, ..., ptr, index, mask, vl) - std::rotate(Ops.begin(), Ops.begin() + 3, Ops.end() - 1); - std::rotate(Ops.begin() + NF, Ops.begin() + NF + 1, Ops.begin() + NF + 3); - IntrinsicTypes = {Ops[0]->getType(), - Ops[NF + 1]->getType(), Ops[NF + 3]->getType()}; - assert(Ops.size() == NF + 4); + // Unmasked + // Builtin: (ptr, index, v_tuple, vl) + // Intrinsic: (val0, val1, ..., ptr, index, vl) + unsigned Offset = IsMasked ? 1 : 0; + llvm::Value *VTupleOperand = Ops[Offset + 2]; + + SmallVector<llvm::Value*, 12> Operands; + for (unsigned I = 0; I < NF; ++I) { + llvm::Value *V = Builder.CreateExtractValue(VTupleOperand, {I}); + Operands.push_back(V); + } + Operands.push_back(Ops[Offset]); // Ptr + Operands.push_back(Ops[Offset + 1]); // Idx + if (IsMasked) + Operands.push_back(Ops[0]); + Operands.push_back(Ops[Offset + 3]); // VL + + IntrinsicTypes = {Operands[0]->getType(), Ops[Offset + 1]->getType(), + Operands.back()->getType()}; + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + return Builder.CreateCall(F, Operands, ""); } }] in { - defvar V = VString<nf, /*signed=*/true>.S; - defvar UV = VString<nf, /*signed=*/false>.S; - def : RVVBuiltin<"v", "0Pe" # eew_type # "Uv" # V, type>; + defvar T = "(Tuple:" # nf # ")"; + def : RVVBuiltin<T # "v", "0Pe" # eew_type # "Uv" # T # "v", type>; if !not(IsFloat<type>.val) then { - def : RVVBuiltin<"Uv", "0PUe" # eew_type # "Uv" # UV, type>; + def : RVVBuiltin<T # "Uv", "0PUe" # eew_type # "Uv" # T # "Uv", type>; } } } @@ -1213,358 +1144,39 @@ multiclass RVVIndexedSegStore<string op> { } } -multiclass RVVAMOBuiltinSet<bit has_signed = false, bit has_unsigned = false, - bit has_fp = false> { - defvar type_list = !if(has_fp, ["i","l","f","d"], ["i","l"]); - foreach type = type_list in - foreach eew_list = EEWList in { - defvar eew = eew_list[0]; - defvar eew_index = eew_list[1]; - let Name = NAME # "ei" # eew # "_" # "v", - IRName = NAME, - IRNameMask = NAME # "_mask", - HasMaskedOffOperand = false, - ManualCodegen = [{ - // base, bindex, value, vl - IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[3]->getType()}; - Ops[0] = Builder.CreateBitCast(Ops[0], ResultType->getPointerTo()); - }], - ManualCodegenMask = [{ - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); - IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[4]->getType()}; - Ops[0] = Builder.CreateBitCast(Ops[0], ResultType->getPointerTo()); - }] in { - if has_signed then - def : RVVBuiltin<"v", "vPe" # eew_index # "Uvv", type>; - if !and(!not(IsFloat<type>.val), has_unsigned) then - def : RVVBuiltin<"Uv", "UvPUe" # eew_index # "UvUv", type>; - } - } -} - -multiclass RVVPseudoUnaryBuiltin<string IR, string type_range> { - let Name = NAME, - IRName = IR, - IRNameMask = IR # "_mask", - ManualCodegen = [{ - { - // op1, vl - IntrinsicTypes = {ResultType, - cast<llvm::VectorType>(ResultType)->getElementType(), - Ops[1]->getType()}; - Ops.insert(Ops.begin() + 1, llvm::Constant::getNullValue(IntrinsicTypes[1])); - break; - } - }], - ManualCodegenMask = [{ - { - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); - // maskedoff, op1, mask, vl - IntrinsicTypes = {ResultType, - cast<llvm::VectorType>(ResultType)->getElementType(), - Ops[3]->getType()}; - Ops.insert(Ops.begin() + 2, llvm::Constant::getNullValue(IntrinsicTypes[1])); - break; - } - }] in { - def : RVVBuiltin<"v", "vv", type_range>; - } -} - -multiclass RVVPseudoVNotBuiltin<string IR, string type_range> { - let Name = NAME, - IRName = IR, - IRNameMask = IR # "_mask", - ManualCodegen = [{ - { - // op1, vl - IntrinsicTypes = {ResultType, - cast<llvm::VectorType>(ResultType)->getElementType(), - Ops[1]->getType()}; - Ops.insert(Ops.begin() + 1, - llvm::Constant::getAllOnesValue(IntrinsicTypes[1])); - break; - } - }], - ManualCodegenMask = [{ - { - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); - // maskedoff, op1, mask, vl - IntrinsicTypes = {ResultType, - cast<llvm::VectorType>(ResultType)->getElementType(), - Ops[3]->getType()}; - Ops.insert(Ops.begin() + 2, - llvm::Constant::getAllOnesValue(IntrinsicTypes[1])); - break; - } - }] in { - def : RVVBuiltin<"v", "vv", type_range>; - def : RVVBuiltin<"Uv", "UvUv", type_range>; - } -} - -multiclass RVVPseudoMaskBuiltin<string IR, string type_range> { - let Name = NAME, - IRName = IR, - HasMask = false, - ManualCodegen = [{ - { - // op1, vl - IntrinsicTypes = {ResultType, - Ops[1]->getType()}; - Ops.insert(Ops.begin() + 1, Ops[0]); - break; - } - }] in { - def : RVVBuiltin<"m", "mm", type_range>; - } -} - -multiclass RVVPseudoVFUnaryBuiltin<string IR, string type_range> { - let Name = NAME, - IRName = IR, - IRNameMask = IR # "_mask", - ManualCodegen = [{ - { - // op1, vl - IntrinsicTypes = {ResultType, - Ops[0]->getType(), Ops[1]->getType()}; - Ops.insert(Ops.begin() + 1, Ops[0]); - break; - } - }], - ManualCodegenMask = [{ - { - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); - // maskedoff, op1, mask, vl - IntrinsicTypes = {ResultType, - Ops[1]->getType(), - Ops[3]->getType()}; - Ops.insert(Ops.begin() + 2, Ops[1]); - break; - } - }] in { - def : RVVBuiltin<"v", "vv", type_range>; - } -} - -multiclass RVVPseudoVWCVTBuiltin<string IR, string MName, string type_range, - list<list<string>> suffixes_prototypes> { - let Name = NAME, - MangledName = MName, - IRName = IR, - IRNameMask = IR # "_mask", - ManualCodegen = [{ - { - // op1, vl - IntrinsicTypes = {ResultType, - Ops[0]->getType(), - cast<llvm::VectorType>(Ops[0]->getType())->getElementType(), - Ops[1]->getType()}; - Ops.insert(Ops.begin() + 1, llvm::Constant::getNullValue(IntrinsicTypes[2])); - break; - } - }], - ManualCodegenMask = [{ - { - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); - // maskedoff, op1, mask, vl - IntrinsicTypes = {ResultType, - Ops[1]->getType(), - cast<llvm::VectorType>(Ops[1]->getType())->getElementType(), - Ops[3]->getType()}; - Ops.insert(Ops.begin() + 2, llvm::Constant::getNullValue(IntrinsicTypes[2])); - break; - } - }] in { - foreach s_p = suffixes_prototypes in { - def : RVVBuiltin<s_p[0], s_p[1], type_range>; - } - } -} - -multiclass RVVPseudoVNCVTBuiltin<string IR, string MName, string type_range, - list<list<string>> suffixes_prototypes> { - let Name = NAME, - MangledName = MName, - IRName = IR, - IRNameMask = IR # "_mask", - ManualCodegen = [{ - { - // op1, vl - IntrinsicTypes = {ResultType, - Ops[0]->getType(), - Ops[1]->getType(), - Ops[1]->getType()}; - Ops.insert(Ops.begin() + 1, llvm::Constant::getNullValue(IntrinsicTypes[2])); - break; - } - }], - ManualCodegenMask = [{ - { - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); - // maskedoff, op1, mask, vl - IntrinsicTypes = {ResultType, - Ops[1]->getType(), - Ops[3]->getType(), - Ops[3]->getType()}; - Ops.insert(Ops.begin() + 2, llvm::Constant::getNullValue(IntrinsicTypes[2])); - break; - } - }] in { - foreach s_p = suffixes_prototypes in { - def : RVVBuiltin<s_p[0], s_p[1], type_range>; - } - } -} - -// 6. Configuration-Setting Instructions -// 6.1. vsetvli/vsetvl instructions -let HasVL = false, - HasMask = false, - HasSideEffects = true, - Log2LMUL = [0], - ManualCodegen = [{IntrinsicTypes = {ResultType};}] in // Set XLEN type -{ - // vsetvl is a macro because for it require constant integers in SEW and LMUL. - let HeaderCode = -[{ -#define vsetvl_e8mf8(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 5) -#define vsetvl_e8mf4(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 6) -#define vsetvl_e8mf2(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 7) -#define vsetvl_e8m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 0) -#define vsetvl_e8m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 1) -#define vsetvl_e8m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 2) -#define vsetvl_e8m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 3) - -#define vsetvl_e16mf4(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 6) -#define vsetvl_e16mf2(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 7) -#define vsetvl_e16m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 0) -#define vsetvl_e16m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 1) -#define vsetvl_e16m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 2) -#define vsetvl_e16m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 3) - -#define vsetvl_e32mf2(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 7) -#define vsetvl_e32m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 0) -#define vsetvl_e32m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 1) -#define vsetvl_e32m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 2) -#define vsetvl_e32m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 3) - -#define vsetvl_e64m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 0) -#define vsetvl_e64m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 1) -#define vsetvl_e64m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 2) -#define vsetvl_e64m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 3) - -}] in - def vsetvli : RVVBuiltin<"", "zzKzKz", "i">; - - let HeaderCode = -[{ -#define vsetvlmax_e8mf8() __builtin_rvv_vsetvlimax(0, 5) -#define vsetvlmax_e8mf4() __builtin_rvv_vsetvlimax(0, 6) -#define vsetvlmax_e8mf2() __builtin_rvv_vsetvlimax(0, 7) -#define vsetvlmax_e8m1() __builtin_rvv_vsetvlimax(0, 0) -#define vsetvlmax_e8m2() __builtin_rvv_vsetvlimax(0, 1) -#define vsetvlmax_e8m4() __builtin_rvv_vsetvlimax(0, 2) -#define vsetvlmax_e8m8() __builtin_rvv_vsetvlimax(0, 3) - -#define vsetvlmax_e16mf4() __builtin_rvv_vsetvlimax(1, 6) -#define vsetvlmax_e16mf2() __builtin_rvv_vsetvlimax(1, 7) -#define vsetvlmax_e16m1() __builtin_rvv_vsetvlimax(1, 0) -#define vsetvlmax_e16m2() __builtin_rvv_vsetvlimax(1, 1) -#define vsetvlmax_e16m4() __builtin_rvv_vsetvlimax(1, 2) -#define vsetvlmax_e16m8() __builtin_rvv_vsetvlimax(1, 3) - -#define vsetvlmax_e32mf2() __builtin_rvv_vsetvlimax(2, 7) -#define vsetvlmax_e32m1() __builtin_rvv_vsetvlimax(2, 0) -#define vsetvlmax_e32m2() __builtin_rvv_vsetvlimax(2, 1) -#define vsetvlmax_e32m4() __builtin_rvv_vsetvlimax(2, 2) -#define vsetvlmax_e32m8() __builtin_rvv_vsetvlimax(2, 3) - -#define vsetvlmax_e64m1() __builtin_rvv_vsetvlimax(3, 0) -#define vsetvlmax_e64m2() __builtin_rvv_vsetvlimax(3, 1) -#define vsetvlmax_e64m4() __builtin_rvv_vsetvlimax(3, 2) -#define vsetvlmax_e64m8() __builtin_rvv_vsetvlimax(3, 3) - -}] in - def vsetvlimax : RVVBuiltin<"", "zKzKz", "i">; -} - -// 7. Vector Loads and Stores -// 7.4. Vector Unit-Stride Instructions -def vle1: RVVVLEMaskBuiltin; -defm vle8: RVVVLEBuiltin<["c"]>; -defm vle16: RVVVLEBuiltin<["s","x"]>; -defm vle32: RVVVLEBuiltin<["i","f"]>; -defm vle64: RVVVLEBuiltin<["l","d"]>; - -def vse1 : RVVVSEMaskBuiltin; -defm vse8 : RVVVSEBuiltin<["c"]>; -defm vse16: RVVVSEBuiltin<["s","x"]>; -defm vse32: RVVVSEBuiltin<["i","f"]>; -defm vse64: RVVVSEBuiltin<["l","d"]>; - -// 7.5. Vector Strided Instructions -defm vlse8: RVVVLSEBuiltin<["c"]>; -defm vlse16: RVVVLSEBuiltin<["s","x"]>; -defm vlse32: RVVVLSEBuiltin<["i","f"]>; -defm vlse64: RVVVLSEBuiltin<["l","d"]>; - -defm vsse8 : RVVVSSEBuiltin<["c"]>; -defm vsse16: RVVVSSEBuiltin<["s","x"]>; -defm vsse32: RVVVSSEBuiltin<["i","f"]>; -defm vsse64: RVVVSSEBuiltin<["l","d"]>; - -// 7.6. Vector Indexed Instructions -defm : RVVIndexedLoad<"vluxei">; -defm : RVVIndexedLoad<"vloxei">; - -defm : RVVIndexedStore<"vsuxei">; -defm : RVVIndexedStore<"vsoxei">; - -// 7.7. Unit-stride Fault-Only-First Loads -defm vle8ff: RVVVLEFFBuiltin<["c"]>; -defm vle16ff: RVVVLEFFBuiltin<["s","x"]>; -defm vle32ff: RVVVLEFFBuiltin<["i", "f"]>; -defm vle64ff: RVVVLEFFBuiltin<["l", "d"]>; - // 7.8 Vector Load/Store Segment Instructions -let RequiredExtension = "Zvlsseg" in { -defm : RVVUnitStridedSegLoad<"vlseg">; -defm : RVVUnitStridedSegLoadFF<"vlseg">; -defm : RVVStridedSegLoad<"vlsseg">; -defm : RVVIndexedSegLoad<"vluxseg">; -defm : RVVIndexedSegLoad<"vloxseg">; -defm : RVVUnitStridedSegStore<"vsseg">; -defm : RVVStridedSegStore<"vssseg">; -defm : RVVIndexedSegStore<"vsuxseg">; -defm : RVVIndexedSegStore<"vsoxseg">; -} - -// 8. Vector AMO Operations -let RequiredExtension = "Zvamo" in { -defm vamoswap : RVVAMOBuiltinSet< /* hasSigned */ true, /* hasUnsigned */ true, /* hasFP */ true>; -defm vamoadd : RVVAMOBuiltinSet< /* hasSigned */ true, /* hasUnsigned */ true>; -defm vamoxor : RVVAMOBuiltinSet< /* hasSigned */ true, /* hasUnsigned */ true>; -defm vamoand : RVVAMOBuiltinSet< /* hasSigned */ true, /* hasUnsigned */ true>; -defm vamoor : RVVAMOBuiltinSet< /* hasSigned */ true, /* hasUnsigned */ true>; -defm vamomin : RVVAMOBuiltinSet< /* hasSigned */ true>; -defm vamomax : RVVAMOBuiltinSet< /* hasSigned */ true>; -defm vamominu : RVVAMOBuiltinSet< /* hasSigned */ false, /* hasUnsigned */ true>; -defm vamomaxu : RVVAMOBuiltinSet< /* hasSigned */ false, /* hasUnsigned */ true>; -} - -// 12. Vector Integer Arithmetic Instructions -// 12.1. Vector Single-Width Integer Add and Subtract +let UnMaskedPolicyScheme = HasPassthruOperand, + IsTuple = true in { + defm : RVVUnitStridedSegLoadTuple<"vlseg">; + defm : RVVUnitStridedSegLoadFFTuple<"vlseg">; + defm : RVVStridedSegLoadTuple<"vlsseg">; + defm : RVVIndexedSegLoadTuple<"vluxseg">; + defm : RVVIndexedSegLoadTuple<"vloxseg">; +} + +let UnMaskedPolicyScheme = NonePolicy, + MaskedPolicyScheme = NonePolicy, + IsTuple = true in { +defm : RVVUnitStridedSegStoreTuple<"vsseg">; +defm : RVVStridedSegStoreTuple<"vssseg">; +defm : RVVIndexedSegStoreTuple<"vsuxseg">; +defm : RVVIndexedSegStoreTuple<"vsoxseg">; +} + +// 11. Vector Integer Arithmetic Instructions +// 11.1. Vector Single-Width Integer Add and Subtract +let UnMaskedPolicyScheme = HasPassthruOperand in { defm vadd : RVVIntBinBuiltinSet; defm vsub : RVVIntBinBuiltinSet; defm vrsub : RVVOutOp1BuiltinSet<"vrsub", "csil", [["vx", "v", "vve"], ["vx", "Uv", "UvUvUe"]]>; +} defm vneg_v : RVVPseudoUnaryBuiltin<"vrsub", "csil">; -// 12.2. Vector Widening Integer Add/Subtract +// 11.2. Vector Widening Integer Add/Subtract // Widening unsigned integer add/subtract, 2*SEW = SEW +/- SEW +let UnMaskedPolicyScheme = HasPassthruOperand in { defm vwaddu : RVVUnsignedWidenBinBuiltinSet; defm vwsubu : RVVUnsignedWidenBinBuiltinSet; // Widening signed integer add/subtract, 2*SEW = SEW +/- SEW @@ -1576,12 +1188,14 @@ defm vwsubu : RVVUnsignedWidenOp0BinBuiltinSet; // Widening signed integer add/subtract, 2*SEW = 2*SEW +/- SEW defm vwadd : RVVSignedWidenOp0BinBuiltinSet; defm vwsub : RVVSignedWidenOp0BinBuiltinSet; +} defm vwcvtu_x_x_v : RVVPseudoVWCVTBuiltin<"vwaddu", "vwcvtu_x", "csi", [["Uw", "UwUv"]]>; defm vwcvt_x_x_v : RVVPseudoVWCVTBuiltin<"vwadd", "vwcvt_x", "csi", [["w", "wv"]]>; -// 12.3. Vector Integer Extension +// 11.3. Vector Integer Extension +let UnMaskedPolicyScheme = HasPassthruOperand in { let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { def vsext_vf2 : RVVIntExt<"vsext", "w", "wv", "csi">; def vzext_vf2 : RVVIntExt<"vzext", "Uw", "UwUv", "csi">; @@ -1594,36 +1208,45 @@ let Log2LMUL = [-3, -2, -1, 0] in { def vsext_vf8 : RVVIntExt<"vsext", "o", "ov", "c">; def vzext_vf8 : RVVIntExt<"vzext", "Uo", "UoUv", "c">; } +} -// 12.4. Vector Integer Add-with-Carry / Subtract-with-Borrow Instructions -let HasMask = false in { - defm vadc : RVVCarryinBuiltinSet; +// 11.4. Vector Integer Add-with-Carry / Subtract-with-Borrow Instructions +let HasMasked = false, MaskedPolicyScheme = NonePolicy in { + let UnMaskedPolicyScheme = HasPassthruOperand in { + defm vadc : RVVCarryinBuiltinSet; + defm vsbc : RVVCarryinBuiltinSet; + } defm vmadc : RVVCarryOutInBuiltinSet<"vmadc_carry_in">; defm vmadc : RVVIntMaskOutBuiltinSet; - defm vsbc : RVVCarryinBuiltinSet; defm vmsbc : RVVCarryOutInBuiltinSet<"vmsbc_borrow_in">; defm vmsbc : RVVIntMaskOutBuiltinSet; } -// 12.5. Vector Bitwise Logical Instructions +// 11.5. Vector Bitwise Logical Instructions +let UnMaskedPolicyScheme = HasPassthruOperand in { defm vand : RVVIntBinBuiltinSet; defm vxor : RVVIntBinBuiltinSet; defm vor : RVVIntBinBuiltinSet; +} defm vnot_v : RVVPseudoVNotBuiltin<"vxor", "csil">; -// 12.6. Vector Single-Width Bit Shift Instructions +// 11.6. Vector Single-Width Shift Instructions +let UnMaskedPolicyScheme = HasPassthruOperand in { defm vsll : RVVShiftBuiltinSet; defm vsrl : RVVUnsignedShiftBuiltinSet; defm vsra : RVVSignedShiftBuiltinSet; -// 12.7. Vector Narrowing Integer Right Shift Instructions +// 11.7. Vector Narrowing Integer Right Shift Instructions defm vnsrl : RVVUnsignedNShiftBuiltinSet; defm vnsra : RVVSignedNShiftBuiltinSet; +} defm vncvt_x_x_w : RVVPseudoVNCVTBuiltin<"vnsrl", "vncvt_x", "csi", [["v", "vw"], ["Uv", "UvUw"]]>; -// 12.8. Vector Integer Comparison Instructions +// 11.8. Vector Integer Compare Instructions +let MaskedPolicyScheme = HasPassthruOperand, + HasTailPolicy = false in { defm vmseq : RVVIntMaskOutBuiltinSet; defm vmsne : RVVIntMaskOutBuiltinSet; defm vmsltu : RVVUnsignedMaskOutBuiltinSet; @@ -1634,14 +1257,16 @@ defm vmsgtu : RVVUnsignedMaskOutBuiltinSet; defm vmsgt : RVVSignedMaskOutBuiltinSet; defm vmsgeu : RVVUnsignedMaskOutBuiltinSet; defm vmsge : RVVSignedMaskOutBuiltinSet; +} -// 12.9. Vector Integer Min/Max Instructions +// 11.9. Vector Integer Min/Max Instructions +let UnMaskedPolicyScheme = HasPassthruOperand in { defm vminu : RVVUnsignedBinBuiltinSet; defm vmin : RVVSignedBinBuiltinSet; defm vmaxu : RVVUnsignedBinBuiltinSet; defm vmax : RVVSignedBinBuiltinSet; -// 12.10. Vector Single-Width Integer Multiply Instructions +// 11.10. Vector Single-Width Integer Multiply Instructions defm vmul : RVVIntBinBuiltinSet; defm vmulh : RVVSignedBinBuiltinSet; defm vmulhu : RVVUnsignedBinBuiltinSet; @@ -1649,14 +1274,15 @@ defm vmulhsu : RVVOutOp1BuiltinSet<"vmulhsu", "csil", [["vv", "v", "vvUv"], ["vx", "v", "vvUe"]]>; -// 12.11. Vector Integer Divide Instructions +// 11.11. Vector Integer Divide Instructions defm vdivu : RVVUnsignedBinBuiltinSet; defm vdiv : RVVSignedBinBuiltinSet; defm vremu : RVVUnsignedBinBuiltinSet; defm vrem : RVVSignedBinBuiltinSet; +} -// 12.12. Vector Widening Integer Multiply Instructions -let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { +// 11.12. Vector Widening Integer Multiply Instructions +let Log2LMUL = [-3, -2, -1, 0, 1, 2], UnMaskedPolicyScheme = HasPassthruOperand in { defm vwmul : RVVOutOp0Op1BuiltinSet<"vwmul", "csi", [["vv", "w", "wvv"], ["vx", "w", "wve"]]>; @@ -1668,13 +1294,14 @@ defm vwmulsu : RVVOutOp0Op1BuiltinSet<"vwmulsu", "csi", ["vx", "w", "wvUe"]]>; } -// 12.13. Vector Single-Width Integer Multiply-Add Instructions +// 11.13. Vector Single-Width Integer Multiply-Add Instructions +let UnMaskedPolicyScheme = HasPolicyOperand in { defm vmacc : RVVIntTerBuiltinSet; defm vnmsac : RVVIntTerBuiltinSet; defm vmadd : RVVIntTerBuiltinSet; defm vnmsub : RVVIntTerBuiltinSet; -// 12.14. Vector Widening Integer Multiply-Add Instructions +// 11.14. Vector Widening Integer Multiply-Add Instructions let HasMaskedOffOperand = false, Log2LMUL = [-3, -2, -1, 0, 1, 2] in { defm vwmaccu : RVVOutOp1Op2BuiltinSet<"vwmaccu", "csi", @@ -1689,184 +1316,713 @@ defm vwmaccsu : RVVOutOp1Op2BuiltinSet<"vwmaccsu", "csi", defm vwmaccus : RVVOutOp1Op2BuiltinSet<"vwmaccus", "csi", [["vx", "w", "wwUev"]]>; } +} -// 12.15. Vector Integer Merge Instructions -// C/C++ Operand: (mask, op1, op2, vl), Intrinsic: (op1, op2, mask, vl) -let HasMask = false, +// 11.15. Vector Integer Merge Instructions +// C/C++ Operand: (mask, op1, op2, vl), Intrinsic: (passthru, op1, op2, mask, vl) +let HasMasked = false, + UnMaskedPolicyScheme = HasPassthruOperand, + MaskedPolicyScheme = NonePolicy, ManualCodegen = [{ - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.begin() + 3); - IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[3]->getType()}; + // insert poison passthru + if (PolicyAttrs & RVV_VTA) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + IntrinsicTypes = {ResultType, Ops[2]->getType(), Ops.back()->getType()}; }] in { defm vmerge : RVVOutOp1BuiltinSet<"vmerge", "csil", - [["vvm", "v", "vmvv"], - ["vxm", "v", "vmve"], - ["vvm", "Uv", "UvmUvUv"], - ["vxm", "Uv", "UvmUvUe"]]>; + [["vvm", "v", "vvvm"], + ["vxm", "v", "vvem"], + ["vvm", "Uv", "UvUvUvm"], + ["vxm", "Uv", "UvUvUem"]]>; } -// 12.16. Vector Integer Move Instructions -let HasMask = false in { - let MangledName = "vmv_v" in { +// 11.16. Vector Integer Move Instructions +let HasMasked = false, + UnMaskedPolicyScheme = HasPassthruOperand, + MaskedPolicyScheme = NonePolicy, + OverloadedName = "vmv_v" in { defm vmv_v : RVVOutBuiltinSet<"vmv_v_v", "csil", [["v", "Uv", "UvUv"]]>; - defm vmv_v : RVVOutBuiltinSet<"vmv_v_v", "csilxfd", + defm vmv_v : RVVOutBuiltinSet<"vmv_v_v", "csilfd", [["v", "v", "vv"]]>; - } - let HasNoMaskedOverloaded = false in + let RequiredFeatures = ["Zvfhmin"] in + defm vmv_v : RVVOutBuiltinSet<"vmv_v_v", "x", + [["v", "v", "vv"]]>; + let SupportOverloading = false in defm vmv_v : RVVOutBuiltinSet<"vmv_v_x", "csil", [["x", "v", "ve"], ["x", "Uv", "UvUe"]]>; } -// 13. Vector Fixed-Point Arithmetic Instructions -// 13.1. Vector Single-Width Saturating Add and Subtract +// 12. Vector Fixed-Point Arithmetic Instructions +let HeaderCode = +[{ +enum __RISCV_VXRM { + __RISCV_VXRM_RNU = 0, + __RISCV_VXRM_RNE = 1, + __RISCV_VXRM_RDN = 2, + __RISCV_VXRM_ROD = 3, +}; +}] in +def vxrm_enum : RVVHeader; + +// 12.1. Vector Single-Width Saturating Add and Subtract +let UnMaskedPolicyScheme = HasPassthruOperand in { defm vsaddu : RVVUnsignedBinBuiltinSet; defm vsadd : RVVSignedBinBuiltinSet; defm vssubu : RVVUnsignedBinBuiltinSet; defm vssub : RVVSignedBinBuiltinSet; -// 13.2. Vector Single-Width Averaging Add and Subtract -defm vaaddu : RVVUnsignedBinBuiltinSet; -defm vaadd : RVVSignedBinBuiltinSet; -defm vasubu : RVVUnsignedBinBuiltinSet; -defm vasub : RVVSignedBinBuiltinSet; - -// 13.3. Vector Single-Width Fractional Multiply with Rounding and Saturation -defm vsmul : RVVSignedBinBuiltinSet; - -// 13.4. Vector Single-Width Scaling Shift Instructions -defm vssrl : RVVUnsignedShiftBuiltinSet; -defm vssra : RVVSignedShiftBuiltinSet; - -// 13.5. Vector Narrowing Fixed-Point Clip Instructions -defm vnclipu : RVVUnsignedNShiftBuiltinSet; -defm vnclip : RVVSignedNShiftBuiltinSet; - -// 14. Vector Floating-Point Instructions -// 14.2. Vector Single-Width Floating-Point Add/Subtract Instructions -defm vfadd : RVVFloatingBinBuiltinSet; -defm vfsub : RVVFloatingBinBuiltinSet; -defm vfrsub : RVVFloatingBinVFBuiltinSet; - -// 14.3. Vector Widening Floating-Point Add/Subtract Instructions -// Widening FP add/subtract, 2*SEW = SEW +/- SEW -defm vfwadd : RVVFloatingWidenBinBuiltinSet; -defm vfwsub : RVVFloatingWidenBinBuiltinSet; -// Widening FP add/subtract, 2*SEW = 2*SEW +/- SEW -defm vfwadd : RVVFloatingWidenOp0BinBuiltinSet; -defm vfwsub : RVVFloatingWidenOp0BinBuiltinSet; - -// 14.4. Vector Single-Width Floating-Point Multiply/Divide Instructions -defm vfmul : RVVFloatingBinBuiltinSet; -defm vfdiv : RVVFloatingBinBuiltinSet; -defm vfrdiv : RVVFloatingBinVFBuiltinSet; - -// 14.5. Vector Widening Floating-Point Multiply -let Log2LMUL = [-2, -1, 0, 1, 2] in { - defm vfwmul : RVVOutOp0Op1BuiltinSet<"vfwmul", "xf", - [["vv", "w", "wvv"], - ["vf", "w", "wve"]]>; -} - -// 14.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions -defm vfmacc : RVVFloatingTerBuiltinSet; -defm vfnmacc : RVVFloatingTerBuiltinSet; -defm vfmsac : RVVFloatingTerBuiltinSet; -defm vfnmsac : RVVFloatingTerBuiltinSet; -defm vfmadd : RVVFloatingTerBuiltinSet; -defm vfnmadd : RVVFloatingTerBuiltinSet; -defm vfmsub : RVVFloatingTerBuiltinSet; -defm vfnmsub : RVVFloatingTerBuiltinSet; - -// 14.7. Vector Widening Floating-Point Fused Multiply-Add Instructions -defm vfwmacc : RVVFloatingWidenTerBuiltinSet; -defm vfwnmacc : RVVFloatingWidenTerBuiltinSet; -defm vfwmsac : RVVFloatingWidenTerBuiltinSet; -defm vfwnmsac : RVVFloatingWidenTerBuiltinSet; - -// 14.8. Vector Floating-Point Square-Root Instruction -def vfsqrt : RVVFloatingUnaryVVBuiltin; - -// 14.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction -def vfrsqrt7 : RVVFloatingUnaryVVBuiltin; +let ManualCodegen = [{ + { + // LLVM intrinsic + // Unmasked: (passthru, op0, op1, round_mode, vl) + // Masked: (passthru, vector_in, vector_in/scalar_in, mask, vxrm, vl, policy) + + SmallVector<llvm::Value*, 7> Operands; + bool HasMaskedOff = !( + (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) || + (!IsMasked && PolicyAttrs & RVV_VTA)); + unsigned Offset = IsMasked ? + (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0); + + if (!HasMaskedOff) + Operands.push_back(llvm::PoisonValue::get(ResultType)); + else + Operands.push_back(Ops[IsMasked ? 1 : 0]); + + Operands.push_back(Ops[Offset]); // op0 + Operands.push_back(Ops[Offset + 1]); // op1 + + if (IsMasked) + Operands.push_back(Ops[0]); // mask + + Operands.push_back(Ops[Offset + 2]); // vxrm + Operands.push_back(Ops[Offset + 3]); // vl + + if (IsMasked) + Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + + IntrinsicTypes = {ResultType, Ops[Offset + 1]->getType(), Ops.back()->getType()}; + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + return Builder.CreateCall(F, Operands, ""); + } +}] in { + // 12.2. Vector Single-Width Averaging Add and Subtract + defm vaaddu : RVVUnsignedBinBuiltinSetRoundingMode; + defm vaadd : RVVSignedBinBuiltinSetRoundingMode; + defm vasubu : RVVUnsignedBinBuiltinSetRoundingMode; + defm vasub : RVVSignedBinBuiltinSetRoundingMode; + + // 12.3. Vector Single-Width Fractional Multiply with Rounding and Saturation + defm vsmul : RVVSignedBinBuiltinSetRoundingMode; + + // 12.4. Vector Single-Width Scaling Shift Instructions + defm vssrl : RVVUnsignedShiftBuiltinSetRoundingMode; + defm vssra : RVVSignedShiftBuiltinSetRoundingMode; +} + +let ManualCodegen = [{ + { + // LLVM intrinsic + // Unmasked: (passthru, op0, op1, round_mode, vl) + // Masked: (passthru, vector_in, vector_in/scalar_in, mask, vxrm, vl, policy) + + SmallVector<llvm::Value*, 7> Operands; + bool HasMaskedOff = !( + (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) || + (!IsMasked && PolicyAttrs & RVV_VTA)); + unsigned Offset = IsMasked ? + (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0); + + if (!HasMaskedOff) + Operands.push_back(llvm::PoisonValue::get(ResultType)); + else + Operands.push_back(Ops[IsMasked ? 1 : 0]); + + Operands.push_back(Ops[Offset]); // op0 + Operands.push_back(Ops[Offset + 1]); // op1 + + if (IsMasked) + Operands.push_back(Ops[0]); // mask + + Operands.push_back(Ops[Offset + 2]); // vxrm + Operands.push_back(Ops[Offset + 3]); // vl + + if (IsMasked) + Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + + IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Ops[Offset + 1]->getType(), + Ops.back()->getType()}; + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + return Builder.CreateCall(F, Operands, ""); + } +}] in { + // 12.5. Vector Narrowing Fixed-Point Clip Instructions + defm vnclipu : RVVUnsignedNShiftBuiltinSetRoundingMode; + defm vnclip : RVVSignedNShiftBuiltinSetRoundingMode; +} +} + +// 13. Vector Floating-Point Instructions +let HeaderCode = +[{ +enum __RISCV_FRM { + __RISCV_FRM_RNE = 0, + __RISCV_FRM_RTZ = 1, + __RISCV_FRM_RDN = 2, + __RISCV_FRM_RUP = 3, + __RISCV_FRM_RMM = 4, +}; +}] in def frm_enum : RVVHeader; + +let UnMaskedPolicyScheme = HasPassthruOperand in { +let ManualCodegen = [{ + { + // LLVM intrinsic + // Unmasked: (passthru, op0, op1, round_mode, vl) + // Masked: (passthru, vector_in, vector_in/scalar_in, mask, frm, vl, policy) + + SmallVector<llvm::Value*, 7> Operands; + bool HasMaskedOff = !( + (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) || + (!IsMasked && PolicyAttrs & RVV_VTA)); + bool HasRoundModeOp = IsMasked ? + (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) : + (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4); + + unsigned Offset = IsMasked ? + (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0); + + if (!HasMaskedOff) + Operands.push_back(llvm::PoisonValue::get(ResultType)); + else + Operands.push_back(Ops[IsMasked ? 1 : 0]); + + Operands.push_back(Ops[Offset]); // op0 + Operands.push_back(Ops[Offset + 1]); // op1 + + if (IsMasked) + Operands.push_back(Ops[0]); // mask + + if (HasRoundModeOp) { + Operands.push_back(Ops[Offset + 2]); // frm + Operands.push_back(Ops[Offset + 3]); // vl + } else { + Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm + Operands.push_back(Ops[Offset + 2]); // vl + } + + if (IsMasked) + Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + + IntrinsicTypes = {ResultType, Ops[Offset + 1]->getType(), + Operands.back()->getType()}; + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + return Builder.CreateCall(F, Operands, ""); + } +}] in { + let HasFRMRoundModeOp = true in { + // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions + defm vfadd : RVVFloatingBinBuiltinSetRoundingMode; + defm vfsub : RVVFloatingBinBuiltinSetRoundingMode; + defm vfrsub : RVVFloatingBinVFBuiltinSetRoundingMode; + + // 13.3. Vector Widening Floating-Point Add/Subtract Instructions + // Widening FP add/subtract, 2*SEW = 2*SEW +/- SEW + defm vfwadd : RVVFloatingWidenOp0BinBuiltinSetRoundingMode; + defm vfwsub : RVVFloatingWidenOp0BinBuiltinSetRoundingMode; + + // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions + defm vfmul : RVVFloatingBinBuiltinSetRoundingMode; + defm vfdiv : RVVFloatingBinBuiltinSetRoundingMode; + defm vfrdiv : RVVFloatingBinVFBuiltinSetRoundingMode; + } + // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions + defm vfadd : RVVFloatingBinBuiltinSet; + defm vfsub : RVVFloatingBinBuiltinSet; + defm vfrsub : RVVFloatingBinVFBuiltinSet; + + // 13.3. Vector Widening Floating-Point Add/Subtract Instructions + // Widening FP add/subtract, 2*SEW = 2*SEW +/- SEW + defm vfwadd : RVVFloatingWidenOp0BinBuiltinSet; + defm vfwsub : RVVFloatingWidenOp0BinBuiltinSet; + + // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions + defm vfmul : RVVFloatingBinBuiltinSet; + defm vfdiv : RVVFloatingBinBuiltinSet; + defm vfrdiv : RVVFloatingBinVFBuiltinSet; +} + +let ManualCodegen = [{ + { + // LLVM intrinsic + // Unmasked: (passthru, op0, op1, round_mode, vl) + // Masked: (passthru, vector_in, vector_in/scalar_in, mask, frm, vl, policy) + + SmallVector<llvm::Value*, 7> Operands; + bool HasMaskedOff = !( + (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) || + (!IsMasked && PolicyAttrs & RVV_VTA)); + bool HasRoundModeOp = IsMasked ? + (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) : + (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4); + + unsigned Offset = IsMasked ? + (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0); + + if (!HasMaskedOff) + Operands.push_back(llvm::PoisonValue::get(ResultType)); + else + Operands.push_back(Ops[IsMasked ? 1 : 0]); + + Operands.push_back(Ops[Offset]); // op0 + Operands.push_back(Ops[Offset + 1]); // op1 + + if (IsMasked) + Operands.push_back(Ops[0]); // mask + + if (HasRoundModeOp) { + Operands.push_back(Ops[Offset + 2]); // frm + Operands.push_back(Ops[Offset + 3]); // vl + } else { + Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm + Operands.push_back(Ops[Offset + 2]); // vl + } + + if (IsMasked) + Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + + IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Ops[Offset + 1]->getType(), + Ops.back()->getType()}; + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + return Builder.CreateCall(F, Operands, ""); + } +}] in { + let HasFRMRoundModeOp = true in { + // 13.3. Vector Widening Floating-Point Add/Subtract Instructions + // Widening FP add/subtract, 2*SEW = SEW +/- SEW + defm vfwadd : RVVFloatingWidenBinBuiltinSetRoundingMode; + defm vfwsub : RVVFloatingWidenBinBuiltinSetRoundingMode; + + // 13.5. Vector Widening Floating-Point Multiply + let Log2LMUL = [-2, -1, 0, 1, 2] in { + defm vfwmul : RVVOutOp0Op1BuiltinSet<"vfwmul", "xf", + [["vv", "w", "wvvu"], + ["vf", "w", "wveu"]]>; + } + } + // 13.3. Vector Widening Floating-Point Add/Subtract Instructions + // Widening FP add/subtract, 2*SEW = SEW +/- SEW + defm vfwadd : RVVFloatingWidenBinBuiltinSet; + defm vfwsub : RVVFloatingWidenBinBuiltinSet; + + // 13.5. Vector Widening Floating-Point Multiply + let Log2LMUL = [-2, -1, 0, 1, 2] in { + defm vfwmul : RVVOutOp0Op1BuiltinSet<"vfwmul", "xf", + [["vv", "w", "wvv"], + ["vf", "w", "wve"]]>; + } +} +} + + +let UnMaskedPolicyScheme = HasPolicyOperand in { +let ManualCodegen = [{ + { + // LLVM intrinsic + // Unmasked: (passthru, op0, op1, round_mode, vl) + // Masked: (passthru, vector_in, vector_in/scalar_in, mask, frm, vl, policy) + + SmallVector<llvm::Value*, 7> Operands; + bool HasRoundModeOp = IsMasked ? Ops.size() == 6 : Ops.size() == 5; + + unsigned Offset = IsMasked ? 2 : 1; + + Operands.push_back(Ops[IsMasked ? 1 : 0]); // passthrough + + Operands.push_back(Ops[Offset]); // op0 + Operands.push_back(Ops[Offset + 1]); // op1 + + if (IsMasked) + Operands.push_back(Ops[0]); // mask + + if (HasRoundModeOp) { + Operands.push_back(Ops[Offset + 2]); // frm + Operands.push_back(Ops[Offset + 3]); // vl + } else { + Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm + Operands.push_back(Ops[Offset + 2]); // vl + } + + Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + + IntrinsicTypes = {ResultType, Ops[Offset]->getType(), + Operands.back()->getType()}; + + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + + return Builder.CreateCall(F, Operands, ""); + } +}] in { + let HasFRMRoundModeOp = 1 in { + // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions + defm vfmacc : RVVFloatingTerBuiltinSetRoundingMode; + defm vfnmacc : RVVFloatingTerBuiltinSetRoundingMode; + defm vfmsac : RVVFloatingTerBuiltinSetRoundingMode; + defm vfnmsac : RVVFloatingTerBuiltinSetRoundingMode; + defm vfmadd : RVVFloatingTerBuiltinSetRoundingMode; + defm vfnmadd : RVVFloatingTerBuiltinSetRoundingMode; + defm vfmsub : RVVFloatingTerBuiltinSetRoundingMode; + defm vfnmsub : RVVFloatingTerBuiltinSetRoundingMode; + } + // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions + defm vfmacc : RVVFloatingTerBuiltinSet; + defm vfnmacc : RVVFloatingTerBuiltinSet; + defm vfmsac : RVVFloatingTerBuiltinSet; + defm vfnmsac : RVVFloatingTerBuiltinSet; + defm vfmadd : RVVFloatingTerBuiltinSet; + defm vfnmadd : RVVFloatingTerBuiltinSet; + defm vfmsub : RVVFloatingTerBuiltinSet; + defm vfnmsub : RVVFloatingTerBuiltinSet; +} + +let ManualCodegen = [{ + { + // LLVM intrinsic + // Unmasked: (passthru, op0, op1, round_mode, vl) + // Masked: (passthru, vector_in, vector_in/scalar_in, mask, frm, vl, policy) + + SmallVector<llvm::Value*, 7> Operands; + bool HasRoundModeOp = IsMasked ? Ops.size() == 6 : Ops.size() == 5; + + unsigned Offset = IsMasked ? 2 : 1; + + Operands.push_back(Ops[IsMasked ? 1 : 0]); // passthrough + + Operands.push_back(Ops[Offset]); // op0 + Operands.push_back(Ops[Offset + 1]); // op1 + + if (IsMasked) + Operands.push_back(Ops[0]); // mask + + if (HasRoundModeOp) { + Operands.push_back(Ops[Offset + 2]); // frm + Operands.push_back(Ops[Offset + 3]); // vl + } else { + Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm + Operands.push_back(Ops[Offset + 2]); // vl + } + + Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + + IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Ops[Offset + 1]->getType(), + Operands.back()->getType()}; + + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + + return Builder.CreateCall(F, Operands, ""); + } +}] in { + let HasFRMRoundModeOp = 1 in { + // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions + defm vfwmacc : RVVFloatingWidenTerBuiltinSetRoundingMode; + defm vfwnmacc : RVVFloatingWidenTerBuiltinSetRoundingMode; + defm vfwmsac : RVVFloatingWidenTerBuiltinSetRoundingMode; + defm vfwnmsac : RVVFloatingWidenTerBuiltinSetRoundingMode; + } + // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions + defm vfwmacc : RVVFloatingWidenTerBuiltinSet; + defm vfwnmacc : RVVFloatingWidenTerBuiltinSet; + defm vfwmsac : RVVFloatingWidenTerBuiltinSet; + defm vfwnmsac : RVVFloatingWidenTerBuiltinSet; +} + +} + +let UnMaskedPolicyScheme = HasPassthruOperand in { +let ManualCodegen = [{ + { + // LLVM intrinsic + // Unmasked: (passthru, op0, round_mode, vl) + // Masked: (passthru, op0, mask, frm, vl, policy) + + SmallVector<llvm::Value*, 7> Operands; + bool HasMaskedOff = !( + (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) || + (!IsMasked && PolicyAttrs & RVV_VTA)); + bool HasRoundModeOp = IsMasked ? + (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4) : + (HasMaskedOff ? Ops.size() == 4 : Ops.size() == 3); + + unsigned Offset = IsMasked ? + (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0); + + if (!HasMaskedOff) + Operands.push_back(llvm::PoisonValue::get(ResultType)); + else + Operands.push_back(Ops[IsMasked ? 1 : 0]); + + Operands.push_back(Ops[Offset]); // op0 -// 14.10. Vector Floating-Point Reciprocal Estimate Instruction -def vfrec7 : RVVFloatingUnaryVVBuiltin; + if (IsMasked) + Operands.push_back(Ops[0]); // mask -// 14.11. Vector Floating-Point MIN/MAX Instructions + if (HasRoundModeOp) { + Operands.push_back(Ops[Offset + 1]); // frm + Operands.push_back(Ops[Offset + 2]); // vl + } else { + Operands.push_back(ConstantInt::get(Ops[Offset + 1]->getType(), 7)); // frm + Operands.push_back(Ops[Offset + 1]); // vl + } + + if (IsMasked) + Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + + IntrinsicTypes = {ResultType, Operands.back()->getType()}; + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + return Builder.CreateCall(F, Operands, ""); + } +}] in { + let HasFRMRoundModeOp = 1 in { + // 13.8. Vector Floating-Point Square-Root Instruction + defm vfsqrt : RVVOutBuiltinSet<"vfsqrt", "xfd", [["v", "v", "vvu"]]>; + + // 13.10. Vector Floating-Point Reciprocal Estimate Instruction + defm vfrec7 : RVVOutBuiltinSet<"vfrec7", "xfd", [["v", "v", "vvu"]]>; + } + // 13.8. Vector Floating-Point Square-Root Instruction + defm vfsqrt : RVVOutBuiltinSet<"vfsqrt", "xfd", [["v", "v", "vv"]]>; + + // 13.10. Vector Floating-Point Reciprocal Estimate Instruction + defm vfrec7 : RVVOutBuiltinSet<"vfrec7", "xfd", [["v", "v", "vv"]]>; +} + +// 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction +def vfrsqrt7 : RVVFloatingUnaryVVBuiltin; + +// 13.11. Vector Floating-Point MIN/MAX Instructions defm vfmin : RVVFloatingBinBuiltinSet; defm vfmax : RVVFloatingBinBuiltinSet; -// 14.12. Vector Floating-Point Sign-Injection Instructions +// 13.12. Vector Floating-Point Sign-Injection Instructions defm vfsgnj : RVVFloatingBinBuiltinSet; defm vfsgnjn : RVVFloatingBinBuiltinSet; defm vfsgnjx : RVVFloatingBinBuiltinSet; +} defm vfneg_v : RVVPseudoVFUnaryBuiltin<"vfsgnjn", "xfd">; defm vfabs_v : RVVPseudoVFUnaryBuiltin<"vfsgnjx", "xfd">; -// 14.13. Vector Floating-Point Compare Instructions +// 13.13. Vector Floating-Point Compare Instructions +let MaskedPolicyScheme = HasPassthruOperand, + HasTailPolicy = false in { defm vmfeq : RVVFloatingMaskOutBuiltinSet; defm vmfne : RVVFloatingMaskOutBuiltinSet; defm vmflt : RVVFloatingMaskOutBuiltinSet; defm vmfle : RVVFloatingMaskOutBuiltinSet; defm vmfgt : RVVFloatingMaskOutBuiltinSet; defm vmfge : RVVFloatingMaskOutBuiltinSet; +} -// 14.14. Vector Floating-Point Classify Instruction -let Name = "vfclass_v" in +// 13.14. Vector Floating-Point Classify Instruction +let Name = "vfclass_v", UnMaskedPolicyScheme = HasPassthruOperand in def vfclass : RVVOp0Builtin<"Uv", "Uvv", "xfd">; -// 14.15. Vector Floating-Point Merge Instructio +// 13.15. Vector Floating-Point Merge Instruction // C/C++ Operand: (mask, op1, op2, vl), Builtin: (op1, op2, mask, vl) -let HasMask = false, +let HasMasked = false, + UnMaskedPolicyScheme = HasPassthruOperand, + MaskedPolicyScheme = NonePolicy, ManualCodegen = [{ - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.begin() + 3); - IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[3]->getType()}; + // insert poison passthru + if (PolicyAttrs & RVV_VTA) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + IntrinsicTypes = {ResultType, Ops[2]->getType(), Ops.back()->getType()}; }] in { - defm vmerge : RVVOutOp1BuiltinSet<"vfmerge", "xfd", - [["vvm", "v", "vmvv"]]>; + defm vmerge : RVVOutOp1BuiltinSet<"vmerge", "fd", + [["vvm", "v", "vvvm"]]>; + let RequiredFeatures = ["Zvfhmin"] in + defm vmerge : RVVOutOp1BuiltinSet<"vmerge", "x", + [["vvm", "v", "vvvm"]]>; defm vfmerge : RVVOutOp1BuiltinSet<"vfmerge", "xfd", - [["vfm", "v", "vmve"]]>; + [["vfm", "v", "vvem"]]>; } -// 14.16. Vector Floating-Point Move Instruction -let HasMask = false, HasNoMaskedOverloaded = false in +// 13.16. Vector Floating-Point Move Instruction +let HasMasked = false, + UnMaskedPolicyScheme = HasPassthruOperand, + SupportOverloading = false, + MaskedPolicyScheme = NonePolicy, + OverloadedName = "vfmv_v" in defm vfmv_v : RVVOutBuiltinSet<"vfmv_v_f", "xfd", [["f", "v", "ve"]]>; -// 14.17. Single-Width Floating-Point/Integer Type-Convert Instructions -def vfcvt_xu_f_v : RVVConvToUnsignedBuiltin<"vfcvt_xu">; -def vfcvt_x_f_v : RVVConvToSignedBuiltin<"vfcvt_x">; +// 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions +let UnMaskedPolicyScheme = HasPassthruOperand in { def vfcvt_rtz_xu_f_v : RVVConvToUnsignedBuiltin<"vfcvt_rtz_xu">; def vfcvt_rtz_x_f_v : RVVConvToSignedBuiltin<"vfcvt_rtz_x">; -def vfcvt_f_xu_v : RVVConvBuiltin<"Fv", "FvUv", "sil", "vfcvt_f">; -def vfcvt_f_x_v : RVVConvBuiltin<"Fv", "Fvv", "sil", "vfcvt_f">; -// 14.18. Widening Floating-Point/Integer Type-Convert Instructions +// 13.18. Widening Floating-Point/Integer Type-Convert Instructions let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { - def vfwcvt_xu_f_v : RVVConvToWidenUnsignedBuiltin<"vfwcvt_xu">; - def vfwcvt_x_f_v : RVVConvToWidenSignedBuiltin<"vfwcvt_x">; def vfwcvt_rtz_xu_f_v : RVVConvToWidenUnsignedBuiltin<"vfwcvt_rtz_xu">; def vfwcvt_rtz_x_f_v : RVVConvToWidenSignedBuiltin<"vfwcvt_rtz_x">; def vfwcvt_f_xu_v : RVVConvBuiltin<"Fw", "FwUv", "csi", "vfwcvt_f">; def vfwcvt_f_x_v : RVVConvBuiltin<"Fw", "Fwv", "csi", "vfwcvt_f">; - def vfwcvt_f_f_v : RVVConvBuiltin<"w", "wv", "xf", "vfwcvt_f">; + def vfwcvt_f_f_v : RVVConvBuiltin<"w", "wv", "f", "vfwcvt_f">; + let RequiredFeatures = ["Zvfhmin"] in + def vfwcvt_f_f_v_fp16 : RVVConvBuiltin<"w", "wv", "x", "vfwcvt_f"> { + let Name = "vfwcvt_f_f_v"; + let IRName = "vfwcvt_f_f_v"; + let MaskedIRName = "vfwcvt_f_f_v_mask"; + } } -// 14.19. Narrowing Floating-Point/Integer Type-Convert Instructions +// 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { - def vfncvt_xu_f_w : RVVConvToNarrowingUnsignedBuiltin<"vfncvt_xu">; - def vfncvt_x_f_w : RVVConvToNarrowingSignedBuiltin<"vfncvt_x">; def vfncvt_rtz_xu_f_w : RVVConvToNarrowingUnsignedBuiltin<"vfncvt_rtz_xu">; def vfncvt_rtz_x_f_w : RVVConvToNarrowingSignedBuiltin<"vfncvt_rtz_x">; - def vfncvt_f_xu_w : RVVConvBuiltin<"Fv", "FvUw", "csi", "vfncvt_f">; - def vfncvt_f_x_w : RVVConvBuiltin<"Fv", "Fvw", "csi", "vfncvt_f">; - def vfncvt_f_f_w : RVVConvBuiltin<"v", "vw", "xf", "vfncvt_f">; def vfncvt_rod_f_f_w : RVVConvBuiltin<"v", "vw", "xf", "vfncvt_rod_f">; } +let ManualCodegen = [{ + { + // LLVM intrinsic + // Unmasked: (passthru, op0, frm, vl) + // Masked: (passthru, op0, mask, frm, vl, policy) + SmallVector<llvm::Value*, 7> Operands; + bool HasMaskedOff = !( + (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) || + (!IsMasked && PolicyAttrs & RVV_VTA)); + bool HasRoundModeOp = IsMasked ? + (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4) : + (HasMaskedOff ? Ops.size() == 4 : Ops.size() == 3); + + unsigned Offset = IsMasked ? + (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0); + + if (!HasMaskedOff) + Operands.push_back(llvm::PoisonValue::get(ResultType)); + else + Operands.push_back(Ops[IsMasked ? 1 : 0]); + + Operands.push_back(Ops[Offset]); // op0 + + if (IsMasked) + Operands.push_back(Ops[0]); // mask + + if (HasRoundModeOp) { + Operands.push_back(Ops[Offset + 1]); // frm + Operands.push_back(Ops[Offset + 2]); // vl + } else { + Operands.push_back(ConstantInt::get(Ops[Offset + 1]->getType(), 7)); // frm + Operands.push_back(Ops[Offset + 1]); // vl + } -// 15. Vector Reduction Operations -// 15.1. Vector Single-Width Integer Reduction Instructions + if (IsMasked) + Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + + IntrinsicTypes = {ResultType, Ops[Offset]->getType(), + Operands.back()->getType()}; + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + return Builder.CreateCall(F, Operands, ""); + } +}] in { + let HasFRMRoundModeOp = 1 in { + // 14.17. Single-Width Floating-Point/Integer Type-Convert Instructions + let OverloadedName = "vfcvt_x" in + defm : + RVVConvBuiltinSet<"vfcvt_x_f_v", "xfd", [["Iv", "Ivvu"]]>; + let OverloadedName = "vfcvt_xu" in + defm : + RVVConvBuiltinSet<"vfcvt_xu_f_v", "xfd", [["Uv", "Uvvu"]]>; + let OverloadedName = "vfcvt_f" in { + defm : + RVVConvBuiltinSet<"vfcvt_f_x_v", "sil", [["Fv", "Fvvu"]]>; + defm : + RVVConvBuiltinSet<"vfcvt_f_xu_v", "sil", [["Fv", "FvUvu"]]>; + } + + // 13.18. Widening Floating-Point/Integer Type-Convert Instructions + let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { + let OverloadedName = "vfwcvt_x" in + defm : + RVVConvBuiltinSet<"vfwcvt_x_f_v", "xf", [["Iw", "Iwvu"]]>; + let OverloadedName = "vfwcvt_xu" in + defm : + RVVConvBuiltinSet<"vfwcvt_xu_f_v", "xf", [["Uw", "Uwvu"]]>; + } + // 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions + let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { + let OverloadedName = "vfncvt_x" in + defm : + RVVConvBuiltinSet<"vfncvt_x_f_w", "csi", [["Iv", "IvFwu"]]>; + let OverloadedName = "vfncvt_xu" in + defm : + RVVConvBuiltinSet<"vfncvt_xu_f_w", "csi", [["Uv", "UvFwu"]]>; + let OverloadedName = "vfncvt_f" in { + defm : + RVVConvBuiltinSet<"vfncvt_f_x_w", "csi", [["Fv", "Fvwu"]]>; + defm : + RVVConvBuiltinSet<"vfncvt_f_xu_w", "csi", [["Fv", "FvUwu"]]>; + } + let OverloadedName = "vfncvt_f" in { + defm : RVVConvBuiltinSet<"vfncvt_f_f_w", "f", [["v", "vwu"]]>; + let RequiredFeatures = ["Zvfhmin"] in + defm : RVVConvBuiltinSet<"vfncvt_f_f_w", "x", [["v", "vwu"]]>; + } + } + } + + // 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions + let OverloadedName = "vfcvt_x" in + defm : + RVVConvBuiltinSet<"vfcvt_x_f_v", "xfd", [["Iv", "Ivv"]]>; + let OverloadedName = "vfcvt_xu" in + defm : + RVVConvBuiltinSet<"vfcvt_xu_f_v", "xfd", [["Uv", "Uvv"]]>; + let OverloadedName = "vfcvt_f" in { + defm : + RVVConvBuiltinSet<"vfcvt_f_x_v", "sil", [["Fv", "Fvv"]]>; + defm : + RVVConvBuiltinSet<"vfcvt_f_xu_v", "sil", [["Fv", "FvUv"]]>; + } + + // 13.18. Widening Floating-Point/Integer Type-Convert Instructions + let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { + let OverloadedName = "vfwcvt_x" in + defm : + RVVConvBuiltinSet<"vfwcvt_x_f_v", "xf", [["Iw", "Iwv"]]>; + let OverloadedName = "vfwcvt_xu" in + defm : + RVVConvBuiltinSet<"vfwcvt_xu_f_v", "xf", [["Uw", "Uwv"]]>; + } + // 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions + let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { + let OverloadedName = "vfncvt_x" in + defm : + RVVConvBuiltinSet<"vfncvt_x_f_w", "csi", [["Iv", "IvFw"]]>; + let OverloadedName = "vfncvt_xu" in + defm : + RVVConvBuiltinSet<"vfncvt_xu_f_w", "csi", [["Uv", "UvFw"]]>; + let OverloadedName = "vfncvt_f" in { + defm : + RVVConvBuiltinSet<"vfncvt_f_x_w", "csi", [["Fv", "Fvw"]]>; + defm : + RVVConvBuiltinSet<"vfncvt_f_xu_w", "csi", [["Fv", "FvUw"]]>; + } + let OverloadedName = "vfncvt_f" in { + defm : RVVConvBuiltinSet<"vfncvt_f_f_w", "f", [["v", "vw"]]>; + let RequiredFeatures = ["Zvfhmin"] in + defm : RVVConvBuiltinSet<"vfncvt_f_f_w", "x", [["v", "vw"]]>; + } + } +} +} + +// 14. Vector Reduction Operations +// 14.1. Vector Single-Width Integer Reduction Instructions +let UnMaskedPolicyScheme = HasPassthruOperand, + MaskedPolicyScheme = HasPassthruOperand, + HasMaskPolicy = false in { defm vredsum : RVVIntReductionBuiltinSet; defm vredmaxu : RVVUnsignedReductionBuiltin; defm vredmax : RVVSignedReductionBuiltin; @@ -1876,34 +2032,88 @@ defm vredand : RVVIntReductionBuiltinSet; defm vredor : RVVIntReductionBuiltinSet; defm vredxor : RVVIntReductionBuiltinSet; -// 15.2. Vector Widening Integer Reduction Instructions +// 14.2. Vector Widening Integer Reduction Instructions // Vector Widening Integer Reduction Operations -let HasMaskedOffOperand = false in { - defm vwredsum : RVVOutOp1BuiltinSet<"vwredsum", "csi", - [["vs", "vSw", "SwSwvSw"]]>; - defm vwredsumu : RVVOutOp1BuiltinSet<"vwredsumu", "csi", - [["vs", "UvUSw", "USwUSwUvUSw"]]>; +let HasMaskedOffOperand = true in { + defm vwredsum : RVVOutOp0BuiltinSet<"vwredsum", "csi", + [["vs", "vSw", "SwvSw"]]>; + defm vwredsumu : RVVOutOp0BuiltinSet<"vwredsumu", "csi", + [["vs", "UvUSw", "USwUvUSw"]]>; } -// 15.3. Vector Single-Width Floating-Point Reduction Instructions +// 14.3. Vector Single-Width Floating-Point Reduction Instructions defm vfredmax : RVVFloatingReductionBuiltin; defm vfredmin : RVVFloatingReductionBuiltin; -defm vfredsum : RVVFloatingReductionBuiltin; -defm vfredosum : RVVFloatingReductionBuiltin; +let ManualCodegen = [{ + { + // LLVM intrinsic + // Unmasked: (passthru, op0, op1, round_mode, vl) + // Masked: (passthru, vector_in, vector_in/scalar_in, mask, frm, vl, policy) + + SmallVector<llvm::Value*, 7> Operands; + bool HasMaskedOff = !( + (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) || + (!IsMasked && PolicyAttrs & RVV_VTA)); + bool HasRoundModeOp = IsMasked ? + (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) : + (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4); + + unsigned Offset = IsMasked ? + (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0); + + if (!HasMaskedOff) + Operands.push_back(llvm::PoisonValue::get(ResultType)); + else + Operands.push_back(Ops[IsMasked ? 1 : 0]); + + Operands.push_back(Ops[Offset]); // op0 + Operands.push_back(Ops[Offset + 1]); // op1 + + if (IsMasked) + Operands.push_back(Ops[0]); // mask + + if (HasRoundModeOp) { + Operands.push_back(Ops[Offset + 2]); // frm + Operands.push_back(Ops[Offset + 3]); // vl + } else { + Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm + Operands.push_back(Ops[Offset + 2]); // vl + } -// 15.4. Vector Widening Floating-Point Reduction Instructions -defm vfwredsum : RVVFloatingWidenReductionBuiltin; -defm vfwredosum : RVVFloatingWidenReductionBuiltin; + IntrinsicTypes = {ResultType, Ops[Offset]->getType(), + Ops.back()->getType()}; + llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes); + return Builder.CreateCall(F, Operands, ""); + } +}] in { + let HasFRMRoundModeOp = 1 in { + // 14.3. Vector Single-Width Floating-Point Reduction Instructions + defm vfredusum : RVVFloatingReductionBuiltinRoundingMode; + defm vfredosum : RVVFloatingReductionBuiltinRoundingMode; + + // 14.4. Vector Widening Floating-Point Reduction Instructions + defm vfwredusum : RVVFloatingWidenReductionBuiltinRoundingMode; + defm vfwredosum : RVVFloatingWidenReductionBuiltinRoundingMode; + } + // 14.3. Vector Single-Width Floating-Point Reduction Instructions + defm vfredusum : RVVFloatingReductionBuiltin; + defm vfredosum : RVVFloatingReductionBuiltin; -// 16. Vector Mask Instructions -// 16.1. Vector Mask-Register Logical Instructions + // 14.4. Vector Widening Floating-Point Reduction Instructions + defm vfwredusum : RVVFloatingWidenReductionBuiltin; + defm vfwredosum : RVVFloatingWidenReductionBuiltin; +} +} + +// 15. Vector Mask Instructions +// 15.1. Vector Mask-Register Logical Instructions def vmand : RVVMaskBinBuiltin; def vmnand : RVVMaskBinBuiltin; -def vmandnot : RVVMaskBinBuiltin; +def vmandn : RVVMaskBinBuiltin; def vmxor : RVVMaskBinBuiltin; def vmor : RVVMaskBinBuiltin; def vmnor : RVVMaskBinBuiltin; -def vmornot : RVVMaskBinBuiltin; +def vmorn : RVVMaskBinBuiltin; def vmxnor : RVVMaskBinBuiltin; // pseudoinstructions def vmclr : RVVMaskNullaryBuiltin; @@ -1911,69 +2121,79 @@ def vmset : RVVMaskNullaryBuiltin; defm vmmv_m : RVVPseudoMaskBuiltin<"vmand", "c">; defm vmnot_m : RVVPseudoMaskBuiltin<"vmnand", "c">; -// 16.2. Vector mask population count vpopc -def vpopc : RVVMaskOp0Builtin<"um">; +let MaskedPolicyScheme = NonePolicy in { +// 15.2. Vector count population in mask vcpop.m +def vcpop : RVVMaskOp0Builtin<"um">; -// 16.3. vfirst find-first-set mask bit +// 15.3. vfirst find-first-set mask bit def vfirst : RVVMaskOp0Builtin<"lm">; +} -// 16.4. vmsbf.m set-before-first mask bit +let MaskedPolicyScheme = HasPassthruOperand, + HasTailPolicy = false in { +// 15.4. vmsbf.m set-before-first mask bit def vmsbf : RVVMaskUnaryBuiltin; -// 16.5. vmsif.m set-including-first mask bit +// 15.5. vmsif.m set-including-first mask bit def vmsif : RVVMaskUnaryBuiltin; -// 16.6. vmsof.m set-only-first mask bit +// 15.6. vmsof.m set-only-first mask bit def vmsof : RVVMaskUnaryBuiltin; +} -let HasNoMaskedOverloaded = false in { - // 16.8. Vector Iota Instruction +let UnMaskedPolicyScheme = HasPassthruOperand, SupportOverloading = false in { + // 15.8. Vector Iota Instruction defm viota : RVVOutBuiltinSet<"viota", "csil", [["m", "Uv", "Uvm"]]>; - // 16.9. Vector Element Index Instruction + // 15.9. Vector Element Index Instruction defm vid : RVVOutBuiltinSet<"vid", "csil", [["v", "v", "v"], ["v", "Uv", "Uv"]]>; } -// 17. Vector Permutation Instructions -// 17.1. Integer Scalar Move Instructions -let HasMask = false in { - let HasVL = false, MangledName = "vmv_x" in +// 16. Vector Permutation Instructions +// 16.1. Integer Scalar Move Instructions +let HasMasked = false, MaskedPolicyScheme = NonePolicy in { + let HasVL = false, OverloadedName = "vmv_x" in defm vmv_x : RVVOp0BuiltinSet<"vmv_x_s", "csil", [["s", "ve", "ev"], ["s", "UvUe", "UeUv"]]>; - let MangledName = "vmv_s" in + let OverloadedName = "vmv_s", + UnMaskedPolicyScheme = HasPassthruOperand, + SupportOverloading = false in defm vmv_s : RVVOutBuiltinSet<"vmv_s_x", "csil", - [["x", "v", "vve"], - ["x", "Uv", "UvUvUe"]]>; + [["x", "v", "ve"], + ["x", "Uv", "UvUe"]]>; } -// 17.2. Floating-Point Scalar Move Instructions -let HasMask = false in { - let HasVL = false, MangledName = "vfmv_f" in +// 16.2. Floating-Point Scalar Move Instructions +let HasMasked = false, MaskedPolicyScheme = NonePolicy in { + let HasVL = false, OverloadedName = "vfmv_f" in defm vfmv_f : RVVOp0BuiltinSet<"vfmv_f_s", "xfd", [["s", "ve", "ev"]]>; - let MangledName = "vfmv_s" in + let OverloadedName = "vfmv_s", + UnMaskedPolicyScheme = HasPassthruOperand, + SupportOverloading = false in defm vfmv_s : RVVOutBuiltinSet<"vfmv_s_f", "xfd", - [["f", "v", "vve"], - ["x", "Uv", "UvUvUe"]]>; + [["f", "v", "ve"], + ["x", "Uv", "UvUe"]]>; } -// 17.3. Vector Slide Instructions -// 17.3.1. Vector Slideup Instructions -defm vslideup : RVVSlideBuiltinSet; -// 17.3.2. Vector Slidedown Instructions -defm vslidedown : RVVSlideBuiltinSet; +// 16.3. Vector Slide Instructions +// 16.3.1. Vector Slideup Instructions +defm vslideup : RVVSlideUpBuiltinSet; +// 16.3.2. Vector Slidedown Instructions +defm vslidedown : RVVSlideDownBuiltinSet; -// 17.3.3. Vector Slide1up Instructions +// 16.3.3. Vector Slide1up Instructions +let UnMaskedPolicyScheme = HasPassthruOperand in { defm vslide1up : RVVSlideOneBuiltinSet; defm vfslide1up : RVVFloatingBinVFBuiltinSet; -// 17.3.4. Vector Slide1down Instruction +// 16.3.4. Vector Slide1down Instruction defm vslide1down : RVVSlideOneBuiltinSet; defm vfslide1down : RVVFloatingBinVFBuiltinSet; -// 17.4. Vector Register Gather Instructions +// 16.4. Vector Register Gather Instructions // signed and floating type defm vrgather : RVVOutBuiltinSet<"vrgather_vv", "csilxfd", [["vv", "v", "vvUv"]]>; @@ -1988,34 +2208,75 @@ defm vrgather : RVVOutBuiltinSet<"vrgather_vx", "csil", [["vx", "Uv", "UvUvz"]]>; defm vrgatherei16 : RVVOutBuiltinSet<"vrgatherei16_vv", "csil", [["vv", "Uv", "UvUv(Log2EEW:4)Uv"]]>; +} -// 17.5. Vector Compress Instruction -let HasMask = false, +// 16.5. Vector Compress Instruction +let HasMasked = false, + UnMaskedPolicyScheme = HasPassthruOperand, + MaskedPolicyScheme = NonePolicy, ManualCodegen = [{ - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.begin() + 3); - IntrinsicTypes = {ResultType, Ops[3]->getType()}; + // insert poison passthru + if (PolicyAttrs & RVV_VTA) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + IntrinsicTypes = {ResultType, Ops.back()->getType()}; }] in { // signed and floating type defm vcompress : RVVOutBuiltinSet<"vcompress", "csilxfd", - [["vm", "v", "vmvv"]]>; + [["vm", "v", "vvm"]]>; // unsigned type defm vcompress : RVVOutBuiltinSet<"vcompress", "csil", - [["vm", "Uv", "UvmUvUv"]]>; + [["vm", "Uv", "UvUvm"]]>; } // Miscellaneous -let HasMask = false, HasVL = false, IRName = "" in { - let Name = "vreinterpret_v", +let HasMasked = false, HasVL = false, IRName = "" in { + let Name = "vreinterpret_v", MaskedPolicyScheme = NonePolicy, ManualCodegen = [{ + if (ResultType->isIntOrIntVectorTy(1) || + Ops[0]->getType()->isIntOrIntVectorTy(1)) { + assert(isa<ScalableVectorType>(ResultType) && + isa<ScalableVectorType>(Ops[0]->getType())); + + LLVMContext &Context = CGM.getLLVMContext(); + ScalableVectorType *Boolean64Ty = + ScalableVectorType::get(llvm::Type::getInt1Ty(Context), 64); + + if (ResultType->isIntOrIntVectorTy(1)) { + // Casting from m1 vector integer -> vector boolean + // Ex: <vscale x 8 x i8> + // --(bitcast)--------> <vscale x 64 x i1> + // --(vector_extract)-> <vscale x 8 x i1> + llvm::Value *BitCast = Builder.CreateBitCast(Ops[0], Boolean64Ty); + return Builder.CreateExtractVector(ResultType, BitCast, + ConstantInt::get(Int64Ty, 0)); + } else { + // Casting from vector boolean -> m1 vector integer + // Ex: <vscale x 1 x i1> + // --(vector_insert)-> <vscale x 64 x i1> + // --(bitcast)-------> <vscale x 8 x i8> + llvm::Value *Boolean64Val = + Builder.CreateInsertVector(Boolean64Ty, + llvm::PoisonValue::get(Boolean64Ty), + Ops[0], + ConstantInt::get(Int64Ty, 0)); + return Builder.CreateBitCast(Boolean64Val, ResultType); + } + } return Builder.CreateBitCast(Ops[0], ResultType); }] in { // Reinterpret between different type under the same SEW and LMUL def vreinterpret_i_u : RVVBuiltin<"Uvv", "vUv", "csil", "v">; - def vreinterpret_i_f : RVVBuiltin<"Fvv", "vFv", "sil", "v">; + def vreinterpret_i_f : RVVBuiltin<"Fvv", "vFv", "il", "v">; def vreinterpret_u_i : RVVBuiltin<"vUv", "Uvv", "csil", "Uv">; - def vreinterpret_u_f : RVVBuiltin<"FvUv", "UvFv", "sil", "Uv">; - def vreinterpret_f_i : RVVBuiltin<"vFv", "Fvv", "sil", "Fv">; - def vreinterpret_f_u : RVVBuiltin<"UvFv", "FvUv", "sil", "Fv">; + def vreinterpret_u_f : RVVBuiltin<"FvUv", "UvFv", "il", "Uv">; + def vreinterpret_f_i : RVVBuiltin<"vFv", "Fvv", "il", "Fv">; + def vreinterpret_f_u : RVVBuiltin<"UvFv", "FvUv", "il", "Fv">; + let RequiredFeatures = ["Zvfhmin"] in { + def vreinterpret_i_h : RVVBuiltin<"Fvv", "vFv", "s", "v">; + def vreinterpret_u_h : RVVBuiltin<"FvUv", "UvFv", "s", "Uv">; + def vreinterpret_h_i : RVVBuiltin<"vFv", "Fvv", "s", "Fv">; + def vreinterpret_h_u : RVVBuiltin<"UvFv", "FvUv", "s", "Fv">; + } // Reinterpret between different SEW under the same LMUL foreach dst_sew = ["(FixedSEW:8)", "(FixedSEW:16)", "(FixedSEW:32)", @@ -2025,24 +2286,80 @@ let HasMask = false, HasVL = false, IRName = "" in { def vreinterpret_u_ # dst_sew : RVVBuiltin<"Uv" # dst_sew # "Uv", dst_sew # "UvUv", "csil", dst_sew # "Uv">; } + + // Existing users of FixedSEW - the reinterpretation between different SEW + // and same LMUL has the implicit assumption that if FixedSEW is set to the + // given element width, then the type will be identified as invalid, thus + // skipping definition of reinterpret of SEW=8 to SEW=8. However this blocks + // our usage here of defining all possible combinations of a fixed SEW to + // any boolean. So we need to separately define SEW=8 here. + // Reinterpret from LMUL=1 integer type to vector boolean type + def vreintrepret_m1_b8_signed : + RVVBuiltin<"Svm", + "mSv", + "c", "m">; + def vreintrepret_m1_b8_usigned : + RVVBuiltin<"USvm", + "mUSv", + "c", "m">; + + // Reinterpret from vector boolean type to LMUL=1 integer type + def vreintrepret_b8_m1_signed : + RVVBuiltin<"mSv", + "Svm", + "c", "Sv">; + def vreintrepret_b8_m1_usigned : + RVVBuiltin<"mUSv", + "USvm", + "c", "USv">; + + foreach dst_sew = ["16", "32", "64"] in { + // Reinterpret from LMUL=1 integer type to vector boolean type + def vreinterpret_m1_b # dst_sew # _signed: + RVVBuiltin<"(FixedSEW:" # dst_sew # ")Svm", + "m(FixedSEW:" # dst_sew # ")Sv", + "c", "m">; + def vreinterpret_m1_b # dst_sew # _unsigned: + RVVBuiltin<"(FixedSEW:" # dst_sew # ")USvm", + "m(FixedSEW:" # dst_sew # ")USv", + "c", "m">; + // Reinterpret from vector boolean type to LMUL=1 integer type + def vreinterpret_b # dst_sew # _m1_signed: + RVVBuiltin<"m(FixedSEW:" # dst_sew # ")Sv", + "(FixedSEW:" # dst_sew # ")Svm", + "c", "(FixedSEW:" # dst_sew # ")Sv">; + def vreinterpret_b # dst_sew # _m1_unsigned: + RVVBuiltin<"m(FixedSEW:" # dst_sew # ")USv", + "(FixedSEW:" # dst_sew # ")USvm", + "c", "(FixedSEW:" # dst_sew # ")USv">; + } } - let Name = "vundefined", HasNoMaskedOverloaded = false, + let Name = "vundefined", SupportOverloading = false, + MaskedPolicyScheme = NonePolicy, ManualCodegen = [{ - return llvm::UndefValue::get(ResultType); + return llvm::PoisonValue::get(ResultType); }] in { def vundefined : RVVBuiltin<"v", "v", "csilxfd">; def vundefined_u : RVVBuiltin<"Uv", "Uv", "csil">; + + foreach nf = NFList in { + let NF = nf in { + defvar T = "(Tuple:" # nf # ")"; + def : RVVBuiltin<T # "v", T # "v", "csilxfd">; + def : RVVBuiltin<T # "Uv", T # "Uv", "csil">; + } + } + } // LMUL truncation // C/C++ Operand: VecTy, IR Operand: VecTy, Index - let Name = "vlmul_trunc_v", MangledName = "vlmul_trunc", + let Name = "vlmul_trunc_v", OverloadedName = "vlmul_trunc", + MaskedPolicyScheme = NonePolicy, ManualCodegen = [{ { - ID = Intrinsic::experimental_vector_extract; - IntrinsicTypes = {ResultType, Ops[0]->getType()}; - Ops.push_back(ConstantInt::get(Int64Ty, 0)); - return Builder.CreateCall(CGM.getIntrinsic(ID, IntrinsicTypes), Ops, ""); + return Builder.CreateExtractVector(ResultType, Ops[0], + ConstantInt::get(Int64Ty, 0)); } }] in { foreach dst_lmul = ["(SFixedLog2LMUL:-3)", "(SFixedLog2LMUL:-2)", "(SFixedLog2LMUL:-1)", "(SFixedLog2LMUL:0)", "(SFixedLog2LMUL:1)", "(SFixedLog2LMUL:2)"] in { @@ -2055,14 +2372,12 @@ let HasMask = false, HasVL = false, IRName = "" in { // LMUL extension // C/C++ Operand: SubVecTy, IR Operand: VecTy, SubVecTy, Index - let Name = "vlmul_ext_v", MangledName = "vlmul_ext", + let Name = "vlmul_ext_v", OverloadedName = "vlmul_ext", + MaskedPolicyScheme = NonePolicy, ManualCodegen = [{ - ID = Intrinsic::experimental_vector_insert; - IntrinsicTypes = {ResultType, Ops[0]->getType()}; - Ops.push_back(llvm::UndefValue::get(ResultType)); - std::swap(Ops[0], Ops[1]); - Ops.push_back(ConstantInt::get(Int64Ty, 0)); - return Builder.CreateCall(CGM.getIntrinsic(ID, IntrinsicTypes), Ops, ""); + return Builder.CreateInsertVector(ResultType, + llvm::PoisonValue::get(ResultType), + Ops[0], ConstantInt::get(Int64Ty, 0)); }] in { foreach dst_lmul = ["(LFixedLog2LMUL:-2)", "(LFixedLog2LMUL:-1)", "(LFixedLog2LMUL:-0)", "(LFixedLog2LMUL:1)", "(LFixedLog2LMUL:2)", "(LFixedLog2LMUL:3)"] in { @@ -2073,40 +2388,225 @@ let HasMask = false, HasVL = false, IRName = "" in { } } - let Name = "vget_v", + let Name = "vget_v", MaskedPolicyScheme = NonePolicy, ManualCodegen = [{ { - ID = Intrinsic::experimental_vector_extract; - ScalableVectorType *VecTy = cast<ScalableVectorType>(ResultType); + if (isa<StructType>(Ops[0]->getType())) // For tuple type + // Extract value from index (operand 1) of vtuple (operand 0) + return Builder.CreateExtractValue( + Ops[0], + {(unsigned)cast<ConstantInt>(Ops[1])->getZExtValue()}); + auto *VecTy = cast<ScalableVectorType>(ResultType); + auto *OpVecTy = cast<ScalableVectorType>(Ops[0]->getType()); + // Mask to only valid indices. + unsigned MaxIndex = OpVecTy->getMinNumElements() / VecTy->getMinNumElements(); + assert(isPowerOf2_32(MaxIndex)); + Ops[1] = Builder.CreateZExt(Ops[1], Builder.getInt64Ty()); + Ops[1] = Builder.CreateAnd(Ops[1], MaxIndex - 1); Ops[1] = Builder.CreateMul(Ops[1], ConstantInt::get(Ops[1]->getType(), VecTy->getMinNumElements())); - IntrinsicTypes = {ResultType, Ops[0]->getType()}; - return Builder.CreateCall(CGM.getIntrinsic(ID, IntrinsicTypes), Ops, ""); + return Builder.CreateExtractVector(ResultType, Ops[0], Ops[1]); } }] in { foreach dst_lmul = ["(SFixedLog2LMUL:0)", "(SFixedLog2LMUL:1)", "(SFixedLog2LMUL:2)"] in { - def : RVVBuiltin<"v" # dst_lmul # "v", dst_lmul # "vvKz", "csilfd", dst_lmul # "v">; + def : RVVBuiltin<"v" # dst_lmul # "v", dst_lmul # "vvKz", "csilxfd", dst_lmul # "v">; def : RVVBuiltin<"Uv" # dst_lmul # "Uv", dst_lmul # "UvUvKz", "csil", dst_lmul # "Uv">; } + foreach nf = NFList in { + defvar T = "(Tuple:" # nf # ")"; + def : RVVBuiltin<T # "vv", "v" # T # "vKz", "csilxfd", "v">; + def : RVVBuiltin<T # "UvUv", "Uv" # T # "UvKz", "csil", "Uv">; + } } - let Name = "vset_v", Log2LMUL = [0, 1, 2], + let Name = "vset_v", MaskedPolicyScheme = NonePolicy, ManualCodegen = [{ { - ID = Intrinsic::experimental_vector_insert; - IntrinsicTypes = {ResultType, Ops[2]->getType()}; - ScalableVectorType *VecTy = cast<ScalableVectorType>(Ops[2]->getType()); + if (isa<StructType>(ResultType)) // For tuple type + // Insert value (operand 2) into index (operand 1) of vtuple (operand 0) + return Builder.CreateInsertValue( + Ops[0], Ops[2], + {(unsigned)cast<ConstantInt>(Ops[1])->getZExtValue()}); + auto *ResVecTy = cast<ScalableVectorType>(ResultType); + auto *VecTy = cast<ScalableVectorType>(Ops[2]->getType()); + // Mask to only valid indices. + unsigned MaxIndex = ResVecTy->getMinNumElements() / VecTy->getMinNumElements(); + assert(isPowerOf2_32(MaxIndex)); + Ops[1] = Builder.CreateZExt(Ops[1], Builder.getInt64Ty()); + Ops[1] = Builder.CreateAnd(Ops[1], MaxIndex - 1); Ops[1] = Builder.CreateMul(Ops[1], ConstantInt::get(Ops[1]->getType(), VecTy->getMinNumElements())); - std::swap(Ops[1], Ops[2]); - return Builder.CreateCall(CGM.getIntrinsic(ID, IntrinsicTypes), Ops, ""); + return Builder.CreateInsertVector(ResultType, Ops[0], Ops[2], Ops[1]); } }] in { foreach dst_lmul = ["(LFixedLog2LMUL:1)", "(LFixedLog2LMUL:2)", "(LFixedLog2LMUL:3)"] in { - def : RVVBuiltin<"v" # dst_lmul # "v", dst_lmul # "v" # dst_lmul # "vKzv", "csilfd">; + def : RVVBuiltin<"v" # dst_lmul # "v", dst_lmul # "v" # dst_lmul # "vKzv", "csilxfd">; def : RVVBuiltin<"Uv" # dst_lmul # "Uv", dst_lmul # "Uv" # dst_lmul #"UvKzUv", "csil">; } + foreach nf = NFList in { + defvar T = "(Tuple:" # nf # ")"; + def : RVVBuiltin<"v" # T # "v", T # "v" # T # "vKzv", "csilxfd">; + def : RVVBuiltin<"Uv" # T # "Uv", T # "Uv" # T # "UvKzUv", "csil">; + } + } + + let Name = "vcreate_v", + UnMaskedPolicyScheme = NonePolicy, + MaskedPolicyScheme = NonePolicy, + SupportOverloading = false, + ManualCodegen = [{ + { + if (isa<StructType>(ResultType)) { + unsigned NF = cast<StructType>(ResultType)->getNumElements(); + llvm::Value *ReturnTuple = llvm::PoisonValue::get(ResultType); + for (unsigned I = 0; I < NF; ++I) { + ReturnTuple = Builder.CreateInsertValue(ReturnTuple, Ops[I], {I}); + } + return ReturnTuple; + } + llvm::Value *ReturnVector = llvm::PoisonValue::get(ResultType); + auto *VecTy = cast<ScalableVectorType>(Ops[0]->getType()); + for (unsigned I = 0, N = Ops.size(); I < N; ++I) { + llvm::Value *Idx = + ConstantInt::get(Builder.getInt64Ty(), + VecTy->getMinNumElements() * I); + ReturnVector = + Builder.CreateInsertVector(ResultType, ReturnVector, Ops[I], Idx); + } + return ReturnVector; + } + }] in { + + defm : RVVNonTupleVCreateBuiltin<1, [0]>; + defm : RVVNonTupleVCreateBuiltin<2, [0, 1]>; + defm : RVVNonTupleVCreateBuiltin<3, [0, 1, 2]>; + + foreach nf = NFList in { + let NF = nf in { + defvar T = "(Tuple:" # nf # ")"; + defvar V = VString<nf, /*signed=*/true>.S; + defvar UV = VString<nf, /*signed=*/false>.S; + def : RVVBuiltin<T # "v", T # "v" # V, "csilxfd">; + def : RVVBuiltin<T # "Uv", T # "Uv" # UV, "csil">; + } + } + } +} + +multiclass RVVOutBuiltinSetZvbb { + let OverloadedName = NAME in + defm "" : RVVOutBuiltinSet<NAME, "csil", [["v", "v", "vv"], + ["v", "Uv", "UvUv"]]>; +} + +multiclass RVVOutBuiltinSetZvk<bit HasVV = 1, bit HasVS = 1> { + // vaesz only has 'vs' and vgmul only has 'vv' and they do not have ambiguous + // prototypes like other zvkned instructions (e.g. vaesdf), so we don't + // need to encode the operand mnemonics into its intrinsic function name. + if HasVV then { + defvar name = NAME # !if(!eq(NAME, "vgmul"), "", "_vv"); + let OverloadedName = name in + defm "" : RVVOutBuiltinSet<NAME # "_vv", "i", + [["vv", "Uv", "UvUvUv"]]>; + } + + if HasVS then { + foreach vs2_lmul = ["(SEFixedLog2LMUL:-1)", "(SEFixedLog2LMUL:0)", + "(SEFixedLog2LMUL:1)", "(SEFixedLog2LMUL:2)", + "(SEFixedLog2LMUL:3)"] in { + defvar name = NAME # !if(!eq(NAME, "vaesz"), "", "_vs"); + let OverloadedName = name, IRName = NAME # "_vs", Name = NAME # "_vs", + IntrinsicTypes = [-1, 1] in + def NAME # vs2_lmul + : RVVBuiltin<vs2_lmul # "UvUv", "UvUv" # vs2_lmul # "Uv", "i">; + } + } +} + +multiclass RVVOutOp2BuiltinSetVVZvk<string type_range = "i"> + : RVVOutOp2BuiltinSet<NAME, type_range, [["vv", "Uv", "UvUvUvUv"]]>; + +multiclass RVVOutOp2BuiltinSetVIZvk<string type_range = "i"> + : RVVOutOp2BuiltinSet<NAME, type_range, [["vi", "Uv", "UvUvUvKz"]]>; + +multiclass RVVSignedWidenBinBuiltinSetVwsll + : RVVWidenBuiltinSet<NAME, "csi", + [["vv", "Uw", "UwUvUv"], + ["vx", "Uw", "UwUvz"]]>; + +let UnMaskedPolicyScheme = HasPassthruOperand in { + // zvkb + let RequiredFeatures = ["Zvkb", "Experimental"] in { + defm vandn : RVVUnsignedBinBuiltinSet; + defm vbrev8 : RVVOutBuiltinSetZvbb; + defm vrev8 : RVVOutBuiltinSetZvbb; + defm vrol : RVVUnsignedShiftBuiltinSet; + defm vror : RVVUnsignedShiftBuiltinSet; + } + + // zvbb + let RequiredFeatures = ["Zvbb", "Experimental"] in { + defm vbrev : RVVOutBuiltinSetZvbb; + defm vclz : RVVOutBuiltinSetZvbb; + defm vctz : RVVOutBuiltinSetZvbb; + defm vcpopv : RVVOutBuiltinSetZvbb; + let OverloadedName = "vwsll" in + defm vwsll : RVVSignedWidenBinBuiltinSetVwsll; + } + + // zvbc + let RequiredFeatures = ["Zvbc", "Experimental"] in { + defm vclmul : RVVInt64BinBuiltinSet; + defm vclmulh : RVVInt64BinBuiltinSet; + } +} + +let UnMaskedPolicyScheme = HasPolicyOperand, HasMasked = false in { + // zvkg + let RequiredFeatures = ["Zvkg", "Experimental"] in { + defm vghsh : RVVOutOp2BuiltinSetVVZvk; + defm vgmul : RVVOutBuiltinSetZvk<HasVV=1, HasVS=0>; + } + + // zvkned + let RequiredFeatures = ["Zvkned", "Experimental"] in { + defm vaesdf : RVVOutBuiltinSetZvk; + defm vaesdm : RVVOutBuiltinSetZvk; + defm vaesef : RVVOutBuiltinSetZvk; + defm vaesem : RVVOutBuiltinSetZvk; + let UnMaskedPolicyScheme = HasPassthruOperand in + defm vaeskf1 : RVVOutOp1BuiltinSet<"vaeskf1", "i", [["vi", "Uv", "UvUvKz"]]>; + defm vaeskf2 : RVVOutOp2BuiltinSetVIZvk; + defm vaesz : RVVOutBuiltinSetZvk<HasVV=0>; + } + + // zvknha + let RequiredFeatures = ["Zvknha", "Experimental"] in { + defm vsha2ch : RVVOutOp2BuiltinSetVVZvk<"i">; + defm vsha2cl : RVVOutOp2BuiltinSetVVZvk<"i">; + defm vsha2ms : RVVOutOp2BuiltinSetVVZvk<"i">; + } + + // zvknhb + let RequiredFeatures = ["Zvknhb", "Experimental"] in { + defm vsha2ch : RVVOutOp2BuiltinSetVVZvk<"il">; + defm vsha2cl : RVVOutOp2BuiltinSetVVZvk<"il">; + defm vsha2ms : RVVOutOp2BuiltinSetVVZvk<"il">; + } + + // zvksed + let RequiredFeatures = ["Zvksed", "Experimental"] in { + let UnMaskedPolicyScheme = HasPassthruOperand in + defm vsm4k : RVVOutOp1BuiltinSet<"vsm4k", "i", [["vi", "Uv", "UvUvKz"]]>; + defm vsm4r : RVVOutBuiltinSetZvk; + } + + // zvksh + let RequiredFeatures = ["Zvksh", "Experimental"] in { + defm vsm3c : RVVOutOp2BuiltinSetVIZvk; + let UnMaskedPolicyScheme = HasPassthruOperand in + defm vsm3me : RVVOutOp1BuiltinSet<"vsm3me", "i", [["vv", "Uv", "UvUvUv"]]>; } } diff --git a/contrib/llvm-project/clang/include/clang/Basic/riscv_vector_common.td b/contrib/llvm-project/clang/include/clang/Basic/riscv_vector_common.td new file mode 100644 index 000000000000..040db6f0cdbf --- /dev/null +++ b/contrib/llvm-project/clang/include/clang/Basic/riscv_vector_common.td @@ -0,0 +1,713 @@ +//==------ riscv_vector_common.td - RISC-V V-ext builtin class ------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines RVV builtin base class for RISC-V V-extension. +// +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +// Instruction definitions +//===----------------------------------------------------------------------===// +// Each record of the class RVVBuiltin defines a collection of builtins (i.e. +// "def vadd : RVVBuiltin" will be used to define things like "vadd_vv_i32m1", +// "vadd_vv_i32m2", etc). +// +// The elements of this collection are defined by an instantiation process the +// range of which is specified by the cross product of the LMUL attribute and +// every element in the attribute TypeRange. By default builtins have LMUL = [1, +// 2, 4, 8, 1/2, 1/4, 1/8] so the process is repeated 7 times. In tablegen we +// use the Log2LMUL [0, 1, 2, 3, -1, -2, -3] to represent the LMUL. +// +// LMUL represents the fact that the types of values used by that builtin are +// values generated by instructions that are executed under that LMUL. However, +// this does not mean the builtin is necessarily lowered into an instruction +// that executes under the specified LMUL. An example where this happens are +// loads and stores of masks. A mask like `vbool8_t` can be generated, for +// instance, by comparing two `__rvv_int8m1_t` (this is LMUL=1) or comparing two +// `__rvv_int16m2_t` (this is LMUL=2). The actual load or store, however, will +// be performed under LMUL=1 because mask registers are not grouped. +// +// TypeRange is a non-empty sequence of basic types: +// +// c: int8_t (i8) +// s: int16_t (i16) +// i: int32_t (i32) +// l: int64_t (i64) +// x: float16_t (half) +// f: float32_t (float) +// d: float64_t (double) +// y: bfloat16_t (bfloat16) +// +// This way, given an LMUL, a record with a TypeRange "sil" will cause the +// definition of 3 builtins. Each type "t" in the TypeRange (in this example +// they are int16_t, int32_t, int64_t) is used as a parameter that drives the +// definition of that particular builtin (for the given LMUL). +// +// During the instantiation, types can be transformed or modified using type +// transformers. Given a type "t" the following primitive type transformers can +// be applied to it to yield another type. +// +// e: type of "t" as is (identity) +// v: computes a vector type whose element type is "t" for the current LMUL +// w: computes a vector type identical to what 'v' computes except for the +// element type which is twice as wide as the element type of 'v' +// q: computes a vector type identical to what 'v' computes except for the +// element type which is four times as wide as the element type of 'v' +// o: computes a vector type identical to what 'v' computes except for the +// element type which is eight times as wide as the element type of 'v' +// m: computes a vector type identical to what 'v' computes except for the +// element type which is bool +// 0: void type, ignores "t" +// z: size_t, ignores "t" +// t: ptrdiff_t, ignores "t" +// u: unsigned long, ignores "t" +// l: long, ignores "t" +// f: float32, ignores "t" +// +// So for instance if t is "i", i.e. int, then "e" will yield int again. "v" +// will yield an RVV vector type (assume LMUL=1), so __rvv_int32m1_t. +// Accordingly "w" would yield __rvv_int64m2_t. +// +// A type transformer can be prefixed by other non-primitive type transformers. +// +// P: constructs a pointer to the current type +// C: adds const to the type +// K: requires the integer type to be a constant expression +// U: given an integer type or vector type, computes its unsigned variant +// I: given a vector type, compute the vector type with integer type +// elements of the same width +// F: given a vector type, compute the vector type with floating-point type +// elements of the same width +// S: given a vector type, computes its equivalent one for LMUL=1. This is a +// no-op if the vector was already LMUL=1 +// (Log2EEW:Value): Log2EEW value could be 3/4/5/6 (8/16/32/64), given a +// vector type (SEW and LMUL) and EEW (8/16/32/64), computes its +// equivalent integer vector type with EEW and corresponding ELMUL (elmul = +// (eew/sew) * lmul). For example, vector type is __rvv_float16m4 +// (SEW=16, LMUL=4) and Log2EEW is 3 (EEW=8), and then equivalent vector +// type is __rvv_uint8m2_t (elmul=(8/16)*4 = 2). Ignore to define a new +// builtins if its equivalent type has illegal lmul. +// (FixedSEW:Value): Given a vector type (SEW and LMUL), and computes another +// vector type which only changed SEW as given value. Ignore to define a new +// builtin if its equivalent type has illegal lmul or the SEW does not changed. +// (SFixedLog2LMUL:Value): Smaller Fixed Log2LMUL. Given a vector type (SEW +// and LMUL), and computes another vector type which only changed LMUL as +// given value. The new LMUL should be smaller than the old one. Ignore to +// define a new builtin if its equivalent type has illegal lmul. +// (SEFixedLog2LMUL:Value): Smaller or Equal Fixed Log2LMUL. Given a vector +// type (SEW and LMUL), and computes another vector type which only +// changed LMUL as given value. The new LMUL should be smaller than or +// equal to the old one. Ignore to define a new builtin if its equivalent +// type has illegal lmul. +// (LFixedLog2LMUL:Value): Larger Fixed Log2LMUL. Given a vector type (SEW +// and LMUL), and computes another vector type which only changed LMUL as +// given value. The new LMUL should be larger than the old one. Ignore to +// define a new builtin if its equivalent type has illegal lmul. +// +// Following with the example above, if t is "i", then "Ue" will yield unsigned +// int and "Fv" will yield __rvv_float32m1_t (again assuming LMUL=1), Fw would +// yield __rvv_float64m2_t, etc. +// +// Each builtin is then defined by applying each type in TypeRange against the +// sequence of type transformers described in Suffix and Prototype. +// +// The name of the builtin is defined by the Name attribute (which defaults to +// the name of the class) appended (separated with an underscore) the Suffix +// attribute. For instance with Name="foo", Suffix = "v" and TypeRange = "il", +// the builtin generated will be __builtin_rvv_foo_i32m1 and +// __builtin_rvv_foo_i64m1 (under LMUL=1). If Suffix contains more than one +// type transformer (say "vv") each of the types is separated with an +// underscore as in "__builtin_rvv_foo_i32m1_i32m1". +// +// The C/C++ prototype of the builtin is defined by the Prototype attribute. +// Prototype is a non-empty sequence of type transformers, the first of which +// is the return type of the builtin and the rest are the parameters of the +// builtin, in order. For instance if Prototype is "wvv" and TypeRange is "si" +// a first builtin will have type +// __rvv_int32m2_t (__rvv_int16m1_t, __rvv_int16m1_t) and the second builtin +// will have type __rvv_int64m2_t (__rvv_int32m1_t, __rvv_int32m1_t) (again +// under LMUL=1). +// +// There are a number of attributes that are used to constraint the number and +// shape of the builtins generated. Refer to the comments below for them. + +class PolicyScheme<int val>{ + int Value = val; +} +def NonePolicy : PolicyScheme<0>; +def HasPassthruOperand : PolicyScheme<1>; +def HasPolicyOperand : PolicyScheme<2>; + +class RVVBuiltin<string suffix, string prototype, string type_range, + string overloaded_suffix = ""> { + // Base name that will be prepended in __builtin_rvv_ and appended the + // computed Suffix. + string Name = NAME; + + // If not empty, each instantiated builtin will have this appended after an + // underscore (_). It is instantiated like Prototype. + string Suffix = suffix; + + // If empty, default OverloadedName is sub string of `Name` which end of first + // '_'. For example, the default overloaded name is `vadd` for Name `vadd_vv`. + // It's used for describe some special naming cases. + string OverloadedName = ""; + + // If not empty, each OverloadedName will have this appended after an + // underscore (_). It is instantiated like Prototype. + string OverloadedSuffix = overloaded_suffix; + + // The different variants of the builtin, parameterised with a type. + string TypeRange = type_range; + + // We use each type described in TypeRange and LMUL with prototype to + // instantiate a specific element of the set of builtins being defined. + // Prototype attribute defines the C/C++ prototype of the builtin. It is a + // non-empty sequence of type transformers, the first of which is the return + // type of the builtin and the rest are the parameters of the builtin, in + // order. For instance if Prototype is "wvv", TypeRange is "si" and LMUL=1, a + // first builtin will have type + // __rvv_int32m2_t (__rvv_int16m1_t, __rvv_int16m1_t), and the second builtin + // will have type __rvv_int64m2_t (__rvv_int32m1_t, __rvv_int32m1_t). + string Prototype = prototype; + + // This builtin has a masked form. + bit HasMasked = true; + + // If HasMasked, this flag states that this builtin has a maskedoff operand. It + // is always the first operand in builtin and IR intrinsic. + bit HasMaskedOffOperand = true; + + // This builtin has a granted vector length parameter. + bit HasVL = true; + + // The policy scheme for masked intrinsic IR. + // It could be NonePolicy or HasPolicyOperand. + // HasPolicyOperand: Has a policy operand. 0 is tail and mask undisturbed, 1 is + // tail agnostic, 2 is mask undisturbed, and 3 is tail and mask agnostic. The + // policy operand is located at the last position. + PolicyScheme MaskedPolicyScheme = HasPolicyOperand; + + // The policy scheme for unmasked intrinsic IR. + // It could be NonePolicy, HasPassthruOperand or HasPolicyOperand. + // HasPassthruOperand: Has a passthru operand to decide tail policy. If it is + // poison, tail policy is tail agnostic, otherwise policy is tail undisturbed. + // HasPolicyOperand: Has a policy operand. 1 is tail agnostic and 0 is tail + // undisturbed. + PolicyScheme UnMaskedPolicyScheme = NonePolicy; + + // This builtin support tail agnostic and undisturbed policy. + bit HasTailPolicy = true; + // This builtin support mask agnostic and undisturbed policy. + bit HasMaskPolicy = true; + + // This builtin prototype with TA or TAMA policy could not support overloading + // API. Other policy intrinsic functions would support overloading API with + // suffix `_tu`, `tumu`, `tuma`, `tamu` and `tama`. + bit SupportOverloading = true; + + // This builtin is valid for the given Log2LMULs. + list<int> Log2LMUL = [0, 1, 2, 3, -1, -2, -3]; + + // Manual code in clang codegen riscv_vector_builtin_cg.inc + code ManualCodegen = [{}]; + + // When emit the automatic clang codegen, it describes what types we have to use + // to obtain the specific LLVM intrinsic. -1 means the return type, otherwise, + // k >= 0 meaning the k-th operand (counting from zero) of the codegen'd + // parameter of the unmasked version. k can't be the mask operand's position. + list<int> IntrinsicTypes = []; + + // If these names are not empty, this is the ID of the LLVM intrinsic + // we want to lower to. + string IRName = NAME; + + // If HasMasked, this is the ID of the LLVM intrinsic we want to lower to. + string MaskedIRName = NAME #"_mask"; + + // Use clang_builtin_alias to save the number of builtins. + bit HasBuiltinAlias = true; + + // Features required to enable for this builtin. + list<string> RequiredFeatures = []; + + // Number of fields for Load/Store Segment instructions. + int NF = 1; + + // Set to true if the builtin is associated with tuple types. + bit IsTuple = false; + + // Set to true if the builtin has a parameter that models floating-point + // rounding mode control + bit HasFRMRoundModeOp = false; +} + +// This is the code emitted in the header. +class RVVHeader { + code HeaderCode; +} + +//===----------------------------------------------------------------------===// +// Basic classes with automatic codegen. +//===----------------------------------------------------------------------===// + +class RVVOutBuiltin<string suffix, string prototype, string type_range> + : RVVBuiltin<suffix, prototype, type_range> { + let IntrinsicTypes = [-1]; +} + +class RVVOp0Builtin<string suffix, string prototype, string type_range> + : RVVBuiltin<suffix, prototype, type_range> { + let IntrinsicTypes = [0]; +} + +class RVVOutOp1Builtin<string suffix, string prototype, string type_range> + : RVVBuiltin<suffix, prototype, type_range> { + let IntrinsicTypes = [-1, 1]; +} + +class RVVOutOp0Op1Builtin<string suffix, string prototype, string type_range> + : RVVBuiltin<suffix, prototype, type_range> { + let IntrinsicTypes = [-1, 0, 1]; +} + +multiclass RVVBuiltinSet<string intrinsic_name, string type_range, + list<list<string>> suffixes_prototypes, + list<int> intrinsic_types> { + let IRName = intrinsic_name, MaskedIRName = intrinsic_name # "_mask", + IntrinsicTypes = intrinsic_types in { + foreach s_p = suffixes_prototypes in { + let Name = NAME # "_" # s_p[0] in { + defvar suffix = s_p[1]; + defvar prototype = s_p[2]; + def : RVVBuiltin<suffix, prototype, type_range>; + } + } + } +} + +// IntrinsicTypes is output, op0, op1 [-1, 0, 1] +multiclass RVVOutOp0Op1BuiltinSet<string intrinsic_name, string type_range, + list<list<string>> suffixes_prototypes> + : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, + [-1, 0, 1]>; + +multiclass RVVOutBuiltinSet<string intrinsic_name, string type_range, + list<list<string>> suffixes_prototypes> + : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [-1]>; + +multiclass RVVOp0BuiltinSet<string intrinsic_name, string type_range, + list<list<string>> suffixes_prototypes> + : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [0]>; + +// IntrinsicTypes is output, op1 [-1, 0] +multiclass RVVOutOp0BuiltinSet<string intrinsic_name, string type_range, + list<list<string>> suffixes_prototypes> + : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [-1, 0]>; + +// IntrinsicTypes is output, op1 [-1, 1] +multiclass RVVOutOp1BuiltinSet<string intrinsic_name, string type_range, + list<list<string>> suffixes_prototypes> + : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [-1, 1]>; + +multiclass RVVOp0Op1BuiltinSet<string intrinsic_name, string type_range, + list<list<string>> suffixes_prototypes> + : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [0, 1]>; + +multiclass RVVOutOp1Op2BuiltinSet<string intrinsic_name, string type_range, + list<list<string>> suffixes_prototypes> + : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [-1, 1, 2]>; + +// IntrinsicTypes is output, op2 [-1, 2] +multiclass RVVOutOp2BuiltinSet<string intrinsic_name, string type_range, + list<list<string>> suffixes_prototypes> + : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [-1, 2]>; + +multiclass RVVSignedBinBuiltinSet + : RVVOutOp1BuiltinSet<NAME, "csil", + [["vv", "v", "vvv"], + ["vx", "v", "vve"]]>; + +multiclass RVVSignedBinBuiltinSetRoundingMode + : RVVOutOp1BuiltinSet<NAME, "csil", + [["vv", "v", "vvvu"], + ["vx", "v", "vveu"]]>; + +multiclass RVVUnsignedBinBuiltinSet + : RVVOutOp1BuiltinSet<NAME, "csil", + [["vv", "Uv", "UvUvUv"], + ["vx", "Uv", "UvUvUe"]]>; + +multiclass RVVUnsignedBinBuiltinSetRoundingMode + : RVVOutOp1BuiltinSet<NAME, "csil", + [["vv", "Uv", "UvUvUvu"], + ["vx", "Uv", "UvUvUeu"]]>; + +multiclass RVVIntBinBuiltinSet + : RVVSignedBinBuiltinSet, + RVVUnsignedBinBuiltinSet; + +multiclass RVVInt64BinBuiltinSet + : RVVOutOp1BuiltinSet<NAME, "l", + [["vv", "v", "vvv"], + ["vx", "v", "vve"]]>, + RVVOutOp1BuiltinSet<NAME, "l", + [["vv", "Uv", "UvUvUv"], + ["vx", "Uv", "UvUvUe"]]>; + +multiclass RVVSlideOneBuiltinSet + : RVVOutOp1BuiltinSet<NAME, "csil", + [["vx", "v", "vve"], + ["vx", "Uv", "UvUvUe"]]>; + +multiclass RVVSignedShiftBuiltinSet + : RVVOutOp1BuiltinSet<NAME, "csil", + [["vv", "v", "vvUv"], + ["vx", "v", "vvz"]]>; + +multiclass RVVSignedShiftBuiltinSetRoundingMode + : RVVOutOp1BuiltinSet<NAME, "csil", + [["vv", "v", "vvUvu"], + ["vx", "v", "vvzu"]]>; + +multiclass RVVUnsignedShiftBuiltinSet + : RVVOutOp1BuiltinSet<NAME, "csil", + [["vv", "Uv", "UvUvUv"], + ["vx", "Uv", "UvUvz"]]>; + +multiclass RVVUnsignedShiftBuiltinSetRoundingMode + : RVVOutOp1BuiltinSet<NAME, "csil", + [["vv", "Uv", "UvUvUvu"], + ["vx", "Uv", "UvUvzu"]]>; + +multiclass RVVShiftBuiltinSet + : RVVSignedShiftBuiltinSet, + RVVUnsignedShiftBuiltinSet; + +let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { + multiclass RVVSignedNShiftBuiltinSet + : RVVOutOp0Op1BuiltinSet<NAME, "csil", + [["wv", "v", "vwUv"], + ["wx", "v", "vwz"]]>; + + multiclass RVVSignedNShiftBuiltinSetRoundingMode + : RVVOutOp0Op1BuiltinSet<NAME, "csil", + [["wv", "v", "vwUvu"], + ["wx", "v", "vwzu"]]>; + + multiclass RVVUnsignedNShiftBuiltinSet + : RVVOutOp0Op1BuiltinSet<NAME, "csil", + [["wv", "Uv", "UvUwUv"], + ["wx", "Uv", "UvUwz"]]>; + + multiclass RVVUnsignedNShiftBuiltinSetRoundingMode + : RVVOutOp0Op1BuiltinSet<NAME, "csil", + [["wv", "Uv", "UvUwUvu"], + ["wx", "Uv", "UvUwzu"]]>; + +} + +multiclass RVVCarryinBuiltinSet + : RVVOutOp1BuiltinSet<NAME, "csil", + [["vvm", "v", "vvvm"], + ["vxm", "v", "vvem"], + ["vvm", "Uv", "UvUvUvm"], + ["vxm", "Uv", "UvUvUem"]]>; + +multiclass RVVCarryOutInBuiltinSet<string intrinsic_name> + : RVVOp0Op1BuiltinSet<intrinsic_name, "csil", + [["vvm", "vm", "mvvm"], + ["vxm", "vm", "mvem"], + ["vvm", "Uvm", "mUvUvm"], + ["vxm", "Uvm", "mUvUem"]]>; + +multiclass RVVSignedMaskOutBuiltinSet + : RVVOp0Op1BuiltinSet<NAME, "csil", + [["vv", "vm", "mvv"], + ["vx", "vm", "mve"]]>; + +multiclass RVVUnsignedMaskOutBuiltinSet + : RVVOp0Op1BuiltinSet<NAME, "csil", + [["vv", "Uvm", "mUvUv"], + ["vx", "Uvm", "mUvUe"]]>; + +multiclass RVVIntMaskOutBuiltinSet + : RVVSignedMaskOutBuiltinSet, + RVVUnsignedMaskOutBuiltinSet; + +class RVVIntExt<string intrinsic_name, string suffix, string prototype, + string type_range> + : RVVBuiltin<suffix, prototype, type_range> { + let IRName = intrinsic_name; + let MaskedIRName = intrinsic_name # "_mask"; + let OverloadedName = NAME; + let IntrinsicTypes = [-1, 0]; +} + +let HasMaskedOffOperand = false in { + multiclass RVVIntTerBuiltinSet { + defm "" : RVVOutOp1BuiltinSet<NAME, "csil", + [["vv", "v", "vvvv"], + ["vx", "v", "vvev"], + ["vv", "Uv", "UvUvUvUv"], + ["vx", "Uv", "UvUvUeUv"]]>; + } + multiclass RVVFloatingTerBuiltinSet { + defm "" : RVVOutOp1BuiltinSet<NAME, "xfd", + [["vv", "v", "vvvv"], + ["vf", "v", "vvev"]]>; + } + multiclass RVVFloatingTerBuiltinSetRoundingMode { + defm "" : RVVOutOp1BuiltinSet<NAME, "xfd", + [["vv", "v", "vvvvu"], + ["vf", "v", "vvevu"]]>; + } +} + +let HasMaskedOffOperand = false, Log2LMUL = [-2, -1, 0, 1, 2] in { + multiclass RVVFloatingWidenTerBuiltinSet { + defm "" : RVVOutOp1Op2BuiltinSet<NAME, "xf", + [["vv", "w", "wwvv"], + ["vf", "w", "wwev"]]>; + } + multiclass RVVFloatingWidenTerBuiltinSetRoundingMode { + defm "" : RVVOutOp1Op2BuiltinSet<NAME, "xf", + [["vv", "w", "wwvvu"], + ["vf", "w", "wwevu"]]>; + } +} + +multiclass RVVFloatingBinBuiltinSet + : RVVOutOp1BuiltinSet<NAME, "xfd", + [["vv", "v", "vvv"], + ["vf", "v", "vve"]]>; + +multiclass RVVFloatingBinBuiltinSetRoundingMode + : RVVOutOp1BuiltinSet<NAME, "xfd", + [["vv", "v", "vvvu"], + ["vf", "v", "vveu"]]>; + +multiclass RVVFloatingBinVFBuiltinSet + : RVVOutOp1BuiltinSet<NAME, "xfd", + [["vf", "v", "vve"]]>; + +multiclass RVVFloatingBinVFBuiltinSetRoundingMode + : RVVOutOp1BuiltinSet<NAME, "xfd", + [["vf", "v", "vveu"]]>; + +multiclass RVVFloatingMaskOutBuiltinSet + : RVVOp0Op1BuiltinSet<NAME, "xfd", + [["vv", "vm", "mvv"], + ["vf", "vm", "mve"]]>; + +multiclass RVVFloatingMaskOutVFBuiltinSet + : RVVOp0Op1BuiltinSet<NAME, "fd", + [["vf", "vm", "mve"]]>; + +multiclass RVVConvBuiltinSet<string intrinsic_name, string type_range, + list<list<string>> suffixes_prototypes> { +let Name = intrinsic_name, + IRName = intrinsic_name, + MaskedIRName = intrinsic_name # "_mask", + IntrinsicTypes = [-1, 0] in { + foreach s_p = suffixes_prototypes in { + defvar suffix = s_p[0]; + defvar prototype = s_p[1]; + def : RVVBuiltin<suffix, prototype, type_range>; + } + } +} + + +class RVVMaskBinBuiltin : RVVOutBuiltin<"m", "mmm", "c"> { + let Name = NAME # "_mm"; + let HasMasked = false; +} + +class RVVMaskUnaryBuiltin : RVVOutBuiltin<"m", "mm", "c"> { + let Name = NAME # "_m"; +} + +class RVVMaskNullaryBuiltin : RVVOutBuiltin<"m", "m", "c"> { + let Name = NAME # "_m"; + let HasMasked = false; + let SupportOverloading = false; +} + +class RVVMaskOp0Builtin<string prototype> : RVVOp0Builtin<"m", prototype, "c"> { + let Name = NAME # "_m"; + let HasMaskedOffOperand = false; +} + +let UnMaskedPolicyScheme = HasPolicyOperand, + HasMaskedOffOperand = false in { + multiclass RVVSlideUpBuiltinSet { + defm "" : RVVOutBuiltinSet<NAME, "csilxfd", + [["vx","v", "vvvz"]]>; + defm "" : RVVOutBuiltinSet<NAME, "csil", + [["vx","Uv", "UvUvUvz"]]>; + } +} + +let UnMaskedPolicyScheme = HasPassthruOperand, + ManualCodegen = [{ + if (IsMasked) { + std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); + if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + } else { + if (PolicyAttrs & RVV_VTA) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + } + + Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + IntrinsicTypes = {ResultType, Ops.back()->getType()}; + }] in { + multiclass RVVSlideDownBuiltinSet { + defm "" : RVVOutBuiltinSet<NAME, "csilxfd", + [["vx","v", "vvz"]]>; + defm "" : RVVOutBuiltinSet<NAME, "csil", + [["vx","Uv", "UvUvz"]]>; + } +} + +class RVVFloatingUnaryBuiltin<string builtin_suffix, string ir_suffix, + string prototype> + : RVVOutBuiltin<ir_suffix, prototype, "xfd"> { + let Name = NAME # "_" # builtin_suffix; +} + +class RVVFloatingUnaryVVBuiltin : RVVFloatingUnaryBuiltin<"v", "v", "vv">; + +class RVVConvBuiltin<string suffix, string prototype, string type_range, + string overloaded_name> + : RVVBuiltin<suffix, prototype, type_range> { + let IntrinsicTypes = [-1, 0]; + let OverloadedName = overloaded_name; +} + +class RVVConvToSignedBuiltin<string overloaded_name> + : RVVConvBuiltin<"Iv", "Ivv", "xfd", overloaded_name>; + +class RVVConvToUnsignedBuiltin<string overloaded_name> + : RVVConvBuiltin<"Uv", "Uvv", "xfd", overloaded_name>; + +class RVVConvToWidenSignedBuiltin<string overloaded_name> + : RVVConvBuiltin<"Iw", "Iwv", "xf", overloaded_name>; + +class RVVConvToWidenUnsignedBuiltin<string overloaded_name> + : RVVConvBuiltin<"Uw", "Uwv", "xf", overloaded_name>; + +class RVVConvToNarrowingSignedBuiltin<string overloaded_name> + : RVVConvBuiltin<"Iv", "IvFw", "csi", overloaded_name>; + +class RVVConvToNarrowingUnsignedBuiltin<string overloaded_name> + : RVVConvBuiltin<"Uv", "UvFw", "csi", overloaded_name>; + +let HasMaskedOffOperand = true in { + multiclass RVVSignedReductionBuiltin { + defm "" : RVVOutOp0BuiltinSet<NAME, "csil", + [["vs", "vSv", "SvvSv"]]>; + } + multiclass RVVUnsignedReductionBuiltin { + defm "" : RVVOutOp0BuiltinSet<NAME, "csil", + [["vs", "UvUSv", "USvUvUSv"]]>; + } + multiclass RVVFloatingReductionBuiltin { + defm "" : RVVOutOp0BuiltinSet<NAME, "xfd", + [["vs", "vSv", "SvvSv"]]>; + } + multiclass RVVFloatingReductionBuiltinRoundingMode { + defm "" : RVVOutOp0BuiltinSet<NAME, "xfd", + [["vs", "vSv", "SvvSvu"]]>; + } + multiclass RVVFloatingWidenReductionBuiltin { + defm "" : RVVOutOp0BuiltinSet<NAME, "xf", + [["vs", "vSw", "SwvSw"]]>; + } + multiclass RVVFloatingWidenReductionBuiltinRoundingMode { + defm "" : RVVOutOp0BuiltinSet<NAME, "xf", + [["vs", "vSw", "SwvSwu"]]>; + } +} + +multiclass RVVIntReductionBuiltinSet + : RVVSignedReductionBuiltin, + RVVUnsignedReductionBuiltin; + +// For widen operation which has different mangling name. +multiclass RVVWidenBuiltinSet<string intrinsic_name, string type_range, + list<list<string>> suffixes_prototypes> { + let Log2LMUL = [-3, -2, -1, 0, 1, 2], + IRName = intrinsic_name, MaskedIRName = intrinsic_name # "_mask" in { + foreach s_p = suffixes_prototypes in { + let Name = NAME # "_" # s_p[0], + OverloadedName = NAME # "_" # s_p[0] in { + defvar suffix = s_p[1]; + defvar prototype = s_p[2]; + def : RVVOutOp0Op1Builtin<suffix, prototype, type_range>; + } + } + } +} + +// For widen operation with widen operand which has different mangling name. +multiclass RVVWidenWOp0BuiltinSet<string intrinsic_name, string type_range, + list<list<string>> suffixes_prototypes> { + let Log2LMUL = [-3, -2, -1, 0, 1, 2], + IRName = intrinsic_name, MaskedIRName = intrinsic_name # "_mask" in { + foreach s_p = suffixes_prototypes in { + let Name = NAME # "_" # s_p[0], + OverloadedName = NAME # "_" # s_p[0] in { + defvar suffix = s_p[1]; + defvar prototype = s_p[2]; + def : RVVOutOp1Builtin<suffix, prototype, type_range>; + } + } + } +} + +multiclass RVVSignedWidenBinBuiltinSet + : RVVWidenBuiltinSet<NAME, "csi", + [["vv", "w", "wvv"], + ["vx", "w", "wve"]]>; + +multiclass RVVSignedWidenOp0BinBuiltinSet + : RVVWidenWOp0BuiltinSet<NAME # "_w", "csi", + [["wv", "w", "wwv"], + ["wx", "w", "wwe"]]>; + +multiclass RVVUnsignedWidenBinBuiltinSet + : RVVWidenBuiltinSet<NAME, "csi", + [["vv", "Uw", "UwUvUv"], + ["vx", "Uw", "UwUvUe"]]>; + +multiclass RVVUnsignedWidenOp0BinBuiltinSet + : RVVWidenWOp0BuiltinSet<NAME # "_w", "csi", + [["wv", "Uw", "UwUwUv"], + ["wx", "Uw", "UwUwUe"]]>; + +multiclass RVVFloatingWidenBinBuiltinSet + : RVVWidenBuiltinSet<NAME, "xf", + [["vv", "w", "wvv"], + ["vf", "w", "wve"]]>; + +multiclass RVVFloatingWidenBinBuiltinSetRoundingMode + : RVVWidenBuiltinSet<NAME, "xf", + [["vv", "w", "wvvu"], + ["vf", "w", "wveu"]]>; + +multiclass RVVFloatingWidenOp0BinBuiltinSet + : RVVWidenWOp0BuiltinSet<NAME # "_w", "xf", + [["wv", "w", "wwv"], + ["wf", "w", "wwe"]]>; + +multiclass RVVFloatingWidenOp0BinBuiltinSetRoundingMode + : RVVWidenWOp0BuiltinSet<NAME # "_w", "xf", + [["wv", "w", "wwvu"], + ["wf", "w", "wweu"]]>; |