diff options
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/X86/X86SchedSkylakeClient.td')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Target/X86/X86SchedSkylakeClient.td | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/contrib/llvm-project/llvm/lib/Target/X86/X86SchedSkylakeClient.td index 0599564765da..8486bdda0349 100644 --- a/contrib/llvm-project/llvm/lib/Target/X86/X86SchedSkylakeClient.td +++ b/contrib/llvm-project/llvm/lib/Target/X86/X86SchedSkylakeClient.td @@ -203,6 +203,10 @@ defm : X86WriteRes<WriteStore, [SKLPort237, SKLPort4], 1, [1,1], 1>; defm : X86WriteRes<WriteStoreNT, [SKLPort237, SKLPort4], 1, [1,1], 2>; defm : X86WriteRes<WriteMove, [SKLPort0156], 1, [1], 1>; +// Model the effect of clobbering the read-write mask operand of the GATHER operation. +// Does not cost anything by itself, only has latency, matching that of the WriteLoad, +defm : X86WriteRes<WriteVecMaskedGatherWriteback, [], 5, [], 0>; + // Idioms that clear a register, like xorps %xmm0, %xmm0. // These can often bypass execution ports completely. def : WriteRes<WriteZero, []>; @@ -582,6 +586,7 @@ def : WriteRes<WriteSystem, [SKLPort0156]> { let Latency = 100; } // def Wri defm : SKLWriteResPair<WriteFShuffle256, [SKLPort5], 3, [1], 1, 7>; // Fp 256-bit width vector shuffles. defm : SKLWriteResPair<WriteFVarShuffle256, [SKLPort5], 3, [1], 1, 7>; // Fp 256-bit width vector variable shuffles. defm : SKLWriteResPair<WriteShuffle256, [SKLPort5], 3, [1], 1, 7>; // 256-bit width vector shuffles. +defm : SKLWriteResPair<WriteVPMOV256, [SKLPort5], 3, [1], 1, 7>; // 256-bit width packed vector width-changing move. defm : SKLWriteResPair<WriteVarShuffle256, [SKLPort5], 3, [1], 1, 7>; // 256-bit width vector variable shuffles. // Old microcoded instructions that nobody use. |