diff options
Diffstat (limited to 'lib/libpmc/pmu-events/arch/x86/cascadelakex/other.json')
| -rw-r--r-- | lib/libpmc/pmu-events/arch/x86/cascadelakex/other.json | 6968 |
1 files changed, 113 insertions, 6855 deletions
diff --git a/lib/libpmc/pmu-events/arch/x86/cascadelakex/other.json b/lib/libpmc/pmu-events/arch/x86/cascadelakex/other.json index 2f111a22d81f..60d8a99813b9 100644 --- a/lib/libpmc/pmu-events/arch/x86/cascadelakex/other.json +++ b/lib/libpmc/pmu-events/arch/x86/cascadelakex/other.json @@ -76,477 +76,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_DATA_RD.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0000010491", + "MSRValue": "0x10491", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.ANY_SNOOP OCR.ALL_DATA_RD.L3_HIT.ANY_SNOOP OCR.ALL_DATA_RD.L3_HIT.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F803C0491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_HIT.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10003C0491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08003C0491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_HIT.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01003C0491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08007C0491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_MISS OCR.ALL_DATA_RD.L3_HIT.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02003C0491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_NONE OCR.ALL_DATA_RD.L3_HIT.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00803C0491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.ANY_SNOOP OCR.ALL_DATA_RD.L3_HIT_E.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80080491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_HIT_E.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_E.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000080491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800080491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400080491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100080491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200080491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080080491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.ANY_SNOOP OCR.ALL_DATA_RD.L3_HIT_F.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_F.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80200491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_HIT_F.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_F.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000200491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800200491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400200491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100200491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_F.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200200491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_F.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080200491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.ANY_SNOOP OCR.ALL_DATA_RD.L3_HIT_M.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80040491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_HIT_M.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_M.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000040491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800040491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400040491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100040491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200040491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080040491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.ANY_SNOOP OCR.ALL_DATA_RD.L3_HIT_S.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80100491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_HIT_S.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_S.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000100491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800100491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400100491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100100491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200100491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_DATA_RD.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080100491", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -559,7 +90,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80400491", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -570,9 +100,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080400491", + "MSRValue": "0x80400491", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -583,9 +112,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100400491", + "MSRValue": "0x100400491", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -598,7 +126,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80020491", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -611,7 +138,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x1000020491", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -622,9 +148,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800020491", + "MSRValue": "0x800020491", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -635,9 +160,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400020491", + "MSRValue": "0x400020491", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -648,9 +172,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100020491", + "MSRValue": "0x100020491", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -661,9 +184,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_MISS", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200020491", + "MSRValue": "0x200020491", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -674,9 +196,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080020491", + "MSRValue": "0x80020491", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -687,477 +208,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_DATA_RD.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0000010490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_HIT.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_HIT.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F803C0490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_HIT.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10003C0490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08003C0490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_HIT.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01003C0490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08007C0490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_MISS OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02003C0490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_NONE OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00803C0490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_HIT_E.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80080490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_HIT_E.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000080490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800080490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400080490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100080490", + "MSRValue": "0x10490", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200080490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080080490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_HIT_F.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80200490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_HIT_F.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000200490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800200490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400200490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100200490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200200490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080200490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_HIT_M.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80040490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_HIT_M.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000040490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800040490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400040490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100040490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200040490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080040490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_HIT_S.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80100490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_HIT_S.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000100490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800100490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400100490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100100490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200100490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080100490", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1170,7 +222,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80400490", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1181,9 +232,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080400490", + "MSRValue": "0x80400490", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1194,9 +244,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100400490", + "MSRValue": "0x100400490", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1209,7 +258,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80020490", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1222,7 +270,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x1000020490", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1233,9 +280,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800020490", + "MSRValue": "0x800020490", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1246,9 +292,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400020490", + "MSRValue": "0x400020490", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1259,9 +304,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100020490", + "MSRValue": "0x100020490", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1272,9 +316,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_MISS", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200020490", + "MSRValue": "0x200020490", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1285,9 +328,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080020490", + "MSRValue": "0x80020490", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1298,477 +340,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_RFO.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0000010120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.ANY_SNOOP OCR.ALL_PF_RFO.L3_HIT.ANY_SNOOP OCR.ALL_PF_RFO.L3_HIT.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F803C0120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_HIT.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_HIT.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10003C0120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08003C0120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_HIT.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01003C0120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_HIT_WITH_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_HIT_WITH_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08007C0120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_MISS OCR.ALL_PF_RFO.L3_HIT.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02003C0120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_NONE OCR.ALL_PF_RFO.L3_HIT.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00803C0120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.ANY_SNOOP OCR.ALL_PF_RFO.L3_HIT_E.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80080120", + "MSRValue": "0x10120", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_HIT_E.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_E.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000080120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800080120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400080120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_HIT_E.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_E.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100080120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200080120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080080120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.ANY_SNOOP OCR.ALL_PF_RFO.L3_HIT_F.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_F.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80200120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_HIT_F.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_F.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000200120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800200120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400200120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_HIT_F.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_F.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100200120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_F.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200200120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_F.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080200120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.ANY_SNOOP OCR.ALL_PF_RFO.L3_HIT_M.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80040120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_HIT_M.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_M.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000040120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800040120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400040120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_HIT_M.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_M.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100040120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200040120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080040120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.ANY_SNOOP OCR.ALL_PF_RFO.L3_HIT_S.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80100120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_HIT_S.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_S.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000100120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800100120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400100120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_HIT_S.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_S.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100100120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200100120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_PF_RFO.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080100120", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1781,7 +354,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80400120", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1792,9 +364,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080400120", + "MSRValue": "0x80400120", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1805,9 +376,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100400120", + "MSRValue": "0x100400120", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1820,7 +390,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80020120", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1833,7 +402,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x1000020120", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1844,9 +412,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800020120", + "MSRValue": "0x800020120", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1857,9 +424,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400020120", + "MSRValue": "0x400020120", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1870,9 +436,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100020120", + "MSRValue": "0x100020120", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1883,9 +448,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_MISS", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200020120", + "MSRValue": "0x200020120", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1896,9 +460,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080020120", + "MSRValue": "0x80020120", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1909,477 +472,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_READS.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00000107F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT.ANY_SNOOP OCR.ALL_READS.L3_HIT.ANY_SNOOP OCR.ALL_READS.L3_HIT.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F803C07F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT.HITM_OTHER_CORE OCR.ALL_READS.L3_HIT.HITM_OTHER_CORE OCR.ALL_READS.L3_HIT.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10003C07F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08003C07F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C07F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_READS.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_READS.L3_HIT.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01003C07F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT.SNOOP_HIT_WITH_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT.SNOOP_HIT_WITH_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08007C07F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT.SNOOP_MISS OCR.ALL_READS.L3_HIT.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02003C07F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT.SNOOP_NONE OCR.ALL_READS.L3_HIT.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00803C07F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_E.ANY_SNOOP OCR.ALL_READS.L3_HIT_E.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F800807F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_E.HITM_OTHER_CORE OCR.ALL_READS.L3_HIT_E.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_E.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10000807F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08000807F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04000807F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_E.NO_SNOOP_NEEDED OCR.ALL_READS.L3_HIT_E.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_E.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01000807F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_E.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02000807F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_E.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00800807F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_F.ANY_SNOOP OCR.ALL_READS.L3_HIT_F.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_F.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F802007F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_F.HITM_OTHER_CORE OCR.ALL_READS.L3_HIT_F.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_F.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10002007F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08002007F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04002007F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_F.NO_SNOOP_NEEDED OCR.ALL_READS.L3_HIT_F.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_F.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01002007F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_F.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_F.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02002007F7", + "MSRValue": "0x107F7", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_F.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_F.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00802007F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_M.ANY_SNOOP OCR.ALL_READS.L3_HIT_M.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F800407F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_M.HITM_OTHER_CORE OCR.ALL_READS.L3_HIT_M.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_M.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10000407F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08000407F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04000407F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_M.NO_SNOOP_NEEDED OCR.ALL_READS.L3_HIT_M.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_M.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01000407F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_M.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02000407F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_M.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00800407F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_S.ANY_SNOOP OCR.ALL_READS.L3_HIT_S.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F801007F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_S.HITM_OTHER_CORE OCR.ALL_READS.L3_HIT_S.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_S.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10001007F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08001007F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04001007F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_S.NO_SNOOP_NEEDED OCR.ALL_READS.L3_HIT_S.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_S.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01001007F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_S.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02001007F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_READS.L3_HIT_S.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_READS.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00801007F7", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -2392,7 +486,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F804007F7", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -2403,9 +496,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00804007F7", + "MSRValue": "0x804007F7", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -2416,9 +508,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01004007F7", + "MSRValue": "0x1004007F7", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -2431,7 +522,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F800207F7", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -2444,7 +534,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x10000207F7", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -2455,9 +544,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08000207F7", + "MSRValue": "0x8000207F7", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -2468,9 +556,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04000207F7", + "MSRValue": "0x4000207F7", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -2481,9 +568,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_READS.SUPPLIER_NONE.NO_SNOOP_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01000207F7", + "MSRValue": "0x1000207F7", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -2494,9 +580,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_READS.SUPPLIER_NONE.SNOOP_MISS", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02000207F7", + "MSRValue": "0x2000207F7", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -2507,9 +592,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_READS.SUPPLIER_NONE.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00800207F7", + "MSRValue": "0x800207F7", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -2520,477 +604,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_RFO.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0000010122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT.ANY_SNOOP OCR.ALL_RFO.L3_HIT.ANY_SNOOP OCR.ALL_RFO.L3_HIT.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F803C0122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT.HITM_OTHER_CORE OCR.ALL_RFO.L3_HIT.HITM_OTHER_CORE OCR.ALL_RFO.L3_HIT.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10003C0122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08003C0122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_HIT.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01003C0122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT.SNOOP_HIT_WITH_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT.SNOOP_HIT_WITH_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08007C0122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT.SNOOP_MISS OCR.ALL_RFO.L3_HIT.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02003C0122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT.SNOOP_NONE OCR.ALL_RFO.L3_HIT.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00803C0122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_E.ANY_SNOOP OCR.ALL_RFO.L3_HIT_E.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80080122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_E.HITM_OTHER_CORE OCR.ALL_RFO.L3_HIT_E.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_E.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000080122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800080122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400080122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_E.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_HIT_E.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_E.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100080122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_E.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200080122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_E.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080080122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_F.ANY_SNOOP OCR.ALL_RFO.L3_HIT_F.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_F.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80200122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_F.HITM_OTHER_CORE OCR.ALL_RFO.L3_HIT_F.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_F.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000200122", + "MSRValue": "0x10122", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800200122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400200122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_F.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_HIT_F.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_F.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100200122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_F.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_F.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200200122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_F.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_F.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080200122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_M.ANY_SNOOP OCR.ALL_RFO.L3_HIT_M.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80040122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_M.HITM_OTHER_CORE OCR.ALL_RFO.L3_HIT_M.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_M.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000040122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800040122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400040122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_M.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_HIT_M.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_M.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100040122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_M.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200040122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_M.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080040122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_S.ANY_SNOOP OCR.ALL_RFO.L3_HIT_S.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80100122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_S.HITM_OTHER_CORE OCR.ALL_RFO.L3_HIT_S.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_S.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000100122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800100122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400100122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_S.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_HIT_S.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_S.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100100122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_S.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200100122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "OCR.ALL_RFO.L3_HIT_S.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.ALL_RFO.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080100122", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3003,7 +618,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80400122", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3014,9 +628,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080400122", + "MSRValue": "0x80400122", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3027,9 +640,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100400122", + "MSRValue": "0x100400122", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3042,7 +654,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80020122", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3055,7 +666,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x1000020122", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3066,9 +676,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800020122", + "MSRValue": "0x800020122", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3079,9 +688,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400020122", + "MSRValue": "0x400020122", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3092,9 +700,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100020122", + "MSRValue": "0x100020122", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3105,9 +712,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_RFO.SUPPLIER_NONE.SNOOP_MISS", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200020122", + "MSRValue": "0x200020122", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3118,9 +724,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.ALL_RFO.SUPPLIER_NONE.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080020122", + "MSRValue": "0x80020122", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3131,477 +736,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_CODE_RD.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0000010004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT.ANY_SNOOP OCR.DEMAND_CODE_RD.L3_HIT.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F803C0004", + "MSRValue": "0x10004", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT.HITM_OTHER_CORE OCR.DEMAND_CODE_RD.L3_HIT.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10003C0004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08003C0004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT.NO_SNOOP_NEEDED OCR.DEMAND_CODE_RD.L3_HIT.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01003C0004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_HIT_WITH_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08007C0004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02003C0004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00803C0004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_E.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80080004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_E.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_E.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000080004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_E.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_E.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800080004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400080004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_E.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_E.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100080004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200080004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080080004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_F.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_F.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80200004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_F.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_F.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000200004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_F.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_F.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800200004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400200004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_F.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_F.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100200004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_F.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200200004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_F.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080200004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_M.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80040004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_M.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_M.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000040004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_M.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_M.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800040004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400040004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_M.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_M.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100040004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200040004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080040004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_S.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80100004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_S.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_S.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000100004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_S.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_S.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800100004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400100004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_S.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_S.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100100004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200100004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand code reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_CODE_RD.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080100004", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3614,7 +750,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80400004", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3625,9 +760,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080400004", + "MSRValue": "0x80400004", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3638,9 +772,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100400004", + "MSRValue": "0x100400004", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3653,7 +786,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80020004", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3666,7 +798,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x1000020004", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3677,9 +808,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800020004", + "MSRValue": "0x800020004", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3690,9 +820,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400020004", + "MSRValue": "0x400020004", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3703,9 +832,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100020004", + "MSRValue": "0x100020004", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3716,9 +844,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_MISS", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200020004", + "MSRValue": "0x200020004", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3729,9 +856,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080020004", + "MSRValue": "0x80020004", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -3742,477 +868,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0000010001", + "MSRValue": "0x10001", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT.ANY_SNOOP OCR.DEMAND_DATA_RD.L3_HIT.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F803C0001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.DEMAND_DATA_RD.L3_HIT.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10003C0001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08003C0001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.DEMAND_DATA_RD.L3_HIT.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01003C0001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08007C0001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02003C0001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00803C0001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_E.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80080001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_E.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_E.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000080001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800080001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400080001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100080001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200080001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080080001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_F.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_F.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80200001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_F.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_F.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000200001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800200001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400200001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100200001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_F.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200200001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_F.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080200001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_M.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80040001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_M.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_M.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000040001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800040001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400040001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100040001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200040001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080040001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_S.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80100001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_S.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_S.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000100001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800100001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400100001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100100001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200100001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts demand data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_DATA_RD.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080100001", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4225,7 +882,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80400001", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4236,9 +892,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080400001", + "MSRValue": "0x80400001", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4249,9 +904,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100400001", + "MSRValue": "0x100400001", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4264,7 +918,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80020001", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4277,7 +930,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x1000020001", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4288,9 +940,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800020001", + "MSRValue": "0x800020001", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4301,9 +952,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400020001", + "MSRValue": "0x400020001", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4314,9 +964,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100020001", + "MSRValue": "0x100020001", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4327,9 +976,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_MISS", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200020001", + "MSRValue": "0x200020001", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4340,9 +988,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080020001", + "MSRValue": "0x80020001", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4353,477 +1000,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_RFO.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0000010002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT.ANY_SNOOP OCR.DEMAND_RFO.L3_HIT.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F803C0002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT.HITM_OTHER_CORE OCR.DEMAND_RFO.L3_HIT.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10003C0002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08003C0002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.DEMAND_RFO.L3_HIT.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01003C0002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs)", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT.SNOOP_HIT_WITH_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08007C0002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02003C0002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00803C0002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_E.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80080002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_E.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_E.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000080002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800080002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400080002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_E.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_E.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100080002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs)", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200080002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs)", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080080002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_F.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_F.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80200002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_F.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_F.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000200002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800200002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400200002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_F.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_F.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100200002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs)", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_F.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200200002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs)", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_F.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080200002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_M.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80040002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_M.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_M.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000040002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800040002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400040002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_M.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_M.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100040002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs)", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200040002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs)", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080040002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_S.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80100002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_S.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_S.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000100002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800100002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400100002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_S.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_S.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100100002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs)", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200100002", + "MSRValue": "0x10002", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all demand data writes (RFOs)", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.DEMAND_RFO.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080100002", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4836,7 +1014,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80400002", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4847,9 +1024,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080400002", + "MSRValue": "0x80400002", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4860,9 +1036,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100400002", + "MSRValue": "0x100400002", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4875,7 +1050,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80020002", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4888,7 +1062,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x1000020002", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4899,9 +1072,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800020002", + "MSRValue": "0x800020002", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4912,9 +1084,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400020002", + "MSRValue": "0x400020002", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4925,9 +1096,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100020002", + "MSRValue": "0x100020002", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4938,9 +1108,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.SNOOP_MISS", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200020002", + "MSRValue": "0x200020002", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4951,9 +1120,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080020002", + "MSRValue": "0x80020002", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -4964,477 +1132,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.OTHER.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0000018000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT.ANY_SNOOP OCR.OTHER.L3_HIT.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F803C8000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT.HITM_OTHER_CORE OCR.OTHER.L3_HIT.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10003C8000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT.HIT_OTHER_CORE_FWD OCR.OTHER.L3_HIT.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08003C8000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.OTHER.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C8000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT.NO_SNOOP_NEEDED OCR.OTHER.L3_HIT.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01003C8000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT.SNOOP_HIT_WITH_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08007C8000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02003C8000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00803C8000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_E.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80088000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_E.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_E.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000088000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_E.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_E.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800088000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400088000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_E.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_E.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100088000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200088000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080088000", + "MSRValue": "0x18000", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_F.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_F.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80208000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_F.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_F.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000208000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_F.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_F.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800208000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400208000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_F.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_F.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100208000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_F.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200208000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_F.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080208000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_M.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80048000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_M.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_M.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000048000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_M.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_M.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800048000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400048000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_M.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_M.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100048000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200048000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080048000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_S.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80108000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_S.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_S.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000108000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_S.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_S.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800108000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400108000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_S.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_S.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100108000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200108000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts any other requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.OTHER.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080108000", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -5447,7 +1146,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80408000", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -5458,9 +1156,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.OTHER.PMM_HIT_LOCAL_PMM.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080408000", + "MSRValue": "0x80408000", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -5471,9 +1168,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.OTHER.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100408000", + "MSRValue": "0x100408000", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -5486,7 +1182,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80028000", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -5499,7 +1194,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x1000028000", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -5510,9 +1204,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.OTHER.SUPPLIER_NONE.HIT_OTHER_CORE_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800028000", + "MSRValue": "0x800028000", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -5523,9 +1216,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.OTHER.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400028000", + "MSRValue": "0x400028000", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -5536,9 +1228,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.OTHER.SUPPLIER_NONE.NO_SNOOP_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100028000", + "MSRValue": "0x100028000", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -5549,9 +1240,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.OTHER.SUPPLIER_NONE.SNOOP_MISS", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200028000", + "MSRValue": "0x200028000", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -5562,9 +1252,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.OTHER.SUPPLIER_NONE.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080028000", + "MSRValue": "0x80028000", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -5575,477 +1264,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L1D_AND_SW.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0000010400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT.ANY_SNOOP OCR.PF_L1D_AND_SW.L3_HIT.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F803C0400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT.HITM_OTHER_CORE OCR.PF_L1D_AND_SW.L3_HIT.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10003C0400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_FWD OCR.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08003C0400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT.NO_SNOOP_NEEDED OCR.PF_L1D_AND_SW.L3_HIT.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01003C0400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT.SNOOP_HIT_WITH_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08007C0400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02003C0400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00803C0400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_E.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80080400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_E.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_E.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000080400", + "MSRValue": "0x10400", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_E.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_E.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800080400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400080400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_E.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_E.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100080400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200080400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080080400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_F.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_F.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80200400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_F.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_F.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000200400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_F.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_F.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800200400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400200400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_F.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_F.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100200400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_F.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200200400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_F.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080200400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_M.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80040400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_M.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_M.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000040400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_M.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_M.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800040400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400040400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_M.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_M.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100040400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200040400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080040400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_S.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80100400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_S.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_S.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000100400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_S.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_S.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800100400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400100400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_S.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_S.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100100400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200100400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L1D_AND_SW.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080100400", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6058,7 +1278,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80400400", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6069,9 +1288,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080400400", + "MSRValue": "0x80400400", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6082,9 +1300,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100400400", + "MSRValue": "0x100400400", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6097,7 +1314,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80020400", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6110,7 +1326,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x1000020400", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6121,9 +1336,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HIT_OTHER_CORE_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800020400", + "MSRValue": "0x800020400", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6134,9 +1348,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400020400", + "MSRValue": "0x400020400", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6147,9 +1360,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.NO_SNOOP_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100020400", + "MSRValue": "0x100020400", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6160,9 +1372,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.SNOOP_MISS", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200020400", + "MSRValue": "0x200020400", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6173,9 +1384,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080020400", + "MSRValue": "0x80020400", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6186,477 +1396,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_DATA_RD.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0000010010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT.ANY_SNOOP OCR.PF_L2_DATA_RD.L3_HIT.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F803C0010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.PF_L2_DATA_RD.L3_HIT.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10003C0010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08003C0010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.PF_L2_DATA_RD.L3_HIT.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01003C0010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08007C0010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02003C0010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00803C0010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_E.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80080010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_E.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_E.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000080010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800080010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400080010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100080010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200080010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080080010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_F.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_F.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80200010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_F.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_F.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000200010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800200010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400200010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100200010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_F.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200200010", + "MSRValue": "0x10010", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_F.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080200010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_M.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80040010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_M.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_M.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000040010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800040010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400040010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100040010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200040010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080040010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_S.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80100010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_S.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_S.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000100010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800100010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400100010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100100010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200100010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts prefetch (that bring data to L2) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_DATA_RD.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080100010", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6669,7 +1410,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80400010", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6680,9 +1420,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080400010", + "MSRValue": "0x80400010", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6693,9 +1432,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100400010", + "MSRValue": "0x100400010", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6708,7 +1446,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80020010", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6721,7 +1458,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x1000020010", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6732,9 +1468,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800020010", + "MSRValue": "0x800020010", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6745,9 +1480,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400020010", + "MSRValue": "0x400020010", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6758,9 +1492,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100020010", + "MSRValue": "0x100020010", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6771,9 +1504,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.SNOOP_MISS", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200020010", + "MSRValue": "0x200020010", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6784,9 +1516,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080020010", + "MSRValue": "0x80020010", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -6797,477 +1528,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_RFO.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0000010020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT.ANY_SNOOP OCR.PF_L2_RFO.L3_HIT.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F803C0020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT.HITM_OTHER_CORE OCR.PF_L2_RFO.L3_HIT.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10003C0020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08003C0020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.PF_L2_RFO.L3_HIT.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01003C0020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT.SNOOP_HIT_WITH_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08007C0020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02003C0020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00803C0020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_E.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80080020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_E.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_E.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000080020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800080020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400080020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_E.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_E.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100080020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200080020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080080020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_F.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_F.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80200020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_F.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_F.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000200020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800200020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400200020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_F.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_F.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100200020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_F.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200200020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_F.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080200020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_M.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80040020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_M.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_M.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000040020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800040020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400040020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_M.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_M.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100040020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200040020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080040020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_S.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80100020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_S.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_S.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000100020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800100020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400100020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_S.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_S.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100100020", + "MSRValue": "0x10020", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200100020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L2_RFO.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080100020", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7280,7 +1542,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80400020", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7291,9 +1552,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080400020", + "MSRValue": "0x80400020", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7304,9 +1564,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100400020", + "MSRValue": "0x100400020", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7319,7 +1578,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80020020", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7332,7 +1590,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x1000020020", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7343,9 +1600,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800020020", + "MSRValue": "0x800020020", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7356,9 +1612,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400020020", + "MSRValue": "0x400020020", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7369,9 +1624,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100020020", + "MSRValue": "0x100020020", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7382,9 +1636,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.SNOOP_MISS", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200020020", + "MSRValue": "0x200020020", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7395,9 +1648,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080020020", + "MSRValue": "0x80020020", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7408,477 +1660,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_DATA_RD.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0000010080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT.ANY_SNOOP OCR.PF_L3_DATA_RD.L3_HIT.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F803C0080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.PF_L3_DATA_RD.L3_HIT.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10003C0080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08003C0080", + "MSRValue": "0x10080", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.PF_L3_DATA_RD.L3_HIT.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01003C0080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08007C0080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02003C0080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00803C0080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_E.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80080080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_E.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_E.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000080080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800080080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400080080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100080080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200080080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080080080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_F.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_F.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80200080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_F.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_F.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000200080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800200080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400200080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100200080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_F.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200200080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_F.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080200080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_M.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80040080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_M.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_M.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000040080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800040080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400040080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100040080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200040080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080040080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_S.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80100080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_S.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_S.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000100080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800100080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400100080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100100080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200100080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_DATA_RD.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080100080", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7891,7 +1674,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80400080", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7902,9 +1684,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080400080", + "MSRValue": "0x80400080", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7915,9 +1696,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100400080", + "MSRValue": "0x100400080", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7930,7 +1710,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80020080", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7943,7 +1722,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x1000020080", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7954,9 +1732,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800020080", + "MSRValue": "0x800020080", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7967,9 +1744,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400020080", + "MSRValue": "0x400020080", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7980,9 +1756,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100020080", + "MSRValue": "0x100020080", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -7993,9 +1768,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.SNOOP_MISS", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200020080", + "MSRValue": "0x200020080", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -8006,9 +1780,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080020080", + "MSRValue": "0x80020080", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -8019,477 +1792,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_RFO.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0000010100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT.ANY_SNOOP OCR.PF_L3_RFO.L3_HIT.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F803C0100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT.HITM_OTHER_CORE OCR.PF_L3_RFO.L3_HIT.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x10003C0100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08003C0100", + "MSRValue": "0x10100", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.PF_L3_RFO.L3_HIT.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x01003C0100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT.SNOOP_HIT_WITH_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x08007C0100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT.SNOOP_MISS", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x02003C0100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT.SNOOP_NONE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x00803C0100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_E.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_E.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80080100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_E.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_E.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000080100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800080100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400080100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_E.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_E.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100080100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_E.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200080100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_E.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080080100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_F.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_F.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80200100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_F.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_F.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000200100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800200100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400200100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_F.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_F.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100200100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_F.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200200100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_F.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080200100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_M.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_M.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80040100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_M.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_M.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000040100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800040100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400040100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_M.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_M.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100040100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_M.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200040100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_M.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080040100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_S.ANY_SNOOP", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_S.ANY_SNOOP", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x3F80100100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_S.HITM_OTHER_CORE", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_S.HITM_OTHER_CORE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x1000100100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800100100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400100100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_S.NO_SNOOP_NEEDED", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_S.NO_SNOOP_NEEDED", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100100100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_S.SNOOP_MISS", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200100100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", - "SampleAfterValue": "100003", - "UMask": "0x1" - }, - { - "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", - "EventCode": "0xB7, 0xBB", - "EventName": "OCR.PF_L3_RFO.L3_HIT_S.SNOOP_NONE", - "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080100100", - "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -8502,7 +1806,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80400100", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -8513,9 +1816,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080400100", + "MSRValue": "0x80400100", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -8526,9 +1828,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100400100", + "MSRValue": "0x100400100", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -8541,7 +1842,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F80020100", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -8554,7 +1854,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x1000020100", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -8565,9 +1864,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0800020100", + "MSRValue": "0x800020100", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -8578,9 +1876,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0400020100", + "MSRValue": "0x400020100", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -8591,9 +1888,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0100020100", + "MSRValue": "0x100020100", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -8604,9 +1900,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.SNOOP_MISS", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0200020100", + "MSRValue": "0x200020100", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -8617,46 +1912,9 @@ "EventCode": "0xB7, 0xBB", "EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.SNOOP_NONE", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0080020100", + "MSRValue": "0x80020100", "Offcore": "1", - "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", "SampleAfterValue": "100003", "UMask": "0x1" - }, - { - "BriefDescription": "Number of PREFETCHNTA instructions executed.", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3,4,5,6,7", - "EventCode": "0x32", - "EventName": "SW_PREFETCH_ACCESS.NTA", - "SampleAfterValue": "2000003", - "UMask": "0x1" - }, - { - "BriefDescription": "Number of PREFETCHW instructions executed.", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3,4,5,6,7", - "EventCode": "0x32", - "EventName": "SW_PREFETCH_ACCESS.PREFETCHW", - "SampleAfterValue": "2000003", - "UMask": "0x8" - }, - { - "BriefDescription": "Number of PREFETCHT0 instructions executed.", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3,4,5,6,7", - "EventCode": "0x32", - "EventName": "SW_PREFETCH_ACCESS.T0", - "SampleAfterValue": "2000003", - "UMask": "0x2" - }, - { - "BriefDescription": "Number of PREFETCHT1 or PREFETCHT2 instructions executed.", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3,4,5,6,7", - "EventCode": "0x32", - "EventName": "SW_PREFETCH_ACCESS.T1_T2", - "SampleAfterValue": "2000003", - "UMask": "0x4" } -]
\ No newline at end of file +] |