diff options
Diffstat (limited to 'secure/lib/libcrypto/man/man3/OPENSSL_riscvcap.3')
| -rw-r--r-- | secure/lib/libcrypto/man/man3/OPENSSL_riscvcap.3 | 41 |
1 files changed, 25 insertions, 16 deletions
diff --git a/secure/lib/libcrypto/man/man3/OPENSSL_riscvcap.3 b/secure/lib/libcrypto/man/man3/OPENSSL_riscvcap.3 index e8dec8930974..b5e72f16fa84 100644 --- a/secure/lib/libcrypto/man/man3/OPENSSL_riscvcap.3 +++ b/secure/lib/libcrypto/man/man3/OPENSSL_riscvcap.3 @@ -1,5 +1,5 @@ .\" -*- mode: troff; coding: utf-8 -*- -.\" Automatically generated by Pod::Man 5.0102 (Pod::Simple 3.45) +.\" Automatically generated by Pod::Man v6.0.2 (Pod::Simple 3.45) .\" .\" Standard preamble: .\" ======================================================================== @@ -52,10 +52,13 @@ . \} .\} .rr rF +.\" +.\" Required to disable full justification in groff 1.23.0. +.if n .ds AD l .\" ======================================================================== .\" .IX Title "OPENSSL_RISCVCAP 3ossl" -.TH OPENSSL_RISCVCAP 3ossl 2025-09-30 3.5.4 OpenSSL +.TH OPENSSL_RISCVCAP 3ossl 2026-04-07 3.5.6 OpenSSL .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l @@ -69,18 +72,18 @@ OPENSSL_riscvcap \- the RISC\-V processor capabilities vector .Ve .SH DESCRIPTION .IX Header "DESCRIPTION" -libcrypto supports RISC-V instruction set extensions. These +libcrypto supports RISC\-V instruction set extensions. These extensions are denoted by individual extension names in the capabilities vector. For Linux platform, when libcrypto is initialized, the results -returned by the RISC-V Hardware Probing syscall (hwprobe) are stored +returned by the RISC\-V Hardware Probing syscall (hwprobe) are stored in the vector. Otherwise all capabilities are disabled. .PP To override the set of instructions available to an application, you can set the \fBOPENSSL_riscvcap\fR environment variable before you start the application. .PP -The environment variable is similar to the RISC-V ISA string defined in the -RISC-V Instruction Set Manual. It is case insensitive. Though due to the limit +The environment variable is similar to the RISC\-V ISA string defined in the +RISC\-V Instruction Set Manual. It is case insensitive. Though due to the limit of the environment variable parser inside libcrypto, an extension must be prefixed with an underscore to make it recognizable. This also applies to the Vector extension. @@ -101,27 +104,27 @@ Address Generation Could be detected using hwprobe for Linux kernel >= 6.5 .IP ZBB 4 .IX Item "ZBB" -Basic bit-manipulation +Basic bit\-manipulation .Sp Could be detected using hwprobe for Linux kernel >= 6.5 .IP ZBC 4 .IX Item "ZBC" -Carry-less multiplication +Carry\-less multiplication .Sp Could be detected using hwprobe for Linux kernel >= 6.8 .IP ZBS 4 .IX Item "ZBS" -Single-bit instructions +Single\-bit instructions .Sp Could be detected using hwprobe for Linux kernel >= 6.5 .IP ZBKB 4 .IX Item "ZBKB" -Bit-manipulation for Cryptography +Bit\-manipulation for Cryptography .Sp Could be detected using hwprobe for Linux kernel >= 6.8 .IP ZBKC 4 .IX Item "ZBKC" -Carry-less multiplication for Cryptography +Carry\-less multiplication for Cryptography .Sp Could be detected using hwprobe for Linux kernel >= 6.8 .IP ZBKX 4 @@ -169,7 +172,7 @@ Vector Extension for Application Processors Could be detected using hwprobe for Linux kernel >= 6.5 .IP ZVBB 4 .IX Item "ZVBB" -Vector Basic Bit-manipulation +Vector Basic Bit\-manipulation .Sp Could be detected using hwprobe for Linux kernel >= 6.8 .IP ZVBC 4 @@ -179,7 +182,7 @@ Vector Carryless Multiplication Could be detected using hwprobe for Linux kernel >= 6.8 .IP ZVKB 4 .IX Item "ZVKB" -Vector Cryptography Bit-manipulation +Vector Cryptography Bit\-manipulation .Sp Could be detected using hwprobe for Linux kernel >= 6.8 .IP ZVKG 4 @@ -221,19 +224,25 @@ Check currently detected capabilities .PP .Vb 2 \& $ openssl info \-cpusettings -\& OPENSSL_riscvcap=ZBA_ZBB_ZBC_ZBS_V +\& OPENSSL_riscvcap=RV64GC_ZBA_ZBB_ZBC_ZBS_V vlen:256 .Ve .PP +Note: The first word in the displayed capabilities is the RISC\-V base +architecture value, which is derived from the compiler configuration. +It is therefore not overridable by the environment variable. +When the V extension is given the riscv_vlen value is always displayed, +there is no way to override the riscv_vlen by the environment variable. +.PP Disables all instruction set extensions: .PP .Vb 1 -\& OPENSSL_riscvcap="rv64gc" +\& export OPENSSL_riscvcap="rv64gc" .Ve .PP Only enable the vector extension: .PP .Vb 1 -\& OPENSSL_riscvcap="rv64gc_v" +\& export OPENSSL_riscvcap="rv64gc_v" .Ve .SH COPYRIGHT .IX Header "COPYRIGHT" |