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path: root/sys/contrib/dev/mediatek/mt76/mt7603/mac.c
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Diffstat (limited to 'sys/contrib/dev/mediatek/mt76/mt7603/mac.c')
-rw-r--r--sys/contrib/dev/mediatek/mt76/mt7603/mac.c81
1 files changed, 37 insertions, 44 deletions
diff --git a/sys/contrib/dev/mediatek/mt76/mt7603/mac.c b/sys/contrib/dev/mediatek/mt76/mt7603/mac.c
index 99ae080502d8..6387f9e61060 100644
--- a/sys/contrib/dev/mediatek/mt76/mt7603/mac.c
+++ b/sys/contrib/dev/mediatek/mt76/mt7603/mac.c
@@ -487,10 +487,7 @@ mt7603_rx_get_wcid(struct mt7603_dev *dev, u8 idx, bool unicast)
struct mt7603_sta *sta;
struct mt76_wcid *wcid;
- if (idx >= MT7603_WTBL_SIZE)
- return NULL;
-
- wcid = rcu_dereference(dev->mt76.wcid[idx]);
+ wcid = mt76_wcid_ptr(dev, idx);
if (unicast || !wcid)
return wcid;
@@ -1266,23 +1263,15 @@ void mt7603_mac_add_txs(struct mt7603_dev *dev, void *data)
if (pid == MT_PACKET_ID_NO_ACK)
return;
- if (wcidx >= MT7603_WTBL_SIZE)
- return;
-
rcu_read_lock();
- wcid = rcu_dereference(dev->mt76.wcid[wcidx]);
+ wcid = mt76_wcid_ptr(dev, wcidx);
if (!wcid)
goto out;
msta = container_of(wcid, struct mt7603_sta, wcid);
sta = wcid_to_sta(wcid);
-
- if (list_empty(&msta->wcid.poll_list)) {
- spin_lock_bh(&dev->mt76.sta_poll_lock);
- list_add_tail(&msta->wcid.poll_list, &dev->mt76.sta_poll_list);
- spin_unlock_bh(&dev->mt76.sta_poll_lock);
- }
+ mt76_wcid_add_poll(&dev->mt76, &msta->wcid);
if (mt7603_mac_add_txs_skb(dev, msta, pid, txs_data))
goto out;
@@ -1393,6 +1382,7 @@ void mt7603_pse_client_reset(struct mt7603_dev *dev)
MT_CLIENT_RESET_TX_R_E_2_S);
/* Start PSE client TX abort */
+ mt76_set(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_FORCE_TX_EOF);
mt76_set(dev, addr, MT_CLIENT_RESET_TX_R_E_1);
mt76_poll_msec(dev, addr, MT_CLIENT_RESET_TX_R_E_1_S,
MT_CLIENT_RESET_TX_R_E_1_S, 500);
@@ -1441,15 +1431,6 @@ static void mt7603_mac_watchdog_reset(struct mt7603_dev *dev)
mt7603_beacon_set_timer(dev, -1, 0);
- if (dev->reset_cause[RESET_CAUSE_RESET_FAILED] ||
- dev->cur_reset_cause == RESET_CAUSE_RX_PSE_BUSY ||
- dev->cur_reset_cause == RESET_CAUSE_BEACON_STUCK ||
- dev->cur_reset_cause == RESET_CAUSE_TX_HANG)
- mt7603_pse_reset(dev);
-
- if (dev->reset_cause[RESET_CAUSE_RESET_FAILED])
- goto skip_dma_reset;
-
mt7603_mac_stop(dev);
mt76_clear(dev, MT_WPDMA_GLO_CFG,
@@ -1459,28 +1440,32 @@ static void mt7603_mac_watchdog_reset(struct mt7603_dev *dev)
mt7603_irq_disable(dev, mask);
- mt76_set(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_FORCE_TX_EOF);
-
mt7603_pse_client_reset(dev);
mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], true);
for (i = 0; i < __MT_TXQ_MAX; i++)
mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true);
+ mt7603_dma_sched_reset(dev);
+
+ mt76_tx_status_check(&dev->mt76, true);
+
mt76_for_each_q_rx(&dev->mt76, i) {
mt76_queue_rx_reset(dev, i);
}
- mt76_tx_status_check(&dev->mt76, true);
+ if (dev->reset_cause[RESET_CAUSE_RESET_FAILED] ||
+ dev->cur_reset_cause == RESET_CAUSE_RX_PSE_BUSY)
+ mt7603_pse_reset(dev);
- mt7603_dma_sched_reset(dev);
+ if (!dev->reset_cause[RESET_CAUSE_RESET_FAILED]) {
+ mt7603_mac_dma_start(dev);
- mt7603_mac_dma_start(dev);
+ mt7603_irq_enable(dev, mask);
- mt7603_irq_enable(dev, mask);
+ clear_bit(MT76_RESET, &dev->mphy.state);
+ }
-skip_dma_reset:
- clear_bit(MT76_RESET, &dev->mphy.state);
mutex_unlock(&dev->mt76.mutex);
mt76_worker_enable(&dev->mt76.tx_worker);
@@ -1488,14 +1473,13 @@ skip_dma_reset:
tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
mt7603_beacon_set_timer(dev, -1, beacon_int);
- local_bh_disable();
napi_enable(&dev->mt76.tx_napi);
- napi_schedule(&dev->mt76.tx_napi);
-
napi_enable(&dev->mt76.napi[0]);
- napi_schedule(&dev->mt76.napi[0]);
-
napi_enable(&dev->mt76.napi[1]);
+
+ local_bh_disable();
+ napi_schedule(&dev->mt76.tx_napi);
+ napi_schedule(&dev->mt76.napi[0]);
napi_schedule(&dev->mt76.napi[1]);
local_bh_enable();
@@ -1570,20 +1554,29 @@ static bool mt7603_rx_pse_busy(struct mt7603_dev *dev)
{
u32 addr, val;
- if (mt76_rr(dev, MT_MCU_DEBUG_RESET) & MT_MCU_DEBUG_RESET_QUEUES)
- return true;
-
if (mt7603_rx_fifo_busy(dev))
- return false;
+ goto out;
addr = mt7603_reg_map(dev, MT_CLIENT_BASE_PHYS_ADDR + MT_CLIENT_STATUS);
mt76_wr(dev, addr, 3);
val = mt76_rr(dev, addr) >> 16;
- if (is_mt7628(dev) && (val & 0x4001) == 0x4001)
- return true;
+ if (!(val & BIT(0)))
+ return false;
- return (val & 0x8001) == 0x8001 || (val & 0xe001) == 0xe001;
+ if (is_mt7628(dev))
+ val &= 0xa000;
+ else
+ val &= 0x8000;
+ if (!val)
+ return false;
+
+out:
+ if (mt76_rr(dev, MT_INT_SOURCE_CSR) &
+ (MT_INT_RX_DONE(0) | MT_INT_RX_DONE(1)))
+ return false;
+
+ return true;
}
static bool
@@ -1788,7 +1781,7 @@ mt7603_false_cca_check(struct mt7603_dev *dev)
mt7603_cca_stats_reset(dev);
- min_signal = mt76_get_min_avg_rssi(&dev->mt76, false);
+ min_signal = mt76_get_min_avg_rssi(&dev->mt76, 0);
if (!min_signal) {
dev->sensitivity = 0;
dev->last_cca_adj = jiffies;