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-rw-r--r--sys/contrib/device-tree/Bindings/mmc/arasan,sdhci.yaml17
1 files changed, 12 insertions, 5 deletions
diff --git a/sys/contrib/device-tree/Bindings/mmc/arasan,sdhci.yaml b/sys/contrib/device-tree/Bindings/mmc/arasan,sdhci.yaml
index 37a5fe7b26dc..a6c19a6cc99e 100644
--- a/sys/contrib/device-tree/Bindings/mmc/arasan,sdhci.yaml
+++ b/sys/contrib/device-tree/Bindings/mmc/arasan,sdhci.yaml
@@ -1,16 +1,16 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
-$id: "http://devicetree.org/schemas/mmc/arasan,sdhci.yaml#"
-$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+$id: http://devicetree.org/schemas/mmc/arasan,sdhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Device Tree Bindings for the Arasan SDHCI Controller
+title: Arasan SDHCI Controller
maintainers:
- Adrian Hunter <adrian.hunter@intel.com>
allOf:
- - $ref: "mmc-controller.yaml#"
+ - $ref: mmc-controller.yaml#
- if:
properties:
compatible:
@@ -27,6 +27,7 @@ allOf:
enum:
- xlnx,zynqmp-8.9a
- xlnx,versal-8.9a
+ - xlnx,versal-net-emmc
then:
properties:
clock-output-names:
@@ -62,6 +63,10 @@ properties:
description:
For this device it is strongly suggested to include
clock-output-names and '#clock-cells'.
+ - const: xlnx,versal-net-emmc # Versal Net eMMC PHY
+ description:
+ For this device it is strongly suggested to include
+ clock-output-names and '#clock-cells'.
- items:
- const: intel,lgm-sdhci-5.1-emmc # Intel LGM eMMC PHY
- const: arasan,sdhci-5.1
@@ -112,6 +117,9 @@ properties:
phy-names:
const: phy_arasan
+ resets:
+ maxItems: 1
+
arasan,soc-ctl-syscon:
$ref: /schemas/types.yaml#/definitions/phandle
description:
@@ -153,7 +161,6 @@ properties:
The MIO bank number in which the command and data lines are configured.
dependencies:
- clock-output-names: [ '#clock-cells' ]
'#clock-cells': [ clock-output-names ]
required: