diff options
Diffstat (limited to 'sys/contrib/device-tree/Bindings/usb')
52 files changed, 2083 insertions, 690 deletions
diff --git a/sys/contrib/device-tree/Bindings/usb/allwinner,sun4i-a10-musb.yaml b/sys/contrib/device-tree/Bindings/usb/allwinner,sun4i-a10-musb.yaml index f972ce976e86..7ffcd236d7bb 100644 --- a/sys/contrib/device-tree/Bindings/usb/allwinner,sun4i-a10-musb.yaml +++ b/sys/contrib/device-tree/Bindings/usb/allwinner,sun4i-a10-musb.yaml @@ -23,7 +23,9 @@ properties: - enum: - allwinner,sun8i-a83t-musb - allwinner,sun20i-d1-musb + - allwinner,sun50i-a100-musb - allwinner,sun50i-h6-musb + - allwinner,sun55i-a523-musb - const: allwinner,sun8i-a33-musb - items: - const: allwinner,sun50i-h616-musb diff --git a/sys/contrib/device-tree/Bindings/usb/aspeed,usb-vhub.yaml b/sys/contrib/device-tree/Bindings/usb/aspeed,usb-vhub.yaml index a86bcd95100e..7f22f9c031b2 100644 --- a/sys/contrib/device-tree/Bindings/usb/aspeed,usb-vhub.yaml +++ b/sys/contrib/device-tree/Bindings/usb/aspeed,usb-vhub.yaml @@ -113,27 +113,27 @@ examples: - | #include <dt-bindings/clock/aspeed-clock.h> vhub: usb-vhub@1e6a0000 { - compatible = "aspeed,ast2500-usb-vhub"; - reg = <0x1e6a0000 0x300>; - interrupts = <5>; - clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; - aspeed,vhub-downstream-ports = <5>; - aspeed,vhub-generic-endpoints = <15>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb2ad_default>; - - vhub-vendor-id = <0x1d6b>; - vhub-product-id = <0x0107>; - vhub-device-revision = <0x0100>; - vhub-strings { - #address-cells = <1>; - #size-cells = <0>; - - string@409 { - reg = <0x409>; - manufacturer = "ASPEED"; - product = "USB Virtual Hub"; - serial-number = "0000"; - }; + compatible = "aspeed,ast2500-usb-vhub"; + reg = <0x1e6a0000 0x300>; + interrupts = <5>; + clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; + aspeed,vhub-downstream-ports = <5>; + aspeed,vhub-generic-endpoints = <15>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb2ad_default>; + + vhub-vendor-id = <0x1d6b>; + vhub-product-id = <0x0107>; + vhub-device-revision = <0x0100>; + vhub-strings { + #address-cells = <1>; + #size-cells = <0>; + + string@409 { + reg = <0x409>; + manufacturer = "ASPEED"; + product = "USB Virtual Hub"; + serial-number = "0000"; }; + }; }; diff --git a/sys/contrib/device-tree/Bindings/usb/brcm,bdc.yaml b/sys/contrib/device-tree/Bindings/usb/brcm,bdc.yaml index 9e561fee98f1..f9375c69e86b 100644 --- a/sys/contrib/device-tree/Bindings/usb/brcm,bdc.yaml +++ b/sys/contrib/device-tree/Bindings/usb/brcm,bdc.yaml @@ -41,10 +41,10 @@ additionalProperties: false examples: - | - usb@f0b02000 { - compatible = "brcm,bdc-udc-v2"; - reg = <0xf0b02000 0xfc4>; - interrupts = <0x0 0x60 0x0>; - phys = <&usbphy_0 0x0>; - clocks = <&sw_usbd>; - }; + usb@f0b02000 { + compatible = "brcm,bdc-udc-v2"; + reg = <0xf0b02000 0xfc4>; + interrupts = <0x0 0x60 0x0>; + phys = <&usbphy_0 0x0>; + clocks = <&sw_usbd>; + }; diff --git a/sys/contrib/device-tree/Bindings/usb/chipidea,usb2-common.yaml b/sys/contrib/device-tree/Bindings/usb/chipidea,usb2-common.yaml index d2a7d2ecf48a..10020af15afc 100644 --- a/sys/contrib/device-tree/Bindings/usb/chipidea,usb2-common.yaml +++ b/sys/contrib/device-tree/Bindings/usb/chipidea,usb2-common.yaml @@ -42,6 +42,9 @@ properties: phy_type: true + iommus: + maxItems: 1 + itc-setting: description: interrupt threshold control register control, the setting should be diff --git a/sys/contrib/device-tree/Bindings/usb/chipidea,usb2-imx.yaml b/sys/contrib/device-tree/Bindings/usb/chipidea,usb2-imx.yaml index 8f6136f5d72e..51014955ab3c 100644 --- a/sys/contrib/device-tree/Bindings/usb/chipidea,usb2-imx.yaml +++ b/sys/contrib/device-tree/Bindings/usb/chipidea,usb2-imx.yaml @@ -41,6 +41,7 @@ properties: - fsl,imx8mm-usb - fsl,imx8mn-usb - fsl,imx93-usb + - fsl,imx95-usb - const: fsl,imx7d-usb - const: fsl,imx27-usb - items: @@ -54,7 +55,11 @@ properties: maxItems: 1 interrupts: - maxItems: 1 + minItems: 1 + items: + - description: USB controller interrupt or combine USB controller + and wakeup interrupts. + - description: Wakeup interrupt clocks: minItems: 1 @@ -191,6 +196,7 @@ allOf: contains: enum: - fsl,imx93-usb + - fsl,imx95-usb then: properties: clocks: @@ -238,6 +244,22 @@ allOf: maxItems: 1 clock-names: false + # imx95 soc use two interrupts + - if: + properties: + compatible: + contains: + enum: + - fsl,imx95-usb + then: + properties: + interrupts: + minItems: 2 + else: + properties: + interrupts: + maxItems: 1 + unevaluatedProperties: false examples: diff --git a/sys/contrib/device-tree/Bindings/usb/ci-hdrc-usb2.yaml b/sys/contrib/device-tree/Bindings/usb/ci-hdrc-usb2.yaml index cc5787a8cfa3..691d6cf02c27 100644 --- a/sys/contrib/device-tree/Bindings/usb/ci-hdrc-usb2.yaml +++ b/sys/contrib/device-tree/Bindings/usb/ci-hdrc-usb2.yaml @@ -23,6 +23,7 @@ properties: - nvidia,tegra30-udc - nvidia,tegra114-udc - nvidia,tegra124-udc + - nxp,s32g2-usb - qcom,ci-hdrc - items: - enum: @@ -37,6 +38,10 @@ properties: - enum: - nuvoton,npcm845-udc - const: nuvoton,npcm750-udc + - items: + - enum: + - nxp,s32g3-usb + - const: nxp,s32g2-usb clocks: minItems: 1 diff --git a/sys/contrib/device-tree/Bindings/usb/cypress,cypd4226.yaml b/sys/contrib/device-tree/Bindings/usb/cypress,cypd4226.yaml index 89fc9a434d05..0620d82508c1 100644 --- a/sys/contrib/device-tree/Bindings/usb/cypress,cypd4226.yaml +++ b/sys/contrib/device-tree/Bindings/usb/cypress,cypd4226.yaml @@ -61,18 +61,15 @@ additionalProperties: false examples: - | - #include <dt-bindings/gpio/tegra194-gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> i2c { #address-cells = <1>; #size-cells = <0>; - #interrupt-cells = <2>; typec@8 { compatible = "cypress,cypd4226"; reg = <0x08>; - interrupt-parent = <&gpio_aon>; - interrupts = <TEGRA194_AON_GPIO(BB, 2) IRQ_TYPE_LEVEL_LOW>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; firmware-name = "nvidia,jetson-agx-xavier"; #address-cells = <1>; #size-cells = <0>; diff --git a/sys/contrib/device-tree/Bindings/usb/cypress,hx3.yaml b/sys/contrib/device-tree/Bindings/usb/cypress,hx3.yaml index e44e88d993d0..d6eac1213228 100644 --- a/sys/contrib/device-tree/Bindings/usb/cypress,hx3.yaml +++ b/sys/contrib/device-tree/Bindings/usb/cypress,hx3.yaml @@ -14,9 +14,22 @@ allOf: properties: compatible: - enum: - - usb4b4,6504 - - usb4b4,6506 + oneOf: + - enum: + - usb4b4,6504 + - usb4b4,6506 + - items: + - enum: + - usb4b4,6500 + - usb4b4,6508 + - const: usb4b4,6504 + - items: + - enum: + - usb4b4,6502 + - usb4b4,6503 + - usb4b4,6507 + - usb4b4,650a + - const: usb4b4,6506 reg: true @@ -56,21 +69,21 @@ examples: /* 2.0 hub on port 1 */ hub_2_0: hub@1 { - compatible = "usb4b4,6504"; - reg = <1>; - peer-hub = <&hub_3_0>; - reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; - vdd-supply = <®_1v2_usb>; - vdd2-supply = <®_3v3_usb>; + compatible = "usb4b4,6504"; + reg = <1>; + peer-hub = <&hub_3_0>; + reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + vdd-supply = <®_1v2_usb>; + vdd2-supply = <®_3v3_usb>; }; /* 3.0 hub on port 2 */ hub_3_0: hub@2 { - compatible = "usb4b4,6506"; - reg = <2>; - peer-hub = <&hub_2_0>; - reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; - vdd-supply = <®_1v2_usb>; - vdd2-supply = <®_3v3_usb>; + compatible = "usb4b4,6506"; + reg = <2>; + peer-hub = <&hub_2_0>; + reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + vdd-supply = <®_1v2_usb>; + vdd2-supply = <®_3v3_usb>; }; }; diff --git a/sys/contrib/device-tree/Bindings/usb/dwc2.yaml b/sys/contrib/device-tree/Bindings/usb/dwc2.yaml index a5f2e3442a0e..6c3a10991b8b 100644 --- a/sys/contrib/device-tree/Bindings/usb/dwc2.yaml +++ b/sys/contrib/device-tree/Bindings/usb/dwc2.yaml @@ -59,7 +59,7 @@ properties: - const: amcc,dwc-otg - const: apm,apm82181-dwc-otg - const: snps,dwc2 - - const: sophgo,cv1800-usb + - const: sophgo,cv1800b-usb - const: st,stm32f4x9-fsotg - const: st,stm32f4x9-hsotg - const: st,stm32f7-hsotg @@ -192,7 +192,7 @@ unevaluatedProperties: false examples: - | - usb@101c0000 { + usb@101c0000 { compatible = "rockchip,rk3066-usb", "snps,dwc2"; reg = <0x10180000 0x40000>; interrupts = <18>; @@ -200,6 +200,6 @@ examples: clock-names = "otg"; phys = <&usbphy>; phy-names = "usb2-phy"; - }; + }; ... diff --git a/sys/contrib/device-tree/Bindings/usb/dwc3-xilinx.yaml b/sys/contrib/device-tree/Bindings/usb/dwc3-xilinx.yaml index 00f87a558c7d..36f5c644d959 100644 --- a/sys/contrib/device-tree/Bindings/usb/dwc3-xilinx.yaml +++ b/sys/contrib/device-tree/Bindings/usb/dwc3-xilinx.yaml @@ -7,7 +7,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Xilinx SuperSpeed DWC3 USB SoC controller maintainers: - - Mubin Sayyed <mubin.sayyed@amd.com> - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> properties: @@ -27,6 +26,8 @@ properties: ranges: true + dma-coherent: true + power-domains: description: specifies a phandle to PM domain provider node maxItems: 1 @@ -101,7 +102,6 @@ examples: #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h> #include <dt-bindings/power/xlnx-zynqmp-power.h> #include <dt-bindings/reset/xlnx-zynqmp-resets.h> - #include <dt-bindings/clock/xlnx-zynqmp-clk.h> #include <dt-bindings/reset/xlnx-zynqmp-resets.h> #include <dt-bindings/phy/phy.h> axi { @@ -113,7 +113,7 @@ examples: #size-cells = <0x2>; compatible = "xlnx,zynqmp-dwc3"; reg = <0x0 0xff9d0000 0x0 0x100>; - clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; + clocks = <&zynqmp_clk 32>, <&zynqmp_clk 34>; clock-names = "bus_clk", "ref_clk"; power-domains = <&zynqmp_firmware PD_USB_0>; resets = <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>, diff --git a/sys/contrib/device-tree/Bindings/usb/fcs,fsa4480.yaml b/sys/contrib/device-tree/Bindings/usb/fcs,fsa4480.yaml index 8b25b9a01ced..e3a7df91f7f1 100644 --- a/sys/contrib/device-tree/Bindings/usb/fcs,fsa4480.yaml +++ b/sys/contrib/device-tree/Bindings/usb/fcs,fsa4480.yaml @@ -87,21 +87,21 @@ examples: #size-cells = <0>; typec-mux@42 { - compatible = "fcs,fsa4480"; - reg = <0x42>; + compatible = "fcs,fsa4480"; + reg = <0x42>; - interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; + interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; - vcc-supply = <&vreg_bob>; + vcc-supply = <&vreg_bob>; - mode-switch; - orientation-switch; + mode-switch; + orientation-switch; - port { - fsa4480_ept: endpoint { - remote-endpoint = <&typec_controller>; + port { + fsa4480_ept: endpoint { + remote-endpoint = <&typec_controller>; + }; }; - }; }; }; ... diff --git a/sys/contrib/device-tree/Bindings/usb/fsl,imx8mp-dwc3.yaml b/sys/contrib/device-tree/Bindings/usb/fsl,imx8mp-dwc3.yaml index 9ea1e4cd0709..baf130669c38 100644 --- a/sys/contrib/device-tree/Bindings/usb/fsl,imx8mp-dwc3.yaml +++ b/sys/contrib/device-tree/Bindings/usb/fsl,imx8mp-dwc3.yaml @@ -12,7 +12,11 @@ maintainers: properties: compatible: - const: fsl,imx8mp-dwc3 + oneOf: + - items: + - const: fsl,imx95-dwc3 + - const: fsl,imx8mp-dwc3 + - const: fsl,imx8mp-dwc3 reg: items: diff --git a/sys/contrib/device-tree/Bindings/usb/fsl,usbmisc.yaml b/sys/contrib/device-tree/Bindings/usb/fsl,usbmisc.yaml index 0a6e7ac1b37e..ca677d1a8274 100644 --- a/sys/contrib/device-tree/Bindings/usb/fsl,usbmisc.yaml +++ b/sys/contrib/device-tree/Bindings/usb/fsl,usbmisc.yaml @@ -21,6 +21,8 @@ properties: - fsl,imx53-usbmisc - fsl,imx6q-usbmisc - fsl,vf610-usbmisc + - nxp,s32g2-usbmisc + - nxp,s32g3-usbmisc - items: - enum: - fsl,imx6ul-usbmisc @@ -34,6 +36,7 @@ properties: - fsl,imx8mm-usbmisc - fsl,imx8mn-usbmisc - fsl,imx8ulp-usbmisc + - fsl,imx95-usbmisc - const: fsl,imx7d-usbmisc - const: fsl,imx6q-usbmisc - items: @@ -45,7 +48,10 @@ properties: maxItems: 1 reg: - maxItems: 1 + minItems: 1 + items: + - description: Base and length of the Wrapper module register + - description: Base and length of the HSIO Block Control register '#index-cells': const: 1 @@ -56,6 +62,23 @@ required: - compatible - reg +allOf: + # imx95 soc needs use HSIO Block Control + - if: + properties: + compatible: + contains: + enum: + - fsl,imx95-usbmisc + then: + properties: + reg: + minItems: 2 + else: + properties: + reg: + maxItems: 1 + additionalProperties: false examples: diff --git a/sys/contrib/device-tree/Bindings/usb/generic-ehci.yaml b/sys/contrib/device-tree/Bindings/usb/generic-ehci.yaml index 2ed178f16a78..508d958e698c 100644 --- a/sys/contrib/device-tree/Bindings/usb/generic-ehci.yaml +++ b/sys/contrib/device-tree/Bindings/usb/generic-ehci.yaml @@ -28,9 +28,11 @@ properties: - items: - enum: - allwinner,sun4i-a10-ehci + - allwinner,sun50i-a100-ehci - allwinner,sun50i-a64-ehci - allwinner,sun50i-h6-ehci - allwinner,sun50i-h616-ehci + - allwinner,sun55i-a523-ehci - allwinner,sun5i-a13-ehci - allwinner,sun6i-a31-ehci - allwinner,sun7i-a20-ehci @@ -84,6 +86,7 @@ properties: - nuvoton,npcm845-ehci - ti,ehci-omap - usb-ehci + - via,vt8500-ehci reg: minItems: 1 diff --git a/sys/contrib/device-tree/Bindings/usb/generic-ohci.yaml b/sys/contrib/device-tree/Bindings/usb/generic-ohci.yaml index b9576015736b..3ee1586fc8b9 100644 --- a/sys/contrib/device-tree/Bindings/usb/generic-ohci.yaml +++ b/sys/contrib/device-tree/Bindings/usb/generic-ohci.yaml @@ -15,9 +15,11 @@ properties: - items: - enum: - allwinner,sun4i-a10-ohci + - allwinner,sun50i-a100-ohci - allwinner,sun50i-a64-ohci - allwinner,sun50i-h6-ohci - allwinner,sun50i-h616-ohci + - allwinner,sun55i-a523-ohci - allwinner,sun5i-a13-ohci - allwinner,sun6i-a31-ohci - allwinner,sun7i-a20-ohci diff --git a/sys/contrib/device-tree/Bindings/usb/generic-xhci.yaml b/sys/contrib/device-tree/Bindings/usb/generic-xhci.yaml index 6ceafa4af292..a2b94a138999 100644 --- a/sys/contrib/device-tree/Bindings/usb/generic-xhci.yaml +++ b/sys/contrib/device-tree/Bindings/usb/generic-xhci.yaml @@ -51,6 +51,8 @@ properties: - const: core - const: reg + dma-coherent: true + power-domains: maxItems: 1 diff --git a/sys/contrib/device-tree/Bindings/usb/genesys,gl850g.yaml b/sys/contrib/device-tree/Bindings/usb/genesys,gl850g.yaml index fc833363cfb4..9a94b2a74a1e 100644 --- a/sys/contrib/device-tree/Bindings/usb/genesys,gl850g.yaml +++ b/sys/contrib/device-tree/Bindings/usb/genesys,gl850g.yaml @@ -26,19 +26,26 @@ properties: description: The regulator that provides 3.3V or 5.0V core power to the hub. - peer-hub: - $ref: /schemas/types.yaml#/definitions/phandle - description: - For onboard hub controllers that support USB 3.x and USB 2.0 hubs - with shared resets and power supplies, this property is used to identify - the hubs with which these are shared. + peer-hub: true + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + patternProperties: + '^port@': + $ref: /schemas/graph.yaml#/properties/port + + properties: + reg: + minimum: 1 + maximum: 4 required: - compatible - reg allOf: - - $ref: usb-device.yaml# + - $ref: usb-hub.yaml# - if: properties: compatible: @@ -62,7 +69,7 @@ allOf: peer-hub: true vdd-supply: true -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/sys/contrib/device-tree/Bindings/usb/gpio-sbu-mux.yaml b/sys/contrib/device-tree/Bindings/usb/gpio-sbu-mux.yaml index 8a5f837eff94..e588514fab2d 100644 --- a/sys/contrib/device-tree/Bindings/usb/gpio-sbu-mux.yaml +++ b/sys/contrib/device-tree/Bindings/usb/gpio-sbu-mux.yaml @@ -20,6 +20,7 @@ properties: items: - enum: - nxp,cbdtu02043 + - onnn,fsusb42 - onnn,fsusb43l10x - pericom,pi3usb102 - ti,tmuxhs4212 diff --git a/sys/contrib/device-tree/Bindings/usb/intel,keembay-dwc3.yaml b/sys/contrib/device-tree/Bindings/usb/intel,keembay-dwc3.yaml index d3511f48cd55..1a75544a8c31 100644 --- a/sys/contrib/device-tree/Bindings/usb/intel,keembay-dwc3.yaml +++ b/sys/contrib/device-tree/Bindings/usb/intel,keembay-dwc3.yaml @@ -58,20 +58,20 @@ examples: #define KEEM_BAY_A53_AUX_USB_SUSPEND usb { - compatible = "intel,keembay-dwc3"; - clocks = <&scmi_clk KEEM_BAY_A53_AUX_USB>, - <&scmi_clk KEEM_BAY_A53_AUX_USB_REF>, - <&scmi_clk KEEM_BAY_A53_AUX_USB_ALT_REF>, - <&scmi_clk KEEM_BAY_A53_AUX_USB_SUSPEND>; - clock-names = "async_master", "ref", "alt_ref", "suspend"; - ranges; - #address-cells = <1>; - #size-cells = <1>; - - usb@34000000 { - compatible = "snps,dwc3"; - reg = <0x34000000 0x10000>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; - dr_mode = "peripheral"; - }; + compatible = "intel,keembay-dwc3"; + clocks = <&scmi_clk KEEM_BAY_A53_AUX_USB>, + <&scmi_clk KEEM_BAY_A53_AUX_USB_REF>, + <&scmi_clk KEEM_BAY_A53_AUX_USB_ALT_REF>, + <&scmi_clk KEEM_BAY_A53_AUX_USB_SUSPEND>; + clock-names = "async_master", "ref", "alt_ref", "suspend"; + ranges; + #address-cells = <1>; + #size-cells = <1>; + + usb@34000000 { + compatible = "snps,dwc3"; + reg = <0x34000000 0x10000>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + dr_mode = "peripheral"; + }; }; diff --git a/sys/contrib/device-tree/Bindings/usb/ite,it5205.yaml b/sys/contrib/device-tree/Bindings/usb/ite,it5205.yaml index 36ec4251b5f2..889710733de5 100644 --- a/sys/contrib/device-tree/Bindings/usb/ite,it5205.yaml +++ b/sys/contrib/device-tree/Bindings/usb/ite,it5205.yaml @@ -54,19 +54,19 @@ examples: #size-cells = <0>; typec-mux@48 { - compatible = "ite,it5205"; - reg = <0x48>; + compatible = "ite,it5205"; + reg = <0x48>; - mode-switch; - orientation-switch; + mode-switch; + orientation-switch; - vcc-supply = <&mt6359_vibr_ldo_reg>; + vcc-supply = <&mt6359_vibr_ldo_reg>; - port { - it5205_usbss_sbu: endpoint { - remote-endpoint = <&typec_controller>; + port { + it5205_usbss_sbu: endpoint { + remote-endpoint = <&typec_controller>; + }; }; - }; }; }; ... diff --git a/sys/contrib/device-tree/Bindings/usb/maxim,max33359.yaml b/sys/contrib/device-tree/Bindings/usb/maxim,max33359.yaml index 276bf7554215..3de4dc40b791 100644 --- a/sys/contrib/device-tree/Bindings/usb/maxim,max33359.yaml +++ b/sys/contrib/device-tree/Bindings/usb/maxim,max33359.yaml @@ -13,8 +13,12 @@ description: Maxim TCPCI Type-C PD controller properties: compatible: - enum: - - maxim,max33359 + oneOf: + - enum: + - maxim,max33359 + - items: + - const: maxim,max77759-tcpci + - const: maxim,max33359 reg: maxItems: 1 @@ -69,6 +73,8 @@ examples: PDO_FIXED_DATA_SWAP | PDO_FIXED_DUAL_ROLE) PDO_FIXED(9000, 2000, 0)>; + sink-bc12-completion-time-ms = <500>; + pd-revision = /bits/ 8 <0x03 0x01 0x01 0x08>; }; }; }; diff --git a/sys/contrib/device-tree/Bindings/usb/maxim,max3420-udc.yaml b/sys/contrib/device-tree/Bindings/usb/maxim,max3420-udc.yaml index 8e0f4ecc010d..6edb1fc5044e 100644 --- a/sys/contrib/device-tree/Bindings/usb/maxim,max3420-udc.yaml +++ b/sys/contrib/device-tree/Bindings/usb/maxim,max3420-udc.yaml @@ -50,18 +50,18 @@ additionalProperties: false examples: - | - #include <dt-bindings/gpio/gpio.h> - #include <dt-bindings/interrupt-controller/irq.h> - spi { - #address-cells = <1>; - #size-cells = <0>; + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; - udc@0 { - compatible = "maxim,max3420-udc"; - reg = <0>; - interrupt-parent = <&gpio>; - interrupts = <0 IRQ_TYPE_EDGE_FALLING>, <10 IRQ_TYPE_EDGE_BOTH>; - interrupt-names = "udc", "vbus"; - spi-max-frequency = <12500000>; - }; - }; + udc@0 { + compatible = "maxim,max3420-udc"; + reg = <0>; + interrupt-parent = <&gpio>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>, <10 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "udc", "vbus"; + spi-max-frequency = <12500000>; + }; + }; diff --git a/sys/contrib/device-tree/Bindings/usb/mediatek,mtk-xhci.yaml b/sys/contrib/device-tree/Bindings/usb/mediatek,mtk-xhci.yaml index ef3143f4b794..004d3ebec091 100644 --- a/sys/contrib/device-tree/Bindings/usb/mediatek,mtk-xhci.yaml +++ b/sys/contrib/device-tree/Bindings/usb/mediatek,mtk-xhci.yaml @@ -106,6 +106,10 @@ properties: - description: USB3/SS(P) PHY - description: USB2/HS PHY + port: + $ref: /schemas/graph.yaml#/properties/port + description: Super Speed (SS) Output endpoint to a Type-C connector + vusb33-supply: description: Regulator of USB AVDD3.3v diff --git a/sys/contrib/device-tree/Bindings/usb/mediatek,mtu3.yaml b/sys/contrib/device-tree/Bindings/usb/mediatek,mtu3.yaml index d4e187c78a0b..21fc6bbe954f 100644 --- a/sys/contrib/device-tree/Bindings/usb/mediatek,mtu3.yaml +++ b/sys/contrib/device-tree/Bindings/usb/mediatek,mtu3.yaml @@ -155,6 +155,18 @@ properties: property is used. See graph.txt $ref: /schemas/graph.yaml#/properties/port + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: High Speed (HS) data bus. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Super Speed (SS) data bus. + enable-manual-drd: $ref: /schemas/types.yaml#/definitions/flag description: diff --git a/sys/contrib/device-tree/Bindings/usb/microchip,mpfs-musb.yaml b/sys/contrib/device-tree/Bindings/usb/microchip,mpfs-musb.yaml index 27b909de4992..a812317d8089 100644 --- a/sys/contrib/device-tree/Bindings/usb/microchip,mpfs-musb.yaml +++ b/sys/contrib/device-tree/Bindings/usb/microchip,mpfs-musb.yaml @@ -14,8 +14,11 @@ maintainers: properties: compatible: - enum: - - microchip,mpfs-musb + oneOf: + - items: + - const: microchip,pic64gx-musb + - const: microchip,mpfs-musb + - const: microchip,mpfs-musb dr_mode: true diff --git a/sys/contrib/device-tree/Bindings/usb/microchip,usb2514.yaml b/sys/contrib/device-tree/Bindings/usb/microchip,usb2514.yaml index b14e6f37b298..4e3901efed3f 100644 --- a/sys/contrib/device-tree/Bindings/usb/microchip,usb2514.yaml +++ b/sys/contrib/device-tree/Bindings/usb/microchip,usb2514.yaml @@ -9,16 +9,19 @@ title: Microchip USB2514 Hub Controller maintainers: - Fabio Estevam <festevam@gmail.com> -allOf: - - $ref: usb-device.yaml# - properties: compatible: - enum: - - usb424,2412 - - usb424,2417 - - usb424,2514 - - usb424,2517 + oneOf: + - enum: + - usb424,2412 + - usb424,2417 + - usb424,2514 + - usb424,2517 + - items: + - enum: + - usb424,2512 + - usb424,2513 + - const: usb424,2514 reg: true @@ -28,6 +31,9 @@ properties: vdd-supply: description: 3.3V power supply. + vdda-supply: + description: 3.3V analog power supply. + clocks: description: External 24MHz clock connected to the CLKIN pin. maxItems: 1 @@ -43,6 +49,18 @@ patternProperties: $ref: /schemas/usb/usb-device.yaml additionalProperties: true +allOf: + - $ref: usb-device.yaml# + - if: + not: + properties: + compatible: + contains: + const: usb424,2514 + then: + properties: + vdda-supply: false + unevaluatedProperties: false examples: @@ -60,6 +78,7 @@ examples: clocks = <&clks IMX6QDL_CLK_CKO>; reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; vdd-supply = <®_3v3_hub>; + vdda-supply = <®_3v3a_hub>; #address-cells = <1>; #size-cells = <0>; diff --git a/sys/contrib/device-tree/Bindings/usb/microchip,usb5744.yaml b/sys/contrib/device-tree/Bindings/usb/microchip,usb5744.yaml index e2a72deae776..c68c04da3399 100644 --- a/sys/contrib/device-tree/Bindings/usb/microchip,usb5744.yaml +++ b/sys/contrib/device-tree/Bindings/usb/microchip,usb5744.yaml @@ -17,7 +17,6 @@ description: maintainers: - Michal Simek <michal.simek@amd.com> - - Mubin Sayyed <mubin.sayyed@amd.com> - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> properties: diff --git a/sys/contrib/device-tree/Bindings/usb/nvidia,tegra210-xusb.yaml b/sys/contrib/device-tree/Bindings/usb/nvidia,tegra210-xusb.yaml index 90296613b3a5..c0e313c70bba 100644 --- a/sys/contrib/device-tree/Bindings/usb/nvidia,tegra210-xusb.yaml +++ b/sys/contrib/device-tree/Bindings/usb/nvidia,tegra210-xusb.yaml @@ -189,7 +189,7 @@ examples: #size-cells = <0>; ethernet@1 { - compatible = "usb955,9ff"; - reg = <1>; + compatible = "usb955,9ff"; + reg = <1>; }; }; diff --git a/sys/contrib/device-tree/Bindings/usb/nxp,lpc3220-udc.yaml b/sys/contrib/device-tree/Bindings/usb/nxp,lpc3220-udc.yaml new file mode 100644 index 000000000000..be0457a06861 --- /dev/null +++ b/sys/contrib/device-tree/Bindings/usb/nxp,lpc3220-udc.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/nxp,lpc3220-udc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP LPC32xx SoC USB Device Controller (UDC) + +maintainers: + - Frank Li <Frank.Li@nxp.com> + +properties: + compatible: + const: nxp,lpc3220-udc + + reg: + maxItems: 1 + + interrupts: + items: + - description: USB Device Low Priority Interrupt + - description: USB Device High Priority Interrupt + - description: USB Device DMA Interrupt + - description: External USB Transceiver Interrupt (OTG ATX) + + clocks: + maxItems: 1 + + transceiver: + description: + phandle of the associated ISP1301 device - this is necessary for + the UDC controller for connecting to the USB physical layer + +required: + - compatible + - reg + - interrupts + - transceiver + +additionalProperties: false + +examples: + - | + usbd@31020000 { + compatible = "nxp,lpc3220-udc"; + reg = <0x31020000 0x300>; + interrupt-parent = <&mic>; + interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>; + transceiver = <&isp1301>; + }; diff --git a/sys/contrib/device-tree/Bindings/usb/parade,ps5511.yaml b/sys/contrib/device-tree/Bindings/usb/parade,ps5511.yaml new file mode 100644 index 000000000000..10d002f09db8 --- /dev/null +++ b/sys/contrib/device-tree/Bindings/usb/parade,ps5511.yaml @@ -0,0 +1,108 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/parade,ps5511.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Parade PS5511 4+1 Port USB 3.2 Gen 1 Hub Controller + +maintainers: + - Pin-yen Lin <treapking@chromium.org> + +properties: + compatible: + enum: + - usb1da0,5511 + - usb1da0,55a1 + + reset-gpios: + items: + - description: GPIO specifier for RESETB pin. + + vddd11-supply: + description: + 1V1 power supply to the hub + + vdd33-supply: + description: + 3V3 power supply to the hub + + peer-hub: true + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + patternProperties: + '^port@': + $ref: /schemas/graph.yaml#/properties/port + + properties: + reg: + minimum: 1 + maximum: 5 + +additionalProperties: + properties: + reg: + minimum: 1 + maximum: 5 + +required: + - peer-hub + +allOf: + - $ref: usb-hub.yaml# + - if: + not: + properties: + compatible: + enum: + - usb1da0,55a1 + then: + properties: + ports: + properties: + port@5: false + + patternProperties: + '^.*@5$': false + +examples: + - | + usb { + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb1da0,55a1"; + reg = <1>; + peer-hub = <&hub_3_0>; + #address-cells = <1>; + #size-cells = <0>; + /* USB 2.0 device on port 5 */ + device@5 { + reg = <5>; + compatible = "usb123,4567"; + }; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb1da0,5511"; + reg = <2>; + peer-hub = <&hub_2_0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + /* Type-A connector on port 3 */ + port@3 { + reg = <3>; + endpoint { + remote-endpoint = <&usb_a0_ss>; + }; + }; + }; + }; + }; diff --git a/sys/contrib/device-tree/Bindings/usb/parade,ps8830.yaml b/sys/contrib/device-tree/Bindings/usb/parade,ps8830.yaml new file mode 100644 index 000000000000..aeb33667818e --- /dev/null +++ b/sys/contrib/device-tree/Bindings/usb/parade,ps8830.yaml @@ -0,0 +1,143 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/parade,ps8830.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Parade PS883x USB and DisplayPort Retimer + +maintainers: + - Abel Vesa <abel.vesa@linaro.org> + +properties: + compatible: + oneOf: + - items: + - const: parade,ps8833 + - const: parade,ps8830 + - const: parade,ps8830 + + reg: + maxItems: 1 + + clocks: + items: + - description: XO Clock + + reset-gpios: + maxItems: 1 + + vdd-supply: + description: power supply (1.07V) + + vdd33-supply: + description: power supply (3.3V) + + vdd33-cap-supply: + description: power supply (3.3V) + + vddar-supply: + description: power supply (1.07V) + + vddat-supply: + description: power supply (1.07V) + + vddio-supply: + description: power supply (1.2V or 1.8V) + + orientation-switch: true + retimer-switch: true + + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Super Speed (SS) Output endpoint to the Type-C connector + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + description: Super Speed (SS) Input endpoint from the Super-Speed PHY + unevaluatedProperties: false + + port@2: + $ref: /schemas/graph.yaml#/properties/port + description: + Sideband Use (SBU) AUX lines endpoint to the Type-C connector for the purpose of + handling altmode muxing and orientation switching. + +required: + - compatible + - reg + - clocks + - reset-gpios + - vdd-supply + - vdd33-supply + - vdd33-cap-supply + - vddat-supply + - vddio-supply + - orientation-switch + - retimer-switch + +allOf: + - $ref: usb-switch.yaml# + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + typec-mux@8 { + compatible = "parade,ps8830"; + reg = <0x8>; + + clocks = <&clk_rtmr_xo>; + + vdd-supply = <&vreg_rtmr_1p15>; + vdd33-supply = <&vreg_rtmr_3p3>; + vdd33-cap-supply = <&vreg_rtmr_3p3>; + vddar-supply = <&vreg_rtmr_1p15>; + vddat-supply = <&vreg_rtmr_1p15>; + vddio-supply = <&vreg_rtmr_1p8>; + + reset-gpios = <&tlmm 10 GPIO_ACTIVE_LOW>; + + retimer-switch; + orientation-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + endpoint { + remote-endpoint = <&typec_con_ss>; + }; + }; + + port@1 { + reg = <1>; + + endpoint { + remote-endpoint = <&usb_phy_ss>; + }; + }; + + port@2 { + reg = <2>; + + endpoint { + remote-endpoint = <&typec_dp_aux>; + }; + }; + }; + }; + }; +... diff --git a/sys/contrib/device-tree/Bindings/usb/qcom,dwc3.yaml b/sys/contrib/device-tree/Bindings/usb/qcom,dwc3.yaml index 18758efb8d29..a792434c59db 100644 --- a/sys/contrib/device-tree/Bindings/usb/qcom,dwc3.yaml +++ b/sys/contrib/device-tree/Bindings/usb/qcom,dwc3.yaml @@ -4,11 +4,22 @@ $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm SuperSpeed DWC3 USB SoC controller +title: Legacy Qualcomm SuperSpeed DWC3 USB SoC controller maintainers: - Wesley Cheng <quic_wcheng@quicinc.com> +# Use the combined qcom,snps-dwc3 instead +deprecated: true + +select: + properties: + compatible: + contains: + const: qcom,dwc3 + required: + - compatible + properties: compatible: items: @@ -16,6 +27,7 @@ properties: - qcom,ipq4019-dwc3 - qcom,ipq5018-dwc3 - qcom,ipq5332-dwc3 + - qcom,ipq5424-dwc3 - qcom,ipq6018-dwc3 - qcom,ipq8064-dwc3 - qcom,ipq8074-dwc3 @@ -26,8 +38,11 @@ properties: - qcom,msm8998-dwc3 - qcom,qcm2290-dwc3 - qcom,qcs404-dwc3 + - qcom,qcs615-dwc3 + - qcom,qcs8300-dwc3 - qcom,qdu1000-dwc3 - qcom,sa8775p-dwc3 + - qcom,sar2130p-dwc3 - qcom,sc7180-dwc3 - qcom,sc7280-dwc3 - qcom,sc8180x-dwc3 @@ -51,6 +66,7 @@ properties: - qcom,sm8450-dwc3 - qcom,sm8550-dwc3 - qcom,sm8650-dwc3 + - qcom,sm8750-dwc3 - qcom,x1e80100-dwc3 - qcom,x1e80100-dwc3-mp - const: qcom,dwc3 @@ -201,6 +217,7 @@ allOf: - qcom,msm8953-dwc3 - qcom,msm8996-dwc3 - qcom,msm8998-dwc3 + - qcom,qcs8300-dwc3 - qcom,sa8775p-dwc3 - qcom,sc7180-dwc3 - qcom,sc7280-dwc3 @@ -338,6 +355,8 @@ allOf: contains: enum: - qcom,qcm2290-dwc3 + - qcom,qcs615-dwc3 + - qcom,sar2130p-dwc3 - qcom,sc8180x-dwc3 - qcom,sc8180x-dwc3-mp - qcom,sm6115-dwc3 @@ -347,6 +366,7 @@ allOf: - qcom,sm8450-dwc3 - qcom,sm8550-dwc3 - qcom,sm8650-dwc3 + - qcom,sm8750-dwc3 then: properties: clocks: @@ -397,6 +417,7 @@ allOf: minItems: 2 maxItems: 3 interrupt-names: + minItems: 2 items: - const: pwr_event - const: qusb2_phy @@ -418,6 +439,7 @@ allOf: minItems: 3 maxItems: 4 interrupt-names: + minItems: 3 items: - const: pwr_event - const: qusb2_phy @@ -449,8 +471,10 @@ allOf: then: properties: interrupts: + minItems: 3 maxItems: 4 interrupt-names: + minItems: 3 items: - const: pwr_event - const: dp_hs_phy_irq @@ -465,6 +489,8 @@ allOf: - qcom,ipq4019-dwc3 - qcom,ipq8064-dwc3 - qcom,msm8994-dwc3 + - qcom,qcs615-dwc3 + - qcom,qcs8300-dwc3 - qcom,qdu1000-dwc3 - qcom,sa8775p-dwc3 - qcom,sc7180-dwc3 @@ -484,12 +510,14 @@ allOf: - qcom,sm8450-dwc3 - qcom,sm8550-dwc3 - qcom,sm8650-dwc3 + - qcom,sm8750-dwc3 then: properties: interrupts: minItems: 4 maxItems: 5 interrupt-names: + minItems: 4 items: - const: pwr_event - const: hs_phy_irq diff --git a/sys/contrib/device-tree/Bindings/usb/qcom,snps-dwc3.yaml b/sys/contrib/device-tree/Bindings/usb/qcom,snps-dwc3.yaml new file mode 100644 index 000000000000..dfd084ed9024 --- /dev/null +++ b/sys/contrib/device-tree/Bindings/usb/qcom,snps-dwc3.yaml @@ -0,0 +1,625 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/qcom,snps-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SuperSpeed DWC3 USB SoC controller + +maintainers: + - Wesley Cheng <quic_wcheng@quicinc.com> + +description: + Describes the Qualcomm USB block, based on Synopsys DWC3. + +select: + properties: + compatible: + contains: + const: qcom,snps-dwc3 + required: + - compatible + +properties: + compatible: + items: + - enum: + - qcom,ipq4019-dwc3 + - qcom,ipq5018-dwc3 + - qcom,ipq5332-dwc3 + - qcom,ipq5424-dwc3 + - qcom,ipq6018-dwc3 + - qcom,ipq8064-dwc3 + - qcom,ipq8074-dwc3 + - qcom,ipq9574-dwc3 + - qcom,milos-dwc3 + - qcom,msm8953-dwc3 + - qcom,msm8994-dwc3 + - qcom,msm8996-dwc3 + - qcom,msm8998-dwc3 + - qcom,qcm2290-dwc3 + - qcom,qcs404-dwc3 + - qcom,qcs615-dwc3 + - qcom,qcs8300-dwc3 + - qcom,qdu1000-dwc3 + - qcom,sa8775p-dwc3 + - qcom,sar2130p-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sc8180x-dwc3 + - qcom,sc8180x-dwc3-mp + - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp + - qcom,sdm660-dwc3 + - qcom,sdm670-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 + - qcom,sm4250-dwc3 + - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 + - qcom,sm6350-dwc3 + - qcom,sm6375-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8350-dwc3 + - qcom,sm8450-dwc3 + - qcom,sm8550-dwc3 + - qcom,sm8650-dwc3 + - qcom,x1e80100-dwc3 + - const: qcom,snps-dwc3 + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + required-opps: + maxItems: 1 + + clocks: + description: | + Several clocks are used, depending on the variant. Typical ones are:: + - cfg_noc:: System Config NOC clock. + - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >= + 60MHz for HS operation. + - iface:: System bus AXI clock. + - sleep:: Sleep clock, used for wakeup when USB3 core goes into low + power mode (U3). + - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host + mode. Its frequency should be 19.2MHz. + minItems: 1 + maxItems: 9 + + clock-names: + minItems: 1 + maxItems: 9 + + dma-coherent: true + + iommus: + maxItems: 1 + + resets: + maxItems: 1 + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: usb-ddr + - const: apps-usb + + interrupts: + description: | + Different types of interrupts are used based on HS PHY used on target: + - dwc_usb3: Core DWC3 interrupt + - pwr_event: Used for wakeup based on other power events. + - hs_phy_irq: Apart from DP/DM/QUSB2 PHY interrupts, there is + hs_phy_irq which is not triggered by default and its + functionality is mutually exclusive to that of + {dp/dm}_hs_phy_irq and qusb2_phy_irq. + - qusb2_phy: SoCs with QUSB2 PHY do not have separate DP/DM IRQs and + expose only a single IRQ whose behavior can be modified + by the QUSB2PHY_INTR_CTRL register. The required DPSE/ + DMSE configuration is done in QUSB2PHY_INTR_CTRL register + of PHY address space. + - {dp/dm}_hs_phy_irq: These IRQ's directly reflect changes on the DP/ + DM pads of the SoC. These are used for wakeup + only on SoCs with non-QUSB2 targets with + exception of SDM670/SDM845/SM6350. + - ss_phy_irq: Used for remote wakeup in Super Speed mode of operation. + minItems: 3 + maxItems: 19 + + interrupt-names: + minItems: 3 + maxItems: 19 + + qcom,select-utmi-as-pipe-clk: + description: + If present, disable USB3 pipe_clk requirement. + Used when dwc3 operates without SSPHY and only + HS/FS/LS modes are supported. + type: boolean + + wakeup-source: true + +# Required child node: + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + +allOf: + - $ref: snps,dwc3-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq4019-dwc3 + - qcom,ipq5332-dwc3 + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8064-dwc3 + then: + properties: + clocks: + items: + - description: Master/Core clock, has to be >= 125 MHz + for SS operation and >= 60MHz for HS operation. + clock-names: + items: + - const: core + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq9574-dwc3 + - qcom,msm8953-dwc3 + - qcom,msm8996-dwc3 + - qcom,msm8998-dwc3 + - qcom,qcs8300-dwc3 + - qcom,sa8775p-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sdm670-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 + - qcom,sm6350-dwc3 + then: + properties: + clocks: + maxItems: 5 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq6018-dwc3 + then: + properties: + clocks: + minItems: 3 + maxItems: 4 + clock-names: + oneOf: + - items: + - const: core + - const: sleep + - const: mock_utmi + - items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8074-dwc3 + - qcom,qdu1000-dwc3 + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5018-dwc3 + - qcom,msm8994-dwc3 + - qcom,qcs404-dwc3 + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: core + - const: iface + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp + - qcom,x1e80100-dwc3 + - qcom,x1e80100-dwc3-mp + then: + properties: + clocks: + maxItems: 9 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: noc_aggr + - const: noc_aggr_north + - const: noc_aggr_south + - const: noc_sys + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm660-dwc3 + then: + properties: + clocks: + minItems: 4 + maxItems: 5 + clock-names: + oneOf: + - items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,milos-dwc3 + - qcom,qcm2290-dwc3 + - qcom,qcs615-dwc3 + - qcom,sar2130p-dwc3 + - qcom,sc8180x-dwc3 + - qcom,sc8180x-dwc3-mp + - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8450-dwc3 + - qcom,sm8550-dwc3 + - qcom,sm8650-dwc3 + then: + properties: + clocks: + minItems: 6 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: xo + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8350-dwc3 + then: + properties: + clocks: + minItems: 5 + maxItems: 6 + clock-names: + minItems: 5 + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: xo + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5018-dwc3 + - qcom,ipq6018-dwc3 + - qcom,ipq8074-dwc3 + - qcom,msm8953-dwc3 + - qcom,msm8998-dwc3 + then: + properties: + interrupts: + minItems: 3 + maxItems: 4 + interrupt-names: + minItems: 3 + items: + - const: dwc_usb3 + - const: pwr_event + - const: qusb2_phy + - const: ss_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8996-dwc3 + - qcom,qcs404-dwc3 + - qcom,sdm660-dwc3 + - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 + then: + properties: + interrupts: + minItems: 4 + maxItems: 5 + interrupt-names: + minItems: 4 + items: + - const: dwc_usb3 + - const: pwr_event + - const: qusb2_phy + - const: hs_phy_irq + - const: ss_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5332-dwc3 + then: + properties: + interrupts: + maxItems: 4 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event + - const: dp_hs_phy_irq + - const: dm_hs_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,milos-dwc3 + - qcom,x1e80100-dwc3 + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event + - const: dp_hs_phy_irq + - const: dm_hs_phy_irq + - const: ss_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq4019-dwc3 + - qcom,ipq8064-dwc3 + - qcom,msm8994-dwc3 + - qcom,qcs615-dwc3 + - qcom,qcs8300-dwc3 + - qcom,qdu1000-dwc3 + - qcom,sa8775p-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sc8180x-dwc3 + - qcom,sc8280xp-dwc3 + - qcom,sdm670-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 + - qcom,sm4250-dwc3 + - qcom,sm6350-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8350-dwc3 + - qcom,sm8450-dwc3 + - qcom,sm8550-dwc3 + - qcom,sm8650-dwc3 + then: + properties: + interrupts: + minItems: 5 + maxItems: 6 + interrupt-names: + minItems: 5 + items: + - const: dwc_usb3 + - const: pwr_event + - const: hs_phy_irq + - const: dp_hs_phy_irq + - const: dm_hs_phy_irq + - const: ss_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8180x-dwc3-mp + - qcom,x1e80100-dwc3-mp + then: + properties: + interrupts: + minItems: 11 + maxItems: 11 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event_1 + - const: pwr_event_2 + - const: hs_phy_1 + - const: hs_phy_2 + - const: dp_hs_phy_1 + - const: dm_hs_phy_1 + - const: dp_hs_phy_2 + - const: dm_hs_phy_2 + - const: ss_phy_1 + - const: ss_phy_2 + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-dwc3-mp + then: + properties: + interrupts: + minItems: 19 + maxItems: 19 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event_1 + - const: pwr_event_2 + - const: pwr_event_3 + - const: pwr_event_4 + - const: hs_phy_1 + - const: hs_phy_2 + - const: hs_phy_3 + - const: hs_phy_4 + - const: dp_hs_phy_1 + - const: dm_hs_phy_1 + - const: dp_hs_phy_2 + - const: dm_hs_phy_2 + - const: dp_hs_phy_3 + - const: dm_hs_phy_3 + - const: dp_hs_phy_4 + - const: dm_hs_phy_4 + - const: ss_phy_1 + - const: ss_phy_2 + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sdm845.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + + usb@a600000 { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0x100000>; + + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; + + assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>; + assigned-clock-rates = <19200000>, <150000000>; + + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>, + <GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>, + <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", "pwr_event", "hs_phy_irq", + "dp_hs_phy_irq", "dm_hs_phy_irq", "ss_phy_irq"; + + power-domains = <&gcc USB30_PRIM_GDSC>; + + resets = <&gcc GCC_USB30_PRIM_BCR>; + + iommus = <&apps_smmu 0x740 0>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; +... diff --git a/sys/contrib/device-tree/Bindings/usb/realtek,rts5411.yaml b/sys/contrib/device-tree/Bindings/usb/realtek,rts5411.yaml index 6577a61cc075..a020afaf2d6e 100644 --- a/sys/contrib/device-tree/Bindings/usb/realtek,rts5411.yaml +++ b/sys/contrib/device-tree/Bindings/usb/realtek,rts5411.yaml @@ -10,7 +10,7 @@ maintainers: - Matthias Kaehlcke <mka@chromium.org> allOf: - - $ref: usb-device.yaml# + - $ref: usb-hub.yaml# properties: compatible: @@ -19,61 +19,35 @@ properties: - usbbda,5411 - usbbda,411 - reg: true - - '#address-cells': - const: 1 - - '#size-cells': - const: 0 - vdd-supply: description: phandle to the regulator that provides power to the hub. - peer-hub: - $ref: /schemas/types.yaml#/definitions/phandle - description: - phandle to the peer hub on the controller. + peer-hub: true ports: $ref: /schemas/graph.yaml#/properties/ports - properties: - port@1: - $ref: /schemas/graph.yaml#/properties/port - description: - 1st downstream facing USB port - - port@2: + patternProperties: + '^port@': $ref: /schemas/graph.yaml#/properties/port - description: - 2nd downstream facing USB port - port@3: - $ref: /schemas/graph.yaml#/properties/port - description: - 3rd downstream facing USB port + properties: + reg: + minimum: 1 + maximum: 4 - port@4: - $ref: /schemas/graph.yaml#/properties/port - description: - 4th downstream facing USB port - -patternProperties: - '^.*@[1-4]$': - description: The hard wired USB devices - type: object - $ref: /schemas/usb/usb-device.yaml - additionalProperties: true +additionalProperties: + properties: + reg: + minimum: 1 + maximum: 4 required: - peer-hub - compatible - reg -additionalProperties: false - examples: - | usb { diff --git a/sys/contrib/device-tree/Bindings/usb/renesas,rzv2m-usb3drd.yaml b/sys/contrib/device-tree/Bindings/usb/renesas,rzv2m-usb3drd.yaml index ff625600d9af..b87e139c29e5 100644 --- a/sys/contrib/device-tree/Bindings/usb/renesas,rzv2m-usb3drd.yaml +++ b/sys/contrib/device-tree/Bindings/usb/renesas,rzv2m-usb3drd.yaml @@ -104,26 +104,26 @@ examples: #size-cells = <1>; usb3host: usb@85060000 { - compatible = "renesas,r9a09g011-xhci", - "renesas,rzv2m-xhci"; - reg = <0x85060000 0x2000>; - interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_H>, - <&cpg CPG_MOD R9A09G011_USB_PCLK>; - clock-names = "axi", "reg"; - power-domains = <&cpg>; - resets = <&cpg R9A09G011_USB_ARESETN_H>; + compatible = "renesas,r9a09g011-xhci", + "renesas,rzv2m-xhci"; + reg = <0x85060000 0x2000>; + interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_H>, + <&cpg CPG_MOD R9A09G011_USB_PCLK>; + clock-names = "axi", "reg"; + power-domains = <&cpg>; + resets = <&cpg R9A09G011_USB_ARESETN_H>; }; usb3peri: usb3peri@85070000 { - compatible = "renesas,r9a09g011-usb3-peri", - "renesas,rzv2m-usb3-peri"; - reg = <0x85070000 0x400>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_P>, - <&cpg CPG_MOD R9A09G011_USB_PCLK>; - clock-names = "axi", "reg"; - power-domains = <&cpg>; - resets = <&cpg R9A09G011_USB_ARESETN_P>; + compatible = "renesas,r9a09g011-usb3-peri", + "renesas,rzv2m-usb3-peri"; + reg = <0x85070000 0x400>; + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_P>, + <&cpg CPG_MOD R9A09G011_USB_PCLK>; + clock-names = "axi", "reg"; + power-domains = <&cpg>; + resets = <&cpg R9A09G011_USB_ARESETN_P>; }; }; diff --git a/sys/contrib/device-tree/Bindings/usb/renesas,usb3-peri.yaml b/sys/contrib/device-tree/Bindings/usb/renesas,usb3-peri.yaml index b2b811a0ade8..4e56e4ffeaf2 100644 --- a/sys/contrib/device-tree/Bindings/usb/renesas,usb3-peri.yaml +++ b/sys/contrib/device-tree/Bindings/usb/renesas,usb3-peri.yaml @@ -132,19 +132,19 @@ examples: usb-role-switch; ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - usb3_hs_ep: endpoint { - remote-endpoint = <&hs_ep>; - }; + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + usb3_hs_ep: endpoint { + remote-endpoint = <&hs_ep>; }; - port@1 { - reg = <1>; - usb3_role_switch: endpoint { - remote-endpoint = <&hd3ss3220_out_ep>; - }; + }; + port@1 { + reg = <1>; + usb3_role_switch: endpoint { + remote-endpoint = <&hd3ss3220_out_ep>; }; + }; }; }; diff --git a/sys/contrib/device-tree/Bindings/usb/renesas,usbhs.yaml b/sys/contrib/device-tree/Bindings/usb/renesas,usbhs.yaml index c63db3ebd07b..a19816bbb1fd 100644 --- a/sys/contrib/device-tree/Bindings/usb/renesas,usbhs.yaml +++ b/sys/contrib/device-tree/Bindings/usb/renesas,usbhs.yaml @@ -26,6 +26,9 @@ properties: - renesas,usbhs-r9a07g043 # RZ/G2UL and RZ/Five - renesas,usbhs-r9a07g044 # RZ/G2{L,LC} - renesas,usbhs-r9a07g054 # RZ/V2L + - renesas,usbhs-r9a08g045 # RZ/G3S + - renesas,usbhs-r9a09g056 # RZ/V2N + - renesas,usbhs-r9a09g057 # RZ/V2H(P) - const: renesas,rzg2l-usbhs - items: @@ -76,6 +79,10 @@ properties: Integer to use BUSWAIT register. renesas,enable-gpio: + deprecated: true + maxItems: 1 + + renesas,enable-gpios: maxItems: 1 description: | gpio specifier to check GPIO determining if USB function should be @@ -122,10 +129,7 @@ allOf: properties: compatible: contains: - enum: - - renesas,usbhs-r9a07g043 - - renesas,usbhs-r9a07g044 - - renesas,usbhs-r9a07g054 + const: renesas,rzg2l-usbhs then: properties: interrupts: diff --git a/sys/contrib/device-tree/Bindings/usb/richtek,rt1711h.yaml b/sys/contrib/device-tree/Bindings/usb/richtek,rt1711h.yaml index 8da4d2ad1a91..ae611f7e57ca 100644 --- a/sys/contrib/device-tree/Bindings/usb/richtek,rt1711h.yaml +++ b/sys/contrib/device-tree/Bindings/usb/richtek,rt1711h.yaml @@ -30,6 +30,9 @@ properties: interrupts: maxItems: 1 + vbus-supply: + description: VBUS power supply + wakeup-source: type: boolean diff --git a/sys/contrib/device-tree/Bindings/usb/rockchip,dwc3.yaml b/sys/contrib/device-tree/Bindings/usb/rockchip,dwc3.yaml index c4924113f9bd..fd1b13c0ed6b 100644 --- a/sys/contrib/device-tree/Bindings/usb/rockchip,dwc3.yaml +++ b/sys/contrib/device-tree/Bindings/usb/rockchip,dwc3.yaml @@ -18,7 +18,7 @@ description: Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml Type-C PHY - Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt + Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml select: properties: @@ -26,7 +26,9 @@ select: contains: enum: - rockchip,rk3328-dwc3 + - rockchip,rk3562-dwc3 - rockchip,rk3568-dwc3 + - rockchip,rk3576-dwc3 - rockchip,rk3588-dwc3 required: - compatible @@ -36,7 +38,9 @@ properties: items: - enum: - rockchip,rk3328-dwc3 + - rockchip,rk3562-dwc3 - rockchip,rk3568-dwc3 + - rockchip,rk3576-dwc3 - rockchip,rk3588-dwc3 - const: snps,dwc3 @@ -70,6 +74,7 @@ properties: - enum: - grf_clk - utmi + - pipe - const: pipe power-domains: @@ -113,7 +118,25 @@ allOf: properties: compatible: contains: - const: rockchip,rk3568-dwc3 + const: rockchip,rk3562-dwc3 + then: + properties: + clocks: + minItems: 4 + maxItems: 4 + clock-names: + items: + - const: ref_clk + - const: suspend_clk + - const: bus_clk + - const: pipe + - if: + properties: + compatible: + contains: + enum: + - rockchip,rk3568-dwc3 + - rockchip,rk3576-dwc3 then: properties: clocks: diff --git a/sys/contrib/device-tree/Bindings/usb/samsung,exynos-dwc3.yaml b/sys/contrib/device-tree/Bindings/usb/samsung,exynos-dwc3.yaml index 2b3430cebe99..6d39e5066944 100644 --- a/sys/contrib/device-tree/Bindings/usb/samsung,exynos-dwc3.yaml +++ b/sys/contrib/device-tree/Bindings/usb/samsung,exynos-dwc3.yaml @@ -11,12 +11,19 @@ maintainers: properties: compatible: - enum: - - google,gs101-dwusb3 - - samsung,exynos5250-dwusb3 - - samsung,exynos5433-dwusb3 - - samsung,exynos7-dwusb3 - - samsung,exynos850-dwusb3 + oneOf: + - enum: + - google,gs101-dwusb3 + - samsung,exynos2200-dwusb3 + - samsung,exynos5250-dwusb3 + - samsung,exynos5433-dwusb3 + - samsung,exynos7-dwusb3 + - samsung,exynos7870-dwusb3 + - samsung,exynos850-dwusb3 + - samsung,exynosautov920-dwusb3 + - items: + - const: samsung,exynos990-dwusb3 + - const: samsung,exynos850-dwusb3 '#address-cells': const: 1 @@ -52,7 +59,6 @@ required: - clock-names - ranges - '#size-cells' - - vdd10-supply - vdd33-supply allOf: @@ -72,6 +78,21 @@ allOf: - const: susp_clk - const: link_aclk - const: link_pclk + required: + - vdd10-supply + + - if: + properties: + compatible: + contains: + const: samsung,exynos2200-dwusb3 + then: + properties: + clocks: + maxItems: 1 + clock-names: + items: + - const: link_aclk - if: properties: @@ -86,6 +107,8 @@ allOf: clock-names: items: - const: usbdrd30 + required: + - vdd10-supply - if: properties: @@ -103,6 +126,8 @@ allOf: - const: susp_clk - const: phyclk - const: pipe_pclk + required: + - vdd10-supply - if: properties: @@ -119,6 +144,24 @@ allOf: - const: usbdrd30 - const: usbdrd30_susp_clk - const: usbdrd30_axius_clk + required: + - vdd10-supply + + - if: + properties: + compatible: + contains: + const: samsung,exynos7870-dwusb3 + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + clock-names: + items: + - const: bus_early + - const: ref + - const: ctrl - if: properties: @@ -134,6 +177,23 @@ allOf: items: - const: bus_early - const: ref + required: + - vdd10-supply + + - if: + properties: + compatible: + contains: + const: samsung,exynosautov920-dwusb3 + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: ref + - const: susp_clk additionalProperties: false diff --git a/sys/contrib/device-tree/Bindings/usb/smsc,usb3503.yaml b/sys/contrib/device-tree/Bindings/usb/smsc,usb3503.yaml index 6156dc26e65c..18e35122dc1f 100644 --- a/sys/contrib/device-tree/Bindings/usb/smsc,usb3503.yaml +++ b/sys/contrib/device-tree/Bindings/usb/smsc,usb3503.yaml @@ -106,54 +106,54 @@ additionalProperties: false examples: - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - usb-hub@8 { - compatible = "smsc,usb3503"; - reg = <0x08>; - connect-gpios = <&gpx3 0 1>; - disabled-ports = <2 3>; - intn-gpios = <&gpx3 4 1>; - reset-gpios = <&gpx3 5 1>; - initial-mode = <1>; - clocks = <&clks 80>; - clock-names = "refclk"; - }; - }; + i2c { + #address-cells = <1>; + #size-cells = <0>; + + usb-hub@8 { + compatible = "smsc,usb3503"; + reg = <0x08>; + connect-gpios = <&gpx3 0 1>; + disabled-ports = <2 3>; + intn-gpios = <&gpx3 4 1>; + reset-gpios = <&gpx3 5 1>; + initial-mode = <1>; + clocks = <&clks 80>; + clock-names = "refclk"; + }; + }; - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - usb-hub@8 { - compatible = "smsc,usb3803"; - reg = <0x08>; - connect-gpios = <&gpx3 0 1>; - disabled-ports = <2 3>; - intn-gpios = <&gpx3 4 1>; - reset-gpios = <&gpx3 5 1>; - bypass-gpios = <&gpx3 6 1>; - initial-mode = <3>; - clocks = <&clks 80>; - clock-names = "refclk"; - }; - }; + i2c { + #address-cells = <1>; + #size-cells = <0>; + + usb-hub@8 { + compatible = "smsc,usb3803"; + reg = <0x08>; + connect-gpios = <&gpx3 0 1>; + disabled-ports = <2 3>; + intn-gpios = <&gpx3 4 1>; + reset-gpios = <&gpx3 5 1>; + bypass-gpios = <&gpx3 6 1>; + initial-mode = <3>; + clocks = <&clks 80>; + clock-names = "refclk"; + }; + }; - | - #include <dt-bindings/gpio/gpio.h> - - usb-hub { - /* I2C is not connected */ - compatible = "smsc,usb3503"; - initial-mode = <1>; /* initialize in HUB mode */ - disabled-ports = <1>; - intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ - reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ - connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */ - refclk-frequency = <19200000>; - }; + #include <dt-bindings/gpio/gpio.h> + + usb-hub { + /* I2C is not connected */ + compatible = "smsc,usb3503"; + initial-mode = <1>; /* initialize in HUB mode */ + disabled-ports = <1>; + intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ + connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */ + refclk-frequency = <19200000>; + }; ... diff --git a/sys/contrib/device-tree/Bindings/usb/snps,dwc3-common.yaml b/sys/contrib/device-tree/Bindings/usb/snps,dwc3-common.yaml new file mode 100644 index 000000000000..6c0b8b653824 --- /dev/null +++ b/sys/contrib/device-tree/Bindings/usb/snps,dwc3-common.yaml @@ -0,0 +1,432 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare USB3 Controller common properties + +maintainers: + - Felipe Balbi <balbi@kernel.org> + +description: + Defines the properties of the DWC3 core as being embedded in either an + vendor-specific implementation or as a standalone component. + +allOf: + - $ref: usb-drd.yaml# + - if: + properties: + dr_mode: + const: peripheral + + required: + - dr_mode + then: + $ref: usb.yaml# + else: + $ref: usb-xhci.yaml# + +properties: + extcon: + maxItems: 1 + deprecated: true + + usb-phy: + minItems: 1 + items: + - description: USB2/HS PHY + - description: USB3/SS PHY + + phys: + minItems: 1 + maxItems: 19 + + phy-names: + minItems: 1 + maxItems: 19 + oneOf: + - items: + enum: [ usb2-phy, usb3-phy ] + - items: + pattern: "^usb(2-([0-9]|1[0-4])|3-[0-3])$" + + snps,usb2-lpm-disable: + description: Indicate if we don't want to enable USB2 HW LPM for host + mode. + type: boolean + + snps,usb3_lpm_capable: + description: Determines if platform is USB3 LPM capable + type: boolean + + snps,usb2-gadget-lpm-disable: + description: Indicate if we don't want to enable USB2 HW LPM for gadget + mode. + type: boolean + + snps,reserved-endpoints: + description: + Reserve endpoints for other needs, e.g, for tracing control and output. + When set, the driver will avoid using them for the regular USB transfers. + $ref: /schemas/types.yaml#/definitions/uint8-array + minItems: 1 + maxItems: 30 + items: + minimum: 2 + maximum: 31 + + snps,dis-start-transfer-quirk: + description: + When set, disable isoc START TRANSFER command failure SW work-around + for DWC_usb31 version 1.70a-ea06 and prior. + type: boolean + + snps,disable_scramble_quirk: + description: + True when SW should disable data scrambling. Only really useful for FPGA + builds. + type: boolean + + snps,has-lpm-erratum: + description: True when DWC3 was configured with LPM Erratum enabled + type: boolean + + snps,lpm-nyet-threshold: + description: LPM NYET threshold + $ref: /schemas/types.yaml#/definitions/uint8 + + snps,u2exit_lfps_quirk: + description: Set if we want to enable u2exit lfps quirk + type: boolean + + snps,u2ss_inp3_quirk: + description: Set if we enable P3 OK for U2/SS Inactive quirk + type: boolean + + snps,req_p1p2p3_quirk: + description: + When set, the core will always request for P1/P2/P3 transition sequence. + type: boolean + + snps,del_p1p2p3_quirk: + description: + When set core will delay P1/P2/P3 until a certain amount of 8B10B errors + occur. + type: boolean + + snps,del_phy_power_chg_quirk: + description: When set core will delay PHY power change from P0 to P1/P2/P3. + type: boolean + + snps,lfps_filter_quirk: + description: When set core will filter LFPS reception. + type: boolean + + snps,rx_detect_poll_quirk: + description: + when set core will disable a 400us delay to start Polling LFPS after + RX.Detect. + type: boolean + + snps,tx_de_emphasis_quirk: + description: When set core will set Tx de-emphasis value + type: boolean + + snps,tx_de_emphasis: + description: + The value driven to the PHY is controlled by the LTSSM during USB3 + Compliance mode. + $ref: /schemas/types.yaml#/definitions/uint8 + enum: + - 0 # -6dB de-emphasis + - 1 # -3.5dB de-emphasis + - 2 # No de-emphasis + + snps,dis_u3_susphy_quirk: + description: When set core will disable USB3 suspend phy + type: boolean + + snps,dis_u2_susphy_quirk: + description: When set core will disable USB2 suspend phy + type: boolean + + snps,dis_enblslpm_quirk: + description: + When set clears the enblslpm in GUSB2PHYCFG, disabling the suspend signal + to the PHY. + type: boolean + + snps,dis-u1-entry-quirk: + description: Set if link entering into U1 needs to be disabled + type: boolean + + snps,dis-u2-entry-quirk: + description: Set if link entering into U2 needs to be disabled + type: boolean + + snps,dis_rxdet_inp3_quirk: + description: + When set core will disable receiver detection in PHY P3 power state. + type: boolean + + snps,dis-u2-freeclk-exists-quirk: + description: + When set, clear the u2_freeclk_exists in GUSB2PHYCFG, specify that USB2 + PHY doesn't provide a free-running PHY clock. + type: boolean + + snps,dis-del-phy-power-chg-quirk: + description: + When set core will change PHY power from P0 to P1/P2/P3 without delay. + type: boolean + + snps,dis-tx-ipgap-linecheck-quirk: + description: When set, disable u2mac linestate check during HS transmit + type: boolean + + snps,parkmode-disable-ss-quirk: + description: + When set, all SuperSpeed bus instances in park mode are disabled. + type: boolean + + snps,parkmode-disable-hs-quirk: + description: + When set, all HighSpeed bus instances in park mode are disabled. + type: boolean + + snps,dis_metastability_quirk: + description: + When set, disable metastability workaround. CAUTION! Use only if you are + absolutely sure of it. + type: boolean + + snps,dis-split-quirk: + description: + When set, change the way URBs are handled by the driver. Needed to + avoid -EPROTO errors with usbhid on some devices (Hikey 970). + type: boolean + + snps,gfladj-refclk-lpm-sel-quirk: + description: + When set, run the SOF/ITP counter based on ref_clk. + type: boolean + + snps,resume-hs-terminations: + description: + Fix the issue of HS terminations CRC error on resume by enabling this + quirk. When set, all the termsel, xcvrsel, opmode becomes 0 during end + of resume. This option is to support certain legacy ULPI PHYs. + type: boolean + + snps,ulpi-ext-vbus-drv: + description: + Some ULPI USB PHY does not support internal VBUS supply, and driving + the CPEN pin, requires the configuration of the ulpi DRVVBUSEXTERNAL + bit. When set, the xhci host will configure the USB2 PHY drives VBUS + with an external supply. + type: boolean + + snps,is-utmi-l1-suspend: + description: + True when DWC3 asserts output signal utmi_l1_suspend_n, false when + asserts utmi_sleep_n. + type: boolean + + snps,hird-threshold: + description: HIRD threshold + $ref: /schemas/types.yaml#/definitions/uint8 + + snps,hsphy_interface: + description: + High-Speed PHY interface selection between UTMI+ and ULPI when the + DWC_USB3_HSPHY_INTERFACE has value 3. + $ref: /schemas/types.yaml#/definitions/string + enum: [utmi, ulpi] + + snps,quirk-frame-length-adjustment: + description: + Value for GFLADJ_30MHZ field of GFLADJ register for post-silicon frame + length adjustment when the fladj_30mhz_sdbnd signal is invalid or + incorrect. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0x3f + + snps,ref-clock-period-ns: + description: + Value for REFCLKPER field of GUCTL register for reference clock period in + nanoseconds, when the hardware set default does not match the actual + clock. + + This binding is deprecated. Instead, provide an appropriate reference clock. + minimum: 8 + maximum: 62 + deprecated: true + + snps,rx-thr-num-pkt: + description: + USB RX packet threshold count. In host mode, this field specifies + the space that must be available in the RX FIFO before the core can + start the corresponding USB RX transaction (burst). + In device mode, this field specifies the space that must be + available in the RX FIFO before the core can send ERDY for a + flow-controlled endpoint. It is only used for SuperSpeed. + The valid values for this field are from 1 to 15. (DWC3 SuperSpeed + USB 3.0 Controller Databook) + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 15 + + snps,rx-max-burst: + description: + Max USB RX burst size. In host mode, this field specifies the + Maximum Bulk IN burst the DWC_usb3 core can perform. When the system + bus is slower than the USB, RX FIFO can overrun during a long burst. + You can program a smaller value to this field to limit the RX burst + size that the core can perform. It only applies to SS Bulk, + Isochronous, and Interrupt IN endpoints in the host mode. + In device mode, this field specifies the NUMP value that is sent in + ERDY for an OUT endpoint. + The valid values for this field are from 1 to 16. (DWC3 SuperSpeed + USB 3.0 Controller Databook) + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 16 + + snps,tx-thr-num-pkt: + description: + USB TX packet threshold count. This field specifies the number of + packets that must be in the TXFIFO before the core can start + transmission for the corresponding USB transaction (burst). + This count is valid in both host and device modes. It is only used + for SuperSpeed operation. + Valid values are from 1 to 15. (DWC3 SuperSpeed USB 3.0 Controller + Databook) + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 15 + + snps,tx-max-burst: + description: + Max USB TX burst size. When the system bus is slower than the USB, + TX FIFO can underrun during a long burst. Program a smaller value + to this field to limit the TX burst size that the core can execute. + In Host mode, it only applies to SS Bulk, Isochronous, and Interrupt + OUT endpoints. This value is not used in device mode. + Valid values are from 1 to 16. (DWC3 SuperSpeed USB 3.0 Controller + Databook) + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 16 + + snps,rx-thr-num-pkt-prd: + description: + Periodic ESS RX packet threshold count (host mode only). Set this and + snps,rx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31 + programming guide section 1.2.4) to enable periodic ESS RX threshold. + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 16 + + snps,rx-max-burst-prd: + description: + Max periodic ESS RX burst size (host mode only). Set this and + snps,rx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 + programming guide section 1.2.4) to enable periodic ESS RX threshold. + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 16 + + snps,tx-thr-num-pkt-prd: + description: + Periodic ESS TX packet threshold count (host mode only). Set this and + snps,tx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31 + programming guide section 1.2.3) to enable periodic ESS TX threshold. + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 16 + + snps,tx-max-burst-prd: + description: + Max periodic ESS TX burst size (host mode only). Set this and + snps,tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 + programming guide section 1.2.3) to enable periodic ESS TX threshold. + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 16 + + tx-fifo-resize: + description: Determines if the TX fifos can be dynamically resized depending + on the number of IN endpoints used and if bursting is supported. This + may help improve bandwidth on platforms with higher system latencies, as + increased fifo space allows for the controller to prefetch data into its + internal memory. + type: boolean + + tx-fifo-max-num: + description: Specifies the max number of packets the txfifo resizing logic + can account for when higher endpoint bursting is used. (bMaxBurst > 6) The + higher the number, the more fifo space the txfifo resizing logic will + allocate for that endpoint. + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 3 + + snps,incr-burst-type-adjustment: + description: + Value for INCR burst type of GSBUSCFG0 register, undefined length INCR + burst type enable and INCRx type. A single value means INCRX burst mode + enabled. If more than one value specified, undefined length INCR burst + type will be enabled with burst lengths utilized up to the maximum + of the values passed in this property. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 8 + uniqueItems: true + items: + enum: [1, 4, 8, 16, 32, 64, 128, 256] + + num-hc-interrupters: + maximum: 8 + default: 1 + + connector: + $ref: /schemas/connector/usb-connector.yaml# + description: Connector for dual role switch + type: object + unevaluatedProperties: false + + port: + $ref: /schemas/graph.yaml#/properties/port + description: + This port is used with the 'usb-role-switch' property to connect the + dwc3 to type C connector. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: + Those ports should be used with any connector to the data bus of this + controller using the OF graph bindings specified if the "usb-role-switch" + property is used. + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: High Speed (HS) data bus. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Super Speed (SS) data bus. + + wakeup-source: + $ref: /schemas/types.yaml#/definitions/flag + description: + Enable USB remote wakeup. + +required: + - compatible + - reg + +additionalProperties: true +... + diff --git a/sys/contrib/device-tree/Bindings/usb/snps,dwc3.yaml b/sys/contrib/device-tree/Bindings/usb/snps,dwc3.yaml index 1cd0ca90127d..4380bb6fa2f0 100644 --- a/sys/contrib/device-tree/Bindings/usb/snps,dwc3.yaml +++ b/sys/contrib/device-tree/Bindings/usb/snps,dwc3.yaml @@ -15,18 +15,7 @@ description: compatible string. allOf: - - $ref: usb-drd.yaml# - - if: - properties: - dr_mode: - const: peripheral - - required: - - dr_mode - then: - $ref: usb.yaml# - else: - $ref: usb-xhci.yaml# + - $ref: snps,dwc3-common.yaml# properties: compatible: @@ -70,32 +59,9 @@ properties: dma-coherent: true - extcon: - maxItems: 1 - deprecated: true - iommus: maxItems: 1 - usb-phy: - minItems: 1 - items: - - description: USB2/HS PHY - - description: USB3/SS PHY - - phys: - minItems: 1 - maxItems: 19 - - phy-names: - minItems: 1 - maxItems: 19 - oneOf: - - items: - enum: [ usb2-phy, usb3-phy ] - - items: - pattern: "^usb(2-([0-9]|1[0-4])|3-[0-3])$" - power-domains: description: The DWC3 has 2 power-domains. The power management unit (PMU) and @@ -109,361 +75,6 @@ properties: resets: minItems: 1 - snps,usb2-lpm-disable: - description: Indicate if we don't want to enable USB2 HW LPM for host - mode. - type: boolean - - snps,usb3_lpm_capable: - description: Determines if platform is USB3 LPM capable - type: boolean - - snps,usb2-gadget-lpm-disable: - description: Indicate if we don't want to enable USB2 HW LPM for gadget - mode. - type: boolean - - snps,dis-start-transfer-quirk: - description: - When set, disable isoc START TRANSFER command failure SW work-around - for DWC_usb31 version 1.70a-ea06 and prior. - type: boolean - - snps,disable_scramble_quirk: - description: - True when SW should disable data scrambling. Only really useful for FPGA - builds. - type: boolean - - snps,has-lpm-erratum: - description: True when DWC3 was configured with LPM Erratum enabled - type: boolean - - snps,lpm-nyet-threshold: - description: LPM NYET threshold - $ref: /schemas/types.yaml#/definitions/uint8 - - snps,u2exit_lfps_quirk: - description: Set if we want to enable u2exit lfps quirk - type: boolean - - snps,u2ss_inp3_quirk: - description: Set if we enable P3 OK for U2/SS Inactive quirk - type: boolean - - snps,req_p1p2p3_quirk: - description: - When set, the core will always request for P1/P2/P3 transition sequence. - type: boolean - - snps,del_p1p2p3_quirk: - description: - When set core will delay P1/P2/P3 until a certain amount of 8B10B errors - occur. - type: boolean - - snps,del_phy_power_chg_quirk: - description: When set core will delay PHY power change from P0 to P1/P2/P3. - type: boolean - - snps,lfps_filter_quirk: - description: When set core will filter LFPS reception. - type: boolean - - snps,rx_detect_poll_quirk: - description: - when set core will disable a 400us delay to start Polling LFPS after - RX.Detect. - type: boolean - - snps,tx_de_emphasis_quirk: - description: When set core will set Tx de-emphasis value - type: boolean - - snps,tx_de_emphasis: - description: - The value driven to the PHY is controlled by the LTSSM during USB3 - Compliance mode. - $ref: /schemas/types.yaml#/definitions/uint8 - enum: - - 0 # -6dB de-emphasis - - 1 # -3.5dB de-emphasis - - 2 # No de-emphasis - - snps,dis_u3_susphy_quirk: - description: When set core will disable USB3 suspend phy - type: boolean - - snps,dis_u2_susphy_quirk: - description: When set core will disable USB2 suspend phy - type: boolean - - snps,dis_enblslpm_quirk: - description: - When set clears the enblslpm in GUSB2PHYCFG, disabling the suspend signal - to the PHY. - type: boolean - - snps,dis-u1-entry-quirk: - description: Set if link entering into U1 needs to be disabled - type: boolean - - snps,dis-u2-entry-quirk: - description: Set if link entering into U2 needs to be disabled - type: boolean - - snps,dis_rxdet_inp3_quirk: - description: - When set core will disable receiver detection in PHY P3 power state. - type: boolean - - snps,dis-u2-freeclk-exists-quirk: - description: - When set, clear the u2_freeclk_exists in GUSB2PHYCFG, specify that USB2 - PHY doesn't provide a free-running PHY clock. - type: boolean - - snps,dis-del-phy-power-chg-quirk: - description: - When set core will change PHY power from P0 to P1/P2/P3 without delay. - type: boolean - - snps,dis-tx-ipgap-linecheck-quirk: - description: When set, disable u2mac linestate check during HS transmit - type: boolean - - snps,parkmode-disable-ss-quirk: - description: - When set, all SuperSpeed bus instances in park mode are disabled. - type: boolean - - snps,parkmode-disable-hs-quirk: - description: - When set, all HighSpeed bus instances in park mode are disabled. - type: boolean - - snps,dis_metastability_quirk: - description: - When set, disable metastability workaround. CAUTION! Use only if you are - absolutely sure of it. - type: boolean - - snps,dis-split-quirk: - description: - When set, change the way URBs are handled by the driver. Needed to - avoid -EPROTO errors with usbhid on some devices (Hikey 970). - type: boolean - - snps,gfladj-refclk-lpm-sel-quirk: - description: - When set, run the SOF/ITP counter based on ref_clk. - type: boolean - - snps,resume-hs-terminations: - description: - Fix the issue of HS terminations CRC error on resume by enabling this - quirk. When set, all the termsel, xcvrsel, opmode becomes 0 during end - of resume. This option is to support certain legacy ULPI PHYs. - type: boolean - - snps,ulpi-ext-vbus-drv: - description: - Some ULPI USB PHY does not support internal VBUS supply, and driving - the CPEN pin, requires the configuration of the ulpi DRVVBUSEXTERNAL - bit. When set, the xhci host will configure the USB2 PHY drives VBUS - with an external supply. - type: boolean - - snps,is-utmi-l1-suspend: - description: - True when DWC3 asserts output signal utmi_l1_suspend_n, false when - asserts utmi_sleep_n. - type: boolean - - snps,hird-threshold: - description: HIRD threshold - $ref: /schemas/types.yaml#/definitions/uint8 - - snps,hsphy_interface: - description: - High-Speed PHY interface selection between UTMI+ and ULPI when the - DWC_USB3_HSPHY_INTERFACE has value 3. - $ref: /schemas/types.yaml#/definitions/string - enum: [utmi, ulpi] - - snps,quirk-frame-length-adjustment: - description: - Value for GFLADJ_30MHZ field of GFLADJ register for post-silicon frame - length adjustment when the fladj_30mhz_sdbnd signal is invalid or - incorrect. - $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 0 - maximum: 0x3f - - snps,ref-clock-period-ns: - description: - Value for REFCLKPER field of GUCTL register for reference clock period in - nanoseconds, when the hardware set default does not match the actual - clock. - - This binding is deprecated. Instead, provide an appropriate reference clock. - minimum: 8 - maximum: 62 - deprecated: true - - snps,rx-thr-num-pkt: - description: - USB RX packet threshold count. In host mode, this field specifies - the space that must be available in the RX FIFO before the core can - start the corresponding USB RX transaction (burst). - In device mode, this field specifies the space that must be - available in the RX FIFO before the core can send ERDY for a - flow-controlled endpoint. It is only used for SuperSpeed. - The valid values for this field are from 1 to 15. (DWC3 SuperSpeed - USB 3.0 Controller Databook) - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 15 - - snps,rx-max-burst: - description: - Max USB RX burst size. In host mode, this field specifies the - Maximum Bulk IN burst the DWC_usb3 core can perform. When the system - bus is slower than the USB, RX FIFO can overrun during a long burst. - You can program a smaller value to this field to limit the RX burst - size that the core can perform. It only applies to SS Bulk, - Isochronous, and Interrupt IN endpoints in the host mode. - In device mode, this field specifies the NUMP value that is sent in - ERDY for an OUT endpoint. - The valid values for this field are from 1 to 16. (DWC3 SuperSpeed - USB 3.0 Controller Databook) - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 16 - - snps,tx-thr-num-pkt: - description: - USB TX packet threshold count. This field specifies the number of - packets that must be in the TXFIFO before the core can start - transmission for the corresponding USB transaction (burst). - This count is valid in both host and device modes. It is only used - for SuperSpeed operation. - Valid values are from 1 to 15. (DWC3 SuperSpeed USB 3.0 Controller - Databook) - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 15 - - snps,tx-max-burst: - description: - Max USB TX burst size. When the system bus is slower than the USB, - TX FIFO can underrun during a long burst. Program a smaller value - to this field to limit the TX burst size that the core can execute. - In Host mode, it only applies to SS Bulk, Isochronous, and Interrupt - OUT endpoints. This value is not used in device mode. - Valid values are from 1 to 16. (DWC3 SuperSpeed USB 3.0 Controller - Databook) - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 16 - - snps,rx-thr-num-pkt-prd: - description: - Periodic ESS RX packet threshold count (host mode only). Set this and - snps,rx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31 - programming guide section 1.2.4) to enable periodic ESS RX threshold. - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 16 - - snps,rx-max-burst-prd: - description: - Max periodic ESS RX burst size (host mode only). Set this and - snps,rx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 - programming guide section 1.2.4) to enable periodic ESS RX threshold. - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 16 - - snps,tx-thr-num-pkt-prd: - description: - Periodic ESS TX packet threshold count (host mode only). Set this and - snps,tx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31 - programming guide section 1.2.3) to enable periodic ESS TX threshold. - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 16 - - snps,tx-max-burst-prd: - description: - Max periodic ESS TX burst size (host mode only). Set this and - snps,tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 - programming guide section 1.2.3) to enable periodic ESS TX threshold. - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 16 - - tx-fifo-resize: - description: Determines if the TX fifos can be dynamically resized depending - on the number of IN endpoints used and if bursting is supported. This - may help improve bandwidth on platforms with higher system latencies, as - increased fifo space allows for the controller to prefetch data into its - internal memory. - type: boolean - - tx-fifo-max-num: - description: Specifies the max number of packets the txfifo resizing logic - can account for when higher endpoint bursting is used. (bMaxBurst > 6) The - higher the number, the more fifo space the txfifo resizing logic will - allocate for that endpoint. - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 3 - - snps,incr-burst-type-adjustment: - description: - Value for INCR burst type of GSBUSCFG0 register, undefined length INCR - burst type enable and INCRx type. A single value means INCRX burst mode - enabled. If more than one value specified, undefined length INCR burst - type will be enabled with burst lengths utilized up to the maximum - of the values passed in this property. - $ref: /schemas/types.yaml#/definitions/uint32-array - minItems: 1 - maxItems: 8 - uniqueItems: true - items: - enum: [1, 4, 8, 16, 32, 64, 128, 256] - - num-hc-interrupters: - maximum: 8 - default: 1 - - port: - $ref: /schemas/graph.yaml#/properties/port - description: - This port is used with the 'usb-role-switch' property to connect the - dwc3 to type C connector. - - ports: - $ref: /schemas/graph.yaml#/properties/ports - description: - Those ports should be used with any connector to the data bus of this - controller using the OF graph bindings specified if the "usb-role-switch" - property is used. - - properties: - port@0: - $ref: /schemas/graph.yaml#/properties/port - description: High Speed (HS) data bus. - - port@1: - $ref: /schemas/graph.yaml#/properties/port - description: Super Speed (SS) data bus. - - wakeup-source: - $ref: /schemas/types.yaml#/definitions/flag - description: - Enable USB remote wakeup. - unevaluatedProperties: false required: diff --git a/sys/contrib/device-tree/Bindings/usb/ti,hd3ss3220.yaml b/sys/contrib/device-tree/Bindings/usb/ti,hd3ss3220.yaml index 54c6586cb56d..bec1c8047bc0 100644 --- a/sys/contrib/device-tree/Bindings/usb/ti,hd3ss3220.yaml +++ b/sys/contrib/device-tree/Bindings/usb/ti,hd3ss3220.yaml @@ -56,26 +56,26 @@ examples: #size-cells = <0>; hd3ss3220@47 { - compatible = "ti,hd3ss3220"; - reg = <0x47>; - interrupt-parent = <&gpio6>; - interrupts = <3>; + compatible = "ti,hd3ss3220"; + reg = <0x47>; + interrupt-parent = <&gpio6>; + interrupts = <3>; - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - hd3ss3220_in_ep: endpoint { - remote-endpoint = <&ss_ep>; - }; - }; - port@1 { - reg = <1>; - hd3ss3220_out_ep: endpoint { - remote-endpoint = <&usb3_role_switch>; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + hd3ss3220_in_ep: endpoint { + remote-endpoint = <&ss_ep>; + }; }; + port@1 { + reg = <1>; + hd3ss3220_out_ep: endpoint { + remote-endpoint = <&usb3_role_switch>; + }; + }; + }; }; }; diff --git a/sys/contrib/device-tree/Bindings/usb/ti,tusb1046.yaml b/sys/contrib/device-tree/Bindings/usb/ti,tusb1046.yaml new file mode 100644 index 000000000000..f713cac4a8ac --- /dev/null +++ b/sys/contrib/device-tree/Bindings/usb/ti,tusb1046.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/ti,tusb1046.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments TUSB1046-DCI Type-C crosspoint switch + +maintainers: + - Romain Gantois <romain.gantois@bootlin.com> + +allOf: + - $ref: usb-switch.yaml# + +properties: + compatible: + const: ti,tusb1046 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - port + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + typec-mux@44 { + compatible = "ti,tusb1046"; + reg = <0x44>; + + mode-switch; + orientation-switch; + + port { + endpoint { + remote-endpoint = <&typec_controller>; + }; + }; + }; + }; +... diff --git a/sys/contrib/device-tree/Bindings/usb/ti,tusb73x0-pci.yaml b/sys/contrib/device-tree/Bindings/usb/ti,tusb73x0-pci.yaml new file mode 100644 index 000000000000..c4a91b3d6612 --- /dev/null +++ b/sys/contrib/device-tree/Bindings/usb/ti,tusb73x0-pci.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/ti,tusb73x0-pci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TUSB73x0 USB 3.0 xHCI Host Controller (PCIe) + +maintainers: + - Francesco Dolcini <francesco.dolcini@toradex.com> + +description: + TUSB73x0 USB 3.0 xHCI Host Controller via PCIe x1 Gen2 interface. + The TUSB7320 supports up to two downstream ports, the TUSB7340 supports up + to four downstream ports, both variants share the same PCI device ID. + +properties: + compatible: + const: pci104c,8241 + + reg: + maxItems: 1 + + ti,pwron-active-high: + $ref: /schemas/types.yaml#/definitions/flag + description: + Configure the polarity of the PWRONx# signals. When this is present, the + PWRONx# pins are active high and their internal pull-down resistors are + disabled. When this is absent, the PWRONx# pins are active low (default) + and their internal pull-down resistors are enabled. + +required: + - compatible + - reg + +allOf: + - $ref: usb-xhci.yaml + +additionalProperties: false + +examples: + - | + pcie@0 { + reg = <0x0 0x1000>; + ranges = <0x02000000 0x0 0x100000 0x10000000 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + + usb@0 { + compatible = "pci104c,8241"; + reg = <0x0 0x0 0x0 0x0 0x0>; + ti,pwron-active-high; + }; + }; diff --git a/sys/contrib/device-tree/Bindings/usb/ti,usb8020b.yaml b/sys/contrib/device-tree/Bindings/usb/ti,usb8020b.yaml index 8ef117793e11..61217da8b2f3 100644 --- a/sys/contrib/device-tree/Bindings/usb/ti,usb8020b.yaml +++ b/sys/contrib/device-tree/Bindings/usb/ti,usb8020b.yaml @@ -51,19 +51,19 @@ examples: /* 2.0 hub on port 1 */ hub_2_0: hub@1 { - compatible = "usb451,8027"; - reg = <1>; - peer-hub = <&hub_3_0>; - reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; - vdd-supply = <&usb_hub_fixed_3v3>; + compatible = "usb451,8027"; + reg = <1>; + peer-hub = <&hub_3_0>; + reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; + vdd-supply = <&usb_hub_fixed_3v3>; }; /* 3.0 hub on port 2 */ hub_3_0: hub@2 { - compatible = "usb451,8025"; - reg = <2>; - peer-hub = <&hub_2_0>; - reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; - vdd-supply = <&usb_hub_fixed_3v3>; + compatible = "usb451,8025"; + reg = <2>; + peer-hub = <&hub_2_0>; + reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; + vdd-supply = <&usb_hub_fixed_3v3>; }; }; diff --git a/sys/contrib/device-tree/Bindings/usb/ti,usb8041.yaml b/sys/contrib/device-tree/Bindings/usb/ti,usb8041.yaml index c2e29bd61e11..5e3eae9c2961 100644 --- a/sys/contrib/device-tree/Bindings/usb/ti,usb8041.yaml +++ b/sys/contrib/device-tree/Bindings/usb/ti,usb8041.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/usb/ti,usb8041.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: TI USB8041 USB 3.0 hub controller +title: TI USB8041 and USB8044 USB 3.0 hub controllers maintainers: - Alexander Stein <alexander.stein@ew.tq-group.com> @@ -17,6 +17,8 @@ properties: enum: - usb451,8140 - usb451,8142 + - usb451,8440 + - usb451,8442 reg: true @@ -51,17 +53,17 @@ examples: /* 2.0 hub on port 1 */ hub_2_0: hub@1 { - compatible = "usb451,8142"; - reg = <1>; - peer-hub = <&hub_3_0>; - reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + compatible = "usb451,8142"; + reg = <1>; + peer-hub = <&hub_3_0>; + reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; }; /* 3.0 hub on port 2 */ hub_3_0: hub@2 { - compatible = "usb451,8140"; - reg = <2>; - peer-hub = <&hub_2_0>; - reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + compatible = "usb451,8140"; + reg = <2>; + peer-hub = <&hub_2_0>; + reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; }; }; diff --git a/sys/contrib/device-tree/Bindings/usb/usb-device.yaml b/sys/contrib/device-tree/Bindings/usb/usb-device.yaml index da890ee60ce6..09fceb469f10 100644 --- a/sys/contrib/device-tree/Bindings/usb/usb-device.yaml +++ b/sys/contrib/device-tree/Bindings/usb/usb-device.yaml @@ -28,7 +28,8 @@ description: | properties: compatible: - pattern: "^usb[0-9a-f]{1,4},[0-9a-f]{1,4}$" + contains: + pattern: "^usb[0-9a-f]{1,4},[0-9a-f]{1,4}$" description: Device nodes or combined nodes. "usbVID,PID", where VID is the vendor id and PID the product id. The textual representation of VID and PID shall be in lower case @@ -39,8 +40,10 @@ properties: reg: description: the number of the USB hub port or the USB host-controller - port to which this device is attached. The range is 1-255. - maxItems: 1 + port to which this device is attached. + items: + - minimum: 1 + maximum: 255 "#address-cells": description: should be 1 for hub nodes with device nodes, diff --git a/sys/contrib/device-tree/Bindings/usb/usb-hub.yaml b/sys/contrib/device-tree/Bindings/usb/usb-hub.yaml new file mode 100644 index 000000000000..5238ab105763 --- /dev/null +++ b/sys/contrib/device-tree/Bindings/usb/usb-hub.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/usb-hub.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic USB Hub + +maintainers: + - Pin-yen Lin <treapking@chromium.org> + +allOf: + - $ref: usb-device.yaml# + +properties: + '#address-cells': + const: 1 + + peer-hub: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle to the peer hub on the controller. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: + The downstream facing USB ports + + patternProperties: + "^port@[1-9a-f][0-9a-f]*$": + $ref: /schemas/graph.yaml#/properties/port + +patternProperties: + '^.*@[1-9a-f][0-9a-f]*$': + description: The hard wired USB devices + type: object + $ref: /schemas/usb/usb-device.yaml + additionalProperties: true + +required: + - compatible + - reg + +additionalProperties: true + +examples: + - | + usb { + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb123,4567"; + reg = <1>; + peer-hub = <&hub_3_0>; + #address-cells = <1>; + #size-cells = <0>; + /* USB 2.0 device on port 5 */ + device@5 { + reg = <5>; + compatible = "usb765,4321"; + }; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb123,abcd"; + reg = <2>; + peer-hub = <&hub_2_0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + /* Type-A connector on port 3 */ + port@3 { + reg = <3>; + endpoint { + remote-endpoint = <&usb_a0_ss>; + }; + }; + }; + }; + }; diff --git a/sys/contrib/device-tree/Bindings/usb/usb-switch.yaml b/sys/contrib/device-tree/Bindings/usb/usb-switch.yaml index da76118e73a5..896201912630 100644 --- a/sys/contrib/device-tree/Bindings/usb/usb-switch.yaml +++ b/sys/contrib/device-tree/Bindings/usb/usb-switch.yaml @@ -26,11 +26,24 @@ properties: type: boolean port: - $ref: /schemas/graph.yaml#/properties/port + $ref: /schemas/graph.yaml#/$defs/port-base description: A port node to link the device to a TypeC controller for the purpose of handling altmode muxing and orientation switching. + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + properties: + data-lanes: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 8 + uniqueItems: true + items: + maximum: 8 + ports: $ref: /schemas/graph.yaml#/properties/ports properties: diff --git a/sys/contrib/device-tree/Bindings/usb/xlnx,usb2.yaml b/sys/contrib/device-tree/Bindings/usb/xlnx,usb2.yaml index a7f75fe36665..f295aa9d9ee7 100644 --- a/sys/contrib/device-tree/Bindings/usb/xlnx,usb2.yaml +++ b/sys/contrib/device-tree/Bindings/usb/xlnx,usb2.yaml @@ -7,7 +7,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Xilinx udc controller maintainers: - - Mubin Sayyed <mubin.sayyed@amd.com> - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> properties: |