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Diffstat (limited to 'sys/contrib/device-tree/src/arm/renesas/r8a7794.dtsi')
-rw-r--r--sys/contrib/device-tree/src/arm/renesas/r8a7794.dtsi8
1 files changed, 7 insertions, 1 deletions
diff --git a/sys/contrib/device-tree/src/arm/renesas/r8a7794.dtsi b/sys/contrib/device-tree/src/arm/renesas/r8a7794.dtsi
index 8e6386a79aea..92010d09f6c4 100644
--- a/sys/contrib/device-tree/src/arm/renesas/r8a7794.dtsi
+++ b/sys/contrib/device-tree/src/arm/renesas/r8a7794.dtsi
@@ -99,6 +99,7 @@
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
+ bootph-all;
};
pmu {
@@ -119,6 +120,7 @@
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
+ bootph-all;
#address-cells = <2>;
#size-cells = <2>;
@@ -243,6 +245,7 @@
pfc: pinctrl@e6060000 {
compatible = "renesas,pfc-r8a7794";
reg = <0 0xe6060000 0 0x11c>;
+ bootph-all;
};
cpg: clock-controller@e6150000 {
@@ -253,6 +256,7 @@
#clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
+ bootph-all;
};
apmu@e6151000 {
@@ -264,6 +268,7 @@
rst: reset-controller@e6160000 {
compatible = "renesas,r8a7794-rst";
reg = <0 0xe6160000 0 0x0100>;
+ bootph-all;
};
sysc: system-controller@e6180000 {
@@ -1349,7 +1354,6 @@
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 315>;
- reg-io-width = <4>;
status = "disabled";
};
@@ -1441,6 +1445,7 @@
prr: chipid@ff000044 {
compatible = "renesas,prr";
reg = <0 0xff000044 0 4>;
+ bootph-all;
};
cmt0: timer@ffca0000 {
@@ -1492,5 +1497,6 @@
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
+ bootph-all;
};
};