aboutsummaryrefslogtreecommitdiff
path: root/sys/contrib/ncsw/inc/core_ext.h
diff options
context:
space:
mode:
Diffstat (limited to 'sys/contrib/ncsw/inc/core_ext.h')
-rw-r--r--sys/contrib/ncsw/inc/core_ext.h19
1 files changed, 14 insertions, 5 deletions
diff --git a/sys/contrib/ncsw/inc/core_ext.h b/sys/contrib/ncsw/inc/core_ext.h
index 022de2b30e5c..ec89a6dde4cd 100644
--- a/sys/contrib/ncsw/inc/core_ext.h
+++ b/sys/contrib/ncsw/inc/core_ext.h
@@ -1,5 +1,5 @@
-/* Copyright (c) 2008-2011 Freescale Semiconductor, Inc.
- * All rights reserved.
+/*
+ * Copyright 2008-2012 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -30,6 +30,7 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+
/**************************************************************************//**
@File core_ext.h
@@ -42,7 +43,10 @@
#ifndef __CORE_EXT_H
#define __CORE_EXT_H
-
+#ifdef CONFIG_FMAN_ARM
+#include "arm_ext.h"
+#include <linux/smp.h>
+#else
#ifdef NCSW_PPC_CORE
#include "ppc_ext.h"
#elif defined(NCSW_VXWORKS)
@@ -55,6 +59,12 @@
#error "Must define core as little-endian or big-endian!"
#endif /* (!defined(CORE_IS_LITTLE_ENDIAN) && ... */
+#ifndef CORE_CACHELINE_SIZE
+#error "Must define the core cache-line size!"
+#endif /* !CORE_CACHELINE_SIZE */
+
+#endif /* CONFIG_FMAN_ARM */
+
/**************************************************************************//**
@Function CORE_GetId
@@ -75,7 +85,6 @@ uint32_t CORE_GetId(void);
@Return None.
*//***************************************************************************/
void CORE_MemoryBarrier(void);
-
+#define fsl_mem_core_barrier() CORE_MemoryBarrier()
#endif /* __CORE_EXT_H */
-