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Diffstat (limited to 'sys/contrib/ncsw/inc')
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diff --git a/sys/contrib/ncsw/inc/Peripherals/bm_ext.h b/sys/contrib/ncsw/inc/Peripherals/bm_ext.h new file mode 100644 index 000000000000..952e95f62e47 --- /dev/null +++ b/sys/contrib/ncsw/inc/Peripherals/bm_ext.h @@ -0,0 +1,664 @@ +/****************************************************************************** + + © 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc. + All rights reserved. + + This is proprietary source code of Freescale Semiconductor Inc., + and its use is subject to the NetComm Device Drivers EULA. + The copyright notice above does not evidence any actual or intended + publication of such source code. + + ALTERNATIVELY, redistribution and use in source and binary forms, with + or without modification, are permitted provided that the following + conditions are met: + * Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + * Neither the name of Freescale Semiconductor nor the + names of its contributors may be used to endorse or promote products + derived from this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + + **************************************************************************/ +/****************************************************************************** + @File bm_ext.h + + @Description BM API +*//***************************************************************************/ +#ifndef __BM_EXT_H +#define __BM_EXT_H + +#include "error_ext.h" +#include "std_ext.h" + + +/**************************************************************************//** + @Group BM_grp Buffer Manager API + + @Description BM API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description This callback type is used when handling pool depletion entry/exit. + + User provides this function. Driver invokes it. + + @Param[in] h_App - User's application descriptor. + @Param[in] in - TRUE when entered depletion state + FALSE when exit the depletion state. + *//***************************************************************************/ +typedef void (t_BmDepletionCallback)(t_Handle h_App, bool in); + +/**************************************************************************//** + @Group BM_lib_grp BM common API + + @Description BM common API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description BM Exceptions +*//***************************************************************************/ +typedef enum e_BmExceptions { + e_BM_EX_INVALID_COMMAND = 0 , /**< Invalid Command Verb Interrupt */ + e_BM_EX_FBPR_THRESHOLD, /**< FBPR Low Watermark Interrupt. */ + e_BM_EX_SINGLE_ECC, /**< Single Bit ECC Error Interrupt. */ + e_BM_EX_MULTI_ECC /**< Multi Bit ECC Error Interrupt */ +} e_BmExceptions; + + +/**************************************************************************//** + @Group BM_init_grp BM (common) Initialization Unit + + @Description BM (common) Initialization Unit + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function t_BmExceptionsCallback + + @Description Exceptions user callback routine, will be called upon an + exception passing the exception identification. + + @Param[in] h_App - User's application descriptor. + @Param[in] exception - The exception. +*//***************************************************************************/ +typedef void (t_BmExceptionsCallback) (t_Handle h_App, + e_BmExceptions exception); + +/**************************************************************************//** + @Description structure representing BM initialization parameters +*//***************************************************************************/ +typedef struct { + uint8_t guestId; /**< BM Partition Id */ + + uintptr_t baseAddress; /**< Bm base address (virtual). + NOTE: this parameter relevant only for BM in master mode ('guestId'=NCSW_MASTER_ID). */ + uint16_t liodn; /**< This value is attached to every transaction initiated by + BMan when accessing its private data structures + NOTE: this parameter relevant only for BM in master mode ('guestId'=NCSW_MASTER_ID). */ + uint32_t totalNumOfBuffers; /**< Total number of buffers + NOTE: this parameter relevant only for BM in master mode ('guestId'=NCSW_MASTER_ID). */ + uint32_t fbprMemPartitionId; /**< FBPR's mem partition id; + NOTE: The memory partition must be non-cacheable and no-coherent area. + NOTE: this parameter relevant only for BM in master mode ('guestId'=NCSW_MASTER_ID). */ + t_BmExceptionsCallback *f_Exception; /**< An application callback routine to handle exceptions. + NOTE: this parameter relevant only for BM in master mode ('guestId'=NCSW_MASTER_ID). */ + t_Handle h_App; /**< A handle to an application layer object; This handle will + be passed by the driver upon calling the above callbacks. + NOTE: this parameter relevant only for BM in master mode ('guestId'=NCSW_MASTER_ID). */ + uintptr_t errIrq; /**< BM error interrupt line; NO_IRQ if interrupts not used. + NOTE: this parameter relevant only for BM in master mode ('guestId'=NCSW_MASTER_ID). */ + + uint8_t partBpidBase; /**< The first buffer-pool-id dedicated to this partition. + NOTE: this parameter relevant only when working with multiple partitions. */ + uint8_t partNumOfPools; /**< Number of Pools dedicated to this partition. + NOTE: this parameter relevant only when working with multiple partitions. */ +} t_BmParam; + + +/**************************************************************************//** + @Function BM_Config + + @Description Creates descriptor for the BM module and initializes the BM module. + + The routine returns a handle (descriptor) to the BM object. + This descriptor must be passed as first parameter to all other + BM function calls. + + @Param[in] p_BmParam - A pointer to data structure of parameters + + @Return Handle to BM object, or NULL for Failure. +*//***************************************************************************/ +t_Handle BM_Config(t_BmParam *p_BmParam); + +/**************************************************************************//** + @Function BM_Init + + @Description Initializes the BM module + + @Param[in] h_Bm - A handle to the BM module + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following BM_Config(). +*//***************************************************************************/ +t_Error BM_Init(t_Handle h_Bm); + +/**************************************************************************//** + @Function BM_Free + + @Description Frees all resources that were assigned to BM module. + + Calling this routine invalidates the descriptor. + + @Param[in] h_Bm - A handle to the BM module + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error BM_Free(t_Handle h_Bm); + +/**************************************************************************//** + @Group BM_advanced_init_grp BM (common) Advanced Configuration Unit + + @Description Configuration functions used to change default values. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function BM_ConfigFbprThreshold + + @Description Change the fbpr threshold from its default + configuration [0]. + An interrupt if enables is asserted when the number of FBPRs is below this threshold. + NOTE: this parameter relevant only for BM in master mode ('guestId'=NCSW_MASTER_ID). + + @Param[in] h_Bm - A handle to the BM module + @Param[in] threshold - threshold value. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following BM_Config() and before BM_Init(). +*//***************************************************************************/ +t_Error BM_ConfigFbprThreshold(t_Handle h_Bm, uint32_t threshold); + +/** @} */ /* end of BM_advanced_init_grp group */ +/** @} */ /* end of BM_init_grp group */ + +/**************************************************************************//** + @Group BM_runtime_control_grp BM (common) Runtime Control Unit + + @Description BM (common) Runtime control unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description enum for defining BM counters +*//***************************************************************************/ +typedef enum e_BmCounters { + e_BM_COUNTERS_FBPR = 0 /**< Total Free Buffer Proxy Record (FBPR) Free Pool Count in external memory */ +} e_BmCounters; + +/**************************************************************************//** + @Description structure for returning revision information +*//***************************************************************************/ +typedef struct t_BmRevisionInfo { + uint8_t majorRev; /**< Major revision */ + uint8_t minorRev; /**< Minor revision */ +} t_BmRevisionInfo; + +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) +/**************************************************************************//** + @Function BM_DumpRegs + + @Description Dumps all BM registers + NOTE: this parameter relevant only for BM in master mode ('guestId'=NCSW_MASTER_ID). + + @Param[in] h_Bm A handle to an BM Module. + + @Return E_OK on success; + + @Cautions Allowed only after BM_Init(). +*//***************************************************************************/ +t_Error BM_DumpRegs(t_Handle h_Bm); +#endif /* (defined(DEBUG_ERRORS) && ... */ + +/**************************************************************************//** + @Function BM_SetException + + @Description Calling this routine enables/disables the specified exception. + NOTE: this parameter relevant only for BM in master mode ('guestId'=NCSW_MASTER_ID). + + @Param[in] h_Bm - A handle to the BM Module. + @Param[in] exception - The exception to be selected. + @Param[in] enable - TRUE to enable interrupt, FALSE to mask it. + + @Cautions Allowed only following BM_Init(). +*//***************************************************************************/ +t_Error BM_SetException(t_Handle h_Bm, e_BmExceptions exception, bool enable); + +/**************************************************************************//** + @Function BM_ErrorIsr + + @Description BM interrupt-service-routine for errors. + NOTE: this parameter relevant only for BM in master mode ('guestId'=NCSW_MASTER_ID). + + @Param[in] h_Bm - A handle to the BM Module. + + @Cautions Allowed only following BM_Init(). +*//***************************************************************************/ +void BM_ErrorIsr(t_Handle h_Bm); + +/**************************************************************************//** + @Function BM_GetCounter + + @Description Reads one of the BM counters. + + @Param[in] h_Bm - A handle to the BM Module. + @Param[in] counter - The requested counter. + + @Return Counter's current value. +*//***************************************************************************/ +uint32_t BM_GetCounter(t_Handle h_Bm, e_BmCounters counter); + +/**************************************************************************//** + @Function BM_GetRevision + + @Description Returns the BM revision + + @Param[in] h_Bm A handle to a BM Module. + @Param[out] p_BmRevisionInfo A structure of revision information parameters. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_Init(). +*//***************************************************************************/ +t_Error BM_GetRevision(t_Handle h_Bm, t_BmRevisionInfo *p_BmRevisionInfo); + +/** @} */ /* end of BM_runtime_control_grp group */ +/** @} */ /* end of BM_lib_grp group */ + + +/**************************************************************************//** + @Group BM_portal_grp BM-Portal API + + @Description BM-Portal API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group BM_portal_init_grp BM-Portal Initialization Unit + + @Description BM-Portal Initialization Unit + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description structure representing BM Portal initialization parameters +*//***************************************************************************/ +typedef struct { + uintptr_t ceBaseAddress; /**< Cache-enabled base address (virtual) */ + uintptr_t ciBaseAddress; /**< Cache-inhibited base address (virtual) */ + t_Handle h_Bm; /**< Bm Handle */ + e_DpaaSwPortal swPortalId; /**< Portal id */ + uintptr_t irq; /**< portal interrupt line; NO_IRQ if interrupts not used */ +} t_BmPortalParam; + + +/**************************************************************************//** + @Function BM_PORTAL_Config + + @Description Creates descriptor for the BM Portal; + + The routine returns a handle (descriptor) to a BM-Portal object; + This descriptor must be passed as first parameter to all other + BM-Portal function calls. + + No actual initialization or configuration of QM-Portal hardware is + done by this routine. + + @Param[in] p_BmPortalParam - Pointer to data structure of parameters + + @Retval Handle to a BM-Portal object, or NULL for Failure. +*//***************************************************************************/ +t_Handle BM_PORTAL_Config(t_BmPortalParam *p_BmPortalParam); + +/**************************************************************************//** + @Function BM_PORTAL_Init + + @Description Initializes a BM-Portal module + + @Param[in] h_BmPortal - A handle to a BM-Portal module + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error BM_PORTAL_Init(t_Handle h_BmPortal); + +/**************************************************************************//** + @Function BM_PortalFree + + @Description Frees all resources that were assigned to BM Portal module. + + Calling this routine invalidates the descriptor. + + @Param[in] h_BmPortal - BM Portal module descriptor + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error BM_PORTAL_Free(t_Handle h_BmPortal); + +/**************************************************************************//** + @Function BM_PORTAL_ConfigMemAttr + + @Description Change the memory attributes + from its default configuration [MEMORY_ATTR_CACHEABLE]. + + @Param[in] h_BmPortal - A handle to a BM-Portal module + @Param[in] hwExtStructsMemAttr - memory attributes (cache/non-cache, etc.) + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following BM_PORTAL_Config() and before BM_PORTAL_Init(). +*//***************************************************************************/ +t_Error BM_PORTAL_ConfigMemAttr(t_Handle h_BmPortal, uint32_t hwExtStructsMemAttr); + +/** @} */ /* end of BM_portal_init_grp group */ +/** @} */ /* end of BM_portal_grp group */ + + +/**************************************************************************//** + @Group BM_pool_grp BM-Pool API + + @Description BM-Pool API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group BM_pool_init_grp BM-Pool Initialization Unit + + @Description BM-Pool Initialization Unit + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Collection BM Pool Depletion Thresholds macros + The thresholds are represent by an array of size MAX_DEPLETION_THRESHOLDS + Use the following macros to access the appropriate location in the array. +*//***************************************************************************/ +#define BM_POOL_DEP_THRESH_SW_ENTRY 0 +#define BM_POOL_DEP_THRESH_SW_EXIT 1 +#define BM_POOL_DEP_THRESH_HW_ENTRY 2 +#define BM_POOL_DEP_THRESH_HW_EXIT 3 + +#define MAX_DEPLETION_THRESHOLDS 4 +/* @} */ + + +/**************************************************************************//** + @Description structure representing BM Pool initialization parameters +*//***************************************************************************/ +typedef struct { + t_Handle h_Bm; /**< A handle to a BM Module. */ + t_Handle h_BmPortal; /**< A handle to a BM Portal Module. + will be used only for Init and Free routines. + NOTE: if NULL, assuming affinity */ + uint32_t numOfBuffers; /**< Number of buffers use by this pool + NOTE: If zero, empty pool buffer is created. */ + t_BufferPoolInfo bufferPoolInfo; /**< Data buffers pool information */ + t_Handle h_App; /**< opaque user value passed as a parameter to callbacks */ + bool shadowMode; /**< If TRUE, numOfBuffers will be set to '0'. */ + uint8_t bpid; /**< index of the shadow buffer pool (0-BM_MAX_NUM_OF_POOLS). + valid only if shadowMode='TRUE'. */ +} t_BmPoolParam; + + +/**************************************************************************//** + @Function BM_POOL_Config + + @Description Creates descriptor for the BM Pool; + + The routine returns a handle (descriptor) to the BM Pool object. + + @Param[in] p_BmPoolParam - A pointer to data structure of parameters + + @Return Handle to BM Portal object, or NULL for Failure. +*//***************************************************************************/ +t_Handle BM_POOL_Config(t_BmPoolParam *p_BmPoolParam); + +/**************************************************************************//** + @Function BM_POOL_Init + + @Description Initializes a BM-Pool module + + @Param[in] h_BmPool - A handle to a BM-Pool module + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error BM_POOL_Init(t_Handle h_BmPool); + +/**************************************************************************//** + @Function BM_PoolFree + + @Description Frees all resources that were assigned to BM Pool module. + + Calling this routine invalidates the descriptor. + + @Param[in] h_BmPool - BM Pool module descriptor + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error BM_POOL_Free(t_Handle h_BmPool); + +/**************************************************************************//** + @Function BM_POOL_ConfigBpid + + @Description Config a specific pool id rather than dynamic pool id. + + @Param[in] h_BmPool - A handle to a BM-Pool module + @Param[in] bpid - index of the buffer pool (0-BM_MAX_NUM_OF_POOLS). + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following BM_POOL_Config() and before BM_POOL_Init(). +*//***************************************************************************/ +t_Error BM_POOL_ConfigBpid(t_Handle h_BmPool, uint8_t bpid); + +/**************************************************************************//** + @Function BM_POOL_ConfigDepletion + + @Description Config depletion-entry/exit thresholds and callback. + + @Param[in] h_BmPool - A handle to a BM-Pool module + @Param[in] f_Depletion - depletion-entry/exit callback. + @Param[in] thresholds - depletion-entry/exit thresholds. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following BM_POOL_Config() and before BM_POOL_Init(); + Allowed only if shadowMode='FALSE'. + Allowed only if BM in master mode ('guestId'=NCSW_MASTER_ID), or + the BM is in guest mode BUT than this routine will invoke IPC + call to the master. +*//***************************************************************************/ +t_Error BM_POOL_ConfigDepletion(t_Handle h_BmPool, + t_BmDepletionCallback *f_Depletion, + uint32_t thresholds[MAX_DEPLETION_THRESHOLDS]); + +/**************************************************************************//** + @Function BM_POOL_ConfigStockpile + + @Description Config software stockpile. + + @Param[in] h_BmPool - A handle to a BM-Pool module + @Param[in] maxBuffers - the software data structure size saved for stockpile; + when reached this value, release to hw command performed. + @Param[in] minBuffers - if current capacity is equal or lower then this value, + acquire from hw command performed. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following BM_POOL_Config() and before BM_POOL_Init(). +*//***************************************************************************/ +t_Error BM_POOL_ConfigStockpile(t_Handle h_BmPool, uint16_t maxBuffers, uint16_t minBuffers); + +/**************************************************************************//** + @Function BM_POOL_ConfigBuffContextMode + + @Description Config the BM pool to set/unset buffer-context + + @Param[in] h_BmPool - A handle to a BM-Pool module + @Param[in] en - enable/disable buffer context mode + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following BM_POOL_Config() and before BM_POOL_Init(). +*//***************************************************************************/ +t_Error BM_POOL_ConfigBuffContextMode(t_Handle h_BmPool, bool en); + +/** @} */ /* end of BM_pool_init_grp group */ + + +/**************************************************************************//** + @Group BM_pool_runtime_control_grp BM-Pool Runtime Control Unit + + @Description BM-Pool Runtime control unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description enum for defining BM Pool counters +*//***************************************************************************/ +typedef enum e_BmPoolCounters { + e_BM_POOL_COUNTERS_CONTENT = 0, /**< number of free buffers for a particular pool */ + e_BM_POOL_COUNTERS_SW_DEPLETION, /**< number of times pool entered sw depletion */ + e_BM_POOL_COUNTERS_HW_DEPLETION /**< number of times pool entered hw depletion */ +} e_BmPoolCounters; + +/**************************************************************************//** + @Function BM_POOL_GetId + + @Description return a buffer pool id. + + @Param[in] h_BmPool - A handle to a BM-pool + + @Return Pool ID. +*//***************************************************************************/ +uint8_t BM_POOL_GetId(t_Handle h_BmPool); + +/**************************************************************************//** + @Function BM_POOL_GetBufferSize + + @Description returns the pool's buffer size. + + @Param[in] h_BmPool - A handle to a BM-pool + + @Return pool's buffer size. +*//***************************************************************************/ +uint16_t BM_POOL_GetBufferSize(t_Handle h_BmPool); + +/**************************************************************************//** + @Function BM_POOL_GetBufferContext + + @Description Returns the user's private context that + should be associated with the buffer. + + @Param[in] h_BmPool - A handle to a BM-pool + @Param[in] p_Buff - A Pointer to the buffer + + @Return user's private context. +*//***************************************************************************/ +t_Handle BM_POOL_GetBufferContext(t_Handle h_BmPool, void *p_Buff); + +/**************************************************************************//** + @Function BM_POOL_GetCounter + + @Description Reads one of the BM Pool counters. + + @Param[in] h_BmPool - A handle to a BM-pool + @Param[in] counter - The requested counter. + + @Return Counter's current value. +*//***************************************************************************/ +uint32_t BM_POOL_GetCounter(t_Handle h_BmPool, e_BmPoolCounters counter); + +/** @} */ /* end of BM_pool_runtime_control_grp group */ + + +/**************************************************************************//** + @Group BM_pool_runtime_data_grp BM-Pool Runtime Data Unit + + @Description BM-Pool Runtime data unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function BM_POOL_GetBuf + + @Description Allocate buffer from a buffer pool. + + @Param[in] h_BmPool - A handle to a BM-pool + @Param[in] h_BmPortal - A handle to a BM Portal Module; + NOTE : if NULL, assuming affinity. + + @Return A Pointer to the allocated buffer. +*//***************************************************************************/ +void * BM_POOL_GetBuf(t_Handle h_BmPool, t_Handle h_BmPortal); + +/**************************************************************************//** + @Function BM_POOL_PutBuf + + @Description Deallocate buffer to a buffer pool. + + @Param[in] h_BmPool - A handle to a BM-pool + @Param[in] h_BmPortal - A handle to a BM Portal Module; + NOTE : if NULL, assuming affinity. + @Param[in] p_Buff - A Pointer to the buffer. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error BM_POOL_PutBuf(t_Handle h_BmPool, t_Handle h_BmPortal, void *p_Buff); + +/**************************************************************************//** + @Function BM_POOL_FillBufs + + @Description Fill a BM pool with new buffers. + + @Param[in] h_BmPool - A handle to a BM-pool + @Param[in] h_BmPortal - A handle to a BM Portal Module; + NOTE : if NULL, assuming affinity. + @Param[in] numBufs - How many buffers to fill into the pool. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error BM_POOL_FillBufs(t_Handle h_BmPool, t_Handle h_BmPortal, uint32_t numBufs); + +/** @} */ /* end of BM_pool_runtime_data_grp group */ +/** @} */ /* end of BM_pool_grp group */ +/** @} */ /* end of BM_grp group */ + +#endif /* __BM_EXT_H */ diff --git a/sys/contrib/ncsw/inc/Peripherals/crc_mac_addr_ext.h b/sys/contrib/ncsw/inc/Peripherals/crc_mac_addr_ext.h new file mode 100644 index 000000000000..a84d563116c6 --- /dev/null +++ b/sys/contrib/ncsw/inc/Peripherals/crc_mac_addr_ext.h @@ -0,0 +1,364 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/*------------------------------------------------------*/ +/* */ +/* File: crc_mac_addr_ext.h */ +/* */ +/* Description: */ +/* Define a macro that calculate the crc value of */ +/* an Ethernet MAC address (48 bitd address */ +/*------------------------------------------------------*/ + +#ifndef __crc_mac_addr_ext_h +#define __crc_mac_addr_ext_h + +#include "std_ext.h" + + +static uint32_t crc_table[256] = +{ + 0x00000000, + 0x77073096, + 0xee0e612c, + 0x990951ba, + 0x076dc419, + 0x706af48f, + 0xe963a535, + 0x9e6495a3, + 0x0edb8832, + 0x79dcb8a4, + 0xe0d5e91e, + 0x97d2d988, + 0x09b64c2b, + 0x7eb17cbd, + 0xe7b82d07, + 0x90bf1d91, + 0x1db71064, + 0x6ab020f2, + 0xf3b97148, + 0x84be41de, + 0x1adad47d, + 0x6ddde4eb, + 0xf4d4b551, + 0x83d385c7, + 0x136c9856, + 0x646ba8c0, + 0xfd62f97a, + 0x8a65c9ec, + 0x14015c4f, + 0x63066cd9, + 0xfa0f3d63, + 0x8d080df5, + 0x3b6e20c8, + 0x4c69105e, + 0xd56041e4, + 0xa2677172, + 0x3c03e4d1, + 0x4b04d447, + 0xd20d85fd, + 0xa50ab56b, + 0x35b5a8fa, + 0x42b2986c, + 0xdbbbc9d6, + 0xacbcf940, + 0x32d86ce3, + 0x45df5c75, + 0xdcd60dcf, + 0xabd13d59, + 0x26d930ac, + 0x51de003a, + 0xc8d75180, + 0xbfd06116, + 0x21b4f4b5, + 0x56b3c423, + 0xcfba9599, + 0xb8bda50f, + 0x2802b89e, + 0x5f058808, + 0xc60cd9b2, + 0xb10be924, + 0x2f6f7c87, + 0x58684c11, + 0xc1611dab, + 0xb6662d3d, + 0x76dc4190, + 0x01db7106, + 0x98d220bc, + 0xefd5102a, + 0x71b18589, + 0x06b6b51f, + 0x9fbfe4a5, + 0xe8b8d433, + 0x7807c9a2, + 0x0f00f934, + 0x9609a88e, + 0xe10e9818, + 0x7f6a0dbb, + 0x086d3d2d, + 0x91646c97, + 0xe6635c01, + 0x6b6b51f4, + 0x1c6c6162, + 0x856530d8, + 0xf262004e, + 0x6c0695ed, + 0x1b01a57b, + 0x8208f4c1, + 0xf50fc457, + 0x65b0d9c6, + 0x12b7e950, + 0x8bbeb8ea, + 0xfcb9887c, + 0x62dd1ddf, + 0x15da2d49, + 0x8cd37cf3, + 0xfbd44c65, + 0x4db26158, + 0x3ab551ce, + 0xa3bc0074, + 0xd4bb30e2, + 0x4adfa541, + 0x3dd895d7, + 0xa4d1c46d, + 0xd3d6f4fb, + 0x4369e96a, + 0x346ed9fc, + 0xad678846, + 0xda60b8d0, + 0x44042d73, + 0x33031de5, + 0xaa0a4c5f, + 0xdd0d7cc9, + 0x5005713c, + 0x270241aa, + 0xbe0b1010, + 0xc90c2086, + 0x5768b525, + 0x206f85b3, + 0xb966d409, + 0xce61e49f, + 0x5edef90e, + 0x29d9c998, + 0xb0d09822, + 0xc7d7a8b4, + 0x59b33d17, + 0x2eb40d81, + 0xb7bd5c3b, + 0xc0ba6cad, + 0xedb88320, + 0x9abfb3b6, + 0x03b6e20c, + 0x74b1d29a, + 0xead54739, + 0x9dd277af, + 0x04db2615, + 0x73dc1683, + 0xe3630b12, + 0x94643b84, + 0x0d6d6a3e, + 0x7a6a5aa8, + 0xe40ecf0b, + 0x9309ff9d, + 0x0a00ae27, + 0x7d079eb1, + 0xf00f9344, + 0x8708a3d2, + 0x1e01f268, + 0x6906c2fe, + 0xf762575d, + 0x806567cb, + 0x196c3671, + 0x6e6b06e7, + 0xfed41b76, + 0x89d32be0, + 0x10da7a5a, + 0x67dd4acc, + 0xf9b9df6f, + 0x8ebeeff9, + 0x17b7be43, + 0x60b08ed5, + 0xd6d6a3e8, + 0xa1d1937e, + 0x38d8c2c4, + 0x4fdff252, + 0xd1bb67f1, + 0xa6bc5767, + 0x3fb506dd, + 0x48b2364b, + 0xd80d2bda, + 0xaf0a1b4c, + 0x36034af6, + 0x41047a60, + 0xdf60efc3, + 0xa867df55, + 0x316e8eef, + 0x4669be79, + 0xcb61b38c, + 0xbc66831a, + 0x256fd2a0, + 0x5268e236, + 0xcc0c7795, + 0xbb0b4703, + 0x220216b9, + 0x5505262f, + 0xc5ba3bbe, + 0xb2bd0b28, + 0x2bb45a92, + 0x5cb36a04, + 0xc2d7ffa7, + 0xb5d0cf31, + 0x2cd99e8b, + 0x5bdeae1d, + 0x9b64c2b0, + 0xec63f226, + 0x756aa39c, + 0x026d930a, + 0x9c0906a9, + 0xeb0e363f, + 0x72076785, + 0x05005713, + 0x95bf4a82, + 0xe2b87a14, + 0x7bb12bae, + 0x0cb61b38, + 0x92d28e9b, + 0xe5d5be0d, + 0x7cdcefb7, + 0x0bdbdf21, + 0x86d3d2d4, + 0xf1d4e242, + 0x68ddb3f8, + 0x1fda836e, + 0x81be16cd, + 0xf6b9265b, + 0x6fb077e1, + 0x18b74777, + 0x88085ae6, + 0xff0f6a70, + 0x66063bca, + 0x11010b5c, + 0x8f659eff, + 0xf862ae69, + 0x616bffd3, + 0x166ccf45, + 0xa00ae278, + 0xd70dd2ee, + 0x4e048354, + 0x3903b3c2, + 0xa7672661, + 0xd06016f7, + 0x4969474d, + 0x3e6e77db, + 0xaed16a4a, + 0xd9d65adc, + 0x40df0b66, + 0x37d83bf0, + 0xa9bcae53, + 0xdebb9ec5, + 0x47b2cf7f, + 0x30b5ffe9, + 0xbdbdf21c, + 0xcabac28a, + 0x53b39330, + 0x24b4a3a6, + 0xbad03605, + 0xcdd70693, + 0x54de5729, + 0x23d967bf, + 0xb3667a2e, + 0xc4614ab8, + 0x5d681b02, + 0x2a6f2b94, + 0xb40bbe37, + 0xc30c8ea1, + 0x5a05df1b, + 0x2d02ef8d +}; + + +#define GET_MAC_ADDR_CRC(addr, crc) \ +{ \ + uint32_t i; \ + uint8_t data; \ + \ + /* CRC calculation */ \ + crc = 0xffffffff; \ + for (i=0; i < 6; i++) \ + { \ + data = (uint8_t)(addr >> ((5-i)*8)); \ + crc = crc^data; \ + crc = crc_table[crc&0xff] ^ (crc>>8); \ + } \ +} \ + +/* Define a macro for getting the mirrored value of */ +/* a byte size number. (0x11010011 --> 0x11001011) */ +/* Sometimes the mirrored value of the CRC is required */ +static __inline__ uint8_t GetMirror(uint8_t n) +{ + uint8_t mirror[16] = + { + 0x00, + 0x08, + 0x04, + 0x0c, + 0x02, + 0x0a, + 0x06, + 0x0e, + 0x01, + 0x09, + 0x05, + 0x0d, + 0x03, + 0x0b, + 0x07, + 0x0f + }; + return ((uint8_t)(((mirror[n & 0x0f] << 4) | (mirror[n >> 4])))); +} + +static __inline__ uint32_t GetMirror32(uint32_t n) +{ + return (((uint32_t)GetMirror((uint8_t)(n))<<24) | + ((uint32_t)GetMirror((uint8_t)(n>>8))<<16) | + ((uint32_t)GetMirror((uint8_t)(n>>16))<<8) | + ((uint32_t)GetMirror((uint8_t)(n>>24)))); +} + +#define MIRROR GetMirror +#define MIRROR_32 GetMirror32 + + +#endif /* __crc_mac_addr_ext_h */ diff --git a/sys/contrib/ncsw/inc/Peripherals/dpaa_ext.h b/sys/contrib/ncsw/inc/Peripherals/dpaa_ext.h new file mode 100644 index 000000000000..e7c0c131fda3 --- /dev/null +++ b/sys/contrib/ncsw/inc/Peripherals/dpaa_ext.h @@ -0,0 +1,219 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File dpaa_ext.h + + @Description DPAA Application Programming Interface. +*//***************************************************************************/ +#ifndef __DPAA_EXT_H +#define __DPAA_EXT_H + +#include "std_ext.h" +#include "error_ext.h" + + +/**************************************************************************//** + @Group DPAA_grp Data Path Acceleration Architecture API + + @Description DPAA API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +#if defined(__MWERKS__) && !defined(__GNUC__) +#pragma pack(push,1) +#endif /* defined(__MWERKS__) && ... */ + +#include <machine/endian.h> + +#ifndef __BYTE_ORDER__ +#define __BYTE_ORDER__ BYTE_ORDER +#endif +#ifndef __ORDER_BIG_ENDIAN__ +#define __ORDER_BIG_ENDIAN__ BIG_ENDIAN +#endif + +/**************************************************************************//** + @Description Frame descriptor +*//***************************************************************************/ +typedef _Packed struct t_DpaaFD { +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ + volatile uint8_t liodn; + volatile uint8_t bpid; + volatile uint8_t elion; + volatile uint8_t addrh; + volatile uint32_t addrl; +#else + volatile uint32_t addrl; + volatile uint8_t addrh; + volatile uint8_t elion; + volatile uint8_t bpid; + volatile uint8_t liodn; + #endif + volatile uint32_t length; /**< Frame length */ + volatile uint32_t status; /**< FD status */ +} _PackedType t_DpaaFD; + +/**************************************************************************//** + @Description enum for defining frame format +*//***************************************************************************/ +typedef enum e_DpaaFDFormatType { + e_DPAA_FD_FORMAT_TYPE_SHORT_SBSF = 0x0, /**< Simple frame Single buffer; Offset and + small length (9b OFFSET, 20b LENGTH) */ + e_DPAA_FD_FORMAT_TYPE_LONG_SBSF = 0x2, /**< Simple frame, single buffer; big length + (29b LENGTH ,No OFFSET) */ + e_DPAA_FD_FORMAT_TYPE_SHORT_MBSF = 0x4, /**< Simple frame, Scatter Gather table; Offset + and small length (9b OFFSET, 20b LENGTH) */ + e_DPAA_FD_FORMAT_TYPE_LONG_MBSF = 0x6, /**< Simple frame, Scatter Gather table; + big length (29b LENGTH ,No OFFSET) */ + e_DPAA_FD_FORMAT_TYPE_COMPOUND = 0x1, /**< Compound Frame (29b CONGESTION-WEIGHT + No LENGTH or OFFSET) */ + e_DPAA_FD_FORMAT_TYPE_DUMMY +} e_DpaaFDFormatType; + +/**************************************************************************//** + @Collection Frame descriptor macros +*//***************************************************************************/ +#define DPAA_FD_DD_MASK 0xc0000000 /**< FD DD field mask */ +#define DPAA_FD_PID_MASK 0x3f000000 /**< FD PID field mask */ +#define DPAA_FD_ELIODN_MASK 0x0000f000 /**< FD ELIODN field mask */ +#define DPAA_FD_BPID_MASK 0x00ff0000 /**< FD BPID field mask */ +#define DPAA_FD_ADDRH_MASK 0x000000ff /**< FD ADDRH field mask */ +#define DPAA_FD_ADDRL_MASK 0xffffffff /**< FD ADDRL field mask */ +#define DPAA_FD_FORMAT_MASK 0xe0000000 /**< FD FORMAT field mask */ +#define DPAA_FD_OFFSET_MASK 0x1ff00000 /**< FD OFFSET field mask */ +#define DPAA_FD_LENGTH_MASK 0x000fffff /**< FD LENGTH field mask */ + +#define DPAA_FD_GET_ADDRH(fd) ((t_DpaaFD *)fd)->addrh /**< Macro to get FD ADDRH field */ +#define DPAA_FD_GET_ADDRL(fd) ((t_DpaaFD *)fd)->addrl /**< Macro to get FD ADDRL field */ +#define DPAA_FD_GET_PHYS_ADDR(fd) ((physAddress_t)(((uint64_t)DPAA_FD_GET_ADDRH(fd) << 32) | (uint64_t)DPAA_FD_GET_ADDRL(fd))) /**< Macro to get FD ADDR field */ +#define DPAA_FD_GET_FORMAT(fd) ((((t_DpaaFD *)fd)->length & DPAA_FD_FORMAT_MASK) >> (31-2)) /**< Macro to get FD FORMAT field */ +#define DPAA_FD_GET_OFFSET(fd) ((((t_DpaaFD *)fd)->length & DPAA_FD_OFFSET_MASK) >> (31-11)) /**< Macro to get FD OFFSET field */ +#define DPAA_FD_GET_LENGTH(fd) (((t_DpaaFD *)fd)->length & DPAA_FD_LENGTH_MASK) /**< Macro to get FD LENGTH field */ +#define DPAA_FD_GET_STATUS(fd) ((t_DpaaFD *)fd)->status /**< Macro to get FD STATUS field */ +#define DPAA_FD_GET_ADDR(fd) XX_PhysToVirt(DPAA_FD_GET_PHYS_ADDR(fd)) /**< Macro to get FD ADDR (virtual) */ + +#define DPAA_FD_SET_ADDRH(fd,val) ((t_DpaaFD *)fd)->addrh = (val) /**< Macro to set FD ADDRH field */ +#define DPAA_FD_SET_ADDRL(fd,val) ((t_DpaaFD *)fd)->addrl = (val) /**< Macro to set FD ADDRL field */ +#define DPAA_FD_SET_ADDR(fd,val) \ +do { \ + uint64_t physAddr = (uint64_t)(XX_VirtToPhys(val)); \ + DPAA_FD_SET_ADDRH(fd, ((uint32_t)(physAddr >> 32))); \ + DPAA_FD_SET_ADDRL(fd, (uint32_t)physAddr); \ +} while (0) /**< Macro to set FD ADDR field */ +#define DPAA_FD_SET_FORMAT(fd,val) (((t_DpaaFD *)fd)->length = ((((t_DpaaFD *)fd)->length & ~DPAA_FD_FORMAT_MASK) | (((val) << (31-2))& DPAA_FD_FORMAT_MASK))) /**< Macro to set FD FORMAT field */ +#define DPAA_FD_SET_OFFSET(fd,val) (((t_DpaaFD *)fd)->length = ((((t_DpaaFD *)fd)->length & ~DPAA_FD_OFFSET_MASK) | (((val) << (31-11))& DPAA_FD_OFFSET_MASK) )) /**< Macro to set FD OFFSET field */ +#define DPAA_FD_SET_LENGTH(fd,val) (((t_DpaaFD *)fd)->length = (((t_DpaaFD *)fd)->length & ~DPAA_FD_LENGTH_MASK) | ((val) & DPAA_FD_LENGTH_MASK)) /**< Macro to set FD LENGTH field */ +#define DPAA_FD_SET_STATUS(fd,val) ((t_DpaaFD *)fd)->status = (val) /**< Macro to set FD STATUS field */ +/* @} */ + +/**************************************************************************//** + @Description Frame Scatter/Gather Table Entry +*//***************************************************************************/ +typedef _Packed struct t_DpaaSGTE { + volatile uint32_t addrh; /**< Buffer Address high */ + volatile uint32_t addrl; /**< Buffer Address low */ + volatile uint32_t length; /**< Buffer length */ + volatile uint32_t offset; /**< SGTE offset */ +} _PackedType t_DpaaSGTE; + +#define DPAA_NUM_OF_SG_TABLE_ENTRY 16 + +/**************************************************************************//** + @Description Frame Scatter/Gather Table +*//***************************************************************************/ +typedef _Packed struct t_DpaaSGT { + t_DpaaSGTE tableEntry[DPAA_NUM_OF_SG_TABLE_ENTRY]; + /**< Structure that holds information about + a single S/G entry. */ +} _PackedType t_DpaaSGT; + +/**************************************************************************//** + @Description Compound Frame Table +*//***************************************************************************/ +typedef _Packed struct t_DpaaCompTbl { + t_DpaaSGTE outputBuffInfo; /**< Structure that holds information about + the compound-frame output buffer; + NOTE: this may point to a S/G table */ + t_DpaaSGTE inputBuffInfo; /**< Structure that holds information about + the compound-frame input buffer; + NOTE: this may point to a S/G table */ +} _PackedType t_DpaaCompTbl; + +/**************************************************************************//** + @Collection Frame Scatter/Gather Table Entry macros +*//***************************************************************************/ +#define DPAA_SGTE_ADDRH_MASK 0x000000ff /**< SGTE ADDRH field mask */ +#define DPAA_SGTE_ADDRL_MASK 0xffffffff /**< SGTE ADDRL field mask */ +#define DPAA_SGTE_E_MASK 0x80000000 /**< SGTE Extension field mask */ +#define DPAA_SGTE_F_MASK 0x40000000 /**< SGTE Final field mask */ +#define DPAA_SGTE_LENGTH_MASK 0x3fffffff /**< SGTE LENGTH field mask */ +#define DPAA_SGTE_BPID_MASK 0x00ff0000 /**< SGTE BPID field mask */ +#define DPAA_SGTE_OFFSET_MASK 0x00001fff /**< SGTE OFFSET field mask */ + +#define DPAA_SGTE_GET_ADDRH(sgte) (((t_DpaaSGTE *)sgte)->addrh & DPAA_SGTE_ADDRH_MASK) /**< Macro to get SGTE ADDRH field */ +#define DPAA_SGTE_GET_ADDRL(sgte) ((t_DpaaSGTE *)sgte)->addrl /**< Macro to get SGTE ADDRL field */ +#define DPAA_SGTE_GET_PHYS_ADDR(sgte) ((physAddress_t)(((uint64_t)DPAA_SGTE_GET_ADDRH(sgte) << 32) | (uint64_t)DPAA_SGTE_GET_ADDRL(sgte))) /**< Macro to get FD ADDR field */ +#define DPAA_SGTE_GET_EXTENSION(sgte) ((((t_DpaaSGTE *)sgte)->length & DPAA_SGTE_E_MASK) >> (31-0)) /**< Macro to get SGTE EXTENSION field */ +#define DPAA_SGTE_GET_FINAL(sgte) ((((t_DpaaSGTE *)sgte)->length & DPAA_SGTE_F_MASK) >> (31-1)) /**< Macro to get SGTE FINAL field */ +#define DPAA_SGTE_GET_LENGTH(sgte) (((t_DpaaSGTE *)sgte)->length & DPAA_SGTE_LENGTH_MASK) /**< Macro to get SGTE LENGTH field */ +#define DPAA_SGTE_GET_BPID(sgte) ((((t_DpaaSGTE *)sgte)->offset & DPAA_SGTE_BPID_MASK) >> (31-15)) /**< Macro to get SGTE BPID field */ +#define DPAA_SGTE_GET_OFFSET(sgte) (((t_DpaaSGTE *)sgte)->offset & DPAA_SGTE_OFFSET_MASK) /**< Macro to get SGTE OFFSET field */ +#define DPAA_SGTE_GET_ADDR(sgte) XX_PhysToVirt(DPAA_SGTE_GET_PHYS_ADDR(sgte)) + +#define DPAA_SGTE_SET_ADDRH(sgte,val) (((t_DpaaSGTE *)sgte)->addrh = ((((t_DpaaSGTE *)sgte)->addrh & ~DPAA_SGTE_ADDRH_MASK) | ((val) & DPAA_SGTE_ADDRH_MASK))) /**< Macro to set SGTE ADDRH field */ +#define DPAA_SGTE_SET_ADDRL(sgte,val) ((t_DpaaSGTE *)sgte)->addrl = (val) /**< Macro to set SGTE ADDRL field */ +#define DPAA_SGTE_SET_ADDR(sgte,val) \ +do { \ + uint64_t physAddr = (uint64_t)(XX_VirtToPhys(val)); \ + DPAA_SGTE_SET_ADDRH(sgte, ((uint32_t)(physAddr >> 32))); \ + DPAA_SGTE_SET_ADDRL(sgte, (uint32_t)physAddr); \ +} while (0) /**< Macro to set SGTE ADDR field */ +#define DPAA_SGTE_SET_EXTENSION(sgte,val) (((t_DpaaSGTE *)sgte)->length = ((((t_DpaaSGTE *)sgte)->length & ~DPAA_SGTE_E_MASK) | (((val) << (31-0))& DPAA_SGTE_E_MASK))) /**< Macro to set SGTE EXTENSION field */ +#define DPAA_SGTE_SET_FINAL(sgte,val) (((t_DpaaSGTE *)sgte)->length = ((((t_DpaaSGTE *)sgte)->length & ~DPAA_SGTE_F_MASK) | (((val) << (31-1))& DPAA_SGTE_F_MASK))) /**< Macro to set SGTE FINAL field */ +#define DPAA_SGTE_SET_LENGTH(sgte,val) (((t_DpaaSGTE *)sgte)->length = (((t_DpaaSGTE *)sgte)->length & ~DPAA_SGTE_LENGTH_MASK) | ((val) & DPAA_SGTE_LENGTH_MASK)) /**< Macro to set SGTE LENGTH field */ +#define DPAA_SGTE_SET_BPID(sgte,val) (((t_DpaaSGTE *)sgte)->offset = ((((t_DpaaSGTE *)sgte)->offset & ~DPAA_SGTE_BPID_MASK) | (((val) << (31-15))& DPAA_SGTE_BPID_MASK))) /**< Macro to set SGTE BPID field */ +#define DPAA_SGTE_SET_OFFSET(sgte,val) (((t_DpaaSGTE *)sgte)->offset = ((((t_DpaaSGTE *)sgte)->offset & ~DPAA_SGTE_OFFSET_MASK) | (((val) << (31-31))& DPAA_SGTE_OFFSET_MASK) )) /**< Macro to set SGTE OFFSET field */ +/* @} */ + +#if defined(__MWERKS__) && !defined(__GNUC__) +#pragma pack(pop) +#endif /* defined(__MWERKS__) && ... */ + +#define DPAA_LIODN_DONT_OVERRIDE (-1) + +/** @} */ /* end of DPAA_grp group */ + + +#endif /* __DPAA_EXT_H */ diff --git a/sys/contrib/ncsw/inc/Peripherals/fm_ext.h b/sys/contrib/ncsw/inc/Peripherals/fm_ext.h new file mode 100644 index 000000000000..c3633592694c --- /dev/null +++ b/sys/contrib/ncsw/inc/Peripherals/fm_ext.h @@ -0,0 +1,1731 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File fm_ext.h + + @Description FM Application Programming Interface. +*//***************************************************************************/ +#ifndef __FM_EXT +#define __FM_EXT + +#include "error_ext.h" +#include "std_ext.h" +#include "dpaa_ext.h" +#include "fsl_fman_sp.h" + +/**************************************************************************//** + @Group FM_grp Frame Manager API + + @Description FM API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group FM_lib_grp FM library + + @Description FM API functions, definitions and enums. + + The FM module is the main driver module and is a mandatory module + for FM driver users. This module must be initialized first prior + to any other drivers modules. + The FM is a "singleton" module. It is responsible of the common + HW modules: FPM, DMA, common QMI and common BMI initializations and + run-time control routines. This module must be initialized always + when working with any of the FM modules. + NOTE - We assume that the FM library will be initialized only by core No. 0! + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description Enum for defining port types +*//***************************************************************************/ +typedef enum e_FmPortType { + e_FM_PORT_TYPE_OH_OFFLINE_PARSING = 0, /**< Offline parsing port */ + e_FM_PORT_TYPE_RX, /**< 1G Rx port */ + e_FM_PORT_TYPE_RX_10G, /**< 10G Rx port */ + e_FM_PORT_TYPE_TX, /**< 1G Tx port */ + e_FM_PORT_TYPE_TX_10G, /**< 10G Tx port */ + e_FM_PORT_TYPE_DUMMY +} e_FmPortType; + +/**************************************************************************//** + @Collection General FM defines +*//***************************************************************************/ +#define FM_MAX_NUM_OF_PARTITIONS 64 /**< Maximum number of partitions */ +#define FM_PHYS_ADDRESS_SIZE 6 /**< FM Physical address size */ +/* @} */ + + +#if defined(__MWERKS__) && !defined(__GNUC__) +#pragma pack(push,1) +#endif /* defined(__MWERKS__) && ... */ + +/**************************************************************************//** + @Description FM physical Address +*//***************************************************************************/ +typedef _Packed struct t_FmPhysAddr { + volatile uint8_t high; /**< High part of the physical address */ + volatile uint32_t low; /**< Low part of the physical address */ +} _PackedType t_FmPhysAddr; + +/**************************************************************************//** + @Description Parse results memory layout +*//***************************************************************************/ +typedef _Packed struct t_FmPrsResult { + volatile uint8_t lpid; /**< Logical port id */ + volatile uint8_t shimr; /**< Shim header result */ + volatile uint16_t l2r; /**< Layer 2 result */ + volatile uint16_t l3r; /**< Layer 3 result */ + volatile uint8_t l4r; /**< Layer 4 result */ + volatile uint8_t cplan; /**< Classification plan id */ + volatile uint16_t nxthdr; /**< Next Header */ + volatile uint16_t cksum; /**< Running-sum */ + volatile uint16_t flags_frag_off; /**< Flags & fragment-offset field of the last IP-header */ + volatile uint8_t route_type; /**< Routing type field of a IPv6 routing extension header */ + volatile uint8_t rhp_ip_valid; /**< Routing Extension Header Present; last bit is IP valid */ + volatile uint8_t shim_off[2]; /**< Shim offset */ + volatile uint8_t ip_pid_off; /**< IP PID (last IP-proto) offset */ + volatile uint8_t eth_off; /**< ETH offset */ + volatile uint8_t llc_snap_off; /**< LLC_SNAP offset */ + volatile uint8_t vlan_off[2]; /**< VLAN offset */ + volatile uint8_t etype_off; /**< ETYPE offset */ + volatile uint8_t pppoe_off; /**< PPP offset */ + volatile uint8_t mpls_off[2]; /**< MPLS offset */ + volatile uint8_t ip_off[2]; /**< IP offset */ + volatile uint8_t gre_off; /**< GRE offset */ + volatile uint8_t l4_off; /**< Layer 4 offset */ + volatile uint8_t nxthdr_off; /**< Parser end point */ +} _PackedType t_FmPrsResult; + +/**************************************************************************//** + @Collection FM Parser results +*//***************************************************************************/ +#define FM_PR_L2_VLAN_STACK 0x00000100 /**< Parse Result: VLAN stack */ +#define FM_PR_L2_ETHERNET 0x00008000 /**< Parse Result: Ethernet*/ +#define FM_PR_L2_VLAN 0x00004000 /**< Parse Result: VLAN */ +#define FM_PR_L2_LLC_SNAP 0x00002000 /**< Parse Result: LLC_SNAP */ +#define FM_PR_L2_MPLS 0x00001000 /**< Parse Result: MPLS */ +#define FM_PR_L2_PPPoE 0x00000800 /**< Parse Result: PPPoE */ +/* @} */ + +/**************************************************************************//** + @Collection FM Frame descriptor macros +*//***************************************************************************/ +#define FM_FD_CMD_FCO 0x80000000 /**< Frame queue Context Override */ +#define FM_FD_CMD_RPD 0x40000000 /**< Read Prepended Data */ +#define FM_FD_CMD_UPD 0x20000000 /**< Update Prepended Data */ +#define FM_FD_CMD_DTC 0x10000000 /**< Do L4 Checksum */ +#define FM_FD_CMD_DCL4C 0x10000000 /**< Didn't calculate L4 Checksum */ +#define FM_FD_CMD_CFQ 0x00ffffff /**< Confirmation Frame Queue */ + +#define FM_FD_ERR_UNSUPPORTED_FORMAT 0x04000000 /**< Not for Rx-Port! Unsupported Format */ +#define FM_FD_ERR_LENGTH 0x02000000 /**< Not for Rx-Port! Length Error */ +#define FM_FD_ERR_DMA 0x01000000 /**< DMA Data error */ + +#define FM_FD_IPR 0x00000001 /**< IPR frame (not error) */ + +#define FM_FD_ERR_IPR_NCSP (0x00100000 | FM_FD_IPR) /**< IPR non-consistent-sp */ +#define FM_FD_ERR_IPR (0x00200000 | FM_FD_IPR) /**< IPR error */ +#define FM_FD_ERR_IPR_TO (0x00300000 | FM_FD_IPR) /**< IPR timeout */ + +#ifdef FM_CAPWAP_SUPPORT +#define FM_FD_ERR_CRE 0x00200000 +#define FM_FD_ERR_CHE 0x00100000 +#endif /* FM_CAPWAP_SUPPORT */ + +#define FM_FD_ERR_PHYSICAL 0x00080000 /**< Rx FIFO overflow, FCS error, code error, running disparity + error (SGMII and TBI modes), FIFO parity error. PHY + Sequence error, PHY error control character detected. */ +#define FM_FD_ERR_SIZE 0x00040000 /**< Frame too long OR Frame size exceeds max_length_frame */ +#define FM_FD_ERR_CLS_DISCARD 0x00020000 /**< classification discard */ +#define FM_FD_ERR_EXTRACTION 0x00008000 /**< Extract Out of Frame */ +#define FM_FD_ERR_NO_SCHEME 0x00004000 /**< No Scheme Selected */ +#define FM_FD_ERR_KEYSIZE_OVERFLOW 0x00002000 /**< Keysize Overflow */ +#define FM_FD_ERR_COLOR_RED 0x00000800 /**< Frame color is red */ +#define FM_FD_ERR_COLOR_YELLOW 0x00000400 /**< Frame color is yellow */ +#define FM_FD_ERR_ILL_PLCR 0x00000200 /**< Illegal Policer Profile selected */ +#define FM_FD_ERR_PLCR_FRAME_LEN 0x00000100 /**< Policer frame length error */ +#define FM_FD_ERR_PRS_TIMEOUT 0x00000080 /**< Parser Time out Exceed */ +#define FM_FD_ERR_PRS_ILL_INSTRUCT 0x00000040 /**< Invalid Soft Parser instruction */ +#define FM_FD_ERR_PRS_HDR_ERR 0x00000020 /**< Header error was identified during parsing */ +#define FM_FD_ERR_BLOCK_LIMIT_EXCEEDED 0x00000008 /**< Frame parsed beyind 256 first bytes */ + +#define FM_FD_TX_STATUS_ERR_MASK (FM_FD_ERR_UNSUPPORTED_FORMAT | \ + FM_FD_ERR_LENGTH | \ + FM_FD_ERR_DMA) /**< TX Error FD bits */ + +#define FM_FD_RX_STATUS_ERR_MASK (FM_FD_ERR_UNSUPPORTED_FORMAT | \ + FM_FD_ERR_LENGTH | \ + FM_FD_ERR_DMA | \ + FM_FD_ERR_IPR | \ + FM_FD_ERR_IPR_TO | \ + FM_FD_ERR_IPR_NCSP | \ + FM_FD_ERR_PHYSICAL | \ + FM_FD_ERR_SIZE | \ + FM_FD_ERR_CLS_DISCARD | \ + FM_FD_ERR_COLOR_RED | \ + FM_FD_ERR_COLOR_YELLOW | \ + FM_FD_ERR_ILL_PLCR | \ + FM_FD_ERR_PLCR_FRAME_LEN | \ + FM_FD_ERR_EXTRACTION | \ + FM_FD_ERR_NO_SCHEME | \ + FM_FD_ERR_KEYSIZE_OVERFLOW | \ + FM_FD_ERR_PRS_TIMEOUT | \ + FM_FD_ERR_PRS_ILL_INSTRUCT | \ + FM_FD_ERR_PRS_HDR_ERR | \ + FM_FD_ERR_BLOCK_LIMIT_EXCEEDED) /**< RX Error FD bits */ + +#define FM_FD_RX_STATUS_ERR_NON_FM 0x00400000 /**< non Frame-Manager error */ +/* @} */ + +/**************************************************************************//** + @Description Context A +*//***************************************************************************/ +typedef _Packed struct t_FmContextA { + volatile uint32_t command; /**< ContextA Command */ + volatile uint8_t res0[4]; /**< ContextA Reserved bits */ +} _PackedType t_FmContextA; + +/**************************************************************************//** + @Description Context B +*//***************************************************************************/ +typedef uint32_t t_FmContextB; + +/**************************************************************************//** + @Collection Special Operation options +*//***************************************************************************/ +typedef uint32_t fmSpecialOperations_t; /**< typedef for defining Special Operation options */ + +#define FM_SP_OP_IPSEC 0x80000000 /**< activate features that related to IPSec (e.g fix Eth-type) */ +#define FM_SP_OP_IPSEC_UPDATE_UDP_LEN 0x40000000 /**< update the UDP-Len after Encryption */ +#define FM_SP_OP_IPSEC_MANIP 0x20000000 /**< handle the IPSec-manip options */ +#define FM_SP_OP_RPD 0x10000000 /**< Set the RPD bit */ +#define FM_SP_OP_DCL4C 0x08000000 /**< Set the DCL4C bit */ +#define FM_SP_OP_CHECK_SEC_ERRORS 0x04000000 /**< Check SEC errors */ +#define FM_SP_OP_CLEAR_RPD 0x02000000 /**< Clear the RPD bit */ +#define FM_SP_OP_CAPWAP_DTLS_ENC 0x01000000 /**< activate features that related to CAPWAP-DTLS post Encryption */ +#define FM_SP_OP_CAPWAP_DTLS_DEC 0x00800000 /**< activate features that related to CAPWAP-DTLS post Decryption */ +#define FM_SP_OP_IPSEC_NO_ETH_HDR 0x00400000 /**< activate features that related to IPSec without Eth hdr */ +/* @} */ + +/**************************************************************************//** + @Collection Context A macros +*//***************************************************************************/ +#define FM_CONTEXTA_OVERRIDE_MASK 0x80000000 +#define FM_CONTEXTA_ICMD_MASK 0x40000000 +#define FM_CONTEXTA_A1_VALID_MASK 0x20000000 +#define FM_CONTEXTA_MACCMD_MASK 0x00ff0000 +#define FM_CONTEXTA_MACCMD_VALID_MASK 0x00800000 +#define FM_CONTEXTA_MACCMD_SECURED_MASK 0x00100000 +#define FM_CONTEXTA_MACCMD_SC_MASK 0x000f0000 +#define FM_CONTEXTA_A1_MASK 0x0000ffff + +#define FM_CONTEXTA_GET_OVERRIDE(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_OVERRIDE_MASK) >> (31-0)) +#define FM_CONTEXTA_GET_ICMD(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_ICMD_MASK) >> (31-1)) +#define FM_CONTEXTA_GET_A1_VALID(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_A1_VALID_MASK) >> (31-2)) +#define FM_CONTEXTA_GET_A1(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_A1_MASK) >> (31-31)) +#define FM_CONTEXTA_GET_MACCMD(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_MACCMD_MASK) >> (31-15)) +#define FM_CONTEXTA_GET_MACCMD_VALID(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_MACCMD_VALID_MASK) >> (31-8)) +#define FM_CONTEXTA_GET_MACCMD_SECURED(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_MACCMD_SECURED_MASK) >> (31-11)) +#define FM_CONTEXTA_GET_MACCMD_SECURE_CHANNEL(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_MACCMD_SC_MASK) >> (31-15)) + +#define FM_CONTEXTA_SET_OVERRIDE(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_OVERRIDE_MASK) | (((uint32_t)(val) << (31-0)) & FM_CONTEXTA_OVERRIDE_MASK) )) +#define FM_CONTEXTA_SET_ICMD(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_ICMD_MASK) | (((val) << (31-1)) & FM_CONTEXTA_ICMD_MASK) )) +#define FM_CONTEXTA_SET_A1_VALID(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_A1_VALID_MASK) | (((val) << (31-2)) & FM_CONTEXTA_A1_VALID_MASK) )) +#define FM_CONTEXTA_SET_A1(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_A1_MASK) | (((val) << (31-31)) & FM_CONTEXTA_A1_MASK) )) +#define FM_CONTEXTA_SET_MACCMD(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_MACCMD_MASK) | (((val) << (31-15)) & FM_CONTEXTA_MACCMD_MASK) )) +#define FM_CONTEXTA_SET_MACCMD_VALID(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_MACCMD_VALID_MASK) | (((val) << (31-8)) & FM_CONTEXTA_MACCMD_VALID_MASK) )) +#define FM_CONTEXTA_SET_MACCMD_SECURED(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_MACCMD_SECURED_MASK) | (((val) << (31-11)) & FM_CONTEXTA_MACCMD_SECURED_MASK) )) +#define FM_CONTEXTA_SET_MACCMD_SECURE_CHANNEL(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_MACCMD_SC_MASK) | (((val) << (31-15)) & FM_CONTEXTA_MACCMD_SC_MASK) )) +/* @} */ + +/**************************************************************************//** + @Collection Context B macros +*//***************************************************************************/ +#define FM_CONTEXTB_FQID_MASK 0x00ffffff + +#define FM_CONTEXTB_GET_FQID(contextB) (*((t_FmContextB *)contextB) & FM_CONTEXTB_FQID_MASK) +#define FM_CONTEXTB_SET_FQID(contextB,val) (*((t_FmContextB *)contextB) = ((*((t_FmContextB *)contextB) & ~FM_CONTEXTB_FQID_MASK) | ((val) & FM_CONTEXTB_FQID_MASK))) +/* @} */ + +#if defined(__MWERKS__) && !defined(__GNUC__) +#pragma pack(pop) +#endif /* defined(__MWERKS__) && ... */ + + +/**************************************************************************//** + @Description FM Exceptions +*//***************************************************************************/ +typedef enum e_FmExceptions { + e_FM_EX_DMA_BUS_ERROR = 0, /**< DMA bus error. */ + e_FM_EX_DMA_READ_ECC, /**< Read Buffer ECC error (Valid for FM rev < 6)*/ + e_FM_EX_DMA_SYSTEM_WRITE_ECC, /**< Write Buffer ECC error on system side (Valid for FM rev < 6)*/ + e_FM_EX_DMA_FM_WRITE_ECC, /**< Write Buffer ECC error on FM side (Valid for FM rev < 6)*/ + e_FM_EX_DMA_SINGLE_PORT_ECC, /**< Single Port ECC error on FM side (Valid for FM rev > 6)*/ + e_FM_EX_FPM_STALL_ON_TASKS, /**< Stall of tasks on FPM */ + e_FM_EX_FPM_SINGLE_ECC, /**< Single ECC on FPM. */ + e_FM_EX_FPM_DOUBLE_ECC, /**< Double ECC error on FPM ram access */ + e_FM_EX_QMI_SINGLE_ECC, /**< Single ECC on QMI. */ + e_FM_EX_QMI_DOUBLE_ECC, /**< Double bit ECC occurred on QMI */ + e_FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID,/**< Dequeue from unknown port id */ + e_FM_EX_BMI_LIST_RAM_ECC, /**< Linked List RAM ECC error */ + e_FM_EX_BMI_STORAGE_PROFILE_ECC, /**< Storage Profile ECC Error */ + e_FM_EX_BMI_STATISTICS_RAM_ECC, /**< Statistics Count RAM ECC Error Enable */ + e_FM_EX_BMI_DISPATCH_RAM_ECC, /**< Dispatch RAM ECC Error Enable */ + e_FM_EX_IRAM_ECC, /**< Double bit ECC occurred on IRAM*/ + e_FM_EX_MURAM_ECC /**< Double bit ECC occurred on MURAM*/ +} e_FmExceptions; + +/**************************************************************************//** + @Description Enum for defining port DMA swap mode +*//***************************************************************************/ +typedef enum e_FmDmaSwapOption { + e_FM_DMA_NO_SWP = FMAN_DMA_NO_SWP, /**< No swap, transfer data as is.*/ + e_FM_DMA_SWP_PPC_LE = FMAN_DMA_SWP_PPC_LE, /**< The transferred data should be swapped + in PowerPc Little Endian mode. */ + e_FM_DMA_SWP_BE = FMAN_DMA_SWP_BE /**< The transferred data should be swapped + in Big Endian mode */ +} e_FmDmaSwapOption; + +/**************************************************************************//** + @Description Enum for defining port DMA cache attributes +*//***************************************************************************/ +typedef enum e_FmDmaCacheOption { + e_FM_DMA_NO_STASH = FMAN_DMA_NO_STASH, /**< Cacheable, no Allocate (No Stashing) */ + e_FM_DMA_STASH = FMAN_DMA_STASH /**< Cacheable and Allocate (Stashing on) */ +} e_FmDmaCacheOption; + + +/**************************************************************************//** + @Group FM_init_grp FM Initialization Unit + + @Description FM Initialization Unit + + Initialization Flow + Initialization of the FM Module will be carried out by the application + according to the following sequence: + - Calling the configuration routine with basic parameters. + - Calling the advance initialization routines to change driver's defaults. + - Calling the initialization routine. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function t_FmExceptionsCallback + + @Description Exceptions user callback routine, will be called upon an + exception passing the exception identification. + + @Param[in] h_App - User's application descriptor. + @Param[in] exception - The exception. +*//***************************************************************************/ +typedef void (t_FmExceptionsCallback)(t_Handle h_App, + e_FmExceptions exception); + + +/**************************************************************************//** + @Function t_FmBusErrorCallback + + @Description Bus error user callback routine, will be called upon a + bus error, passing parameters describing the errors and the owner. + + @Param[in] h_App - User's application descriptor. + @Param[in] portType - Port type (e_FmPortType) + @Param[in] portId - Port id - relative to type. + @Param[in] addr - Address that caused the error + @Param[in] tnum - Owner of error + @Param[in] liodn - Logical IO device number +*//***************************************************************************/ +typedef void (t_FmBusErrorCallback) (t_Handle h_App, + e_FmPortType portType, + uint8_t portId, + uint64_t addr, + uint8_t tnum, + uint16_t liodn); + +/**************************************************************************//** + @Description A structure for defining buffer prefix area content. +*//***************************************************************************/ +typedef struct t_FmBufferPrefixContent { + uint16_t privDataSize; /**< Number of bytes to be left at the beginning + of the external buffer; Note that the private-area will + start from the base of the buffer address. */ + bool passPrsResult; /**< TRUE to pass the parse result to/from the FM; + User may use FM_PORT_GetBufferPrsResult() in order to + get the parser-result from a buffer. */ + bool passTimeStamp; /**< TRUE to pass the timeStamp to/from the FM + User may use FM_PORT_GetBufferTimeStamp() in order to + get the parser-result from a buffer. */ + bool passHashResult; /**< TRUE to pass the KG hash result to/from the FM + User may use FM_PORT_GetBufferHashResult() in order to + get the parser-result from a buffer. */ + bool passAllOtherPCDInfo;/**< Add all other Internal-Context information: + AD, hash-result, key, etc. */ + uint16_t dataAlign; /**< 0 to use driver's default alignment [DEFAULT_FM_SP_bufferPrefixContent_dataAlign], + other value for selecting a data alignment (must be a power of 2); + if write optimization is used, must be >= 16. */ + uint8_t manipExtraSpace; /**< Maximum extra size needed (insertion-size minus removal-size); + Note that this field impacts the size of the buffer-prefix + (i.e. it pushes the data offset); + This field is irrelevant if DPAA_VERSION==10 */ +} t_FmBufferPrefixContent; + +/**************************************************************************//** + @Description A structure of information about each of the external + buffer pools used by a port or storage-profile. +*//***************************************************************************/ +typedef struct t_FmExtPoolParams { + uint8_t id; /**< External buffer pool id */ + uint16_t size; /**< External buffer pool buffer size */ +} t_FmExtPoolParams; + +/**************************************************************************//** + @Description A structure for informing the driver about the external + buffer pools allocated in the BM and used by a port or a + storage-profile. +*//***************************************************************************/ +typedef struct t_FmExtPools { + uint8_t numOfPoolsUsed; /**< Number of pools use by this port */ + t_FmExtPoolParams extBufPool[FM_PORT_MAX_NUM_OF_EXT_POOLS]; + /**< Parameters for each port */ +} t_FmExtPools; + +/**************************************************************************//** + @Description A structure for defining backup BM Pools. +*//***************************************************************************/ +typedef struct t_FmBackupBmPools { + uint8_t numOfBackupPools; /**< Number of BM backup pools - + must be smaller than the total number of + pools defined for the specified port.*/ + uint8_t poolIds[FM_PORT_MAX_NUM_OF_EXT_POOLS]; + /**< numOfBackupPools pool id's, specifying which + pools should be used only as backup. Pool + id's specified here must be a subset of the + pools used by the specified port.*/ +} t_FmBackupBmPools; + +/**************************************************************************//** + @Description A structure for defining BM pool depletion criteria +*//***************************************************************************/ +typedef struct t_FmBufPoolDepletion { + bool poolsGrpModeEnable; /**< select mode in which pause frames will be sent after + a number of pools (all together!) are depleted */ + uint8_t numOfPools; /**< the number of depleted pools that will invoke + pause frames transmission. */ + bool poolsToConsider[BM_MAX_NUM_OF_POOLS]; + /**< For each pool, TRUE if it should be considered for + depletion (Note - this pool must be used by this port!). */ + bool singlePoolModeEnable; /**< select mode in which pause frames will be sent after + a single-pool is depleted; */ + bool poolsToConsiderForSingleMode[BM_MAX_NUM_OF_POOLS]; + /**< For each pool, TRUE if it should be considered for + depletion (Note - this pool must be used by this port!) */ +#if (DPAA_VERSION >= 11) + bool pfcPrioritiesEn[FM_MAX_NUM_OF_PFC_PRIORITIES]; + /**< This field is used by the MAC as the Priority Enable Vector in the PFC frame which is transmitted */ +#endif /* (DPAA_VERSION >= 11) */ +} t_FmBufPoolDepletion; + +/**************************************************************************//** + @Description A Structure for defining Ucode patch for loading. +*//***************************************************************************/ +typedef struct t_FmFirmwareParams { + uint32_t size; /**< Size of uCode */ + uint32_t *p_Code; /**< A pointer to the uCode */ +} t_FmFirmwareParams; + +/**************************************************************************//** + @Description A Structure for defining FM initialization parameters +*//***************************************************************************/ +typedef struct t_FmParams { + uint8_t fmId; /**< Index of the FM */ + uint8_t guestId; /**< FM Partition Id */ + uintptr_t baseAddr; /**< A pointer to base of memory mapped FM registers (virtual); + this field is optional when the FM runs in "guest-mode" + (i.e. guestId != NCSW_MASTER_ID); in that case, the driver will + use the memory-map instead of calling the IPC where possible; + NOTE that this should include ALL common registers of the FM including + the PCD registers area (i.e. until the VSP pages - 880KB). */ + t_Handle h_FmMuram; /**< A handle of an initialized MURAM object, + to be used by the FM. */ + uint16_t fmClkFreq; /**< In Mhz; + Relevant when FM not runs in "guest-mode". */ + uint16_t fmMacClkRatio; /**< FM MAC Clock ratio, for backward comparability: + when fmMacClkRatio = 0, ratio is 2:1 + when fmMacClkRatio = 1, ratio is 1:1 */ + t_FmExceptionsCallback *f_Exception; /**< An application callback routine to handle exceptions; + Relevant when FM not runs in "guest-mode". */ + t_FmBusErrorCallback *f_BusError; /**< An application callback routine to handle exceptions; + Relevant when FM not runs in "guest-mode". */ + t_Handle h_App; /**< A handle to an application layer object; This handle will + be passed by the driver upon calling the above callbacks; + Relevant when FM not runs in "guest-mode". */ + uintptr_t irq; /**< FM interrupt source for normal events; + Relevant when FM not runs in "guest-mode". */ + uintptr_t errIrq; /**< FM interrupt source for errors; + Relevant when FM not runs in "guest-mode". */ + t_FmFirmwareParams firmware; /**< The firmware parameters structure; + Relevant when FM not runs in "guest-mode". */ + +#if (DPAA_VERSION >= 11) + uintptr_t vspBaseAddr; /**< A pointer to base of memory mapped FM VSP registers (virtual); + i.e. up to 24KB, depending on the specific chip. */ + uint8_t partVSPBase; /**< The first Virtual-Storage-Profile-id dedicated to this partition. + NOTE: this parameter relevant only when working with multiple partitions. */ + uint8_t partNumOfVSPs; /**< Number of VSPs dedicated to this partition. + NOTE: this parameter relevant only when working with multiple partitions. */ +#endif /* (DPAA_VERSION >= 11) */ +} t_FmParams; + + +/**************************************************************************//** + @Function FM_Config + + @Description Creates the FM module and returns its handle (descriptor). + This descriptor must be passed as first parameter to all other + FM function calls. + + No actual initialization or configuration of FM hardware is + done by this routine. All FM parameters get default values that + may be changed by calling one or more of the advance config routines. + + @Param[in] p_FmParams - A pointer to a data structure of mandatory FM parameters + + @Return A handle to the FM object, or NULL for Failure. +*//***************************************************************************/ +t_Handle FM_Config(t_FmParams *p_FmParams); + +/**************************************************************************//** + @Function FM_Init + + @Description Initializes the FM module by defining the software structure + and configuring the hardware registers. + + @Param[in] h_Fm - FM module descriptor + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_Init(t_Handle h_Fm); + +/**************************************************************************//** + @Function FM_Free + + @Description Frees all resources that were assigned to FM module. + + Calling this routine invalidates the descriptor. + + @Param[in] h_Fm - FM module descriptor + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_Free(t_Handle h_Fm); + + +/**************************************************************************//** + @Group FM_advanced_init_grp FM Advanced Configuration Unit + + @Description Advanced configuration routines are optional routines that may + be called in order to change the default driver settings. + + Note: Advanced configuration routines are not available for guest partition. + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description Enum for selecting DMA debug mode +*//***************************************************************************/ +typedef enum e_FmDmaDbgCntMode { + e_FM_DMA_DBG_NO_CNT = 0, /**< No counting */ + e_FM_DMA_DBG_CNT_DONE, /**< Count DONE commands */ + e_FM_DMA_DBG_CNT_COMM_Q_EM, /**< count command queue emergency signals */ + e_FM_DMA_DBG_CNT_INT_READ_EM, /**< Count Internal Read buffer emergency signal */ + e_FM_DMA_DBG_CNT_INT_WRITE_EM, /**< Count Internal Write buffer emergency signal */ + e_FM_DMA_DBG_CNT_FPM_WAIT, /**< Count FPM WAIT signal */ + e_FM_DMA_DBG_CNT_SIGLE_BIT_ECC, /**< Single bit ECC errors. */ + e_FM_DMA_DBG_CNT_RAW_WAR_PROT /**< Number of times there was a need for RAW & WAR protection. */ +} e_FmDmaDbgCntMode; + +/**************************************************************************//** + @Description Enum for selecting DMA Cache Override +*//***************************************************************************/ +typedef enum e_FmDmaCacheOverride { + e_FM_DMA_NO_CACHE_OR = 0, /**< No override of the Cache field */ + e_FM_DMA_NO_STASH_DATA, /**< Data should not be stashed in system level cache */ + e_FM_DMA_MAY_STASH_DATA, /**< Data may be stashed in system level cache */ + e_FM_DMA_STASH_DATA /**< Data should be stashed in system level cache */ +} e_FmDmaCacheOverride; + +/**************************************************************************//** + @Description Enum for selecting DMA External Bus Priority +*//***************************************************************************/ +typedef enum e_FmDmaExtBusPri { + e_FM_DMA_EXT_BUS_NORMAL = 0, /**< Normal priority */ + e_FM_DMA_EXT_BUS_EBS, /**< AXI extended bus service priority */ + e_FM_DMA_EXT_BUS_SOS, /**< AXI sos priority */ + e_FM_DMA_EXT_BUS_EBS_AND_SOS /**< AXI ebs + sos priority */ +} e_FmDmaExtBusPri; + +/**************************************************************************//** + @Description Enum for choosing the field that will be output on AID +*//***************************************************************************/ +typedef enum e_FmDmaAidMode { + e_FM_DMA_AID_OUT_PORT_ID = 0, /**< 4 LSB of PORT_ID */ + e_FM_DMA_AID_OUT_TNUM /**< 4 LSB of TNUM */ +} e_FmDmaAidMode; + +/**************************************************************************//** + @Description Enum for selecting FPM Catastrophic error behavior +*//***************************************************************************/ +typedef enum e_FmCatastrophicErr { + e_FM_CATASTROPHIC_ERR_STALL_PORT = 0, /**< Port_ID is stalled (only reset can release it) */ + e_FM_CATASTROPHIC_ERR_STALL_TASK /**< Only erroneous task is stalled */ +} e_FmCatastrophicErr; + +/**************************************************************************//** + @Description Enum for selecting FPM DMA Error behavior +*//***************************************************************************/ +typedef enum e_FmDmaErr { + e_FM_DMA_ERR_CATASTROPHIC = 0, /**< Dma error is treated as a catastrophic + error (e_FmCatastrophicErr)*/ + e_FM_DMA_ERR_REPORT /**< Dma error is just reported */ +} e_FmDmaErr; + +/**************************************************************************//** + @Description Enum for selecting DMA Emergency level by BMI emergency signal +*//***************************************************************************/ +typedef enum e_FmDmaEmergencyLevel { + e_FM_DMA_EM_EBS = 0, /**< EBS emergency */ + e_FM_DMA_EM_SOS /**< SOS emergency */ +} e_FmDmaEmergencyLevel; + +/**************************************************************************//** + @Collection Enum for selecting DMA Emergency options +*//***************************************************************************/ +typedef uint32_t fmEmergencyBus_t; /**< DMA emergency options */ + +#define FM_DMA_MURAM_READ_EMERGENCY 0x00800000 /**< Enable emergency for MURAM1 */ +#define FM_DMA_MURAM_WRITE_EMERGENCY 0x00400000 /**< Enable emergency for MURAM2 */ +#define FM_DMA_EXT_BUS_EMERGENCY 0x00100000 /**< Enable emergency for external bus */ +/* @} */ + +/**************************************************************************//** + @Description A structure for defining DMA emergency level +*//***************************************************************************/ +typedef struct t_FmDmaEmergency { + fmEmergencyBus_t emergencyBusSelect; /**< An OR of the busses where emergency + should be enabled */ + e_FmDmaEmergencyLevel emergencyLevel; /**< EBS/SOS */ +} t_FmDmaEmergency; + +/**************************************************************************//* + @Description structure for defining FM threshold +*//***************************************************************************/ +typedef struct t_FmThresholds { + uint8_t dispLimit; /**< The number of times a frames may + be passed in the FM before assumed to + be looping. */ + uint8_t prsDispTh; /**< This is the number pf packets that may be + queued in the parser dispatch queue*/ + uint8_t plcrDispTh; /**< This is the number pf packets that may be + queued in the policer dispatch queue*/ + uint8_t kgDispTh; /**< This is the number pf packets that may be + queued in the keygen dispatch queue*/ + uint8_t bmiDispTh; /**< This is the number pf packets that may be + queued in the BMI dispatch queue*/ + uint8_t qmiEnqDispTh; /**< This is the number pf packets that may be + queued in the QMI enqueue dispatch queue*/ + uint8_t qmiDeqDispTh; /**< This is the number pf packets that may be + queued in the QMI dequeue dispatch queue*/ + uint8_t fmCtl1DispTh; /**< This is the number pf packets that may be + queued in fmCtl1 dispatch queue*/ + uint8_t fmCtl2DispTh; /**< This is the number pf packets that may be + queued in fmCtl2 dispatch queue*/ +} t_FmThresholds; + +/**************************************************************************//* + @Description structure for defining DMA thresholds +*//***************************************************************************/ +typedef struct t_FmDmaThresholds { + uint8_t assertEmergency; /**< When this value is reached, + assert emergency (Threshold)*/ + uint8_t clearEmergency; /**< After emergency is asserted, it is held + until this value is reached (Hystheresis) */ +} t_FmDmaThresholds; + +/**************************************************************************//** + @Function t_FmResetOnInitOverrideCallback + + @Description FMan specific reset on init user callback routine, + will be used to override the standard FMan reset on init procedure + + @Param[in] h_Fm - FMan handler +*//***************************************************************************/ +typedef void (t_FmResetOnInitOverrideCallback)(t_Handle h_Fm); + +/**************************************************************************//** + @Function FM_ConfigResetOnInit + + @Description Define whether to reset the FM before initialization. + Change the default configuration [DEFAULT_resetOnInit]. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] enable When TRUE, FM will be reset before any initialization. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigResetOnInit(t_Handle h_Fm, bool enable); + +/**************************************************************************//** + @Function FM_ConfigResetOnInitOverrideCallback + + @Description Define a special reset of FM before initialization. + Change the default configuration [DEFAULT_resetOnInitOverrideCallback]. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] f_ResetOnInitOverride FM specific reset on init user callback routine. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigResetOnInitOverrideCallback(t_Handle h_Fm, t_FmResetOnInitOverrideCallback *f_ResetOnInitOverride); + +/**************************************************************************//** + @Function FM_ConfigTotalFifoSize + + @Description Define Total FIFO size for the whole FM. + Calling this routine changes the total Fifo size in the internal driver + data base from its default configuration [DEFAULT_totalFifoSize] + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] totalFifoSize The selected new value. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigTotalFifoSize(t_Handle h_Fm, uint32_t totalFifoSize); + + /**************************************************************************//** + @Function FM_ConfigDmaCacheOverride + + @Description Define cache override mode. + Calling this routine changes the cache override mode + in the internal driver data base from its default configuration [DEFAULT_cacheOverride] + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] cacheOverride The selected new value. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaCacheOverride(t_Handle h_Fm, e_FmDmaCacheOverride cacheOverride); + +/**************************************************************************//** + @Function FM_ConfigDmaAidOverride + + @Description Define DMA AID override mode. + Calling this routine changes the AID override mode + in the internal driver data base from its default configuration [DEFAULT_aidOverride] + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] aidOverride The selected new value. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaAidOverride(t_Handle h_Fm, bool aidOverride); + +/**************************************************************************//** + @Function FM_ConfigDmaAidMode + + @Description Define DMA AID mode. + Calling this routine changes the AID mode in the internal + driver data base from its default configuration [DEFAULT_aidMode] + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] aidMode The selected new value. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaAidMode(t_Handle h_Fm, e_FmDmaAidMode aidMode); + +/**************************************************************************//** + @Function FM_ConfigDmaAxiDbgNumOfBeats + + @Description Define DMA AXI number of beats. + Calling this routine changes the AXI number of beats in the internal + driver data base from its default configuration [DEFAULT_axiDbgNumOfBeats] + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] axiDbgNumOfBeats The selected new value. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaAxiDbgNumOfBeats(t_Handle h_Fm, uint8_t axiDbgNumOfBeats); + +/**************************************************************************//** + @Function FM_ConfigDmaCamNumOfEntries + + @Description Define number of CAM entries. + Calling this routine changes the number of CAM entries in the internal + driver data base from its default configuration [DEFAULT_dmaCamNumOfEntries]. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] numOfEntries The selected new value. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaCamNumOfEntries(t_Handle h_Fm, uint8_t numOfEntries); + +/**************************************************************************//** + @Function FM_ConfigEnableCounters + + @Description Obsolete, always return E_OK. + + @Param[in] h_Fm A handle to an FM Module. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_ConfigEnableCounters(t_Handle h_Fm); + +/**************************************************************************//** + @Function FM_ConfigDmaDbgCounter + + @Description Define DMA debug counter. + Calling this routine changes the number of the DMA debug counter in the internal + driver data base from its default configuration [DEFAULT_dmaDbgCntMode]. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] fmDmaDbgCntMode An enum selecting the debug counter mode. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaDbgCounter(t_Handle h_Fm, e_FmDmaDbgCntMode fmDmaDbgCntMode); + +/**************************************************************************//** + @Function FM_ConfigDmaStopOnBusErr + + @Description Define bus error behavior. + Calling this routine changes the bus error behavior definition + in the internal driver data base from its default + configuration [DEFAULT_dmaStopOnBusError]. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] stop TRUE to stop on bus error, FALSE to continue. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + Only if bus error is enabled. + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaStopOnBusErr(t_Handle h_Fm, bool stop); + +/**************************************************************************//** + @Function FM_ConfigDmaEmergency + + @Description Define DMA emergency. + Calling this routine changes the DMA emergency definition + in the internal driver data base from its default + configuration where's it's disabled. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] p_Emergency An OR mask of all required options. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaEmergency(t_Handle h_Fm, t_FmDmaEmergency *p_Emergency); + +/**************************************************************************//** + @Function FM_ConfigDmaErr + + @Description DMA error treatment. + Calling this routine changes the DMA error treatment + in the internal driver data base from its default + configuration [DEFAULT_dmaErr]. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] dmaErr The selected new choice. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaErr(t_Handle h_Fm, e_FmDmaErr dmaErr); + +/**************************************************************************//** + @Function FM_ConfigCatastrophicErr + + @Description Define FM behavior on catastrophic error. + Calling this routine changes the FM behavior on catastrophic + error in the internal driver data base from its default + [DEFAULT_catastrophicErr]. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] catastrophicErr The selected new choice. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigCatastrophicErr(t_Handle h_Fm, e_FmCatastrophicErr catastrophicErr); + +/**************************************************************************//** + @Function FM_ConfigEnableMuramTestMode + + @Description Enable MURAM test mode. + Calling this routine changes the internal driver data base + from its default selection of test mode where it's disabled. + This routine is only avaiable on old FM revisions (FMan v2). + + @Param[in] h_Fm A handle to an FM Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigEnableMuramTestMode(t_Handle h_Fm); + +/**************************************************************************//** + @Function FM_ConfigEnableIramTestMode + + @Description Enable IRAM test mode. + Calling this routine changes the internal driver data base + from its default selection of test mode where it's disabled. + This routine is only avaiable on old FM revisions (FMan v2). + + @Param[in] h_Fm A handle to an FM Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigEnableIramTestMode(t_Handle h_Fm); + +/**************************************************************************//** + @Function FM_ConfigHaltOnExternalActivation + + @Description Define FM behavior on external halt activation. + Calling this routine changes the FM behavior on external halt + activation in the internal driver data base from its default + [DEFAULT_haltOnExternalActivation]. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] enable TRUE to enable halt on external halt + activation. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigHaltOnExternalActivation(t_Handle h_Fm, bool enable); + +/**************************************************************************//** + @Function FM_ConfigHaltOnUnrecoverableEccError + + @Description Define FM behavior on external halt activation. + Calling this routine changes the FM behavior on unrecoverable + ECC error in the internal driver data base from its default + [DEFAULT_haltOnUnrecoverableEccError]. + This routine is only avaiable on old FM revisions (FMan v2). + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] enable TRUE to enable halt on unrecoverable Ecc error + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigHaltOnUnrecoverableEccError(t_Handle h_Fm, bool enable); + +/**************************************************************************//** + @Function FM_ConfigException + + @Description Define FM exceptions. + Calling this routine changes the exceptions defaults in the + internal driver data base where all exceptions are enabled. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] exception The exception to be selected. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigException(t_Handle h_Fm, e_FmExceptions exception, bool enable); + +/**************************************************************************//** + @Function FM_ConfigExternalEccRamsEnable + + @Description Select external ECC enabling. + Calling this routine changes the ECC enabling control in the internal + driver data base from its default [DEFAULT_externalEccRamsEnable]. + When this option is enabled Rams ECC enabling is not effected + by FM_EnableRamsEcc/FM_DisableRamsEcc, but by a JTAG. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] enable TRUE to enable this option. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigExternalEccRamsEnable(t_Handle h_Fm, bool enable); + +/**************************************************************************//** + @Function FM_ConfigTnumAgingPeriod + + @Description Define Tnum aging period. + Calling this routine changes the Tnum aging of dequeue TNUMs + in the QMI in the internal driver data base from its default + [DEFAULT_tnumAgingPeriod]. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] tnumAgingPeriod Tnum Aging Period in microseconds. + Note that period is recalculated in units of + 64 FM clocks. Driver will pick the closest + possible period. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) + NOTE that if some MAC is configured for PFC, '0' value is NOT + allowed. +*//***************************************************************************/ +t_Error FM_ConfigTnumAgingPeriod(t_Handle h_Fm, uint16_t tnumAgingPeriod); + +/**************************************************************************//* + @Function FM_ConfigDmaEmergencySmoother + + @Description Define DMA emergency smoother. + Calling this routine changes the definition of the minimum + amount of DATA beats transferred on the AXI READ and WRITE + ports before lowering the emergency level. + By default smoother is disabled. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] emergencyCnt emergency switching counter. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaEmergencySmoother(t_Handle h_Fm, uint32_t emergencyCnt); + +/**************************************************************************//* + @Function FM_ConfigThresholds + + @Description Calling this routine changes the internal driver data base + from its default FM threshold configuration: + dispLimit: [DEFAULT_dispLimit] + prsDispTh: [DEFAULT_prsDispTh] + plcrDispTh: [DEFAULT_plcrDispTh] + kgDispTh: [DEFAULT_kgDispTh] + bmiDispTh: [DEFAULT_bmiDispTh] + qmiEnqDispTh: [DEFAULT_qmiEnqDispTh] + qmiDeqDispTh: [DEFAULT_qmiDeqDispTh] + fmCtl1DispTh: [DEFAULT_fmCtl1DispTh] + fmCtl2DispTh: [DEFAULT_fmCtl2DispTh] + + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] p_FmThresholds A structure of threshold parameters. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigThresholds(t_Handle h_Fm, t_FmThresholds *p_FmThresholds); + +/**************************************************************************//* + @Function FM_ConfigDmaSosEmergencyThreshold + + @Description Calling this routine changes the internal driver data base + from its default dma SOS emergency configuration [DEFAULT_dmaSosEmergency] + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] dmaSosEmergency The selected new value. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaSosEmergencyThreshold(t_Handle h_Fm, uint32_t dmaSosEmergency); + +/**************************************************************************//* + @Function FM_ConfigDmaWriteBufThresholds + + @Description Calling this routine changes the internal driver data base + from its default configuration of DMA write buffer threshold + assertEmergency: [DEFAULT_dmaWriteIntBufLow] + clearEmergency: [DEFAULT_dmaWriteIntBufHigh] + This routine is only avaiable on old FM revisions (FMan v2). + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] p_FmDmaThresholds A structure of thresholds to define emergency behavior - + When 'assertEmergency' value is reached, emergency is asserted, + then it is held until 'clearEmergency' value is reached. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaWriteBufThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds); + + /**************************************************************************//* + @Function FM_ConfigDmaCommQThresholds + + @Description Calling this routine changes the internal driver data base + from its default configuration of DMA command queue threshold + assertEmergency: [DEFAULT_dmaCommQLow] + clearEmergency: [DEFAULT_dmaCommQHigh] + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] p_FmDmaThresholds A structure of thresholds to define emergency behavior - + When 'assertEmergency' value is reached, emergency is asserted, + then it is held until 'clearEmergency' value is reached.. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaCommQThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds); + +/**************************************************************************//* + @Function FM_ConfigDmaReadBufThresholds + + @Description Calling this routine changes the internal driver data base + from its default configuration of DMA read buffer threshold + assertEmergency: [DEFAULT_dmaReadIntBufLow] + clearEmergency: [DEFAULT_dmaReadIntBufHigh] + This routine is only avaiable on old FM revisions (FMan v2). + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] p_FmDmaThresholds A structure of thresholds to define emergency behavior - + When 'assertEmergency' value is reached, emergency is asserted, + then it is held until 'clearEmergency' value is reached.. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaReadBufThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds); + +/**************************************************************************//* + @Function FM_ConfigDmaWatchdog + + @Description Calling this routine changes the internal driver data base + from its default watchdog configuration, which is disabled + [DEFAULT_dmaWatchdog]. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] watchDogValue The selected new value - in microseconds. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ConfigDmaWatchdog(t_Handle h_Fm, uint32_t watchDogValue); + +/** @} */ /* end of FM_advanced_init_grp group */ +/** @} */ /* end of FM_init_grp group */ + + +/**************************************************************************//** + @Group FM_runtime_control_grp FM Runtime Control Unit + + @Description FM Runtime control unit API functions, definitions and enums. + The FM driver provides a set of control routines. + These routines may only be called after the module was fully + initialized (both configuration and initialization routines were + called). They are typically used to get information from hardware + (status, counters/statistics, revision etc.), to modify a current + state or to force/enable a required action. Run-time control may + be called whenever necessary and as many times as needed. + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Collection General FM defines. +*//***************************************************************************/ +#define FM_MAX_NUM_OF_VALID_PORTS (FM_MAX_NUM_OF_OH_PORTS + \ + FM_MAX_NUM_OF_1G_RX_PORTS + \ + FM_MAX_NUM_OF_10G_RX_PORTS + \ + FM_MAX_NUM_OF_1G_TX_PORTS + \ + FM_MAX_NUM_OF_10G_TX_PORTS) /**< Number of available FM ports */ +/* @} */ + +/**************************************************************************//* + @Description A Structure for Port bandwidth requirement. Port is identified + by type and relative id. +*//***************************************************************************/ +typedef struct t_FmPortBandwidth { + e_FmPortType type; /**< FM port type */ + uint8_t relativePortId; /**< Type relative port id */ + uint8_t bandwidth; /**< bandwidth - (in term of percents) */ +} t_FmPortBandwidth; + +/**************************************************************************//* + @Description A Structure containing an array of Port bandwidth requirements. + The user should state the ports requiring bandwidth in terms of + percentage - i.e. all port's bandwidths in the array must add + up to 100. +*//***************************************************************************/ +typedef struct t_FmPortsBandwidthParams { + uint8_t numOfPorts; /**< The number of relevant ports, which is the + number of valid entries in the array below */ + t_FmPortBandwidth portsBandwidths[FM_MAX_NUM_OF_VALID_PORTS]; + /**< for each port, it's bandwidth (all port's + bandwidths must add up to 100.*/ +} t_FmPortsBandwidthParams; + +/**************************************************************************//** + @Description DMA Emergency control on MURAM +*//***************************************************************************/ +typedef enum e_FmDmaMuramPort { + e_FM_DMA_MURAM_PORT_WRITE, /**< MURAM write port */ + e_FM_DMA_MURAM_PORT_READ /**< MURAM read port */ +} e_FmDmaMuramPort; + +/**************************************************************************//** + @Description Enum for defining FM counters +*//***************************************************************************/ +typedef enum e_FmCounters { + e_FM_COUNTERS_ENQ_TOTAL_FRAME = 0, /**< QMI total enqueued frames counter */ + e_FM_COUNTERS_DEQ_TOTAL_FRAME, /**< QMI total dequeued frames counter */ + e_FM_COUNTERS_DEQ_0, /**< QMI 0 frames from QMan counter */ + e_FM_COUNTERS_DEQ_1, /**< QMI 1 frames from QMan counter */ + e_FM_COUNTERS_DEQ_2, /**< QMI 2 frames from QMan counter */ + e_FM_COUNTERS_DEQ_3, /**< QMI 3 frames from QMan counter */ + e_FM_COUNTERS_DEQ_FROM_DEFAULT, /**< QMI dequeue from default queue counter */ + e_FM_COUNTERS_DEQ_FROM_CONTEXT, /**< QMI dequeue from FQ context counter */ + e_FM_COUNTERS_DEQ_FROM_FD, /**< QMI dequeue from FD command field counter */ + e_FM_COUNTERS_DEQ_CONFIRM /**< QMI dequeue confirm counter */ +} e_FmCounters; + +/**************************************************************************//** + @Description A Structure for returning FM revision information +*//***************************************************************************/ +typedef struct t_FmRevisionInfo { + uint8_t majorRev; /**< Major revision */ + uint8_t minorRev; /**< Minor revision */ +} t_FmRevisionInfo; + +/**************************************************************************//** + @Description A Structure for returning FM ctrl code revision information +*//***************************************************************************/ +typedef struct t_FmCtrlCodeRevisionInfo { + uint16_t packageRev; /**< Package revision */ + uint8_t majorRev; /**< Major revision */ + uint8_t minorRev; /**< Minor revision */ +} t_FmCtrlCodeRevisionInfo; + +/**************************************************************************//** + @Description A Structure for defining DMA status +*//***************************************************************************/ +typedef struct t_FmDmaStatus { + bool cmqNotEmpty; /**< Command queue is not empty */ + bool busError; /**< Bus error occurred */ + bool readBufEccError; /**< Double ECC error on buffer Read (Valid for FM rev < 6)*/ + bool writeBufEccSysError; /**< Double ECC error on buffer write from system side (Valid for FM rev < 6)*/ + bool writeBufEccFmError; /**< Double ECC error on buffer write from FM side (Valid for FM rev < 6) */ + bool singlePortEccError; /**< Single Port ECC error from FM side (Valid for FM rev >= 6)*/ +} t_FmDmaStatus; + +/**************************************************************************//** + @Description A Structure for obtaining FM controller monitor values +*//***************************************************************************/ +typedef struct t_FmCtrlMon { + uint8_t percentCnt[2]; /**< Percentage value */ +} t_FmCtrlMon; + + +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) +/**************************************************************************//** + @Function FM_DumpRegs + + @Description Dumps all FM registers + + @Param[in] h_Fm A handle to an FM Module. + + @Return E_OK on success; + + @Cautions Allowed only following FM_Init(). +*//***************************************************************************/ +t_Error FM_DumpRegs(t_Handle h_Fm); +#endif /* (defined(DEBUG_ERRORS) && ... */ + +/**************************************************************************//** + @Function FM_SetException + + @Description Calling this routine enables/disables the specified exception. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] exception The exception to be selected. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_SetException(t_Handle h_Fm, e_FmExceptions exception, bool enable); + +/**************************************************************************//** + @Function FM_EnableRamsEcc + + @Description Enables ECC mechanism for all the different FM RAM's; E.g. IRAM, + MURAM, Parser, Keygen, Policer, etc. + Note: + If FM_ConfigExternalEccRamsEnable was called to enable external + setting of ECC, this routine effects IRAM ECC only. + This routine is also called by the driver if an ECC exception is + enabled. + + @Param[in] h_Fm A handle to an FM Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_EnableRamsEcc(t_Handle h_Fm); + +/**************************************************************************//** + @Function FM_DisableRamsEcc + + @Description Disables ECC mechanism for all the different FM RAM's; E.g. IRAM, + MURAM, Parser, Keygen, Policer, etc. + Note: + If FM_ConfigExternalEccRamsEnable was called to enable external + setting of ECC, this routine effects IRAM ECC only. + In opposed to FM_EnableRamsEcc, this routine must be called + explicitly to disable all Rams ECC. + + @Param[in] h_Fm A handle to an FM Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Config() and before FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_DisableRamsEcc(t_Handle h_Fm); + +/**************************************************************************//** + @Function FM_GetRevision + + @Description Returns the FM revision + + @Param[in] h_Fm A handle to an FM Module. + @Param[out] p_FmRevisionInfo A structure of revision information parameters. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Init(). +*//***************************************************************************/ +t_Error FM_GetRevision(t_Handle h_Fm, t_FmRevisionInfo *p_FmRevisionInfo); + +/**************************************************************************//** + @Function FM_GetFmanCtrlCodeRevision + + @Description Returns the Fman controller code revision + + @Param[in] h_Fm A handle to an FM Module. + @Param[out] p_RevisionInfo A structure of revision information parameters. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Init(). +*//***************************************************************************/ +t_Error FM_GetFmanCtrlCodeRevision(t_Handle h_Fm, t_FmCtrlCodeRevisionInfo *p_RevisionInfo); + +/**************************************************************************//** + @Function FM_GetCounter + + @Description Reads one of the FM counters. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] counter The requested counter. + + @Return Counter's current value. + + @Cautions Allowed only following FM_Init(). + Note that it is user's responsibility to call this routine only + for enabled counters, and there will be no indication if a + disabled counter is accessed. +*//***************************************************************************/ +uint32_t FM_GetCounter(t_Handle h_Fm, e_FmCounters counter); + +/**************************************************************************//** + @Function FM_ModifyCounter + + @Description Sets a value to an enabled counter. Use "0" to reset the counter. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] counter The requested counter. + @Param[in] val The requested value to be written into the counter. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ModifyCounter(t_Handle h_Fm, e_FmCounters counter, uint32_t val); + +/**************************************************************************//** + @Function FM_Resume + + @Description Release FM after halt FM command or after unrecoverable ECC error. + + @Param[in] h_Fm A handle to an FM Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +void FM_Resume(t_Handle h_Fm); + +/**************************************************************************//** + @Function FM_SetDmaEmergency + + @Description Manual emergency set + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] muramPort MURAM direction select. + @Param[in] enable TRUE to manually enable emergency, FALSE to disable. + + @Return None. + + @Cautions Allowed only following FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +void FM_SetDmaEmergency(t_Handle h_Fm, e_FmDmaMuramPort muramPort, bool enable); + +/**************************************************************************//** + @Function FM_SetDmaExtBusPri + + @Description Set the DMA external bus priority + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] pri External bus priority select + + @Return None. + + @Cautions Allowed only following FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +void FM_SetDmaExtBusPri(t_Handle h_Fm, e_FmDmaExtBusPri pri); + +/**************************************************************************//** + @Function FM_GetDmaStatus + + @Description Reads the DMA current status + + @Param[in] h_Fm A handle to an FM Module. + @Param[out] p_FmDmaStatus A structure of DMA status parameters. + + @Cautions Allowed only following FM_Init(). +*//***************************************************************************/ +void FM_GetDmaStatus(t_Handle h_Fm, t_FmDmaStatus *p_FmDmaStatus); + +/**************************************************************************//** + @Function FM_ErrorIsr + + @Description FM interrupt-service-routine for errors. + + @Param[in] h_Fm A handle to an FM Module. + + @Return E_OK on success; E_EMPTY if no errors found in register, other + error code otherwise. + + @Cautions Allowed only following FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ErrorIsr(t_Handle h_Fm); + +/**************************************************************************//** + @Function FM_EventIsr + + @Description FM interrupt-service-routine for normal events. + + @Param[in] h_Fm A handle to an FM Module. + + @Cautions Allowed only following FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +void FM_EventIsr(t_Handle h_Fm); + +/**************************************************************************//** + @Function FM_GetSpecialOperationCoding + + @Description Return a specific coding according to the input mask. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] spOper special operation mask. + @Param[out] p_SpOperCoding special operation code. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Init(). +*//***************************************************************************/ +t_Error FM_GetSpecialOperationCoding(t_Handle h_Fm, + fmSpecialOperations_t spOper, + uint8_t *p_SpOperCoding); + +/**************************************************************************//** + @Function FM_CtrlMonStart + + @Description Start monitoring utilization of all available FM controllers. + + In order to obtain FM controllers utilization the following sequence + should be used: + -# FM_CtrlMonStart() + -# FM_CtrlMonStop() + -# FM_CtrlMonGetCounters() - issued for each FM controller + + @Param[in] h_Fm A handle to an FM Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID). +*//***************************************************************************/ +t_Error FM_CtrlMonStart(t_Handle h_Fm); + +/**************************************************************************//** + @Function FM_CtrlMonStop + + @Description Stop monitoring utilization of all available FM controllers. + + In order to obtain FM controllers utilization the following sequence + should be used: + -# FM_CtrlMonStart() + -# FM_CtrlMonStop() + -# FM_CtrlMonGetCounters() - issued for each FM controller + + @Param[in] h_Fm A handle to an FM Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID). +*//***************************************************************************/ +t_Error FM_CtrlMonStop(t_Handle h_Fm); + +/**************************************************************************//** + @Function FM_CtrlMonGetCounters + + @Description Obtain FM controller utilization parameters. + + In order to obtain FM controllers utilization the following sequence + should be used: + -# FM_CtrlMonStart() + -# FM_CtrlMonStop() + -# FM_CtrlMonGetCounters() - issued for each FM controller + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] fmCtrlIndex FM Controller index for that utilization results + are requested. + @Param[in] p_Mon Pointer to utilization results structure. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID). +*//***************************************************************************/ +t_Error FM_CtrlMonGetCounters(t_Handle h_Fm, uint8_t fmCtrlIndex, t_FmCtrlMon *p_Mon); + + +/**************************************************************************//* + @Function FM_ForceIntr + + @Description Causes an interrupt event on the requested source. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] exception An exception to be forced. + + @Return E_OK on success; Error code if the exception is not enabled, + or is not able to create interrupt. + + @Cautions Allowed only following FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_ForceIntr (t_Handle h_Fm, e_FmExceptions exception); + +/**************************************************************************//* + @Function FM_SetPortsBandwidth + + @Description Sets relative weights between ports when accessing common resources. + + @Param[in] h_Fm A handle to an FM Module. + @Param[in] p_PortsBandwidth A structure of ports bandwidths in percentage, i.e. + total must equal 100. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_SetPortsBandwidth(t_Handle h_Fm, t_FmPortsBandwidthParams *p_PortsBandwidth); + +/**************************************************************************//* + @Function FM_GetMuramHandle + + @Description Gets the corresponding MURAM handle + + @Param[in] h_Fm A handle to an FM Module. + + @Return MURAM handle; NULL otherwise. + + @Cautions Allowed only following FM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Handle FM_GetMuramHandle(t_Handle h_Fm); + +/** @} */ /* end of FM_runtime_control_grp group */ +/** @} */ /* end of FM_lib_grp group */ +/** @} */ /* end of FM_grp group */ + + +#ifdef NCSW_BACKWARD_COMPATIBLE_API +typedef t_FmFirmwareParams t_FmPcdFirmwareParams; +typedef t_FmBufferPrefixContent t_FmPortBufferPrefixContent; +typedef t_FmExtPoolParams t_FmPortExtPoolParams; +typedef t_FmExtPools t_FmPortExtPools; +typedef t_FmBackupBmPools t_FmPortBackupBmPools; +typedef t_FmBufPoolDepletion t_FmPortBufPoolDepletion; +typedef e_FmDmaSwapOption e_FmPortDmaSwapOption; +typedef e_FmDmaCacheOption e_FmPortDmaCacheOption; + +#define FM_CONTEXTA_GET_OVVERIDE FM_CONTEXTA_GET_OVERRIDE +#define FM_CONTEXTA_SET_OVVERIDE FM_CONTEXTA_SET_OVERRIDE + +#define e_FM_EX_BMI_PIPELINE_ECC e_FM_EX_BMI_STORAGE_PROFILE_ECC +#define e_FM_PORT_DMA_NO_SWP e_FM_DMA_NO_SWP +#define e_FM_PORT_DMA_SWP_PPC_LE e_FM_DMA_SWP_PPC_LE +#define e_FM_PORT_DMA_SWP_BE e_FM_DMA_SWP_BE +#define e_FM_PORT_DMA_NO_STASH e_FM_DMA_NO_STASH +#define e_FM_PORT_DMA_STASH e_FM_DMA_STASH +#endif /* NCSW_BACKWARD_COMPATIBLE_API */ + + +#endif /* __FM_EXT */ diff --git a/sys/contrib/ncsw/inc/Peripherals/fm_mac_ext.h b/sys/contrib/ncsw/inc/Peripherals/fm_mac_ext.h new file mode 100644 index 000000000000..da7e0463480a --- /dev/null +++ b/sys/contrib/ncsw/inc/Peripherals/fm_mac_ext.h @@ -0,0 +1,859 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File fm_mac_ext.h + + @Description FM MAC ... +*//***************************************************************************/ +#ifndef __FM_MAC_EXT_H +#define __FM_MAC_EXT_H + +#include "std_ext.h" +#include "enet_ext.h" + + +/**************************************************************************//** + + @Group FM_grp Frame Manager API + + @Description FM API functions, definitions and enums + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group FM_mac_grp FM MAC + + @Description FM MAC API functions, definitions and enums + + @{ +*//***************************************************************************/ + +#define FM_MAC_NO_PFC 0xff + + +/**************************************************************************//** + @Description FM MAC Exceptions +*//***************************************************************************/ +typedef enum e_FmMacExceptions { + e_FM_MAC_EX_10G_MDIO_SCAN_EVENTMDIO = 0 /**< 10GEC MDIO scan event interrupt */ + ,e_FM_MAC_EX_10G_MDIO_CMD_CMPL /**< 10GEC MDIO command completion interrupt */ + ,e_FM_MAC_EX_10G_REM_FAULT /**< 10GEC, mEMAC Remote fault interrupt */ + ,e_FM_MAC_EX_10G_LOC_FAULT /**< 10GEC, mEMAC Local fault interrupt */ + ,e_FM_MAC_EX_10G_1TX_ECC_ER /**< 10GEC, mEMAC Transmit frame ECC error interrupt */ + ,e_FM_MAC_EX_10G_TX_FIFO_UNFL /**< 10GEC, mEMAC Transmit FIFO underflow interrupt */ + ,e_FM_MAC_EX_10G_TX_FIFO_OVFL /**< 10GEC, mEMAC Transmit FIFO overflow interrupt */ + ,e_FM_MAC_EX_10G_TX_ER /**< 10GEC Transmit frame error interrupt */ + ,e_FM_MAC_EX_10G_RX_FIFO_OVFL /**< 10GEC, mEMAC Receive FIFO overflow interrupt */ + ,e_FM_MAC_EX_10G_RX_ECC_ER /**< 10GEC, mEMAC Receive frame ECC error interrupt */ + ,e_FM_MAC_EX_10G_RX_JAB_FRM /**< 10GEC Receive jabber frame interrupt */ + ,e_FM_MAC_EX_10G_RX_OVRSZ_FRM /**< 10GEC Receive oversized frame interrupt */ + ,e_FM_MAC_EX_10G_RX_RUNT_FRM /**< 10GEC Receive runt frame interrupt */ + ,e_FM_MAC_EX_10G_RX_FRAG_FRM /**< 10GEC Receive fragment frame interrupt */ + ,e_FM_MAC_EX_10G_RX_LEN_ER /**< 10GEC Receive payload length error interrupt */ + ,e_FM_MAC_EX_10G_RX_CRC_ER /**< 10GEC Receive CRC error interrupt */ + ,e_FM_MAC_EX_10G_RX_ALIGN_ER /**< 10GEC Receive alignment error interrupt */ + ,e_FM_MAC_EX_1G_BAB_RX /**< dTSEC Babbling receive error */ + ,e_FM_MAC_EX_1G_RX_CTL /**< dTSEC Receive control (pause frame) interrupt */ + ,e_FM_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET /**< dTSEC Graceful transmit stop complete */ + ,e_FM_MAC_EX_1G_BAB_TX /**< dTSEC Babbling transmit error */ + ,e_FM_MAC_EX_1G_TX_CTL /**< dTSEC Transmit control (pause frame) interrupt */ + ,e_FM_MAC_EX_1G_TX_ERR /**< dTSEC Transmit error */ + ,e_FM_MAC_EX_1G_LATE_COL /**< dTSEC Late collision */ + ,e_FM_MAC_EX_1G_COL_RET_LMT /**< dTSEC Collision retry limit */ + ,e_FM_MAC_EX_1G_TX_FIFO_UNDRN /**< dTSEC Transmit FIFO underrun */ + ,e_FM_MAC_EX_1G_MAG_PCKT /**< dTSEC Magic Packet detection */ + ,e_FM_MAC_EX_1G_MII_MNG_RD_COMPLET /**< dTSEC MII management read completion */ + ,e_FM_MAC_EX_1G_MII_MNG_WR_COMPLET /**< dTSEC MII management write completion */ + ,e_FM_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET /**< dTSEC Graceful receive stop complete */ + ,e_FM_MAC_EX_1G_TX_DATA_ERR /**< dTSEC Internal data error on transmit */ + ,e_FM_MAC_EX_1G_RX_DATA_ERR /**< dTSEC Internal data error on receive */ + ,e_FM_MAC_EX_1G_1588_TS_RX_ERR /**< dTSEC Time-Stamp Receive Error */ + ,e_FM_MAC_EX_1G_RX_MIB_CNT_OVFL /**< dTSEC MIB counter overflow */ + ,e_FM_MAC_EX_TS_FIFO_ECC_ERR /**< mEMAC Time-stamp FIFO ECC error interrupt; + not supported on T4240/B4860 rev1 chips */ + ,e_FM_MAC_EX_MAGIC_PACKET_INDICATION = e_FM_MAC_EX_1G_MAG_PCKT + /**< mEMAC Magic Packet Indication Interrupt */ +} e_FmMacExceptions; + +/**************************************************************************//** + @Description TM MAC statistics level +*//***************************************************************************/ +typedef enum e_FmMacStatisticsLevel { + e_FM_MAC_NONE_STATISTICS = 0, /**< No statistics */ + e_FM_MAC_PARTIAL_STATISTICS, /**< Only error counters are available; Optimized for performance */ + e_FM_MAC_FULL_STATISTICS /**< All counters available; Not optimized for performance */ +} e_FmMacStatisticsLevel; + + +#if (DPAA_VERSION >= 11) +/**************************************************************************//** + @Description Priority Flow Control Parameters +*//***************************************************************************/ +typedef struct t_FmMacPfcParams { + bool pfcEnable; /**< Enable/Disable PFC */ + + uint16_t pauseQuanta[FM_MAX_NUM_OF_PFC_PRIORITIES]; /**< Pause Quanta per priority to be sent in a pause frame. Each quanta represents a 512 bit-times*/ + + uint16_t pauseThresholdQuanta[FM_MAX_NUM_OF_PFC_PRIORITIES];/**< Pause threshold per priority, when timer passes this threshold time a PFC frames is sent again if the port is still congested or BM pool in depletion*/ + + +} t_FmMacPfcParams; +#endif /* (DPAA_VERSION >= 11) */ + +/**************************************************************************//** + @Function t_FmMacExceptionCallback + + @Description Fm Mac Exception Callback from FM MAC to the user + + @Param[in] h_App - Handle to the upper layer handler + + @Param[in] exceptions - The exception that occurred + + @Return void. +*//***************************************************************************/ +typedef void (t_FmMacExceptionCallback)(t_Handle h_App, e_FmMacExceptions exceptions); + + +/**************************************************************************//** + @Description TM MAC statistics rfc3635 +*//***************************************************************************/ +typedef struct t_FmMacStatistics { +/* RMON */ + uint64_t eStatPkts64; /**< r-10G tr-DT 64 byte frame counter */ + uint64_t eStatPkts65to127; /**< r-10G 65 to 127 byte frame counter */ + uint64_t eStatPkts128to255; /**< r-10G 128 to 255 byte frame counter */ + uint64_t eStatPkts256to511; /**< r-10G 256 to 511 byte frame counter */ + uint64_t eStatPkts512to1023; /**< r-10G 512 to 1023 byte frame counter */ + uint64_t eStatPkts1024to1518; /**< r-10G 1024 to 1518 byte frame counter */ + uint64_t eStatPkts1519to1522; /**< r-10G 1519 to 1522 byte good frame count */ +/* */ + uint64_t eStatFragments; /**< Total number of packets that were less than 64 octets long with a wrong CRC.*/ + uint64_t eStatJabbers; /**< Total number of packets longer than valid maximum length octets */ + uint64_t eStatsDropEvents; /**< number of dropped packets due to internal errors of the MAC Client (during receive). */ + uint64_t eStatCRCAlignErrors; /**< Incremented when frames of correct length but with CRC error are received.*/ + uint64_t eStatUndersizePkts; /**< Incremented for frames under 64 bytes with a valid FCS and otherwise well formed; + This count does not include range length errors */ + uint64_t eStatOversizePkts; /**< Incremented for frames which exceed 1518 (non VLAN) or 1522 (VLAN) and contains + a valid FCS and otherwise well formed */ +/* Pause */ + uint64_t teStatPause; /**< Pause MAC Control received */ + uint64_t reStatPause; /**< Pause MAC Control sent */ +/* MIB II */ + uint64_t ifInOctets; /**< Total number of byte received. */ + uint64_t ifInPkts; /**< Total number of packets received.*/ + uint64_t ifInUcastPkts; /**< Total number of unicast frame received; + NOTE: this counter is not supported on dTSEC MAC */ + uint64_t ifInMcastPkts; /**< Total number of multicast frame received*/ + uint64_t ifInBcastPkts; /**< Total number of broadcast frame received */ + uint64_t ifInDiscards; /**< Frames received, but discarded due to problems within the MAC RX. */ + uint64_t ifInErrors; /**< Number of frames received with error: + - FIFO Overflow Error + - CRC Error + - Frame Too Long Error + - Alignment Error + - The dedicated Error Code (0xfe, not a code error) was received */ + uint64_t ifOutOctets; /**< Total number of byte sent. */ + uint64_t ifOutPkts; /**< Total number of packets sent .*/ + uint64_t ifOutUcastPkts; /**< Total number of unicast frame sent; + NOTE: this counter is not supported on dTSEC MAC */ + uint64_t ifOutMcastPkts; /**< Total number of multicast frame sent */ + uint64_t ifOutBcastPkts; /**< Total number of multicast frame sent */ + uint64_t ifOutDiscards; /**< Frames received, but discarded due to problems within the MAC TX N/A!.*/ + uint64_t ifOutErrors; /**< Number of frames transmitted with error: + - FIFO Overflow Error + - FIFO Underflow Error + - Other */ +} t_FmMacStatistics; + + +/**************************************************************************//** + @Group FM_mac_init_grp FM MAC Initialization Unit + + @Description FM MAC Initialization Unit + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description FM MAC config input +*//***************************************************************************/ +typedef struct t_FmMacParams { + uintptr_t baseAddr; /**< Base of memory mapped FM MAC registers */ + t_EnetAddr addr; /**< MAC address of device; First octet is sent first */ + uint8_t macId; /**< MAC ID; + numbering of dTSEC and 1G-mEMAC: + 0 - FM_MAX_NUM_OF_1G_MACS; + numbering of 10G-MAC (TGEC) and 10G-mEMAC: + 0 - FM_MAX_NUM_OF_10G_MACS */ + e_EnetMode enetMode; /**< Ethernet operation mode (MAC-PHY interface and speed); + Note that the speed should indicate the maximum rate that + this MAC should support rather than the actual speed; + i.e. user should use the FM_MAC_AdjustLink() routine to + provide accurate speed; + In case of mEMAC RGMII mode, the MAC is configured to RGMII + automatic mode, where actual speed/duplex mode information + is provided by PHY automatically in-band; FM_MAC_AdjustLink() + function should be used to switch to manual RGMII speed/duplex mode + configuration if RGMII PHY doesn't support in-band status signaling; + In addition, in mEMAC, in case where user is using the higher MACs + (i.e. the MACs that should support 10G), user should pass here + speed=10000 even if the interface is not allowing that (e.g. SGMII). */ + t_Handle h_Fm; /**< A handle to the FM object this port related to */ + int mdioIrq; /**< MDIO exceptions interrupt source - not valid for all + MACs; MUST be set to 'NO_IRQ' for MACs that don't have + mdio-irq, or for polling */ + t_FmMacExceptionCallback *f_Event; /**< MDIO Events Callback Routine */ + t_FmMacExceptionCallback *f_Exception; /**< Exception Callback Routine */ + t_Handle h_App; /**< A handle to an application layer object; This handle will + be passed by the driver upon calling the above callbacks */ +} t_FmMacParams; + + +/**************************************************************************//** + @Function FM_MAC_Config + + @Description Creates descriptor for the FM MAC module. + + The routine returns a handle (descriptor) to the FM MAC object. + This descriptor must be passed as first parameter to all other + FM MAC function calls. + + No actual initialization or configuration of FM MAC hardware is + done by this routine. + + @Param[in] p_FmMacParam - Pointer to data structure of parameters + + @Retval Handle to FM MAC object, or NULL for Failure. +*//***************************************************************************/ +t_Handle FM_MAC_Config(t_FmMacParams *p_FmMacParam); + +/**************************************************************************//** + @Function FM_MAC_Init + + @Description Initializes the FM MAC module + + @Param[in] h_FmMac - FM module descriptor + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_MAC_Init(t_Handle h_FmMac); + +/**************************************************************************//** + @Function FM_Free + + @Description Frees all resources that were assigned to FM MAC module. + + Calling this routine invalidates the descriptor. + + @Param[in] h_FmMac - FM module descriptor + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_MAC_Free(t_Handle h_FmMac); + + +/**************************************************************************//** + @Group FM_mac_advanced_init_grp FM MAC Advanced Configuration Unit + + @Description Configuration functions used to change default values. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function FM_MAC_ConfigResetOnInit + + @Description Tell the driver whether to reset the FM MAC before initialization or + not. It changes the default configuration [DEFAULT_resetOnInit]. + + @Param[in] h_FmMac A handle to a FM MAC Module. + @Param[in] enable When TRUE, FM will be reset before any initialization. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_ConfigResetOnInit(t_Handle h_FmMac, bool enable); + +/**************************************************************************//** + @Function FM_MAC_ConfigLoopback + + @Description Enable/Disable internal loopback mode + + @Param[in] h_FmMac A handle to a FM MAC Module. + @Param[in] enable TRUE to enable or FALSE to disable. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_ConfigLoopback(t_Handle h_FmMac, bool enable); + +/**************************************************************************//** + @Function FM_MAC_ConfigMaxFrameLength + + @Description Setup maximum Rx Frame Length (in 1G MAC, effects also Tx) + + @Param[in] h_FmMac A handle to a FM MAC Module. + @Param[in] newVal MAX Frame length + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_ConfigMaxFrameLength(t_Handle h_FmMac, uint16_t newVal); + +/**************************************************************************//** + @Function FM_MAC_ConfigWan + + @Description ENABLE WAN mode in 10G-MAC + + @Param[in] h_FmMac A handle to a FM MAC Module. + @Param[in] enable TRUE to enable or FALSE to disable. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_ConfigWan(t_Handle h_FmMac, bool enable); + +/**************************************************************************//** + @Function FM_MAC_ConfigPadAndCrc + + @Description Config PAD and CRC mode + + @Param[in] h_FmMac A handle to a FM MAC Module. + @Param[in] enable TRUE to enable or FALSE to disable. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init(). + Not supported on 10G-MAC (i.e. CRC & PAD are added automatically + by HW); on mEMAC, this routine supports only PAD (i.e. CRC is + added automatically by HW). +*//***************************************************************************/ +t_Error FM_MAC_ConfigPadAndCrc(t_Handle h_FmMac, bool enable); + +/**************************************************************************//** + @Function FM_MAC_ConfigHalfDuplex + + @Description Config Half Duplex Mode + + @Param[in] h_FmMac A handle to a FM MAC Module. + @Param[in] enable TRUE to enable or FALSE to disable. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_ConfigHalfDuplex(t_Handle h_FmMac, bool enable); + +/**************************************************************************//** + @Function FM_MAC_ConfigTbiPhyAddr + + @Description Configures the address of internal TBI PHY. + + @Param[in] h_FmMac A handle to a FM MAC Module. + @Param[in] newVal TBI PHY address (1-31). + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_ConfigTbiPhyAddr(t_Handle h_FmMac, uint8_t newVal); + +/**************************************************************************//** + @Function FM_MAC_ConfigLengthCheck + + @Description Configure the frame length checking. + + @Param[in] h_FmMac A handle to a FM MAC Module. + @Param[in] enable TRUE to enable or FALSE to disable. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_ConfigLengthCheck(t_Handle h_FmMac, bool enable); + +/**************************************************************************//** + @Function FM_MAC_ConfigException + + @Description Change Exception selection from default + + @Param[in] h_FmMac A handle to a FM MAC Module. + @Param[in] ex Type of the desired exceptions + @Param[in] enable TRUE to enable the specified exception, FALSE to disable it. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_ConfigException(t_Handle h_FmMac, e_FmMacExceptions ex, bool enable); + +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 +t_Error FM_MAC_ConfigSkipFman11Workaround (t_Handle h_FmMac); +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */ +/** @} */ /* end of FM_mac_advanced_init_grp group */ +/** @} */ /* end of FM_mac_init_grp group */ + + +/**************************************************************************//** + @Group FM_mac_runtime_control_grp FM MAC Runtime Control Unit + + @Description FM MAC Runtime control unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function FM_MAC_Enable + + @Description Enable the MAC + + @Param[in] h_FmMac A handle to a FM MAC Module. + @Param[in] mode Mode of operation (RX, TX, Both) + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_Enable(t_Handle h_FmMac, e_CommMode mode); + +/**************************************************************************//** + @Function FM_MAC_Disable + + @Description DISABLE the MAC + + @Param[in] h_FmMac A handle to a FM MAC Module. + @Param[in] mode Define what part to Disable (RX, TX or BOTH) + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_Disable(t_Handle h_FmMac, e_CommMode mode); + +/**************************************************************************//** + @Function FM_MAC_Resume + + @Description Re-init the MAC after suspend + + @Param[in] h_FmMac A handle to a FM MAC Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_Resume(t_Handle h_FmMac); + +/**************************************************************************//** + @Function FM_MAC_Enable1588TimeStamp + + @Description Enables the TSU operation. + + @Param[in] h_Fm - Handle to the PTP as returned from the FM_MAC_PtpConfig. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_Enable1588TimeStamp(t_Handle h_Fm); + +/**************************************************************************//** + @Function FM_MAC_Disable1588TimeStamp + + @Description Disables the TSU operation. + + @Param[in] h_Fm - Handle to the PTP as returned from the FM_MAC_PtpConfig. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_Disable1588TimeStamp(t_Handle h_Fm); + +/**************************************************************************//** + @Function FM_MAC_SetTxAutoPauseFrames + + @Description Enable/Disable transmission of Pause-Frames. + The routine changes the default configuration [DEFAULT_TX_PAUSE_TIME]. + + @Param[in] h_FmMac - A handle to a FM MAC Module. + @Param[in] pauseTime - Pause quanta value used with transmitted pause frames. + Each quanta represents a 512 bit-times; Note that '0' + as an input here will be used as disabling the + transmission of the pause-frames. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_SetTxAutoPauseFrames(t_Handle h_FmMac, + uint16_t pauseTime); + + /**************************************************************************//** + @Function FM_MAC_SetTxPauseFrames + + @Description Enable/Disable transmission of Pause-Frames. + The routine changes the default configuration: + pause-time - [DEFAULT_TX_PAUSE_TIME] + threshold-time - [0] + + @Param[in] h_FmMac - A handle to a FM MAC Module. + @Param[in] priority - the PFC class of service; use 'FM_MAC_NO_PFC' + to indicate legacy pause support (i.e. no PFC). + @Param[in] pauseTime - Pause quanta value used with transmitted pause frames. + Each quanta represents a 512 bit-times; + Note that '0' as an input here will be used as disabling the + transmission of the pause-frames. + @Param[in] threshTime - Pause Threshold equanta value used by the MAC to retransmit pause frame. + if the situation causing a pause frame to be sent didn't finish when the timer + reached the threshold quanta, the MAC will retransmit the pause frame. + Each quanta represents a 512 bit-times. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Init(). + In order for PFC to work properly the user must configure + TNUM-aging in the tx-port it is recommended that pre-fetch and + rate limit in the tx port should be disabled; + PFC is supported only on new mEMAC; i.e. in MACs that don't have + PFC support (10G-MAC and dTSEC), user should use 'FM_MAC_NO_PFC' + in the 'priority' field. +*//***************************************************************************/ +t_Error FM_MAC_SetTxPauseFrames(t_Handle h_FmMac, + uint8_t priority, + uint16_t pauseTime, + uint16_t threshTime); + +/**************************************************************************//** + @Function FM_MAC_SetRxIgnorePauseFrames + + @Description Enable/Disable ignoring of Pause-Frames. + + @Param[in] h_FmMac - A handle to a FM MAC Module. + @Param[in] en - boolean indicates whether to ignore the incoming pause + frames or not. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_SetRxIgnorePauseFrames(t_Handle h_FmMac, bool en); + +/**************************************************************************//** + @Function FM_MAC_SetWakeOnLan + + @Description Enable/Disable Wake On Lan support + + @Param[in] h_FmMac - A handle to a FM MAC Module. + @Param[in] en - boolean indicates whether to enable Wake On Lan + support or not. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_SetWakeOnLan(t_Handle h_FmMac, bool en); + +/**************************************************************************//** + @Function FM_MAC_ResetCounters + + @Description reset all statistics counters + + @Param[in] h_FmMac - A handle to a FM MAC Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_ResetCounters(t_Handle h_FmMac); + +/**************************************************************************//** + @Function FM_MAC_SetException + + @Description Enable/Disable a specific Exception + + @Param[in] h_FmMac - A handle to a FM MAC Module. + @Param[in] ex - Type of the desired exceptions + @Param[in] enable - TRUE to enable the specified exception, FALSE to disable it. + + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_SetException(t_Handle h_FmMac, e_FmMacExceptions ex, bool enable); + +/**************************************************************************//** + @Function FM_MAC_SetStatistics + + @Description Define Statistics level. + Where applicable, the routine also enables the MIB counters + overflow interrupt in order to keep counters accurate + and account for overflows. + This routine is relevant only for dTSEC. + + @Param[in] h_FmMac - A handle to a FM MAC Module. + @Param[in] statisticsLevel - Full statistics level provides all standard counters but may + reduce performance. Partial statistics provides only special + event counters (errors etc.). If selected, regular counters (such as + byte/packet) will be invalid and will return -1. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_SetStatistics(t_Handle h_FmMac, e_FmMacStatisticsLevel statisticsLevel); + +/**************************************************************************//** + @Function FM_MAC_GetStatistics + + @Description get all statistics counters + + @Param[in] h_FmMac - A handle to a FM MAC Module. + @Param[in] p_Statistics - Structure with statistics + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_Init(). +*//***************************************************************************/ +t_Error FM_MAC_GetStatistics(t_Handle h_FmMac, t_FmMacStatistics *p_Statistics); + +/**************************************************************************//** + @Function FM_MAC_ModifyMacAddr + + @Description Replace the main MAC Address + + @Param[in] h_FmMac - A handle to a FM Module. + @Param[in] p_EnetAddr - Ethernet Mac address + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only after FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_ModifyMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr); + +/**************************************************************************//** + @Function FM_MAC_AddHashMacAddr + + @Description Add an Address to the hash table. This is for filter purpose only. + + @Param[in] h_FmMac - A handle to a FM Module. + @Param[in] p_EnetAddr - Ethernet Mac address + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Init(). It is a filter only address. + @Cautions Some address need to be filterd out in upper FM blocks. +*//***************************************************************************/ +t_Error FM_MAC_AddHashMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr); + +/**************************************************************************//** + @Function FM_MAC_RemoveHashMacAddr + + @Description Delete an Address to the hash table. This is for filter purpose only. + + @Param[in] h_FmMac - A handle to a FM Module. + @Param[in] p_EnetAddr - Ethernet Mac address + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_RemoveHashMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr); + +/**************************************************************************//** + @Function FM_MAC_AddExactMatchMacAddr + + @Description Add a unicast or multicast mac address for exact-match filtering + (8 on dTSEC, 2 for 10G-MAC) + + @Param[in] h_FmMac - A handle to a FM Module. + @Param[in] p_EnetAddr - MAC Address to ADD + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only after FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_AddExactMatchMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr); + +/**************************************************************************//** + @Function FM_MAC_RemovelExactMatchMacAddr + + @Description Remove a uni cast or multi cast mac address. + + @Param[in] h_FmMac - A handle to a FM Module. + @Param[in] p_EnetAddr - MAC Address to remove + + @Return E_OK on success; Error code otherwise.. + + @Cautions Allowed only after FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_RemovelExactMatchMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr); + +/**************************************************************************//** + @Function FM_MAC_SetPromiscuous + + @Description Enable/Disable MAC Promiscuous mode for ALL mac addresses. + + @Param[in] h_FmMac - A handle to a FM MAC Module. + @Param[in] enable - TRUE to enable or FALSE to disable. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only after FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_SetPromiscuous(t_Handle h_FmMac, bool enable); + +/**************************************************************************//** + @Function FM_MAC_AdjustLink + + @Description Adjusts the Ethernet link with new speed/duplex setup. + This routine is relevant for dTSEC and mEMAC. + In case of mEMAC, this routine is also used for manual + re-configuration of RGMII speed and duplex mode for + RGMII PHYs not supporting in-band status information + to MAC. + + @Param[in] h_FmMac - A handle to a FM Module. + @Param[in] speed - Ethernet speed. + @Param[in] fullDuplex - TRUE for full-duplex mode; + FALSE for half-duplex mode. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_MAC_AdjustLink(t_Handle h_FmMac, e_EnetSpeed speed, bool fullDuplex); + +/**************************************************************************//** + @Function FM_MAC_RestartAutoneg + + @Description Restarts the auto-negotiation process. + When auto-negotiation process is invoked under traffic the + auto-negotiation process between the internal SGMII PHY and the + external PHY does not always complete successfully. Calling this + function will restart the auto-negotiation process that will end + successfully. It is recommended to call this function after issuing + auto-negotiation restart command to the Eth Phy. + This routine is relevant only for dTSEC. + + @Param[in] h_FmMac - A handle to a FM Module. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_MAC_RestartAutoneg(t_Handle h_FmMac); + +/**************************************************************************//** + @Function FM_MAC_GetId + + @Description Return the MAC ID + + @Param[in] h_FmMac - A handle to a FM Module. + @Param[out] p_MacId - MAC ID of device + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only after FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_GetId(t_Handle h_FmMac, uint32_t *p_MacId); + +/**************************************************************************//** + @Function FM_MAC_GetVesrion + + @Description Return Mac HW chip version + + @Param[in] h_FmMac - A handle to a FM Module. + @Param[out] p_MacVresion - Mac version as defined by the chip + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only after FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_GetVesrion(t_Handle h_FmMac, uint32_t *p_MacVresion); + +/**************************************************************************//** + @Function FM_MAC_MII_WritePhyReg + + @Description Write data into Phy Register + + @Param[in] h_FmMac - A handle to a FM Module. + @Param[in] phyAddr - Phy Address on the MII bus + @Param[in] reg - Register Number. + @Param[in] data - Data to write. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only after FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_MII_WritePhyReg(t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t data); + +/**************************************************************************//** + @Function FM_MAC_MII_ReadPhyReg + + @Description Read data from Phy Register + + @Param[in] h_FmMac - A handle to a FM Module. + @Param[in] phyAddr - Phy Address on the MII bus + @Param[in] reg - Register Number. + @Param[out] p_Data - Data from PHY. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only after FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_MII_ReadPhyReg(t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data); + +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) +/**************************************************************************//** + @Function FM_MAC_DumpRegs + + @Description Dump internal registers + + @Param[in] h_FmMac - A handle to a FM Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only after FM_MAC_Init(). +*//***************************************************************************/ +t_Error FM_MAC_DumpRegs(t_Handle h_FmMac); +#endif /* (defined(DEBUG_ERRORS) && ... */ + +/** @} */ /* end of FM_mac_runtime_control_grp group */ +/** @} */ /* end of FM_mac_grp group */ +/** @} */ /* end of FM_grp group */ + + +#endif /* __FM_MAC_EXT_H */ diff --git a/sys/contrib/ncsw/inc/Peripherals/fm_macsec_ext.h b/sys/contrib/ncsw/inc/Peripherals/fm_macsec_ext.h new file mode 100644 index 000000000000..57925f1040b9 --- /dev/null +++ b/sys/contrib/ncsw/inc/Peripherals/fm_macsec_ext.h @@ -0,0 +1,1271 @@ +/* + * Copyright 2008-2015 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/**************************************************************************//** + @File fm_macsec_ext.h + + @Description FM MACSEC ... +*//***************************************************************************/ +#ifndef __FM_MACSEC_EXT_H +#define __FM_MACSEC_EXT_H + +#include "std_ext.h" + + +/**************************************************************************//** + @Group FM_grp Frame Manager API + + @Description FM API functions, definitions and enums + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group FM_MACSEC_grp FM MACSEC + + @Description FM MACSEC API functions, definitions and enums + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description MACSEC Exceptions +*//***************************************************************************/ +typedef enum e_FmMacsecExceptions { + e_FM_MACSEC_EX_SINGLE_BIT_ECC, /**< Single bit ECC error */ + e_FM_MACSEC_EX_MULTI_BIT_ECC /**< Multi bit ECC error */ +} e_FmMacsecExceptions; + + +/**************************************************************************//** + @Group FM_MACSEC_init_grp FM-MACSEC Initialization Unit + + @Description FM MACSEC Initialization Unit + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function t_FmMacsecExceptionsCallback + + @Description Exceptions user callback routine, will be called upon an + exception passing the exception identification. + + @Param[in] h_App A handle to an application layer object; This handle + will be passed by the driver upon calling this callback. + @Param[in] exception The exception. +*//***************************************************************************/ +typedef void (t_FmMacsecExceptionsCallback) ( t_Handle h_App, + e_FmMacsecExceptions exception); + + +/**************************************************************************//** + @Description FM MACSEC config input +*//***************************************************************************/ +typedef struct t_FmMacsecParams { + t_Handle h_Fm; /**< A handle to the FM object related to */ + bool guestMode; /**< Partition-id */ + union { + struct { + uint8_t fmMacId; /**< FM MAC id */ + } guestParams; + + struct { + uintptr_t baseAddr; /**< Base of memory mapped FM MACSEC registers */ + t_Handle h_FmMac; /**< A handle to the FM MAC object related to */ + t_FmMacsecExceptionsCallback *f_Exception; /**< Exception Callback Routine */ + t_Handle h_App; /**< A handle to an application layer object; This handle will + be passed by the driver upon calling the above callbacks */ + } nonGuestParams; + }; +} t_FmMacsecParams; + +/**************************************************************************//** + @Function FM_MACSEC_Config + + @Description Creates descriptor for the FM MACSEC module; + + The routine returns a handle (descriptor) to the FM MACSEC object; + This descriptor must be passed as first parameter to all other + FM MACSEC function calls; + + No actual initialization or configuration of FM MACSEC hardware is + done by this routine. + + @Param[in] p_FmMacsecParam Pointer to data structure of parameters. + + @Retval Handle to FM MACSEC object, or NULL for Failure. +*//***************************************************************************/ +t_Handle FM_MACSEC_Config(t_FmMacsecParams *p_FmMacsecParam); + +/**************************************************************************//** + @Function FM_MACSEC_Init + + @Description Initializes the FM MACSEC module. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_MACSEC_Init(t_Handle h_FmMacsec); + +/**************************************************************************//** + @Function FM_MACSEC_Free + + @Description Frees all resources that were assigned to FM MACSEC module; + + Calling this routine invalidates the descriptor. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_MACSEC_Free(t_Handle h_FmMacsec); + + +/**************************************************************************//** + @Group FM_MACSEC_advanced_init_grp FM-MACSEC Advanced Configuration Unit + + @Description Configuration functions used to change default values. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description enum for unknown sci frame treatment +*//***************************************************************************/ +typedef enum e_FmMacsecUnknownSciFrameTreatment { + e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DISCARD_BOTH = 0, /**< Controlled port - Strict mode */ + e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DISCARD_UNCONTROLLED_DELIVER_OR_DISCARD_CONTROLLED, /**< If C bit clear deliver on controlled port, else discard + Controlled port - Check or Disable mode */ + e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DELIVER_UNCONTROLLED_DISCARD_CONTROLLED, /**< Controlled port - Strict mode */ + e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DELIVER_OR_DISCARD_UNCONTROLLED_DELIVER_OR_DISCARD_CONTROLLED /**< If C bit set deliver on uncontrolled port and discard on controlled port, + else discard on uncontrolled port and deliver on controlled port + Controlled port - Check or Disable mode */ +} e_FmMacsecUnknownSciFrameTreatment; + +/**************************************************************************//** + @Description enum for untag frame treatment +*//***************************************************************************/ +typedef enum e_FmMacsecUntagFrameTreatment { + e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DELIVER_UNCONTROLLED_DISCARD_CONTROLLED = 0, /**< Controlled port - Strict mode */ + e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DISCARD_BOTH, /**< Controlled port - Strict mode */ + e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DISCARD_UNCONTROLLED_DELIVER_CONTROLLED_UNMODIFIED /**< Controlled port - Strict mode */ +} e_FmMacsecUntagFrameTreatment; + +/**************************************************************************//** + @Function FM_MACSEC_ConfigUnknownSciFrameTreatment + + @Description Change the treatment for received frames with unknown sci from its default + configuration [DEFAULT_unknownSciFrameTreatment]. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + @Param[in] treatMode The selected mode. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_ConfigUnknownSciFrameTreatment(t_Handle h_FmMacsec, e_FmMacsecUnknownSciFrameTreatment treatMode); + +/**************************************************************************//** + @Function FM_MACSEC_ConfigInvalidTagsFrameTreatment + + @Description Change the treatment for received frames with invalid tags or + a zero value PN or an invalid ICV from its default configuration + [DEFAULT_invalidTagsFrameTreatment]. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + @Param[in] deliverUncontrolled If True deliver on the uncontrolled port, else discard; + In both cases discard on the controlled port; + this provide Strict, Check or Disable mode. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_ConfigInvalidTagsFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled); + +/**************************************************************************//** + @Function FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment + + @Description Change the treatment for received frames with the Encryption bit + set and the Changed Text bit clear from its default configuration + [DEFAULT_encryptWithNoChangedTextFrameTreatment]. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + @Param[in] discardUncontrolled If True discard on the uncontrolled port, else deliver; + In both cases discard on the controlled port; + this provide Strict, Check or Disable mode. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment(t_Handle h_FmMacsec, bool discardUncontrolled); + +/**************************************************************************//** + @Function FM_MACSEC_ConfigChangedTextWithNoEncryptFrameTreatment + + @Description Change the treatment for received frames with the Encryption bit + clear and the Changed Text bit set from its default configuration + [DEFAULT_changedTextWithNoEncryptFrameTreatment]. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + @Param[in] deliverUncontrolled If True deliver on the uncontrolled port, else discard; + In both cases discard on the controlled port; + this provide Strict, Check or Disable mode. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_ConfigChangedTextWithNoEncryptFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled); + +/**************************************************************************//** + @Function FM_MACSEC_ConfigUntagFrameTreatment + + @Description Change the treatment for received frames without the MAC security tag (SecTAG) + from its default configuration [DEFAULT_untagFrameTreatment]. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + @Param[in] treatMode The selected mode. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_ConfigUntagFrameTreatment(t_Handle h_FmMacsec, e_FmMacsecUntagFrameTreatment treatMode); + +/**************************************************************************//** + @Function FM_MACSEC_ConfigOnlyScbIsSetFrameTreatment + + @Description Change the treatment for received frames with only SCB bit set + from its default configuration [DEFAULT_onlyScbIsSetFrameTreatment]. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + @Param[in] deliverUncontrolled If True deliver on the uncontrolled port, else discard; + In both cases discard on the controlled port; + this provide Strict, Check or Disable mode. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_ConfigOnlyScbIsSetFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled); + +/**************************************************************************//** + @Function FM_MACSEC_ConfigPnExhaustionThreshold + + @Description It's provide the ability to configure a PN exhaustion threshold; + When the NextPn crosses this value an interrupt event + is asserted to warn that the active SA should re-key. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + @Param[in] pnExhThr If the threshold is reached, an interrupt event + is asserted to re-key. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_ConfigPnExhaustionThreshold(t_Handle h_FmMacsec, uint32_t pnExhThr); + +/**************************************************************************//** + @Function FM_MACSEC_ConfigKeysUnreadable + + @Description Turn on privacy mode; All the keys and their hash values can't be read any more; + Can not be cleared unless hard reset. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_ConfigKeysUnreadable(t_Handle h_FmMacsec); + +/**************************************************************************//** + @Function FM_MACSEC_ConfigSectagWithoutSCI + + @Description Promise that all generated Sectag will be without SCI included. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_ConfigSectagWithoutSCI(t_Handle h_FmMacsec); + +/**************************************************************************//** + @Function FM_MACSEC_ConfigException + + @Description Calling this routine changes the internal driver data base + from its default selection of exceptions enablement; + By default all exceptions are enabled. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + @Param[in] exception The exception to be selected. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_ConfigException(t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable); + +/** @} */ /* end of FM_MACSEC_advanced_init_grp group */ +/** @} */ /* end of FM_MACSEC_init_grp group */ + + +/**************************************************************************//** + @Group FM_MACSEC_runtime_control_grp FM-MACSEC Runtime Control Data Unit + + @Description FM MACSEC runtime control data unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function FM_MACSEC_GetRevision + + @Description Return MACSEC HW chip revision + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + @Param[out] p_MacsecRevision MACSEC revision as defined by the chip. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only after FM_MACSEC_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_GetRevision(t_Handle h_FmMacsec, uint32_t *p_MacsecRevision); + +/**************************************************************************//** + @Function FM_MACSEC_Enable + + @Description This routine should be called after MACSEC is initialized for enabling all + MACSEC engines according to their existing configuration. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_Init() and when MACSEC is disabled. +*//***************************************************************************/ +t_Error FM_MACSEC_Enable(t_Handle h_FmMacsec); + +/**************************************************************************//** + @Function FM_MACSEC_Disable + + @Description This routine may be called when MACSEC is enabled in order to + disable all MACSEC engines; The MACSEC is working in bypass mode. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_Init() and when MACSEC is enabled. +*//***************************************************************************/ +t_Error FM_MACSEC_Disable(t_Handle h_FmMacsec); + +/**************************************************************************//** + @Function FM_MACSEC_SetException + + @Description Calling this routine enables/disables the specified exception. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + @Param[in] exception The exception to be selected. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SetException(t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable); + +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) +/**************************************************************************//** + @Function FM_MACSEC_DumpRegs + + @Description Dump internal registers. + + @Param[in] h_FmMacsec - FM MACSEC module descriptor. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only after FM_MACSEC_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_DumpRegs(t_Handle h_FmMacsec); +#endif /* (defined(DEBUG_ERRORS) && ... */ + +#ifdef VERIFICATION_SUPPORT +/********************* VERIFICATION ONLY ********************************/ +/**************************************************************************//** + @Function FM_MACSEC_BackdoorSet + + @Description Set register of the MACSEC memory map + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + @Param[out] offset Register offset. + @Param[out] value Value to write. + + + @Return None + + @Cautions Allowed only following FM_MACSEC_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_BackdoorSet(t_Handle h_FmMacsec, uint32_t offset, uint32_t value); + +/**************************************************************************//** + @Function FM_MACSEC_BackdoorGet + + @Description Read from register of the MACSEC memory map. + + @Param[in] h_FmMacsec FM MACSEC module descriptor. + @Param[out] offset Register offset. + + @Return Value read + + @Cautions Allowed only following FM_MACSEC_Init(). +*//***************************************************************************/ +uint32_t FM_MACSEC_BackdoorGet(t_Handle h_FmMacsec, uint32_t offset); +#endif /* VERIFICATION_SUPPORT */ + +/** @} */ /* end of FM_MACSEC_runtime_control_grp group */ + + +/**************************************************************************//** + @Group FM_MACSEC_SECY_grp FM-MACSEC SecY + + @Description FM-MACSEC SecY API functions, definitions and enums + + @{ +*//***************************************************************************/ + +typedef uint8_t macsecSAKey_t[32]; +typedef uint64_t macsecSCI_t; +typedef uint8_t macsecAN_t; + +/**************************************************************************//** +@Description MACSEC SECY Cipher Suite +*//***************************************************************************/ +typedef enum e_FmMacsecSecYCipherSuite { + e_FM_MACSEC_SECY_GCM_AES_128 = 0, /**< GCM-AES-128 */ +#if (DPAA_VERSION >= 11) + e_FM_MACSEC_SECY_GCM_AES_256 /**< GCM-AES-256 */ +#endif /* (DPAA_VERSION >= 11) */ +} e_FmMacsecSecYCipherSuite; + +/**************************************************************************//** + @Description MACSEC SECY Exceptions +*//***************************************************************************/ +typedef enum e_FmMacsecSecYExceptions { + e_FM_MACSEC_SECY_EX_FRAME_DISCARDED /**< Frame Discarded */ +} e_FmMacsecSecYExceptions; + +/**************************************************************************//** + @Description MACSEC SECY Events +*//***************************************************************************/ +typedef enum e_FmMacsecSecYEvents { + e_FM_MACSEC_SECY_EV_NEXT_PN /**< Next Packet Number exhaustion threshold reached */ +} e_FmMacsecSecYEvents; + +/**************************************************************************//** + @Collection MACSEC SECY Frame Discarded Descriptor error +*//***************************************************************************/ +typedef uint8_t macsecTxScFrameDiscardedErrSelect_t; /**< typedef for defining Frame Discarded Descriptor errors */ + +#define FM_MACSEC_SECY_TX_SC_FRM_DISCAR_ERR_NEXT_PN_ZERO 0x8000 /**< NextPn == 0 */ +#define FM_MACSEC_SECY_TX_SC_FRM_DISCAR_ERR_SC_DISBALE 0x4000 /**< SC is disable */ +/* @} */ + +/**************************************************************************//** + @Function t_FmMacsecSecYExceptionsCallback + + @Description Exceptions user callback routine, will be called upon an + exception passing the exception identification. + + @Param[in] h_App A handle to an application layer object; This handle + will be passed by the driver upon calling this callback. + @Param[in] exception The exception. +*//***************************************************************************/ +typedef void (t_FmMacsecSecYExceptionsCallback) ( t_Handle h_App, + e_FmMacsecSecYExceptions exception); + +/**************************************************************************//** + @Function t_FmMacsecSecYEventsCallback + + @Description Events user callback routine, will be called upon an + event passing the event identification. + + @Param[in] h_App A handle to an application layer object; This handle + will be passed by the driver upon calling this callback. + @Param[in] event The event. +*//***************************************************************************/ +typedef void (t_FmMacsecSecYEventsCallback) ( t_Handle h_App, + e_FmMacsecSecYEvents event); + +/**************************************************************************//** + @Description RFC2863 MIB +*//***************************************************************************/ +typedef struct t_MIBStatistics { + uint64_t ifInOctets; /**< Total number of byte received */ + uint64_t ifInPkts; /**< Total number of packets received */ + uint64_t ifInMcastPkts; /**< Total number of multicast frame received */ + uint64_t ifInBcastPkts; /**< Total number of broadcast frame received */ + uint64_t ifInDiscards; /**< Frames received, but discarded due to problems within the MAC RX : + - InPktsNoTag, + - InPktsLate, + - InPktsOverrun */ + uint64_t ifInErrors; /**< Number of frames received with error: + - InPktsBadTag, + - InPktsNoSCI, + - InPktsNotUsingSA + - InPktsNotValid */ + uint64_t ifOutOctets; /**< Total number of byte sent */ + uint64_t ifOutPkts; /**< Total number of packets sent */ + uint64_t ifOutMcastPkts; /**< Total number of multicast frame sent */ + uint64_t ifOutBcastPkts; /**< Total number of multicast frame sent */ + uint64_t ifOutDiscards; /**< Frames received, but discarded due to problems within the MAC TX N/A! */ + uint64_t ifOutErrors; /**< Number of frames transmitted with error: + - FIFO Overflow Error + - FIFO Underflow Error + - Other */ +} t_MIBStatistics; + +/**************************************************************************//** + @Description MACSEC SecY Rx SA Statistics +*//***************************************************************************/ +typedef struct t_FmMacsecSecYRxSaStatistics { + uint32_t inPktsOK; /**< The number of frames with resolved SCI, have passed all + frame validation frame validation with the validateFrame not set to disable */ + uint32_t inPktsInvalid; /**< The number of frames with resolved SCI, that have failed frame + validation with the validateFrame set to check */ + uint32_t inPktsNotValid; /**< The number of frames with resolved SCI, discarded on the controlled port, + that have failed frame validation with the validateFrame set to strict or the c bit is set */ + uint32_t inPktsNotUsingSA; /**< The number of frames received with resolved SCI and discarded on disabled or + not provisioned SA with validateFrame in the strict mode or the C bit is set */ + uint32_t inPktsUnusedSA; /**< The number of frames received with resolved SCI on disabled or not provisioned SA + with validateFrame not in the strict mode and the C bit is cleared */ +} t_FmMacsecSecYRxSaStatistics; + +/**************************************************************************//** + @Description MACSEC SecY Tx SA Statistics +*//***************************************************************************/ +typedef struct t_FmMacsecSecYTxSaStatistics { + uint64_t outPktsProtected; /**< The number of frames, that the user of the controlled port requested to + be transmitted, which were integrity protected */ + uint64_t outPktsEncrypted; /**< The number of frames, that the user of the controlled port requested to + be transmitted, which were confidentiality protected */ +} t_FmMacsecSecYTxSaStatistics; + +/**************************************************************************//** + @Description MACSEC SecY Rx SC Statistics +*//***************************************************************************/ +typedef struct t_FmMacsecSecYRxScStatistics { + uint64_t inPktsUnchecked; /**< The number of frames with resolved SCI, delivered to the user of a controlled port, + that are not validated with the validateFrame set to disable */ + uint64_t inPktsDelayed; /**< The number of frames with resolved SCI, delivered to the user of a controlled port, + that have their PN smaller than the lowest_PN with the validateFrame set to + disable or replayProtect disabled */ + uint64_t inPktsLate; /**< The number of frames with resolved SCI, discarded on the controlled port, + that have their PN smaller than the lowest_PN with the validateFrame set to + Check or Strict and replayProtect enabled */ + uint64_t inPktsOK; /**< The number of frames with resolved SCI, have passed all + frame validation frame validation with the validateFrame not set to disable */ + uint64_t inPktsInvalid; /**< The number of frames with resolved SCI, that have failed frame + validation with the validateFrame set to check */ + uint64_t inPktsNotValid; /**< The number of frames with resolved SCI, discarded on the controlled port, + that have failed frame validation with the validateFrame set to strict or the c bit is set */ + uint64_t inPktsNotUsingSA; /**< The number of frames received with resolved SCI and discarded on disabled or + not provisioned SA with validateFrame in the strict mode or the C bit is set */ + uint64_t inPktsUnusedSA; /**< The number of frames received with resolved SCI on disabled or not provisioned SA + with validateFrame not in the strict mode and the C bit is cleared */ +} t_FmMacsecSecYRxScStatistics; + +/**************************************************************************//** + @Description MACSEC SecY Tx SC Statistics +*//***************************************************************************/ +typedef struct t_FmMacsecSecYTxScStatistics { + uint64_t outPktsProtected; /**< The number of frames, that the user of the controlled port requested to + be transmitted, which were integrity protected */ + uint64_t outPktsEncrypted; /**< The number of frames, that the user of the controlled port requested to + be transmitted, which were confidentiality protected */ +} t_FmMacsecSecYTxScStatistics; + +/**************************************************************************//** + @Description MACSEC SecY Statistics +*//***************************************************************************/ +typedef struct t_FmMacsecSecYStatistics { + t_MIBStatistics mibCtrlStatistics; /**< Controlled port MIB statistics */ + t_MIBStatistics mibNonCtrlStatistics; /**< Uncontrolled port MIB statistics */ +/* Frame verification statistics */ + uint64_t inPktsUntagged; /**< The number of received packets without the MAC security tag + (SecTAG) with validateFrames which is not in the strict mode */ + uint64_t inPktsNoTag; /**< The number of received packets discarded without the + MAC security tag (SecTAG) with validateFrames which is in the strict mode */ + uint64_t inPktsBadTag; /**< The number of received packets discarded with an invalid + SecTAG or a zero value PN or an invalid ICV */ + uint64_t inPktsUnknownSCI; /**< The number of received packets with unknown SCI with the + condition : validateFrames is not in the strict mode and the + C bit in the SecTAG is not set */ + uint64_t inPktsNoSCI; /**< The number of received packets discarded with unknown SCI + information with the condition : validateFrames is in the strict mode + or the C bit in the SecTAG is set */ + uint64_t inPktsOverrun; /**< The number of packets discarded because the number of + received packets exceeded the cryptographic performance capabilities */ +/* Frame validation statistics */ + uint64_t inOctetsValidated; /**< The number of octets of plaintext recovered from received frames with + resolved SCI that were integrity protected but not encrypted */ + uint64_t inOctetsDecrypted; /**< The number of octets of plaintext recovered from received frames with + resolved SCI that were integrity protected and encrypted */ +/* Frame generation statistics */ + uint64_t outPktsUntagged; /**< The number of frames, that the user of the controlled port requested to + be transmitted, with protectFrame false */ + uint64_t outPktsTooLong; /**< The number of frames, that the user of the controlled port requested to + be transmitted, discarded due to length being larger than Maximum Frame Length (MACSEC_MFL) */ +/* Frame protection statistics */ + uint64_t outOctetsProtected; /**< The number of octets of User Data in transmitted frames that were + integrity protected but not encrypted */ + uint64_t outOctetsEncrypted; /**< The number of octets of User Data in transmitted frames that were + both integrity protected and encrypted */ +} t_FmMacsecSecYStatistics; + + +/**************************************************************************//** + @Description MACSEC SecY SC Params +*//***************************************************************************/ +typedef struct t_FmMacsecSecYSCParams { + macsecSCI_t sci; /**< The secure channel identification of the SC */ + e_FmMacsecSecYCipherSuite cipherSuite; /**< Cipher suite to be used for the SC */ +} t_FmMacsecSecYSCParams; + +/**************************************************************************//** + @Group FM_MACSEC_SECY_init_grp FM-MACSEC SecY Initialization Unit + + @Description FM-MACSEC SecY Initialization Unit + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description enum for validate frames +*//***************************************************************************/ +typedef enum e_FmMacsecValidFrameBehavior { + e_FM_MACSEC_VALID_FRAME_BEHAVIOR_DISABLE = 0, /**< disable the validation function */ + e_FM_MACSEC_VALID_FRAME_BEHAVIOR_CHECK, /**< enable the validation function but only for checking + without filtering out invalid frames */ + e_FM_MACSEC_VALID_FRAME_BEHAVIOR_STRICT /**< enable the validation function and also strictly filter + out those invalid frames */ +} e_FmMacsecValidFrameBehavior; + +/**************************************************************************//** + @Description enum for sci insertion +*//***************************************************************************/ +typedef enum e_FmMacsecSciInsertionMode { + e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_SECTAG = 0, /**< explicit sci in the sectag */ + e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_MAC_SA, /**< mac sa is overwritten with the sci*/ + e_FM_MACSEC_SCI_INSERTION_MODE_IMPLICT_PTP /**< implicit point-to-point sci (pre-shared) */ +} e_FmMacsecSciInsertionMode; + +/**************************************************************************//** + @Description FM MACSEC SecY config input +*//***************************************************************************/ +typedef struct t_FmMacsecSecYParams { + t_Handle h_FmMacsec; /**< A handle to the FM MACSEC object */ + t_FmMacsecSecYSCParams txScParams; /**< Tx SC Params */ + uint32_t numReceiveChannels; /**< Number of receive channels dedicated to this SecY */ + t_FmMacsecSecYExceptionsCallback *f_Exception; /**< Callback routine to be called by the driver upon SecY exception */ + t_FmMacsecSecYEventsCallback *f_Event; /**< Callback routine to be called by the driver upon SecY event */ + t_Handle h_App; /**< A handle to an application layer object; This handle will + be passed by the driver upon calling the above callbacks */ +} t_FmMacsecSecYParams; + +/**************************************************************************//** + @Function FM_MACSEC_SECY_Config + + @Description Creates descriptor for the FM MACSEC SECY module; + + The routine returns a handle (descriptor) to the FM MACSEC SECY object; + This descriptor must be passed as first parameter to all other + FM MACSEC SECY function calls; + No actual initialization or configuration of FM MACSEC SecY hardware is + done by this routine. + + @Param[in] p_FmMacsecSecYParam Pointer to data structure of parameters. + + @Return Handle to FM MACSEC SECY object, or NULL for Failure. +*//***************************************************************************/ +t_Handle FM_MACSEC_SECY_Config(t_FmMacsecSecYParams *p_FmMacsecSecYParam); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_Init + + @Description Initializes the FM MACSEC SECY module. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_Init(t_Handle h_FmMacsecSecY); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_Free + + @Description Frees all resources that were assigned to FM MACSEC SECY module. + + Calling this routine invalidates the descriptor. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_Free(t_Handle h_FmMacsecSecY); + +/**************************************************************************//** + @Group FM_MACSEC_SECY_advanced_init_grp FM-MACSEC SecY Advanced Configuration Unit + + @Description Configuration functions used to change default values. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function FM_MACSEC_SECY_ConfigSciInsertionMode + + @Description Calling this routine changes the SCI-insertion-mode in the + internal driver data base from its default configuration + [DEFAULT_sciInsertionMode] + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] sciInsertionMode Sci insertion mode + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init(); + +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_ConfigSciInsertionMode(t_Handle h_FmMacsecSecY, e_FmMacsecSciInsertionMode sciInsertionMode); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_ConfigProtectFrames + + @Description Calling this routine changes the protect-frame mode in the + internal driver data base from its default configuration + [DEFAULT_protectFrames] + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] protectFrames If FALSE, frames are transmitted without modification + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init(); + +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_ConfigProtectFrames(t_Handle h_FmMacsecSecY, bool protectFrames); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_ConfigReplayWindow + + @Description Calling this routine changes the replay-window settings in the + internal driver data base from its default configuration + [DEFAULT_replayEnable], [DEFAULT_replayWindow] + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] replayProtect; Replay protection function mode + @Param[in] replayWindow; The size of the replay window + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init(); + +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_ConfigReplayWindow(t_Handle h_FmMacsecSecY, bool replayProtect, uint32_t replayWindow); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_ConfigValidationMode + + @Description Calling this routine changes the frame-validation-behavior mode + in the internal driver data base from its default configuration + [DEFAULT_validateFrames] + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] validateFrames Validation function mode + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init(); + +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_ConfigValidationMode(t_Handle h_FmMacsecSecY, e_FmMacsecValidFrameBehavior validateFrames); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_ConfigConfidentiality + + @Description Calling this routine changes the confidentiality settings in the + internal driver data base from its default configuration + [DEFAULT_confidentialityEnable], [DEFAULT_confidentialityOffset] + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] confidentialityEnable TRUE - confidentiality protection and integrity protection + FALSE - no confidentiality protection, only integrity protection + @Param[in] confidentialityOffset The number of initial octets of each MSDU without confidentiality protection + common values are 0, 30, and 50 + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init(); + +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_ConfigConfidentiality(t_Handle h_FmMacsecSecY, bool confidentialityEnable, uint16_t confidentialityOffset); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_ConfigPointToPoint + + @Description configure this SecY to work in point-to-point mode, means that + it will have only one rx sc; + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init(); + Can be called only once in a system; only the first secY that will call this + routine will be able to operate in Point-To-Point mode. +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_ConfigPointToPoint(t_Handle h_FmMacsecSecY); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_ConfigException + + @Description Calling this routine changes the internal driver data base + from its default selection of exceptions enablement; + By default all exceptions are enabled. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] exception The exception to be selected. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_ConfigException(t_Handle h_FmMacsecSecY, e_FmMacsecSecYExceptions exception, bool enable); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_ConfigEvent + + @Description Calling this routine changes the internal driver data base + from its default selection of events enablement; + By default all events are enabled. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] event The event to be selected. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_ConfigEvent(t_Handle h_FmMacsecSecY, e_FmMacsecSecYEvents event, bool enable); + +/** @} */ /* end of FM_MACSEC_SECY_advanced_init_grp group */ +/** @} */ /* end of FM_MACSEC_SECY_init_grp group */ + + +/**************************************************************************//** + @Group FM_MACSEC_SECY_runtime_control_grp FM-MACSEC SecY Runtime Control Unit + + @Description FM MACSEC SECY Runtime control unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function FM_MACSEC_SECY_CreateRxSc + + @Description Create a receive secure channel. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] scParams secure channel params. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Handle FM_MACSEC_SECY_CreateRxSc(t_Handle h_FmMacsecSecY, t_FmMacsecSecYSCParams *p_ScParams); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_DeleteRxSc + + @Description Deleting an initialized secure channel. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSc(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_DeleteRxSc(t_Handle h_FmMacsecSecY, t_Handle h_Sc); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_CreateRxSa + + @Description Create a receive secure association for the secure channel; + the SA cannot be used to receive frames until FM_MACSEC_SECY_RxSaEnableReceive is called. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc. + @Param[in] an association number represent the SA. + @Param[in] lowestPn the lowest acceptable PN value for a received frame. + @Param[in] key the desired key for this SA. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSc(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_CreateRxSa(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t lowestPn, macsecSAKey_t key); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_DeleteRxSa + + @Description Deleting an initialized secure association. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc. + @Param[in] an association number represent the SA. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_DeleteRxSa(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_RxSaEnableReceive + + @Description Enabling the SA to receive frames. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc. + @Param[in] an association number represent the SA. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSa(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_RxSaEnableReceive(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_RxSaDisableReceive + + @Description Disabling the SA from receive frames. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc. + @Param[in] an association number represent the SA. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSa(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_RxSaDisableReceive(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_RxSaUpdateNextPn + + @Description Update the next packet number expected on RX; + The value of nextPN shall be set to the greater of its existing value and the + supplied of updtNextPN (802.1AE-2006 10.7.15). + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc. + @Param[in] an association number represent the SA. + @Param[in] updtNextPN the next PN value for a received frame. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSa(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_RxSaUpdateNextPn(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t updtNextPN); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_RxSaUpdateLowestPn + + @Description Update the lowest packet number expected on RX; + The value of lowestPN shall be set to the greater of its existing value and the + supplied of updtLowestPN (802.1AE-2006 10.7.15). + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc. + @Param[in] an association number represent the SA. + @Param[in] updtLowestPN the lowest PN acceptable value for a received frame. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSa(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_RxSaUpdateLowestPn(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t updtLowestPN); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_RxSaModifyKey + + @Description Modify the current key of the SA with a new one. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc. + @Param[in] an association number represent the SA. + @Param[in] key new key to replace the current key. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSa(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_RxSaModifyKey(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, macsecSAKey_t key); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_CreateTxSa + + @Description Create a transmit secure association for the secure channel; + the SA cannot be used to transmit frames until FM_MACSEC_SECY_TxSaSetActivate is called; + Only one SA can be active at a time. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] an association number represent the SA. + @Param[in] key the desired key for this SA. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_CreateTxSa(t_Handle h_FmMacsecSecY, macsecAN_t an, macsecSAKey_t key); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_DeleteTxSa + + @Description Deleting an initialized secure association. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] an association number represent the SA. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_DeleteTxSa(t_Handle h_FmMacsecSecY, macsecAN_t an); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_TxSaModifyKey + + @Description Modify the key of the inactive SA with a new one. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] nextActiveAn association number represent the next SA to be activated. + @Param[in] key new key to replace the current key. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_TxSaModifyKey(t_Handle h_FmMacsecSecY, macsecAN_t nextActiveAn, macsecSAKey_t key); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_TxSaSetActive + + @Description Set this SA to the active SA to be used on TX for SC; + only one SA can be active at a time. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] an association number represent the SA. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_TxSaSetActive(t_Handle h_FmMacsecSecY, macsecAN_t an); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_TxSaGetActive + + @Description Get the active SA that being used for TX. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[out] p_An the active an. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_TxSaGetActive(t_Handle h_FmMacsecSecY, macsecAN_t *p_An); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_GetStatistics + + @Description get all statistics counters. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] p_Statistics Structure with statistics. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_GetStatistics(t_Handle h_FmMacsecSecY, t_FmMacsecSecYStatistics *p_Statistics); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_RxScGetStatistics + + @Description get all statistics counters. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] h_Sc Rx Sc handle. + @Param[in] p_Statistics Structure with statistics. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_RxScGetStatistics(t_Handle h_FmMacsecSecY, t_Handle h_Sc, t_FmMacsecSecYRxScStatistics *p_Statistics); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_RxSaGetStatistics + + @Description get all statistics counters + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] h_Sc Rx Sc handle. + @Param[in] an association number represent the SA. + @Param[in] p_Statistics Structure with statistics. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_RxSaGetStatistics(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, t_FmMacsecSecYRxSaStatistics *p_Statistics); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_TxScGetStatistics + + @Description get all statistics counters. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] p_Statistics Structure with statistics. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_TxScGetStatistics(t_Handle h_FmMacsecSecY, t_FmMacsecSecYTxScStatistics *p_Statistics); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_TxSaGetStatistics + + @Description get all statistics counters. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] an association number represent the SA. + @Param[in] p_Statistics Structure with statistics. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_TxSaGetStatistics(t_Handle h_FmMacsecSecY, macsecAN_t an, t_FmMacsecSecYTxSaStatistics *p_Statistics); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_SetException + + @Description Calling this routine enables/disables the specified exception. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] exception The exception to be selected. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_SetException(t_Handle h_FmMacsecSecY, e_FmMacsecExceptions exception, bool enable); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_SetEvent + + @Description Calling this routine enables/disables the specified event. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] event The event to be selected. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_SetEvent(t_Handle h_FmMacsecSecY, e_FmMacsecSecYEvents event, bool enable); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_GetRxScPhysId + + @Description return the physical id of the Secure Channel. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc. + @Param[out] p_ScPhysId the SC physical id. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSc(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_GetRxScPhysId(t_Handle h_FmMacsecSecY, t_Handle h_Sc, uint32_t *p_ScPhysId); + +/**************************************************************************//** + @Function FM_MACSEC_SECY_GetTxScPhysId + + @Description return the physical id of the Secure Channel. + + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor. + @Param[out] p_ScPhysId the SC physical id. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_MACSEC_SECY_Init(). +*//***************************************************************************/ +t_Error FM_MACSEC_SECY_GetTxScPhysId(t_Handle h_FmMacsecSecY, uint32_t *p_ScPhysId); + +/** @} */ /* end of FM_MACSEC_SECY_runtime_control_grp group */ +/** @} */ /* end of FM_MACSEC_SECY_grp group */ +/** @} */ /* end of FM_MACSEC_grp group */ +/** @} */ /* end of FM_grp group */ + + +#endif /* __FM_MACSEC_EXT_H */ diff --git a/sys/contrib/ncsw/inc/Peripherals/fm_muram_ext.h b/sys/contrib/ncsw/inc/Peripherals/fm_muram_ext.h new file mode 100644 index 000000000000..ef62c8ef28d5 --- /dev/null +++ b/sys/contrib/ncsw/inc/Peripherals/fm_muram_ext.h @@ -0,0 +1,170 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File fm_muram_ext.h + + @Description FM MURAM Application Programming Interface. +*//***************************************************************************/ +#ifndef __FM_MURAM_EXT +#define __FM_MURAM_EXT + +#include "error_ext.h" +#include "std_ext.h" + + +/**************************************************************************//** + + @Group FM_grp Frame Manager API + + @Description FM API functions, definitions and enums + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group FM_muram_grp FM MURAM + + @Description FM MURAM API functions, definitions and enums + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group FM_muram_init_grp FM MURAM Initialization Unit + + @Description FM MURAM initialization API functions, definitions and enums + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function FM_MURAM_ConfigAndInit + + @Description Creates partition in the MURAM. + + The routine returns a handle (descriptor) to the MURAM partition. + This descriptor must be passed as first parameter to all other + FM-MURAM function calls. + + No actual initialization or configuration of FM_MURAM hardware is + done by this routine. + + @Param[in] baseAddress - Pointer to base of memory mapped FM-MURAM. + @Param[in] size - Size of the FM-MURAM partition. + + @Return Handle to FM-MURAM object, or NULL for Failure. +*//***************************************************************************/ +t_Handle FM_MURAM_ConfigAndInit(uintptr_t baseAddress, uint32_t size); + +/**************************************************************************//** + @Function FM_MURAM_Free + + @Description Frees all resources that were assigned to FM-MURAM module. + + Calling this routine invalidates the descriptor. + + @Param[in] h_FmMuram - FM-MURAM module descriptor. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_MURAM_Free(t_Handle h_FmMuram); + +/** @} */ /* end of FM_muram_init_grp group */ + + +/**************************************************************************//** + @Group FM_muram_ctrl_grp FM MURAM Control Unit + + @Description FM MURAM control API functions, definitions and enums + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function FM_MURAM_AllocMem + + @Description Allocate some memory from FM-MURAM partition. + + @Param[in] h_FmMuram - FM-MURAM module descriptor. + @Param[in] size - size of the memory to be allocated. + @Param[in] align - Alignment of the memory. + + @Return address of the allocated memory; NULL otherwise. +*//***************************************************************************/ +void * FM_MURAM_AllocMem(t_Handle h_FmMuram, uint32_t size, uint32_t align); + +/**************************************************************************//** + @Function FM_MURAM_AllocMemForce + + @Description Allocate some specific memory from FM-MURAM partition (according + to base). + + @Param[in] h_FmMuram - FM-MURAM module descriptor. + @Param[in] base - the desired base-address to be allocated. + @Param[in] size - size of the memory to be allocated. + + @Return address of the allocated memory; NULL otherwise. +*//***************************************************************************/ +void * FM_MURAM_AllocMemForce(t_Handle h_FmMuram, uint64_t base, uint32_t size); + +/**************************************************************************//** + @Function FM_MURAM_FreeMem + + @Description Free an allocated memory from FM-MURAM partition. + + @Param[in] h_FmMuram - FM-MURAM module descriptor. + @Param[in] ptr - A pointer to an allocated memory. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_MURAM_FreeMem(t_Handle h_FmMuram, void *ptr); + +/**************************************************************************//** + @Function FM_MURAM_GetFreeMemSize + + @Description Returns the size (in bytes) of free MURAM memory. + + @Param[in] h_FmMuram - FM-MURAM module descriptor. + + @Return Free MURAM memory size in bytes. +*//***************************************************************************/ +uint64_t FM_MURAM_GetFreeMemSize(t_Handle h_FmMuram); + +/** @} */ /* end of FM_muram_ctrl_grp group */ +/** @} */ /* end of FM_muram_grp group */ +/** @} */ /* end of FM_grp group */ + + + +#endif /* __FM_MURAM_EXT */ diff --git a/sys/contrib/ncsw/inc/Peripherals/fm_pcd_ext.h b/sys/contrib/ncsw/inc/Peripherals/fm_pcd_ext.h new file mode 100644 index 000000000000..8d1c3d889451 --- /dev/null +++ b/sys/contrib/ncsw/inc/Peripherals/fm_pcd_ext.h @@ -0,0 +1,3974 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File fm_pcd_ext.h + + @Description FM PCD API definitions +*//***************************************************************************/ +#ifndef __FM_PCD_EXT +#define __FM_PCD_EXT + +#include "std_ext.h" +#include "net_ext.h" +#include "list_ext.h" +#include "fm_ext.h" +#include "fsl_fman_kg.h" + + +/**************************************************************************//** + @Group FM_grp Frame Manager API + + @Description Frame Manager Application Programming Interface + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group FM_PCD_grp FM PCD + + @Description Frame Manager PCD (Parse-Classify-Distribute) API. + + The FM PCD module is responsible for the initialization of all + global classifying FM modules. This includes the parser general and + common registers, the key generator global and common registers, + and the policer global and common registers. + In addition, the FM PCD SW module will initialize all required + key generator schemes, coarse classification flows, and policer + profiles. When FM module is configured to work with one of these + entities, it will register to it using the FM PORT API. The PCD + module will manage the PCD resources - i.e. resource management of + KeyGen schemes, etc. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Collection General PCD defines +*//***************************************************************************/ +#define FM_PCD_MAX_NUM_OF_PRIVATE_HDRS 2 /**< Number of units/headers saved for user */ + +#define FM_PCD_PRS_NUM_OF_HDRS 16 /**< Number of headers supported by HW parser */ +#define FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS (32 - FM_PCD_MAX_NUM_OF_PRIVATE_HDRS) + /**< Number of distinction units is limited by + register size (32 bits) minus reserved bits + for private headers. */ +#define FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS 4 /**< Maximum number of interchangeable headers + in a distinction unit */ +#define FM_PCD_KG_NUM_OF_GENERIC_REGS FM_KG_NUM_OF_GENERIC_REGS /**< Total number of generic KeyGen registers */ +#define FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY 35 /**< Max number allowed on any configuration; + For HW implementation reasons, in most + cases less than this will be allowed; The + driver will return an initialization error + if resource is unavailable. */ +#define FM_PCD_KG_NUM_OF_EXTRACT_MASKS 4 /**< Total number of masks allowed on KeyGen extractions. */ +#define FM_PCD_KG_NUM_OF_DEFAULT_GROUPS 16 /**< Number of default value logical groups */ + +#define FM_PCD_PRS_NUM_OF_LABELS 32 /**< Maximum number of SW parser labels */ +#define FM_SW_PRS_MAX_IMAGE_SIZE (FM_PCD_SW_PRS_SIZE /*- FM_PCD_PRS_SW_OFFSET -FM_PCD_PRS_SW_TAIL_SIZE*/-FM_PCD_PRS_SW_PATCHES_SIZE) + /**< Maximum size of SW parser code */ + +#define FM_PCD_MAX_MANIP_INSRT_TEMPLATE_SIZE 128 /**< Maximum size of insertion template for + insert manipulation */ + +#if (DPAA_VERSION >= 11) +#define FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES 64 /**< Maximum possible entries for frame replicator group */ +#endif /* (DPAA_VERSION >= 11) */ +/* @} */ + + +/**************************************************************************//** + @Group FM_PCD_init_grp FM PCD Initialization Unit + + @Description Frame Manager PCD Initialization Unit API + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description PCD counters +*//***************************************************************************/ +typedef enum e_FmPcdCounters { + e_FM_PCD_KG_COUNTERS_TOTAL, /**< KeyGen counter */ + e_FM_PCD_PLCR_COUNTERS_RED, /**< Policer counter - counts the total number of RED packets that exit the Policer. */ + e_FM_PCD_PLCR_COUNTERS_YELLOW, /**< Policer counter - counts the total number of YELLOW packets that exit the Policer. */ + e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED, /**< Policer counter - counts the number of packets that changed color to RED by the Policer; + This is a subset of e_FM_PCD_PLCR_COUNTERS_RED packet count, indicating active color changes. */ + e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW, /**< Policer counter - counts the number of packets that changed color to YELLOW by the Policer; + This is a subset of e_FM_PCD_PLCR_COUNTERS_YELLOW packet count, indicating active color changes. */ + e_FM_PCD_PLCR_COUNTERS_TOTAL, /**< Policer counter - counts the total number of packets passed in the Policer. */ + e_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH, /**< Policer counter - counts the number of packets with length mismatch. */ + e_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH, /**< Parser counter - counts the number of times the parser block is dispatched. */ + e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED, /**< Parser counter - counts the number of times L2 parse result is returned (including errors). */ + e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED, /**< Parser counter - counts the number of times L3 parse result is returned (including errors). */ + e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED, /**< Parser counter - counts the number of times L4 parse result is returned (including errors). */ + e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED, /**< Parser counter - counts the number of times SHIM parse result is returned (including errors). */ + e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR, /**< Parser counter - counts the number of times L2 parse result is returned with errors. */ + e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR, /**< Parser counter - counts the number of times L3 parse result is returned with errors. */ + e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR, /**< Parser counter - counts the number of times L4 parse result is returned with errors. */ + e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR, /**< Parser counter - counts the number of times SHIM parse result is returned with errors. */ + e_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES, /**< Parser counter - counts the number of cycles spent executing soft parser instruction (including stall cycles). */ + e_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES, /**< Parser counter - counts the number of cycles stalled waiting for parser internal memory reads while executing soft parser instruction. */ + e_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES, /**< Parser counter - counts the number of cycles spent executing hard parser (including stall cycles). */ + e_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES, /**< MURAM counter - counts the number of cycles while performing FMan Memory read. */ + e_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES, /**< MURAM counter - counts the number of cycles stalled while performing FMan Memory read. */ + e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES, /**< MURAM counter - counts the number of cycles while performing FMan Memory write. */ + e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES, /**< MURAM counter - counts the number of cycles stalled while performing FMan Memory write. */ + e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES /**< FPM counter - counts the number of cycles stalled while performing a FPM Command. */ +} e_FmPcdCounters; + +/**************************************************************************//** + @Description PCD interrupts +*//***************************************************************************/ +typedef enum e_FmPcdExceptions { + e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC, /**< KeyGen double-bit ECC error is detected on internal memory read access. */ + e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW, /**< KeyGen scheme configuration error indicating a key size larger than 56 bytes. */ + e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC, /**< Policer double-bit ECC error has been detected on PRAM read access. */ + e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR, /**< Policer access to a non-initialized profile has been detected. */ + e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE, /**< Policer RAM self-initialization complete */ + e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE, /**< Policer atomic action complete */ + e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC, /**< Parser double-bit ECC error */ + e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC /**< Parser single-bit ECC error */ +} e_FmPcdExceptions; + + +/**************************************************************************//** + @Description Exceptions user callback routine, will be called upon an + exception passing the exception identification. + + @Param[in] h_App - User's application descriptor. + @Param[in] exception - The exception. + *//***************************************************************************/ +typedef void (t_FmPcdExceptionCallback) (t_Handle h_App, e_FmPcdExceptions exception); + +/**************************************************************************//** + @Description Exceptions user callback routine, will be called upon an exception + passing the exception identification. + + @Param[in] h_App - User's application descriptor. + @Param[in] exception - The exception. + @Param[in] index - id of the relevant source (may be scheme or profile id). + *//***************************************************************************/ +typedef void (t_FmPcdIdExceptionCallback) ( t_Handle h_App, + e_FmPcdExceptions exception, + uint16_t index); + +/**************************************************************************//** + @Description A callback for enqueuing frame onto a QM queue. + + @Param[in] h_QmArg - Application's handle passed to QM module on enqueue. + @Param[in] p_Fd - Frame descriptor for the frame. + + @Return E_OK on success; Error code otherwise. + *//***************************************************************************/ +typedef t_Error (t_FmPcdQmEnqueueCallback) (t_Handle h_QmArg, void *p_Fd); + +/**************************************************************************//** + @Description Host-Command parameters structure. + + When using Host command for PCD functionalities, a dedicated port + must be used. If this routine is called for a PCD in a single partition + environment, or it is the Master partition in a Multi-partition + environment, The port will be initialized by the PCD driver + initialization routine. + *//***************************************************************************/ +typedef struct t_FmPcdHcParams { + uintptr_t portBaseAddr; /**< Virtual Address of Host-Command Port memory mapped registers.*/ + uint8_t portId; /**< Port Id (0-6 relative to Host-Command/Offline-Parsing ports); + NOTE: When configuring Host Command port for + FMANv3 devices (DPAA_VERSION 11 and higher), + portId=0 MUST be used. */ + uint16_t liodnBase; /**< LIODN base for this port, to be used together with LIODN offset + (irrelevant for P4080 revision 1.0) */ + uint32_t errFqid; /**< Host-Command Port error queue Id. */ + uint32_t confFqid; /**< Host-Command Port confirmation queue Id. */ + uint32_t qmChannel; /**< QM channel dedicated to this Host-Command port; + will be used by the FM for dequeue. */ + t_FmPcdQmEnqueueCallback *f_QmEnqueue; /**< Callback routine for enqueuing a frame to the QM */ + t_Handle h_QmArg; /**< Application's handle passed to QM module on enqueue */ +} t_FmPcdHcParams; + +/**************************************************************************//** + @Description The main structure for PCD initialization + *//***************************************************************************/ +typedef struct t_FmPcdParams { + bool prsSupport; /**< TRUE if Parser will be used for any of the FM ports. */ + bool ccSupport; /**< TRUE if Coarse Classification will be used for any + of the FM ports. */ + bool kgSupport; /**< TRUE if KeyGen will be used for any of the FM ports. */ + bool plcrSupport; /**< TRUE if Policer will be used for any of the FM ports. */ + t_Handle h_Fm; /**< A handle to the FM module. */ + uint8_t numOfSchemes; /**< Number of schemes dedicated to this partition. + this parameter is relevant if 'kgSupport'=TRUE. */ + bool useHostCommand; /**< Optional for single partition, Mandatory for Multi partition */ + t_FmPcdHcParams hc; /**< Host Command parameters, relevant only if 'useHostCommand'=TRUE; + Relevant when FM not runs in "guest-mode". */ + + t_FmPcdExceptionCallback *f_Exception; /**< Callback routine for general PCD exceptions; + Relevant when FM not runs in "guest-mode". */ + t_FmPcdIdExceptionCallback *f_ExceptionId; /**< Callback routine for specific KeyGen scheme or + Policer profile exceptions; + Relevant when FM not runs in "guest-mode". */ + t_Handle h_App; /**< A handle to an application layer object; This handle will + be passed by the driver upon calling the above callbacks; + Relevant when FM not runs in "guest-mode". */ + uint8_t partPlcrProfilesBase; /**< The first policer-profile-id dedicated to this partition. + this parameter is relevant if 'plcrSupport'=TRUE. + NOTE: this parameter relevant only when working with multiple partitions. */ + uint16_t partNumOfPlcrProfiles; /**< Number of policer-profiles dedicated to this partition. + this parameter is relevant if 'plcrSupport'=TRUE. + NOTE: this parameter relevant only when working with multiple partitions. */ +} t_FmPcdParams; + + +/**************************************************************************//** + @Function FM_PCD_Config + + @Description Basic configuration of the PCD module. + Creates descriptor for the FM PCD module. + + @Param[in] p_FmPcdParams A structure of parameters for the initialization of PCD. + + @Return A handle to the initialized module. +*//***************************************************************************/ +t_Handle FM_PCD_Config(t_FmPcdParams *p_FmPcdParams); + +/**************************************************************************//** + @Function FM_PCD_Init + + @Description Initialization of the PCD module. + + @Param[in] h_FmPcd - FM PCD module descriptor. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_PCD_Init(t_Handle h_FmPcd); + +/**************************************************************************//** + @Function FM_PCD_Free + + @Description Frees all resources that were assigned to FM module. + + Calling this routine invalidates the descriptor. + + @Param[in] h_FmPcd - FM PCD module descriptor. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_PCD_Free(t_Handle h_FmPcd); + +/**************************************************************************//** + @Group FM_PCD_advanced_cfg_grp FM PCD Advanced Configuration Unit + + @Description Frame Manager PCD Advanced Configuration API. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function FM_PCD_ConfigException + + @Description Calling this routine changes the internal driver data base + from its default selection of exceptions enabling. + [DEFAULT_numOfSharedPlcrProfiles]. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] exception The exception to be selected. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it. + + @Return E_OK on success; Error code otherwise. + + @Cautions This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_PCD_ConfigException(t_Handle h_FmPcd, e_FmPcdExceptions exception, bool enable); + +/**************************************************************************//** + @Function FM_PCD_ConfigHcFramesDataMemory + + @Description Configures memory-partition-id for FMan-Controller Host-Command + frames. Calling this routine changes the internal driver data + base from its default configuration [0]. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] memId Memory partition ID. + + @Return E_OK on success; Error code otherwise. + + @Cautions This routine may be called only if 'useHostCommand' was TRUE + when FM_PCD_Config() routine was called. +*//***************************************************************************/ +t_Error FM_PCD_ConfigHcFramesDataMemory(t_Handle h_FmPcd, uint8_t memId); + +/**************************************************************************//** + @Function FM_PCD_ConfigPlcrNumOfSharedProfiles + + @Description Calling this routine changes the internal driver data base + from its default selection of exceptions enablement. + [DEFAULT_numOfSharedPlcrProfiles]. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] numOfSharedPlcrProfiles Number of profiles to + be shared between ports on this partition + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_PCD_ConfigPlcrNumOfSharedProfiles(t_Handle h_FmPcd, uint16_t numOfSharedPlcrProfiles); + +/**************************************************************************//** + @Function FM_PCD_ConfigPlcrAutoRefreshMode + + @Description Calling this routine changes the internal driver data base + from its default selection of exceptions enablement. + By default auto-refresh is [DEFAULT_plcrAutoRefresh]. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] enable TRUE to enable, FALSE to disable + + @Return E_OK on success; Error code otherwise. + + @Cautions This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_PCD_ConfigPlcrAutoRefreshMode(t_Handle h_FmPcd, bool enable); + +/**************************************************************************//** + @Function FM_PCD_ConfigPrsMaxCycleLimit + + @Description Calling this routine changes the internal data structure for + the maximum parsing time from its default value + [DEFAULT_MAX_PRS_CYC_LIM]. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] value 0 to disable the mechanism, or new + maximum parsing time. + + @Return E_OK on success; Error code otherwise. + + @Cautions This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_PCD_ConfigPrsMaxCycleLimit(t_Handle h_FmPcd,uint16_t value); + +/** @} */ /* end of FM_PCD_advanced_cfg_grp group */ +/** @} */ /* end of FM_PCD_init_grp group */ + + +/**************************************************************************//** + @Group FM_PCD_Runtime_grp FM PCD Runtime Unit + + @Description Frame Manager PCD Runtime Unit API + + The runtime control allows creation of PCD infrastructure modules + such as Network Environment Characteristics, Classification Plan + Groups and Coarse Classification Trees. + It also allows on-the-fly initialization, modification and removal + of PCD modules such as KeyGen schemes, coarse classification nodes + and Policer profiles. + + In order to explain the programming model of the PCD driver interface + a few terms should be explained, and will be used below. + - Distinction Header - One of the 16 protocols supported by the FM parser, + or one of the SHIM headers (1 or 2). May be a header with a special + option (see below). + - Interchangeable Headers Group - This is a group of Headers recognized + by either one of them. For example, if in a specific context the user + chooses to treat IPv4 and IPV6 in the same way, they may create an + interchangeable Headers Unit consisting of these 2 headers. + - A Distinction Unit - a Distinction Header or an Interchangeable Headers + Group. + - Header with special option - applies to Ethernet, MPLS, VLAN, IPv4 and + IPv6, includes multicast, broadcast and other protocol specific options. + In terms of hardware it relates to the options available in the classification + plan. + - Network Environment Characteristics - a set of Distinction Units that define + the total recognizable header selection for a certain environment. This is + NOT the list of all headers that will ever appear in a flow, but rather + everything that needs distinction in a flow, where distinction is made by KeyGen + schemes and coarse classification action descriptors. + + The PCD runtime modules initialization is done in stages. The first stage after + initializing the PCD module itself is to establish a Network Flows Environment + Definition. The application may choose to establish one or more such environments. + Later, when needed, the application will have to state, for some of its modules, + to which single environment it belongs. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description A structure for SW parser labels + *//***************************************************************************/ +typedef struct t_FmPcdPrsLabelParams { + uint32_t instructionOffset; /**< SW parser label instruction offset (2 bytes + resolution), relative to Parser RAM. */ + e_NetHeaderType hdr; /**< The existence of this header will invoke + the SW parser code; Use HEADER_TYPE_NONE + to indicate that sw parser is to run + independent of the existence of any protocol + (run before HW parser). */ + uint8_t indexPerHdr; /**< Normally 0, if more than one SW parser + attachments for the same header, use this + index to distinguish between them. */ +} t_FmPcdPrsLabelParams; + +/**************************************************************************//** + @Description A structure for SW parser + *//***************************************************************************/ +typedef struct t_FmPcdPrsSwParams { + bool override; /**< FALSE to invoke a check that nothing else + was loaded to this address, including + internal patches. + TRUE to override any existing code.*/ + uint32_t size; /**< SW parser code size */ + uint16_t base; /**< SW parser base (in instruction counts! + must be larger than 0x20)*/ + uint8_t *p_Code; /**< SW parser code */ + uint32_t swPrsDataParams[FM_PCD_PRS_NUM_OF_HDRS]; + /**< SW parser data (parameters) */ + uint8_t numOfLabels; /**< Number of labels for SW parser. */ + t_FmPcdPrsLabelParams labelsTable[FM_PCD_PRS_NUM_OF_LABELS]; + /**< SW parser labels table, containing + numOfLabels entries */ +} t_FmPcdPrsSwParams; + + +/**************************************************************************//** + @Function FM_PCD_Enable + + @Description This routine should be called after PCD is initialized for enabling all + PCD engines according to their existing configuration. + + @Param[in] h_FmPcd FM PCD module descriptor. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init() and when PCD is disabled. +*//***************************************************************************/ +t_Error FM_PCD_Enable(t_Handle h_FmPcd); + +/**************************************************************************//** + @Function FM_PCD_Disable + + @Description This routine may be called when PCD is enabled in order to + disable all PCD engines. It may be called + only when none of the ports in the system are using the PCD. + + @Param[in] h_FmPcd FM PCD module descriptor. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init() and when PCD is enabled. +*//***************************************************************************/ +t_Error FM_PCD_Disable(t_Handle h_FmPcd); + +/**************************************************************************//** + @Function FM_PCD_GetCounter + + @Description Reads one of the FM PCD counters. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] counter The requested counter. + + @Return Counter's current value. + + @Cautions Allowed only following FM_PCD_Init(). + Note that it is user's responsibility to call this routine only + for enabled counters, and there will be no indication if a + disabled counter is accessed. +*//***************************************************************************/ +uint32_t FM_PCD_GetCounter(t_Handle h_FmPcd, e_FmPcdCounters counter); + +/**************************************************************************//** +@Function FM_PCD_PrsLoadSw + +@Description This routine may be called in order to load software parsing code. + + +@Param[in] h_FmPcd FM PCD module descriptor. +@Param[in] p_SwPrs A pointer to a structure of software + parser parameters, including the software + parser image. + +@Return E_OK on success; Error code otherwise. + +@Cautions Allowed only following FM_PCD_Init() and when PCD is disabled. + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_PCD_PrsLoadSw(t_Handle h_FmPcd, t_FmPcdPrsSwParams *p_SwPrs); + +/**************************************************************************//** +@Function FM_PCD_SetAdvancedOffloadSupport + +@Description This routine must be called in order to support the following features: + IP-fragmentation, IP-reassembly, IPsec, Header-manipulation, frame-replicator. + +@Param[in] h_FmPcd FM PCD module descriptor. + +@Return E_OK on success; Error code otherwise. + +@Cautions Allowed only following FM_PCD_Init() and when PCD is disabled. + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_PCD_SetAdvancedOffloadSupport(t_Handle h_FmPcd); + +/**************************************************************************//** + @Function FM_PCD_KgSetDfltValue + + @Description Calling this routine sets a global default value to be used + by the KeyGen when parser does not recognize a required + field/header. + By default default values are 0. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] valueId 0,1 - one of 2 global default values. + @Param[in] value The requested default value. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init() and when PCD is disabled. + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_PCD_KgSetDfltValue(t_Handle h_FmPcd, uint8_t valueId, uint32_t value); + +/**************************************************************************//** + @Function FM_PCD_KgSetAdditionalDataAfterParsing + + @Description Calling this routine allows the KeyGen to access data past + the parser finishing point. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] payloadOffset the number of bytes beyond the parser location. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init() and when PCD is disabled. + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_PCD_KgSetAdditionalDataAfterParsing(t_Handle h_FmPcd, uint8_t payloadOffset); + +/**************************************************************************//** + @Function FM_PCD_SetException + + @Description Calling this routine enables/disables PCD interrupts. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] exception The exception to be selected. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_PCD_SetException(t_Handle h_FmPcd, e_FmPcdExceptions exception, bool enable); + +/**************************************************************************//** + @Function FM_PCD_ModifyCounter + + @Description Sets a value to an enabled counter. Use "0" to reset the counter. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] counter The requested counter. + @Param[in] value The requested value to be written into the counter. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_PCD_ModifyCounter(t_Handle h_FmPcd, e_FmPcdCounters counter, uint32_t value); + +/**************************************************************************//** + @Function FM_PCD_SetPlcrStatistics + + @Description This routine may be used to enable/disable policer statistics + counter. By default the statistics is enabled. + + @Param[in] h_FmPcd FM PCD module descriptor + @Param[in] enable TRUE to enable, FALSE to disable. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_PCD_SetPlcrStatistics(t_Handle h_FmPcd, bool enable); + +/**************************************************************************//** + @Function FM_PCD_SetPrsStatistics + + @Description Defines whether to gather parser statistics including all ports. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] enable TRUE to enable, FALSE to disable. + + @Return None + + @Cautions Allowed only following FM_PCD_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +void FM_PCD_SetPrsStatistics(t_Handle h_FmPcd, bool enable); + +/**************************************************************************//** + @Function FM_PCD_HcTxConf + + @Description This routine should be called to confirm frames that were + received on the HC confirmation queue. + + @Param[in] h_FmPcd A handle to an FM PCD Module. + @Param[in] p_Fd Frame descriptor of the received frame. + + @Cautions Allowed only following FM_PCD_Init(). Allowed only if 'useHostCommand' + option was selected in the initialization. +*//***************************************************************************/ +void FM_PCD_HcTxConf(t_Handle h_FmPcd, t_DpaaFD *p_Fd); + +/**************************************************************************//* + @Function FM_PCD_ForceIntr + + @Description Causes an interrupt event on the requested source. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] exception An exception to be forced. + + @Return E_OK on success; Error code if the exception is not enabled, + or is not able to create interrupt. + + @Cautions Allowed only following FM_PCD_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_PCD_ForceIntr (t_Handle h_FmPcd, e_FmPcdExceptions exception); + +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) +/**************************************************************************//** + @Function FM_PCD_DumpRegs + + @Description Dumps all PCD registers + + @Param[in] h_FmPcd A handle to an FM PCD Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). + NOTE: this routine may be called only for FM in master mode + (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers + are mapped. +*//***************************************************************************/ +t_Error FM_PCD_DumpRegs(t_Handle h_FmPcd); + +/**************************************************************************//** + @Function FM_PCD_KgDumpRegs + + @Description Dumps all PCD KG registers + + @Param[in] h_FmPcd A handle to an FM PCD Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). + NOTE: this routine may be called only for FM in master mode + (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers + are mapped. +*//***************************************************************************/ +t_Error FM_PCD_KgDumpRegs(t_Handle h_FmPcd); + +/**************************************************************************//** + @Function FM_PCD_PlcrDumpRegs + + @Description Dumps all PCD Policer registers + + @Param[in] h_FmPcd A handle to an FM PCD Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). + NOTE: this routine may be called only for FM in master mode + (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers + are mapped. +*//***************************************************************************/ +t_Error FM_PCD_PlcrDumpRegs(t_Handle h_FmPcd); + +/**************************************************************************//** + @Function FM_PCD_PlcrProfileDumpRegs + + @Description Dumps all PCD Policer profile registers + + @Param[in] h_Profile A handle to a Policer profile. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). + NOTE: this routine may be called only for FM in master mode + (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers + are mapped. +*//***************************************************************************/ +t_Error FM_PCD_PlcrProfileDumpRegs(t_Handle h_Profile); + +/**************************************************************************//** + @Function FM_PCD_PrsDumpRegs + + @Description Dumps all PCD Parser registers + + @Param[in] h_FmPcd A handle to an FM PCD Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). + NOTE: this routine may be called only for FM in master mode + (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers + are mapped. +*//***************************************************************************/ +t_Error FM_PCD_PrsDumpRegs(t_Handle h_FmPcd); + +/**************************************************************************//** + @Function FM_PCD_HcDumpRegs + + @Description Dumps HC Port registers + + @Param[in] h_FmPcd A handle to an FM PCD Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). + NOTE: this routine may be called only for FM in master mode + (i.e. 'guestId'=NCSW_MASTER_ID). +*//***************************************************************************/ +t_Error FM_PCD_HcDumpRegs(t_Handle h_FmPcd); +#endif /* (defined(DEBUG_ERRORS) && ... */ + + + +/**************************************************************************//** + KeyGen FM_PCD_Runtime_build_grp FM PCD Runtime Building Unit + + @Description Frame Manager PCD Runtime Building API + + This group contains routines for setting, deleting and modifying + PCD resources, for defining the total PCD tree. + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Collection Definitions of coarse classification + parameters as required by KeyGen (when coarse classification + is the next engine after this scheme). +*//***************************************************************************/ +#define FM_PCD_MAX_NUM_OF_CC_TREES 8 +#define FM_PCD_MAX_NUM_OF_CC_GROUPS 16 +#define FM_PCD_MAX_NUM_OF_CC_UNITS 4 +#define FM_PCD_MAX_NUM_OF_KEYS 256 +#define FM_PCD_MAX_NUM_OF_FLOWS (4*KILOBYTE) +#define FM_PCD_MAX_SIZE_OF_KEY 56 +#define FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP 16 +#define FM_PCD_LAST_KEY_INDEX 0xffff + +#define FM_PCD_MAX_NUM_OF_CC_NODES 255 /* Obsolete, not used - will be removed in the future */ +/* @} */ + +/**************************************************************************//** + @Collection A set of definitions to allow protocol + special option description. +*//***************************************************************************/ +typedef uint32_t protocolOpt_t; /**< A general type to define a protocol option. */ + +typedef protocolOpt_t ethProtocolOpt_t; /**< Ethernet protocol options. */ +#define ETH_BROADCAST 0x80000000 /**< Ethernet Broadcast. */ +#define ETH_MULTICAST 0x40000000 /**< Ethernet Multicast. */ + +typedef protocolOpt_t vlanProtocolOpt_t; /**< VLAN protocol options. */ +#define VLAN_STACKED 0x20000000 /**< Stacked VLAN. */ + +typedef protocolOpt_t mplsProtocolOpt_t; /**< MPLS protocol options. */ +#define MPLS_STACKED 0x10000000 /**< Stacked MPLS. */ + +typedef protocolOpt_t ipv4ProtocolOpt_t; /**< IPv4 protocol options. */ +#define IPV4_BROADCAST_1 0x08000000 /**< IPv4 Broadcast. */ +#define IPV4_MULTICAST_1 0x04000000 /**< IPv4 Multicast. */ +#define IPV4_UNICAST_2 0x02000000 /**< Tunneled IPv4 - Unicast. */ +#define IPV4_MULTICAST_BROADCAST_2 0x01000000 /**< Tunneled IPv4 - Broadcast/Multicast. */ + +#define IPV4_FRAG_1 0x00000008 /**< IPV4 reassembly option. + IPV4 Reassembly manipulation requires network + environment with IPV4 header and IPV4_FRAG_1 option */ + +typedef protocolOpt_t ipv6ProtocolOpt_t; /**< IPv6 protocol options. */ +#define IPV6_MULTICAST_1 0x00800000 /**< IPv6 Multicast. */ +#define IPV6_UNICAST_2 0x00400000 /**< Tunneled IPv6 - Unicast. */ +#define IPV6_MULTICAST_2 0x00200000 /**< Tunneled IPv6 - Multicast. */ + +#define IPV6_FRAG_1 0x00000004 /**< IPV6 reassembly option. + IPV6 Reassembly manipulation requires network + environment with IPV6 header and IPV6_FRAG_1 option; + in case where fragment found, the fragment-extension offset + may be found at 'shim2' (in parser-result). */ +#if (DPAA_VERSION >= 11) +typedef protocolOpt_t capwapProtocolOpt_t; /**< CAPWAP protocol options. */ +#define CAPWAP_FRAG_1 0x00000008 /**< CAPWAP reassembly option. + CAPWAP Reassembly manipulation requires network + environment with CAPWAP header and CAPWAP_FRAG_1 option; + in case where fragment found, the fragment-extension offset + may be found at 'shim2' (in parser-result). */ +#endif /* (DPAA_VERSION >= 11) */ + + +/* @} */ + +#define FM_PCD_MANIP_MAX_HDR_SIZE 256 +#define FM_PCD_MANIP_DSCP_TO_VLAN_TRANS 64 + +/**************************************************************************//** + @Collection A set of definitions to support Header Manipulation selection. +*//***************************************************************************/ +typedef uint32_t hdrManipFlags_t; /**< A general type to define a HMan update command flags. */ + +typedef hdrManipFlags_t ipv4HdrManipUpdateFlags_t; /**< IPv4 protocol HMan update command flags. */ + +#define HDR_MANIP_IPV4_TOS 0x80000000 /**< update TOS with the given value ('tos' field + of t_FmPcdManipHdrFieldUpdateIpv4) */ +#define HDR_MANIP_IPV4_ID 0x40000000 /**< update IP ID with the given value ('id' field + of t_FmPcdManipHdrFieldUpdateIpv4) */ +#define HDR_MANIP_IPV4_TTL 0x20000000 /**< Decrement TTL by 1 */ +#define HDR_MANIP_IPV4_SRC 0x10000000 /**< update IP source address with the given value + ('src' field of t_FmPcdManipHdrFieldUpdateIpv4) */ +#define HDR_MANIP_IPV4_DST 0x08000000 /**< update IP destination address with the given value + ('dst' field of t_FmPcdManipHdrFieldUpdateIpv4) */ + +typedef hdrManipFlags_t ipv6HdrManipUpdateFlags_t; /**< IPv6 protocol HMan update command flags. */ + +#define HDR_MANIP_IPV6_TC 0x80000000 /**< update Traffic Class address with the given value + ('trafficClass' field of t_FmPcdManipHdrFieldUpdateIpv6) */ +#define HDR_MANIP_IPV6_HL 0x40000000 /**< Decrement Hop Limit by 1 */ +#define HDR_MANIP_IPV6_SRC 0x20000000 /**< update IP source address with the given value + ('src' field of t_FmPcdManipHdrFieldUpdateIpv6) */ +#define HDR_MANIP_IPV6_DST 0x10000000 /**< update IP destination address with the given value + ('dst' field of t_FmPcdManipHdrFieldUpdateIpv6) */ + +typedef hdrManipFlags_t tcpUdpHdrManipUpdateFlags_t;/**< TCP/UDP protocol HMan update command flags. */ + +#define HDR_MANIP_TCP_UDP_SRC 0x80000000 /**< update TCP/UDP source address with the given value + ('src' field of t_FmPcdManipHdrFieldUpdateTcpUdp) */ +#define HDR_MANIP_TCP_UDP_DST 0x40000000 /**< update TCP/UDP destination address with the given value + ('dst' field of t_FmPcdManipHdrFieldUpdateTcpUdp) */ +#define HDR_MANIP_TCP_UDP_CHECKSUM 0x20000000 /**< update TCP/UDP checksum */ + +/* @} */ + +/**************************************************************************//** + @Description A type used for returning the order of the key extraction. + each value in this array represents the index of the extraction + command as defined by the user in the initialization extraction array. + The valid size of this array is the user define number of extractions + required (also marked by the second '0' in this array). +*//***************************************************************************/ +typedef uint8_t t_FmPcdKgKeyOrder [FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY]; + +/**************************************************************************//** + @Description All PCD engines +*//***************************************************************************/ +typedef enum e_FmPcdEngine { + e_FM_PCD_INVALID = 0, /**< Invalid PCD engine */ + e_FM_PCD_DONE, /**< No PCD Engine indicated */ + e_FM_PCD_KG, /**< KeyGen */ + e_FM_PCD_CC, /**< Coarse classifier */ + e_FM_PCD_PLCR, /**< Policer */ + e_FM_PCD_PRS, /**< Parser */ +#if (DPAA_VERSION >= 11) + e_FM_PCD_FR, /**< Frame-Replicator */ +#endif /* (DPAA_VERSION >= 11) */ + e_FM_PCD_HASH /**< Hash table */ +} e_FmPcdEngine; + +/**************************************************************************//** + @Description Enumeration type for selecting extraction by header types +*//***************************************************************************/ +typedef enum e_FmPcdExtractByHdrType { + e_FM_PCD_EXTRACT_FROM_HDR, /**< Extract bytes from header */ + e_FM_PCD_EXTRACT_FROM_FIELD, /**< Extract bytes from header field */ + e_FM_PCD_EXTRACT_FULL_FIELD /**< Extract a full field */ +} e_FmPcdExtractByHdrType; + +/**************************************************************************//** + @Description Enumeration type for selecting extraction source + (when it is not the header) +*//***************************************************************************/ +typedef enum e_FmPcdExtractFrom { + e_FM_PCD_EXTRACT_FROM_FRAME_START, /**< KG & CC: Extract from beginning of frame */ + e_FM_PCD_EXTRACT_FROM_DFLT_VALUE, /**< KG only: Extract from a default value */ + e_FM_PCD_EXTRACT_FROM_CURR_END_OF_PARSE, /**< KG & CC: Extract from the point where parsing had finished */ + e_FM_PCD_EXTRACT_FROM_KEY, /**< CC only: Field where saved KEY */ + e_FM_PCD_EXTRACT_FROM_HASH, /**< CC only: Field where saved HASH */ + e_FM_PCD_EXTRACT_FROM_PARSE_RESULT, /**< KG only: Extract from the parser result */ + e_FM_PCD_EXTRACT_FROM_ENQ_FQID, /**< KG & CC: Extract from enqueue FQID */ + e_FM_PCD_EXTRACT_FROM_FLOW_ID /**< CC only: Field where saved Dequeue FQID */ +} e_FmPcdExtractFrom; + +/**************************************************************************//** + @Description Enumeration type for selecting extraction type +*//***************************************************************************/ +typedef enum e_FmPcdExtractType { + e_FM_PCD_EXTRACT_BY_HDR, /**< Extract according to header */ + e_FM_PCD_EXTRACT_NON_HDR, /**< Extract from data that is not the header */ + e_FM_PCD_KG_EXTRACT_PORT_PRIVATE_INFO /**< Extract private info as specified by user */ +} e_FmPcdExtractType; + +/**************************************************************************//** + @Description Enumeration type for selecting default extraction value +*//***************************************************************************/ +typedef enum e_FmPcdKgExtractDfltSelect { + e_FM_PCD_KG_DFLT_GBL_0, /**< Default selection is KG register 0 */ + e_FM_PCD_KG_DFLT_GBL_1, /**< Default selection is KG register 1 */ + e_FM_PCD_KG_DFLT_PRIVATE_0, /**< Default selection is a per scheme register 0 */ + e_FM_PCD_KG_DFLT_PRIVATE_1, /**< Default selection is a per scheme register 1 */ + e_FM_PCD_KG_DFLT_ILLEGAL /**< Illegal selection */ +} e_FmPcdKgExtractDfltSelect; + +/**************************************************************************//** + @Description Enumeration type defining all default groups - each group shares + a default value, one of four user-initialized values. +*//***************************************************************************/ +typedef enum e_FmPcdKgKnownFieldsDfltTypes { + e_FM_PCD_KG_MAC_ADDR, /**< MAC Address */ + e_FM_PCD_KG_TCI, /**< TCI field */ + e_FM_PCD_KG_ENET_TYPE, /**< ENET Type */ + e_FM_PCD_KG_PPP_SESSION_ID, /**< PPP Session id */ + e_FM_PCD_KG_PPP_PROTOCOL_ID, /**< PPP Protocol id */ + e_FM_PCD_KG_MPLS_LABEL, /**< MPLS label */ + e_FM_PCD_KG_IP_ADDR, /**< IP address */ + e_FM_PCD_KG_PROTOCOL_TYPE, /**< Protocol type */ + e_FM_PCD_KG_IP_TOS_TC, /**< TOS or TC */ + e_FM_PCD_KG_IPV6_FLOW_LABEL, /**< IPV6 flow label */ + e_FM_PCD_KG_IPSEC_SPI, /**< IPSEC SPI */ + e_FM_PCD_KG_L4_PORT, /**< L4 Port */ + e_FM_PCD_KG_TCP_FLAG, /**< TCP Flag */ + e_FM_PCD_KG_GENERIC_FROM_DATA, /**< grouping implemented by SW, + any data extraction that is not the full + field described above */ + e_FM_PCD_KG_GENERIC_FROM_DATA_NO_V, /**< grouping implemented by SW, + any data extraction without validation */ + e_FM_PCD_KG_GENERIC_NOT_FROM_DATA /**< grouping implemented by SW, + extraction from parser result or + direct use of default value */ +} e_FmPcdKgKnownFieldsDfltTypes; + +/**************************************************************************//** + @Description Enumeration type for defining header index for scenarios with + multiple (tunneled) headers +*//***************************************************************************/ +typedef enum e_FmPcdHdrIndex { + e_FM_PCD_HDR_INDEX_NONE = 0, /**< used when multiple headers not used, also + to specify regular IP (not tunneled). */ + e_FM_PCD_HDR_INDEX_1, /**< may be used for VLAN, MPLS, tunneled IP */ + e_FM_PCD_HDR_INDEX_2, /**< may be used for MPLS, tunneled IP */ + e_FM_PCD_HDR_INDEX_3, /**< may be used for MPLS */ + e_FM_PCD_HDR_INDEX_LAST = 0xFF /**< may be used for VLAN, MPLS */ +} e_FmPcdHdrIndex; + +/**************************************************************************//** + @Description Enumeration type for selecting the policer profile functional type +*//***************************************************************************/ +typedef enum e_FmPcdProfileTypeSelection { + e_FM_PCD_PLCR_PORT_PRIVATE, /**< Port dedicated profile */ + e_FM_PCD_PLCR_SHARED /**< Shared profile (shared within partition) */ +} e_FmPcdProfileTypeSelection; + +/**************************************************************************//** + @Description Enumeration type for selecting the policer profile algorithm +*//***************************************************************************/ +typedef enum e_FmPcdPlcrAlgorithmSelection { + e_FM_PCD_PLCR_PASS_THROUGH, /**< Policer pass through */ + e_FM_PCD_PLCR_RFC_2698, /**< Policer algorithm RFC 2698 */ + e_FM_PCD_PLCR_RFC_4115 /**< Policer algorithm RFC 4115 */ +} e_FmPcdPlcrAlgorithmSelection; + +/**************************************************************************//** + @Description Enumeration type for selecting a policer profile color mode +*//***************************************************************************/ +typedef enum e_FmPcdPlcrColorMode { + e_FM_PCD_PLCR_COLOR_BLIND, /**< Color blind */ + e_FM_PCD_PLCR_COLOR_AWARE /**< Color aware */ +} e_FmPcdPlcrColorMode; + +/**************************************************************************//** + @Description Enumeration type for selecting a policer profile color +*//***************************************************************************/ +typedef enum e_FmPcdPlcrColor { + e_FM_PCD_PLCR_GREEN, /**< Green color code */ + e_FM_PCD_PLCR_YELLOW, /**< Yellow color code */ + e_FM_PCD_PLCR_RED, /**< Red color code */ + e_FM_PCD_PLCR_OVERRIDE /**< Color override code */ +} e_FmPcdPlcrColor; + +/**************************************************************************//** + @Description Enumeration type for selecting the policer profile packet frame length selector +*//***************************************************************************/ +typedef enum e_FmPcdPlcrFrameLengthSelect { + e_FM_PCD_PLCR_L2_FRM_LEN, /**< L2 frame length */ + e_FM_PCD_PLCR_L3_FRM_LEN, /**< L3 frame length */ + e_FM_PCD_PLCR_L4_FRM_LEN, /**< L4 frame length */ + e_FM_PCD_PLCR_FULL_FRM_LEN /**< Full frame length */ +} e_FmPcdPlcrFrameLengthSelect; + +/**************************************************************************//** + @Description Enumeration type for selecting roll-back frame +*//***************************************************************************/ +typedef enum e_FmPcdPlcrRollBackFrameSelect { + e_FM_PCD_PLCR_ROLLBACK_L2_FRM_LEN, /**< Roll-back L2 frame length */ + e_FM_PCD_PLCR_ROLLBACK_FULL_FRM_LEN /**< Roll-back Full frame length */ +} e_FmPcdPlcrRollBackFrameSelect; + +/**************************************************************************//** + @Description Enumeration type for selecting the policer profile packet or byte mode +*//***************************************************************************/ +typedef enum e_FmPcdPlcrRateMode { + e_FM_PCD_PLCR_BYTE_MODE, /**< Byte mode */ + e_FM_PCD_PLCR_PACKET_MODE /**< Packet mode */ +} e_FmPcdPlcrRateMode; + +/**************************************************************************//** + @Description Enumeration type for defining action of frame +*//***************************************************************************/ +typedef enum e_FmPcdDoneAction { + e_FM_PCD_ENQ_FRAME = 0, /**< Enqueue frame */ + e_FM_PCD_DROP_FRAME /**< Mark this frame as error frame and continue + to error flow; 'FM_PORT_FRM_ERR_CLS_DISCARD' + flag will be set for this frame. */ +} e_FmPcdDoneAction; + +/**************************************************************************//** + @Description Enumeration type for selecting the policer counter +*//***************************************************************************/ +typedef enum e_FmPcdPlcrProfileCounters { + e_FM_PCD_PLCR_PROFILE_GREEN_PACKET_TOTAL_COUNTER, /**< Green packets counter */ + e_FM_PCD_PLCR_PROFILE_YELLOW_PACKET_TOTAL_COUNTER, /**< Yellow packets counter */ + e_FM_PCD_PLCR_PROFILE_RED_PACKET_TOTAL_COUNTER, /**< Red packets counter */ + e_FM_PCD_PLCR_PROFILE_RECOLOURED_YELLOW_PACKET_TOTAL_COUNTER, /**< Recolored yellow packets counter */ + e_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER /**< Recolored red packets counter */ +} e_FmPcdPlcrProfileCounters; + +/**************************************************************************//** + @Description Enumeration type for selecting the PCD action after extraction +*//***************************************************************************/ +typedef enum e_FmPcdAction { + e_FM_PCD_ACTION_NONE, /**< NONE */ + e_FM_PCD_ACTION_EXACT_MATCH, /**< Exact match on the selected extraction */ + e_FM_PCD_ACTION_INDEXED_LOOKUP /**< Indexed lookup on the selected extraction */ +} e_FmPcdAction; + +/**************************************************************************//** + @Description Enumeration type for selecting type of insert manipulation +*//***************************************************************************/ +typedef enum e_FmPcdManipHdrInsrtType { + e_FM_PCD_MANIP_INSRT_GENERIC, /**< Insert according to offset & size */ + e_FM_PCD_MANIP_INSRT_BY_HDR, /**< Insert according to protocol */ +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) + e_FM_PCD_MANIP_INSRT_BY_TEMPLATE /**< Insert template to start of frame */ +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */ +} e_FmPcdManipHdrInsrtType; + +/**************************************************************************//** + @Description Enumeration type for selecting type of remove manipulation +*//***************************************************************************/ +typedef enum e_FmPcdManipHdrRmvType { + e_FM_PCD_MANIP_RMV_GENERIC, /**< Remove according to offset & size */ + e_FM_PCD_MANIP_RMV_BY_HDR /**< Remove according to offset & size */ +} e_FmPcdManipHdrRmvType; + +/**************************************************************************//** + @Description Enumeration type for selecting specific L2 fields removal +*//***************************************************************************/ +typedef enum e_FmPcdManipHdrRmvSpecificL2 { + e_FM_PCD_MANIP_HDR_RMV_ETHERNET, /**< Ethernet/802.3 MAC */ + e_FM_PCD_MANIP_HDR_RMV_STACKED_QTAGS, /**< stacked QTags */ + e_FM_PCD_MANIP_HDR_RMV_ETHERNET_AND_MPLS, /**< MPLS and Ethernet/802.3 MAC header until + the header which follows the MPLS header */ + e_FM_PCD_MANIP_HDR_RMV_MPLS, /**< Remove MPLS header (Unlimited MPLS labels) */ + e_FM_PCD_MANIP_HDR_RMV_PPPOE /**< Remove the PPPoE header and PPP protocol field. */ +} e_FmPcdManipHdrRmvSpecificL2; + +/**************************************************************************//** + @Description Enumeration type for selecting specific fields updates +*//***************************************************************************/ +typedef enum e_FmPcdManipHdrFieldUpdateType { + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN, /**< VLAN updates */ + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV4, /**< IPV4 updates */ + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV6, /**< IPV6 updates */ + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_TCP_UDP, /**< TCP_UDP updates */ +} e_FmPcdManipHdrFieldUpdateType; + +/**************************************************************************//** + @Description Enumeration type for selecting VLAN updates +*//***************************************************************************/ +typedef enum e_FmPcdManipHdrFieldUpdateVlan { + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN_VPRI, /**< Replace VPri of outer most VLAN tag. */ + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN /**< DSCP to VLAN priority bits translation */ +} e_FmPcdManipHdrFieldUpdateVlan; + +/**************************************************************************//** + @Description Enumeration type for selecting specific L2 header insertion +*//***************************************************************************/ +typedef enum e_FmPcdManipHdrInsrtSpecificL2 { + e_FM_PCD_MANIP_HDR_INSRT_MPLS, /**< Insert MPLS header (Unlimited MPLS labels) */ + e_FM_PCD_MANIP_HDR_INSRT_PPPOE /**< Insert PPPOE */ +} e_FmPcdManipHdrInsrtSpecificL2; + +#if (DPAA_VERSION >= 11) +/**************************************************************************//** + @Description Enumeration type for selecting QoS mapping mode + + Note: In all cases except 'e_FM_PCD_MANIP_HDR_QOS_MAPPING_NONE' + User should instruct the port to read the hash-result +*//***************************************************************************/ +typedef enum e_FmPcdManipHdrQosMappingMode { + e_FM_PCD_MANIP_HDR_QOS_MAPPING_NONE = 0, /**< No mapping, QoS field will not be changed */ + e_FM_PCD_MANIP_HDR_QOS_MAPPING_AS_IS, /**< QoS field will be overwritten by the last byte in the hash-result. */ +} e_FmPcdManipHdrQosMappingMode; + +/**************************************************************************//** + @Description Enumeration type for selecting QoS source + + Note: In all cases except 'e_FM_PCD_MANIP_HDR_QOS_SRC_NONE' + User should left room for the hash-result on input/output buffer + and instruct the port to read/write the hash-result to the buffer (RPD should be set) +*//***************************************************************************/ +typedef enum e_FmPcdManipHdrQosSrc { + e_FM_PCD_MANIP_HDR_QOS_SRC_NONE = 0, /**< TODO */ + e_FM_PCD_MANIP_HDR_QOS_SRC_USER_DEFINED, /**< QoS will be taken from the last byte in the hash-result. */ +} e_FmPcdManipHdrQosSrc; +#endif /* (DPAA_VERSION >= 11) */ + +/**************************************************************************//** + @Description Enumeration type for selecting type of header insertion +*//***************************************************************************/ +typedef enum e_FmPcdManipHdrInsrtByHdrType { + e_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2, /**< Specific L2 fields insertion */ +#if (DPAA_VERSION >= 11) + e_FM_PCD_MANIP_INSRT_BY_HDR_IP, /**< IP insertion */ + e_FM_PCD_MANIP_INSRT_BY_HDR_UDP, /**< UDP insertion */ + e_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE, /**< UDP lite insertion */ + e_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP /**< CAPWAP insertion */ +#endif /* (DPAA_VERSION >= 11) */ +} e_FmPcdManipHdrInsrtByHdrType; + +/**************************************************************************//** + @Description Enumeration type for selecting specific customCommand +*//***************************************************************************/ +typedef enum e_FmPcdManipHdrCustomType { + e_FM_PCD_MANIP_HDR_CUSTOM_IP_REPLACE, /**< Replace IPv4/IPv6 */ + e_FM_PCD_MANIP_HDR_CUSTOM_GEN_FIELD_REPLACE, /**< Replace IPv4/IPv6 */ +} e_FmPcdManipHdrCustomType; + +/**************************************************************************//** + @Description Enumeration type for selecting specific customCommand +*//***************************************************************************/ +typedef enum e_FmPcdManipHdrCustomIpReplace { + e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV4_BY_IPV6, /**< Replace IPv4 by IPv6 */ + e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4 /**< Replace IPv6 by IPv4 */ +} e_FmPcdManipHdrCustomIpReplace; + +/**************************************************************************//** + @Description Enumeration type for selecting type of header removal +*//***************************************************************************/ +typedef enum e_FmPcdManipHdrRmvByHdrType { + e_FM_PCD_MANIP_RMV_BY_HDR_SPECIFIC_L2 = 0, /**< Specific L2 fields removal */ +#if (DPAA_VERSION >= 11) + e_FM_PCD_MANIP_RMV_BY_HDR_CAPWAP, /**< CAPWAP removal */ +#endif /* (DPAA_VERSION >= 11) */ +#if (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) + e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START, /**< Locate from data that is not the header */ +#endif /* (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */ +} e_FmPcdManipHdrRmvByHdrType; + +/**************************************************************************//** + @Description Enumeration type for selecting type of timeout mode +*//***************************************************************************/ +typedef enum e_FmPcdManipReassemTimeOutMode { + e_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAMES, /**< Limits the time of the reassembly process + from the first fragment to the last */ + e_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAG /**< Limits the time of receiving the fragment */ +} e_FmPcdManipReassemTimeOutMode; + +/**************************************************************************//** + @Description Enumeration type for selecting type of WaysNumber mode +*//***************************************************************************/ +typedef enum e_FmPcdManipReassemWaysNumber { + e_FM_PCD_MANIP_ONE_WAY_HASH = 1, /**< One way hash */ + e_FM_PCD_MANIP_TWO_WAYS_HASH, /**< Two ways hash */ + e_FM_PCD_MANIP_THREE_WAYS_HASH, /**< Three ways hash */ + e_FM_PCD_MANIP_FOUR_WAYS_HASH, /**< Four ways hash */ + e_FM_PCD_MANIP_FIVE_WAYS_HASH, /**< Five ways hash */ + e_FM_PCD_MANIP_SIX_WAYS_HASH, /**< Six ways hash */ + e_FM_PCD_MANIP_SEVEN_WAYS_HASH, /**< Seven ways hash */ + e_FM_PCD_MANIP_EIGHT_WAYS_HASH /**< Eight ways hash */ +} e_FmPcdManipReassemWaysNumber; + +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) +/**************************************************************************//** + @Description Enumeration type for selecting type of statistics mode +*//***************************************************************************/ +typedef enum e_FmPcdStatsType { + e_FM_PCD_STATS_PER_FLOWID = 0 /**< Flow ID is used as index for getting statistics */ +} e_FmPcdStatsType; +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */ + +/**************************************************************************//** + @Description Enumeration type for selecting manipulation type +*//***************************************************************************/ +typedef enum e_FmPcdManipType { + e_FM_PCD_MANIP_HDR = 0, /**< Header manipulation */ + e_FM_PCD_MANIP_REASSEM, /**< Reassembly */ + e_FM_PCD_MANIP_FRAG, /**< Fragmentation */ + e_FM_PCD_MANIP_SPECIAL_OFFLOAD /**< Special Offloading */ +} e_FmPcdManipType; + +/**************************************************************************//** + @Description Enumeration type for selecting type of statistics mode +*//***************************************************************************/ +typedef enum e_FmPcdCcStatsMode { + e_FM_PCD_CC_STATS_MODE_NONE = 0, /**< No statistics support */ + e_FM_PCD_CC_STATS_MODE_FRAME, /**< Frame count statistics */ + e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME, /**< Byte and frame count statistics */ +#if (DPAA_VERSION >= 11) + e_FM_PCD_CC_STATS_MODE_RMON, /**< Byte and frame length range count statistics; + This mode is supported only on B4860 device */ +#endif /* (DPAA_VERSION >= 11) */ +} e_FmPcdCcStatsMode; + +/**************************************************************************//** + @Description Enumeration type for determining the action in case an IP packet + is larger than MTU but its DF (Don't Fragment) bit is set. +*//***************************************************************************/ +typedef enum e_FmPcdManipDontFragAction { + e_FM_PCD_MANIP_DISCARD_PACKET = 0, /**< Discard packet */ + e_FM_PCD_MANIP_ENQ_TO_ERR_Q_OR_DISCARD_PACKET = e_FM_PCD_MANIP_DISCARD_PACKET, + /**< Obsolete, cannot enqueue to error queue; + In practice, selects to discard packets; + Will be removed in the future */ + e_FM_PCD_MANIP_FRAGMENT_PACKET, /**< Fragment packet and continue normal processing */ + e_FM_PCD_MANIP_CONTINUE_WITHOUT_FRAG /**< Continue normal processing without fragmenting the packet */ +} e_FmPcdManipDontFragAction; + +/**************************************************************************//** + @Description Enumeration type for selecting type of special offload manipulation +*//***************************************************************************/ +typedef enum e_FmPcdManipSpecialOffloadType { + e_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC, /**< IPSec offload manipulation */ +#if (DPAA_VERSION >= 11) + e_FM_PCD_MANIP_SPECIAL_OFFLOAD_CAPWAP /**< CAPWAP offload manipulation */ +#endif /* (DPAA_VERSION >= 11) */ +} e_FmPcdManipSpecialOffloadType; + + +/**************************************************************************//** + @Description A Union of protocol dependent special options +*//***************************************************************************/ +typedef union u_FmPcdHdrProtocolOpt { + ethProtocolOpt_t ethOpt; /**< Ethernet options */ + vlanProtocolOpt_t vlanOpt; /**< VLAN options */ + mplsProtocolOpt_t mplsOpt; /**< MPLS options */ + ipv4ProtocolOpt_t ipv4Opt; /**< IPv4 options */ + ipv6ProtocolOpt_t ipv6Opt; /**< IPv6 options */ +#if (DPAA_VERSION >= 11) + capwapProtocolOpt_t capwapOpt; /**< CAPWAP options */ +#endif /* (DPAA_VERSION >= 11) */ +} u_FmPcdHdrProtocolOpt; + +/**************************************************************************//** + @Description A union holding protocol fields + + + Fields supported as "full fields": + HEADER_TYPE_ETH: + NET_HEADER_FIELD_ETH_DA + NET_HEADER_FIELD_ETH_SA + NET_HEADER_FIELD_ETH_TYPE + + HEADER_TYPE_LLC_SNAP: + NET_HEADER_FIELD_LLC_SNAP_TYPE + + HEADER_TYPE_VLAN: + NET_HEADER_FIELD_VLAN_TCI + (index may apply: + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1, + e_FM_PCD_HDR_INDEX_LAST) + + HEADER_TYPE_MPLS: + NET_HEADER_FIELD_MPLS_LABEL_STACK + (index may apply: + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1, + e_FM_PCD_HDR_INDEX_2, + e_FM_PCD_HDR_INDEX_LAST) + + HEADER_TYPE_IPv4: + NET_HEADER_FIELD_IPv4_SRC_IP + NET_HEADER_FIELD_IPv4_DST_IP + NET_HEADER_FIELD_IPv4_PROTO + NET_HEADER_FIELD_IPv4_TOS + (index may apply: + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1, + e_FM_PCD_HDR_INDEX_2/e_FM_PCD_HDR_INDEX_LAST) + + HEADER_TYPE_IPv6: + NET_HEADER_FIELD_IPv6_SRC_IP + NET_HEADER_FIELD_IPv6_DST_IP + NET_HEADER_FIELD_IPv6_NEXT_HDR + NET_HEADER_FIELD_IPv6_VER | NET_HEADER_FIELD_IPv6_FL | NET_HEADER_FIELD_IPv6_TC (must come together!) + (index may apply: + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1, + e_FM_PCD_HDR_INDEX_2/e_FM_PCD_HDR_INDEX_LAST) + + (Note that starting from DPAA 1-1, NET_HEADER_FIELD_IPv6_NEXT_HDR applies to + the last next header indication, meaning the next L4, which may be + present at the Ipv6 last extension. On earlier revisions this field + applies to the Next-Header field of the main IPv6 header) + + HEADER_TYPE_IP: + NET_HEADER_FIELD_IP_PROTO + (index may apply: + e_FM_PCD_HDR_INDEX_LAST) + NET_HEADER_FIELD_IP_DSCP + (index may apply: + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1) + HEADER_TYPE_GRE: + NET_HEADER_FIELD_GRE_TYPE + + HEADER_TYPE_MINENCAP + NET_HEADER_FIELD_MINENCAP_SRC_IP + NET_HEADER_FIELD_MINENCAP_DST_IP + NET_HEADER_FIELD_MINENCAP_TYPE + + HEADER_TYPE_TCP: + NET_HEADER_FIELD_TCP_PORT_SRC + NET_HEADER_FIELD_TCP_PORT_DST + NET_HEADER_FIELD_TCP_FLAGS + + HEADER_TYPE_UDP: + NET_HEADER_FIELD_UDP_PORT_SRC + NET_HEADER_FIELD_UDP_PORT_DST + + HEADER_TYPE_UDP_LITE: + NET_HEADER_FIELD_UDP_LITE_PORT_SRC + NET_HEADER_FIELD_UDP_LITE_PORT_DST + + HEADER_TYPE_IPSEC_AH: + NET_HEADER_FIELD_IPSEC_AH_SPI + NET_HEADER_FIELD_IPSEC_AH_NH + + HEADER_TYPE_IPSEC_ESP: + NET_HEADER_FIELD_IPSEC_ESP_SPI + + HEADER_TYPE_SCTP: + NET_HEADER_FIELD_SCTP_PORT_SRC + NET_HEADER_FIELD_SCTP_PORT_DST + + HEADER_TYPE_DCCP: + NET_HEADER_FIELD_DCCP_PORT_SRC + NET_HEADER_FIELD_DCCP_PORT_DST + + HEADER_TYPE_PPPoE: + NET_HEADER_FIELD_PPPoE_PID + NET_HEADER_FIELD_PPPoE_SID + + ***************************************************************** + Fields supported as "from fields": + HEADER_TYPE_ETH (with or without validation): + NET_HEADER_FIELD_ETH_TYPE + + HEADER_TYPE_VLAN (with or without validation): + NET_HEADER_FIELD_VLAN_TCI + (index may apply: + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1, + e_FM_PCD_HDR_INDEX_LAST) + + HEADER_TYPE_IPv4 (without validation): + NET_HEADER_FIELD_IPv4_PROTO + (index may apply: + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1, + e_FM_PCD_HDR_INDEX_2/e_FM_PCD_HDR_INDEX_LAST) + + HEADER_TYPE_IPv6 (without validation): + NET_HEADER_FIELD_IPv6_NEXT_HDR + (index may apply: + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1, + e_FM_PCD_HDR_INDEX_2/e_FM_PCD_HDR_INDEX_LAST) + +*//***************************************************************************/ +typedef union t_FmPcdFields { + headerFieldEth_t eth; /**< Ethernet */ + headerFieldVlan_t vlan; /**< VLAN */ + headerFieldLlcSnap_t llcSnap; /**< LLC SNAP */ + headerFieldPppoe_t pppoe; /**< PPPoE */ + headerFieldMpls_t mpls; /**< MPLS */ + headerFieldIp_t ip; /**< IP */ + headerFieldIpv4_t ipv4; /**< IPv4 */ + headerFieldIpv6_t ipv6; /**< IPv6 */ + headerFieldUdp_t udp; /**< UDP */ + headerFieldUdpLite_t udpLite; /**< UDP Lite */ + headerFieldTcp_t tcp; /**< TCP */ + headerFieldSctp_t sctp; /**< SCTP */ + headerFieldDccp_t dccp; /**< DCCP */ + headerFieldGre_t gre; /**< GRE */ + headerFieldMinencap_t minencap; /**< Minimal Encapsulation */ + headerFieldIpsecAh_t ipsecAh; /**< IPSec AH */ + headerFieldIpsecEsp_t ipsecEsp; /**< IPSec ESP */ + headerFieldUdpEncapEsp_t udpEncapEsp; /**< UDP Encapsulation ESP */ +} t_FmPcdFields; + +/**************************************************************************//** + @Description Parameters for defining header extraction for key generation +*//***************************************************************************/ +typedef struct t_FmPcdFromHdr { + uint8_t size; /**< Size in byte */ + uint8_t offset; /**< Byte offset */ +} t_FmPcdFromHdr; + +/**************************************************************************//** + @Description Parameters for defining field extraction for key generation +*//***************************************************************************/ +typedef struct t_FmPcdFromField { + t_FmPcdFields field; /**< Field selection */ + uint8_t size; /**< Size in byte */ + uint8_t offset; /**< Byte offset */ +} t_FmPcdFromField; + +/**************************************************************************//** + @Description Parameters for defining a single network environment unit + + A distinction unit should be defined if it will later be used + by one or more PCD engines to distinguish between flows. +*//***************************************************************************/ +typedef struct t_FmPcdDistinctionUnit { + struct { + e_NetHeaderType hdr; /**< One of the headers supported by the FM */ + u_FmPcdHdrProtocolOpt opt; /**< Select only one option ! */ + } hdrs[FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS]; +} t_FmPcdDistinctionUnit; + +/**************************************************************************//** + @Description Parameters for defining all different distinction units supported + by a specific PCD Network Environment Characteristics module. + + Each unit represent a protocol or a group of protocols that may + be used later by the different PCD engines to distinguish + between flows. +*//***************************************************************************/ +typedef struct t_FmPcdNetEnvParams { + uint8_t numOfDistinctionUnits; /**< Number of different units to be identified */ + t_FmPcdDistinctionUnit units[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS]; /**< An array of numOfDistinctionUnits of the + different units to be identified */ +} t_FmPcdNetEnvParams; + +/**************************************************************************//** + @Description Parameters for defining a single extraction action when + creating a key +*//***************************************************************************/ +typedef struct t_FmPcdExtractEntry { + e_FmPcdExtractType type; /**< Extraction type select */ + union { + struct { + e_NetHeaderType hdr; /**< Header selection */ + bool ignoreProtocolValidation; + /**< Ignore protocol validation */ + e_FmPcdHdrIndex hdrIndex; /**< Relevant only for MPLS, VLAN and tunneled + IP. Otherwise should be cleared. */ + e_FmPcdExtractByHdrType type; /**< Header extraction type select */ + union { + t_FmPcdFromHdr fromHdr; /**< Extract bytes from header parameters */ + t_FmPcdFromField fromField; /**< Extract bytes from field parameters */ + t_FmPcdFields fullField; /**< Extract full filed parameters */ + } extractByHdrType; + } extractByHdr; /**< used when type = e_FM_PCD_KG_EXTRACT_BY_HDR */ + struct { + e_FmPcdExtractFrom src; /**< Non-header extraction source */ + e_FmPcdAction action; /**< Relevant for CC Only */ + uint16_t icIndxMask; /**< Relevant only for CC when + action = e_FM_PCD_ACTION_INDEXED_LOOKUP; + Note that the number of bits that are set within + this mask must be log2 of the CC-node 'numOfKeys'. + Note that the mask cannot be set on the lower bits. */ + uint8_t offset; /**< Byte offset */ + uint8_t size; /**< Size in byte */ + } extractNonHdr; /**< used when type = e_FM_PCD_KG_EXTRACT_NON_HDR */ + }; +} t_FmPcdExtractEntry; + +/**************************************************************************//** + @Description Parameters for defining masks for each extracted field in the key. +*//***************************************************************************/ +typedef struct t_FmPcdKgExtractMask { + uint8_t extractArrayIndex; /**< Index in the extraction array, as initialized by user */ + uint8_t offset; /**< Byte offset */ + uint8_t mask; /**< A byte mask (selected bits will be used) */ +} t_FmPcdKgExtractMask; + +/**************************************************************************//** + @Description Parameters for defining default selection per groups of fields +*//***************************************************************************/ +typedef struct t_FmPcdKgExtractDflt { + e_FmPcdKgKnownFieldsDfltTypes type; /**< Default type select */ + e_FmPcdKgExtractDfltSelect dfltSelect; /**< Default register select */ +} t_FmPcdKgExtractDflt; + +/**************************************************************************//** + @Description Parameters for defining key extraction and hashing +*//***************************************************************************/ +typedef struct t_FmPcdKgKeyExtractAndHashParams { + uint32_t privateDflt0; /**< Scheme default register 0 */ + uint32_t privateDflt1; /**< Scheme default register 1 */ + uint8_t numOfUsedExtracts; /**< defines the valid size of the following array */ + t_FmPcdExtractEntry extractArray [FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY]; /**< An array of extractions definition. */ + uint8_t numOfUsedDflts; /**< defines the valid size of the following array */ + t_FmPcdKgExtractDflt dflts[FM_PCD_KG_NUM_OF_DEFAULT_GROUPS]; + /**< For each extraction used in this scheme, specify the required + default register to be used when header is not found. + types not specified in this array will get undefined value. */ + uint8_t numOfUsedMasks; /**< defines the valid size of the following array */ + t_FmPcdKgExtractMask masks[FM_PCD_KG_NUM_OF_EXTRACT_MASKS]; + uint8_t hashShift; /**< hash result right shift. Select the 24 bits out of the 64 hash + result. 0 means using the 24 LSB's, otherwise use the + 24 LSB's after shifting right.*/ + uint32_t hashDistributionNumOfFqids; /**< must be > 1 and a power of 2. Represents the range + of queues for the key and hash functionality */ + uint8_t hashDistributionFqidsShift; /**< selects the FQID bits that will be effected by the hash */ + bool symmetricHash; /**< TRUE to generate the same hash for frames with swapped source and + destination fields on all layers; If TRUE, driver will check that for + all layers, if SRC extraction is selected, DST extraction must also be + selected, and vice versa. */ +} t_FmPcdKgKeyExtractAndHashParams; + +/**************************************************************************//** + @Description Parameters for defining a single FQID mask (extracted OR). +*//***************************************************************************/ +typedef struct t_FmPcdKgExtractedOrParams { + e_FmPcdExtractType type; /**< Extraction type select */ + union { + struct { /**< used when type = e_FM_PCD_KG_EXTRACT_BY_HDR */ + e_NetHeaderType hdr; + e_FmPcdHdrIndex hdrIndex; /**< Relevant only for MPLS, VLAN and tunneled + IP. Otherwise should be cleared.*/ + bool ignoreProtocolValidation; + /**< continue extraction even if protocol is not recognized */ + } extractByHdr; /**< Header to extract by */ + e_FmPcdExtractFrom src; /**< used when type = e_FM_PCD_KG_EXTRACT_NON_HDR */ + }; + uint8_t extractionOffset; /**< Offset for extraction (in bytes). */ + e_FmPcdKgExtractDfltSelect dfltValue; /**< Select register from which extraction is taken if + field not found */ + uint8_t mask; /**< Extraction mask (specified bits are used) */ + uint8_t bitOffsetInFqid; /**< 0-31, Selects which bits of the 24 FQID bits to effect using + the extracted byte; Assume byte is placed as the 8 MSB's in + a 32 bit word where the lower bits + are the FQID; i.e if bitOffsetInFqid=1 than its LSB + will effect the FQID MSB, if bitOffsetInFqid=24 than the + extracted byte will effect the 8 LSB's of the FQID, + if bitOffsetInFqid=31 than the byte's MSB will effect + the FQID's LSB; 0 means - no effect on FQID; + Note that one, and only one of + bitOffsetInFqid or bitOffsetInPlcrProfile must be set (i.e, + extracted byte must effect either FQID or Policer profile).*/ + uint8_t bitOffsetInPlcrProfile; + /**< 0-15, Selects which bits of the 8 policer profile id bits to + effect using the extracted byte; Assume byte is placed + as the 8 MSB's in a 16 bit word where the lower bits + are the policer profile id; i.e if bitOffsetInPlcrProfile=1 + than its LSB will effect the profile MSB, if bitOffsetInFqid=8 + than the extracted byte will effect the whole policer profile id, + if bitOffsetInFqid=15 than the byte's MSB will effect + the Policer Profile id's LSB; + 0 means - no effect on policer profile; Note that one, and only one of + bitOffsetInFqid or bitOffsetInPlcrProfile must be set (i.e, + extracted byte must effect either FQID or Policer profile).*/ +} t_FmPcdKgExtractedOrParams; + +/**************************************************************************//** + @Description Parameters for configuring a scheme counter +*//***************************************************************************/ +typedef struct t_FmPcdKgSchemeCounter { + bool update; /**< FALSE to keep the current counter state + and continue from that point, TRUE to update/reset + the counter when the scheme is written. */ + uint32_t value; /**< If update=TRUE, this value will be written into the + counter. clear this field to reset the counter. */ +} t_FmPcdKgSchemeCounter; + +/**************************************************************************//** + @Description Parameters for configuring a policer profile for a KeyGen scheme + (when policer is the next engine after this scheme). +*//***************************************************************************/ +typedef struct t_FmPcdKgPlcrProfile { + bool sharedProfile; /**< TRUE if this profile is shared between ports + (managed by master partition); Must not be TRUE + if profile is after Coarse Classification*/ + bool direct; /**< if TRUE, directRelativeProfileId only selects the profile + id, if FALSE fqidOffsetRelativeProfileIdBase is used + together with fqidOffsetShift and numOfProfiles + parameters, to define a range of profiles from + which the KeyGen result will determine the + destination policer profile. */ + union { + uint16_t directRelativeProfileId; /**< Used if 'direct' is TRUE, to select policer profile. + should indicate the policer profile offset within the + port's policer profiles or shared window. */ + struct { + uint8_t fqidOffsetShift; /**< Shift on the KeyGen create FQID offset (i.e. not the + final FQID - without the FQID base). */ + uint8_t fqidOffsetRelativeProfileIdBase; + /**< The base of the FMan Port's relative Storage-Profile ID; + this value will be "OR'ed" with the KeyGen create FQID + offset (i.e. not the final FQID - without the FQID base); + the final result should indicate the Storage-Profile offset + within the FMan Port's relative Storage-Profiles window/ + (or the SHARED window depends on 'sharedProfile'). */ + uint8_t numOfProfiles; /**< Range of profiles starting at base */ + } indirectProfile; /**< Indirect profile parameters */ + } profileSelect; /**< Direct/indirect profile selection and parameters */ +} t_FmPcdKgPlcrProfile; + +#if (DPAA_VERSION >= 11) +/**************************************************************************//** + @Description Parameters for configuring a storage profile for a KeyGen scheme. +*//***************************************************************************/ +typedef struct t_FmPcdKgStorageProfile { + bool direct; /**< If TRUE, directRelativeProfileId only selects the + profile id; + If FALSE, fqidOffsetRelativeProfileIdBase is used + together with fqidOffsetShift and numOfProfiles + parameters to define a range of profiles from which + the KeyGen result will determine the destination + storage profile. */ + union { + uint16_t directRelativeProfileId; /**< Used when 'direct' is TRUE, to select a storage profile; + should indicate the storage profile offset within the + port's storage profiles window. */ + struct { + uint8_t fqidOffsetShift; /**< Shift on the KeyGen create FQID offset (i.e. not the + final FQID - without the FQID base). */ + uint8_t fqidOffsetRelativeProfileIdBase; + /**< The base of the FMan Port's relative Storage-Profile ID; + this value will be "OR'ed" with the KeyGen create FQID + offset (i.e. not the final FQID - without the FQID base); + the final result should indicate the Storage-Profile offset + within the FMan Port's relative Storage-Profiles window. */ + uint8_t numOfProfiles; /**< Range of profiles starting at base. */ + } indirectProfile; /**< Indirect profile parameters. */ + } profileSelect; /**< Direct/indirect profile selection and parameters. */ +} t_FmPcdKgStorageProfile; +#endif /* (DPAA_VERSION >= 11) */ + +/**************************************************************************//** + @Description Parameters for defining CC as the next engine after KeyGen +*//***************************************************************************/ +typedef struct t_FmPcdKgCc { + t_Handle h_CcTree; /**< A handle to a CC Tree */ + uint8_t grpId; /**< CC group id within the CC tree */ + bool plcrNext; /**< TRUE if after CC, in case of data frame, + policing is required. */ + bool bypassPlcrProfileGeneration; /**< TRUE to bypass KeyGen policer profile generation; + selected profile is the one set at port initialization. */ + t_FmPcdKgPlcrProfile plcrProfile; /**< Valid only if plcrNext = TRUE and + bypassPlcrProfileGeneration = FALSE */ +} t_FmPcdKgCc; + +/**************************************************************************//** + @Description Parameters for defining initializing a KeyGen scheme +*//***************************************************************************/ +typedef struct t_FmPcdKgSchemeParams { + bool modify; /**< TRUE to change an existing scheme */ + union + { + uint8_t relativeSchemeId; /**< if modify=FALSE:Partition relative scheme id */ + t_Handle h_Scheme; /**< if modify=TRUE: a handle of the existing scheme */ + } id; + bool alwaysDirect; /**< This scheme is reached only directly, i.e. no need + for match vector; KeyGen will ignore it when matching */ + struct { /**< HL Relevant only if alwaysDirect = FALSE */ + t_Handle h_NetEnv; /**< A handle to the Network environment as returned + by FM_PCD_NetEnvCharacteristicsSet() */ + uint8_t numOfDistinctionUnits; /**< Number of NetEnv units listed in unitIds array */ + uint8_t unitIds[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS]; + /**< Indexes as passed to SetNetEnvCharacteristics array*/ + } netEnvParams; + bool useHash; /**< use the KeyGen Hash functionality */ + t_FmPcdKgKeyExtractAndHashParams keyExtractAndHashParams; + /**< used only if useHash = TRUE */ + bool bypassFqidGeneration; /**< Normally - FALSE, TRUE to avoid FQID update in the IC; + In such a case FQID after KeyGen will be the default FQID + defined for the relevant port, or the FQID defined by CC + in cases where CC was the previous engine. */ + uint32_t baseFqid; /**< Base FQID; Relevant only if bypassFqidGeneration = FALSE; + If hash is used and an even distribution is expected + according to hashDistributionNumOfFqids, baseFqid must be aligned to + hashDistributionNumOfFqids. */ + uint8_t numOfUsedExtractedOrs; /**< Number of FQID masks listed in extractedOrs array */ + t_FmPcdKgExtractedOrParams extractedOrs[FM_PCD_KG_NUM_OF_GENERIC_REGS]; + /**< FM_PCD_KG_NUM_OF_GENERIC_REGS + registers are shared between qidMasks + functionality and some of the extraction + actions; Normally only some will be used + for qidMask. Driver will return error if + resource is full at initialization time. */ + +#if (DPAA_VERSION >= 11) + bool overrideStorageProfile; /**< TRUE if KeyGen override previously decided storage profile */ + t_FmPcdKgStorageProfile storageProfile; /**< Used when overrideStorageProfile TRUE */ +#endif /* (DPAA_VERSION >= 11) */ + + e_FmPcdEngine nextEngine; /**< may be BMI, PLCR or CC */ + union { /**< depends on nextEngine */ + e_FmPcdDoneAction doneAction; /**< Used when next engine is BMI (done) */ + t_FmPcdKgPlcrProfile plcrProfile; /**< Used when next engine is PLCR */ + t_FmPcdKgCc cc; /**< Used when next engine is CC */ + } kgNextEngineParams; + t_FmPcdKgSchemeCounter schemeCounter; /**< A structure of parameters for updating + the scheme counter */ +} t_FmPcdKgSchemeParams; + +/**************************************************************************//** + @Collection Definitions for CC statistics +*//***************************************************************************/ +#if (DPAA_VERSION >= 11) +#define FM_PCD_CC_STATS_MAX_NUM_OF_FLR 10 /* Maximal supported number of frame length ranges */ +#define FM_PCD_CC_STATS_FLR_SIZE 2 /* Size in bytes of a frame length range limit */ +#endif /* (DPAA_VERSION >= 11) */ +#define FM_PCD_CC_STATS_COUNTER_SIZE 4 /* Size in bytes of a frame length range counter */ +/* @} */ + +/**************************************************************************//** + @Description Parameters for defining CC as the next engine after a CC node. +*//***************************************************************************/ +typedef struct t_FmPcdCcNextCcParams { + t_Handle h_CcNode; /**< A handle of the next CC node */ +} t_FmPcdCcNextCcParams; + +#if (DPAA_VERSION >= 11) +/**************************************************************************//** + @Description Parameters for defining Frame replicator as the next engine after a CC node. +*//***************************************************************************/ +typedef struct t_FmPcdCcNextFrParams { + t_Handle h_FrmReplic; /**< A handle of the next frame replicator group */ +} t_FmPcdCcNextFrParams; +#endif /* (DPAA_VERSION >= 11) */ + +/**************************************************************************//** + @Description Parameters for defining Policer as the next engine after a CC node. +*//***************************************************************************/ +typedef struct t_FmPcdCcNextPlcrParams { + bool overrideParams; /**< TRUE if CC override previously decided parameters*/ + bool sharedProfile; /**< Relevant only if overrideParams=TRUE: + TRUE if this profile is shared between ports */ + uint16_t newRelativeProfileId; /**< Relevant only if overrideParams=TRUE: + (otherwise profile id is taken from KeyGen); + This parameter should indicate the policer + profile offset within the port's + policer profiles or from SHARED window.*/ + uint32_t newFqid; /**< Relevant only if overrideParams=TRUE: + FQID for enqueuing the frame; + In earlier chips if policer next engine is KEYGEN, + this parameter can be 0, because the KEYGEN + always decides the enqueue FQID.*/ +#if (DPAA_VERSION >= 11) + uint8_t newRelativeStorageProfileId; + /**< Indicates the relative storage profile offset within + the port's storage profiles window; + Relevant only if the port was configured with VSP. */ +#endif /* (DPAA_VERSION >= 11) */ +} t_FmPcdCcNextPlcrParams; + +/**************************************************************************//** + @Description Parameters for defining enqueue as the next action after a CC node. +*//***************************************************************************/ +typedef struct t_FmPcdCcNextEnqueueParams { + e_FmPcdDoneAction action; /**< Action - when next engine is BMI (done) */ + bool overrideFqid; /**< TRUE if CC override previously decided fqid and vspid, + relevant if action = e_FM_PCD_ENQ_FRAME */ + uint32_t newFqid; /**< Valid if overrideFqid=TRUE, FQID for enqueuing the frame + (otherwise FQID is taken from KeyGen), + relevant if action = e_FM_PCD_ENQ_FRAME */ +#if (DPAA_VERSION >= 11) + uint8_t newRelativeStorageProfileId; + /**< Valid if overrideFqid=TRUE, Indicates the relative virtual + storage profile offset within the port's storage profiles + window; Relevant only if the port was configured with VSP. */ +#endif /* (DPAA_VERSION >= 11) */ +} t_FmPcdCcNextEnqueueParams; + +/**************************************************************************//** + @Description Parameters for defining KeyGen as the next engine after a CC node. +*//***************************************************************************/ +typedef struct t_FmPcdCcNextKgParams { + bool overrideFqid; /**< TRUE if CC override previously decided fqid and vspid, + Note - this parameters irrelevant for earlier chips */ + uint32_t newFqid; /**< Valid if overrideFqid=TRUE, FQID for enqueuing the frame + (otherwise FQID is taken from KeyGen), + Note - this parameters irrelevant for earlier chips */ +#if (DPAA_VERSION >= 11) + uint8_t newRelativeStorageProfileId; + /**< Valid if overrideFqid=TRUE, Indicates the relative virtual + storage profile offset within the port's storage profiles + window; Relevant only if the port was configured with VSP. */ +#endif /* (DPAA_VERSION >= 11) */ + + t_Handle h_DirectScheme; /**< Direct scheme handle to go to. */ +} t_FmPcdCcNextKgParams; + +/**************************************************************************//** + @Description Parameters for defining the next engine after a CC node. +*//***************************************************************************/ +typedef struct t_FmPcdCcNextEngineParams { + e_FmPcdEngine nextEngine; /**< User has to initialize parameters + according to nextEngine definition */ + union { + t_FmPcdCcNextCcParams ccParams; /**< Parameters in case next engine is CC */ + t_FmPcdCcNextPlcrParams plcrParams; /**< Parameters in case next engine is PLCR */ + t_FmPcdCcNextEnqueueParams enqueueParams; /**< Parameters in case next engine is BMI */ + t_FmPcdCcNextKgParams kgParams; /**< Parameters in case next engine is KG */ +#if (DPAA_VERSION >= 11) + t_FmPcdCcNextFrParams frParams; /**< Parameters in case next engine is FR */ +#endif /* (DPAA_VERSION >= 11) */ + } params; /**< union used for all the next-engine parameters options */ + + t_Handle h_Manip; /**< Handle to Manipulation object. + Relevant if next engine is of type result + (e_FM_PCD_PLCR, e_FM_PCD_KG, e_FM_PCD_DONE) */ + + bool statisticsEn; /**< If TRUE, statistics counters are incremented + for each frame passing through this + Coarse Classification entry. */ +} t_FmPcdCcNextEngineParams; + +/**************************************************************************//** + @Description Parameters for defining a single CC key +*//***************************************************************************/ +typedef struct t_FmPcdCcKeyParams { + uint8_t *p_Key; /**< Relevant only if 'action' = e_FM_PCD_ACTION_EXACT_MATCH; + pointer to the key of the size defined in keySize */ + uint8_t *p_Mask; /**< Relevant only if 'action' = e_FM_PCD_ACTION_EXACT_MATCH; + pointer to the Mask per key of the size defined + in keySize. p_Key and p_Mask (if defined) has to be + of the same size defined in the keySize; + NOTE that if this value is equal for all entries whithin + this table, the driver will automatically use global-mask + (i.e. one common mask for all entries) instead of private + one; that is done in order to spare some memory and for + better performance. */ + t_FmPcdCcNextEngineParams ccNextEngineParams; + /**< parameters for the next for the defined Key in + the p_Key */ +} t_FmPcdCcKeyParams; + +/**************************************************************************//** + @Description Parameters for defining CC keys parameters + The driver supports two methods for CC node allocation: dynamic and static. + Static mode was created in order to prevent runtime alloc/free + of FMan memory (MURAM), which may cause fragmentation; in this mode, + the driver automatically allocates the memory according to + 'maxNumOfKeys' parameter. The driver calculates the maximal memory + size that may be used for this CC-Node taking into consideration + 'maskSupport' and 'statisticsMode' parameters. + When 'action' = e_FM_PCD_ACTION_INDEXED_LOOKUP in the extraction + parameters of this node, 'maxNumOfKeys' must be equal to 'numOfKeys'. + In dynamic mode, 'maxNumOfKeys' must be zero. At initialization, + all required structures are allocated according to 'numOfKeys' + parameter. During runtime modification, these structures are + re-allocated according to the updated number of keys. + + Please note that 'action' and 'icIndxMask' mentioned in the + specific parameter explanations are passed in the extraction + parameters of the node (fields of extractCcParams.extractNonHdr). +*//***************************************************************************/ +typedef struct t_KeysParams { + uint16_t maxNumOfKeys; /**< Maximum number of keys that will (ever) be used in this CC-Node; + A value of zero may be used for dynamic memory allocation. */ + bool maskSupport; /**< This parameter is relevant only if a node is initialized with + 'action' = e_FM_PCD_ACTION_EXACT_MATCH and maxNumOfKeys > 0; + Should be TRUE to reserve table memory for key masks, even if + initial keys do not contain masks, or if the node was initialized + as 'empty' (without keys); this will allow user to add keys with + masks at runtime. + NOTE that if user want to use only global-masks (i.e. one common mask + for all the entries within this table, this parameter should set to 'FALSE'. */ + e_FmPcdCcStatsMode statisticsMode; /**< Determines the supported statistics mode for all node's keys. + To enable statistics gathering, statistics should be enabled per + every key, using 'statisticsEn' in next engine parameters structure + of that key; + If 'maxNumOfKeys' is set, all required structures will be + preallocated for all keys. */ +#if (DPAA_VERSION >= 11) + uint16_t frameLengthRanges[FM_PCD_CC_STATS_MAX_NUM_OF_FLR]; + /**< Relevant only for 'RMON' statistics mode + (this feature is supported only on B4860 device); + Holds a list of programmable thresholds - for each received frame, + its length in bytes is examined against these range thresholds and + the appropriate counter is incremented by 1 - for example, to belong + to range i, the following should hold: + range i-1 threshold < frame length <= range i threshold + Each range threshold must be larger then its preceding range + threshold, and last range threshold must be 0xFFFF. */ +#endif /* (DPAA_VERSION >= 11) */ + uint16_t numOfKeys; /**< Number of initial keys; + Note that in case of 'action' = e_FM_PCD_ACTION_INDEXED_LOOKUP, + this field should be power-of-2 of the number of bits that are + set in 'icIndxMask'. */ + uint8_t keySize; /**< Size of key - for extraction of type FULL_FIELD, 'keySize' has + to be the standard size of the selected key; For other extraction + types, 'keySize' has to be as size of extraction; When 'action' = + e_FM_PCD_ACTION_INDEXED_LOOKUP, 'keySize' must be 2. */ + t_FmPcdCcKeyParams keyParams[FM_PCD_MAX_NUM_OF_KEYS]; + /**< An array with 'numOfKeys' entries, each entry specifies the + corresponding key parameters; + When 'action' = e_FM_PCD_ACTION_EXACT_MATCH, this value must not + exceed 255 (FM_PCD_MAX_NUM_OF_KEYS-1) as the last entry is saved + for the 'miss' entry. */ + t_FmPcdCcNextEngineParams ccNextEngineParamsForMiss; + /**< Parameters for defining the next engine when a key is not matched; + Not relevant if action = e_FM_PCD_ACTION_INDEXED_LOOKUP. */ +} t_KeysParams; + + +/**************************************************************************//** + @Description Parameters for defining a CC node +*//***************************************************************************/ +typedef struct t_FmPcdCcNodeParams { + t_FmPcdExtractEntry extractCcParams; /**< Extraction parameters */ + t_KeysParams keysParams; /**< Keys definition matching the selected extraction */ +} t_FmPcdCcNodeParams; + +/**************************************************************************//** + @Description Parameters for defining a hash table +*//***************************************************************************/ +typedef struct t_FmPcdHashTableParams { + uint16_t maxNumOfKeys; /**< Maximum Number Of Keys that will (ever) be used in this Hash-table */ + e_FmPcdCcStatsMode statisticsMode; /**< If not e_FM_PCD_CC_STATS_MODE_NONE, the required structures for the + requested statistics mode will be allocated according to maxNumOfKeys. */ + uint8_t kgHashShift; /**< KG-Hash-shift as it was configured in the KG-scheme + that leads to this hash-table. */ + uint16_t hashResMask; /**< Mask that will be used on the hash-result; + The number-of-sets for this hash will be calculated + as (2^(number of bits set in 'hashResMask')); + The 4 lower bits must be cleared. */ + uint8_t hashShift; /**< Byte offset from the beginning of the KeyGen hash result to the + 2-bytes to be used as hash index. */ + uint8_t matchKeySize; /**< Size of the exact match keys held by the hash buckets */ + + t_FmPcdCcNextEngineParams ccNextEngineParamsForMiss; /**< Parameters for defining the next engine when a key is not matched */ + +} t_FmPcdHashTableParams; + +/**************************************************************************//** + @Description Parameters for defining a CC tree group. + + This structure defines a CC group in terms of NetEnv units + and the action to be taken in each case. The unitIds list must + be given in order from low to high indices. + + t_FmPcdCcNextEngineParams is a list of 2^numOfDistinctionUnits + structures where each defines the next action to be taken for + each units combination. for example: + numOfDistinctionUnits = 2 + unitIds = {1,3} + p_NextEnginePerEntriesInGrp[0] = t_FmPcdCcNextEngineParams for the case that + unit 1 - not found; unit 3 - not found; + p_NextEnginePerEntriesInGrp[1] = t_FmPcdCcNextEngineParams for the case that + unit 1 - not found; unit 3 - found; + p_NextEnginePerEntriesInGrp[2] = t_FmPcdCcNextEngineParams for the case that + unit 1 - found; unit 3 - not found; + p_NextEnginePerEntriesInGrp[3] = t_FmPcdCcNextEngineParams for the case that + unit 1 - found; unit 3 - found; +*//***************************************************************************/ +typedef struct t_FmPcdCcGrpParams { + uint8_t numOfDistinctionUnits; /**< Up to 4 */ + uint8_t unitIds[FM_PCD_MAX_NUM_OF_CC_UNITS]; + /**< Indices of the units as defined in + FM_PCD_NetEnvCharacteristicsSet() */ + t_FmPcdCcNextEngineParams nextEnginePerEntriesInGrp[FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP]; + /**< Maximum entries per group is 16 */ +} t_FmPcdCcGrpParams; + +/**************************************************************************//** + @Description Parameters for defining CC tree groups +*//***************************************************************************/ +typedef struct t_FmPcdCcTreeParams { + t_Handle h_NetEnv; /**< A handle to the Network environment as returned + by FM_PCD_NetEnvCharacteristicsSet() */ + uint8_t numOfGrps; /**< Number of CC groups within the CC tree */ + t_FmPcdCcGrpParams ccGrpParams[FM_PCD_MAX_NUM_OF_CC_GROUPS]; + /**< Parameters for each group. */ +} t_FmPcdCcTreeParams; + + +/**************************************************************************//** + @Description CC key statistics structure +*//***************************************************************************/ +typedef struct t_FmPcdCcKeyStatistics { + uint32_t byteCount; /**< This counter reflects byte count of frames that + were matched by this key. */ + uint32_t frameCount; /**< This counter reflects count of frames that + were matched by this key. */ +#if (DPAA_VERSION >= 11) + uint32_t frameLengthRangeCount[FM_PCD_CC_STATS_MAX_NUM_OF_FLR]; + /**< These counters reflect how many frames matched + this key in 'RMON' statistics mode: + Each counter holds the number of frames of a + specific frames length range, according to the + ranges provided at initialization. */ +#endif /* (DPAA_VERSION >= 11) */ +} t_FmPcdCcKeyStatistics; + +/**************************************************************************//** + @Description Parameters for defining policer byte rate +*//***************************************************************************/ +typedef struct t_FmPcdPlcrByteRateModeParams { + e_FmPcdPlcrFrameLengthSelect frameLengthSelection; /**< Frame length selection */ + e_FmPcdPlcrRollBackFrameSelect rollBackFrameSelection; /**< relevant option only e_FM_PCD_PLCR_L2_FRM_LEN, + e_FM_PCD_PLCR_FULL_FRM_LEN */ +} t_FmPcdPlcrByteRateModeParams; + +/**************************************************************************//** + @Description Parameters for defining the policer profile (based on + RFC-2698 or RFC-4115 attributes). +*//***************************************************************************/ +typedef struct t_FmPcdPlcrNonPassthroughAlgParams { + e_FmPcdPlcrRateMode rateMode; /**< Byte mode or Packet mode */ + t_FmPcdPlcrByteRateModeParams byteModeParams; /**< Valid for Byte NULL for Packet */ + uint32_t committedInfoRate; /**< KBits/Second or Packets/Second */ + uint32_t committedBurstSize; /**< Bytes/Packets */ + uint32_t peakOrExcessInfoRate; /**< KBits/Second or Packets/Second */ + uint32_t peakOrExcessBurstSize; /**< Bytes/Packets */ +} t_FmPcdPlcrNonPassthroughAlgParams; + +/**************************************************************************//** + @Description Parameters for defining the next engine after policer +*//***************************************************************************/ +typedef union u_FmPcdPlcrNextEngineParams { + e_FmPcdDoneAction action; /**< Action - when next engine is BMI (done) */ + t_Handle h_Profile; /**< Policer profile handle - used when next engine + is Policer, must be a SHARED profile */ + t_Handle h_DirectScheme; /**< Direct scheme select - when next engine is KeyGen */ +} u_FmPcdPlcrNextEngineParams; + +/**************************************************************************//** + @Description Parameters for defining the policer profile entry +*//***************************************************************************/ +typedef struct t_FmPcdPlcrProfileParams { + bool modify; /**< TRUE to change an existing profile */ + union { + struct { + e_FmPcdProfileTypeSelection profileType; /**< Type of policer profile */ + t_Handle h_FmPort; /**< Relevant for per-port profiles only */ + uint16_t relativeProfileId; /**< Profile id - relative to shared group or to port */ + } newParams; /**< use it when modify = FALSE */ + t_Handle h_Profile; /**< A handle to a profile - use it when modify=TRUE */ + } id; + e_FmPcdPlcrAlgorithmSelection algSelection; /**< Profile Algorithm PASS_THROUGH, RFC_2698, RFC_4115 */ + e_FmPcdPlcrColorMode colorMode; /**< COLOR_BLIND, COLOR_AWARE */ + + union { + e_FmPcdPlcrColor dfltColor; /**< For Color-Blind Pass-Through mode; the policer will re-color + any incoming packet with the default value. */ + e_FmPcdPlcrColor override; /**< For Color-Aware modes; the profile response to a + pre-color value of 2'b11. */ + } color; + + t_FmPcdPlcrNonPassthroughAlgParams nonPassthroughAlgParams; /**< RFC2698 or RFC4115 parameters */ + + e_FmPcdEngine nextEngineOnGreen; /**< Next engine for green-colored frames */ + u_FmPcdPlcrNextEngineParams paramsOnGreen; /**< Next engine parameters for green-colored frames */ + + e_FmPcdEngine nextEngineOnYellow; /**< Next engine for yellow-colored frames */ + u_FmPcdPlcrNextEngineParams paramsOnYellow; /**< Next engine parameters for yellow-colored frames */ + + e_FmPcdEngine nextEngineOnRed; /**< Next engine for red-colored frames */ + u_FmPcdPlcrNextEngineParams paramsOnRed; /**< Next engine parameters for red-colored frames */ + + bool trapProfileOnFlowA; /**< Obsolete - do not use */ + bool trapProfileOnFlowB; /**< Obsolete - do not use */ + bool trapProfileOnFlowC; /**< Obsolete - do not use */ +} t_FmPcdPlcrProfileParams; + +/**************************************************************************//** + @Description Parameters for selecting a location for requested manipulation +*//***************************************************************************/ +typedef struct t_FmManipHdrInfo { + e_NetHeaderType hdr; /**< Header selection */ + e_FmPcdHdrIndex hdrIndex; /**< Relevant only for MPLS, VLAN and tunneled IP. Otherwise should be cleared. */ + bool byField; /**< TRUE if the location of manipulation is according to some field in the specific header*/ + t_FmPcdFields fullField; /**< Relevant only when byField = TRUE: Extract field */ +} t_FmManipHdrInfo; + +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) +/**************************************************************************//** + @Description Parameters for defining an insertion manipulation + of type e_FM_PCD_MANIP_INSRT_TO_START_OF_FRAME_TEMPLATE +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrInsrtByTemplateParams { + uint8_t size; /**< Size of insert template to the start of the frame. */ + uint8_t hdrTemplate[FM_PCD_MAX_MANIP_INSRT_TEMPLATE_SIZE]; + /**< Array of the insertion template. */ + + bool modifyOuterIp; /**< TRUE if user want to modify some fields in outer IP. */ + struct { + uint16_t ipOuterOffset; /**< Offset of outer IP in the insert template, relevant if modifyOuterIp = TRUE.*/ + uint16_t dscpEcn; /**< value of dscpEcn in IP outer, relevant if modifyOuterIp = TRUE. + in IPV4 dscpEcn only byte - it has to be adjusted to the right*/ + bool udpPresent; /**< TRUE if UDP is present in the insert template, relevant if modifyOuterIp = TRUE.*/ + uint8_t udpOffset; /**< Offset in the insert template of UDP, relevant if modifyOuterIp = TRUE and udpPresent=TRUE.*/ + uint8_t ipIdentGenId; /**< Used by FMan-CTRL to calculate IP-identification field,relevant if modifyOuterIp = TRUE.*/ + bool recalculateLength; /**< TRUE if recalculate length has to be performed due to the engines in the path which can change the frame later, relevant if modifyOuterIp = TRUE.*/ + struct { + uint8_t blockSize; /**< The CAAM block-size; Used by FMan-CTRL to calculate the IP Total Length field.*/ + uint8_t extraBytesAddedAlignedToBlockSize; /**< Used by FMan-CTRL to calculate the IP Total Length field and UDP length*/ + uint8_t extraBytesAddedNotAlignedToBlockSize;/**< Used by FMan-CTRL to calculate the IP Total Length field and UDP length.*/ + } recalculateLengthParams; /**< Recalculate length parameters - relevant if modifyOuterIp = TRUE and recalculateLength = TRUE */ + } modifyOuterIpParams; /**< Outer IP modification parameters - ignored if modifyOuterIp is FALSE */ + + bool modifyOuterVlan; /**< TRUE if user wants to modify VPri field in the outer VLAN header*/ + struct { + uint8_t vpri; /**< Value of VPri, relevant if modifyOuterVlan = TRUE + VPri only 3 bits, it has to be adjusted to the right*/ + } modifyOuterVlanParams; +} t_FmPcdManipHdrInsrtByTemplateParams; + +/**************************************************************************//** + @Description Parameters for defining CAPWAP fragmentation +*//***************************************************************************/ +typedef struct t_CapwapFragmentationParams { + uint16_t sizeForFragmentation; /**< if length of the frame is greater than this value, CAPWAP fragmentation will be executed.*/ + bool headerOptionsCompr; /**< TRUE - first fragment include the CAPWAP header options field, + and all other fragments exclude the CAPWAP options field, + FALSE - all fragments include CAPWAP header options field. */ +} t_CapwapFragmentationParams; + +/**************************************************************************//** + @Description Parameters for defining CAPWAP reassembly +*//***************************************************************************/ +typedef struct t_CapwapReassemblyParams { + uint16_t maxNumFramesInProcess; /**< Number of frames which can be reassembled concurrently; must be power of 2. + In case numOfFramesPerHashEntry == e_FM_PCD_MANIP_FOUR_WAYS_HASH, + maxNumFramesInProcess has to be in the range of 4 - 512, + In case numOfFramesPerHashEntry == e_FM_PCD_MANIP_EIGHT_WAYS_HASH, + maxNumFramesInProcess has to be in the range of 8 - 2048 */ + bool haltOnDuplicationFrag; /**< If TRUE, reassembly process will be halted due to duplicated fragment, + and all processed fragments will be enqueued with error indication; + If FALSE, only duplicated fragments will be enqueued with error indication. */ + + e_FmPcdManipReassemTimeOutMode timeOutMode; /**< Expiration delay initialized by the reassembly process */ + uint32_t fqidForTimeOutFrames; /**< FQID in which time out frames will enqueue during Time Out Process */ + uint32_t timeoutRoutineRequestTime; + /**< Represents the time interval in microseconds between consecutive + timeout routine requests It has to be power of 2. */ + uint32_t timeoutThresholdForReassmProcess; + /**< Time interval (microseconds) for marking frames in process as too old; + Frames in process are those for which at least one fragment was received + but not all fragments. */ + + e_FmPcdManipReassemWaysNumber numOfFramesPerHashEntry;/**< Number of frames per hash entry (needed for the reassembly process) */ +} t_CapwapReassemblyParams; + +/**************************************************************************//** + @Description Parameters for defining fragmentation/reassembly manipulation +*//***************************************************************************/ +typedef struct t_FmPcdManipFragOrReasmParams { + bool frag; /**< TRUE if using the structure for fragmentation, + otherwise this structure is used for reassembly */ + uint8_t sgBpid; /**< Scatter/Gather buffer pool id; + Same LIODN number is used for these buffers as for + the received frames buffers, so buffers of this pool + need to be allocated in the same memory area as the + received buffers. If the received buffers arrive + from different sources, the Scatter/Gather BP id + should be mutual to all these sources. */ + e_NetHeaderType hdr; /**< Header selection */ + union { + t_CapwapFragmentationParams capwapFragParams; /**< Structure for CAPWAP fragmentation, + relevant if 'frag' = TRUE, 'hdr' = HEADER_TYPE_CAPWAP */ + t_CapwapReassemblyParams capwapReasmParams; /**< Structure for CAPWAP reassembly, + relevant if 'frag' = FALSE, 'hdr' = HEADER_TYPE_CAPWAP */ + } u; +} t_FmPcdManipFragOrReasmParams; +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */ + + +/**************************************************************************//** + @Description Parameters for defining header removal by header type +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrRmvByHdrParams { + e_FmPcdManipHdrRmvByHdrType type; /**< Selection of header removal location */ + union { +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) + struct { + bool include; /**< If FALSE, remove until the specified header (not including the header); + If TRUE, remove also the specified header. */ + t_FmManipHdrInfo hdrInfo; + } fromStartByHdr; /**< Relevant when type = e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START */ +#endif /* (DPAA_VERSION >= 11) || ... */ +#if (DPAA_VERSION >= 11) + t_FmManipHdrInfo hdrInfo; /**< Relevant when type = e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START */ +#endif /* (DPAA_VERSION >= 11) */ + e_FmPcdManipHdrRmvSpecificL2 specificL2; /**< Relevant when type = e_FM_PCD_MANIP_BY_HDR_SPECIFIC_L2; + Defines which L2 headers to remove. */ + } u; +} t_FmPcdManipHdrRmvByHdrParams; + +/**************************************************************************//** + @Description Parameters for configuring IP fragmentation manipulation + + Restrictions: + - IP Fragmentation output fragments must not be forwarded to application directly. + - Maximum number of fragments per frame is 16. + - Fragmentation of IP fragments is not supported. + - IPv4 packets containing header Option fields are fragmented by copying all option + fields to each fragment, regardless of the copy bit value. + - Transmit confirmation is not supported. + - Fragmentation after SEC can't handle S/G frames. + - Fragmentation nodes must be set as the last PCD action (i.e. the + corresponding CC node key must have next engine set to e_FM_PCD_DONE). + - Only BMan buffers shall be used for frames to be fragmented. + - IPF does not support VSP. Therefore, on the same port where we have IPF + we cannot support VSP. + - NOTE: The following comment is relevant only for FMAN v3 devices: IPF + does not support VSP. Therefore, on the same port where we have IPF we + cannot support VSP. +*//***************************************************************************/ +typedef struct t_FmPcdManipFragIpParams { + uint16_t sizeForFragmentation; /**< If length of the frame is greater than this value, + IP fragmentation will be executed.*/ +#if (DPAA_VERSION == 10) + uint8_t scratchBpid; /**< Absolute buffer pool id according to BM configuration.*/ +#endif /* (DPAA_VERSION == 10) */ + bool sgBpidEn; /**< Enable a dedicated buffer pool id for the Scatter/Gather buffer allocation; + If disabled, the Scatter/Gather buffer will be allocated from the same pool as the + received frame's buffer. */ + uint8_t sgBpid; /**< Scatter/Gather buffer pool id; + This parameters is relevant when 'sgBpidEn=TRUE'; + Same LIODN number is used for these buffers as for the received frames buffers, so buffers + of this pool need to be allocated in the same memory area as the received buffers. + If the received buffers arrive from different sources, the Scatter/Gather BP id should be + mutual to all these sources. */ + e_FmPcdManipDontFragAction dontFragAction; /**< Don't Fragment Action - If an IP packet is larger + than MTU and its DF bit is set, then this field will + determine the action to be taken.*/ +} t_FmPcdManipFragIpParams; + +/**************************************************************************//** + @Description Parameters for configuring IP reassembly manipulation. + + This is a common structure for both IPv4 and IPv6 reassembly + manipulation. For reassembly of both IPv4 and IPv6, make sure to + set the 'hdr' field in t_FmPcdManipReassemParams to HEADER_TYPE_IPv6. + + Restrictions: + - Application must define at least one scheme to catch the reassembled frames. + - Maximum number of fragments per frame is 16. + - Reassembly of IPv4 fragments containing Option fields is supported. + +*//***************************************************************************/ +typedef struct t_FmPcdManipReassemIpParams { + uint8_t relativeSchemeId[2]; /**< Partition relative scheme id: + relativeSchemeId[0] - Relative scheme ID for IPV4 Reassembly manipulation; + relativeSchemeId[1] - Relative scheme ID for IPV6 Reassembly manipulation; + NOTE: The following comment is relevant only for FMAN v2 devices: + Relative scheme ID for IPv4/IPv6 Reassembly manipulation must be smaller than + the user schemes id to ensure that the reassembly schemes will be first match; + Rest schemes, if defined, should have higher relative scheme ID. */ +#if (DPAA_VERSION >= 11) + uint32_t nonConsistentSpFqid; /**< In case that other fragments of the frame corresponds to different storage + profile than the opening fragment (Non-Consistent-SP state) + then one of two possible scenarios occurs: + if 'nonConsistentSpFqid != 0', the reassembled frame will be enqueued to + this fqid, otherwise a 'Non Consistent SP' bit will be set in the FD[status].*/ +#else + uint8_t sgBpid; /**< Buffer pool id for the S/G frame created by the reassembly process */ +#endif /* (DPAA_VERSION >= 11) */ + uint8_t dataMemId; /**< Memory partition ID for the IPR's external tables structure */ + uint16_t dataLiodnOffset; /**< LIODN offset for access the IPR's external tables structure. */ + uint16_t minFragSize[2]; /**< Minimum fragment size: + minFragSize[0] - for ipv4, minFragSize[1] - for ipv6 */ + e_FmPcdManipReassemWaysNumber numOfFramesPerHashEntry[2]; + /**< Number of frames per hash entry needed for reassembly process: + numOfFramesPerHashEntry[0] - for ipv4 (max value is e_FM_PCD_MANIP_EIGHT_WAYS_HASH); + numOfFramesPerHashEntry[1] - for ipv6 (max value is e_FM_PCD_MANIP_SIX_WAYS_HASH). */ + uint16_t maxNumFramesInProcess; /**< Number of frames which can be processed by Reassembly in the same time; + Must be power of 2; + In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_FOUR_WAYS_HASH, + maxNumFramesInProcess has to be in the range of 4 - 512; + In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_EIGHT_WAYS_HASH, + maxNumFramesInProcess has to be in the range of 8 - 2048. */ + e_FmPcdManipReassemTimeOutMode timeOutMode; /**< Expiration delay initialized by Reassembly process */ + uint32_t fqidForTimeOutFrames; /**< FQID in which time out frames will enqueue during Time Out Process; + Recommended value for this field is 0; in this way timed-out frames will be discarded */ + uint32_t timeoutThresholdForReassmProcess; + /**< Represents the time interval in microseconds which defines + if opened frame (at least one fragment was processed but not all the fragments)is found as too old*/ +} t_FmPcdManipReassemIpParams; + +/**************************************************************************//** + @Description structure for defining IPSEC manipulation +*//***************************************************************************/ +typedef struct t_FmPcdManipSpecialOffloadIPSecParams { + bool decryption; /**< TRUE if being used in decryption direction; + FALSE if being used in encryption direction. */ + bool ecnCopy; /**< TRUE to copy the ECN bits from inner/outer to outer/inner + (direction depends on the 'decryption' field). */ + bool dscpCopy; /**< TRUE to copy the DSCP bits from inner/outer to outer/inner + (direction depends on the 'decryption' field). */ + bool variableIpHdrLen; /**< TRUE for supporting variable IP header length in decryption. */ + bool variableIpVersion; /**< TRUE for supporting both IP version on the same SA in encryption */ + uint8_t outerIPHdrLen; /**< if 'variableIpVersion == TRUE' then this field must be set to non-zero value; + It is specifies the length of the outer IP header that was configured in the + corresponding SA. */ + uint16_t arwSize; /**< if <> '0' then will perform ARW check for this SA; + The value must be a multiplication of 16 */ + uintptr_t arwAddr; /**< if arwSize <> '0' then this field must be set to non-zero value; + MUST be allocated from FMAN's MURAM that the post-sec op-port belongs to; + Must be 4B aligned. Required MURAM size is 'NEXT_POWER_OF_2(arwSize+32))/8+4' Bytes */ +} t_FmPcdManipSpecialOffloadIPSecParams; + +#if (DPAA_VERSION >= 11) +/**************************************************************************//** + @Description Parameters for configuring CAPWAP fragmentation manipulation + + Restrictions: + - Maximum number of fragments per frame is 16. + - Transmit confirmation is not supported. + - Fragmentation nodes must be set as the last PCD action (i.e. the + corresponding CC node key must have next engine set to e_FM_PCD_DONE). + - Only BMan buffers shall be used for frames to be fragmented. + - NOTE: The following comment is relevant only for FMAN v3 devices: IPF + does not support VSP. Therefore, on the same port where we have IPF we + cannot support VSP. +*//***************************************************************************/ +typedef struct t_FmPcdManipFragCapwapParams { + uint16_t sizeForFragmentation; /**< If length of the frame is greater than this value, + CAPWAP fragmentation will be executed.*/ + bool sgBpidEn; /**< Enable a dedicated buffer pool id for the Scatter/Gather buffer allocation; + If disabled, the Scatter/Gather buffer will be allocated from the same pool as the + received frame's buffer. */ + uint8_t sgBpid; /**< Scatter/Gather buffer pool id; + This parameters is relevant when 'sgBpidEn=TRUE'; + Same LIODN number is used for these buffers as for the received frames buffers, so buffers + of this pool need to be allocated in the same memory area as the received buffers. + If the received buffers arrive from different sources, the Scatter/Gather BP id should be + mutual to all these sources. */ + bool compressModeEn; /**< CAPWAP Header Options Compress Enable mode; + When this mode is enabled then only the first fragment include the CAPWAP header options + field (if user provides it in the input frame) and all other fragments exclude the CAPWAP + options field (CAPWAP header is updated accordingly).*/ +} t_FmPcdManipFragCapwapParams; + +/**************************************************************************//** + @Description Parameters for configuring CAPWAP reassembly manipulation. + + Restrictions: + - Application must define one scheme to catch the reassembled frames. + - Maximum number of fragments per frame is 16. + +*//***************************************************************************/ +typedef struct t_FmPcdManipReassemCapwapParams { + uint8_t relativeSchemeId; /**< Partition relative scheme id; + NOTE: this id must be smaller than the user schemes id to ensure that the reassembly scheme will be first match; + Rest schemes, if defined, should have higher relative scheme ID. */ + uint8_t dataMemId; /**< Memory partition ID for the IPR's external tables structure */ + uint16_t dataLiodnOffset; /**< LIODN offset for access the IPR's external tables structure. */ + uint16_t maxReassembledFrameLength;/**< The maximum CAPWAP reassembled frame length in bytes; + If maxReassembledFrameLength == 0, any successful reassembled frame length is + considered as a valid length; + if maxReassembledFrameLength > 0, a successful reassembled frame which its length + exceeds this value is considered as an error frame (FD status[CRE] bit is set). */ + e_FmPcdManipReassemWaysNumber numOfFramesPerHashEntry; + /**< Number of frames per hash entry needed for reassembly process */ + uint16_t maxNumFramesInProcess; /**< Number of frames which can be processed by reassembly in the same time; + Must be power of 2; + In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_FOUR_WAYS_HASH, + maxNumFramesInProcess has to be in the range of 4 - 512; + In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_EIGHT_WAYS_HASH, + maxNumFramesInProcess has to be in the range of 8 - 2048. */ + e_FmPcdManipReassemTimeOutMode timeOutMode; /**< Expiration delay initialized by Reassembly process */ + uint32_t fqidForTimeOutFrames; /**< FQID in which time out frames will enqueue during Time Out Process; + Recommended value for this field is 0; in this way timed-out frames will be discarded */ + uint32_t timeoutThresholdForReassmProcess; + /**< Represents the time interval in microseconds which defines + if opened frame (at least one fragment was processed but not all the fragments)is found as too old*/ +} t_FmPcdManipReassemCapwapParams; + +/**************************************************************************//** + @Description structure for defining CAPWAP manipulation +*//***************************************************************************/ +typedef struct t_FmPcdManipSpecialOffloadCapwapParams { + bool dtls; /**< TRUE if continue to SEC DTLS encryption */ + e_FmPcdManipHdrQosSrc qosSrc; /**< TODO */ +} t_FmPcdManipSpecialOffloadCapwapParams; + +#endif /* (DPAA_VERSION >= 11) */ + + +/**************************************************************************//** + @Description Parameters for defining special offload manipulation +*//***************************************************************************/ +typedef struct t_FmPcdManipSpecialOffloadParams { + e_FmPcdManipSpecialOffloadType type; /**< Type of special offload manipulation */ + union + { + t_FmPcdManipSpecialOffloadIPSecParams ipsec; /**< Parameters for IPSec; Relevant when + type = e_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC */ +#if (DPAA_VERSION >= 11) + t_FmPcdManipSpecialOffloadCapwapParams capwap; /**< Parameters for CAPWAP; Relevant when + type = e_FM_PCD_MANIP_SPECIAL_OFFLOAD_CAPWAP */ +#endif /* (DPAA_VERSION >= 11) */ + } u; +} t_FmPcdManipSpecialOffloadParams; + +/**************************************************************************//** + @Description Parameters for defining insertion manipulation +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrInsrt { + uint8_t size; /**< size of inserted section */ + uint8_t *p_Data; /**< data to be inserted */ +} t_FmPcdManipHdrInsrt; + + +/**************************************************************************//** + @Description Parameters for defining generic removal manipulation +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrRmvGenericParams { + uint8_t offset; /**< Offset from beginning of header to the start + location of the removal */ + uint8_t size; /**< Size of removed section */ +} t_FmPcdManipHdrRmvGenericParams; + +/**************************************************************************//** + @Description Parameters for defining generic insertion manipulation +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrInsrtGenericParams { + uint8_t offset; /**< Offset from beginning of header to the start + location of the insertion */ + uint8_t size; /**< Size of inserted section */ + bool replace; /**< TRUE to override (replace) existing data at + 'offset', FALSE to insert */ + uint8_t *p_Data; /**< Pointer to data to be inserted */ +} t_FmPcdManipHdrInsrtGenericParams; + +/**************************************************************************//** + @Description Parameters for defining header manipulation VLAN DSCP To Vpri translation +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrFieldUpdateVlanDscpToVpri { + uint8_t dscpToVpriTable[FM_PCD_MANIP_DSCP_TO_VLAN_TRANS]; + /**< A table of VPri values for each DSCP value; + The index is the DSCP value (0-0x3F) and the + value is the corresponding VPRI (0-15). */ + uint8_t vpriDefVal; /**< 0-7, Relevant only if if updateType = + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN, + this field is the Q Tag default value if the + IP header is not found. */ +} t_FmPcdManipHdrFieldUpdateVlanDscpToVpri; + +/**************************************************************************//** + @Description Parameters for defining header manipulation VLAN fields updates +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrFieldUpdateVlan { + e_FmPcdManipHdrFieldUpdateVlan updateType; /**< Selects VLAN update type */ + union { + uint8_t vpri; /**< 0-7, Relevant only if If updateType = + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN_PRI, this + is the new VLAN pri. */ + t_FmPcdManipHdrFieldUpdateVlanDscpToVpri dscpToVpri; /**< Parameters structure, Relevant only if updateType + = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN. */ + } u; +} t_FmPcdManipHdrFieldUpdateVlan; + +/**************************************************************************//** + @Description Parameters for defining header manipulation IPV4 fields updates +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrFieldUpdateIpv4 { + ipv4HdrManipUpdateFlags_t validUpdates; /**< ORed flag, selecting the required updates */ + uint8_t tos; /**< 8 bit New TOS; Relevant if validUpdates contains + HDR_MANIP_IPV4_TOS */ + uint16_t id; /**< 16 bit New IP ID; Relevant only if validUpdates + contains HDR_MANIP_IPV4_ID */ + uint32_t src; /**< 32 bit New IP SRC; Relevant only if validUpdates + contains HDR_MANIP_IPV4_SRC */ + uint32_t dst; /**< 32 bit New IP DST; Relevant only if validUpdates + contains HDR_MANIP_IPV4_DST */ +} t_FmPcdManipHdrFieldUpdateIpv4; + +/**************************************************************************//** + @Description Parameters for defining header manipulation IPV6 fields updates +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrFieldUpdateIpv6 { + ipv6HdrManipUpdateFlags_t validUpdates; /**< ORed flag, selecting the required updates */ + uint8_t trafficClass; /**< 8 bit New Traffic Class; Relevant if validUpdates contains + HDR_MANIP_IPV6_TC */ + uint8_t src[NET_HEADER_FIELD_IPv6_ADDR_SIZE]; + /**< 16 byte new IP SRC; Relevant only if validUpdates + contains HDR_MANIP_IPV6_SRC */ + uint8_t dst[NET_HEADER_FIELD_IPv6_ADDR_SIZE]; + /**< 16 byte new IP DST; Relevant only if validUpdates + contains HDR_MANIP_IPV6_DST */ +} t_FmPcdManipHdrFieldUpdateIpv6; + +/**************************************************************************//** + @Description Parameters for defining header manipulation TCP/UDP fields updates +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrFieldUpdateTcpUdp { + tcpUdpHdrManipUpdateFlags_t validUpdates; /**< ORed flag, selecting the required updates */ + uint16_t src; /**< 16 bit New TCP/UDP SRC; Relevant only if validUpdates + contains HDR_MANIP_TCP_UDP_SRC */ + uint16_t dst; /**< 16 bit New TCP/UDP DST; Relevant only if validUpdates + contains HDR_MANIP_TCP_UDP_DST */ +} t_FmPcdManipHdrFieldUpdateTcpUdp; + +/**************************************************************************//** + @Description Parameters for defining header manipulation fields updates +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrFieldUpdateParams { + e_FmPcdManipHdrFieldUpdateType type; /**< Type of header field update manipulation */ + union { + t_FmPcdManipHdrFieldUpdateVlan vlan; /**< Parameters for VLAN update. Relevant when + type = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN */ + t_FmPcdManipHdrFieldUpdateIpv4 ipv4; /**< Parameters for IPv4 update. Relevant when + type = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV4 */ + t_FmPcdManipHdrFieldUpdateIpv6 ipv6; /**< Parameters for IPv6 update. Relevant when + type = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV6 */ + t_FmPcdManipHdrFieldUpdateTcpUdp tcpUdp; /**< Parameters for TCP/UDP update. Relevant when + type = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_TCP_UDP */ + } u; +} t_FmPcdManipHdrFieldUpdateParams; + + + +/**************************************************************************//** + @Description Parameters for defining custom header manipulation for generic field replacement +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrCustomGenFieldReplace { + uint8_t srcOffset; /**< Location of new data - Offset from + Parse Result (>= 16, srcOffset+size <= 32, ) */ + uint8_t dstOffset; /**< Location of data to be overwritten - Offset from + start of frame (dstOffset + size <= 256). */ + uint8_t size; /**< The number of bytes (<=16) to be replaced */ + uint8_t mask; /**< Optional 1 byte mask. Set to select bits for + replacement (1 - bit will be replaced); + Clear to use field as is. */ + uint8_t maskOffset; /**< Relevant if mask != 0; + Mask offset within the replaces "size" */ +} t_FmPcdManipHdrCustomGenFieldReplace; + +/**************************************************************************//** + @Description Parameters for defining custom header manipulation for IP replacement +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrCustomIpHdrReplace { + e_FmPcdManipHdrCustomIpReplace replaceType; /**< Selects replace update type */ + bool decTtlHl; /**< Decrement TTL (IPV4) or Hop limit (IPV6) by 1 */ + bool updateIpv4Id; /**< Relevant when replaceType = + e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4 */ + uint16_t id; /**< 16 bit New IP ID; Relevant only if + updateIpv4Id = TRUE */ + uint8_t hdrSize; /**< The size of the new IP header */ + uint8_t hdr[FM_PCD_MANIP_MAX_HDR_SIZE]; + /**< The new IP header */ +} t_FmPcdManipHdrCustomIpHdrReplace; + +/**************************************************************************//** + @Description Parameters for defining custom header manipulation +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrCustomParams { + e_FmPcdManipHdrCustomType type; /**< Type of header field update manipulation */ + union { + t_FmPcdManipHdrCustomIpHdrReplace ipHdrReplace; /**< Parameters IP header replacement */ + t_FmPcdManipHdrCustomGenFieldReplace genFieldReplace; /**< Parameters IP header replacement */ + } u; +} t_FmPcdManipHdrCustomParams; + +/**************************************************************************//** + @Description Parameters for defining specific L2 insertion manipulation +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrInsrtSpecificL2Params { + e_FmPcdManipHdrInsrtSpecificL2 specificL2; /**< Selects which L2 headers to insert */ + bool update; /**< TRUE to update MPLS header */ + uint8_t size; /**< size of inserted section */ + uint8_t *p_Data; /**< data to be inserted */ +} t_FmPcdManipHdrInsrtSpecificL2Params; + +#if (DPAA_VERSION >= 11) +/**************************************************************************//** + @Description Parameters for defining IP insertion manipulation +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrInsrtIpParams { + bool calcL4Checksum; /**< Calculate L4 checksum. */ + e_FmPcdManipHdrQosMappingMode mappingMode; /**< TODO */ + uint8_t lastPidOffset; /**< the offset of the last Protocol within + the inserted header */ + uint16_t id; /**< 16 bit New IP ID */ + bool dontFragOverwrite; + /**< IPv4 only. DF is overwritten with the hash-result next-to-last byte. + * This byte is configured to be overwritten when RPD is set. */ + uint8_t lastDstOffset; + /**< IPv6 only. if routing extension exist, user should set the offset of the destination address + * in order to calculate UDP checksum pseudo header; + * Otherwise set it to '0'. */ + t_FmPcdManipHdrInsrt insrt; /**< size and data to be inserted. */ +} t_FmPcdManipHdrInsrtIpParams; +#endif /* (DPAA_VERSION >= 11) */ + +/**************************************************************************//** + @Description Parameters for defining header insertion manipulation by header type +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrInsrtByHdrParams { + e_FmPcdManipHdrInsrtByHdrType type; /**< Selects manipulation type */ + union { + + t_FmPcdManipHdrInsrtSpecificL2Params specificL2Params; + /**< Used when type = e_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2: + Selects which L2 headers to insert */ +#if (DPAA_VERSION >= 11) + t_FmPcdManipHdrInsrtIpParams ipParams; /**< Used when type = e_FM_PCD_MANIP_INSRT_BY_HDR_IP */ + t_FmPcdManipHdrInsrt insrt; /**< Used when type is one of e_FM_PCD_MANIP_INSRT_BY_HDR_UDP, + e_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE, or + e_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP */ +#endif /* (DPAA_VERSION >= 11) */ + } u; +} t_FmPcdManipHdrInsrtByHdrParams; + +/**************************************************************************//** + @Description Parameters for defining header insertion manipulation +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrInsrtParams { + e_FmPcdManipHdrInsrtType type; /**< Type of insertion manipulation */ + union { + t_FmPcdManipHdrInsrtByHdrParams byHdr; /**< Parameters for defining header insertion manipulation by header type, + relevant if 'type' = e_FM_PCD_MANIP_INSRT_BY_HDR */ + t_FmPcdManipHdrInsrtGenericParams generic; /**< Parameters for defining generic header insertion manipulation, + relevant if 'type' = e_FM_PCD_MANIP_INSRT_GENERIC */ +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) + t_FmPcdManipHdrInsrtByTemplateParams byTemplate; /**< Parameters for defining header insertion manipulation by template, + relevant if 'type' = e_FM_PCD_MANIP_INSRT_BY_TEMPLATE */ +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */ + } u; +} t_FmPcdManipHdrInsrtParams; + +/**************************************************************************//** + @Description Parameters for defining header removal manipulation +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrRmvParams { + e_FmPcdManipHdrRmvType type; /**< Type of header removal manipulation */ + union { + t_FmPcdManipHdrRmvByHdrParams byHdr; /**< Parameters for defining header removal manipulation by header type, + relevant if type = e_FM_PCD_MANIP_RMV_BY_HDR */ + t_FmPcdManipHdrRmvGenericParams generic; /**< Parameters for defining generic header removal manipulation, + relevant if type = e_FM_PCD_MANIP_RMV_GENERIC */ + } u; +} t_FmPcdManipHdrRmvParams; + +/**************************************************************************//** + @Description Parameters for defining header manipulation node +*//***************************************************************************/ +typedef struct t_FmPcdManipHdrParams { + bool rmv; /**< TRUE, to define removal manipulation */ + t_FmPcdManipHdrRmvParams rmvParams; /**< Parameters for removal manipulation, relevant if 'rmv' = TRUE */ + + bool insrt; /**< TRUE, to define insertion manipulation */ + t_FmPcdManipHdrInsrtParams insrtParams; /**< Parameters for insertion manipulation, relevant if 'insrt' = TRUE */ + + bool fieldUpdate; /**< TRUE, to define field update manipulation */ + t_FmPcdManipHdrFieldUpdateParams fieldUpdateParams; /**< Parameters for field update manipulation, relevant if 'fieldUpdate' = TRUE */ + + bool custom; /**< TRUE, to define custom manipulation */ + t_FmPcdManipHdrCustomParams customParams; /**< Parameters for custom manipulation, relevant if 'custom' = TRUE */ + + bool dontParseAfterManip;/**< TRUE to de-activate the parser after the manipulation defined in this node. + Restrictions: + 1. MUST be set if the next engine after the CC is not another CC node + (but rather Policer or Keygen), and this is the last (no h_NextManip) in a chain + of manipulation nodes. This includes single nodes (i.e. no h_NextManip and + also never pointed as h_NextManip of other manipulation nodes) + 2. MUST be set if the next engine after the CC is another CC node, and + this is NOT the last manipulation node (i.e. it has h_NextManip).*/ +} t_FmPcdManipHdrParams; + +/**************************************************************************//** + @Description Parameters for defining fragmentation manipulation +*//***************************************************************************/ +typedef struct t_FmPcdManipFragParams { + e_NetHeaderType hdr; /**< Header selection */ + union { +#if (DPAA_VERSION >= 11) + t_FmPcdManipFragCapwapParams capwapFrag; /**< Parameters for defining CAPWAP fragmentation, + relevant if 'hdr' = HEADER_TYPE_CAPWAP */ +#endif /* (DPAA_VERSION >= 11) */ + t_FmPcdManipFragIpParams ipFrag; /**< Parameters for defining IP fragmentation, + relevant if 'hdr' = HEADER_TYPE_Ipv4 or HEADER_TYPE_Ipv6 */ + } u; +} t_FmPcdManipFragParams; + +/**************************************************************************//** + @Description Parameters for defining reassembly manipulation +*//***************************************************************************/ +typedef struct t_FmPcdManipReassemParams { + e_NetHeaderType hdr; /**< Header selection */ + union { +#if (DPAA_VERSION >= 11) + t_FmPcdManipReassemCapwapParams capwapReassem; /**< Parameters for defining CAPWAP reassembly, + relevant if 'hdr' = HEADER_TYPE_CAPWAP */ +#endif /* (DPAA_VERSION >= 11) */ + + t_FmPcdManipReassemIpParams ipReassem; /**< Parameters for defining IP reassembly, + relevant if 'hdr' = HEADER_TYPE_Ipv4 or HEADER_TYPE_Ipv6 */ + } u; +} t_FmPcdManipReassemParams; + +/**************************************************************************//** + @Description Parameters for defining a manipulation node +*//***************************************************************************/ +typedef struct t_FmPcdManipParams { + e_FmPcdManipType type; /**< Selects type of manipulation node */ + union{ + t_FmPcdManipHdrParams hdr; /**< Parameters for defining header manipulation node */ + t_FmPcdManipReassemParams reassem; /**< Parameters for defining reassembly manipulation node */ + t_FmPcdManipFragParams frag; /**< Parameters for defining fragmentation manipulation node */ + t_FmPcdManipSpecialOffloadParams specialOffload; /**< Parameters for defining special offload manipulation node */ + } u; + + t_Handle h_NextManip; /**< Supported for Header Manipulation only; + Handle to another (previously defined) manipulation node; + Allows concatenation of manipulation actions; + This parameter is optional and may be NULL. */ +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) + bool fragOrReasm; /**< TRUE, if defined fragmentation/reassembly manipulation */ + t_FmPcdManipFragOrReasmParams fragOrReasmParams; /**< Parameters for fragmentation/reassembly manipulation, + relevant if fragOrReasm = TRUE */ +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */ +} t_FmPcdManipParams; + +/**************************************************************************//** + @Description Structure for retrieving IP reassembly statistics +*//***************************************************************************/ +typedef struct t_FmPcdManipReassemIpStats { + /* common counters for both IPv4 and IPv6 */ + uint32_t timeout; /**< Counts the number of timeout occurrences */ + uint32_t rfdPoolBusy; /**< Counts the number of failed attempts to allocate + a Reassembly Frame Descriptor */ + uint32_t internalBufferBusy; /**< Counts the number of times an internal buffer busy occurred */ + uint32_t externalBufferBusy; /**< Counts the number of times external buffer busy occurred */ + uint32_t sgFragments; /**< Counts the number of Scatter/Gather fragments */ + uint32_t dmaSemaphoreDepletion; /**< Counts the number of failed attempts to allocate a DMA semaphore */ +#if (DPAA_VERSION >= 11) + uint32_t nonConsistentSp; /**< Counts the number of Non Consistent Storage Profile events for + successfully reassembled frames */ +#endif /* (DPAA_VERSION >= 11) */ + struct { + uint32_t successfullyReassembled; /**< Counts the number of successfully reassembled frames */ + uint32_t validFragments; /**< Counts the total number of valid fragments that + have been processed for all frames */ + uint32_t processedFragments; /**< Counts the number of processed fragments + (valid and error fragments) for all frames */ + uint32_t malformedFragments; /**< Counts the number of malformed fragments processed for all frames */ + uint32_t discardedFragments; /**< Counts the number of fragments discarded by the reassembly process */ + uint32_t autoLearnBusy; /**< Counts the number of times a busy condition occurs when attempting + to access an IP-Reassembly Automatic Learning Hash set */ + uint32_t moreThan16Fragments; /**< Counts the fragment occurrences in which the number of fragments-per-frame + exceeds 16 */ + } specificHdrStatistics[2]; /**< slot '0' is for IPv4, slot '1' is for IPv6 */ +} t_FmPcdManipReassemIpStats; + +/**************************************************************************//** + @Description Structure for retrieving IP fragmentation statistics +*//***************************************************************************/ +typedef struct t_FmPcdManipFragIpStats { + uint32_t totalFrames; /**< Number of frames that passed through the manipulation node */ + uint32_t fragmentedFrames; /**< Number of frames that were fragmented */ + uint32_t generatedFragments; /**< Number of fragments that were generated */ +} t_FmPcdManipFragIpStats; + +#if (DPAA_VERSION >= 11) +/**************************************************************************//** + @Description Structure for retrieving CAPWAP reassembly statistics +*//***************************************************************************/ +typedef struct t_FmPcdManipReassemCapwapStats { + uint32_t timeout; /**< Counts the number of timeout occurrences */ + uint32_t rfdPoolBusy; /**< Counts the number of failed attempts to allocate + a Reassembly Frame Descriptor */ + uint32_t internalBufferBusy; /**< Counts the number of times an internal buffer busy occurred */ + uint32_t externalBufferBusy; /**< Counts the number of times external buffer busy occurred */ + uint32_t sgFragments; /**< Counts the number of Scatter/Gather fragments */ + uint32_t dmaSemaphoreDepletion; /**< Counts the number of failed attempts to allocate a DMA semaphore */ + uint32_t successfullyReassembled; /**< Counts the number of successfully reassembled frames */ + uint32_t validFragments; /**< Counts the total number of valid fragments that + have been processed for all frames */ + uint32_t processedFragments; /**< Counts the number of processed fragments + (valid and error fragments) for all frames */ + uint32_t malformedFragments; /**< Counts the number of malformed fragments processed for all frames */ + uint32_t autoLearnBusy; /**< Counts the number of times a busy condition occurs when attempting + to access an Reassembly Automatic Learning Hash set */ + uint32_t discardedFragments; /**< Counts the number of fragments discarded by the reassembly process */ + uint32_t moreThan16Fragments; /**< Counts the fragment occurrences in which the number of fragments-per-frame + exceeds 16 */ + uint32_t exceedMaxReassemblyFrameLen;/**< ounts the number of times that a successful reassembled frame + length exceeds MaxReassembledFrameLength value */ +} t_FmPcdManipReassemCapwapStats; + +/**************************************************************************//** + @Description Structure for retrieving CAPWAP fragmentation statistics +*//***************************************************************************/ +typedef struct t_FmPcdManipFragCapwapStats { + uint32_t totalFrames; /**< Number of frames that passed through the manipulation node */ + uint32_t fragmentedFrames; /**< Number of frames that were fragmented */ + uint32_t generatedFragments; /**< Number of fragments that were generated */ +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) + uint8_t sgAllocationFailure; /**< Number of allocation failure of s/g buffers */ +#endif /* (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) */ +} t_FmPcdManipFragCapwapStats; +#endif /* (DPAA_VERSION >= 11) */ + +/**************************************************************************//** + @Description Structure for retrieving reassembly statistics +*//***************************************************************************/ +typedef struct t_FmPcdManipReassemStats { + union { + t_FmPcdManipReassemIpStats ipReassem; /**< Structure for IP reassembly statistics */ +#if (DPAA_VERSION >= 11) + t_FmPcdManipReassemCapwapStats capwapReassem; /**< Structure for CAPWAP reassembly statistics */ +#endif /* (DPAA_VERSION >= 11) */ + } u; +} t_FmPcdManipReassemStats; + +/**************************************************************************//** + @Description Structure for retrieving fragmentation statistics +*//***************************************************************************/ +typedef struct t_FmPcdManipFragStats { + union { + t_FmPcdManipFragIpStats ipFrag; /**< Structure for IP fragmentation statistics */ +#if (DPAA_VERSION >= 11) + t_FmPcdManipFragCapwapStats capwapFrag; /**< Structure for CAPWAP fragmentation statistics */ +#endif /* (DPAA_VERSION >= 11) */ + } u; +} t_FmPcdManipFragStats; + +/**************************************************************************//** + @Description Structure for selecting manipulation statistics +*//***************************************************************************/ +typedef struct t_FmPcdManipStats { + union { + t_FmPcdManipReassemStats reassem; /**< Structure for reassembly statistics */ + t_FmPcdManipFragStats frag; /**< Structure for fragmentation statistics */ + } u; +} t_FmPcdManipStats; + +#if (DPAA_VERSION >= 11) +/**************************************************************************//** + @Description Parameters for defining frame replicator group and its members +*//***************************************************************************/ +typedef struct t_FmPcdFrmReplicGroupParams { + uint8_t maxNumOfEntries; /**< Maximal number of members in the group; + Must be at least 2. */ + uint8_t numOfEntries; /**< Number of members in the group; + Must be at least 1. */ + t_FmPcdCcNextEngineParams nextEngineParams[FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES]; + /**< Array of members' parameters */ +} t_FmPcdFrmReplicGroupParams; +#endif /* (DPAA_VERSION >= 11) */ + +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) +/**************************************************************************//** + @Description structure for defining statistics node +*//***************************************************************************/ +typedef struct t_FmPcdStatsParams { + e_FmPcdStatsType type; /**< type of statistics node */ +} t_FmPcdStatsParams; +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */ + +/**************************************************************************//** + @Function FM_PCD_NetEnvCharacteristicsSet + + @Description Define a set of Network Environment Characteristics. + + When setting an environment it is important to understand its + application. It is not meant to describe the flows that will run + on the ports using this environment, but what the user means TO DO + with the PCD mechanisms in order to parse-classify-distribute those + frames. + By specifying a distinction unit, the user means it would use that option + for distinction between frames at either a KeyGen scheme or a coarse + classification action descriptor. Using interchangeable headers to define a + unit means that the user is indifferent to which of the interchangeable + headers is present in the frame, and wants the distinction to be based + on the presence of either one of them. + + Depending on context, there are limitations to the use of environments. A + port using the PCD functionality is bound to an environment. Some or even + all ports may share an environment but also an environment per port is + possible. When initializing a scheme, a classification plan group (see below), + or a coarse classification tree, one of the initialized environments must be + stated and related to. When a port is bound to a scheme, a classification + plan group, or a coarse classification tree, it MUST be bound to the same + environment. + + The different PCD modules, may relate (for flows definition) ONLY on + distinction units as defined by their environment. When initializing a + scheme for example, it may not choose to select IPV4 as a match for + recognizing flows unless it was defined in the relating environment. In + fact, to guide the user through the configuration of the PCD, each module's + characterization in terms of flows is not done using protocol names, but using + environment indexes. + + In terms of HW implementation, the list of distinction units sets the LCV vectors + and later used for match vector, classification plan vectors and coarse classification + indexing. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] p_NetEnvParams A structure of parameters for the initialization of + the network environment. + + @Return A handle to the initialized object on success; NULL code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +t_Handle FM_PCD_NetEnvCharacteristicsSet(t_Handle h_FmPcd, t_FmPcdNetEnvParams *p_NetEnvParams); + +/**************************************************************************//** + @Function FM_PCD_NetEnvCharacteristicsDelete + + @Description Deletes a set of Network Environment Characteristics. + + @Param[in] h_NetEnv A handle to the Network environment. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_PCD_NetEnvCharacteristicsDelete(t_Handle h_NetEnv); + +/**************************************************************************//** + @Function FM_PCD_KgSchemeSet + + @Description Initializing or modifying and enabling a scheme for the KeyGen. + This routine should be called for adding or modifying a scheme. + When a scheme needs modifying, the API requires that it will be + rewritten. In such a case 'modify' should be TRUE. If the + routine is called for a valid scheme and 'modify' is FALSE, + it will return error. + + @Param[in] h_FmPcd If this is a new scheme - A handle to an FM PCD Module. + Otherwise NULL (ignored by driver). + @Param[in,out] p_SchemeParams A structure of parameters for defining the scheme + + @Return A handle to the initialized scheme on success; NULL code otherwise. + When used as "modify" (rather than for setting a new scheme), + p_SchemeParams->id.h_Scheme will return NULL if action fails due to scheme + BUSY state. + + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +t_Handle FM_PCD_KgSchemeSet(t_Handle h_FmPcd, + t_FmPcdKgSchemeParams *p_SchemeParams); + +/**************************************************************************//** + @Function FM_PCD_KgSchemeDelete + + @Description Deleting an initialized scheme. + + @Param[in] h_Scheme scheme handle as returned by FM_PCD_KgSchemeSet() + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init() & FM_PCD_KgSchemeSet(). +*//***************************************************************************/ +t_Error FM_PCD_KgSchemeDelete(t_Handle h_Scheme); + +/**************************************************************************//** + @Function FM_PCD_KgSchemeGetCounter + + @Description Reads scheme packet counter. + + @Param[in] h_Scheme scheme handle as returned by FM_PCD_KgSchemeSet(). + + @Return Counter's current value. + + @Cautions Allowed only following FM_PCD_Init() & FM_PCD_KgSchemeSet(). +*//***************************************************************************/ +uint32_t FM_PCD_KgSchemeGetCounter(t_Handle h_Scheme); + +/**************************************************************************//** + @Function FM_PCD_KgSchemeSetCounter + + @Description Writes scheme packet counter. + + @Param[in] h_Scheme scheme handle as returned by FM_PCD_KgSchemeSet(). + @Param[in] value New scheme counter value - typically '0' for + resetting the counter. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init() & FM_PCD_KgSchemeSet(). +*//***************************************************************************/ +t_Error FM_PCD_KgSchemeSetCounter(t_Handle h_Scheme, uint32_t value); + +/**************************************************************************//** + @Function FM_PCD_PlcrProfileSet + + @Description Sets a profile entry in the policer profile table. + The routine overrides any existing value. + + @Param[in] h_FmPcd A handle to an FM PCD Module. + @Param[in] p_Profile A structure of parameters for defining a + policer profile entry. + + @Return A handle to the initialized object on success; NULL code otherwise. + When used as "modify" (rather than for setting a new profile), + p_Profile->id.h_Profile will return NULL if action fails due to profile + BUSY state. + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +t_Handle FM_PCD_PlcrProfileSet(t_Handle h_FmPcd, + t_FmPcdPlcrProfileParams *p_Profile); + +/**************************************************************************//** + @Function FM_PCD_PlcrProfileDelete + + @Description Delete a profile entry in the policer profile table. + The routine set entry to invalid. + + @Param[in] h_Profile A handle to the profile. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +t_Error FM_PCD_PlcrProfileDelete(t_Handle h_Profile); + +/**************************************************************************//** + @Function FM_PCD_PlcrProfileGetCounter + + @Description Sets an entry in the classification plan. + The routine overrides any existing value. + + @Param[in] h_Profile A handle to the profile. + @Param[in] counter Counter selector. + + @Return specific counter value. + + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +uint32_t FM_PCD_PlcrProfileGetCounter(t_Handle h_Profile, + e_FmPcdPlcrProfileCounters counter); + +/**************************************************************************//** + @Function FM_PCD_PlcrProfileSetCounter + + @Description Sets an entry in the classification plan. + The routine overrides any existing value. + + @Param[in] h_Profile A handle to the profile. + @Param[in] counter Counter selector. + @Param[in] value value to set counter with. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +t_Error FM_PCD_PlcrProfileSetCounter(t_Handle h_Profile, + e_FmPcdPlcrProfileCounters counter, + uint32_t value); + +/**************************************************************************//** + @Function FM_PCD_CcRootBuild + + @Description This routine must be called to define a complete coarse + classification tree. This is the way to define coarse + classification to a certain flow - the KeyGen schemes + may point only to trees defined in this way. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] p_Params A structure of parameters to define the tree. + + @Return A handle to the initialized object on success; NULL code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +t_Handle FM_PCD_CcRootBuild (t_Handle h_FmPcd, + t_FmPcdCcTreeParams *p_Params); + +/**************************************************************************//** + @Function FM_PCD_CcRootDelete + + @Description Deleting an built tree. + + @Param[in] h_CcTree A handle to a CC tree. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +t_Error FM_PCD_CcRootDelete(t_Handle h_CcTree); + +/**************************************************************************//** + @Function FM_PCD_CcRootModifyNextEngine + + @Description Modify the Next Engine Parameters in the entry of the tree. + + @Param[in] h_CcTree A handle to the tree + @Param[in] grpId A Group index in the tree + @Param[in] index Entry index in the group defined by grpId + @Param[in] p_FmPcdCcNextEngineParams Pointer to new next engine parameters + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_CcBuildTree(). +*//***************************************************************************/ +t_Error FM_PCD_CcRootModifyNextEngine(t_Handle h_CcTree, + uint8_t grpId, + uint8_t index, + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams); + +/**************************************************************************//** + @Function FM_PCD_MatchTableSet + + @Description This routine should be called for each CC (coarse classification) + node. The whole CC tree should be built bottom up so that each + node points to already defined nodes. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] p_Param A structure of parameters defining the CC node + + @Return A handle to the initialized object on success; NULL code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +t_Handle FM_PCD_MatchTableSet(t_Handle h_FmPcd, t_FmPcdCcNodeParams *p_Param); + +/**************************************************************************//** + @Function FM_PCD_MatchTableDelete + + @Description Deleting an built node. + + @Param[in] h_CcNode A handle to a CC node. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +t_Error FM_PCD_MatchTableDelete(t_Handle h_CcNode); + +/**************************************************************************//** + @Function FM_PCD_MatchTableModifyMissNextEngine + + @Description Modify the Next Engine Parameters of the Miss key case of the node. + + @Param[in] h_CcNode A handle to the node + @Param[in] p_FmPcdCcNextEngineParams Parameters for defining next engine + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_MatchTableSet(); + Not relevant in the case the node is of type 'INDEXED_LOOKUP'. + When configuring nextEngine = e_FM_PCD_CC, note that + p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different + from the currently changed table. + +*//***************************************************************************/ +t_Error FM_PCD_MatchTableModifyMissNextEngine(t_Handle h_CcNode, + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams); + +/**************************************************************************//** + @Function FM_PCD_MatchTableRemoveKey + + @Description Remove the key (including next engine parameters of this key) + defined by the index of the relevant node. + + @Param[in] h_CcNode A handle to the node + @Param[in] keyIndex Key index for removing + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_MatchTableSet() was called for this + node and the nodes that lead to it. +*//***************************************************************************/ +t_Error FM_PCD_MatchTableRemoveKey(t_Handle h_CcNode, uint16_t keyIndex); + +/**************************************************************************//** + @Function FM_PCD_MatchTableAddKey + + @Description Add the key (including next engine parameters of this key in the + index defined by the keyIndex. Note that 'FM_PCD_LAST_KEY_INDEX' + may be used by user that don't care about the position of the + key in the table - in that case, the key will be automatically + added by the driver in the last available entry. + + @Param[in] h_CcNode A handle to the node + @Param[in] keyIndex Key index for adding. + @Param[in] keySize Key size of added key + @Param[in] p_KeyParams A pointer to the parameters includes + new key with Next Engine Parameters + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_MatchTableSet() was called for this + node and the nodes that lead to it. +*//***************************************************************************/ +t_Error FM_PCD_MatchTableAddKey(t_Handle h_CcNode, + uint16_t keyIndex, + uint8_t keySize, + t_FmPcdCcKeyParams *p_KeyParams); + +/**************************************************************************//** + @Function FM_PCD_MatchTableModifyNextEngine + + @Description Modify the Next Engine Parameters in the relevant key entry of the node. + + @Param[in] h_CcNode A handle to the node + @Param[in] keyIndex Key index for Next Engine modifications + @Param[in] p_FmPcdCcNextEngineParams Parameters for defining next engine + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_MatchTableSet(). + When configuring nextEngine = e_FM_PCD_CC, note that + p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different + from the currently changed table. + +*//***************************************************************************/ +t_Error FM_PCD_MatchTableModifyNextEngine(t_Handle h_CcNode, + uint16_t keyIndex, + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams); + +/**************************************************************************//** + @Function FM_PCD_MatchTableModifyKeyAndNextEngine + + @Description Modify the key and Next Engine Parameters of this key in the + index defined by the keyIndex. + + @Param[in] h_CcNode A handle to the node + @Param[in] keyIndex Key index for adding + @Param[in] keySize Key size of added key + @Param[in] p_KeyParams A pointer to the parameters includes + modified key and modified Next Engine Parameters + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_MatchTableSet() was called for this + node and the nodes that lead to it. + When configuring nextEngine = e_FM_PCD_CC, note that + p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different + from the currently changed table. +*//***************************************************************************/ +t_Error FM_PCD_MatchTableModifyKeyAndNextEngine(t_Handle h_CcNode, + uint16_t keyIndex, + uint8_t keySize, + t_FmPcdCcKeyParams *p_KeyParams); + +/**************************************************************************//** + @Function FM_PCD_MatchTableModifyKey + + @Description Modify the key in the index defined by the keyIndex. + + @Param[in] h_CcNode A handle to the node + @Param[in] keyIndex Key index for adding + @Param[in] keySize Key size of added key + @Param[in] p_Key A pointer to the new key + @Param[in] p_Mask A pointer to the new mask if relevant, + otherwise pointer to NULL + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_MatchTableSet() was called for this + node and the nodes that lead to it. +*//***************************************************************************/ +t_Error FM_PCD_MatchTableModifyKey(t_Handle h_CcNode, + uint16_t keyIndex, + uint8_t keySize, + uint8_t *p_Key, + uint8_t *p_Mask); + +/**************************************************************************//** + @Function FM_PCD_MatchTableFindNRemoveKey + + @Description Remove the key (including next engine parameters of this key) + defined by the key and mask. Note that this routine will search + the node to locate the index of the required key (& mask) to remove. + + @Param[in] h_CcNode A handle to the node + @Param[in] keySize Key size of the one to remove. + @Param[in] p_Key A pointer to the requested key to remove. + @Param[in] p_Mask A pointer to the mask if relevant, + otherwise pointer to NULL + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_MatchTableSet() was called for this + node and the nodes that lead to it. +*//***************************************************************************/ +t_Error FM_PCD_MatchTableFindNRemoveKey(t_Handle h_CcNode, + uint8_t keySize, + uint8_t *p_Key, + uint8_t *p_Mask); + +/**************************************************************************//** + @Function FM_PCD_MatchTableFindNModifyNextEngine + + @Description Modify the Next Engine Parameters in the relevant key entry of + the node. Note that this routine will search the node to locate + the index of the required key (& mask) to modify. + + @Param[in] h_CcNode A handle to the node + @Param[in] keySize Key size of the one to modify. + @Param[in] p_Key A pointer to the requested key to modify. + @Param[in] p_Mask A pointer to the mask if relevant, + otherwise pointer to NULL + @Param[in] p_FmPcdCcNextEngineParams Parameters for defining next engine + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_MatchTableSet(). + When configuring nextEngine = e_FM_PCD_CC, note that + p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different + from the currently changed table. +*//***************************************************************************/ +t_Error FM_PCD_MatchTableFindNModifyNextEngine(t_Handle h_CcNode, + uint8_t keySize, + uint8_t *p_Key, + uint8_t *p_Mask, + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams); + +/**************************************************************************//** + @Function FM_PCD_MatchTableFindNModifyKeyAndNextEngine + + @Description Modify the key and Next Engine Parameters of this key in the + index defined by the keyIndex. Note that this routine will search + the node to locate the index of the required key (& mask) to modify. + + @Param[in] h_CcNode A handle to the node + @Param[in] keySize Key size of the one to modify. + @Param[in] p_Key A pointer to the requested key to modify. + @Param[in] p_Mask A pointer to the mask if relevant, + otherwise pointer to NULL + @Param[in] p_KeyParams A pointer to the parameters includes + modified key and modified Next Engine Parameters + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_MatchTableSet() was called for this + node and the nodes that lead to it. + When configuring nextEngine = e_FM_PCD_CC, note that + p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different + from the currently changed table. +*//***************************************************************************/ +t_Error FM_PCD_MatchTableFindNModifyKeyAndNextEngine(t_Handle h_CcNode, + uint8_t keySize, + uint8_t *p_Key, + uint8_t *p_Mask, + t_FmPcdCcKeyParams *p_KeyParams); + +/**************************************************************************//** + @Function FM_PCD_MatchTableFindNModifyKey + + @Description Modify the key in the index defined by the keyIndex. Note that + this routine will search the node to locate the index of the + required key (& mask) to modify. + + @Param[in] h_CcNode A handle to the node + @Param[in] keySize Key size of the one to modify. + @Param[in] p_Key A pointer to the requested key to modify. + @Param[in] p_Mask A pointer to the mask if relevant, + otherwise pointer to NULL + @Param[in] p_NewKey A pointer to the new key + @Param[in] p_NewMask A pointer to the new mask if relevant, + otherwise pointer to NULL + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_MatchTableSet() was called for this + node and the nodes that lead to it. +*//***************************************************************************/ +t_Error FM_PCD_MatchTableFindNModifyKey(t_Handle h_CcNode, + uint8_t keySize, + uint8_t *p_Key, + uint8_t *p_Mask, + uint8_t *p_NewKey, + uint8_t *p_NewMask); + +/**************************************************************************//** + @Function FM_PCD_MatchTableGetKeyCounter + + @Description This routine may be used to get a counter of specific key in a CC + Node; This counter reflects how many frames passed that were matched + this key. + + @Param[in] h_CcNode A handle to the node + @Param[in] keyIndex Key index for adding + + @Return The specific key counter. + + @Cautions Allowed only following FM_PCD_MatchTableSet(). +*//***************************************************************************/ +uint32_t FM_PCD_MatchTableGetKeyCounter(t_Handle h_CcNode, uint16_t keyIndex); + +/**************************************************************************//** + @Function FM_PCD_MatchTableGetKeyStatistics + + @Description This routine may be used to get statistics counters of specific key + in a CC Node. + + If 'e_FM_PCD_CC_STATS_MODE_FRAME' and + 'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node, + these counters reflect how many frames passed that were matched + this key; The total frames count will be returned in the counter + of the first range (as only one frame length range was defined). + If 'e_FM_PCD_CC_STATS_MODE_RMON' was set for this node, the total + frame count will be separated to frame length counters, based on + provided frame length ranges. + + @Param[in] h_CcNode A handle to the node + @Param[in] keyIndex Key index for adding + @Param[out] p_KeyStatistics Key statistics counters + + @Return The specific key statistics. + + @Cautions Allowed only following FM_PCD_MatchTableSet(). +*//***************************************************************************/ +t_Error FM_PCD_MatchTableGetKeyStatistics(t_Handle h_CcNode, + uint16_t keyIndex, + t_FmPcdCcKeyStatistics *p_KeyStatistics); + +/**************************************************************************//** + @Function FM_PCD_MatchTableGetMissStatistics + + @Description This routine may be used to get statistics counters of miss entry + in a CC Node. + + If 'e_FM_PCD_CC_STATS_MODE_FRAME' and + 'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node, + these counters reflect how many frames were not matched to any + existing key and therefore passed through the miss entry; The + total frames count will be returned in the counter of the + first range (as only one frame length range was defined). + + @Param[in] h_CcNode A handle to the node + @Param[out] p_MissStatistics Statistics counters for 'miss' + + @Return The statistics for 'miss'. + + @Cautions Allowed only following FM_PCD_MatchTableSet(). +*//***************************************************************************/ +t_Error FM_PCD_MatchTableGetMissStatistics(t_Handle h_CcNode, + t_FmPcdCcKeyStatistics *p_MissStatistics); + +/**************************************************************************//** + @Function FM_PCD_MatchTableFindNGetKeyStatistics + + @Description This routine may be used to get statistics counters of specific key + in a CC Node. + + If 'e_FM_PCD_CC_STATS_MODE_FRAME' and + 'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node, + these counters reflect how many frames passed that were matched + this key; The total frames count will be returned in the counter + of the first range (as only one frame length range was defined). + If 'e_FM_PCD_CC_STATS_MODE_RMON' was set for this node, the total + frame count will be separated to frame length counters, based on + provided frame length ranges. + Note that this routine will search the node to locate the index + of the required key based on received key parameters. + + @Param[in] h_CcNode A handle to the node + @Param[in] keySize Size of the requested key + @Param[in] p_Key A pointer to the requested key + @Param[in] p_Mask A pointer to the mask if relevant, + otherwise pointer to NULL + @Param[out] p_KeyStatistics Key statistics counters + + @Return The specific key statistics. + + @Cautions Allowed only following FM_PCD_MatchTableSet(). +*//***************************************************************************/ +t_Error FM_PCD_MatchTableFindNGetKeyStatistics(t_Handle h_CcNode, + uint8_t keySize, + uint8_t *p_Key, + uint8_t *p_Mask, + t_FmPcdCcKeyStatistics *p_KeyStatistics); + +/**************************************************************************//* + @Function FM_PCD_MatchTableGetNextEngine + + @Description Gets NextEngine of the relevant keyIndex. + + @Param[in] h_CcNode A handle to the node. + @Param[in] keyIndex keyIndex in the relevant node. + @Param[out] p_FmPcdCcNextEngineParams here updated nextEngine parameters for + the relevant keyIndex of the CC Node + received as parameter to this function + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +t_Error FM_PCD_MatchTableGetNextEngine(t_Handle h_CcNode, + uint16_t keyIndex, + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams); + +/**************************************************************************//* + @Function FM_PCD_MatchTableGetIndexedHashBucket + + @Description This routine simulates KeyGen operation on the provided key and + calculates to which hash bucket it will be mapped. + + @Param[in] h_CcNode A handle to the node. + @Param[in] kgKeySize Key size as it was configured in the KG + scheme that leads to this hash. + @Param[in] p_KgKey Pointer to the key; must be like the key + that the KG is generated, i.e. the same + extraction and with mask if exist. + @Param[in] kgHashShift Hash-shift as it was configured in the KG + scheme that leads to this hash. + @Param[out] p_CcNodeBucketHandle Pointer to the bucket of the provided key. + @Param[out] p_BucketIndex Index to the bucket of the provided key + @Param[out] p_LastIndex Pointer to last index in the bucket of the + provided key. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_HashTableSet() +*//***************************************************************************/ +t_Error FM_PCD_MatchTableGetIndexedHashBucket(t_Handle h_CcNode, + uint8_t kgKeySize, + uint8_t *p_KgKey, + uint8_t kgHashShift, + t_Handle *p_CcNodeBucketHandle, + uint8_t *p_BucketIndex, + uint16_t *p_LastIndex); + +/**************************************************************************//** + @Function FM_PCD_HashTableSet + + @Description This routine initializes a hash table structure. + KeyGen hash result determines the hash bucket. + Next, KeyGen key is compared against all keys of this + bucket (exact match). + Number of sets (number of buckets) of the hash equals to the + number of 1-s in 'hashResMask' in the provided parameters. + Number of hash table ways is then calculated by dividing + 'maxNumOfKeys' equally between the hash sets. This is the maximal + number of keys that a hash bucket may hold. + The hash table is initialized empty and keys may be + added to it following the initialization. Keys masks are not + supported in current hash table implementation. + The initialized hash table can be integrated as a node in a + CC tree. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] p_Param A structure of parameters defining the hash table + + @Return A handle to the initialized object on success; NULL code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +t_Handle FM_PCD_HashTableSet(t_Handle h_FmPcd, t_FmPcdHashTableParams *p_Param); + +/**************************************************************************//** + @Function FM_PCD_HashTableDelete + + @Description This routine deletes the provided hash table and released all + its allocated resources. + + @Param[in] h_HashTbl A handle to a hash table + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_HashTableSet(). +*//***************************************************************************/ +t_Error FM_PCD_HashTableDelete(t_Handle h_HashTbl); + +/**************************************************************************//** + @Function FM_PCD_HashTableAddKey + + @Description This routine adds the provided key (including next engine + parameters of this key) to the hash table. + The key is added as the last key of the bucket that it is + mapped to. + + @Param[in] h_HashTbl A handle to a hash table + @Param[in] keySize Key size of added key + @Param[in] p_KeyParams A pointer to the parameters includes + new key with next engine parameters; The pointer + to the key mask must be NULL, as masks are not + supported in hash table implementation. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_HashTableSet(). +*//***************************************************************************/ +t_Error FM_PCD_HashTableAddKey(t_Handle h_HashTbl, + uint8_t keySize, + t_FmPcdCcKeyParams *p_KeyParams); + +/**************************************************************************//** + @Function FM_PCD_HashTableRemoveKey + + @Description This routine removes the requested key (including next engine + parameters of this key) from the hash table. + + @Param[in] h_HashTbl A handle to a hash table + @Param[in] keySize Key size of the one to remove. + @Param[in] p_Key A pointer to the requested key to remove. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_HashTableSet(). +*//***************************************************************************/ +t_Error FM_PCD_HashTableRemoveKey(t_Handle h_HashTbl, + uint8_t keySize, + uint8_t *p_Key); + +/**************************************************************************//** + @Function FM_PCD_HashTableModifyNextEngine + + @Description This routine modifies the next engine for the provided key. The + key should be previously added to the hash table. + + @Param[in] h_HashTbl A handle to a hash table + @Param[in] keySize Key size of the key to modify. + @Param[in] p_Key A pointer to the requested key to modify. + @Param[in] p_FmPcdCcNextEngineParams A structure for defining new next engine + parameters. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_HashTableSet(). + When configuring nextEngine = e_FM_PCD_CC, note that + p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different + from the currently changed table. +*//***************************************************************************/ +t_Error FM_PCD_HashTableModifyNextEngine(t_Handle h_HashTbl, + uint8_t keySize, + uint8_t *p_Key, + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams); + +/**************************************************************************//** + @Function FM_PCD_HashTableModifyMissNextEngine + + @Description This routine modifies the next engine on key match miss. + + @Param[in] h_HashTbl A handle to a hash table + @Param[in] p_FmPcdCcNextEngineParams A structure for defining new next engine + parameters. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_HashTableSet(). + When configuring nextEngine = e_FM_PCD_CC, note that + p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different + from the currently changed table. +*//***************************************************************************/ +t_Error FM_PCD_HashTableModifyMissNextEngine(t_Handle h_HashTbl, + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams); + +/**************************************************************************//* + @Function FM_PCD_HashTableGetMissNextEngine + + @Description Gets NextEngine in case of key match miss. + + @Param[in] h_HashTbl A handle to a hash table + @Param[out] p_FmPcdCcNextEngineParams Next engine parameters for the specified + hash table. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_HashTableSet(). +*//***************************************************************************/ +t_Error FM_PCD_HashTableGetMissNextEngine(t_Handle h_HashTbl, + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams); + +/**************************************************************************//** + @Function FM_PCD_HashTableFindNGetKeyStatistics + + @Description This routine may be used to get statistics counters of specific key + in a hash table. + + If 'e_FM_PCD_CC_STATS_MODE_FRAME' and + 'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node, + these counters reflect how many frames passed that were matched + this key; The total frames count will be returned in the counter + of the first range (as only one frame length range was defined). + If 'e_FM_PCD_CC_STATS_MODE_RMON' was set for this node, the total + frame count will be separated to frame length counters, based on + provided frame length ranges. + Note that this routine will identify the bucket of this key in + the hash table and will search the bucket to locate the index + of the required key based on received key parameters. + + @Param[in] h_HashTbl A handle to a hash table + @Param[in] keySize Size of the requested key + @Param[in] p_Key A pointer to the requested key + @Param[out] p_KeyStatistics Key statistics counters + + @Return The specific key statistics. + + @Cautions Allowed only following FM_PCD_HashTableSet(). +*//***************************************************************************/ +t_Error FM_PCD_HashTableFindNGetKeyStatistics(t_Handle h_HashTbl, + uint8_t keySize, + uint8_t *p_Key, + t_FmPcdCcKeyStatistics *p_KeyStatistics); + +/**************************************************************************//** + @Function FM_PCD_HashTableGetMissStatistics + + @Description This routine may be used to get statistics counters of 'miss' + entry of the a hash table. + + If 'e_FM_PCD_CC_STATS_MODE_FRAME' and + 'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node, + these counters reflect how many frames were not matched to any + existing key and therefore passed through the miss entry; + + @Param[in] h_HashTbl A handle to a hash table + @Param[out] p_MissStatistics Statistics counters for 'miss' + + @Return The statistics for 'miss'. + + @Cautions Allowed only following FM_PCD_HashTableSet(). +*//***************************************************************************/ +t_Error FM_PCD_HashTableGetMissStatistics(t_Handle h_HashTbl, + t_FmPcdCcKeyStatistics *p_MissStatistics); + +/**************************************************************************//** + @Function FM_PCD_ManipNodeSet + + @Description This routine should be called for defining a manipulation + node. A manipulation node must be defined before the CC node + that precedes it. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] p_FmPcdManipParams A structure of parameters defining the manipulation + + @Return A handle to the initialized object on success; NULL code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +t_Handle FM_PCD_ManipNodeSet(t_Handle h_FmPcd, t_FmPcdManipParams *p_FmPcdManipParams); + +/**************************************************************************//** + @Function FM_PCD_ManipNodeDelete + + @Description Delete an existing manipulation node. + + @Param[in] h_ManipNode A handle to a manipulation node. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_ManipNodeSet(). +*//***************************************************************************/ +t_Error FM_PCD_ManipNodeDelete(t_Handle h_ManipNode); + +/**************************************************************************//** + @Function FM_PCD_ManipGetStatistics + + @Description Retrieve the manipulation statistics. + + @Param[in] h_ManipNode A handle to a manipulation node. + @Param[out] p_FmPcdManipStats A structure for retrieving the manipulation statistics + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_ManipNodeSet(). +*//***************************************************************************/ +t_Error FM_PCD_ManipGetStatistics(t_Handle h_ManipNode, t_FmPcdManipStats *p_FmPcdManipStats); + +/**************************************************************************//** + @Function FM_PCD_ManipNodeReplace + + @Description Change existing manipulation node to be according to new requirement. + + @Param[in] h_ManipNode A handle to a manipulation node. + @Param[out] p_ManipParams A structure of parameters defining the change requirement + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_ManipNodeSet(). +*//***************************************************************************/ +t_Error FM_PCD_ManipNodeReplace(t_Handle h_ManipNode, t_FmPcdManipParams *p_ManipParams); + +#if (DPAA_VERSION >= 11) +/**************************************************************************//** + @Function FM_PCD_FrmReplicSetGroup + + @Description Initialize a Frame Replicator group. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] p_FrmReplicGroupParam A structure of parameters for the initialization of + the frame replicator group. + + @Return A handle to the initialized object on success; NULL code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +t_Handle FM_PCD_FrmReplicSetGroup(t_Handle h_FmPcd, t_FmPcdFrmReplicGroupParams *p_FrmReplicGroupParam); + +/**************************************************************************//** + @Function FM_PCD_FrmReplicDeleteGroup + + @Description Delete a Frame Replicator group. + + @Param[in] h_FrmReplicGroup A handle to the frame replicator group. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_FrmReplicSetGroup(). +*//***************************************************************************/ +t_Error FM_PCD_FrmReplicDeleteGroup(t_Handle h_FrmReplicGroup); + +/**************************************************************************//** + @Function FM_PCD_FrmReplicAddMember + + @Description Add the member in the index defined by the memberIndex. + + @Param[in] h_FrmReplicGroup A handle to the frame replicator group. + @Param[in] memberIndex member index for adding. + @Param[in] p_MemberParams A pointer to the new member parameters. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_FrmReplicSetGroup() of this group. +*//***************************************************************************/ +t_Error FM_PCD_FrmReplicAddMember(t_Handle h_FrmReplicGroup, + uint16_t memberIndex, + t_FmPcdCcNextEngineParams *p_MemberParams); + +/**************************************************************************//** + @Function FM_PCD_FrmReplicRemoveMember + + @Description Remove the member defined by the index from the relevant group. + + @Param[in] h_FrmReplicGroup A handle to the frame replicator group. + @Param[in] memberIndex member index for removing. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PCD_FrmReplicSetGroup() of this group. +*//***************************************************************************/ +t_Error FM_PCD_FrmReplicRemoveMember(t_Handle h_FrmReplicGroup, + uint16_t memberIndex); +#endif /* (DPAA_VERSION >= 11) */ + +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) +/**************************************************************************//** + @Function FM_PCD_StatisticsSetNode + + @Description This routine should be called for defining a statistics node. + + @Param[in] h_FmPcd FM PCD module descriptor. + @Param[in] p_FmPcdstatsParams A structure of parameters defining the statistics + + @Return A handle to the initialized object on success; NULL code otherwise. + + @Cautions Allowed only following FM_PCD_Init(). +*//***************************************************************************/ +t_Handle FM_PCD_StatisticsSetNode(t_Handle h_FmPcd, t_FmPcdStatsParams *p_FmPcdstatsParams); +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */ + +/** @} */ /* end of FM_PCD_Runtime_build_grp group */ +/** @} */ /* end of FM_PCD_Runtime_grp group */ +/** @} */ /* end of FM_PCD_grp group */ +/** @} */ /* end of FM_grp group */ + + +#ifdef NCSW_BACKWARD_COMPATIBLE_API +#define FM_PCD_MAX_NUM_OF_INTERCHANGABLE_HDRS FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS +#define e_FM_PCD_MANIP_ONE_WAYS_HASH e_FM_PCD_MANIP_ONE_WAY_HASH +#define e_FM_PCD_MANIP_TOW_WAYS_HASH e_FM_PCD_MANIP_TWO_WAYS_HASH + +#define e_FM_PCD_MANIP_FRAGMENT_PACKECT e_FM_PCD_MANIP_FRAGMENT_PACKET /* Feb13 */ + +#define FM_PCD_SetNetEnvCharacteristics(_pcd, _params) \ + FM_PCD_NetEnvCharacteristicsSet(_pcd, _params) +#define FM_PCD_KgSetScheme(_pcd, _params) FM_PCD_KgSchemeSet(_pcd, _params) +#define FM_PCD_CcBuildTree(_pcd, _params) FM_PCD_CcRootBuild(_pcd, _params) +#define FM_PCD_CcSetNode(_pcd, _params) FM_PCD_MatchTableSet(_pcd, _params) +#define FM_PCD_PlcrSetProfile(_pcd, _params) FM_PCD_PlcrProfileSet(_pcd, _params) +#define FM_PCD_ManipSetNode(_pcd, _params) FM_PCD_ManipNodeSet(_pcd, _params) + +#define FM_PCD_DeleteNetEnvCharacteristics(_pcd, ...) \ + FM_PCD_NetEnvCharacteristicsDelete(__VA_ARGS__) +#define FM_PCD_KgDeleteScheme(_pcd, ...) \ + FM_PCD_KgSchemeDelete(__VA_ARGS__) +#define FM_PCD_KgGetSchemeCounter(_pcd, ...) \ + FM_PCD_KgSchemeGetCounter(__VA_ARGS__) +#define FM_PCD_KgSetSchemeCounter(_pcd, ...) \ + FM_PCD_KgSchemeSetCounter(__VA_ARGS__) +#define FM_PCD_PlcrDeleteProfile(_pcd, ...) \ + FM_PCD_PlcrProfileDelete(__VA_ARGS__) +#define FM_PCD_PlcrGetProfileCounter(_pcd, ...) \ + FM_PCD_PlcrProfileGetCounter(__VA_ARGS__) +#define FM_PCD_PlcrSetProfileCounter(_pcd, ...) \ + FM_PCD_PlcrProfileSetCounter(__VA_ARGS__) +#define FM_PCD_CcDeleteTree(_pcd, ...) \ + FM_PCD_CcRootDelete(__VA_ARGS__) +#define FM_PCD_CcTreeModifyNextEngine(_pcd, ...) \ + FM_PCD_CcRootModifyNextEngine(__VA_ARGS__) +#define FM_PCD_CcDeleteNode(_pcd, ...) \ + FM_PCD_MatchTableDelete(__VA_ARGS__) +#define FM_PCD_CcNodeModifyMissNextEngine(_pcd, ...) \ + FM_PCD_MatchTableModifyMissNextEngine(__VA_ARGS__) +#define FM_PCD_CcNodeRemoveKey(_pcd, ...) \ + FM_PCD_MatchTableRemoveKey(__VA_ARGS__) +#define FM_PCD_CcNodeAddKey(_pcd, ...) \ + FM_PCD_MatchTableAddKey(__VA_ARGS__) +#define FM_PCD_CcNodeModifyNextEngine(_pcd, ...) \ + FM_PCD_MatchTableModifyNextEngine(__VA_ARGS__) +#define FM_PCD_CcNodeModifyKeyAndNextEngine(_pcd, ...) \ + FM_PCD_MatchTableModifyKeyAndNextEngine(__VA_ARGS__) +#define FM_PCD_CcNodeModifyKey(_pcd, ...) \ + FM_PCD_MatchTableModifyKey(__VA_ARGS__) +#define FM_PCD_CcNodeFindNRemoveKey(_pcd, ...) \ + FM_PCD_MatchTableFindNRemoveKey(__VA_ARGS__) +#define FM_PCD_CcNodeFindNModifyNextEngine(_pcd, ...) \ + FM_PCD_MatchTableFindNModifyNextEngine(__VA_ARGS__) +#define FM_PCD_CcNodeFindNModifyKeyAndNextEngine(_pcd, ...) \ + FM_PCD_MatchTableFindNModifyKeyAndNextEngine(__VA_ARGS__) +#define FM_PCD_CcNodeFindNModifyKey(_pcd, ...) \ + FM_PCD_MatchTableFindNModifyKey(__VA_ARGS__) +#define FM_PCD_CcIndexedHashNodeGetBucket(_pcd, ...) \ + FM_PCD_MatchTableGetIndexedHashBucket(__VA_ARGS__) +#define FM_PCD_CcNodeGetNextEngine(_pcd, ...) \ + FM_PCD_MatchTableGetNextEngine(__VA_ARGS__) +#define FM_PCD_CcNodeGetKeyCounter(_pcd, ...) \ + FM_PCD_MatchTableGetKeyCounter(__VA_ARGS__) +#define FM_PCD_ManipDeleteNode(_pcd, ...) \ + FM_PCD_ManipNodeDelete(__VA_ARGS__) +#endif /* NCSW_BACKWARD_COMPATIBLE_API */ + + +#endif /* __FM_PCD_EXT */ diff --git a/sys/contrib/ncsw/inc/Peripherals/fm_port_ext.h b/sys/contrib/ncsw/inc/Peripherals/fm_port_ext.h new file mode 100644 index 000000000000..08a5aa59ab9d --- /dev/null +++ b/sys/contrib/ncsw/inc/Peripherals/fm_port_ext.h @@ -0,0 +1,2608 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File fm_port_ext.h + + @Description FM-Port Application Programming Interface. +*//***************************************************************************/ +#ifndef __FM_PORT_EXT +#define __FM_PORT_EXT + +#include "error_ext.h" +#include "std_ext.h" +#include "fm_pcd_ext.h" +#include "fm_ext.h" +#include "net_ext.h" + + +/**************************************************************************//** + + @Group FM_grp Frame Manager API + + @Description FM API functions, definitions and enums + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group FM_PORT_grp FM Port + + @Description FM Port API + + The FM uses a general module called "port" to represent a Tx port + (MAC), an Rx port (MAC) or Offline Parsing port. + The number of ports in an FM varies between SOCs. + The SW driver manages these ports as sub-modules of the FM, i.e. + after an FM is initialized, its ports may be initialized and + operated upon. + + The port is initialized aware of its type, but other functions on + a port may be indifferent to its type. When necessary, the driver + verifies coherence and returns error if applicable. + + On initialization, user specifies the port type and it's index + (relative to the port's type) - always starting at 0. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description An enum for defining port PCD modes. + This enum defines the superset of PCD engines support - i.e. not + all engines have to be used, but all have to be enabled. The real + flow of a specific frame depends on the PCD configuration and the + frame headers and payload. + Note: the first engine and the first engine after the parser (if + exists) should be in order, the order is important as it will + define the flow of the port. However, as for the rest engines + (the ones that follows), the order is not important anymore as + it is defined by the PCD graph itself. +*//***************************************************************************/ +typedef enum e_FmPortPcdSupport { + e_FM_PORT_PCD_SUPPORT_NONE = 0 /**< BMI to BMI, PCD is not used */ + , e_FM_PORT_PCD_SUPPORT_PRS_ONLY /**< Use only Parser */ + , e_FM_PORT_PCD_SUPPORT_PLCR_ONLY /**< Use only Policer */ + , e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR /**< Use Parser and Policer */ + , e_FM_PORT_PCD_SUPPORT_PRS_AND_KG /**< Use Parser and Keygen */ + , e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC /**< Use Parser, Keygen and Coarse Classification */ + , e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC_AND_PLCR + /**< Use all PCD engines */ + , e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR /**< Use Parser, Keygen and Policer */ + , e_FM_PORT_PCD_SUPPORT_PRS_AND_CC /**< Use Parser and Coarse Classification */ + , e_FM_PORT_PCD_SUPPORT_PRS_AND_CC_AND_PLCR /**< Use Parser and Coarse Classification and Policer */ + , e_FM_PORT_PCD_SUPPORT_CC_ONLY /**< Use only Coarse Classification */ +#ifdef FM_CAPWAP_SUPPORT + , e_FM_PORT_PCD_SUPPORT_CC_AND_KG /**< Use Coarse Classification,and Keygen */ + , e_FM_PORT_PCD_SUPPORT_CC_AND_KG_AND_PLCR /**< Use Coarse Classification, Keygen and Policer */ +#endif /* FM_CAPWAP_SUPPORT */ +} e_FmPortPcdSupport; + +/**************************************************************************//** + @Description Port interrupts +*//***************************************************************************/ +typedef enum e_FmPortExceptions { + e_FM_PORT_EXCEPTION_IM_BUSY /**< Independent-Mode Rx-BUSY */ +} e_FmPortExceptions; + + +/**************************************************************************//** + @Collection General FM Port defines +*//***************************************************************************/ +#define FM_PORT_PRS_RESULT_NUM_OF_WORDS 8 /**< Number of 4 bytes words in parser result */ +/* @} */ + +/**************************************************************************//** + @Collection FM Frame error +*//***************************************************************************/ +typedef uint32_t fmPortFrameErrSelect_t; /**< typedef for defining Frame Descriptor errors */ + +#define FM_PORT_FRM_ERR_UNSUPPORTED_FORMAT FM_FD_ERR_UNSUPPORTED_FORMAT /**< Not for Rx-Port! Unsupported Format */ +#define FM_PORT_FRM_ERR_LENGTH FM_FD_ERR_LENGTH /**< Not for Rx-Port! Length Error */ +#define FM_PORT_FRM_ERR_DMA FM_FD_ERR_DMA /**< DMA Data error */ +#define FM_PORT_FRM_ERR_NON_FM FM_FD_RX_STATUS_ERR_NON_FM /**< non Frame-Manager error; probably come from SEC that + was chained to FM */ + +#define FM_PORT_FRM_ERR_IPRE (FM_FD_ERR_IPR & ~FM_FD_IPR) /**< IPR error */ +#define FM_PORT_FRM_ERR_IPR_NCSP (FM_FD_ERR_IPR_NCSP & ~FM_FD_IPR) /**< IPR non-consistent-sp */ + +#define FM_PORT_FRM_ERR_IPFE 0 /**< Obsolete; will be removed in the future */ + +#ifdef FM_CAPWAP_SUPPORT +#define FM_PORT_FRM_ERR_CRE FM_FD_ERR_CRE +#define FM_PORT_FRM_ERR_CHE FM_FD_ERR_CHE +#endif /* FM_CAPWAP_SUPPORT */ + +#define FM_PORT_FRM_ERR_PHYSICAL FM_FD_ERR_PHYSICAL /**< Rx FIFO overflow, FCS error, code error, running disparity + error (SGMII and TBI modes), FIFO parity error. PHY + Sequence error, PHY error control character detected. */ +#define FM_PORT_FRM_ERR_SIZE FM_FD_ERR_SIZE /**< Frame too long OR Frame size exceeds max_length_frame */ +#define FM_PORT_FRM_ERR_CLS_DISCARD FM_FD_ERR_CLS_DISCARD /**< indicates a classifier "drop" operation */ +#define FM_PORT_FRM_ERR_EXTRACTION FM_FD_ERR_EXTRACTION /**< Extract Out of Frame */ +#define FM_PORT_FRM_ERR_NO_SCHEME FM_FD_ERR_NO_SCHEME /**< No Scheme Selected */ +#define FM_PORT_FRM_ERR_KEYSIZE_OVERFLOW FM_FD_ERR_KEYSIZE_OVERFLOW /**< Keysize Overflow */ +#define FM_PORT_FRM_ERR_COLOR_RED FM_FD_ERR_COLOR_RED /**< Frame color is red */ +#define FM_PORT_FRM_ERR_COLOR_YELLOW FM_FD_ERR_COLOR_YELLOW /**< Frame color is yellow */ +#define FM_PORT_FRM_ERR_ILL_PLCR FM_FD_ERR_ILL_PLCR /**< Illegal Policer Profile selected */ +#define FM_PORT_FRM_ERR_PLCR_FRAME_LEN FM_FD_ERR_PLCR_FRAME_LEN /**< Policer frame length error */ +#define FM_PORT_FRM_ERR_PRS_TIMEOUT FM_FD_ERR_PRS_TIMEOUT /**< Parser Time out Exceed */ +#define FM_PORT_FRM_ERR_PRS_ILL_INSTRUCT FM_FD_ERR_PRS_ILL_INSTRUCT /**< Invalid Soft Parser instruction */ +#define FM_PORT_FRM_ERR_PRS_HDR_ERR FM_FD_ERR_PRS_HDR_ERR /**< Header error was identified during parsing */ +#define FM_PORT_FRM_ERR_BLOCK_LIMIT_EXCEEDED FM_FD_ERR_BLOCK_LIMIT_EXCEEDED /**< Frame parsed beyind 256 first bytes */ +#define FM_PORT_FRM_ERR_PROCESS_TIMEOUT 0x00000001 /**< FPM Frame Processing Timeout Exceeded */ +/* @} */ + + + +/**************************************************************************//** + @Group FM_PORT_init_grp FM Port Initialization Unit + + @Description FM Port Initialization Unit + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description Exceptions user callback routine, will be called upon an + exception passing the exception identification. + + @Param[in] h_App - User's application descriptor. + @Param[in] exception - The exception. + *//***************************************************************************/ +typedef void (t_FmPortExceptionCallback) (t_Handle h_App, e_FmPortExceptions exception); + +/**************************************************************************//** + @Description User callback function called by driver with received data. + + User provides this function. Driver invokes it. + + @Param[in] h_App Application's handle originally specified to + the API Config function + @Param[in] p_Data A pointer to data received + @Param[in] length length of received data + @Param[in] status receive status and errors + @Param[in] position position of buffer in frame + @Param[in] h_BufContext A handle of the user acossiated with this buffer + + @Retval e_RX_STORE_RESPONSE_CONTINUE - order the driver to continue Rx + operation for all ready data. + @Retval e_RX_STORE_RESPONSE_PAUSE - order the driver to stop Rx operation. +*//***************************************************************************/ +typedef e_RxStoreResponse (t_FmPortImRxStoreCallback) (t_Handle h_App, + uint8_t *p_Data, + uint16_t length, + uint16_t status, + uint8_t position, + t_Handle h_BufContext); + +/**************************************************************************//** + @Description User callback function called by driver when transmit completed. + + User provides this function. Driver invokes it. + + @Param[in] h_App Application's handle originally specified to + the API Config function + @Param[in] p_Data A pointer to data received + @Param[in] status transmit status and errors + @Param[in] lastBuffer is last buffer in frame + @Param[in] h_BufContext A handle of the user acossiated with this buffer + *//***************************************************************************/ +typedef void (t_FmPortImTxConfCallback) (t_Handle h_App, + uint8_t *p_Data, + uint16_t status, + t_Handle h_BufContext); + +/**************************************************************************//** + @Description A structure for additional Rx port parameters +*//***************************************************************************/ +typedef struct t_FmPortRxParams { + uint32_t errFqid; /**< Error Queue Id. */ + uint32_t dfltFqid; /**< Default Queue Id. */ + uint16_t liodnOffset; /**< Port's LIODN offset. */ + t_FmExtPools extBufPools; /**< Which external buffer pools are used + (up to FM_PORT_MAX_NUM_OF_EXT_POOLS), and their sizes. */ +} t_FmPortRxParams; + +/**************************************************************************//** + @Description A structure for additional non-Rx port parameters +*//***************************************************************************/ +typedef struct t_FmPortNonRxParams { + uint32_t errFqid; /**< Error Queue Id. */ + uint32_t dfltFqid; /**< For Tx - Default Confirmation queue, + 0 means no Tx confirmation for processed + frames. For OP port - default Rx queue. */ + uint32_t qmChannel; /**< QM-channel dedicated to this port; will be used + by the FM for dequeue. */ +} t_FmPortNonRxParams; + +/**************************************************************************//** + @Description A structure for additional Rx port parameters +*//***************************************************************************/ +typedef struct t_FmPortImRxTxParams { + t_Handle h_FmMuram; /**< A handle of the FM-MURAM partition */ + uint16_t liodnOffset; /**< For Rx ports only. Port's LIODN Offset. */ + uint8_t dataMemId; /**< Memory partition ID for data buffers */ + uint32_t dataMemAttributes; /**< Memory attributes for data buffers */ + t_BufferPoolInfo rxPoolParams; /**< For Rx ports only. */ + t_FmPortImRxStoreCallback *f_RxStore; /**< For Rx ports only. */ + t_FmPortImTxConfCallback *f_TxConf; /**< For Tx ports only. */ +} t_FmPortImRxTxParams; + +/**************************************************************************//** + @Description A union for additional parameters depending on port type +*//***************************************************************************/ +typedef union u_FmPortSpecificParams { + t_FmPortImRxTxParams imRxTxParams; /**< Rx/Tx Independent-Mode port parameter structure */ + t_FmPortRxParams rxParams; /**< Rx port parameters structure */ + t_FmPortNonRxParams nonRxParams; /**< Non-Rx port parameters structure */ +} u_FmPortSpecificParams; + +/**************************************************************************//** + @Description A structure representing FM initialization parameters +*//***************************************************************************/ +typedef struct t_FmPortParams { + uintptr_t baseAddr; /**< Virtual Address of memory mapped FM Port registers.*/ + t_Handle h_Fm; /**< A handle to the FM object this port related to */ + e_FmPortType portType; /**< Port type */ + uint8_t portId; /**< Port Id - relative to type; + NOTE: When configuring Offline Parsing port for + FMANv3 devices (DPAA_VERSION 11 and higher), + it is highly recommended NOT to use portId=0 due to lack + of HW resources on portId=0. */ + bool independentModeEnable; + /**< This port is Independent-Mode - Used for Rx/Tx ports only! */ + uint16_t liodnBase; /**< Irrelevant for P4080 rev 1. LIODN base for this port, to be + used together with LIODN offset. */ + u_FmPortSpecificParams specificParams; /**< Additional parameters depending on port + type. */ + + t_FmPortExceptionCallback *f_Exception; /**< Relevant for IM only Callback routine to be called on BUSY exception */ + t_Handle h_App; /**< A handle to an application layer object; This handle will + be passed by the driver upon calling the above callbacks */ +} t_FmPortParams; + + +/**************************************************************************//** + @Function FM_PORT_Config + + @Description Creates a descriptor for the FM PORT module. + + The routine returns a handle (descriptor) to the FM PORT object. + This descriptor must be passed as first parameter to all other + FM PORT function calls. + + No actual initialization or configuration of FM hardware is + done by this routine. + + @Param[in] p_FmPortParams - Pointer to data structure of parameters + + @Retval Handle to FM object, or NULL for Failure. +*//***************************************************************************/ +t_Handle FM_PORT_Config(t_FmPortParams *p_FmPortParams); + +/**************************************************************************//** + @Function FM_PORT_Init + + @Description Initializes the FM PORT module by defining the software structure + and configuring the hardware registers. + + @Param[in] h_FmPort - FM PORT module descriptor + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_PORT_Init(t_Handle h_FmPort); + +/**************************************************************************//** + @Function FM_PORT_Free + + @Description Frees all resources that were assigned to FM PORT module. + + Calling this routine invalidates the descriptor. + + @Param[in] h_FmPort - FM PORT module descriptor + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_PORT_Free(t_Handle h_FmPort); + + +/**************************************************************************//** + @Group FM_PORT_advanced_init_grp FM Port Advanced Configuration Unit + + @Description Configuration functions used to change default values. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description enum for defining QM frame dequeue +*//***************************************************************************/ +typedef enum e_FmPortDeqType { + e_FM_PORT_DEQ_TYPE1, /**< Dequeue from the SP channel - with priority precedence, + and Intra-Class Scheduling respected. */ + e_FM_PORT_DEQ_TYPE2, /**< Dequeue from the SP channel - with active FQ precedence, + and Intra-Class Scheduling respected. */ + e_FM_PORT_DEQ_TYPE3 /**< Dequeue from the SP channel - with active FQ precedence, + and override Intra-Class Scheduling */ +} e_FmPortDeqType; + +/**************************************************************************//** + @Description enum for defining QM frame dequeue +*//***************************************************************************/ +typedef enum e_FmPortDeqPrefetchOption { + e_FM_PORT_DEQ_NO_PREFETCH, /**< QMI preforms a dequeue action for a single frame + only when a dedicated portID Tnum is waiting. */ + e_FM_PORT_DEQ_PARTIAL_PREFETCH, /**< QMI preforms a dequeue action for 3 frames when + one dedicated portId tnum is waiting. */ + e_FM_PORT_DEQ_FULL_PREFETCH /**< QMI preforms a dequeue action for 3 frames when + no dedicated portId tnums are waiting. */ + +} e_FmPortDeqPrefetchOption; + +/**************************************************************************//** + @Description enum for defining port default color +*//***************************************************************************/ +typedef enum e_FmPortColor { + e_FM_PORT_COLOR_GREEN, /**< Default port color is green */ + e_FM_PORT_COLOR_YELLOW, /**< Default port color is yellow */ + e_FM_PORT_COLOR_RED, /**< Default port color is red */ + e_FM_PORT_COLOR_OVERRIDE /**< Ignore color */ +} e_FmPortColor; + +/**************************************************************************//** + @Description A structure for defining Dual Tx rate limiting scale +*//***************************************************************************/ +typedef enum e_FmPortDualRateLimiterScaleDown { + e_FM_PORT_DUAL_RATE_LIMITER_NONE = 0, /**< Use only single rate limiter */ + e_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_2, /**< Divide high rate limiter by 2 */ + e_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_4, /**< Divide high rate limiter by 4 */ + e_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_8 /**< Divide high rate limiter by 8 */ +} e_FmPortDualRateLimiterScaleDown; + + +/**************************************************************************//** + @Description A structure for defining FM port resources +*//***************************************************************************/ +typedef struct t_FmPortRsrc { + uint32_t num; /**< Committed required resource */ + uint32_t extra; /**< Extra (not committed) required resource */ +} t_FmPortRsrc; + +/**************************************************************************//** + @Description A structure for defining observed pool depletion +*//***************************************************************************/ +typedef struct t_FmPortObservedBufPoolDepletion { + t_FmBufPoolDepletion poolDepletionParams;/**< parameters to define pool depletion */ + t_FmExtPools poolsParams; /**< Which external buffer pools are observed + (up to FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS), + and their sizes. */ +} t_FmPortObservedBufPoolDepletion; + +/**************************************************************************//** + @Description A structure for defining Tx rate limiting +*//***************************************************************************/ +typedef struct t_FmPortRateLimit { + uint16_t maxBurstSize; /**< in KBytes for Tx ports, in frames + for OP ports. (note that + for early chips burst size is + rounded up to a multiply of 1000 frames).*/ + uint32_t rateLimit; /**< in Kb/sec for Tx ports, in frame/sec for + OP ports. Rate limit refers to + data rate (rather than line rate). */ + e_FmPortDualRateLimiterScaleDown rateLimitDivider; /**< For OP ports only. Not-valid + for some earlier chip revisions */ +} t_FmPortRateLimit; + +/**************************************************************************//** + @Description A structure for defining the parameters of + the Rx port performance counters +*//***************************************************************************/ +typedef struct t_FmPortPerformanceCnt { + uint8_t taskCompVal; /**< Task compare value */ + uint8_t queueCompVal; /**< Rx queue/Tx confirm queue compare + value (unused for H/O) */ + uint8_t dmaCompVal; /**< Dma compare value */ + uint32_t fifoCompVal; /**< Fifo compare value (in bytes) */ +} t_FmPortPerformanceCnt; + + +/**************************************************************************//** + @Description A structure for defining the sizes of the Deep Sleep + the Auto Response tables +*//***************************************************************************/ +typedef struct t_FmPortDsarTablesSizes +{ + uint16_t maxNumOfArpEntries; + uint16_t maxNumOfEchoIpv4Entries; + uint16_t maxNumOfNdpEntries; + uint16_t maxNumOfEchoIpv6Entries; + uint16_t maxNumOfSnmpIPV4Entries; + uint16_t maxNumOfSnmpIPV6Entries; + uint16_t maxNumOfSnmpOidEntries; + uint16_t maxNumOfSnmpOidChar; /* total amount of character needed for the snmp table */ + + uint16_t maxNumOfIpProtFiltering; + uint16_t maxNumOfTcpPortFiltering; + uint16_t maxNumOfUdpPortFiltering; +} t_FmPortDsarTablesSizes; + + +/**************************************************************************//** + @Function FM_PORT_ConfigDsarSupport + + @Description This function will allocate the amount of MURAM needed for + this max number of entries for Deep Sleep Auto Response. + it will calculate all needed MURAM for autoresponse including + necesary common stuff. + + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] params A pointer to a structure containing the maximum + sizes of the auto response tables + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigDsarSupport(t_Handle h_FmPortRx, t_FmPortDsarTablesSizes *params); + +/**************************************************************************//** + @Function FM_PORT_ConfigNumOfOpenDmas + + @Description Calling this routine changes the max number of open DMA's + available for this port. It changes this parameter in the + internal driver data base from its default configuration + [OP: 1] + [1G-RX, 1G-TX: 1 (+1)] + [10G-RX, 10G-TX: 8 (+8)] + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_OpenDmas A pointer to a structure of parameters defining + the open DMA allocation. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigNumOfOpenDmas(t_Handle h_FmPort, t_FmPortRsrc *p_OpenDmas); + +/**************************************************************************//** + @Function FM_PORT_ConfigNumOfTasks + + @Description Calling this routine changes the max number of tasks + available for this port. It changes this parameter in the + internal driver data base from its default configuration + [OP: 1] + [1G-RX, 1G-TX: 3 (+2)] + [10G-RX, 10G-TX: 16 (+8)] + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_NumOfTasks A pointer to a structure of parameters defining + the tasks allocation. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigNumOfTasks(t_Handle h_FmPort, t_FmPortRsrc *p_NumOfTasks); + +/**************************************************************************//** + @Function FM_PORT_ConfigSizeOfFifo + + @Description Calling this routine changes the max FIFO size configured for this port. + + This function changes the internal driver data base from its + default configuration. Please refer to the driver's User Guide for + information on default FIFO sizes in the various devices. + [OP: 2KB] + [1G-RX, 1G-TX: 11KB] + [10G-RX, 10G-TX: 12KB] + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_SizeOfFifo A pointer to a structure of parameters defining + the FIFO allocation. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigSizeOfFifo(t_Handle h_FmPort, t_FmPortRsrc *p_SizeOfFifo); + +/**************************************************************************//** + @Function FM_PORT_ConfigDeqHighPriority + + @Description Calling this routine changes the dequeue priority in the + internal driver data base from its default configuration + 1G: [DEFAULT_PORT_deqHighPriority_1G] + 10G: [DEFAULT_PORT_deqHighPriority_10G] + + May be used for Non-Rx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] highPri TRUE to select high priority, FALSE for normal operation. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigDeqHighPriority(t_Handle h_FmPort, bool highPri); + +/**************************************************************************//** + @Function FM_PORT_ConfigDeqType + + @Description Calling this routine changes the dequeue type parameter in the + internal driver data base from its default configuration + [DEFAULT_PORT_deqType]. + + May be used for Non-Rx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] deqType According to QM definition. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigDeqType(t_Handle h_FmPort, e_FmPortDeqType deqType); + +/**************************************************************************//** + @Function FM_PORT_ConfigDeqPrefetchOption + + @Description Calling this routine changes the dequeue prefetch option parameter in the + internal driver data base from its default configuration + [DEFAULT_PORT_deqPrefetchOption] + Note: Available for some chips only + + May be used for Non-Rx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] deqPrefetchOption New option + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigDeqPrefetchOption(t_Handle h_FmPort, e_FmPortDeqPrefetchOption deqPrefetchOption); + +/**************************************************************************//** + @Function FM_PORT_ConfigDeqByteCnt + + @Description Calling this routine changes the dequeue byte count parameter in + the internal driver data base from its default configuration + 1G:[DEFAULT_PORT_deqByteCnt_1G]. + 10G:[DEFAULT_PORT_deqByteCnt_10G]. + + May be used for Non-Rx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] deqByteCnt New byte count + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigDeqByteCnt(t_Handle h_FmPort, uint16_t deqByteCnt); + +/**************************************************************************//** + @Function FM_PORT_ConfigBufferPrefixContent + + @Description Defines the structure, size and content of the application buffer. + The prefix will + In Tx ports, if 'passPrsResult', the application + should set a value to their offsets in the prefix of + the FM will save the first 'privDataSize', than, + depending on 'passPrsResult' and 'passTimeStamp', copy parse result + and timeStamp, and the packet itself (in this order), to the + application buffer, and to offset. + Calling this routine changes the buffer margins definitions + in the internal driver data base from its default + configuration: Data size: [DEFAULT_PORT_bufferPrefixContent_privDataSize] + Pass Parser result: [DEFAULT_PORT_bufferPrefixContent_passPrsResult]. + Pass timestamp: [DEFAULT_PORT_bufferPrefixContent_passTimeStamp]. + + May be used for all ports + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in,out] p_FmBufferPrefixContent A structure of parameters describing the + structure of the buffer. + Out parameter: Start margin - offset + of data from start of external buffer. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigBufferPrefixContent(t_Handle h_FmPort, + t_FmBufferPrefixContent *p_FmBufferPrefixContent); + +/**************************************************************************//** + @Function FM_PORT_ConfigCheksumLastBytesIgnore + + @Description Calling this routine changes the number of checksum bytes to ignore + parameter in the internal driver data base from its default configuration + [DEFAULT_PORT_cheksumLastBytesIgnore] + + May be used by Tx & Rx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] cheksumLastBytesIgnore New value + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigCheksumLastBytesIgnore(t_Handle h_FmPort, uint8_t cheksumLastBytesIgnore); + +/**************************************************************************//** + @Function FM_PORT_ConfigCutBytesFromEnd + + @Description Calling this routine changes the number of bytes to cut from a + frame's end parameter in the internal driver data base + from its default configuration [DEFAULT_PORT_cutBytesFromEnd] + Note that if the result of (frame length before chop - cutBytesFromEnd) is + less than 14 bytes, the chop operation is not executed. + + May be used for Rx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] cutBytesFromEnd New value + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigCutBytesFromEnd(t_Handle h_FmPort, uint8_t cutBytesFromEnd); + +/**************************************************************************//** + @Function FM_PORT_ConfigPoolDepletion + + @Description Calling this routine enables pause frame generation depending on the + depletion status of BM pools. It also defines the conditions to activate + this functionality. By default, this functionality is disabled. + + May be used for Rx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_BufPoolDepletion A structure of pool depletion parameters + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigPoolDepletion(t_Handle h_FmPort, t_FmBufPoolDepletion *p_BufPoolDepletion); + +/**************************************************************************//** + @Function FM_PORT_ConfigObservedPoolDepletion + + @Description Calling this routine enables a mechanism to stop port enqueue + depending on the depletion status of selected BM pools. + It also defines the conditions to activate + this functionality. By default, this functionality is disabled. + + Note: Available for some chips only + + May be used for OP ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_FmPortObservedBufPoolDepletion A structure of parameters for pool depletion. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigObservedPoolDepletion(t_Handle h_FmPort, + t_FmPortObservedBufPoolDepletion *p_FmPortObservedBufPoolDepletion); + +/**************************************************************************//** + @Function FM_PORT_ConfigExtBufPools + + @Description This routine should be called for OP ports + that internally use BM buffer pools. In such cases, e.g. for fragmentation and + re-assembly, the FM needs new BM buffers. By calling this routine the user + specifies the BM buffer pools that should be used. + + Note: Available for some chips only + + May be used for OP ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_FmExtPools A structure of parameters for the external pools. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigExtBufPools(t_Handle h_FmPort, t_FmExtPools *p_FmExtPools); + +/**************************************************************************//** + @Function FM_PORT_ConfigBackupPools + + @Description Calling this routine allows the configuration of some of the BM pools + defined for this port as backup pools. + A pool configured to be a backup pool will be used only if all other + enabled non-backup pools are depleted. + + May be used for Rx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_FmPortBackupBmPools An array of pool id's. All pools specified here will + be defined as backup pools. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigBackupPools(t_Handle h_FmPort, t_FmBackupBmPools *p_FmPortBackupBmPools); + +/**************************************************************************//** + @Function FM_PORT_ConfigFrmDiscardOverride + + @Description Calling this routine changes the error frames destination parameter + in the internal driver data base from its default configuration: + override = [DEFAULT_PORT_frmDiscardOverride] + + May be used for Rx and OP ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] override TRUE to override discarding of error frames and + enqueueing them to error queue. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigFrmDiscardOverride(t_Handle h_FmPort, bool override); + +/**************************************************************************//** + @Function FM_PORT_ConfigErrorsToDiscard + + @Description Calling this routine changes the behaviour on error parameter + in the internal driver data base from its default configuration: + [DEFAULT_PORT_errorsToDiscard]. + If a requested error was previously defined as "ErrorsToEnqueue" it's + definition will change and the frame will be discarded. + Errors that were not defined either as "ErrorsToEnqueue" nor as + "ErrorsToDiscard", will be forwarded to CPU. + + May be used for Rx and OP ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] errs A list of errors to discard + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigErrorsToDiscard(t_Handle h_FmPort, fmPortFrameErrSelect_t errs); + +/**************************************************************************//** + @Function FM_PORT_ConfigDmaSwapData + + @Description Calling this routine changes the DMA swap data aparameter + in the internal driver data base from its default + configuration [DEFAULT_PORT_dmaSwapData] + + May be used for all port types + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] swapData New selection + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigDmaSwapData(t_Handle h_FmPort, e_FmDmaSwapOption swapData); + +/**************************************************************************//** + @Function FM_PORT_ConfigDmaIcCacheAttr + + @Description Calling this routine changes the internal context cache + attribute parameter in the internal driver data base + from its default configuration [DEFAULT_PORT_dmaIntContextCacheAttr] + + May be used for all port types + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] intContextCacheAttr New selection + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigDmaIcCacheAttr(t_Handle h_FmPort, e_FmDmaCacheOption intContextCacheAttr); + +/**************************************************************************//** + @Function FM_PORT_ConfigDmaHdrAttr + + @Description Calling this routine changes the header cache + attribute parameter in the internal driver data base + from its default configuration [DEFAULT_PORT_dmaHeaderCacheAttr] + + May be used for all port types + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] headerCacheAttr New selection + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigDmaHdrAttr(t_Handle h_FmPort, e_FmDmaCacheOption headerCacheAttr); + +/**************************************************************************//** + @Function FM_PORT_ConfigDmaScatterGatherAttr + + @Description Calling this routine changes the scatter gather cache + attribute parameter in the internal driver data base + from its default configuration [DEFAULT_PORT_dmaScatterGatherCacheAttr] + + May be used for all port types + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] scatterGatherCacheAttr New selection + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigDmaScatterGatherAttr(t_Handle h_FmPort, e_FmDmaCacheOption scatterGatherCacheAttr); + +/**************************************************************************//** + @Function FM_PORT_ConfigDmaWriteOptimize + + @Description Calling this routine changes the write optimization + parameter in the internal driver data base + from its default configuration: By default optimize = [DEFAULT_PORT_dmaWriteOptimize]. + Note: + + 1. For head optimization, data alignment must be >= 16 (supported by default). + + 3. For tail optimization, note that the optimization is performed by extending the write transaction + of the frame payload at the tail as needed to achieve optimal bus transfers, so that the last write + is extended to be on 16/64 bytes aligned block (chip dependent). + + Relevant for non-Tx port types + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] optimize TRUE to enable optimization, FALSE for normal operation + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigDmaWriteOptimize(t_Handle h_FmPort, bool optimize); + +/**************************************************************************//** + @Function FM_PORT_ConfigNoScatherGather + + @Description Calling this routine changes the noScatherGather parameter in internal driver data base + from its default configuration. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] noScatherGather (TRUE - frame is discarded if can not be stored in single buffer, + FALSE - frame can be stored in scatter gather (S/G) format). + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigNoScatherGather(t_Handle h_FmPort, bool noScatherGather); + +/**************************************************************************//** + @Function FM_PORT_ConfigDfltColor + + @Description Calling this routine changes the internal default color parameter + in the internal driver data base + from its default configuration [DEFAULT_PORT_color] + + May be used for all port types + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] color New selection + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigDfltColor(t_Handle h_FmPort, e_FmPortColor color); + +/**************************************************************************//** + @Function FM_PORT_ConfigSyncReq + + @Description Calling this routine changes the synchronization attribute parameter + in the internal driver data base from its default configuration: + syncReq = [DEFAULT_PORT_syncReq] + + May be used for all port types + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] syncReq TRUE to request synchronization, FALSE otherwize. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigSyncReq(t_Handle h_FmPort, bool syncReq); + +/**************************************************************************//** + @Function FM_PORT_ConfigForwardReuseIntContext + + @Description This routine is relevant for Rx ports that are routed to OP port. + It changes the internal context reuse option in the internal + driver data base from its default configuration: + reuse = [DEFAULT_PORT_forwardIntContextReuse] + + May be used for Rx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] reuse TRUE to reuse internal context on frames + forwarded to OP port. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigForwardReuseIntContext(t_Handle h_FmPort, bool reuse); + +/**************************************************************************//** + @Function FM_PORT_ConfigDontReleaseTxBufToBM + + @Description This routine should be called if no Tx confirmation + is done, and yet buffers should not be released to the BM. + Normally, buffers are returned using the Tx confirmation + process. When Tx confirmation is not used (defFqid=0), + buffers are typically released to the BM. This routine + may be called to avoid this behavior and not release the + buffers. + + May be used for Tx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigDontReleaseTxBufToBM(t_Handle h_FmPort); + +/**************************************************************************//** + @Function FM_PORT_ConfigIMMaxRxBufLength + + @Description Changes the maximum receive buffer length from its default + configuration: Closest rounded down power of 2 value of the + data buffer size. + + The maximum receive buffer length directly affects the structure + of received frames (single- or multi-buffered) and the performance + of both the FM and the driver. + + The selection between single- or multi-buffered frames should be + done according to the characteristics of the specific application. + The recommended mode is to use a single data buffer per packet, + as this mode provides the best performance. However, the user can + select to use multiple data buffers per packet. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] newVal Maximum receive buffer length (in bytes). + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). + This routine is to be used only if Independent-Mode is enabled. +*//***************************************************************************/ +t_Error FM_PORT_ConfigIMMaxRxBufLength(t_Handle h_FmPort, uint16_t newVal); + +/**************************************************************************//** + @Function FM_PORT_ConfigIMRxBdRingLength + + @Description Changes the receive BD ring length from its default + configuration:[DEFAULT_PORT_rxBdRingLength] + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] newVal The desired BD ring length. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). + This routine is to be used only if Independent-Mode is enabled. +*//***************************************************************************/ +t_Error FM_PORT_ConfigIMRxBdRingLength(t_Handle h_FmPort, uint16_t newVal); + +/**************************************************************************//** + @Function FM_PORT_ConfigIMTxBdRingLength + + @Description Changes the transmit BD ring length from its default + configuration:[DEFAULT_PORT_txBdRingLength] + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] newVal The desired BD ring length. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). + This routine is to be used only if Independent-Mode is enabled. +*//***************************************************************************/ +t_Error FM_PORT_ConfigIMTxBdRingLength(t_Handle h_FmPort, uint16_t newVal); + +/**************************************************************************//** + @Function FM_PORT_ConfigIMFmanCtrlExternalStructsMemory + + @Description Configures memory partition and attributes for FMan-Controller + data structures (e.g. BD rings). + Calling this routine changes the internal driver data base + from its default configuration + [DEFAULT_PORT_ImfwExtStructsMemId, DEFAULT_PORT_ImfwExtStructsMemAttr]. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] memId Memory partition ID. + @Param[in] memAttributes Memory attributes mask (a combination of MEMORY_ATTR_x flags). + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_PORT_ConfigIMFmanCtrlExternalStructsMemory(t_Handle h_FmPort, + uint8_t memId, + uint32_t memAttributes); + +/**************************************************************************//** + @Function FM_PORT_ConfigIMPolling + + @Description Changes the Rx flow from interrupt driven (default) to polling. + + @Param[in] h_FmPort A handle to a FM Port module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). + This routine is to be used only if Independent-Mode is enabled. +*//***************************************************************************/ +t_Error FM_PORT_ConfigIMPolling(t_Handle h_FmPort); + +/**************************************************************************//** + @Function FM_PORT_ConfigMaxFrameLength + + @Description Changes the definition of the max size of frame that should be + transmitted/received on this port from its default value [DEFAULT_PORT_maxFrameLength]. + This parameter is used for confirmation of the minimum Fifo + size calculations and only for Tx ports or ports working in + independent mode. This should be larger than the maximum possible + MTU that will be used for this port (i.e. its MAC). + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] length Max size of frame + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). + This routine is to be used only if Independent-Mode is enabled. +*//***************************************************************************/ +t_Error FM_PORT_ConfigMaxFrameLength(t_Handle h_FmPort, uint16_t length); + +/**************************************************************************//* + @Function FM_PORT_ConfigTxFifoMinFillLevel + + @Description Calling this routine changes the fifo minimum + fill level parameter in the internal driver data base + from its default configuration [DEFAULT_PORT_txFifoMinFillLevel] + + May be used for Tx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] minFillLevel New value + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigTxFifoMinFillLevel(t_Handle h_FmPort, uint32_t minFillLevel); + +/**************************************************************************//* + @Function FM_PORT_ConfigFifoDeqPipelineDepth + + @Description Calling this routine changes the fifo dequeue + pipeline depth parameter in the internal driver data base + + from its default configuration: 1G ports: [DEFAULT_PORT_fifoDeqPipelineDepth_1G], + 10G port: [DEFAULT_PORT_fifoDeqPipelineDepth_10G], + OP port: [DEFAULT_PORT_fifoDeqPipelineDepth_OH] + + May be used for Tx/OP ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] deqPipelineDepth New value + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigFifoDeqPipelineDepth(t_Handle h_FmPort, uint8_t deqPipelineDepth); + +/**************************************************************************//* + @Function FM_PORT_ConfigTxFifoLowComfLevel + + @Description Calling this routine changes the fifo low comfort level + parameter in internal driver data base + from its default configuration [DEFAULT_PORT_txFifoLowComfLevel] + + May be used for Tx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] fifoLowComfLevel New value + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigTxFifoLowComfLevel(t_Handle h_FmPort, uint32_t fifoLowComfLevel); + +/**************************************************************************//* + @Function FM_PORT_ConfigRxFifoThreshold + + @Description Calling this routine changes the threshold of the FIFO + fill level parameter in the internal driver data base + from its default configuration [DEFAULT_PORT_rxFifoThreshold] + + If the total number of buffers which are + currently in use and associated with the + specific RX port exceed this threshold, the + BMI will signal the MAC to send a pause frame + over the link. + + May be used for Rx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] fifoThreshold New value + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigRxFifoThreshold(t_Handle h_FmPort, uint32_t fifoThreshold); + +/**************************************************************************//* + @Function FM_PORT_ConfigRxFifoPriElevationLevel + + @Description Calling this routine changes the priority elevation level + parameter in the internal driver data base from its default + configuration [DEFAULT_PORT_rxFifoPriElevationLevel] + + If the total number of buffers which are currently in use and + associated with the specific RX port exceed the amount specified + in priElevationLevel, BMI will signal the main FM's DMA to + elevate the FM priority on the system bus. + + May be used for Rx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] priElevationLevel New value + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigRxFifoPriElevationLevel(t_Handle h_FmPort, uint32_t priElevationLevel); + +#ifdef FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669 +/**************************************************************************//* + @Function FM_PORT_ConfigBCBWorkaround + + @Description Configures BCB errata workaround. + + When BCB errata is applicable, the workaround is always + performed by FM Controller. Thus, this functions doesn't + actually enable errata workaround but rather allows driver + to perform adjustments required due to errata workaround + execution in FM controller. + + Applying BCB workaround also configures FM_PORT_FRM_ERR_PHYSICAL + errors to be discarded. Thus FM_PORT_FRM_ERR_PHYSICAL can't be + set by FM_PORT_SetErrorsRoute() function. + + @Param[in] h_FmPort A handle to a FM Port module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigBCBWorkaround(t_Handle h_FmPort); +#endif /* FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669 */ + +#if (DPAA_VERSION >= 11) +/**************************************************************************//* + @Function FM_PORT_ConfigInternalBuffOffset + + @Description Configures internal buffer offset. + + May be used for Rx and OP ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] val New value + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ConfigInternalBuffOffset(t_Handle h_FmPort, uint8_t val); +#endif /* (DPAA_VERSION >= 11) */ + +/** @} */ /* end of FM_PORT_advanced_init_grp group */ +/** @} */ /* end of FM_PORT_init_grp group */ + + +/**************************************************************************//** + @Group FM_PORT_runtime_control_grp FM Port Runtime Control Unit + + @Description FM Port Runtime control unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description enum for defining FM Port counters +*//***************************************************************************/ +typedef enum e_FmPortCounters { + e_FM_PORT_COUNTERS_CYCLE, /**< BMI performance counter */ + e_FM_PORT_COUNTERS_TASK_UTIL, /**< BMI performance counter */ + e_FM_PORT_COUNTERS_QUEUE_UTIL, /**< BMI performance counter */ + e_FM_PORT_COUNTERS_DMA_UTIL, /**< BMI performance counter */ + e_FM_PORT_COUNTERS_FIFO_UTIL, /**< BMI performance counter */ + e_FM_PORT_COUNTERS_RX_PAUSE_ACTIVATION, /**< BMI Rx only performance counter */ + e_FM_PORT_COUNTERS_FRAME, /**< BMI statistics counter */ + e_FM_PORT_COUNTERS_DISCARD_FRAME, /**< BMI statistics counter */ + e_FM_PORT_COUNTERS_DEALLOC_BUF, /**< BMI deallocate buffer statistics counter */ + e_FM_PORT_COUNTERS_RX_BAD_FRAME, /**< BMI Rx only statistics counter */ + e_FM_PORT_COUNTERS_RX_LARGE_FRAME, /**< BMI Rx only statistics counter */ + e_FM_PORT_COUNTERS_RX_FILTER_FRAME, /**< BMI Rx & OP only statistics counter */ + e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR, /**< BMI Rx, OP & HC only statistics counter */ + e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD, /**< BMI Rx, OP & HC statistics counter */ + e_FM_PORT_COUNTERS_PREPARE_TO_ENQUEUE_COUNTER, /**< BMI Rx, OP & HC only statistics counter */ + e_FM_PORT_COUNTERS_WRED_DISCARD, /**< BMI OP & HC only statistics counter */ + e_FM_PORT_COUNTERS_LENGTH_ERR, /**< BMI non-Rx statistics counter */ + e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT, /**< BMI non-Rx statistics counter */ + e_FM_PORT_COUNTERS_DEQ_TOTAL, /**< QMI total QM dequeues counter */ + e_FM_PORT_COUNTERS_ENQ_TOTAL, /**< QMI total QM enqueues counter */ + e_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT, /**< QMI counter */ + e_FM_PORT_COUNTERS_DEQ_CONFIRM /**< QMI counter */ +} e_FmPortCounters; + +typedef struct t_FmPortBmiStats { + uint32_t cntCycle; + uint32_t cntTaskUtil; + uint32_t cntQueueUtil; + uint32_t cntDmaUtil; + uint32_t cntFifoUtil; + uint32_t cntRxPauseActivation; + uint32_t cntFrame; + uint32_t cntDiscardFrame; + uint32_t cntDeallocBuf; + uint32_t cntRxBadFrame; + uint32_t cntRxLargeFrame; + uint32_t cntRxFilterFrame; + uint32_t cntRxListDmaErr; + uint32_t cntRxOutOfBuffersDiscard; + uint32_t cntWredDiscard; + uint32_t cntLengthErr; + uint32_t cntUnsupportedFormat; +} t_FmPortBmiStats; + +/**************************************************************************//** + @Description Structure for Port id parameters. + Fields commented 'IN' are passed by the port module to be used + by the FM module. + Fields commented 'OUT' will be filled by FM before returning to port. +*//***************************************************************************/ +typedef struct t_FmPortCongestionGrps { + uint16_t numOfCongestionGrpsToConsider; /**< The number of required CGs + to define the size of the following array */ + uint8_t congestionGrpsToConsider[FM_PORT_NUM_OF_CONGESTION_GRPS]; + /**< An array of CG indexes; + Note that the size of the array should be + 'numOfCongestionGrpsToConsider'. */ +#if (DPAA_VERSION >= 11) + bool pfcPrioritiesEn[FM_PORT_NUM_OF_CONGESTION_GRPS][FM_MAX_NUM_OF_PFC_PRIORITIES]; + /**< a matrix that represents the map between the CG ids + defined in 'congestionGrpsToConsider' to the priorties + mapping array. */ +#endif /* (DPAA_VERSION >= 11) */ +} t_FmPortCongestionGrps; + +/**************************************************************************//** + @Description Structure for Deep Sleep Auto Response ARP Entry +*//***************************************************************************/ +typedef struct t_FmPortDsarArpEntry +{ + uint32_t ipAddress; + uint8_t mac[6]; + bool isVlan; + uint16_t vid; +} t_FmPortDsarArpEntry; + +/**************************************************************************//** + @Description Structure for Deep Sleep Auto Response ARP info +*//***************************************************************************/ +typedef struct t_FmPortDsarArpInfo +{ + uint8_t tableSize; + t_FmPortDsarArpEntry *p_AutoResTable; + bool enableConflictDetection; /* when TRUE Conflict Detection will be checked and wake the host if needed */ +} t_FmPortDsarArpInfo; + +/**************************************************************************//** + @Description Structure for Deep Sleep Auto Response NDP Entry +*//***************************************************************************/ +typedef struct t_FmPortDsarNdpEntry +{ + uint32_t ipAddress[4]; + uint8_t mac[6]; + bool isVlan; + uint16_t vid; +} t_FmPortDsarNdpEntry; + +/**************************************************************************//** + @Description Structure for Deep Sleep Auto Response NDP info +*//***************************************************************************/ +typedef struct t_FmPortDsarNdpInfo +{ + uint32_t multicastGroup; + + uint8_t tableSizeAssigned; + t_FmPortDsarNdpEntry *p_AutoResTableAssigned; /* This list refer to solicitation IP addresses. + Note that all IP adresses must be from the same multicast group. + This will be checked and if not operation will fail. */ + uint8_t tableSizeTmp; + t_FmPortDsarNdpEntry *p_AutoResTableTmp; /* This list refer to temp IP addresses. + Note that all temp IP adresses must be from the same multicast group. + This will be checked and if not operation will fail. */ + + bool enableConflictDetection; /* when TRUE Conflict Detection will be checked and wake the host if needed */ + +} t_FmPortDsarNdpInfo; + +/**************************************************************************//** + @Description Structure for Deep Sleep Auto Response ICMPV4 info +*//***************************************************************************/ +typedef struct t_FmPortDsarEchoIpv4Info +{ + uint8_t tableSize; + t_FmPortDsarArpEntry *p_AutoResTable; +} t_FmPortDsarEchoIpv4Info; + +/**************************************************************************//** + @Description Structure for Deep Sleep Auto Response ICMPV6 info +*//***************************************************************************/ +typedef struct t_FmPortDsarEchoIpv6Info +{ + uint8_t tableSize; + t_FmPortDsarNdpEntry *p_AutoResTable; +} t_FmPortDsarEchoIpv6Info; + +/**************************************************************************//** +@Description Deep Sleep Auto Response SNMP OIDs table entry + +*//***************************************************************************/ +typedef struct { + uint16_t oidSize; + uint8_t *oidVal; /* only the oid string */ + uint16_t resSize; + uint8_t *resVal; /* resVal will be the entire reply, + i.e. "Type|Length|Value" */ +} t_FmPortDsarOidsEntry; + +/**************************************************************************//** + @Description Deep Sleep Auto Response SNMP IPv4 Addresses Table Entry + Refer to the FMan Controller spec for more details. +*//***************************************************************************/ +typedef struct +{ + uint32_t ipv4Addr; /*!< 32 bit IPv4 Address. */ + bool isVlan; + uint16_t vid; /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared */ + /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */ +} t_FmPortDsarSnmpIpv4AddrTblEntry; + +/**************************************************************************//** + @Description Deep Sleep Auto Response SNMP IPv6 Addresses Table Entry + Refer to the FMan Controller spec for more details. +*//***************************************************************************/ +typedef struct +{ + uint32_t ipv6Addr[4]; /*!< 4 * 32 bit IPv6 Address. */ + bool isVlan; + uint16_t vid; /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared */ + /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */ +} t_FmPortDsarSnmpIpv6AddrTblEntry; + +/**************************************************************************//** + @Description Deep Sleep Auto Response SNMP Descriptor + +*//***************************************************************************/ +typedef struct +{ + uint16_t control; /**< Control bits [0-15]. */ + uint16_t maxSnmpMsgLength; /**< Maximal allowed SNMP message length. */ + uint16_t numOfIpv4Addresses; /**< Number of entries in IPv4 addresses table. */ + uint16_t numOfIpv6Addresses; /**< Number of entries in IPv6 addresses table. */ + t_FmPortDsarSnmpIpv4AddrTblEntry *p_Ipv4AddrTbl; /**< Pointer to IPv4 addresses table. */ + t_FmPortDsarSnmpIpv6AddrTblEntry *p_Ipv6AddrTbl; /**< Pointer to IPv6 addresses table. */ + uint8_t *p_RdOnlyCommunityStr; /**< Pointer to the Read Only Community String. */ + uint8_t *p_RdWrCommunityStr; /**< Pointer to the Read Write Community String. */ + t_FmPortDsarOidsEntry *p_OidsTbl; /**< Pointer to OIDs table. */ + uint32_t oidsTblSize; /**< Number of entries in OIDs table. */ +} t_FmPortDsarSnmpInfo; + +/**************************************************************************//** + @Description Structure for Deep Sleep Auto Response filtering Entry +*//***************************************************************************/ +typedef struct t_FmPortDsarFilteringEntry +{ + uint16_t srcPort; + uint16_t dstPort; + uint16_t srcPortMask; + uint16_t dstPortMask; +} t_FmPortDsarFilteringEntry; + +/**************************************************************************//** + @Description Structure for Deep Sleep Auto Response filtering info +*//***************************************************************************/ +typedef struct t_FmPortDsarFilteringInfo +{ + /* IP protocol filtering parameters */ + uint8_t ipProtTableSize; + uint8_t *p_IpProtTablePtr; + bool ipProtPassOnHit; /* when TRUE, miss in the table will cause the packet to be droped, + hit will pass the packet to UDP/TCP filters if needed and if not + to the classification tree. If the classification tree will pass + the packet to a queue it will cause a wake interupt. + When FALSE it the other way around. */ + /* UDP port filtering parameters */ + uint8_t udpPortsTableSize; + t_FmPortDsarFilteringEntry *p_UdpPortsTablePtr; + bool udpPortPassOnHit; /* when TRUE, miss in the table will cause the packet to be droped, + hit will pass the packet to classification tree. + If the classification tree will pass the packet to a queue it + will cause a wake interupt. + When FALSE it the other way around. */ + /* TCP port filtering parameters */ + uint16_t tcpFlagsMask; + uint8_t tcpPortsTableSize; + t_FmPortDsarFilteringEntry *p_TcpPortsTablePtr; + bool tcpPortPassOnHit; /* when TRUE, miss in the table will cause the packet to be droped, + hit will pass the packet to classification tree. + If the classification tree will pass the packet to a queue it + will cause a wake interupt. + When FALSE it the other way around. */ +} t_FmPortDsarFilteringInfo; + +/**************************************************************************//** + @Description Structure for Deep Sleep Auto Response parameters +*//***************************************************************************/ +typedef struct t_FmPortDsarParams +{ + t_Handle h_FmPortTx; + t_FmPortDsarArpInfo *p_AutoResArpInfo; + t_FmPortDsarEchoIpv4Info *p_AutoResEchoIpv4Info; + t_FmPortDsarNdpInfo *p_AutoResNdpInfo; + t_FmPortDsarEchoIpv6Info *p_AutoResEchoIpv6Info; + t_FmPortDsarSnmpInfo *p_AutoResSnmpInfo; + t_FmPortDsarFilteringInfo *p_AutoResFilteringInfo; +} t_FmPortDsarParams; + +/**************************************************************************//** + @Function FM_PORT_EnterDsar + + @Description Enter Deep Sleep Auto Response mode. + This function write the apropriate values to in the relevant + tables in the MURAM. + + @Param[in] h_FmPortRx - FM PORT module descriptor + @Param[in] params - Auto Response parameters + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_EnterDsar(t_Handle h_FmPortRx, t_FmPortDsarParams *params); + +/**************************************************************************//** + @Function FM_PORT_EnterDsarFinal + + @Description Enter Deep Sleep Auto Response mode. + This function sets the Tx port in independent mode as needed + and redirect the receive flow to go through the + Dsar Fman-ctrl code + + @Param[in] h_DsarRxPort - FM Rx PORT module descriptor + @Param[in] h_DsarTxPort - FM Tx PORT module descriptor + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_EnterDsarFinal(t_Handle h_DsarRxPort, t_Handle h_DsarTxPort); + +/**************************************************************************//** + @Function FM_PORT_ExitDsar + + @Description Exit Deep Sleep Auto Response mode. + This function reverse the AR mode and put the ports back into + their original wake mode + + @Param[in] h_FmPortRx - FM PORT Rx module descriptor + @Param[in] h_FmPortTx - FM PORT Tx module descriptor + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_EnterDsar(). +*//***************************************************************************/ +void FM_PORT_ExitDsar(t_Handle h_FmPortRx, t_Handle h_FmPortTx); + +/**************************************************************************//** + @Function FM_PORT_IsInDsar + + @Description This function returns TRUE if the port was set as Auto Response + and FALSE if not. Once Exit AR mode it will return FALSE as well + until re-enabled once more. + + @Param[in] h_FmPort - FM PORT module descriptor + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +bool FM_PORT_IsInDsar(t_Handle h_FmPort); + +typedef struct t_FmPortDsarStats +{ + uint32_t arpArCnt; + uint32_t echoIcmpv4ArCnt; + uint32_t ndpArCnt; + uint32_t echoIcmpv6ArCnt; + uint32_t snmpGetCnt; + uint32_t snmpGetNextCnt; +} t_FmPortDsarStats; + +/**************************************************************************//** + @Function FM_PORT_GetDsarStats + + @Description Return statistics for Deep Sleep Auto Response + + @Param[in] h_FmPortRx - FM PORT module descriptor + @Param[out] stats - structure containing the statistics counters + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_PORT_GetDsarStats(t_Handle h_FmPortRx, t_FmPortDsarStats *stats); + +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) +/**************************************************************************//** + @Function FM_PORT_DumpRegs + + @Description Dump all regs. + + Calling this routine invalidates the descriptor. + + @Param[in] h_FmPort - FM PORT module descriptor + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_DumpRegs(t_Handle h_FmPort); +#endif /* (defined(DEBUG_ERRORS) && ... */ + +/**************************************************************************//** + @Function FM_PORT_GetBufferDataOffset + + @Description Relevant for Rx ports. + Returns the data offset from the beginning of the data buffer + + @Param[in] h_FmPort - FM PORT module descriptor + + @Return data offset. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +uint32_t FM_PORT_GetBufferDataOffset(t_Handle h_FmPort); + +/**************************************************************************//** + @Function FM_PORT_GetBufferICInfo + + @Description Returns the Internal Context offset from the beginning of the data buffer + + @Param[in] h_FmPort - FM PORT module descriptor + @Param[in] p_Data - A pointer to the data buffer. + + @Return Internal context info pointer on success, NULL if 'allOtherInfo' was not + configured for this port. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +uint8_t * FM_PORT_GetBufferICInfo(t_Handle h_FmPort, char *p_Data); + +/**************************************************************************//** + @Function FM_PORT_GetBufferPrsResult + + @Description Returns the pointer to the parse result in the data buffer. + In Rx ports this is relevant after reception, if parse + result is configured to be part of the data passed to the + application. For non Rx ports it may be used to get the pointer + of the area in the buffer where parse result should be + initialized - if so configured. + See FM_PORT_ConfigBufferPrefixContent for data buffer prefix + configuration. + + @Param[in] h_FmPort - FM PORT module descriptor + @Param[in] p_Data - A pointer to the data buffer. + + @Return Parse result pointer on success, NULL if parse result was not + configured for this port. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_FmPrsResult * FM_PORT_GetBufferPrsResult(t_Handle h_FmPort, char *p_Data); + +/**************************************************************************//** + @Function FM_PORT_GetBufferTimeStamp + + @Description Returns the time stamp in the data buffer. + Relevant for Rx ports for getting the buffer time stamp. + See FM_PORT_ConfigBufferPrefixContent for data buffer prefix + configuration. + + @Param[in] h_FmPort - FM PORT module descriptor + @Param[in] p_Data - A pointer to the data buffer. + + @Return A pointer to the hash result on success, NULL otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +uint64_t * FM_PORT_GetBufferTimeStamp(t_Handle h_FmPort, char *p_Data); + +/**************************************************************************//** + @Function FM_PORT_GetBufferHashResult + + @Description Given a data buffer, on the condition that hash result was defined + as a part of the buffer content (see FM_PORT_ConfigBufferPrefixContent) + this routine will return the pointer to the hash result location in the + buffer prefix. + + @Param[in] h_FmPort - FM PORT module descriptor + @Param[in] p_Data - A pointer to the data buffer. + + @Return A pointer to the hash result on success, NULL otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +uint8_t * FM_PORT_GetBufferHashResult(t_Handle h_FmPort, char *p_Data); + +/**************************************************************************//** + @Function FM_PORT_Disable + + @Description Gracefully disable an FM port. The port will not start new tasks after all + tasks associated with the port are terminated. + + @Param[in] h_FmPort A handle to a FM Port module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). + This is a blocking routine, it returns after port is + gracefully stopped, i.e. the port will not except new frames, + but it will finish all frames or tasks which were already began +*//***************************************************************************/ +t_Error FM_PORT_Disable(t_Handle h_FmPort); + +/**************************************************************************//** + @Function FM_PORT_Enable + + @Description A runtime routine provided to allow disable/enable of port. + + @Param[in] h_FmPort A handle to a FM Port module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_Enable(t_Handle h_FmPort); + +/**************************************************************************//** + @Function FM_PORT_SetRateLimit + + @Description Calling this routine enables rate limit algorithm. + By default, this functionality is disabled. + Note that rate-limit mechanism uses the FM time stamp. + The selected rate limit specified here would be + rounded DOWN to the nearest 16M. + + May be used for Tx and OP ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_RateLimit A structure of rate limit parameters + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). + If rate limit is set on a port that need to send PFC frames, + it might violate the stop transmit timing. +*//***************************************************************************/ +t_Error FM_PORT_SetRateLimit(t_Handle h_FmPort, t_FmPortRateLimit *p_RateLimit); + +/**************************************************************************//** + @Function FM_PORT_DeleteRateLimit + + @Description Calling this routine disables and clears rate limit + initialization. + + May be used for Tx and OP ports only + + @Param[in] h_FmPort A handle to a FM Port module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_DeleteRateLimit(t_Handle h_FmPort); + +/**************************************************************************//** + @Function FM_PORT_SetPfcPrioritiesMappingToQmanWQ + + @Description Calling this routine maps each PFC received priority to the transmit WQ. + This WQ will be blocked upon receiving a PFC frame with this priority. + + May be used for Tx ports only. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] prio PFC priority (0-7). + @Param[in] wq Work Queue (0-7). + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_SetPfcPrioritiesMappingToQmanWQ(t_Handle h_FmPort, uint8_t prio, uint8_t wq); + +/**************************************************************************//** + @Function FM_PORT_SetStatisticsCounters + + @Description Calling this routine enables/disables port's statistics counters. + By default, counters are enabled. + + May be used for all port types + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] enable TRUE to enable, FALSE to disable. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_SetStatisticsCounters(t_Handle h_FmPort, bool enable); + +/**************************************************************************//** + @Function FM_PORT_SetFrameQueueCounters + + @Description Calling this routine enables/disables port's enqueue/dequeue counters. + By default, counters are enabled. + + May be used for all ports + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] enable TRUE to enable, FALSE to disable. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_SetFrameQueueCounters(t_Handle h_FmPort, bool enable); + +/**************************************************************************//** + @Function FM_PORT_AnalyzePerformanceParams + + @Description User may call this routine to so the driver will analyze if the + basic performance parameters are correct and also the driver may + suggest of improvements; The basic parameters are FIFO sizes, number + of DMAs and number of TNUMs for the port. + + May be used for all port types + + @Param[in] h_FmPort A handle to a FM Port module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_AnalyzePerformanceParams(t_Handle h_FmPort); + + +/**************************************************************************//** + @Function FM_PORT_SetAllocBufCounter + + @Description Calling this routine enables/disables BM pool allocate + buffer counters. + By default, counters are enabled. + + May be used for Rx ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] poolId BM pool id. + @Param[in] enable TRUE to enable, FALSE to disable. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_SetAllocBufCounter(t_Handle h_FmPort, uint8_t poolId, bool enable); + +/**************************************************************************//** + @Function FM_PORT_GetBmiCounters + + @Description Read port's BMI stat counters and place them into + a designated structure of counters. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[out] p_BmiStats counters structure + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_GetBmiCounters(t_Handle h_FmPort, t_FmPortBmiStats *p_BmiStats); + +/**************************************************************************//** + @Function FM_PORT_GetCounter + + @Description Reads one of the FM PORT counters. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] fmPortCounter The requested counter. + + @Return Counter's current value. + + @Cautions Allowed only following FM_PORT_Init(). + Note that it is user's responsibility to call this routine only + for enabled counters, and there will be no indication if a + disabled counter is accessed. +*//***************************************************************************/ +uint32_t FM_PORT_GetCounter(t_Handle h_FmPort, e_FmPortCounters fmPortCounter); + +/**************************************************************************//** + @Function FM_PORT_ModifyCounter + + @Description Sets a value to an enabled counter. Use "0" to reset the counter. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] fmPortCounter The requested counter. + @Param[in] value The requested value to be written into the counter. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ModifyCounter(t_Handle h_FmPort, e_FmPortCounters fmPortCounter, uint32_t value); + +/**************************************************************************//** + @Function FM_PORT_GetAllocBufCounter + + @Description Reads one of the FM PORT buffer counters. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] poolId The requested pool. + + @Return Counter's current value. + + @Cautions Allowed only following FM_PORT_Init(). + Note that it is user's responsibility to call this routine only + for enabled counters, and there will be no indication if a + disabled counter is accessed. +*//***************************************************************************/ +uint32_t FM_PORT_GetAllocBufCounter(t_Handle h_FmPort, uint8_t poolId); + +/**************************************************************************//** + @Function FM_PORT_ModifyAllocBufCounter + + @Description Sets a value to an enabled counter. Use "0" to reset the counter. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] poolId The requested pool. + @Param[in] value The requested value to be written into the counter. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ModifyAllocBufCounter(t_Handle h_FmPort, uint8_t poolId, uint32_t value); + +/**************************************************************************//** + @Function FM_PORT_AddCongestionGrps + + @Description This routine effects the corresponding Tx port. + It should be called in order to enable pause + frame transmission in case of congestion in one or more + of the congestion groups relevant to this port. + Each call to this routine may add one or more congestion + groups to be considered relevant to this port. + + May be used for Rx, or RX+OP ports only (depending on chip) + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_CongestionGrps A pointer to an array of congestion groups + id's to consider. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_AddCongestionGrps(t_Handle h_FmPort, t_FmPortCongestionGrps *p_CongestionGrps); + +/**************************************************************************//** + @Function FM_PORT_RemoveCongestionGrps + + @Description This routine effects the corresponding Tx port. It should be + called when congestion groups were + defined for this port and are no longer relevant, or pause + frames transmitting is not required on their behalf. + Each call to this routine may remove one or more congestion + groups to be considered relevant to this port. + + May be used for Rx, or RX+OP ports only (depending on chip) + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_CongestionGrps A pointer to an array of congestion groups + id's to consider. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_RemoveCongestionGrps(t_Handle h_FmPort, t_FmPortCongestionGrps *p_CongestionGrps); + +/**************************************************************************//** + @Function FM_PORT_IsStalled + + @Description A routine for checking whether the specified port is stalled. + + @Param[in] h_FmPort A handle to a FM Port module. + + @Return TRUE if port is stalled, FALSE otherwize + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +bool FM_PORT_IsStalled(t_Handle h_FmPort); + +/**************************************************************************//** + @Function FM_PORT_ReleaseStalled + + @Description This routine may be called in case the port was stalled and may + now be released. + Note that this routine is available only on older FMan revisions + (FMan v2, DPAA v1.0 only). + + @Param[in] h_FmPort A handle to a FM Port module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_ReleaseStalled(t_Handle h_FmPort); + +/**************************************************************************//** + @Function FM_PORT_SetRxL4ChecksumVerify + + @Description This routine is relevant for Rx ports (1G and 10G). The routine + set/clear the L3/L4 checksum verification (on RX side). + Note that this takes affect only if hw-parser is enabled! + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] l4Checksum boolean indicates whether to do L3/L4 checksum + on frames or not. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_SetRxL4ChecksumVerify(t_Handle h_FmPort, bool l4Checksum); + +/**************************************************************************//** + @Function FM_PORT_SetErrorsRoute + + @Description Errors selected for this routine will cause a frame with that error + to be enqueued to error queue. + Errors not selected for this routine will cause a frame with that error + to be enqueued to the one of the other port queues. + By default all errors are defined to be enqueued to error queue. + Errors that were configured to be discarded (at initialization) + may not be selected here. + + May be used for Rx and OP ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] errs A list of errors to enqueue to error queue + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_SetErrorsRoute(t_Handle h_FmPort, fmPortFrameErrSelect_t errs); + +/**************************************************************************//** + @Function FM_PORT_SetIMExceptions + + @Description Calling this routine enables/disables FM PORT interrupts. + + @Param[in] h_FmPort FM PORT module descriptor. + @Param[in] exception The exception to be selected. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error FM_PORT_SetIMExceptions(t_Handle h_FmPort, e_FmPortExceptions exception, bool enable); + +/**************************************************************************//* + @Function FM_PORT_SetPerformanceCounters + + @Description Calling this routine enables/disables port's performance counters. + By default, counters are enabled. + + May be used for all port types + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] enable TRUE to enable, FALSE to disable. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_SetPerformanceCounters(t_Handle h_FmPort, bool enable); + +/**************************************************************************//* + @Function FM_PORT_SetPerformanceCountersParams + + @Description Calling this routine defines port's performance + counters parameters. + + May be used for all port types + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_FmPortPerformanceCnt A pointer to a structure of performance + counters parameters. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_SetPerformanceCountersParams(t_Handle h_FmPort, t_FmPortPerformanceCnt *p_FmPortPerformanceCnt); + +/**************************************************************************//** + @Group FM_PORT_pcd_runtime_control_grp FM Port PCD Runtime Control Unit + + @Description FM Port PCD Runtime control unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description A structure defining the KG scheme after the parser. + This is relevant only to change scheme selection mode - from + direct to indirect and vice versa, or when the scheme is selected directly, + to select the scheme id. + +*//***************************************************************************/ +typedef struct t_FmPcdKgSchemeSelect { + bool direct; /**< TRUE to use 'h_Scheme' directly, FALSE to use LCV. */ + t_Handle h_DirectScheme; /**< Scheme handle, selects the scheme after parser; + Relevant only when 'direct' is TRUE. */ +} t_FmPcdKgSchemeSelect; + +/**************************************************************************//** + @Description A structure of scheme parameters +*//***************************************************************************/ +typedef struct t_FmPcdPortSchemesParams { + uint8_t numOfSchemes; /**< Number of schemes for port to be bound to. */ + t_Handle h_Schemes[FM_PCD_KG_NUM_OF_SCHEMES]; /**< Array of 'numOfSchemes' schemes for the + port to be bound to */ +} t_FmPcdPortSchemesParams; + +/**************************************************************************//** + @Description Union for defining port protocol parameters for parser +*//***************************************************************************/ +typedef union u_FmPcdHdrPrsOpts { + /* MPLS */ + struct { + bool labelInterpretationEnable; /**< When this bit is set, the last MPLS label will be + interpreted as described in HW spec table. When the bit + is cleared, the parser will advance to MPLS next parse */ + e_NetHeaderType nextParse; /**< must be equal or higher than IPv4 */ + } mplsPrsOptions; + /* VLAN */ + struct { + uint16_t tagProtocolId1; /**< User defined Tag Protocol Identifier, to be recognized + on VLAN TAG on top of 0x8100 and 0x88A8 */ + uint16_t tagProtocolId2; /**< User defined Tag Protocol Identifier, to be recognized + on VLAN TAG on top of 0x8100 and 0x88A8 */ + } vlanPrsOptions; + /* PPP */ + struct{ + bool enableMTUCheck; /**< Check validity of MTU according to RFC2516 */ + } pppoePrsOptions; + + /* IPV6 */ + struct{ + bool routingHdrEnable; /**< TRUE to enable routing header, otherwise ignore */ + } ipv6PrsOptions; + + /* UDP */ + struct{ + bool padIgnoreChecksum; /**< TRUE to ignore pad in checksum */ + } udpPrsOptions; + + /* TCP */ + struct { + bool padIgnoreChecksum; /**< TRUE to ignore pad in checksum */ + } tcpPrsOptions; +} u_FmPcdHdrPrsOpts; + +/**************************************************************************//** + @Description A structure for defining each header for the parser +*//***************************************************************************/ +typedef struct t_FmPcdPrsAdditionalHdrParams { + e_NetHeaderType hdr; /**< Selected header; use HEADER_TYPE_NONE + to indicate that sw parser is to run first + (before HW parser, and independent of the + existence of any protocol), in this case, + swPrsEnable must be set, and all other + parameters are irrelevant. */ + bool errDisable; /**< TRUE to disable error indication */ + bool swPrsEnable; /**< Enable jump to SW parser when this + header is recognized by the HW parser. */ + uint8_t indexPerHdr; /**< Normally 0, if more than one sw parser + attachments exists for the same header, + (in the main sw parser code) use this + index to distinguish between them. */ + bool usePrsOpts; /**< TRUE to use parser options. */ + u_FmPcdHdrPrsOpts prsOpts; /**< A union according to header type, + defining the parser options selected.*/ +} t_FmPcdPrsAdditionalHdrParams; + +/**************************************************************************//** + @Description struct for defining port PCD parameters +*//***************************************************************************/ +typedef struct t_FmPortPcdPrsParams { + uint8_t prsResultPrivateInfo; /**< The private info provides a method of inserting + port information into the parser result. This information + may be extracted by Keygen and be used for frames + distribution when a per-port distinction is required, + it may also be used as a port logical id for analyzing + incoming frames. */ + uint8_t parsingOffset; /**< Number of bytes from beginning of packet to start parsing */ + e_NetHeaderType firstPrsHdr; /**< The type of the first header expected at 'parsingOffset' */ + bool includeInPrsStatistics; /**< TRUE to include this port in the parser statistics; + NOTE: this field is not valid when the FM is in "guest" mode + and IPC is not available. */ + uint8_t numOfHdrsWithAdditionalParams; /**< Normally 0, some headers may get + special parameters */ + t_FmPcdPrsAdditionalHdrParams additionalParams[FM_PCD_PRS_NUM_OF_HDRS]; + /**< 'numOfHdrsWithAdditionalParams' structures + of additional parameters + for each header that requires them */ + bool setVlanTpid1; /**< TRUE to configure user selection of Ethertype to + indicate a VLAN tag (in addition to the TPID values + 0x8100 and 0x88A8). */ + uint16_t vlanTpid1; /**< extra tag to use if setVlanTpid1=TRUE. */ + bool setVlanTpid2; /**< TRUE to configure user selection of Ethertype to + indicate a VLAN tag (in addition to the TPID values + 0x8100 and 0x88A8). */ + uint16_t vlanTpid2; /**< extra tag to use if setVlanTpid1=TRUE. */ +} t_FmPortPcdPrsParams; + +/**************************************************************************//** + @Description struct for defining coarse alassification parameters +*//***************************************************************************/ +typedef struct t_FmPortPcdCcParams { + t_Handle h_CcTree; /**< A handle to a CC tree */ +} t_FmPortPcdCcParams; + +/**************************************************************************//** + @Description struct for defining keygen parameters +*//***************************************************************************/ +typedef struct t_FmPortPcdKgParams { + uint8_t numOfSchemes; /**< Number of schemes for port to be bound to. */ + t_Handle h_Schemes[FM_PCD_KG_NUM_OF_SCHEMES]; + /**< Array of 'numOfSchemes' schemes handles for the + port to be bound to */ + bool directScheme; /**< TRUE for going from parser to a specific scheme, + regardless of parser result */ + t_Handle h_DirectScheme; /**< relevant only if direct == TRUE, Scheme handle, + as returned by FM_PCD_KgSetScheme */ +} t_FmPortPcdKgParams; + +/**************************************************************************//** + @Description struct for defining policer parameters +*//***************************************************************************/ +typedef struct t_FmPortPcdPlcrParams { + t_Handle h_Profile; /**< Selected profile handle */ +} t_FmPortPcdPlcrParams; + +/**************************************************************************//** + @Description struct for defining port PCD parameters +*//***************************************************************************/ +typedef struct t_FmPortPcdParams { + e_FmPortPcdSupport pcdSupport; /**< Relevant for Rx and offline ports only. + Describes the active PCD engines for this port. */ + t_Handle h_NetEnv; /**< HL Unused in PLCR only mode */ + t_FmPortPcdPrsParams *p_PrsParams; /**< Parser parameters for this port */ + t_FmPortPcdCcParams *p_CcParams; /**< Coarse classification parameters for this port */ + t_FmPortPcdKgParams *p_KgParams; /**< Keygen parameters for this port */ + t_FmPortPcdPlcrParams *p_PlcrParams; /**< Policer parameters for this port; Relevant for one of + following cases: + e_FM_PORT_PCD_SUPPORT_PLCR_ONLY or + e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR were selected, + or if any flow uses a KG scheme were policer + profile is not generated + ('bypassPlcrProfileGeneration selected'). */ + t_Handle h_IpReassemblyManip; /**< IP Reassembly manipulation */ +#if (DPAA_VERSION >= 11) + t_Handle h_CapwapReassemblyManip;/**< CAPWAP Reassembly manipulation */ +#endif /* (DPAA_VERSION >= 11) */ +} t_FmPortPcdParams; + +/**************************************************************************//** + @Description A structure for defining the Parser starting point +*//***************************************************************************/ +typedef struct t_FmPcdPrsStart { + uint8_t parsingOffset; /**< Number of bytes from beginning of packet to + start parsing */ + e_NetHeaderType firstPrsHdr; /**< The type of the first header axpected at + 'parsingOffset' */ +} t_FmPcdPrsStart; + +#if (DPAA_VERSION >= 11) +/**************************************************************************//** + @Description struct for defining external buffer margins +*//***************************************************************************/ +typedef struct t_FmPortVSPAllocParams { + uint8_t numOfProfiles; /**< Number of Virtual Storage Profiles; must be a power of 2 */ + uint8_t dfltRelativeId; /**< The default Virtual-Storage-Profile-id dedicated to Rx/OP port + The same default Virtual-Storage-Profile-id will be for coupled Tx port + if relevant function called for Rx port */ + t_Handle h_FmTxPort; /**< Handle to coupled Tx Port; not relevant for OP port. */ +} t_FmPortVSPAllocParams; +#endif /* (DPAA_VERSION >= 11) */ + + +/**************************************************************************//** + @Function FM_PORT_SetPCD + + @Description Calling this routine defines the port's PCD configuration. + It changes it from its default configuration which is PCD + disabled (BMI to BMI) and configures it according to the passed + parameters. + + May be used for Rx and OP ports only + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_FmPortPcd A Structure of parameters defining the port's PCD + configuration. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_SetPCD(t_Handle h_FmPort, t_FmPortPcdParams *p_FmPortPcd); + +/**************************************************************************//** + @Function FM_PORT_DeletePCD + + @Description Calling this routine releases the port's PCD configuration. + The port returns to its default configuration which is PCD + disabled (BMI to BMI) and all PCD configuration is removed. + + May be used for Rx and OP ports which are + in PCD mode only + + @Param[in] h_FmPort A handle to a FM Port module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_DeletePCD(t_Handle h_FmPort); + +/**************************************************************************//** + @Function FM_PORT_AttachPCD + + @Description This routine may be called after FM_PORT_DetachPCD was called, + to return to the originally configured PCD support flow. + The couple of routines are used to allow PCD configuration changes + that demand that PCD will not be used while changes take place. + + May be used for Rx and OP ports which are + in PCD mode only + + @Param[in] h_FmPort A handle to a FM Port module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). +*//***************************************************************************/ +t_Error FM_PORT_AttachPCD(t_Handle h_FmPort); + +/**************************************************************************//** + @Function FM_PORT_DetachPCD + + @Description Calling this routine detaches the port from its PCD functionality. + The port returns to its default flow which is BMI to BMI. + + May be used for Rx and OP ports which are + in PCD mode only + + @Param[in] h_FmPort A handle to a FM Port module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_AttachPCD(). +*//***************************************************************************/ +t_Error FM_PORT_DetachPCD(t_Handle h_FmPort); + +/**************************************************************************//** + @Function FM_PORT_PcdPlcrAllocProfiles + + @Description This routine may be called only for ports that use the Policer in + order to allocate private policer profiles. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] numOfProfiles The number of required policer profiles + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init() and FM_PCD_Init(), + and before FM_PORT_SetPCD(). +*//***************************************************************************/ +t_Error FM_PORT_PcdPlcrAllocProfiles(t_Handle h_FmPort, uint16_t numOfProfiles); + +/**************************************************************************//** + @Function FM_PORT_PcdPlcrFreeProfiles + + @Description This routine should be called for freeing private policer profiles. + + @Param[in] h_FmPort A handle to a FM Port module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init() and FM_PCD_Init(), + and before FM_PORT_SetPCD(). +*//***************************************************************************/ +t_Error FM_PORT_PcdPlcrFreeProfiles(t_Handle h_FmPort); + +#if (DPAA_VERSION >= 11) +/**************************************************************************//** + @Function FM_PORT_VSPAlloc + + @Description This routine allocated VSPs per port and forces the port to work + in VSP mode. Note that the port is initialized by default with the + physical-storage-profile only. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_Params A structure of parameters for allocation VSP's per port + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(), and before FM_PORT_SetPCD() + and also before FM_PORT_Enable(); i.e. the port should be disabled. +*//***************************************************************************/ +t_Error FM_PORT_VSPAlloc(t_Handle h_FmPort, t_FmPortVSPAllocParams *p_Params); +#endif /* (DPAA_VERSION >= 11) */ + +/**************************************************************************//** + @Function FM_PORT_PcdKgModifyInitialScheme + + @Description This routine may be called only for ports that use the keygen in + order to change the initial scheme frame should be routed to. + The change may be of a scheme id (in case of direct mode), + from direct to indirect, or from indirect to direct - specifying the scheme id. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_FmPcdKgScheme A structure of parameters for defining whether + a scheme is direct/indirect, and if direct - scheme id. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init() and FM_PORT_SetPCD(). +*//***************************************************************************/ +t_Error FM_PORT_PcdKgModifyInitialScheme (t_Handle h_FmPort, t_FmPcdKgSchemeSelect *p_FmPcdKgScheme); + +/**************************************************************************//** + @Function FM_PORT_PcdPlcrModifyInitialProfile + + @Description This routine may be called for ports with flows + e_FM_PORT_PCD_SUPPORT_PLCR_ONLY or e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR + only, to change the initial Policer profile frame should be + routed to. The change may be of a profile and/or absolute/direct + mode selection. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] h_Profile Policer profile handle + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init() and FM_PORT_SetPCD(). +*//***************************************************************************/ +t_Error FM_PORT_PcdPlcrModifyInitialProfile (t_Handle h_FmPort, t_Handle h_Profile); + +/**************************************************************************//** + @Function FM_PORT_PcdCcModifyTree + + @Description This routine may be called for ports that use coarse classification tree + if the user wishes to replace the tree. The routine may not be called while port + receives packets using the PCD functionalities, therefor port must be first detached + from the PCD, only than the routine may be called, and than port be attached to PCD again. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] h_CcTree A CC tree that was already built. The tree id as returned from + the BuildTree routine. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(), FM_PORT_SetPCD() and FM_PORT_DetachPCD() +*//***************************************************************************/ +t_Error FM_PORT_PcdCcModifyTree (t_Handle h_FmPort, t_Handle h_CcTree); + +/**************************************************************************//** + @Function FM_PORT_PcdKgBindSchemes + + @Description These routines may be called for adding more schemes for the + port to be bound to. The selected schemes are not added, + just this specific port starts using them. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_PortScheme A structure defining the list of schemes to be added. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init() and FM_PORT_SetPCD(). +*//***************************************************************************/ +t_Error FM_PORT_PcdKgBindSchemes (t_Handle h_FmPort, t_FmPcdPortSchemesParams *p_PortScheme); + +/**************************************************************************//** + @Function FM_PORT_PcdKgUnbindSchemes + + @Description These routines may be called for adding more schemes for the + port to be bound to. The selected schemes are not removed or invalidated, + just this specific port stops using them. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_PortScheme A structure defining the list of schemes to be added. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init() and FM_PORT_SetPCD(). +*//***************************************************************************/ +t_Error FM_PORT_PcdKgUnbindSchemes (t_Handle h_FmPort, t_FmPcdPortSchemesParams *p_PortScheme); + +/**************************************************************************//** + @Function FM_PORT_GetIPv4OptionsCount + + @Description TODO + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[out] p_Ipv4OptionsCount will hold the counter value + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init() +*//***************************************************************************/ +t_Error FM_PORT_GetIPv4OptionsCount(t_Handle h_FmPort, uint32_t *p_Ipv4OptionsCount); + +/** @} */ /* end of FM_PORT_pcd_runtime_control_grp group */ +/** @} */ /* end of FM_PORT_runtime_control_grp group */ + + +/**************************************************************************//** + @Group FM_PORT_runtime_data_grp FM Port Runtime Data-path Unit + + @Description FM Port Runtime data unit API functions, definitions and enums. + This API is valid only if working in Independent-Mode. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function FM_PORT_ImTx + + @Description Tx function, called to transmit a data buffer on the port. + + @Param[in] h_FmPort A handle to a FM Port module. + @Param[in] p_Data A pointer to an LCP data buffer. + @Param[in] length Size of data for transmission. + @Param[in] lastBuffer Buffer position - TRUE for the last buffer + of a frame, including a single buffer frame + @Param[in] h_BufContext A handle of the user acossiated with this buffer + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). + NOTE - This routine can be used only when working in + Independent-Mode mode. +*//***************************************************************************/ +t_Error FM_PORT_ImTx( t_Handle h_FmPort, + uint8_t *p_Data, + uint16_t length, + bool lastBuffer, + t_Handle h_BufContext); + +/**************************************************************************//** + @Function FM_PORT_ImTxConf + + @Description Tx port confirmation routine, optional, may be called to verify + transmission of all frames. The procedure performed by this + routine will be performed automatically on next buffer transmission, + but if desired, calling this routine will invoke this action on + demand. + + @Param[in] h_FmPort A handle to a FM Port module. + + @Cautions Allowed only following FM_PORT_Init(). + NOTE - This routine can be used only when working in + Independent-Mode mode. +*//***************************************************************************/ +void FM_PORT_ImTxConf(t_Handle h_FmPort); + +/**************************************************************************//** + @Function FM_PORT_ImRx + + @Description Rx function, may be called to poll for received buffers. + Normally, Rx process is invoked by the driver on Rx interrupt. + Alternatively, this routine may be called on demand. + + @Param[in] h_FmPort A handle to a FM Port module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_PORT_Init(). + NOTE - This routine can be used only when working in + Independent-Mode mode. +*//***************************************************************************/ +t_Error FM_PORT_ImRx(t_Handle h_FmPort); + +/** @} */ /* end of FM_PORT_runtime_data_grp group */ +/** @} */ /* end of FM_PORT_grp group */ +/** @} */ /* end of FM_grp group */ + + + +#ifdef NCSW_BACKWARD_COMPATIBLE_API +#define FM_PORT_ConfigTxFifoDeqPipelineDepth FM_PORT_ConfigFifoDeqPipelineDepth +#endif /* NCSW_BACKWARD_COMPATIBLE_API */ + + +#endif /* __FM_PORT_EXT */ diff --git a/sys/contrib/ncsw/inc/Peripherals/fm_rtc_ext.h b/sys/contrib/ncsw/inc/Peripherals/fm_rtc_ext.h new file mode 100644 index 000000000000..72078ac42c10 --- /dev/null +++ b/sys/contrib/ncsw/inc/Peripherals/fm_rtc_ext.h @@ -0,0 +1,619 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File fm_rtc_ext.h + + @Description External definitions and API for FM RTC IEEE1588 Timer Module. + + @Cautions None. +*//***************************************************************************/ + +#ifndef __FM_RTC_EXT_H__ +#define __FM_RTC_EXT_H__ + + +#include "error_ext.h" +#include "std_ext.h" +#include "fsl_fman_rtc.h" + +/**************************************************************************//** + + @Group FM_grp Frame Manager API + + @Description FM API functions, definitions and enums + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group fm_rtc_grp FM RTC + + @Description FM RTC functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group fm_rtc_init_grp FM RTC Initialization Unit + + @Description FM RTC initialization API. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description FM RTC Alarm Polarity Options. +*//***************************************************************************/ +typedef enum e_FmRtcAlarmPolarity +{ + e_FM_RTC_ALARM_POLARITY_ACTIVE_HIGH = E_FMAN_RTC_ALARM_POLARITY_ACTIVE_HIGH, /**< Active-high output polarity */ + e_FM_RTC_ALARM_POLARITY_ACTIVE_LOW = E_FMAN_RTC_ALARM_POLARITY_ACTIVE_LOW /**< Active-low output polarity */ +} e_FmRtcAlarmPolarity; + +/**************************************************************************//** + @Description FM RTC Trigger Polarity Options. +*//***************************************************************************/ +typedef enum e_FmRtcTriggerPolarity +{ + e_FM_RTC_TRIGGER_ON_RISING_EDGE = E_FMAN_RTC_TRIGGER_ON_RISING_EDGE, /**< Trigger on rising edge */ + e_FM_RTC_TRIGGER_ON_FALLING_EDGE = E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE /**< Trigger on falling edge */ +} e_FmRtcTriggerPolarity; + +/**************************************************************************//** + @Description IEEE1588 Timer Module FM RTC Optional Clock Sources. +*//***************************************************************************/ +typedef enum e_FmSrcClock +{ + e_FM_RTC_SOURCE_CLOCK_EXTERNAL = E_FMAN_RTC_SOURCE_CLOCK_EXTERNAL, /**< external high precision timer reference clock */ + e_FM_RTC_SOURCE_CLOCK_SYSTEM = E_FMAN_RTC_SOURCE_CLOCK_SYSTEM, /**< MAC system clock */ + e_FM_RTC_SOURCE_CLOCK_OSCILATOR = E_FMAN_RTC_SOURCE_CLOCK_OSCILATOR /**< RTC clock oscilator */ +}e_FmSrcClk; + +/**************************************************************************//** + @Description FM RTC configuration parameters structure. + + This structure should be passed to FM_RTC_Config(). +*//***************************************************************************/ +typedef struct t_FmRtcParams +{ + t_Handle h_Fm; /**< FM Handle*/ + uintptr_t baseAddress; /**< Base address of FM RTC registers */ + t_Handle h_App; /**< A handle to an application layer object; This handle will + be passed by the driver upon calling the above callbacks */ +} t_FmRtcParams; + + +/**************************************************************************//** + @Function FM_RTC_Config + + @Description Configures the FM RTC module according to user's parameters. + + The driver assigns default values to some FM RTC parameters. + These parameters can be overwritten using the advanced + configuration routines. + + @Param[in] p_FmRtcParam - FM RTC configuration parameters. + + @Return Handle to the new FM RTC object; NULL pointer on failure. + + @Cautions None +*//***************************************************************************/ +t_Handle FM_RTC_Config(t_FmRtcParams *p_FmRtcParam); + +/**************************************************************************//** + @Function FM_RTC_Init + + @Description Initializes the FM RTC driver and hardware. + + @Param[in] h_FmRtc - Handle to FM RTC object. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously created using FM_RTC_Config(). +*//***************************************************************************/ +t_Error FM_RTC_Init(t_Handle h_FmRtc); + +/**************************************************************************//** + @Function FM_RTC_Free + + @Description Frees the FM RTC object and all allocated resources. + + @Param[in] h_FmRtc - Handle to FM RTC object. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously created using FM_RTC_Config(). +*//***************************************************************************/ +t_Error FM_RTC_Free(t_Handle h_FmRtc); + + +/**************************************************************************//** + @Group fm_rtc_adv_config_grp FM RTC Advanced Configuration Unit + + @Description FM RTC advanced configuration functions. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function FM_RTC_ConfigPeriod + + @Description Configures the period of the timestamp if different than + default [DEFAULT_clockPeriod]. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] period - Period in nano-seconds. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously created using FM_RTC_Config(). +*//***************************************************************************/ +t_Error FM_RTC_ConfigPeriod(t_Handle h_FmRtc, uint32_t period); + +/**************************************************************************//** + @Function FM_RTC_ConfigSourceClock + + @Description Configures the source clock of the RTC. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] srcClk - Source clock selection. + @Param[in] freqInMhz - the source-clock frequency (in MHz). + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously created using FM_RTC_Config(). +*//***************************************************************************/ +t_Error FM_RTC_ConfigSourceClock(t_Handle h_FmRtc, + e_FmSrcClk srcClk, + uint32_t freqInMhz); + +/**************************************************************************//** + @Function FM_RTC_ConfigPulseRealignment + + @Description Configures the RTC to automatic FIPER pulse realignment in + response to timer adjustments [DEFAULT_pulseRealign] + + In this mode, the RTC clock is identical to the source clock. + This feature can be useful when the system contains an external + RTC with inherent frequency compensation. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] enable - TRUE to enable automatic realignment. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously created using FM_RTC_Config(). +*//***************************************************************************/ +t_Error FM_RTC_ConfigPulseRealignment(t_Handle h_FmRtc, bool enable); + +/**************************************************************************//** + @Function FM_RTC_ConfigFrequencyBypass + + @Description Configures the RTC to bypass the frequency compensation + mechanism. [DEFAULT_bypass] + + In this mode, the RTC clock is identical to the source clock. + This feature can be useful when the system contains an external + RTC with inherent frequency compensation. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] enabled - TRUE to bypass frequency compensation; + FALSE otherwise. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously created using FM_RTC_Config(). +*//***************************************************************************/ +t_Error FM_RTC_ConfigFrequencyBypass(t_Handle h_FmRtc, bool enabled); + +/**************************************************************************//** + @Function FM_RTC_ConfigInvertedInputClockPhase + + @Description Configures the RTC to invert the source clock phase on input. + [DEFAULT_invertInputClkPhase] + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] inverted - TRUE to invert the source clock phase on input. + FALSE otherwise. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously created using FM_RTC_Config(). +*//***************************************************************************/ +t_Error FM_RTC_ConfigInvertedInputClockPhase(t_Handle h_FmRtc, bool inverted); + +/**************************************************************************//** + @Function FM_RTC_ConfigInvertedOutputClockPhase + + @Description Configures the RTC to invert the output clock phase. + [DEFAULT_invertOutputClkPhase] + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] inverted - TRUE to invert the output clock phase. + FALSE otherwise. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously created using FM_RTC_Config(). +*//***************************************************************************/ +t_Error FM_RTC_ConfigInvertedOutputClockPhase(t_Handle h_FmRtc, bool inverted); + +/**************************************************************************//** + @Function FM_RTC_ConfigOutputClockDivisor + + @Description Configures the divisor for generating the output clock from + the RTC clock. [DEFAULT_outputClockDivisor] + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] divisor - Divisor for generation of the output clock. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously created using FM_RTC_Config(). +*//***************************************************************************/ +t_Error FM_RTC_ConfigOutputClockDivisor(t_Handle h_FmRtc, uint16_t divisor); + +/**************************************************************************//** + @Function FM_RTC_ConfigAlarmPolarity + + @Description Configures the polarity (active-high/active-low) of a specific + alarm signal. [DEFAULT_alarmPolarity] + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] alarmId - Alarm ID. + @Param[in] alarmPolarity - Alarm polarity. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously created using FM_RTC_Config(). +*//***************************************************************************/ +t_Error FM_RTC_ConfigAlarmPolarity(t_Handle h_FmRtc, + uint8_t alarmId, + e_FmRtcAlarmPolarity alarmPolarity); + +/**************************************************************************//** + @Function FM_RTC_ConfigExternalTriggerPolarity + + @Description Configures the polarity (rising/falling edge) of a specific + external trigger signal. [DEFAULT_triggerPolarity] + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] triggerId - Trigger ID. + @Param[in] triggerPolarity - Trigger polarity. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously created using FM_RTC_Config(). +*//***************************************************************************/ +t_Error FM_RTC_ConfigExternalTriggerPolarity(t_Handle h_FmRtc, + uint8_t triggerId, + e_FmRtcTriggerPolarity triggerPolarity); + +/** @} */ /* end of fm_rtc_adv_config_grp */ +/** @} */ /* end of fm_rtc_init_grp */ + + +/**************************************************************************//** + @Group fm_rtc_control_grp FM RTC Control Unit + + @Description FM RTC runtime control API. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function t_FmRtcExceptionsCallback + + @Description Exceptions user callback routine, used for RTC different mechanisms. + + @Param[in] h_App - User's application descriptor. + @Param[in] id - source id. +*//***************************************************************************/ +typedef void (t_FmRtcExceptionsCallback) ( t_Handle h_App, uint8_t id); + +/**************************************************************************//** + @Description FM RTC alarm parameters. +*//***************************************************************************/ +typedef struct t_FmRtcAlarmParams { + uint8_t alarmId; /**< 0 or 1 */ + uint64_t alarmTime; /**< In nanoseconds, the time when the alarm + should go off - must be a multiple of + the RTC period */ + t_FmRtcExceptionsCallback *f_AlarmCallback; /**< This routine will be called when RTC + reaches alarmTime */ + bool clearOnExpiration; /**< TRUE to turn off the alarm once expired. */ +} t_FmRtcAlarmParams; + +/**************************************************************************//** + @Description FM RTC Periodic Pulse parameters. +*//***************************************************************************/ +typedef struct t_FmRtcPeriodicPulseParams { + uint8_t periodicPulseId; /**< 0 or 1 */ + uint64_t periodicPulsePeriod; /**< In Nanoseconds. Must be + a multiple of the RTC period */ + t_FmRtcExceptionsCallback *f_PeriodicPulseCallback; /**< This routine will be called every + periodicPulsePeriod. */ +} t_FmRtcPeriodicPulseParams; + +/**************************************************************************//** + @Description FM RTC Periodic Pulse parameters. +*//***************************************************************************/ +typedef struct t_FmRtcExternalTriggerParams { + uint8_t externalTriggerId; /**< 0 or 1 */ + bool usePulseAsInput; /**< Use the pulse interrupt instead of + an external signal */ + t_FmRtcExceptionsCallback *f_ExternalTriggerCallback; /**< This routine will be called every + periodicPulsePeriod. */ +} t_FmRtcExternalTriggerParams; + + +/**************************************************************************//** + @Function FM_RTC_Enable + + @Description Enable the RTC (time count is started). + + The user can select to resume the time count from previous + point, or to restart the time count. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] resetClock - Restart the time count from zero. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init(). +*//***************************************************************************/ +t_Error FM_RTC_Enable(t_Handle h_FmRtc, bool resetClock); + +/**************************************************************************//** + @Function FM_RTC_Disable + + @Description Disables the RTC (time count is stopped). + + @Param[in] h_FmRtc - Handle to FM RTC object. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init(). +*//***************************************************************************/ +t_Error FM_RTC_Disable(t_Handle h_FmRtc); + +/**************************************************************************//** + @Function FM_RTC_SetClockOffset + + @Description Sets the clock offset (usually relative to another clock). + + The user can pass a negative offset value. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] offset - New clock offset (in nanoseconds). + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init(). +*//***************************************************************************/ +t_Error FM_RTC_SetClockOffset(t_Handle h_FmRtc, int64_t offset); + +/**************************************************************************//** + @Function FM_RTC_SetAlarm + + @Description Schedules an alarm event to a given RTC time. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] p_FmRtcAlarmParams - Alarm parameters. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init(). + Must be called only prior to FM_RTC_Enable(). +*//***************************************************************************/ +t_Error FM_RTC_SetAlarm(t_Handle h_FmRtc, t_FmRtcAlarmParams *p_FmRtcAlarmParams); + +/**************************************************************************//** + @Function FM_RTC_SetPeriodicPulse + + @Description Sets a periodic pulse. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] p_FmRtcPeriodicPulseParams - Periodic pulse parameters. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init(). + Must be called only prior to FM_RTC_Enable(). +*//***************************************************************************/ +t_Error FM_RTC_SetPeriodicPulse(t_Handle h_FmRtc, t_FmRtcPeriodicPulseParams *p_FmRtcPeriodicPulseParams); + +/**************************************************************************//** + @Function FM_RTC_ClearPeriodicPulse + + @Description Clears a periodic pulse. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] periodicPulseId - Periodic pulse id. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init(). +*//***************************************************************************/ +t_Error FM_RTC_ClearPeriodicPulse(t_Handle h_FmRtc, uint8_t periodicPulseId); + +/**************************************************************************//** + @Function FM_RTC_SetExternalTrigger + + @Description Sets an external trigger indication and define a callback + routine to be called on such event. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] p_FmRtcExternalTriggerParams - External Trigger parameters. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init(). +*//***************************************************************************/ +t_Error FM_RTC_SetExternalTrigger(t_Handle h_FmRtc, t_FmRtcExternalTriggerParams *p_FmRtcExternalTriggerParams); + +/**************************************************************************//** + @Function FM_RTC_ClearExternalTrigger + + @Description Clears external trigger indication. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] id - External Trigger id. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init(). +*//***************************************************************************/ +t_Error FM_RTC_ClearExternalTrigger(t_Handle h_FmRtc, uint8_t id); + +/**************************************************************************//** + @Function FM_RTC_GetExternalTriggerTimeStamp + + @Description Reads the External Trigger TimeStamp. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] triggerId - External Trigger id. + @Param[out] p_TimeStamp - External Trigger timestamp (in nanoseconds). + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init(). +*//***************************************************************************/ +t_Error FM_RTC_GetExternalTriggerTimeStamp(t_Handle h_FmRtc, + uint8_t triggerId, + uint64_t *p_TimeStamp); + +/**************************************************************************//** + @Function FM_RTC_GetCurrentTime + + @Description Returns the current RTC time. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[out] p_Ts - returned time stamp (in nanoseconds). + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init(). +*//***************************************************************************/ +t_Error FM_RTC_GetCurrentTime(t_Handle h_FmRtc, uint64_t *p_Ts); + +/**************************************************************************//** + @Function FM_RTC_SetCurrentTime + + @Description Sets the current RTC time. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] ts - The new time stamp (in nanoseconds). + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init(). +*//***************************************************************************/ +t_Error FM_RTC_SetCurrentTime(t_Handle h_FmRtc, uint64_t ts); + +/**************************************************************************//** + @Function FM_RTC_GetFreqCompensation + + @Description Retrieves the frequency compensation value + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[out] p_Compensation - A pointer to the returned value of compensation. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init(). +*//***************************************************************************/ +t_Error FM_RTC_GetFreqCompensation(t_Handle h_FmRtc, uint32_t *p_Compensation); + +/**************************************************************************//** + @Function FM_RTC_SetFreqCompensation + + @Description Sets a new frequency compensation value. + + @Param[in] h_FmRtc - Handle to FM RTC object. + @Param[in] freqCompensation - The new frequency compensation value to set. + + @Return E_OK on success; Error code otherwise. + + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init(). +*//***************************************************************************/ +t_Error FM_RTC_SetFreqCompensation(t_Handle h_FmRtc, uint32_t freqCompensation); + +#ifdef CONFIG_PTP_1588_CLOCK_DPAA +/**************************************************************************//** +*@Function FM_RTC_EnableInterrupt +* +*@Description Enable interrupt of FM RTC. +* +*@Param[in] h_FmRtc - Handle to FM RTC object. +*@Param[in] events - Interrupt events. +* +*@Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_RTC_EnableInterrupt(t_Handle h_FmRtc, uint32_t events); + +/**************************************************************************//** +*@Function FM_RTC_DisableInterrupt +* +*@Description Disable interrupt of FM RTC. +* +*@Param[in] h_FmRtc - Handle to FM RTC object. +*@Param[in] events - Interrupt events. +* +*@Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_RTC_DisableInterrupt(t_Handle h_FmRtc, uint32_t events); +#endif + +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) +/**************************************************************************//** + @Function FM_RTC_DumpRegs + + @Description Dumps all FM registers + + @Param[in] h_FmRtc A handle to an FM RTC Module. + + @Return E_OK on success; + + @Cautions Allowed only FM_Init(). +*//***************************************************************************/ +t_Error FM_RTC_DumpRegs(t_Handle h_FmRtc); +#endif /* (defined(DEBUG_ERRORS) && ... */ + +/** @} */ /* end of fm_rtc_control_grp */ +/** @} */ /* end of fm_rtc_grp */ +/** @} */ /* end of FM_grp group */ + + +#endif /* __FM_RTC_EXT_H__ */ diff --git a/sys/contrib/ncsw/inc/Peripherals/fm_vsp_ext.h b/sys/contrib/ncsw/inc/Peripherals/fm_vsp_ext.h new file mode 100644 index 000000000000..f9aed0363d7c --- /dev/null +++ b/sys/contrib/ncsw/inc/Peripherals/fm_vsp_ext.h @@ -0,0 +1,411 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File fm_vsp_ext.h + + @Description FM Virtual Storage-Profile ... +*//***************************************************************************/ +#ifndef __FM_VSP_EXT_H +#define __FM_VSP_EXT_H + +#include "std_ext.h" +#include "error_ext.h" +#include "string_ext.h" +#include "debug_ext.h" + +#include "fm_ext.h" + + +/**************************************************************************//** + + @Group FM_grp Frame Manager API + + @Description FM API functions, definitions and enums + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group FM_VSP_grp FM Virtual-Storage-Profile + + @Description FM Virtual-Storage-Profile API + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group FM_VSP_init_grp FM VSP Initialization Unit + + @Description FM VSP initialization API. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description Virtual Storage Profile +*//***************************************************************************/ +typedef struct t_FmVspParams { + t_Handle h_Fm; /**< A handle to the FM object this VSP related to */ + t_FmExtPools extBufPools; /**< Which external buffer pools are used + (up to FM_PORT_MAX_NUM_OF_EXT_POOLS), and their sizes. + parameter associated with Rx / OP port */ + uint16_t liodnOffset; /**< VSP's LIODN offset */ + struct { + e_FmPortType portType; /**< Port type */ + uint8_t portId; /**< Port Id - relative to type */ + } portParams; + uint8_t relativeProfileId; /**< VSP Id - relative to VSP's range + defined in relevant FM object */ +} t_FmVspParams; + + +/**************************************************************************//** + @Function FM_VSP_Config + + @Description Creates descriptor for the FM VSP module. + + The routine returns a handle (descriptor) to the FM VSP object. + This descriptor must be passed as first parameter to all other + FM VSP function calls. + + No actual initialization or configuration of FM hardware is + done by this routine. + +@Param[in] p_FmVspParams Pointer to data structure of parameters + + @Retval Handle to FM VSP object, or NULL for Failure. +*//***************************************************************************/ +t_Handle FM_VSP_Config(t_FmVspParams *p_FmVspParams); + +/**************************************************************************//** + @Function FM_VSP_Init + + @Description Initializes the FM VSP module + + @Param[in] h_FmVsp - FM VSP module descriptor + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_VSP_Init(t_Handle h_FmVsp); + +/**************************************************************************//** + @Function FM_VSP_Free + + @Description Frees all resources that were assigned to FM VSP module. + + Calling this routine invalidates the descriptor. + + @Param[in] h_FmVsp - FM VSP module descriptor + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error FM_VSP_Free(t_Handle h_FmVsp); + + +/**************************************************************************//** + @Group FM_VSP_adv_config_grp FM VSP Advanced Configuration Unit + + @Description FM VSP advanced configuration functions. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function FM_VSP_ConfigBufferPrefixContent + + @Description Defines the structure, size and content of the application buffer. + + The prefix will + In VSPs defined for Tx ports, if 'passPrsResult', the application + should set a value to their offsets in the prefix of + the FM will save the first 'privDataSize', than, + depending on 'passPrsResult' and 'passTimeStamp', copy parse result + and timeStamp, and the packet itself (in this order), to the + application buffer, and to offset. + + Calling this routine changes the buffer margins definitions + in the internal driver data base from its default + configuration: Data size: [DEFAULT_FM_SP_bufferPrefixContent_privDataSize] + Pass Parser result: [DEFAULT_FM_SP_bufferPrefixContent_passPrsResult]. + Pass timestamp: [DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp]. + + @Param[in] h_FmVsp A handle to a FM VSP module. + @Param[in,out] p_FmBufferPrefixContent A structure of parameters describing the + structure of the buffer. + Out parameter: Start margin - offset + of data from start of external buffer. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init(). +*//***************************************************************************/ +t_Error FM_VSP_ConfigBufferPrefixContent(t_Handle h_FmVsp, + t_FmBufferPrefixContent *p_FmBufferPrefixContent); + +/**************************************************************************//** + @Function FM_VSP_ConfigDmaSwapData + + @Description Calling this routine changes the DMA swap data parameter + in the internal driver data base from its default + configuration [DEFAULT_FM_SP_dmaSwapData] + + @Param[in] h_FmVsp A handle to a FM VSP module. + @Param[in] swapData New selection + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init(). +*//***************************************************************************/ +t_Error FM_VSP_ConfigDmaSwapData(t_Handle h_FmVsp, e_FmDmaSwapOption swapData); + +/**************************************************************************//** + @Function FM_VSP_ConfigDmaIcCacheAttr + + @Description Calling this routine changes the internal context cache + attribute parameter in the internal driver data base + from its default configuration [DEFAULT_FM_SP_dmaIntContextCacheAttr] + + @Param[in] h_FmVsp A handle to a FM VSP module. + @Param[in] intContextCacheAttr New selection + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init(). +*//***************************************************************************/ +t_Error FM_VSP_ConfigDmaIcCacheAttr(t_Handle h_FmVsp, + e_FmDmaCacheOption intContextCacheAttr); + +/**************************************************************************//** + @Function FM_VSP_ConfigDmaHdrAttr + + @Description Calling this routine changes the header cache + attribute parameter in the internal driver data base + from its default configuration [DEFAULT_FM_SP_dmaHeaderCacheAttr] + + @Param[in] h_FmVsp A handle to a FM VSP module. + @Param[in] headerCacheAttr New selection + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init(). +*//***************************************************************************/ +t_Error FM_VSP_ConfigDmaHdrAttr(t_Handle h_FmVsp, e_FmDmaCacheOption headerCacheAttr); + +/**************************************************************************//** + @Function FM_VSP_ConfigDmaScatterGatherAttr + + @Description Calling this routine changes the scatter gather cache + attribute parameter in the internal driver data base + from its default configuration [DEFAULT_FM_SP_dmaScatterGatherCacheAttr] + + @Param[in] h_FmVsp A handle to a FM VSP module. + @Param[in] scatterGatherCacheAttr New selection + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init(). +*//***************************************************************************/ +t_Error FM_VSP_ConfigDmaScatterGatherAttr(t_Handle h_FmVsp, + e_FmDmaCacheOption scatterGatherCacheAttr); + +/**************************************************************************//** + @Function FM_VSP_ConfigDmaWriteOptimize + + @Description Calling this routine changes the write optimization + parameter in the internal driver data base + from its default configuration: optimize = [DEFAULT_FM_SP_dmaWriteOptimize] + + @Param[in] h_FmVsp A handle to a FM VSP module. + @Param[in] optimize TRUE to enable optimization, FALSE for normal operation + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init(). +*//***************************************************************************/ +t_Error FM_VSP_ConfigDmaWriteOptimize(t_Handle h_FmVsp, bool optimize); + +/**************************************************************************//** + @Function FM_VSP_ConfigNoScatherGather + + @Description Calling this routine changes the possibility to receive S/G frame + in the internal driver data base + from its default configuration: optimize = [DEFAULT_FM_SP_noScatherGather] + + @Param[in] h_FmVsp A handle to a FM VSP module. + @Param[in] noScatherGather TRUE to operate without scatter/gather capability. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init(). +*//***************************************************************************/ +t_Error FM_VSP_ConfigNoScatherGather(t_Handle h_FmVsp, bool noScatherGather); + +/**************************************************************************//** + @Function FM_VSP_ConfigPoolDepletion + + @Description Calling this routine enables pause frame generation depending on the + depletion status of BM pools. It also defines the conditions to activate + this functionality. By default, this functionality is disabled. + + @Param[in] h_FmVsp A handle to a FM VSP module. + @Param[in] p_BufPoolDepletion A structure of pool depletion parameters + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init(). +*//***************************************************************************/ +t_Error FM_VSP_ConfigPoolDepletion(t_Handle h_FmVsp, t_FmBufPoolDepletion *p_BufPoolDepletion); + +/**************************************************************************//** + @Function FM_VSP_ConfigBackupPools + + @Description Calling this routine allows the configuration of some of the BM pools + defined for this port as backup pools. + A pool configured to be a backup pool will be used only if all other + enabled non-backup pools are depleted. + + @Param[in] h_FmVsp A handle to a FM VSP module. + @Param[in] p_BackupBmPools An array of pool id's. All pools specified here will + be defined as backup pools. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init(). +*//***************************************************************************/ +t_Error FM_VSP_ConfigBackupPools(t_Handle h_FmVsp, t_FmBackupBmPools *p_BackupBmPools); + +/** @} */ /* end of FM_VSP_adv_config_grp group */ +/** @} */ /* end of FM_VSP_init_grp group */ + + +/**************************************************************************//** + @Group FM_VSP_control_grp FM VSP Control Unit + + @Description FM VSP runtime control API. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function FM_VSP_GetBufferDataOffset + + @Description Relevant for Rx ports. + Returns the data offset from the beginning of the data buffer + + @Param[in] h_FmVsp - FM PORT module descriptor + + @Return data offset. + + @Cautions Allowed only following FM_VSP_Init(). +*//***************************************************************************/ +uint32_t FM_VSP_GetBufferDataOffset(t_Handle h_FmVsp); + +/**************************************************************************//** + @Function FM_VSP_GetBufferICInfo + + @Description Returns the Internal Context offset from the beginning of the data buffer + + @Param[in] h_FmVsp - FM PORT module descriptor + @Param[in] p_Data - A pointer to the data buffer. + + @Return Internal context info pointer on success, NULL if 'allOtherInfo' was not + configured for this port. + + @Cautions Allowed only following FM_VSP_Init(). +*//***************************************************************************/ +uint8_t * FM_VSP_GetBufferICInfo(t_Handle h_FmVsp, char *p_Data); + +/**************************************************************************//** + @Function FM_VSP_GetBufferPrsResult + + @Description Returns the pointer to the parse result in the data buffer. + In Rx ports this is relevant after reception, if parse + result is configured to be part of the data passed to the + application. For non Rx ports it may be used to get the pointer + of the area in the buffer where parse result should be + initialized - if so configured. + See FM_VSP_ConfigBufferPrefixContent for data buffer prefix + configuration. + + @Param[in] h_FmVsp - FM PORT module descriptor + @Param[in] p_Data - A pointer to the data buffer. + + @Return Parse result pointer on success, NULL if parse result was not + configured for this port. + + @Cautions Allowed only following FM_VSP_Init(). +*//***************************************************************************/ +t_FmPrsResult * FM_VSP_GetBufferPrsResult(t_Handle h_FmVsp, char *p_Data); + +/**************************************************************************//** + @Function FM_VSP_GetBufferTimeStamp + + @Description Returns the time stamp in the data buffer. + Relevant for Rx ports for getting the buffer time stamp. + See FM_VSP_ConfigBufferPrefixContent for data buffer prefix + configuration. + + @Param[in] h_FmVsp - FM PORT module descriptor + @Param[in] p_Data - A pointer to the data buffer. + + @Return A pointer to the hash result on success, NULL otherwise. + + @Cautions Allowed only following FM_VSP_Init(). +*//***************************************************************************/ +uint64_t * FM_VSP_GetBufferTimeStamp(t_Handle h_FmVsp, char *p_Data); + +/**************************************************************************//** + @Function FM_VSP_GetBufferHashResult + + @Description Given a data buffer, on the condition that hash result was defined + as a part of the buffer content (see FM_VSP_ConfigBufferPrefixContent) + this routine will return the pointer to the hash result location in the + buffer prefix. + + @Param[in] h_FmVsp - FM PORT module descriptor + @Param[in] p_Data - A pointer to the data buffer. + + @Return A pointer to the hash result on success, NULL otherwise. + + @Cautions Allowed only following FM_VSP_Init(). +*//***************************************************************************/ +uint8_t * FM_VSP_GetBufferHashResult(t_Handle h_FmVsp, char *p_Data); + + +/** @} */ /* end of FM_VSP_control_grp group */ +/** @} */ /* end of FM_VSP_grp group */ +/** @} */ /* end of FM_grp group */ + + +#endif /* __FM_VSP_EXT_H */ diff --git a/sys/contrib/ncsw/inc/Peripherals/mii_acc_ext.h b/sys/contrib/ncsw/inc/Peripherals/mii_acc_ext.h new file mode 100644 index 000000000000..f635d3c24de0 --- /dev/null +++ b/sys/contrib/ncsw/inc/Peripherals/mii_acc_ext.h @@ -0,0 +1,76 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + + +#ifndef __MII_ACC_EXT_H +#define __MII_ACC_EXT_H + + +/**************************************************************************//** + @Function MII_ReadPhyReg + + @Description This routine is called to read a specified PHY + register value. + + @Param[in] h_MiiAccess - Handle to MII configuration access registers + @Param[in] phyAddr - PHY address (0-31). + @Param[in] reg - PHY register to read + @Param[out] p_Data - Gets the register value. + + @Return Always zero (success). +*//***************************************************************************/ +int MII_ReadPhyReg(t_Handle h_MiiAccess, + uint8_t phyAddr, + uint8_t reg, + uint16_t *p_Data); + +/**************************************************************************//** + @Function MII_WritePhyReg + + @Description This routine is called to write data to a specified PHY + register. + + @Param[in] h_MiiAccess - Handle to MII configuration access registers + @Param[in] phyAddr - PHY address (0-31). + @Param[in] reg - PHY register to write + @Param[in] data - Data to write in register. + + @Return Always zero (success). +*//***************************************************************************/ +int MII_WritePhyReg(t_Handle h_MiiAccess, + uint8_t phyAddr, + uint8_t reg, + uint16_t data); + + +#endif /* __MII_ACC_EXT_H */ diff --git a/sys/contrib/ncsw/inc/Peripherals/qm_ext.h b/sys/contrib/ncsw/inc/Peripherals/qm_ext.h new file mode 100644 index 000000000000..6a4bc9fcfe6f --- /dev/null +++ b/sys/contrib/ncsw/inc/Peripherals/qm_ext.h @@ -0,0 +1,1270 @@ +/****************************************************************************** + + © 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc. + All rights reserved. + + This is proprietary source code of Freescale Semiconductor Inc., + and its use is subject to the NetComm Device Drivers EULA. + The copyright notice above does not evidence any actual or intended + publication of such source code. + + ALTERNATIVELY, redistribution and use in source and binary forms, with + or without modification, are permitted provided that the following + conditions are met: + * Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + * Neither the name of Freescale Semiconductor nor the + names of its contributors may be used to endorse or promote products + derived from this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + + **************************************************************************/ +/****************************************************************************** + @File qm_ext.h + + @Description QM & Portal API +*//***************************************************************************/ +#ifndef __QM_EXT_H +#define __QM_EXT_H + +#include "error_ext.h" +#include "std_ext.h" +#include "dpaa_ext.h" +#include "part_ext.h" + + +/**************************************************************************//** + @Group QM_grp Queue Manager API + + @Description QM API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description This callback type is used when receiving frame. + + User provides this function. Driver invokes it. + + @Param[in] h_App A user argument to the callback + @Param[in] h_QmFqr A handle to an QM-FQR Module. + @Param[in] fqidOffset fqid offset from the FQR's fqid base. + @Param[in] p_Frame The Received Frame + + @Retval e_RX_STORE_RESPONSE_CONTINUE - order the driver to continue Rx + operation for all ready data. + @Retval e_RX_STORE_RESPONSE_PAUSE - order the driver to stop Rx operation. + + @Cautions p_Frame is local parameter; i.e. users must NOT access or use + this parameter in any means outside this callback context. +*//***************************************************************************/ +typedef e_RxStoreResponse (t_QmReceivedFrameCallback)(t_Handle h_App, + t_Handle h_QmFqr, + t_Handle h_QmPortal, + uint32_t fqidOffset, + t_DpaaFD *p_Frame); + +/**************************************************************************//** + @Description This callback type is used when the FQR is completely was drained. + + User provides this function. Driver invokes it. + + @Param[in] h_App A user argument to the callback + @Param[in] h_QmFqr A handle to an QM-FQR Module. + + @Retval E_OK on success; Error code otherwise. +*//***************************************************************************/ +typedef t_Error (t_QmFqrDrainedCompletionCB)(t_Handle h_App, + t_Handle h_QmFqr); + +/**************************************************************************//** + @Description QM Rejection code enum +*//***************************************************************************/ +typedef enum e_QmRejectionCode +{ + e_QM_RC_NONE, + + e_QM_RC_CG_TAILDROP, /**< This frames was rejected due to congestion + group taildrop situation */ + e_QM_RC_CG_WRED, /**< This frames was rejected due to congestion + group WRED situation */ + e_QM_RC_FQ_TAILDROP /**< This frames was rejected due to FQID TD + situation */ +/* e_QM_RC_ERROR + e_QM_RC_ORPWINDOW_EARLY + e_QM_RC_ORPWINDOW_LATE + e_QM_RC_ORPWINDOW_RETIRED */ +} e_QmRejectionCode; + +/**************************************************************************//** + @Description QM Rejected frame information +*//***************************************************************************/ +typedef struct t_QmRejectedFrameInfo +{ + e_QmRejectionCode rejectionCode; /**< Rejection code */ + union + { + struct + { + uint8_t cgId; /**< congestion group id*/ + } cg; /**< rejection parameters when rejectionCode = + e_QM_RC_CG_TAILDROP or e_QM_RC_CG_WRED. */ + }; +} t_QmRejectedFrameInfo; + +/**************************************************************************//** + @Description This callback type is used when receiving rejected frames. + + User provides this function. Driver invokes it. + + @Param[in] h_App A user argument to the callback + @Param[in] h_QmFqr A handle to an QM-FQR Module. + @Param[in] fqidOffset fqid offset from the FQR's fqid base. + @Param[in] p_Frame The Rejected Frame + @Param[in] p_QmRejectedFrameInfo Rejected Frame information + + @Retval e_RX_STORE_RESPONSE_CONTINUE - order the driver to continue Rx + operation for all ready data. + @Retval e_RX_STORE_RESPONSE_PAUSE - order the driver to stop Rx operation. + + @Cautions p_Frame is local parameter; i.e. users must NOT access or use + this parameter in any means outside this callback context. +*//***************************************************************************/ +typedef e_RxStoreResponse (t_QmRejectedFrameCallback)(t_Handle h_App, + t_Handle h_QmFqr, + t_Handle h_QmPortal, + uint32_t fqidOffset, + t_DpaaFD *p_Frame, + t_QmRejectedFrameInfo *p_QmRejectedFrameInfo); + + + +/**************************************************************************//** + @Group QM_lib_grp QM common API + + @Description QM common API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description QM Exceptions +*//***************************************************************************/ +typedef enum e_QmExceptions { + e_QM_EX_CORENET_INITIATOR_DATA = 0, /**< Initiator Data Error */ + e_QM_EX_CORENET_TARGET_DATA, /**< CoreNet Target Data Error */ + e_QM_EX_CORENET_INVALID_TARGET_TRANSACTION, /**< Invalid Target Transaction */ + e_QM_EX_PFDR_THRESHOLD, /**< PFDR Low Watermark Interrupt */ + e_QM_EX_PFDR_ENQUEUE_BLOCKED, /**< PFDR Enqueues Blocked Interrupt */ + e_QM_EX_SINGLE_ECC, /**< Single Bit ECC Error Interrupt */ + e_QM_EX_MULTI_ECC, /**< Multi Bit ECC Error Interrupt */ + e_QM_EX_INVALID_COMMAND, /**< Invalid Command Verb Interrupt */ + e_QM_EX_DEQUEUE_DCP, /**< Invalid Dequeue Direct Connect Portal Interrupt */ + e_QM_EX_DEQUEUE_FQ, /**< Invalid Dequeue FQ Interrupt */ + e_QM_EX_DEQUEUE_SOURCE, /**< Invalid Dequeue Source Interrupt */ + e_QM_EX_DEQUEUE_QUEUE, /**< Invalid Dequeue Queue Interrupt */ + e_QM_EX_ENQUEUE_OVERFLOW, /**< Invalid Enqueue Overflow Interrupt */ + e_QM_EX_ENQUEUE_STATE, /**< Invalid Enqueue State Interrupt */ + e_QM_EX_ENQUEUE_CHANNEL, /**< Invalid Enqueue Channel Interrupt */ + e_QM_EX_ENQUEUE_QUEUE, /**< Invalid Enqueue Queue Interrupt */ + e_QM_EX_CG_STATE_CHANGE /**< CG change state notification */ +} e_QmExceptions; + +/**************************************************************************//** + @Group QM_init_grp QM (common) Initialization Unit + + @Description QM (common) Initialization Unit + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function t_QmExceptionsCallback + + @Description Exceptions user callback routine, will be called upon an + exception passing the exception identification. + + @Param[in] h_App - User's application descriptor. + @Param[in] exception - The exception. +*//***************************************************************************/ +typedef void (t_QmExceptionsCallback) ( t_Handle h_App, + e_QmExceptions exception); + +/**************************************************************************//** + @Description Frame's Type to poll +*//***************************************************************************/ +typedef enum e_QmPortalPollSource { + e_QM_PORTAL_POLL_SOURCE_DATA_FRAMES = 0, /**< Poll only data frames */ + e_QM_PORTAL_POLL_SOURCE_CONTROL_FRAMES, /**< Poll only control frames */ + e_QM_PORTAL_POLL_SOURCE_BOTH /**< Poll both */ +} e_QmPortalPollSource; + +/**************************************************************************//** + @Description structure representing QM contextA of FQ initialization parameters + Note that this is only "space-holder" for the Context-A. The "real" + Context-A is described in each specific driver (E.g. FM driver + has its own Context-A API). +*//***************************************************************************/ +typedef struct { + uint32_t res[2]; /**< reserved size for context-a */ +} t_QmContextA; + +/**************************************************************************//** + @Description structure representing QM contextB of FQ initialization parameters + Note that this is only "space-holder" for the Context-B. The "real" + Context-B is described in each specific driver (E.g. FM driver + has its own Context-B API). +*//***************************************************************************/ +typedef uint32_t t_QmContextB; + +/**************************************************************************//** + @Description structure representing QM initialization parameters +*//***************************************************************************/ +typedef struct { + uint8_t guestId; /**< QM Partition Id */ + + uintptr_t baseAddress; /**< Qm base address (virtual) + NOTE: this parameter relevant only for BM in master mode ('guestId'=NCSW_MASTER_ID). */ + uintptr_t swPortalsBaseAddress; /**< QM Software Portals Base Address (virtual) */ + uint16_t liodn; /**< This value is attached to every transaction initiated by QMan when accessing its private data structures */ + uint32_t totalNumOfFqids; /**< Total number of frame-queue-ids in the system */ + uint32_t fqdMemPartitionId; /**< FQD's mem partition id; + NOTE: The memory partition must be non-cacheable and no-coherent area. */ + uint32_t pfdrMemPartitionId; /**< PFDR's mem partition id; + NOTE: The memory partition must be non-cacheable and no-coherent area. */ + t_QmExceptionsCallback *f_Exception; /**< An application callback routine to handle exceptions.*/ + t_Handle h_App; /**< A handle to an application layer object; This handle will + be passed by the driver upon calling the above callbacks */ + uintptr_t errIrq; /**< error interrupt line; NO_IRQ if interrupts not used */ + uint32_t partFqidBase; /**< The first frame-queue-id dedicated to this partition. + NOTE: this parameter relevant only when working with multiple partitions. */ + uint32_t partNumOfFqids; /**< Number of frame-queue-ids dedicated to this partition. + NOTE: this parameter relevant only when working with multiple partitions. */ + uint16_t partCgsBase; /**< The first cgr dedicated to this partition. + NOTE: this parameter relevant only when working with multiple partitions. */ + uint16_t partNumOfCgs; /**< Number of cgr's dedicated to this partition. + NOTE: this parameter relevant only when working with multiple partitions. */ +} t_QmParam; + + +/**************************************************************************//** + @Function QM_Config + + @Description Creates descriptor for the QM module. + + The routine returns a handle (descriptor) to the QM object. + This descriptor must be passed as first parameter to all other + QM function calls. + + No actual initialization or configuration of QM hardware is + done by this routine. + + @Param[in] p_QmParam - Pointer to data structure of parameters + + @Retval Handle to the QM object, or NULL for Failure. +*//***************************************************************************/ +t_Handle QM_Config(t_QmParam *p_QmParam); + +/**************************************************************************//** + @Function QM_Init + + @Description Initializes the QM module + + @Param[in] h_Qm - A handle to the QM module + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error QM_Init(t_Handle h_Qm); + +/**************************************************************************//** + @Function QM_Free + + @Description Frees all resources that were assigned to the QM module. + + Calling this routine invalidates the descriptor. + + @Param[in] h_Qm - A handle to the QM module + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error QM_Free(t_Handle h_Qm); + + +/**************************************************************************//** + @Group QM_advanced_init_grp QM (common) Advanced Configuration Unit + + @Description Configuration functions used to change default values. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description structure for defining DC portal ERN destination +*//***************************************************************************/ +typedef struct t_QmDcPortalParams { + bool sendToSw; + e_DpaaSwPortal swPortalId; +} t_QmDcPortalParams; + + +/**************************************************************************//** + @Function QM_ConfigRTFramesDepth + + @Description Change the run-time frames depth (i.e. the maximum total number + of frames that may be inside QM at a certain time) from its default + configuration [30000]. + + @Param[in] h_Qm - A handle to the QM module + @Param[in] rtFramesDepth - run-time max num of frames. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_Config() and before QM_Init(). +*//***************************************************************************/ +t_Error QM_ConfigRTFramesDepth(t_Handle h_Qm, uint32_t rtFramesDepth); + +/**************************************************************************//** + @Function QM_ConfigPfdrThreshold + + @Description Change the pfdr threshold from its default + configuration [0]. + An interrupt if enables is asserted when the number of PFDRs is below this threshold. + + @Param[in] h_Qm - A handle to the QM module + @Param[in] threshold - threshold value. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_Config() and before QM_Init(). +*//***************************************************************************/ +t_Error QM_ConfigPfdrThreshold(t_Handle h_Qm, uint32_t threshold); + +/**************************************************************************//** + @Function QM_ConfigSfdrReservationThreshold + + @Description Change the sfdr threshold from its default + configuration [0]. + + @Param[in] h_Qm - A handle to the QM module + @Param[in] threshold - threshold value. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_Config() and before QM_Init(). +*//***************************************************************************/ +t_Error QM_ConfigSfdrReservationThreshold(t_Handle h_Qm, uint32_t threshold); + +/**************************************************************************//** + @Function QM_ConfigErrorRejectionNotificationDest + + @Description Change the destination of rejected frames for DC portals. + By default, depending on chip, some DC portals are set to reject + frames to HW and some to SW. + + @Param[in] h_Qm - A handle to the QM module + @Param[in] id - DC Portal id. + @Param[in] p_Params - Destination parameters. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_Config() and before QM_Init(). +*//***************************************************************************/ +t_Error QM_ConfigErrorRejectionNotificationDest(t_Handle h_Qm, e_DpaaDcPortal id, t_QmDcPortalParams *p_Params); + +/** @} */ /* end of QM_advanced_init_grp group */ +/** @} */ /* end of QM_init_grp group */ + + +/**************************************************************************//** + @Group QM_runtime_control_grp QM (common) Runtime Control Unit + + @Description QM (common) Runtime control unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description enum for defining QM counters +*//***************************************************************************/ +typedef enum e_QmCounters { + e_QM_COUNTERS_SFDR_IN_USE = 0, /**< Total Single Frame Descriptor Record (SFDR) currently in use */ + e_QM_COUNTERS_PFDR_IN_USE, /**< Total Packed Frame Descriptor Record (PFDR) currently in use */ + e_QM_COUNTERS_PFDR_FREE_POOL /**< Total Packed Frame Descriptor Record (PFDR) Free Pool Count in external memory */ +} e_QmCounters; + +/**************************************************************************//** + @Description structure for returning revision information +*//***************************************************************************/ +typedef struct t_QmRevisionInfo { + uint8_t majorRev; /**< Major revision */ + uint8_t minorRev; /**< Minor revision */ +} t_QmRevisionInfo; + +/**************************************************************************//** + @Description structure representing QM FQ-Range reservation parameters +*//***************************************************************************/ +typedef struct t_QmRsrvFqrParams { + bool useForce; /**< TRUE - force reservation of specific fqids; + FALSE - reserve several fqids */ + uint32_t numOfFqids; /**< number of fqids to be reserved. */ + union{ + struct { + uint32_t align; /**< alignment. will be used if useForce=FALSE */ + } nonFrcQs; + struct { + uint32_t fqid; /**< the fqid base of the forced fqids. will be used if useForce=TRUE */ + } frcQ; + } qs; +} t_QmRsrvFqrParams; + +/**************************************************************************//** + @Description structure representing QM Error information +*//***************************************************************************/ +typedef struct t_QmErrorInfo { + bool portalValid; + bool hwPortal; + e_DpaaSwPortal swPortalId; /**< Sw Portal id */ + e_DpaaDcPortal dcpId; /**< Dcp (hw Portal) id */ + bool fqidValid; + uint32_t fqid; +} t_QmErrorInfo; + + +/**************************************************************************//** + @Function QM_ReserveQueues + + @Description Request to Reserved queues for future use. + + @Param[in] h_Qm - A handle to the QM Module. + @Param[in] p_QmFqrParams - A structure of parameters for defining the + desired queues parameters. + @Param[out] p_BaseFqid - base-fqid on success; '0' code otherwise. + + @Return E_OK on success; + + @Cautions Allowed only after QM_Init(). +*//***************************************************************************/ +t_Error QM_ReserveQueues(t_Handle h_Qm, t_QmRsrvFqrParams *p_QmFqrParams, uint32_t *p_BaseFqid); + +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) +/**************************************************************************//** + @Function QM_DumpRegs + + @Description Dumps all QM registers + + @Param[in] h_Qm - A handle to the QM Module. + + @Return E_OK on success; + + @Cautions Allowed only after QM_Init(). +*//***************************************************************************/ +t_Error QM_DumpRegs(t_Handle h_Qm); +#endif /* (defined(DEBUG_ERRORS) && ... */ + +/**************************************************************************//** + @Function QM_SetException + + @Description Calling this routine enables/disables the specified exception. + + @Param[in] h_Qm - A handle to the QM Module. + @Param[in] exception - The exception to be selected. + @Param[in] enable - TRUE to enable interrupt, FALSE to mask it. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error QM_SetException(t_Handle h_Qm, e_QmExceptions exception, bool enable); + +/**************************************************************************//** + @Function QM_ErrorIsr + + @Description QM interrupt-service-routine for errors. + + @Param[in] h_Qm - A handle to the QM module + + @Cautions Allowed only following QM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +void QM_ErrorIsr(t_Handle h_Qm); + +/**************************************************************************//** + @Function QM_GetErrorInformation + + @Description Reads the last error information. + + @Param[in] h_Qm - A handle to the QM Module. + @Param[out] p_errInfo - the information will be loaded to this struct. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_Init(). + This routine should NOT be called from guest-partition + (i.e. guestId != NCSW_MASTER_ID) +*//***************************************************************************/ +t_Error QM_GetErrorInformation(t_Handle h_Qm, t_QmErrorInfo *p_errInfo); + +/**************************************************************************//** + @Function QM_GetCounter + + @Description Reads one of the QM counters. + + @Param[in] h_Qm - A handle to the QM Module. + @Param[in] counter - The requested counter. + + @Return Counter's current value. + + @Cautions Allowed only following QM_Init(). +*//***************************************************************************/ +uint32_t QM_GetCounter(t_Handle h_Qm, e_QmCounters counter); + +/**************************************************************************//** + @Function QM_GetRevision + + @Description Returns the QM revision + + @Param[in] h_Qm A handle to a QM Module. + @Param[out] p_QmRevisionInfo A structure of revision information parameters. + + @Return None. + + @Cautions Allowed only following QM_Init(). +*//***************************************************************************/ +t_Error QM_GetRevision(t_Handle h_Qm, t_QmRevisionInfo *p_QmRevisionInfo); + +/** @} */ /* end of QM_runtime_control_grp group */ + + +/**************************************************************************//** + @Group QM_runtime_data_grp QM (common) Runtime Data Unit + + @Description QM (common) Runtime data unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function QM_Poll + + @Description Poll frames from QM. + + @Param[in] h_Qm - A handle to the QM module + @Param[in] source - The selected frames type to poll + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_Init(). +*//***************************************************************************/ +t_Error QM_Poll(t_Handle h_Qm, e_QmPortalPollSource source); + +/** @} */ /* end of QM_runtime_data_grp group */ +/** @} */ /* end of QM_lib_grp group */ + + +/**************************************************************************//** + @Group QM_portal_grp QM-Portal API + + @Description QM common API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group QM_portal_init_grp QM-Portal Initialization Unit + + @Description QM-Portal Initialization Unit + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description structure representing QM-Portal Stash parameters +*//***************************************************************************/ +typedef struct { + uint8_t stashDestQueue; /**< This value is used to direct all stashing transactions initiated on behalf of this software portal + to the specific Stashing Request Queues (SRQ) */ + uint8_t eqcr; /**< If 0, disabled. If 1, for every EQCR entry consumed by QMan a new stash transaction is performed. + If 2-7, after 2-7 EQCR entries being consumed by QMAN a new stash transaction is performed. */ + bool eqcrHighPri; /**< EQCR entry stash transactions for this software portal will be signaled with higher priority. */ + bool dqrr; /**< DQRR entry stash enable/disable */ + uint16_t dqrrLiodn; /**< This value is attached to every transaction initiated by QMan when performing DQRR entry or EQCR_CI stashing + on behalf of this software portal */ + bool dqrrHighPri; /**< DQRR entry stash transactions for this software portal will be signaled with higher priority. */ + bool fdFq; /**< Dequeued Frame Data, Annotation, and FQ Context Stashing enable/disable */ + uint16_t fdFqLiodn; /**< This value is attached to every transaction initiated by QMan when performing dequeued frame data and + annotation stashing, or FQ context stashing on behalf of this software portal */ + bool fdFqHighPri; /**< Dequeued frame data, annotation, and FQ context stash transactions for this software portal will be signaled + with higher priority. */ + bool fdFqDrop; /**< If True, Dequeued frame data, annotation, and FQ context stash transactions for this software portal will be dropped + by QMan if the target SRQ is almost full, to prevent QMan sequencer stalling. Stash transactions that are + dropped will result in a fetch from main memory when a core reads the addressed coherency granule. + If FALSE, Dequeued frame data, annotation, and FQ context stash transactions for this software portal will never be + dropped by QMan. If the target SRQ is full a sequencer will stall until each stash transaction can be completed. */ +} t_QmPortalStashParam; + +/**************************************************************************//** + @Description structure representing QM-Portal initialization parameters +*//***************************************************************************/ +typedef struct { + uintptr_t ceBaseAddress; /**< Cache-enabled base address (virtual) */ + uintptr_t ciBaseAddress; /**< Cache-inhibited base address (virtual) */ + t_Handle h_Qm; /**< Qm Handle */ + e_DpaaSwPortal swPortalId; /**< Portal id */ + uintptr_t irq; /**< portal interrupt line; used only if useIrq set to TRUE */ + uint16_t fdLiodnOffset; /**< liodn to be used for all frames enqueued via this software portal */ + t_QmReceivedFrameCallback *f_DfltFrame; /**< this callback will be called unless specific callback assigned to the FQ*/ + t_QmRejectedFrameCallback *f_RejectedFrame; /**< this callback will be called for rejected frames. */ + t_Handle h_App; /**< a handle to the upper layer; It will be passed by the driver upon calling the CB */ +} t_QmPortalParam; + + +/**************************************************************************//** + @Function QM_PORTAL_Config + + @Description Creates descriptor for a QM-Portal module. + + The routine returns a handle (descriptor) to a QM-Portal object. + This descriptor must be passed as first parameter to all other + QM-Portal function calls. + + No actual initialization or configuration of QM-Portal hardware is + done by this routine. + + @Param[in] p_QmPortalParam - Pointer to data structure of parameters + + @Retval Handle to a QM-Portal object, or NULL for Failure. +*//***************************************************************************/ +t_Handle QM_PORTAL_Config(t_QmPortalParam *p_QmPortalParam); + +/**************************************************************************//** + @Function QM_PORTAL_Init + + @Description Initializes a QM-Portal module + + @Param[in] h_QmPortal - A handle to a QM-Portal module + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error QM_PORTAL_Init(t_Handle h_QmPortal); + +/**************************************************************************//** + @Function QM_PORTAL_Free + + @Description Frees all resources that were assigned to a QM-Portal module. + + Calling this routine invalidates the descriptor. + + @Param[in] h_QmPortal - A handle to a QM-Portal module + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error QM_PORTAL_Free(t_Handle h_QmPortal); + +/**************************************************************************//** + @Group QM_portal_advanced_init_grp QM-Portal Advanced Configuration Unit + + @Description Configuration functions used to change default values. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function QM_PORTAL_ConfigDcaMode + + @Description Change the Discrate Consumption Acknowledge mode + from its default configuration [FALSE]. + + @Param[in] h_QmPortal - A handle to a QM-Portal module + @Param[in] enable - Enable/Disable DCA mode + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_PORTAL_Config() and before QM_PORTAL_Init(). +*//***************************************************************************/ +t_Error QM_PORTAL_ConfigDcaMode(t_Handle h_QmPortal, bool enable); + +/**************************************************************************//** + @Function QM_PORTAL_ConfigStash + + @Description Config the portal to active stash mode. + + @Param[in] h_QmPortal - A handle to a QM-Portal module + @Param[in] p_StashParams - Pointer to data structure of parameters + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_PORTAL_Config() and before QM_PORTAL_Init(). +*//***************************************************************************/ +t_Error QM_PORTAL_ConfigStash(t_Handle h_QmPortal, t_QmPortalStashParam *p_StashParams); + + +/**************************************************************************//** + @Function QM_PORTAL_ConfigPullMode + + @Description Change the Pull Mode from its default configuration [FALSE]. + + @Param[in] h_QmPortal - A handle to a QM-Portal module + @Param[in] pullMode - When TRUE, the Portal will work in pull mode. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_PORTAL_Config() and before QM_PORTAL_Init(). +*//***************************************************************************/ +t_Error QM_PORTAL_ConfigPullMode(t_Handle h_QmPortal, bool pullMode); + +/** @} */ /* end of QM_portal_advanced_init_grp group */ +/** @} */ /* end of QM_portal_init_grp group */ + + +/**************************************************************************//** + @Group QM_portal_runtime_control_grp QM-Portal Runtime Control Unit + + @Description QM-Portal Runtime control unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function QM_PORTAL_AddPoolChannel + + @Description Adding the pool channel to the SW-Portal's scheduler. + the sw-portal will get frames that came from the pool channel. + + @Param[in] h_QmPortal - A handle to a QM-Portal module + @Param[in] poolChannelId - Pool channel id. must between '0' to QM_MAX_NUM_OF_POOL_CHANNELS + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_PORTAL_Init(). +*//***************************************************************************/ +t_Error QM_PORTAL_AddPoolChannel(t_Handle h_QmPortal, uint8_t poolChannelId); + +/** @} */ /* end of QM_portal_runtime_control_grp group */ + + +/**************************************************************************//** + @Group QM_portal_runtime_data_grp QM-Portal Runtime Data Unit + + @Description QM-Portal Runtime data unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description structure representing QM Portal Frame Info +*//***************************************************************************/ +typedef struct t_QmPortalFrameInfo { + t_Handle h_App; + t_Handle h_QmFqr; + uint32_t fqidOffset; + t_DpaaFD frame; +} t_QmPortalFrameInfo; + +/**************************************************************************//** + @Function QM_PORTAL_Poll + + @Description Poll frames from the specified sw-portal. + + @Param[in] h_QmPortal - A handle to a QM-Portal module + @Param[in] source - The selected frames type to poll + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_PORTAL_Init(). +*//***************************************************************************/ +t_Error QM_PORTAL_Poll(t_Handle h_QmPortal, e_QmPortalPollSource source); + +/**************************************************************************//** + @Function QM_PORTAL_PollFrame + + @Description Poll frames from the specified sw-portal. will poll only data frames + + @Param[in] h_QmPortal - A handle to a QM-Portal module + @Param[out] p_frameInfo - A structure to hold the dequeued frame information + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_PORTAL_Init(). +*//***************************************************************************/ +t_Error QM_PORTAL_PollFrame(t_Handle h_QmPortal, t_QmPortalFrameInfo *p_frameInfo); + + +/** @} */ /* end of QM_portal_runtime_data_grp group */ +/** @} */ /* end of QM_portal_grp group */ + + +/**************************************************************************//** + @Group QM_fqr_grp QM Frame-Queue-Range API + + @Description QM-FQR API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group QM_fqr_init_grp QM-FQR Initialization Unit + + @Description QM-FQR Initialization Unit + + @{ +*//***************************************************************************/ + + +/**************************************************************************//** + @Description structure representing QM FQ-Range congestion group parameters +*//***************************************************************************/ +typedef struct { + t_Handle h_QmCg; /**< A handle to the congestion group. */ + int8_t overheadAccountingLength; /**< For each frame add this number for CG calculation + (may be negative), if 0 - disable feature */ + uint32_t fqTailDropThreshold; /**< if not "0" - enable tail drop on this FQR */ +} t_QmFqrCongestionAvoidanceParams; + +/**************************************************************************//** + @Description structure representing QM FQ-Range initialization parameters +*//***************************************************************************/ +typedef struct { + t_Handle h_Qm; /**< A handle to a QM module */ + t_Handle h_QmPortal; /**< A handle to a QM Portal Module; + will be used only for Init and Free routines; + NOTE : if NULL, assuming affinity */ + bool initParked; /**< This FQ-Range will be initialize in park state (un-schedule) */ + bool holdActive; /**< This FQ-Range can be parked (un-schedule); + This affects only on queues destined to software portals*/ + bool preferInCache; /**< Prefer this FQ-Range to be in QMAN's internal cache for all states */ + bool useContextAForStash;/**< This FQ-Range will use context A for stash */ + union { + struct { + uint8_t frameAnnotationSize;/**< Size of Frame Annotation to be stashed */ + uint8_t frameDataSize; /**< Size of Frame Data to be stashed. */ + uint8_t fqContextSize; /**< Size of FQ context to be stashed. */ + uint64_t fqContextAddr; /**< 40 bit memory address containing the FQ context information to be stashed; + Must be cacheline-aligned */ + } stashingParams; + t_QmContextA *p_ContextA; /**< context-A field to be written in the FQ structure */ + }; + t_QmContextB *p_ContextB; /**< context-B field to be written in the FQ structure; + Note that this field may be used for Tx queues only! */ + e_QmFQChannel channel; /**< Qm Channel */ + uint8_t wq; /**< Work queue within the channel */ + bool shadowMode; /**< If TRUE, useForce MUST set to TRUE and numOfFqids MUST set to '1' */ + uint32_t numOfFqids; /**< number of fqids to be allocated*/ + bool useForce; /**< TRUE - force allocation of specific fqids; + FALSE - allocate several fqids */ + union{ + struct { + uint32_t align; /**< alignment. will be used if useForce=FALSE */ + } nonFrcQs; + struct { + uint32_t fqid; /**< the fqid base of the forced fqids. will be used if useForce=TRUE */ + } frcQ; + } qs; + bool congestionAvoidanceEnable; + /**< TRUE to enable congestion avoidance mechanism */ + t_QmFqrCongestionAvoidanceParams congestionAvoidanceParams; + /**< Parameters for congestion avoidance */ +} t_QmFqrParams; + + +/**************************************************************************//** + @Function QM_FQR_Create + + @Description Initializing and enabling a Frame-Queue-Range. + This routine should be called for adding an FQR. + + @Param[in] p_QmFqrParams - A structure of parameters for defining the + desired queues parameters. + + @Return A handle to the initialized FQR on success; NULL code otherwise. + + @Cautions Allowed only following QM_Init(). +*//***************************************************************************/ +t_Handle QM_FQR_Create(t_QmFqrParams *p_QmFqrParams); + +/**************************************************************************//** + @Function QM_FQR_Free + + @Description Deleting and free all resources of an initialized FQR. + + @Param[in] h_QmFqr - A handle to a QM-FQR Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_Init() and QM_FQR_Create() for this FQR. +*//***************************************************************************/ +t_Error QM_FQR_Free(t_Handle h_QmFqr); + +/**************************************************************************//** + @Function QM_FQR_FreeWDrain + + @Description Deleting and free all resources of an initialized FQR + with the option of draining. + + @Param[in] h_QmFqr - A handle to a QM-FQR Module. + @Param[in] f_CompletionCB - Pointer to a completion callback to be used in non-blocking mode. + @Param[in] deliverFrame - TRUE for deliver the drained frames to the user; + FALSE for not deliver the frames. + @Param[in] f_CallBack - Pointer to a callback to handle the delivered frames. + @Param[in] h_App - User's application descriptor. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_Init() and QM_FQR_Create() for this FQR. +*//***************************************************************************/ +t_Error QM_FQR_FreeWDrain(t_Handle h_QmFqr, + t_QmFqrDrainedCompletionCB *f_CompletionCB, + bool deliverFrame, + t_QmReceivedFrameCallback *f_CallBack, + t_Handle h_App); + +/** @} */ /* end of QM_fqr_init_grp group */ + + +/**************************************************************************//** + @Group QM_fqr_runtime_control_grp QM-FQR Runtime Control Unit + + @Description QM-FQR Runtime control unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description enum for defining QM-FQR counters +*//***************************************************************************/ +typedef enum e_QmFqrCounters { + e_QM_FQR_COUNTERS_FRAME = 0, /**< Total number of frames on this frame queue */ + e_QM_FQR_COUNTERS_BYTE /**< Total number of bytes in all frames on this frame queue */ +} e_QmFqrCounters; + +/**************************************************************************//** + @Function QM_FQR_RegisterCB + + @Description Register a callback routine to be called when a frame comes from this FQ-Range + + @Param[in] h_QmFqr - A handle to a QM-FQR Module. + @Param[in] f_CallBack - An application callback + @Param[in] h_App - User's application descriptor + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_FQR_Create(). +*//***************************************************************************/ +t_Error QM_FQR_RegisterCB(t_Handle h_QmFqr, t_QmReceivedFrameCallback *f_CallBack, t_Handle h_App); + +/**************************************************************************//** + @Function QM_FQR_Resume + + @Description Request to Re-Schedule this Fqid. + + @Param[in] h_QmFqr - A handle to a QM-FQR Module. + @Param[in] h_QmPortal - A handle to a QM Portal Module; + NOTE : if NULL, assuming affinity. + @Param[in] fqidOffset - Fqid offset within the FQ-Range. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_FQR_Create(). +*//***************************************************************************/ +t_Error QM_FQR_Resume(t_Handle h_QmFqr, t_Handle h_QmPortal, uint32_t fqidOffset); + +/**************************************************************************//** + @Function QM_FQR_Suspend + + @Description Request to Un-Schedule this Fqid. + + @Param[in] h_QmFqr - A handle to a QM-FQR Module. + @Param[in] h_QmPortal - A handle to a QM Portal Module; + NOTE : if NULL, assuming affinity. + @Param[in] fqidOffset - Fqid offset within the FQ-Range. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_FQR_Create(). +*//***************************************************************************/ +t_Error QM_FQR_Suspend(t_Handle h_QmFqr, t_Handle h_QmPortal, uint32_t fqidOffset); + +/**************************************************************************//** + @Function QM_FQR_GetFqid + + @Description Returned the Fqid base of the FQ-Range + + @Param[in] h_QmFqr - A handle to a QM-FQR Module. + + @Return Fqid base. + + @Cautions Allowed only following QM_FQR_Create(). +*//***************************************************************************/ +uint32_t QM_FQR_GetFqid(t_Handle h_QmFqr); + +/**************************************************************************//** + @Function QM_FQR_GetCounter + + @Description Reads one of the QM-FQR counters. + + @Param[in] h_QmFqr - A handle to a QM-FQR Module. + @Param[in] h_QmPortal - A handle to a QM Portal Module; + NOTE : if NULL, assuming affinity. + @Param[in] fqidOffset - Fqid offset within the FQ-Range. + @Param[in] counter - The requested counter. + + @Return Counter's current value. + + @Cautions Allowed only following QM_FQR_Create(). +*//***************************************************************************/ +uint32_t QM_FQR_GetCounter(t_Handle h_QmFqr, t_Handle h_QmPortal, uint32_t fqidOffset, e_QmFqrCounters counter); + +/** @} */ /* end of QM_fqr_runtime_control_grp group */ + + +/**************************************************************************//** + @Group QM_fqr_runtime_data_grp QM-FQR Runtime Data Unit + + @Description QM-FQR Runtime data unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function QM_FQR_Enqueue + + @Description Enqueue the frame into the FQ to be transmitted. + + @Param[in] h_QmFqr - A handle to a QM-FQR Module. + @Param[in] h_QmPortal - A handle to a QM Portal Module; + NOTE : if NULL, assuming affinity. + @Param[in] fqidOffset - Fqid offset within the FQ-Range. + @Param[in] p_Frame - Pointer to the frame to be enqueued. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_FQR_Create(). +*//***************************************************************************/ +t_Error QM_FQR_Enqueue(t_Handle h_QmFqr, t_Handle h_QmPortal, uint32_t fqidOffset, t_DpaaFD *p_Frame); + +/**************************************************************************//** + @Function QM_FQR_PullFrame + + @Description Perform a Pull command. + + @Param[in] h_QmFqr - A handle to a QM-FQR Module. + @Param[in] h_QmPortal - A handle to a QM Portal Module; + NOTE : if NULL, assuming affinity. + @Param[in] fqidOffset - Fqid offset within the FQ-Range. + @Param[out] p_Frame - The Received Frame + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_PORTAL_Init(). +*//***************************************************************************/ +t_Error QM_FQR_PullFrame(t_Handle h_QmFqr, t_Handle h_QmPortal, uint32_t fqidOffset, t_DpaaFD *p_Frame); + + +/** @} */ /* end of QM_fqr_runtime_data_grp group */ +/** @} */ /* end of QM_fqr_grp group */ + + +/**************************************************************************//** + @Group QM_cg_grp QM Congestion Group API + + @Description QM-CG API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group QM_cg_init_grp QM-Congestion Group Initialization Unit + + @Description QM-CG Initialization Unit + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description structure representing QM CG WRED curve +*//***************************************************************************/ +typedef struct t_QmCgWredCurve { + uint32_t maxTh; /**< minimum threshold - below this level + all packets are rejected (approximated + to be expressed as x*2^y due to HW + implementation)*/ + uint32_t minTh; /**< minimum threshold - below this level + all packets are accepted (approximated + due to HW implementation)*/ + uint8_t probabilityDenominator; /**< 1-64, the fraction of packets dropped + when the average queue depth is at the + maximum threshold.(approximated due to HW + implementation). */ +} t_QmCgWredCurve; + +/**************************************************************************//** + @Description structure representing QM CG WRED parameters +*//***************************************************************************/ +typedef struct t_QmCgWredParams { + bool enableGreen; + t_QmCgWredCurve greenCurve; + bool enableYellow; + t_QmCgWredCurve yellowCurve; + bool enableRed; + t_QmCgWredCurve redCurve; +} t_QmCgWredParams; + +/**************************************************************************//** + @Description structure representing QM CG configuration parameters +*//***************************************************************************/ +typedef struct t_QmCgParams { + t_Handle h_Qm; /**< A handle to a QM module */ + t_Handle h_QmPortal; /**< A handle to a QM Portal Module; + will be used for Init, Free and as + an interrupt destination for cg state + change (if CgStateChangeEnable = TRUE) */ + bool frameCount; /**< TRUE for frame count, FALSE - byte count */ + bool wredEnable; /**< if TRUE - WRED enabled. Each color is enabled independently + so that some colors may use WRED, but others may use + Tail drop - if enabled, or none. */ + t_QmCgWredParams wredParams; /**< WRED parameters, relevant if wredEnable = TRUE*/ + bool tailDropEnable; /**< if TRUE - Tail drop enabled */ + uint32_t threshold; /**< If Tail drop - used as Tail drop threshold, otherwise + 'threshold' may still be used to receive notifications + when threshold is passed. If threshold and f_Exception + are set, interrupts are set defaultly by driver. */ + bool notifyDcPortal; /**< Relevant if this CG receives enqueues from a direct portal + e_DPAA_DCPORTAL0 or e_DPAA_DCPORTAL1. TRUE to notify + the DC portal, FALSE to notify this SW portal. */ + e_DpaaDcPortal dcPortalId; /**< relevant if notifyDcPortal=TRUE - DC Portal id */ + t_QmExceptionsCallback *f_Exception; /**< relevant and mandatory if threshold is configured and + notifyDcPortal = FALSE. If threshold and f_Exception + are set, interrupts are set defaultly by driver */ + t_Handle h_App; /**< A handle to the application layer, will be passed as + argument to f_Exception */ +} t_QmCgParams; + + +/**************************************************************************//** + @Function QM_CG_Create + + @Description Create and configure a congestion Group. + + @Param[in] p_CgParams - CG parameters + + @Return A handle to the CG module + + @Cautions Allowed only following QM_Init(). +*//***************************************************************************/ +t_Handle QM_CG_Create(t_QmCgParams *p_CgParams); + +/**************************************************************************//** + @Function QM_CG_Free + + @Description Deleting and free all resources of an initialized CG. + + @Param[in] h_QmCg - A handle to a QM-CG Module. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_Init() and QM_CR_Create() for this CG. +*//***************************************************************************/ +t_Error QM_CG_Free(t_Handle h_QmCg); + +/** @} */ /* end of QM_cg_init_grp group */ + + +/**************************************************************************//** + @Group QM_cg_runtime_control_grp QM-CG Runtime Control Unit + + @Description QM-CG Runtime control unit API functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description structure representing QM CG WRED colors +*//***************************************************************************/ +typedef enum e_QmCgColor { + e_QM_CG_COLOR_GREEN, + e_QM_CG_COLOR_YELLOW, + e_QM_CG_COLOR_RED +} e_QmCgColor; + +/**************************************************************************//** + @Description structure representing QM CG modification parameters +*//***************************************************************************/ +typedef struct t_QmCgModifyWredParams { + e_QmCgColor color; + bool enable; + t_QmCgWredCurve wredParams; +} t_QmCgModifyWredParams; + + +/**************************************************************************//** + @Function QM_CG_SetException + + @Description Set CG exception. + + @Param[in] h_QmCg - A handle to a QM-CG Module. + @Param[in] exception - exception enum + @Param[in] enable - TRUE to enable, FALSE to disable. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_Init() and QM_CG_Create() for this CG. +*//***************************************************************************/ +t_Error QM_CG_SetException(t_Handle h_QmCg, e_QmExceptions exception, bool enable); + +/**************************************************************************//** + @Function QM_CG_ModifyWredCurve + + @Description Change WRED curve parameters for a selected color. + Note that this routine may be called only for valid CG's that + already have been configured for WRED, and only need a change + in the WRED parameters. + + @Param[in] h_QmCg - A handle to a QM-CG Module. + @Param[in] p_QmCgModifyParams - A structure of new WRED parameters. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_Init() and QM_CG_Create() for this CG. +*//***************************************************************************/ +t_Error QM_CG_ModifyWredCurve(t_Handle h_QmCg, t_QmCgModifyWredParams *p_QmCgModifyParams); + +/**************************************************************************//** + @Function QM_CG_ModifyTailDropThreshold + + @Description Change WRED curve parameters for a selected color. + Note that this routine may be called only for valid CG's that + already have been configured for tail drop, and only need a change + in the threshold value. + + @Param[in] h_QmCg - A handle to a QM-CG Module. + @Param[in] threshold - New threshold. + + @Return E_OK on success; Error code otherwise. + + @Cautions Allowed only following QM_Init() and QM_CG_Create() for this CG. +*//***************************************************************************/ +t_Error QM_CG_ModifyTailDropThreshold(t_Handle h_QmCg, uint32_t threshold); + + +/** @} */ /* end of QM_cg_runtime_control_grp group */ +/** @} */ /* end of QM_cg_grp group */ +/** @} */ /* end of QM_grp group */ + + +#endif /* __QM_EXT_H */ diff --git a/sys/contrib/ncsw/inc/core_ext.h b/sys/contrib/ncsw/inc/core_ext.h new file mode 100644 index 000000000000..ec89a6dde4cd --- /dev/null +++ b/sys/contrib/ncsw/inc/core_ext.h @@ -0,0 +1,90 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File core_ext.h + + @Description Generic interface to basic core operations. + + The system integrator must ensure that this interface is + mapped to a specific core implementation, by including the + appropriate header file. +*//***************************************************************************/ +#ifndef __CORE_EXT_H +#define __CORE_EXT_H + +#ifdef CONFIG_FMAN_ARM +#include "arm_ext.h" +#include <linux/smp.h> +#else +#ifdef NCSW_PPC_CORE +#include "ppc_ext.h" +#elif defined(NCSW_VXWORKS) +#include "core_vxw_ext.h" +#else +#error "Core is not defined!" +#endif /* NCSW_CORE */ + +#if (!defined(CORE_IS_LITTLE_ENDIAN) && !defined(CORE_IS_BIG_ENDIAN)) +#error "Must define core as little-endian or big-endian!" +#endif /* (!defined(CORE_IS_LITTLE_ENDIAN) && ... */ + +#ifndef CORE_CACHELINE_SIZE +#error "Must define the core cache-line size!" +#endif /* !CORE_CACHELINE_SIZE */ + +#endif /* CONFIG_FMAN_ARM */ + + +/**************************************************************************//** + @Function CORE_GetId + + @Description Returns the core ID in the system. + + @Return Core ID. +*//***************************************************************************/ +uint32_t CORE_GetId(void); + +/**************************************************************************//** + @Function CORE_MemoryBarrier + + @Description This routine will cause the core to stop executing any commands + until all previous memory read/write commands are completely out + of the core's pipeline. + + @Return None. +*//***************************************************************************/ +void CORE_MemoryBarrier(void); +#define fsl_mem_core_barrier() CORE_MemoryBarrier() + +#endif /* __CORE_EXT_H */ diff --git a/sys/contrib/ncsw/inc/cores/arm_ext.h b/sys/contrib/ncsw/inc/cores/arm_ext.h new file mode 100644 index 000000000000..e63444a7d676 --- /dev/null +++ b/sys/contrib/ncsw/inc/cores/arm_ext.h @@ -0,0 +1,55 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File arm_ext.h + + @Description Core API for ARM cores + + These routines must be implemented by each specific PowerPC + core driver. +*//***************************************************************************/ +#ifndef __ARM_EXT_H +#define __ARM_EXT_H + +#include "part_ext.h" + + +#define CORE_IS_LITTLE_ENDIAN + +static __inline__ void CORE_MemoryBarrier(void) +{ + mb(); +} + +#endif /* __PPC_EXT_H */ diff --git a/sys/contrib/ncsw/inc/cores/e500v2_ext.h b/sys/contrib/ncsw/inc/cores/e500v2_ext.h new file mode 100644 index 000000000000..e79b1ddff121 --- /dev/null +++ b/sys/contrib/ncsw/inc/cores/e500v2_ext.h @@ -0,0 +1,476 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File e500v2_ext.h + + @Description E500 external definitions prototypes + This file is not included by the E500 + source file as it is an assembly file. It is used + only for prototypes exposure, for inclusion + by user and other modules. +*//***************************************************************************/ + +#ifndef __E500V2_EXT_H +#define __E500V2_EXT_H + +#include "std_ext.h" + + +/* Layer 1 Cache Manipulations + *============================== + * Should not be called directly by the user. + */ +void L1DCache_Invalidate (void); +void L1ICache_Invalidate(void); +void L1DCache_Enable(void); +void L1ICache_Enable(void); +void L1DCache_Disable(void); +void L1ICache_Disable(void); +void L1DCache_Flush(void); +void L1ICache_Flush(void); +uint32_t L1ICache_IsEnabled(void); +uint32_t L1DCache_IsEnabled(void); +/* + * + */ +uint32_t L1DCache_LineLock(uint32_t addr); +uint32_t L1ICache_LineLock(uint32_t addr); +void L1Cache_BroadCastEnable(void); +void L1Cache_BroadCastDisable(void); + + +#define CORE_DCacheEnable E500_DCacheEnable +#define CORE_ICacheEnable E500_ICacheEnable +#define CORE_DCacheDisable E500_DCacheDisable +#define CORE_ICacheDisable E500_ICacheDisable +#define CORE_GetId E500_GetId +#define CORE_TestAndSet E500_TestAndSet +#define CORE_MemoryBarrier E500_MemoryBarrier +#define CORE_InstructionSync E500_InstructionSync + +#define CORE_SetDozeMode E500_SetDozeMode +#define CORE_SetNapMode E500_SetNapMode +#define CORE_SetSleepMode E500_SetSleepMode +#define CORE_SetJogMode E500_SetJogMode +#define CORE_SetDeepSleepMode E500_SetDeepSleepMode + +#define CORE_RecoverDozeMode E500_RecoverDozeMode +#define CORE_RecoverNapMode E500_RecoverNapMode +#define CORE_RecoverSleepMode E500_RecoverSleepMode +#define CORE_RecoverJogMode E500_RecoverJogMode + +void E500_SetDozeMode(void); +void E500_SetNapMode(void); +void E500_SetSleepMode(void); +void E500_SetJogMode(void); +t_Error E500_SetDeepSleepMode(uint32_t bptrAddress); + +void E500_RecoverDozeMode(void); +void E500_RecoverNapMode(void); +void E500_RecoverSleepMode(void); +void E500_RecoverJogMode(void); + + +/**************************************************************************//** + @Group E500_id E500 Application Programming Interface + + @Description E500 API functions, definitions and enums + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group E500_init_grp E500 Initialization Unit + + @Description E500 initialization unit API functions, definitions and enums + + @{ +*//***************************************************************************/ + + +/**************************************************************************//** + @Function E500_DCacheEnable + + @Description Enables the data cache for memory pages that are + not cache inhibited. + + @Return None. +*//***************************************************************************/ +void E500_DCacheEnable(void); + +/**************************************************************************//** + @Function E500_ICacheEnable + + @Description Enables the instruction cache for memory pages that are + not cache inhibited. + + @Return None. +*//***************************************************************************/ +void E500_ICacheEnable(void); + +/**************************************************************************//** + @Function E500_DCacheDisable + + @Description Disables the data cache. + + @Return None. +*//***************************************************************************/ +void E500_DCacheDisable(void); + +/**************************************************************************//** + @Function E500_ICacheDisable + + @Description Disables the instruction cache. + + @Return None. +*//***************************************************************************/ +void E500_ICacheDisable(void); + +/**************************************************************************//** + @Function E500_DCacheFlush + + @Description Flushes the data cache + + @Return None. +*//***************************************************************************/ +void E500_DCacheFlush(void); + +/**************************************************************************//** + @Function E500_ICacheFlush + + @Description Flushes the instruction cache. + + @Return None. +*//***************************************************************************/ +void E500_ICacheFlush(void); + +/**************************************************************************//** + @Function E500_DCacheSetStashId + + @Description Set Stash Id for data cache + + @Param[in] stashId the stash id to be set. + + @Return None. +*//***************************************************************************/ +void E500_DCacheSetStashId(uint8_t stashId); + +/**************************************************************************//** + @Description E500mc L2 Cache Operation Mode +*//***************************************************************************/ +typedef enum e_E500mcL2CacheMode +{ + e_L2_CACHE_MODE_DATA_ONLY = 0x00000001, /**< Cache data only */ + e_L2_CACHE_MODE_INST_ONLY = 0x00000002, /**< Cache instructions only */ + e_L2_CACHE_MODE_DATA_AND_INST = 0x00000003 /**< Cache data and instructions */ +} e_E500mcL2CacheMode; + +#if defined(CORE_E500MC) || defined(CORE_E5500) +/**************************************************************************//** + @Function E500_L2CacheEnable + + @Description Enables the cache for memory pages that are not cache inhibited. + + @param[in] mode - L2 cache mode: data only, instruction only or instruction and data. + + @Return None. + + @Cautions This routine must be call only ONCE for both caches. I.e. it is + not possible to call this routine for i-cache and than to call + again for d-cache; The second call will override the first one. +*//***************************************************************************/ +void E500_L2CacheEnable(e_E500mcL2CacheMode mode); + +/**************************************************************************//** + @Function E500_L2CacheDisable + + @Description Disables the cache (data instruction or both). + + @Return None. + +*//***************************************************************************/ +void E500_L2CacheDisable(void); + +/**************************************************************************//** + @Function E500_L2CacheFlush + + @Description Flushes the cache. + + @Return None. +*//***************************************************************************/ +void E500_L2CacheFlush(void); + +/**************************************************************************//** + @Function E500_L2SetStashId + + @Description Set Stash Id + + @Param[in] stashId the stash id to be set. + + @Return None. +*//***************************************************************************/ +void E500_L2SetStashId(uint8_t stashId); +#endif /* defined(CORE_E500MC) || defined(CORE_E5500) */ + +#ifdef CORE_E6500 +/**************************************************************************//** + @Function E6500_L2CacheEnable + + @Description Enables the cache for memory pages that are not cache inhibited. + + @param[in] mode - L2 cache mode: support data & instruction only. + + @Return None. + + @Cautions This routine must be call only ONCE for both caches. I.e. it is + not possible to call this routine for i-cache and than to call + again for d-cache; The second call will override the first one. +*//***************************************************************************/ +void E6500_L2CacheEnable(uintptr_t clusterBase); + +/**************************************************************************//** + @Function E6500_L2CacheDisable + + @Description Disables the cache (data instruction or both). + + @Return None. + +*//***************************************************************************/ +void E6500_L2CacheDisable(uintptr_t clusterBase); + +/**************************************************************************//** + @Function E6500_L2CacheFlush + + @Description Flushes the cache. + + @Return None. +*//***************************************************************************/ +void E6500_L2CacheFlush(uintptr_t clusterBase); + +/**************************************************************************//** + @Function E6500_L2SetStashId + + @Description Set Stash Id + + @Param[in] stashId the stash id to be set. + + @Return None. +*//***************************************************************************/ +void E6500_L2SetStashId(uintptr_t clusterBase, uint8_t stashId); + +/**************************************************************************//** + @Function E6500_GetCcsrBase + + @Description Obtain SoC CCSR base address + + @Param[in] None. + + @Return Physical CCSR base address. +*//***************************************************************************/ +physAddress_t E6500_GetCcsrBase(void); +#endif /* CORE_E6500 */ + +/**************************************************************************//** + @Function E500_AddressBusStreamingEnable + + @Description Enables address bus streaming on the CCB. + + This setting, along with the ECM streaming configuration + parameters, enables address bus streaming on the CCB. + + @Return None. +*//***************************************************************************/ +void E500_AddressBusStreamingEnable(void); + +/**************************************************************************//** + @Function E500_AddressBusStreamingDisable + + @Description Disables address bus streaming on the CCB. + + @Return None. +*//***************************************************************************/ +void E500_AddressBusStreamingDisable(void); + +/**************************************************************************//** + @Function E500_AddressBroadcastEnable + + @Description Enables address broadcast. + + The e500 broadcasts cache management instructions (dcbst, dcblc + (CT = 1), icblc (CT = 1), dcbf, dcbi, mbar, msync, tlbsync, icbi) + based on ABE. ABE must be set to allow management of external + L2 caches. + + @Return None. +*//***************************************************************************/ +void E500_AddressBroadcastEnable(void); + +/**************************************************************************//** + @Function E500_AddressBroadcastDisable + + @Description Disables address broadcast. + + The e500 broadcasts cache management instructions (dcbst, dcblc + (CT = 1), icblc (CT = 1), dcbf, dcbi, mbar, msync, tlbsync, icbi) + based on ABE. ABE must be set to allow management of external + L2 caches. + + @Return None. +*//***************************************************************************/ +void E500_AddressBroadcastDisable(void); + +/**************************************************************************//** + @Function E500_IsTaskletSupported + + @Description Checks if tasklets are supported by the e500 interrupt handler. + + @Retval TRUE - Tasklets are supported. + @Retval FALSE - Tasklets are not supported. +*//***************************************************************************/ +bool E500_IsTaskletSupported(void); + +void E500_EnableTimeBase(void); +void E500_DisableTimeBase(void); + +uint64_t E500_GetTimeBaseTime(void); + +void E500_GenericIntrInit(void); + +t_Error E500_SetIntr(int ppcIntrSrc, + void (* Isr)(t_Handle handle), + t_Handle handle); + +t_Error E500_ClearIntr(int ppcIntrSrc); + +/**************************************************************************//** + @Function E500_GenericIntrHandler + + @Description This is the general e500 interrupt handler. + + It is called by the main assembly interrupt handler + when an exception occurs and no other function has been + assigned to this exception. + + @Param intrEntry - (In) The exception interrupt vector entry. +*//***************************************************************************/ +void E500_GenericIntrHandler(uint32_t intrEntry); + +/**************************************************************************//** + @Function CriticalIntr + + @Description This is the specific critical e500 interrupt handler. + + It is called by the main assembly interrupt handler + when an critical interrupt. + + @Param intrEntry - (In) The exception interrupt vector entry. +*//***************************************************************************/ +void CriticalIntr(uint32_t intrEntry); + + +/**************************************************************************//** + @Function E500_GetId + + @Description Returns the core ID in the system. + + @Return Core ID. +*//***************************************************************************/ +uint32_t E500_GetId(void); + +/**************************************************************************//** + @Function E500_TestAndSet + + @Description This routine tries to atomically test-and-set an integer + in memory to a non-zero value. + + The memory will be set only if it is tested as zero, in which + case the routine returns the new non-zero value; otherwise the + routine returns zero. + + @Param[in] p - pointer to a volatile int in memory, on which test-and-set + operation should be made. + + @Retval Zero - Operation failed - memory was already set. + @Retval Non-zero - Operation succeeded - memory has been set. +*//***************************************************************************/ +int E500_TestAndSet(volatile int *p); + +/**************************************************************************//** + @Function E500_MemoryBarrier + + @Description This routine will cause the core to stop executing any commands + until all previous memory read/write commands are completely out + of the core's pipeline. + + @Return None. +*//***************************************************************************/ +static __inline__ void E500_MemoryBarrier(void) +{ +#ifndef CORE_E500V2 + __asm__ ("mbar 1"); +#else /* CORE_E500V2 */ + /**** ERRATA WORK AROUND START ****/ + /* ERRATA num: CPU1 */ + /* Description: "mbar MO = 1" instruction fails to order caching-inhibited + guarded loads and stores. */ + + /* "msync" instruction is used instead */ + + __asm__ ("msync"); + + /**** ERRATA WORK AROUND END ****/ +#endif /* CORE_E500V2 */ +} + +/**************************************************************************//** + @Function E500_InstructionSync + + @Description This routine will cause the core to wait for previous instructions + (including any interrupts they generate) to complete before the + synchronization command executes, which purges all instructions + from the processor's pipeline and refetches the next instruction. + + @Return None. +*//***************************************************************************/ +static __inline__ void E500_InstructionSync(void) +{ + __asm__ ("isync"); +} + + +/** @} */ /* end of E500_init_grp group */ +/** @} */ /* end of E500_grp group */ + + +#endif /* __E500V2_EXT_H */ diff --git a/sys/contrib/ncsw/inc/cores/ppc_ext.h b/sys/contrib/ncsw/inc/cores/ppc_ext.h new file mode 100644 index 000000000000..6639affd4e71 --- /dev/null +++ b/sys/contrib/ncsw/inc/cores/ppc_ext.h @@ -0,0 +1,131 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File ppc_ext.h + + @Description Core API for PowerPC cores + + These routines must be implemented by each specific PowerPC + core driver. +*//***************************************************************************/ +#ifndef __PPC_EXT_H +#define __PPC_EXT_H + +#include "part_ext.h" + + +#define CORE_IS_BIG_ENDIAN + +#if defined(CORE_E300) || defined(CORE_E500V2) +#define CORE_CACHELINE_SIZE 32 +#elif defined(CORE_E500MC) || defined(CORE_E5500) || defined(CORE_E6500) +#define CORE_CACHELINE_SIZE 64 +#else +#error "Core not defined!" +#endif /* defined(CORE_E300) || ... */ + + +/**************************************************************************//** + @Function CORE_TestAndSet + + @Description This routine tries to atomically test-and-set an integer + in memory to a non-zero value. + + The memory will be set only if it is tested as zero, in which + case the routine returns the new non-zero value; otherwise the + routine returns zero. + + @Param[in] p - pointer to a volatile int in memory, on which test-and-set + operation should be made. + + @Retval Zero - Operation failed - memory was already set. + @Retval Non-zero - Operation succeeded - memory has been set. +*//***************************************************************************/ +int CORE_TestAndSet(volatile int *p); + +/**************************************************************************//** + @Function CORE_InstructionSync + + @Description This routine will cause the core to wait for previous instructions + (including any interrupts they generate) to complete before the + synchronization command executes, which purges all instructions + from the processor's pipeline and refetches the next instruction. + + @Return None. +*//***************************************************************************/ +void CORE_InstructionSync(void); + +/**************************************************************************//** + @Function CORE_DCacheEnable + + @Description Enables the data cache for memory pages that are + not cache inhibited. + + @Return None. +*//***************************************************************************/ +void CORE_DCacheEnable(void); + +/**************************************************************************//** + @Function CORE_ICacheEnable + + @Description Enables the instruction cache for memory pages that are + not cache inhibited. + + @Return None. +*//***************************************************************************/ +void CORE_ICacheEnable(void); + +/**************************************************************************//** + @Function CORE_DCacheDisable + + @Description Disables the data cache. + + @Return None. +*//***************************************************************************/ +void CORE_DCacheDisable(void); + +/**************************************************************************//** + @Function CORE_ICacheDisable + + @Description Disables the instruction cache. + + @Return None. +*//***************************************************************************/ +void CORE_ICacheDisable(void); + + + +#include "e500v2_ext.h" + +#endif /* __PPC_EXT_H */ diff --git a/sys/contrib/ncsw/inc/ctype_ext.h b/sys/contrib/ncsw/inc/ctype_ext.h new file mode 100644 index 000000000000..e882fb1542a2 --- /dev/null +++ b/sys/contrib/ncsw/inc/ctype_ext.h @@ -0,0 +1,93 @@ +/* Copyright (c) 2008-2011 Freescale Semiconductor, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __CTYPE_EXT_H +#define __CTYPE_EXT_H + + +#if defined(NCSW_LINUX) && defined(__KERNEL__) || defined(NCSW_FREEBSD) +/* + * NOTE! This ctype does not handle EOF like the standard C + * library is required to. + */ + +#define _U 0x01 /* upper */ +#define _L 0x02 /* lower */ +#define _D 0x04 /* digit */ +#define _C 0x08 /* cntrl */ +#define _P 0x10 /* punct */ +#define _S 0x20 /* white space (space/lf/tab) */ +#define _X 0x40 /* hex digit */ +#define _SP 0x80 /* hard space (0x20) */ + +extern unsigned char _ctype[]; + +#define __ismask(x) (_ctype[(int)(unsigned char)(x)]) + +#define isalnum(c) ((__ismask(c)&(_U|_L|_D)) != 0) +#define isalpha(c) ((__ismask(c)&(_U|_L)) != 0) +#define iscntrl(c) ((__ismask(c)&(_C)) != 0) +#define isdigit(c) ((__ismask(c)&(_D)) != 0) +#define isgraph(c) ((__ismask(c)&(_P|_U|_L|_D)) != 0) +#define islower(c) ((__ismask(c)&(_L)) != 0) +#define isprint(c) ((__ismask(c)&(_P|_U|_L|_D|_SP)) != 0) +#define ispunct(c) ((__ismask(c)&(_P)) != 0) +#define isspace(c) ((__ismask(c)&(_S)) != 0) +#define isupper(c) ((__ismask(c)&(_U)) != 0) +#define isxdigit(c) ((__ismask(c)&(_D|_X)) != 0) + +#define isascii(c) (((unsigned char)(c))<=0x7f) +#define toascii(c) (((unsigned char)(c))&0x7f) + +static __inline__ unsigned char __tolower(unsigned char c) +{ + if (isupper(c)) + c -= 'A'-'a'; + return c; +} + +static __inline__ unsigned char __toupper(unsigned char c) +{ + if (islower(c)) + c -= 'a'-'A'; + return c; +} + +#define tolower(c) __tolower(c) +#define toupper(c) __toupper(c) + +#else +#include <ctype.h> +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) || defined(NCSW_FREEBSD) */ + + +#endif /* __CTYPE_EXT_H */ diff --git a/sys/contrib/ncsw/inc/ddr_std_ext.h b/sys/contrib/ncsw/inc/ddr_std_ext.h new file mode 100644 index 000000000000..8bb343fc2852 --- /dev/null +++ b/sys/contrib/ncsw/inc/ddr_std_ext.h @@ -0,0 +1,77 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __DDR_SDT_EXT_H +#define __DDR_SDT_EXT_H + + +/**************************************************************************//** + @Group ddr_Generic_Resources + + @Description ddr generic functions, definitions and enums. + + @{ +*//***************************************************************************/ + + +/**************************************************************************//** + @Description SPD maximum size +*//***************************************************************************/ +#define SPD_MAX_SIZE 256 + +/**************************************************************************//** + @Description DDR types select +*//***************************************************************************/ +typedef enum e_DdrType +{ + e_DDR_DDR1, + e_DDR_DDR2, + e_DDR_DDR3, + e_DDR_DDR3L, + e_DDR_DDR4 +} e_DdrType; + +/**************************************************************************//** + @Description DDR Mode. +*//***************************************************************************/ +typedef enum e_DdrMode +{ + e_DDR_BUS_WIDTH_32BIT, + e_DDR_BUS_WIDTH_64BIT +} e_DdrMode; + +/** @} */ /* end of ddr_Generic_Resources group */ + + + +#endif /* __DDR_SDT_EXT_H */ + diff --git a/sys/contrib/ncsw/inc/debug_ext.h b/sys/contrib/ncsw/inc/debug_ext.h new file mode 100644 index 000000000000..57db0a1486cd --- /dev/null +++ b/sys/contrib/ncsw/inc/debug_ext.h @@ -0,0 +1,233 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File debug_ext.h + + @Description Debug mode definitions. +*//***************************************************************************/ + +#ifndef __DEBUG_EXT_H +#define __DEBUG_EXT_H + +#include "std_ext.h" +#include "xx_ext.h" +#include "memcpy_ext.h" +#if (DEBUG_ERRORS > 0) +#include "sprint_ext.h" +#include "string_ext.h" +#endif /* DEBUG_ERRORS > 0 */ + + +#if (DEBUG_ERRORS > 0) + +/* Internally used macros */ + +#define DUMP_Print XX_Print +#define DUMP_MAX_LEVELS 6 +#define DUMP_IDX_LEN 6 +#define DUMP_MAX_STR 64 + + +#define _CREATE_DUMP_SUBSTR(phrase) \ + dumpTmpLevel = 0; dumpSubStr[0] = '\0'; \ + snprintf(dumpTmpStr, DUMP_MAX_STR, "%s", #phrase); \ + p_DumpToken = strtok(dumpTmpStr, (dumpIsArr[0] ? "[" : ".")); \ + while ((p_DumpToken != NULL) && (dumpTmpLevel < DUMP_MAX_LEVELS)) \ + { \ + strlcat(dumpSubStr, p_DumpToken, DUMP_MAX_STR); \ + if (dumpIsArr[dumpTmpLevel]) \ + { \ + strlcat(dumpSubStr, dumpIdxStr[dumpTmpLevel], DUMP_MAX_STR); \ + p_DumpToken = strtok(NULL, "."); \ + } \ + if ((p_DumpToken != NULL) && \ + ((p_DumpToken = strtok(NULL, (dumpIsArr[++dumpTmpLevel] ? "[" : "."))) != NULL)) \ + strlcat(dumpSubStr, ".", DUMP_MAX_STR); \ + } + + +/**************************************************************************//** + @Group gen_id General Drivers Utilities + + @Description External routines. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group dump_id Memory and Registers Dump Mechanism + + @Description Macros for dumping memory mapped structures. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description Declaration of dump mechanism variables. + + This macro must be declared at the beginning of each routine + which uses the dump mechanism macros, before the routine's code + starts. +*//***************************************************************************/ +#define DECLARE_DUMP \ + char dumpIdxStr[DUMP_MAX_LEVELS + 1][DUMP_IDX_LEN] = { "", }; \ + char dumpSubStr[DUMP_MAX_STR] = ""; \ + char dumpTmpStr[DUMP_MAX_STR] = ""; \ + char *p_DumpToken = NULL; \ + int dumpArrIdx = 0, dumpArrSize = 0, dumpLevel = 0, dumpTmpLevel = 0; \ + uint8_t dumpIsArr[DUMP_MAX_LEVELS + 1] = { 0 }; \ + /* Prevent warnings if not all used */ \ + UNUSED(dumpIdxStr[0][0]); \ + UNUSED(dumpSubStr[0]); \ + UNUSED(dumpTmpStr[0]); \ + UNUSED(p_DumpToken); \ + UNUSED(dumpArrIdx); \ + UNUSED(dumpArrSize); \ + UNUSED(dumpLevel); \ + UNUSED(dumpTmpLevel); \ + UNUSED(dumpIsArr[0]); + + +/**************************************************************************//** + @Description Prints a title for a subsequent dumped structure or memory. + + The inputs for this macro are the structure/memory title and + its base addresses. +*//***************************************************************************/ +#define DUMP_TITLE(addr, msg) \ + DUMP_Print("\r\n"); DUMP_Print msg; \ + if (addr) \ + DUMP_Print(" (%p)", (addr)); \ + DUMP_Print("\r\n---------------------------------------------------------\r\n"); + +/**************************************************************************//** + @Description Prints a subtitle for a subsequent dumped sub-structure (optional). + + The inputs for this macro are the sub-structure subtitle. + A separating line with this subtitle will be printed. +*//***************************************************************************/ +#define DUMP_SUBTITLE(subtitle) \ + DUMP_Print("----------- "); DUMP_Print subtitle; DUMP_Print("\r\n") + + +/**************************************************************************//** + @Description Dumps a memory region in 4-bytes aligned format. + + The inputs for this macro are the base addresses and size + (in bytes) of the memory region. +*//***************************************************************************/ +#define DUMP_MEMORY(addr, size) \ + MemDisp((uint8_t *)(addr), (int)(size)) + + +/**************************************************************************//** + @Description Declares a dump loop, for dumping a sub-structure array. + + The inputs for this macro are: + - idx: an index variable, for indexing the sub-structure items + inside the loop. This variable must be declared separately + in the beginning of the routine. + - cnt: the number of times to repeat the loop. This number should + equal the number of items in the sub-structures array. + + Note, that the body of the loop must be written inside brackets. +*//***************************************************************************/ +#define DUMP_SUBSTRUCT_ARRAY(idx, cnt) \ + for (idx=0, dumpIsArr[dumpLevel++] = 1; \ + (idx < cnt) && (dumpLevel > 0) && snprintf(dumpIdxStr[dumpLevel-1], DUMP_IDX_LEN, "[%d]", idx); \ + idx++, ((idx < cnt) || (dumpIsArr[--dumpLevel] = 0))) + + +/**************************************************************************//** + @Description Dumps a structure's member variable. + + The input for this macro is the full reference for the member + variable, where the structure is referenced using a pointer. + + Note, that a members array must be dumped using DUMP_ARR macro, + rather than using this macro. + + If the member variable is part of a sub-structure hierarchy, + the full hierarchy (including array indexing) must be specified. + + Examples: p_Struct->member + p_Struct->sub.member + p_Struct->sub[i].member +*//***************************************************************************/ +#define DUMP_VAR(st, phrase) \ + do { \ + void *addr = (void *)&((st)->phrase); \ + physAddress_t physAddr = XX_VirtToPhys(addr); \ + _CREATE_DUMP_SUBSTR(phrase); \ + DUMP_Print("0x%010llX: 0x%08x%8s\t%s\r\n", \ + physAddr, GET_UINT32(*(uint32_t*)addr), "", dumpSubStr); \ + } while (0) + + +/**************************************************************************//** + @Description Dumps a structure's members array. + + The input for this macro is the full reference for the members + array, where the structure is referenced using a pointer. + + If the members array is part of a sub-structure hierarchy, + the full hierarchy (including array indexing) must be specified. + + Examples: p_Struct->array + p_Struct->sub.array + p_Struct->sub[i].array +*//***************************************************************************/ +#define DUMP_ARR(st, phrase) \ + do { \ + physAddress_t physAddr; \ + _CREATE_DUMP_SUBSTR(phrase); \ + dumpArrSize = ARRAY_SIZE((st)->phrase); \ + for (dumpArrIdx=0; dumpArrIdx < dumpArrSize; dumpArrIdx++) { \ + physAddr = XX_VirtToPhys((void *)&((st)->phrase[dumpArrIdx])); \ + DUMP_Print("0x%010llX: 0x%08x%8s\t%s[%d]\r\n", \ + physAddr, GET_UINT32((st)->phrase[dumpArrIdx]), "", dumpSubStr, dumpArrIdx); \ + } \ + } while (0) + + + +#endif /* DEBUG_ERRORS > 0 */ + + +/** @} */ /* end of dump_id group */ +/** @} */ /* end of gen_id group */ + + +#endif /* __DEBUG_EXT_H */ + diff --git a/sys/contrib/ncsw/inc/endian_ext.h b/sys/contrib/ncsw/inc/endian_ext.h new file mode 100644 index 000000000000..5cdec668aedf --- /dev/null +++ b/sys/contrib/ncsw/inc/endian_ext.h @@ -0,0 +1,447 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + + @File endian_ext.h + + @Description Big/little endian swapping routines. +*//***************************************************************************/ + +#ifndef __ENDIAN_EXT_H +#define __ENDIAN_EXT_H + +#include "std_ext.h" + + +/**************************************************************************//** + @Group gen_id General Drivers Utilities + + @Description General usage API. This API is intended for usage by both the + internal modules and the user's application. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group endian_id Big/Little-Endian Conversion + + @Description Routines and macros for Big/Little-Endian conversion and + general byte swapping. + + All routines and macros are expecting unsigned values as + parameters, but will generate the correct result also for + signed values. Therefore, signed/unsigned casting is allowed. + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Collection Byte-Swap Macros + + Macros for swapping byte order. + + @Cautions The parameters of these macros are evaluated multiple times. + For calculated expressions or expressions that contain function + calls it is recommended to use the byte-swap routines. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description Swaps the byte order of a given 16-bit value. + + @Param[in] val - The 16-bit value to swap. + + @Return The byte-swapped value.. + + @Cautions The given value is evaluated multiple times by this macro. + For calculated expressions or expressions that contain function + calls it is recommended to use the SwapUint16() routine. + + @hideinitializer +*//***************************************************************************/ +#define SWAP_UINT16(val) \ + ((uint16_t)((((val) & 0x00FF) << 8) | (((val) & 0xFF00) >> 8))) + +/**************************************************************************//** + @Description Swaps the byte order of a given 32-bit value. + + @Param[in] val - The 32-bit value to swap. + + @Return The byte-swapped value.. + + @Cautions The given value is evaluated multiple times by this macro. + For calculated expressions or expressions that contain function + calls it is recommended to use the SwapUint32() routine. + + @hideinitializer +*//***************************************************************************/ +#define SWAP_UINT32(val) \ + ((uint32_t)((((val) & 0x000000FF) << 24) | \ + (((val) & 0x0000FF00) << 8) | \ + (((val) & 0x00FF0000) >> 8) | \ + (((val) & 0xFF000000) >> 24))) + +/**************************************************************************//** + @Description Swaps the byte order of a given 64-bit value. + + @Param[in] val - The 64-bit value to swap. + + @Return The byte-swapped value.. + + @Cautions The given value is evaluated multiple times by this macro. + For calculated expressions or expressions that contain function + calls it is recommended to use the SwapUint64() routine. + + @hideinitializer +*//***************************************************************************/ +#define SWAP_UINT64(val) \ + ((uint64_t)((((val) & 0x00000000000000FFULL) << 56) | \ + (((val) & 0x000000000000FF00ULL) << 40) | \ + (((val) & 0x0000000000FF0000ULL) << 24) | \ + (((val) & 0x00000000FF000000ULL) << 8) | \ + (((val) & 0x000000FF00000000ULL) >> 8) | \ + (((val) & 0x0000FF0000000000ULL) >> 24) | \ + (((val) & 0x00FF000000000000ULL) >> 40) | \ + (((val) & 0xFF00000000000000ULL) >> 56))) + +/* @} */ + +/**************************************************************************//** + @Collection Byte-Swap Routines + + Routines for swapping the byte order of a given parameter and + returning the swapped value. + + These inline routines are safer than the byte-swap macros, + because they evaluate the parameter expression only once. + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function SwapUint16 + + @Description Returns the byte-swapped value of a given 16-bit value. + + @Param[in] val - The 16-bit value. + + @Return The byte-swapped value of the parameter. +*//***************************************************************************/ +static __inline__ uint16_t SwapUint16(uint16_t val) +{ + return (uint16_t)(((val & 0x00FF) << 8) | + ((val & 0xFF00) >> 8)); +} + +/**************************************************************************//** + @Function SwapUint32 + + @Description Returns the byte-swapped value of a given 32-bit value. + + @Param[in] val - The 32-bit value. + + @Return The byte-swapped value of the parameter. +*//***************************************************************************/ +static __inline__ uint32_t SwapUint32(uint32_t val) +{ + return (uint32_t)(((val & 0x000000FF) << 24) | + ((val & 0x0000FF00) << 8) | + ((val & 0x00FF0000) >> 8) | + ((val & 0xFF000000) >> 24)); +} + +/**************************************************************************//** + @Function SwapUint64 + + @Description Returns the byte-swapped value of a given 64-bit value. + + @Param[in] val - The 64-bit value. + + @Return The byte-swapped value of the parameter. +*//***************************************************************************/ +static __inline__ uint64_t SwapUint64(uint64_t val) +{ + return (uint64_t)(((val & 0x00000000000000FFULL) << 56) | + ((val & 0x000000000000FF00ULL) << 40) | + ((val & 0x0000000000FF0000ULL) << 24) | + ((val & 0x00000000FF000000ULL) << 8) | + ((val & 0x000000FF00000000ULL) >> 8) | + ((val & 0x0000FF0000000000ULL) >> 24) | + ((val & 0x00FF000000000000ULL) >> 40) | + ((val & 0xFF00000000000000ULL) >> 56)); +} + +/* @} */ + +/**************************************************************************//** + @Collection In-place Byte-Swap-And-Set Routines + + Routines for swapping the byte order of a given variable and + setting the swapped value back to the same variable. + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function SwapUint16P + + @Description Swaps the byte order of a given 16-bit variable. + + @Param[in] p_Val - Pointer to the 16-bit variable. + + @Return None. +*//***************************************************************************/ +static __inline__ void SwapUint16P(uint16_t *p_Val) +{ + *p_Val = SwapUint16(*p_Val); +} + +/**************************************************************************//** + @Function SwapUint32P + + @Description Swaps the byte order of a given 32-bit variable. + + @Param[in] p_Val - Pointer to the 32-bit variable. + + @Return None. +*//***************************************************************************/ +static __inline__ void SwapUint32P(uint32_t *p_Val) +{ + *p_Val = SwapUint32(*p_Val); +} + +/**************************************************************************//** + @Function SwapUint64P + + @Description Swaps the byte order of a given 64-bit variable. + + @Param[in] p_Val - Pointer to the 64-bit variable. + + @Return None. +*//***************************************************************************/ +static __inline__ void SwapUint64P(uint64_t *p_Val) +{ + *p_Val = SwapUint64(*p_Val); +} + +/* @} */ + + +/**************************************************************************//** + @Collection Little-Endian Conversion Macros + + These macros convert given parameters to or from Little-Endian + format. Use these macros when you want to read or write a specific + Little-Endian value in memory, without a-priori knowing the CPU + byte order. + + These macros use the byte-swap routines. For conversion of + constants in initialization structures, you may use the CONST + versions of these macros (see below), which are using the + byte-swap macros instead. + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description Converts a given 16-bit value from CPU byte order to + Little-Endian byte order. + + @Param[in] val - The 16-bit value to convert. + + @Return The converted value. + + @hideinitializer +*//***************************************************************************/ +#define CPU_TO_LE16(val) SwapUint16(val) + +/**************************************************************************//** + @Description Converts a given 32-bit value from CPU byte order to + Little-Endian byte order. + + @Param[in] val - The 32-bit value to convert. + + @Return The converted value. + + @hideinitializer +*//***************************************************************************/ +#define CPU_TO_LE32(val) SwapUint32(val) + +/**************************************************************************//** + @Description Converts a given 64-bit value from CPU byte order to + Little-Endian byte order. + + @Param[in] val - The 64-bit value to convert. + + @Return The converted value. + + @hideinitializer +*//***************************************************************************/ +#define CPU_TO_LE64(val) SwapUint64(val) + + +/**************************************************************************//** + @Description Converts a given 16-bit value from Little-Endian byte order to + CPU byte order. + + @Param[in] val - The 16-bit value to convert. + + @Return The converted value. + + @hideinitializer +*//***************************************************************************/ +#define LE16_TO_CPU(val) CPU_TO_LE16(val) + +/**************************************************************************//** + @Description Converts a given 32-bit value from Little-Endian byte order to + CPU byte order. + + @Param[in] val - The 32-bit value to convert. + + @Return The converted value. + + @hideinitializer +*//***************************************************************************/ +#define LE32_TO_CPU(val) CPU_TO_LE32(val) + +/**************************************************************************//** + @Description Converts a given 64-bit value from Little-Endian byte order to + CPU byte order. + + @Param[in] val - The 64-bit value to convert. + + @Return The converted value. + + @hideinitializer +*//***************************************************************************/ +#define LE64_TO_CPU(val) CPU_TO_LE64(val) + +/* @} */ + +/**************************************************************************//** + @Collection Little-Endian Constant Conversion Macros + + These macros convert given constants to or from Little-Endian + format. Use these macros when you want to read or write a specific + Little-Endian constant in memory, without a-priori knowing the + CPU byte order. + + These macros use the byte-swap macros, therefore can be used for + conversion of constants in initialization structures. + + @Cautions The parameters of these macros are evaluated multiple times. + For non-constant expressions, use the non-CONST macro versions. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description Converts a given 16-bit constant from CPU byte order to + Little-Endian byte order. + + @Param[in] val - The 16-bit value to convert. + + @Return The converted value. + + @hideinitializer +*//***************************************************************************/ +#define CONST_CPU_TO_LE16(val) SWAP_UINT16(val) + +/**************************************************************************//** + @Description Converts a given 32-bit constant from CPU byte order to + Little-Endian byte order. + + @Param[in] val - The 32-bit value to convert. + + @Return The converted value. + + @hideinitializer +*//***************************************************************************/ +#define CONST_CPU_TO_LE32(val) SWAP_UINT32(val) + +/**************************************************************************//** + @Description Converts a given 64-bit constant from CPU byte order to + Little-Endian byte order. + + @Param[in] val - The 64-bit value to convert. + + @Return The converted value. + + @hideinitializer +*//***************************************************************************/ +#define CONST_CPU_TO_LE64(val) SWAP_UINT64(val) + + +/**************************************************************************//** + @Description Converts a given 16-bit constant from Little-Endian byte order + to CPU byte order. + + @Param[in] val - The 16-bit value to convert. + + @Return The converted value. + + @hideinitializer +*//***************************************************************************/ +#define CONST_LE16_TO_CPU(val) CONST_CPU_TO_LE16(val) + +/**************************************************************************//** + @Description Converts a given 32-bit constant from Little-Endian byte order + to CPU byte order. + + @Param[in] val - The 32-bit value to convert. + + @Return The converted value. + + @hideinitializer +*//***************************************************************************/ +#define CONST_LE32_TO_CPU(val) CONST_CPU_TO_LE32(val) + +/**************************************************************************//** + @Description Converts a given 64-bit constant from Little-Endian byte order + to CPU byte order. + + @Param[in] val - The 64-bit value to convert. + + @Return The converted value. + + @hideinitializer +*//***************************************************************************/ +#define CONST_LE64_TO_CPU(val) CONST_CPU_TO_LE64(val) + +/* @} */ + + +/** @} */ /* end of endian_id group */ +/** @} */ /* end of gen_id group */ + + +#endif /* __ENDIAN_EXT_H */ + diff --git a/sys/contrib/ncsw/inc/enet_ext.h b/sys/contrib/ncsw/inc/enet_ext.h new file mode 100644 index 000000000000..ef3bee55e897 --- /dev/null +++ b/sys/contrib/ncsw/inc/enet_ext.h @@ -0,0 +1,205 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File enet_ext.h + + @Description Ethernet generic definitions and enums. +*//***************************************************************************/ + +#ifndef __ENET_EXT_H +#define __ENET_EXT_H + +#include "fsl_enet.h" + +#define ENET_NUM_OCTETS_PER_ADDRESS 6 /**< Number of octets (8-bit bytes) in an ethernet address */ +#define ENET_GROUP_ADDR 0x01 /**< Group address mask for ethernet addresses */ + + +/**************************************************************************//** + @Description Ethernet Address +*//***************************************************************************/ +typedef uint8_t t_EnetAddr[ENET_NUM_OCTETS_PER_ADDRESS]; + +/**************************************************************************//** + @Description Ethernet Address Type. +*//***************************************************************************/ +typedef enum e_EnetAddrType +{ + e_ENET_ADDR_TYPE_INDIVIDUAL, /**< Individual (unicast) address */ + e_ENET_ADDR_TYPE_GROUP, /**< Group (multicast) address */ + e_ENET_ADDR_TYPE_BROADCAST /**< Broadcast address */ +} e_EnetAddrType; + +/**************************************************************************//** + @Description Ethernet MAC-PHY Interface +*//***************************************************************************/ +typedef enum e_EnetInterface +{ + e_ENET_IF_MII = E_ENET_IF_MII, /**< MII interface */ + e_ENET_IF_RMII = E_ENET_IF_RMII, /**< RMII interface */ + e_ENET_IF_SMII = E_ENET_IF_SMII, /**< SMII interface */ + e_ENET_IF_GMII = E_ENET_IF_GMII, /**< GMII interface */ + e_ENET_IF_RGMII = E_ENET_IF_RGMII, /**< RGMII interface */ + e_ENET_IF_TBI = E_ENET_IF_TBI, /**< TBI interface */ + e_ENET_IF_RTBI = E_ENET_IF_RTBI, /**< RTBI interface */ + e_ENET_IF_SGMII = E_ENET_IF_SGMII, /**< SGMII interface */ + e_ENET_IF_XGMII = E_ENET_IF_XGMII, /**< XGMII interface */ + e_ENET_IF_QSGMII= E_ENET_IF_QSGMII, /**< QSGMII interface */ + e_ENET_IF_XFI = E_ENET_IF_XFI /**< XFI interface */ +} e_EnetInterface; + +#define ENET_IF_SGMII_BASEX 0x80000000 /**< SGMII/QSGII interface with 1000BaseX + auto-negotiation between MAC and phy + or backplane; + Note: 1000BaseX auto-negotiation relates + only to interface between MAC and phy/backplane, + SGMII phy can still synchronize with far-end phy + at 10Mbps, 100Mbps or 1000Mbps */ + +/**************************************************************************//** + @Description Ethernet Duplex Mode +*//***************************************************************************/ +typedef enum e_EnetDuplexMode +{ + e_ENET_HALF_DUPLEX, /**< Half-Duplex mode */ + e_ENET_FULL_DUPLEX /**< Full-Duplex mode */ +} e_EnetDuplexMode; + +/**************************************************************************//** + @Description Ethernet Speed (nominal data rate) +*//***************************************************************************/ +typedef enum e_EnetSpeed +{ + e_ENET_SPEED_10 = E_ENET_SPEED_10, /**< 10 Mbps */ + e_ENET_SPEED_100 = E_ENET_SPEED_100, /**< 100 Mbps */ + e_ENET_SPEED_1000 = E_ENET_SPEED_1000, /**< 1000 Mbps = 1 Gbps */ + e_ENET_SPEED_2500 = E_ENET_SPEED_2500, /**< 2500 Mbps = 2.5 Gbps */ + e_ENET_SPEED_10000 = E_ENET_SPEED_10000 /**< 10000 Mbps = 10 Gbps */ +} e_EnetSpeed; + +/**************************************************************************//** + @Description Ethernet mode (combination of MAC-PHY interface and speed) +*//***************************************************************************/ +typedef enum e_EnetMode +{ + e_ENET_MODE_INVALID = 0, /**< Invalid Ethernet mode */ + e_ENET_MODE_MII_10 = (e_ENET_IF_MII | e_ENET_SPEED_10), /**< 10 Mbps MII */ + e_ENET_MODE_MII_100 = (e_ENET_IF_MII | e_ENET_SPEED_100), /**< 100 Mbps MII */ + e_ENET_MODE_RMII_10 = (e_ENET_IF_RMII | e_ENET_SPEED_10), /**< 10 Mbps RMII */ + e_ENET_MODE_RMII_100 = (e_ENET_IF_RMII | e_ENET_SPEED_100), /**< 100 Mbps RMII */ + e_ENET_MODE_SMII_10 = (e_ENET_IF_SMII | e_ENET_SPEED_10), /**< 10 Mbps SMII */ + e_ENET_MODE_SMII_100 = (e_ENET_IF_SMII | e_ENET_SPEED_100), /**< 100 Mbps SMII */ + e_ENET_MODE_GMII_1000 = (e_ENET_IF_GMII | e_ENET_SPEED_1000), /**< 1000 Mbps GMII */ + e_ENET_MODE_RGMII_10 = (e_ENET_IF_RGMII | e_ENET_SPEED_10), /**< 10 Mbps RGMII */ + e_ENET_MODE_RGMII_100 = (e_ENET_IF_RGMII | e_ENET_SPEED_100), /**< 100 Mbps RGMII */ + e_ENET_MODE_RGMII_1000 = (e_ENET_IF_RGMII | e_ENET_SPEED_1000), /**< 1000 Mbps RGMII */ + e_ENET_MODE_TBI_1000 = (e_ENET_IF_TBI | e_ENET_SPEED_1000), /**< 1000 Mbps TBI */ + e_ENET_MODE_RTBI_1000 = (e_ENET_IF_RTBI | e_ENET_SPEED_1000), /**< 1000 Mbps RTBI */ + e_ENET_MODE_SGMII_10 = (e_ENET_IF_SGMII | e_ENET_SPEED_10), + /**< 10 Mbps SGMII with auto-negotiation between MAC and + SGMII phy according to Cisco SGMII specification */ + e_ENET_MODE_SGMII_100 = (e_ENET_IF_SGMII | e_ENET_SPEED_100), + /**< 100 Mbps SGMII with auto-negotiation between MAC and + SGMII phy according to Cisco SGMII specification */ + e_ENET_MODE_SGMII_1000 = (e_ENET_IF_SGMII | e_ENET_SPEED_1000), + /**< 1000 Mbps SGMII with auto-negotiation between MAC and + SGMII phy according to Cisco SGMII specification */ + e_ENET_MODE_SGMII_2500 = (e_ENET_IF_SGMII | e_ENET_SPEED_2500), + e_ENET_MODE_SGMII_BASEX_10 = (ENET_IF_SGMII_BASEX | e_ENET_IF_SGMII | e_ENET_SPEED_10), + /**< 10 Mbps SGMII with 1000BaseX auto-negotiation between + MAC and SGMII phy or backplane */ + e_ENET_MODE_SGMII_BASEX_100 = (ENET_IF_SGMII_BASEX | e_ENET_IF_SGMII | e_ENET_SPEED_100), + /**< 100 Mbps SGMII with 1000BaseX auto-negotiation between + MAC and SGMII phy or backplane */ + e_ENET_MODE_SGMII_BASEX_1000 = (ENET_IF_SGMII_BASEX | e_ENET_IF_SGMII | e_ENET_SPEED_1000), + /**< 1000 Mbps SGMII with 1000BaseX auto-negotiation between + MAC and SGMII phy or backplane */ + e_ENET_MODE_QSGMII_1000 = (e_ENET_IF_QSGMII| e_ENET_SPEED_1000), + /**< 1000 Mbps QSGMII with auto-negotiation between MAC and + QSGMII phy according to Cisco QSGMII specification */ + e_ENET_MODE_QSGMII_BASEX_1000 = (ENET_IF_SGMII_BASEX | e_ENET_IF_QSGMII| e_ENET_SPEED_1000), + /**< 1000 Mbps QSGMII with 1000BaseX auto-negotiation between + MAC and QSGMII phy or backplane */ + e_ENET_MODE_XGMII_10000 = (e_ENET_IF_XGMII | e_ENET_SPEED_10000), /**< 10000 Mbps XGMII */ + e_ENET_MODE_XFI_10000 = (e_ENET_IF_XFI | e_ENET_SPEED_10000) /**< 10000 Mbps XFI */ +} e_EnetMode; + + +#define IS_ENET_MODE_VALID(mode) \ + (((mode) == e_ENET_MODE_MII_10 ) || \ + ((mode) == e_ENET_MODE_MII_100 ) || \ + ((mode) == e_ENET_MODE_RMII_10 ) || \ + ((mode) == e_ENET_MODE_RMII_100 ) || \ + ((mode) == e_ENET_MODE_SMII_10 ) || \ + ((mode) == e_ENET_MODE_SMII_100 ) || \ + ((mode) == e_ENET_MODE_GMII_1000 ) || \ + ((mode) == e_ENET_MODE_RGMII_10 ) || \ + ((mode) == e_ENET_MODE_RGMII_100 ) || \ + ((mode) == e_ENET_MODE_RGMII_1000 ) || \ + ((mode) == e_ENET_MODE_TBI_1000 ) || \ + ((mode) == e_ENET_MODE_RTBI_1000 ) || \ + ((mode) == e_ENET_MODE_SGMII_10 ) || \ + ((mode) == e_ENET_MODE_SGMII_100 ) || \ + ((mode) == e_ENET_MODE_SGMII_1000 ) || \ + ((mode) == e_ENET_MODE_SGMII_BASEX_10 ) || \ + ((mode) == e_ENET_MODE_SGMII_BASEX_100 ) || \ + ((mode) == e_ENET_MODE_SGMII_BASEX_1000 ) || \ + ((mode) == e_ENET_MODE_XGMII_10000) || \ + ((mode) == e_ENET_MODE_QSGMII_1000) || \ + ((mode) == e_ENET_MODE_QSGMII_BASEX_1000) || \ + ((mode) == e_ENET_MODE_XFI_10000)) + + +#define MAKE_ENET_MODE(_interface, _speed) (e_EnetMode)((_interface) | (_speed)) + +#define ENET_INTERFACE_FROM_MODE(mode) (e_EnetInterface)((mode) & 0x0FFF0000) +#define ENET_SPEED_FROM_MODE(mode) (e_EnetSpeed)((mode) & 0x0000FFFF) + +#define ENET_ADDR_TO_UINT64(_enetAddr) \ + (uint64_t)(((uint64_t)(_enetAddr)[0] << 40) | \ + ((uint64_t)(_enetAddr)[1] << 32) | \ + ((uint64_t)(_enetAddr)[2] << 24) | \ + ((uint64_t)(_enetAddr)[3] << 16) | \ + ((uint64_t)(_enetAddr)[4] << 8) | \ + ((uint64_t)(_enetAddr)[5])) + +#define MAKE_ENET_ADDR_FROM_UINT64(_addr64, _enetAddr) \ + do { \ + int i; \ + for (i=0; i < ENET_NUM_OCTETS_PER_ADDRESS; i++) \ + (_enetAddr)[i] = (uint8_t)((_addr64) >> ((5-i)*8)); \ + } while (0) + + +#endif /* __ENET_EXT_H */ diff --git a/sys/contrib/ncsw/inc/error_ext.h b/sys/contrib/ncsw/inc/error_ext.h new file mode 100644 index 000000000000..7afafe9fbc2b --- /dev/null +++ b/sys/contrib/ncsw/inc/error_ext.h @@ -0,0 +1,530 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File error_ext.h + + @Description Error definitions. +*//***************************************************************************/ + +#ifndef __ERROR_EXT_H +#define __ERROR_EXT_H + +#if defined(NCSW_FREEBSD) +#include <sys/param.h> +#include <sys/errno.h> +#include <sys/pcpu.h> +#endif + +#include "std_ext.h" +#include "xx_ext.h" +#include "core_ext.h" + + + + +/**************************************************************************//** + @Group gen_id General Drivers Utilities + + @Description External routines. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group gen_error_id Errors, Events and Debug + + @Description External routines. + + @{ +*//***************************************************************************/ + +/****************************************************************************** +The scheme below provides the bits description for error codes: + + 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +| Reserved (should be zero) | Module ID | + + 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 +| Error Type | +******************************************************************************/ + +#define ERROR_CODE(_err) ((((uint32_t)_err) & 0x0000FFFF) | __ERR_MODULE__) + +#define GET_ERROR_TYPE(_errcode) ((_errcode) & 0x0000FFFF) + /**< Extract module code from error code (#t_Error) */ + +#define GET_ERROR_MODULE(_errcode) ((_errcode) & 0x00FF0000) + /**< Extract error type (#e_ErrorType) from + error code (#t_Error) */ + + +/**************************************************************************//** + @Description Error Type Enumeration +*//***************************************************************************/ +typedef enum e_ErrorType /* Comments / Associated Message Strings */ +{ /* ------------------------------------------------------------ */ + E_OK = 0 /* Never use "RETURN_ERROR" with E_OK; Use "return E_OK;" */ + ,E_WRITE_FAILED = EIO /**< Write access failed on memory/device. */ + /* String: none, or device name. */ + ,E_NO_DEVICE = ENXIO /**< The associated device is not initialized. */ + /* String: none. */ + ,E_NOT_AVAILABLE = EAGAIN + /**< Resource is unavailable. */ + /* String: none, unless the operation is not the main goal + of the function (in this case add resource description). */ + ,E_NO_MEMORY = ENOMEM /**< External memory allocation failed. */ + /* String: description of item for which allocation failed. */ + ,E_INVALID_ADDRESS = EFAULT + /**< Invalid address. */ + /* String: description of the specific violation. */ + ,E_BUSY = EBUSY /**< Resource or module is busy. */ + /* String: none, unless the operation is not the main goal + of the function (in this case add resource description). */ + ,E_ALREADY_EXISTS = EEXIST + /**< Requested resource or item already exists. */ + /* Use when resource duplication or sharing are not allowed. + String: none, unless the operation is not the main goal + of the function (in this case add item description). */ + ,E_INVALID_OPERATION = ENODEV + /**< The operation/command is invalid (unrecognized). */ + /* String: none. */ + ,E_INVALID_VALUE = EDOM /**< Invalid value. */ + /* Use for non-enumeration parameters, and + only when other error types are not suitable. + String: parameter description + "(should be <attribute>)", + e.g: "Maximum Rx buffer length (should be divisible by 8)", + "Channel number (should be even)". */ + ,E_NOT_IN_RANGE = ERANGE/**< Parameter value is out of range. */ + /* Don't use this error for enumeration parameters. + String: parameter description + "(should be %d-%d)", + e.g: "Number of pad characters (should be 0-15)". */ + ,E_NOT_SUPPORTED = ENOSYS + /**< The function is not supported or not implemented. */ + /* String: none. */ + ,E_INVALID_STATE /**< The operation is not allowed in current module state. */ + /* String: none. */ + ,E_INVALID_HANDLE /**< Invalid handle of module or object. */ + /* String: none, unless the function takes in more than one + handle (in this case add the handle description) */ + ,E_INVALID_ID /**< Invalid module ID (usually enumeration or index). */ + /* String: none, unless the function takes in more than one + ID (in this case add the ID description) */ + ,E_NULL_POINTER /**< Unexpected NULL pointer. */ + /* String: pointer description. */ + ,E_INVALID_SELECTION /**< Invalid selection or mode. */ + /* Use for enumeration values, only when other error types + are not suitable. + String: parameter description. */ + ,E_INVALID_COMM_MODE /**< Invalid communication mode. */ + /* String: none, unless the function takes in more than one + communication mode indications (in this case add + parameter description). */ + ,E_INVALID_MEMORY_TYPE /**< Invalid memory type. */ + /* String: none, unless the function takes in more than one + memory types (in this case add memory description, + e.g: "Data memory", "Buffer descriptors memory"). */ + ,E_INVALID_CLOCK /**< Invalid clock. */ + /* String: none, unless the function takes in more than one + clocks (in this case add clock description, + e.g: "Rx clock", "Tx clock"). */ + ,E_CONFLICT /**< Some setting conflicts with another setting. */ + /* String: description of the conflicting settings. */ + ,E_NOT_ALIGNED /**< Non-aligned address. */ + /* String: parameter description + "(should be %d-bytes aligned)", + e.g: "Rx data buffer (should be 32-bytes aligned)". */ + ,E_NOT_FOUND /**< Requested resource or item was not found. */ + /* Use only when the resource/item is uniquely identified. + String: none, unless the operation is not the main goal + of the function (in this case add item description). */ + ,E_FULL /**< Resource is full. */ + /* String: none, unless the operation is not the main goal + of the function (in this case add resource description). */ + ,E_EMPTY /**< Resource is empty. */ + /* String: none, unless the operation is not the main goal + of the function (in this case add resource description). */ + ,E_ALREADY_FREE /**< Specified resource or item is already free or deleted. */ + /* String: none, unless the operation is not the main goal + of the function (in this case add item description). */ + ,E_READ_FAILED /**< Read access failed on memory/device. */ + /* String: none, or device name. */ + ,E_INVALID_FRAME /**< Invalid frame object (NULL handle or missing buffers). */ + /* String: none. */ + ,E_SEND_FAILED /**< Send operation failed on device. */ + /* String: none, or device name. */ + ,E_RECEIVE_FAILED /**< Receive operation failed on device. */ + /* String: none, or device name. */ + ,E_TIMEOUT/* = ETIMEDOUT*/ /**< The operation timed out. */ + /* String: none. */ + + ,E_DUMMY_LAST /* NEVER USED */ + +} e_ErrorType; + +/**************************************************************************//** + @Description Event Type Enumeration +*//***************************************************************************/ +typedef enum e_Event /* Comments / Associated Flags and Message Strings */ +{ /* ------------------------------------------------------------ */ + EV_NO_EVENT = 0 /**< No event; Never used. */ + + ,EV_RX_DISCARD /**< Received packet discarded (by the driver, and only for + complete packets); + Flags: error flags in case of error, zero otherwise. */ + /* String: reason for discard, e.g: "Error in frame", + "Disordered frame", "Incomplete frame", "No frame object". */ + ,EV_RX_ERROR /**< Receive error (by hardware/firmware); + Flags: usually status flags from the buffer descriptor. */ + /* String: none. */ + ,EV_TX_ERROR /**< Transmit error (by hardware/firmware); + Flags: usually status flags from the buffer descriptor. */ + /* String: none. */ + ,EV_NO_BUFFERS /**< System ran out of buffer objects; + Flags: zero. */ + /* String: none. */ + ,EV_NO_MB_FRAMES /**< System ran out of multi-buffer frame objects; + Flags: zero. */ + /* String: none. */ + ,EV_NO_SB_FRAMES /**< System ran out of single-buffer frame objects; + Flags: zero. */ + /* String: none. */ + ,EV_TX_QUEUE_FULL /**< Transmit queue is full; + Flags: zero. */ + /* String: none. */ + ,EV_RX_QUEUE_FULL /**< Receive queue is full; + Flags: zero. */ + /* String: none. */ + ,EV_INTR_QUEUE_FULL /**< Interrupt queue overflow; + Flags: zero. */ + /* String: none. */ + ,EV_NO_DATA_BUFFER /**< Data buffer allocation (from higher layer) failed; + Flags: zero. */ + /* String: none. */ + ,EV_OBJ_POOL_EMPTY /**< Objects pool is empty; + Flags: zero. */ + /* String: object description (name). */ + ,EV_BUS_ERROR /**< Illegal access on bus; + Flags: the address (if available) or bus identifier */ + /* String: bus/address/module description. */ + ,EV_PTP_TXTS_QUEUE_FULL /**< PTP Tx timestamps queue is full; + Flags: zero. */ + /* String: none. */ + ,EV_PTP_RXTS_QUEUE_FULL /**< PTP Rx timestamps queue is full; + Flags: zero. */ + /* String: none. */ + ,EV_DUMMY_LAST + +} e_Event; + + +/**************************************************************************//** + @Collection Debug Levels for Errors and Events + + The level description refers to errors only. + For events, classification is done by the user. + + The TRACE, INFO and WARNING levels are allowed only when using + the DBG macro, and are not allowed when using the error macros + (RETURN_ERROR or REPORT_ERROR). + @{ +*//***************************************************************************/ +#define REPORT_LEVEL_CRITICAL 1 /**< Crasher: Incorrect flow, NULL pointers/handles. */ +#define REPORT_LEVEL_MAJOR 2 /**< Cannot proceed: Invalid operation, parameters or + configuration. */ +#define REPORT_LEVEL_MINOR 3 /**< Recoverable problem: a repeating call with the same + parameters may be successful. */ +#define REPORT_LEVEL_WARNING 4 /**< Something is not exactly right, yet it is not an error. */ +#define REPORT_LEVEL_INFO 5 /**< Messages which may be of interest to user/programmer. */ +#define REPORT_LEVEL_TRACE 6 /**< Program flow messages. */ + +#define EVENT_DISABLED 0xFF /**< Disabled event (not reported at all) */ + +/* @} */ + + + +#define NO_MSG ("") + +#ifndef DEBUG_GLOBAL_LEVEL +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_WARNING +#endif /* DEBUG_GLOBAL_LEVEL */ + +#ifndef ERROR_GLOBAL_LEVEL +#define ERROR_GLOBAL_LEVEL DEBUG_GLOBAL_LEVEL +#endif /* ERROR_GLOBAL_LEVEL */ + +#ifndef EVENT_GLOBAL_LEVEL +#define EVENT_GLOBAL_LEVEL REPORT_LEVEL_MINOR +#endif /* EVENT_GLOBAL_LEVEL */ + +#ifdef EVENT_LOCAL_LEVEL +#define EVENT_DYNAMIC_LEVEL EVENT_LOCAL_LEVEL +#else +#define EVENT_DYNAMIC_LEVEL EVENT_GLOBAL_LEVEL +#endif /* EVENT_LOCAL_LEVEL */ + + +#ifndef DEBUG_DYNAMIC_LEVEL +#define DEBUG_USING_STATIC_LEVEL + +#ifdef DEBUG_STATIC_LEVEL +#define DEBUG_DYNAMIC_LEVEL DEBUG_STATIC_LEVEL +#else +#define DEBUG_DYNAMIC_LEVEL DEBUG_GLOBAL_LEVEL +#endif /* DEBUG_STATIC_LEVEL */ + +#else /* DEBUG_DYNAMIC_LEVEL */ +#ifdef DEBUG_STATIC_LEVEL +#error "Please use either DEBUG_STATIC_LEVEL or DEBUG_DYNAMIC_LEVEL (not both)" +#else +int DEBUG_DYNAMIC_LEVEL = DEBUG_GLOBAL_LEVEL; +#endif /* DEBUG_STATIC_LEVEL */ +#endif /* !DEBUG_DYNAMIC_LEVEL */ + + +#ifndef ERROR_DYNAMIC_LEVEL + +#ifdef ERROR_STATIC_LEVEL +#define ERROR_DYNAMIC_LEVEL ERROR_STATIC_LEVEL +#else +#define ERROR_DYNAMIC_LEVEL ERROR_GLOBAL_LEVEL +#endif /* ERROR_STATIC_LEVEL */ + +#else /* ERROR_DYNAMIC_LEVEL */ +#ifdef ERROR_STATIC_LEVEL +#error "Please use either ERROR_STATIC_LEVEL or ERROR_DYNAMIC_LEVEL (not both)" +#else +int ERROR_DYNAMIC_LEVEL = ERROR_GLOBAL_LEVEL; +#endif /* ERROR_STATIC_LEVEL */ +#endif /* !ERROR_DYNAMIC_LEVEL */ + +#define PRINT_FORMAT "[CPU%02d, %s:%d %s]" +#define PRINT_FMT_PARAMS PCPU_GET(cpuid), __FILE__, __LINE__, __FUNCTION__ + +#if (!(defined(DEBUG_ERRORS)) || (DEBUG_ERRORS == 0)) +/* No debug/error/event messages at all */ +#define DBG(_level, _vmsg) + +#define REPORT_ERROR(_level, _err, _vmsg) + +#define RETURN_ERROR(_level, _err, _vmsg) \ + return ERROR_CODE(_err) + +#if (REPORT_EVENTS > 0) + +#define REPORT_EVENT(_ev, _appId, _flg, _vmsg) \ + do { \ + if (_ev##_LEVEL <= EVENT_DYNAMIC_LEVEL) { \ + XX_EventById((uint32_t)(_ev), (t_Handle)(_appId), (uint16_t)(_flg), NO_MSG); \ + } \ + } while (0) + +#else + +#define REPORT_EVENT(_ev, _appId, _flg, _vmsg) + +#endif /* (REPORT_EVENTS > 0) */ + + +#else /* DEBUG_ERRORS > 0 */ + +extern const char *dbgLevelStrings[]; +#if (REPORT_EVENTS > 0) +extern const char *eventStrings[]; +#endif /* (REPORT_EVENTS > 0) */ + +char * ErrTypeStrings (e_ErrorType err); + + +#if ((defined(DEBUG_USING_STATIC_LEVEL)) && (DEBUG_DYNAMIC_LEVEL < REPORT_LEVEL_WARNING)) +/* No need for DBG macro - debug level is higher anyway */ +#define DBG(_level, _vmsg) +#else +#define DBG(_level, _vmsg) \ + do { \ + if (REPORT_LEVEL_##_level <= DEBUG_DYNAMIC_LEVEL) { \ + XX_Print("> %s (%s) " PRINT_FORMAT ": ", \ + dbgLevelStrings[REPORT_LEVEL_##_level - 1], \ + __STRING(__ERR_MODULE__), \ + PRINT_FMT_PARAMS); \ + XX_Print _vmsg; \ + XX_Print("\r\n"); \ + } \ + } while (0) +#endif /* (defined(DEBUG_USING_STATIC_LEVEL) && (DEBUG_DYNAMIC_LEVEL < WARNING)) */ + + +#define REPORT_ERROR(_level, _err, _vmsg) \ + do { \ + if (REPORT_LEVEL_##_level <= ERROR_DYNAMIC_LEVEL) { \ + XX_Print("! %s %s Error " PRINT_FORMAT ": %s; ", \ + dbgLevelStrings[REPORT_LEVEL_##_level - 1], \ + __STRING(__ERR_MODULE__), \ + PRINT_FMT_PARAMS, \ + ErrTypeStrings((e_ErrorType)GET_ERROR_TYPE(_err))); \ + XX_Print _vmsg; \ + XX_Print("\r\n"); \ + } \ + } while (0) + + +#define RETURN_ERROR(_level, _err, _vmsg) \ + do { \ + REPORT_ERROR(_level, (_err), _vmsg); \ + return ERROR_CODE(_err); \ + } while (0) + + +#if (REPORT_EVENTS > 0) + +#define REPORT_EVENT(_ev, _appId, _flg, _vmsg) \ + do { \ + if (_ev##_LEVEL <= EVENT_DYNAMIC_LEVEL) { \ + XX_Print("~ %s %s Event " PRINT_FORMAT ": %s (flags: 0x%04x); ", \ + dbgLevelStrings[_ev##_LEVEL - 1], \ + __STRING(__ERR_MODULE__), \ + PRINT_FMT_PARAMS, \ + eventStrings[((_ev) - EV_NO_EVENT - 1)], \ + (uint16_t)(_flg)); \ + XX_Print _vmsg; \ + XX_Print("\r\n"); \ + XX_EventById((uint32_t)(_ev), (t_Handle)(_appId), (uint16_t)(_flg), NO_MSG); \ + } \ + } while (0) + +#else /* not REPORT_EVENTS */ + +#define REPORT_EVENT(_ev, _appId, _flg, _vmsg) + +#endif /* (REPORT_EVENTS > 0) */ + +#endif /* (DEBUG_ERRORS > 0) */ + + +/**************************************************************************//** + @Function ASSERT_COND + + @Description Assertion macro. + + @Param[in] _cond - The condition being checked, in positive form; + Failure of the condition triggers the assert. +*//***************************************************************************/ +#ifdef DISABLE_ASSERTIONS +#define ASSERT_COND(_cond) +#else +#define ASSERT_COND(_cond) \ + do { \ + if (!(_cond)) { \ + XX_Print("*** ASSERT_COND failed " PRINT_FORMAT "\r\n", \ + PRINT_FMT_PARAMS); \ + XX_Exit(1); \ + } \ + } while (0) +#endif /* DISABLE_ASSERTIONS */ + + +#ifdef DISABLE_INIT_PARAMETERS_CHECK + +#define CHECK_INIT_PARAMETERS(handle, f_check) +#define CHECK_INIT_PARAMETERS_RETURN_VALUE(handle, f_check, retval) + +#else + +#define CHECK_INIT_PARAMETERS(handle, f_check) \ + do { \ + t_Error err = f_check(handle); \ + if (err != E_OK) { \ + RETURN_ERROR(MAJOR, err, NO_MSG); \ + } \ + } while (0) + +#define CHECK_INIT_PARAMETERS_RETURN_VALUE(handle, f_check, retval) \ + do { \ + t_Error err = f_check(handle); \ + if (err != E_OK) { \ + REPORT_ERROR(MAJOR, err, NO_MSG); \ + return (retval); \ + } \ + } while (0) + +#endif /* DISABLE_INIT_PARAMETERS_CHECK */ + +#ifdef DISABLE_SANITY_CHECKS + +#define SANITY_CHECK_RETURN_ERROR(_cond, _err) +#define SANITY_CHECK_RETURN_VALUE(_cond, _err, retval) +#define SANITY_CHECK_RETURN(_cond, _err) +#define SANITY_CHECK_EXIT(_cond, _err) + +#else /* DISABLE_SANITY_CHECKS */ + +#define SANITY_CHECK_RETURN_ERROR(_cond, _err) \ + do { \ + if (!(_cond)) { \ + RETURN_ERROR(CRITICAL, (_err), NO_MSG); \ + } \ + } while (0) + +#define SANITY_CHECK_RETURN_VALUE(_cond, _err, retval) \ + do { \ + if (!(_cond)) { \ + REPORT_ERROR(CRITICAL, (_err), NO_MSG); \ + return (retval); \ + } \ + } while (0) + +#define SANITY_CHECK_RETURN(_cond, _err) \ + do { \ + if (!(_cond)) { \ + REPORT_ERROR(CRITICAL, (_err), NO_MSG); \ + return; \ + } \ + } while (0) + +#define SANITY_CHECK_EXIT(_cond, _err) \ + do { \ + if (!(_cond)) { \ + REPORT_ERROR(CRITICAL, (_err), NO_MSG); \ + XX_Exit(1); \ + } \ + } while (0) + +#endif /* DISABLE_SANITY_CHECKS */ + +/** @} */ /* end of Debug/error Utils group */ + +/** @} */ /* end of General Utils group */ + +#endif /* __ERROR_EXT_H */ + + diff --git a/sys/contrib/ncsw/inc/etc/list_ext.h b/sys/contrib/ncsw/inc/etc/list_ext.h new file mode 100644 index 000000000000..743b2785b9e9 --- /dev/null +++ b/sys/contrib/ncsw/inc/etc/list_ext.h @@ -0,0 +1,358 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + + @File list_ext.h + + @Description External prototypes for list.c +*//***************************************************************************/ + +#ifndef __LIST_EXT_H +#define __LIST_EXT_H + + +#include "std_ext.h" + + +/**************************************************************************//** + @Group etc_id Utility Library Application Programming Interface + + @Description External routines. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group list_id List + + @Description List module functions,definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Description List structure. +*//***************************************************************************/ +typedef struct List +{ + struct List *p_Next; /**< A pointer to the next list object */ + struct List *p_Prev; /**< A pointer to the previous list object */ +} t_List; + + +/**************************************************************************//** + @Function NCSW_LIST_FIRST/NCSW_LIST_LAST/NCSW_LIST_NEXT/NCSW_LIST_PREV + + @Description Macro to get first/last/next/previous entry in a list. + + @Param[in] p_List - A pointer to a list. +*//***************************************************************************/ +#define NCSW_LIST_FIRST(p_List) (p_List)->p_Next +#define NCSW_LIST_LAST(p_List) (p_List)->p_Prev +#define NCSW_LIST_NEXT NCSW_LIST_FIRST +#define NCSW_LIST_PREV NCSW_LIST_LAST + + +/**************************************************************************//** + @Function NCSW_LIST_INIT + + @Description Macro for initialization of a list struct. + + @Param[in] lst - The t_List object to initialize. +*//***************************************************************************/ +#define NCSW_LIST_INIT(lst) {&(lst), &(lst)} + + +/**************************************************************************//** + @Function NCSW_LIST + + @Description Macro to declare of a list. + + @Param[in] listName - The list object name. +*//***************************************************************************/ +#define NCSW_LIST(listName) t_List listName = NCSW_LIST_INIT(listName) + + +/**************************************************************************//** + @Function INIT_LIST + + @Description Macro to initialize a list pointer. + + @Param[in] p_List - The list pointer. +*//***************************************************************************/ +#define INIT_LIST(p_List) NCSW_LIST_FIRST(p_List) = NCSW_LIST_LAST(p_List) = (p_List) + + +/**************************************************************************//** + @Function NCSW_LIST_OBJECT + + @Description Macro to get the struct (object) for this entry. + + @Param[in] type - The type of the struct (object) this list is embedded in. + @Param[in] member - The name of the t_List object within the struct. + + @Return The structure pointer for this entry. +*//***************************************************************************/ +#define MEMBER_OFFSET(type, member) (PTR_TO_UINT(&((type *)0)->member)) +#define NCSW_LIST_OBJECT(p_List, type, member) \ + ((type *)((char *)(p_List)-MEMBER_OFFSET(type, member))) + + +/**************************************************************************//** + @Function NCSW_LIST_FOR_EACH + + @Description Macro to iterate over a list. + + @Param[in] p_Pos - A pointer to a list to use as a loop counter. + @Param[in] p_Head - A pointer to the head for your list pointer. + + @Cautions You can't delete items with this routine. + For deletion use NCSW_LIST_FOR_EACH_SAFE(). +*//***************************************************************************/ +#define NCSW_LIST_FOR_EACH(p_Pos, p_Head) \ + for (p_Pos = NCSW_LIST_FIRST(p_Head); p_Pos != (p_Head); p_Pos = NCSW_LIST_NEXT(p_Pos)) + + +/**************************************************************************//** + @Function NCSW_LIST_FOR_EACH_SAFE + + @Description Macro to iterate over a list safe against removal of list entry. + + @Param[in] p_Pos - A pointer to a list to use as a loop counter. + @Param[in] p_Tmp - Another pointer to a list to use as temporary storage. + @Param[in] p_Head - A pointer to the head for your list pointer. +*//***************************************************************************/ +#define NCSW_LIST_FOR_EACH_SAFE(p_Pos, p_Tmp, p_Head) \ + for (p_Pos = NCSW_LIST_FIRST(p_Head), p_Tmp = NCSW_LIST_FIRST(p_Pos); \ + p_Pos != (p_Head); \ + p_Pos = p_Tmp, p_Tmp = NCSW_LIST_NEXT(p_Pos)) + + +/**************************************************************************//** + @Function NCSW_LIST_FOR_EACH_OBJECT_SAFE + + @Description Macro to iterate over list of given type safely. + + @Param[in] p_Pos - A pointer to a list to use as a loop counter. + @Param[in] p_Tmp - Another pointer to a list to use as temporary storage. + @Param[in] type - The type of the struct this is embedded in. + @Param[in] p_Head - A pointer to the head for your list pointer. + @Param[in] member - The name of the list_struct within the struct. + + @Cautions You can't delete items with this routine. + For deletion use NCSW_LIST_FOR_EACH_SAFE(). +*//***************************************************************************/ +#define NCSW_LIST_FOR_EACH_OBJECT_SAFE(p_Pos, p_Tmp, p_Head, type, member) \ + for (p_Pos = NCSW_LIST_OBJECT(NCSW_LIST_FIRST(p_Head), type, member), \ + p_Tmp = NCSW_LIST_OBJECT(NCSW_LIST_FIRST(&p_Pos->member), type, member); \ + &p_Pos->member != (p_Head); \ + p_Pos = p_Tmp, \ + p_Tmp = NCSW_LIST_OBJECT(NCSW_LIST_FIRST(&p_Pos->member), type, member)) + +/**************************************************************************//** + @Function NCSW_LIST_FOR_EACH_OBJECT + + @Description Macro to iterate over list of given type. + + @Param[in] p_Pos - A pointer to a list to use as a loop counter. + @Param[in] type - The type of the struct this is embedded in. + @Param[in] p_Head - A pointer to the head for your list pointer. + @Param[in] member - The name of the list_struct within the struct. + + @Cautions You can't delete items with this routine. + For deletion use NCSW_LIST_FOR_EACH_SAFE(). +*//***************************************************************************/ +#define NCSW_LIST_FOR_EACH_OBJECT(p_Pos, type, p_Head, member) \ + for (p_Pos = NCSW_LIST_OBJECT(NCSW_LIST_FIRST(p_Head), type, member); \ + &p_Pos->member != (p_Head); \ + p_Pos = NCSW_LIST_OBJECT(NCSW_LIST_FIRST(&(p_Pos->member)), type, member)) + + +/**************************************************************************//** + @Function NCSW_LIST_Add + + @Description Add a new entry to a list. + + Insert a new entry after the specified head. + This is good for implementing stacks. + + @Param[in] p_New - A pointer to a new list entry to be added. + @Param[in] p_Head - A pointer to a list head to add it after. + + @Return none. +*//***************************************************************************/ +static __inline__ void NCSW_LIST_Add(t_List *p_New, t_List *p_Head) +{ + NCSW_LIST_PREV(NCSW_LIST_NEXT(p_Head)) = p_New; + NCSW_LIST_NEXT(p_New) = NCSW_LIST_NEXT(p_Head); + NCSW_LIST_PREV(p_New) = p_Head; + NCSW_LIST_NEXT(p_Head) = p_New; +} + + +/**************************************************************************//** + @Function NCSW_LIST_AddToTail + + @Description Add a new entry to a list. + + Insert a new entry before the specified head. + This is useful for implementing queues. + + @Param[in] p_New - A pointer to a new list entry to be added. + @Param[in] p_Head - A pointer to a list head to add it before. + + @Return none. +*//***************************************************************************/ +static __inline__ void NCSW_LIST_AddToTail(t_List *p_New, t_List *p_Head) +{ + NCSW_LIST_NEXT(NCSW_LIST_PREV(p_Head)) = p_New; + NCSW_LIST_PREV(p_New) = NCSW_LIST_PREV(p_Head); + NCSW_LIST_NEXT(p_New) = p_Head; + NCSW_LIST_PREV(p_Head) = p_New; +} + + +/**************************************************************************//** + @Function NCSW_LIST_Del + + @Description Deletes entry from a list. + + @Param[in] p_Entry - A pointer to the element to delete from the list. + + @Return none. + + @Cautions NCSW_LIST_IsEmpty() on entry does not return true after this, + the entry is in an undefined state. +*//***************************************************************************/ +static __inline__ void NCSW_LIST_Del(t_List *p_Entry) +{ + NCSW_LIST_PREV(NCSW_LIST_NEXT(p_Entry)) = NCSW_LIST_PREV(p_Entry); + NCSW_LIST_NEXT(NCSW_LIST_PREV(p_Entry)) = NCSW_LIST_NEXT(p_Entry); +} + + +/**************************************************************************//** + @Function NCSW_LIST_DelAndInit + + @Description Deletes entry from list and reinitialize it. + + @Param[in] p_Entry - A pointer to the element to delete from the list. + + @Return none. +*//***************************************************************************/ +static __inline__ void NCSW_LIST_DelAndInit(t_List *p_Entry) +{ + NCSW_LIST_Del(p_Entry); + INIT_LIST(p_Entry); +} + + +/**************************************************************************//** + @Function NCSW_LIST_Move + + @Description Delete from one list and add as another's head. + + @Param[in] p_Entry - A pointer to the list entry to move. + @Param[in] p_Head - A pointer to the list head that will precede our entry. + + @Return none. +*//***************************************************************************/ +static __inline__ void NCSW_LIST_Move(t_List *p_Entry, t_List *p_Head) +{ + NCSW_LIST_Del(p_Entry); + NCSW_LIST_Add(p_Entry, p_Head); +} + + +/**************************************************************************//** + @Function NCSW_LIST_MoveToTail + + @Description Delete from one list and add as another's tail. + + @Param[in] p_Entry - A pointer to the entry to move. + @Param[in] p_Head - A pointer to the list head that will follow our entry. + + @Return none. +*//***************************************************************************/ +static __inline__ void NCSW_LIST_MoveToTail(t_List *p_Entry, t_List *p_Head) +{ + NCSW_LIST_Del(p_Entry); + NCSW_LIST_AddToTail(p_Entry, p_Head); +} + + +/**************************************************************************//** + @Function NCSW_LIST_IsEmpty + + @Description Tests whether a list is empty. + + @Param[in] p_List - A pointer to the list to test. + + @Return 1 if the list is empty, 0 otherwise. +*//***************************************************************************/ +static __inline__ int NCSW_LIST_IsEmpty(t_List *p_List) +{ + return (NCSW_LIST_FIRST(p_List) == p_List); +} + + +/**************************************************************************//** + @Function NCSW_LIST_Append + + @Description Join two lists. + + @Param[in] p_NewList - A pointer to the new list to add. + @Param[in] p_Head - A pointer to the place to add it in the first list. + + @Return none. +*//***************************************************************************/ +void NCSW_LIST_Append(t_List *p_NewList, t_List *p_Head); + + +/**************************************************************************//** + @Function NCSW_LIST_NumOfObjs + + @Description Counts number of objects in the list + + @Param[in] p_List - A pointer to the list which objects are to be counted. + + @Return Number of objects in the list. +*//***************************************************************************/ +int NCSW_LIST_NumOfObjs(t_List *p_List); + +/** @} */ /* end of list_id group */ +/** @} */ /* end of etc_id group */ + + +#endif /* __LIST_EXT_H */ diff --git a/sys/contrib/ncsw/inc/etc/mem_ext.h b/sys/contrib/ncsw/inc/etc/mem_ext.h new file mode 100644 index 000000000000..d0565d410ca4 --- /dev/null +++ b/sys/contrib/ncsw/inc/etc/mem_ext.h @@ -0,0 +1,318 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + + @File mem_ext.h + + @Description External prototypes for the memory manager object +*//***************************************************************************/ + +#ifndef __MEM_EXT_H +#define __MEM_EXT_H + +#include "std_ext.h" +#include "part_ext.h" + + +/**************************************************************************//** + @Group etc_id Utility Library Application Programming Interface + + @Description External routines. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group mem_id Slab Memory Manager + + @Description Slab Memory Manager module functions, definitions and enums. + + @{ +*//***************************************************************************/ + +/* Each block is of the following structure: + * + * + * +-----------+----------+---------------------------+-----------+-----------+ + * | Alignment | Prefix | Data | Postfix | Alignment | + * | field | field | field | field | Padding | + * | | | | | | + * +-----------+----------+---------------------------+-----------+-----------+ + * and at the beginning of all bytes, an additional optional padding might reside + * to ensure that the first blocks data field is aligned as requested. + */ + + +#define MEM_MAX_NAME_LENGTH 8 + +/**************************************************************************//* + @Description Memory Segment structure +*//***************************************************************************/ + +typedef struct +{ + char name[MEM_MAX_NAME_LENGTH]; + /* The segment's name */ + uint8_t **p_Bases; /* Base addresses of the segments */ + uint8_t **p_BlocksStack; /* Array of pointers to blocks */ + t_Handle h_Spinlock; + uint16_t dataSize; /* Size of each data block */ + uint16_t prefixSize; /* How many bytes to reserve before the data */ + uint16_t postfixSize; /* How many bytes to reserve after the data */ + uint16_t alignment; /* Requested alignment for the data field */ + int allocOwner; /* Memory allocation owner */ + uint32_t getFailures; /* Number of times get failed */ + uint32_t num; /* Number of blocks in segment */ + uint32_t current; /* Current block */ + bool consecutiveMem; /* Allocate consecutive data blocks memory */ +#ifdef DEBUG_MEM_LEAKS + void *p_MemDbg; /* MEM debug database (MEM leaks detection) */ + uint32_t blockOffset; + uint32_t blockSize; +#endif /* DEBUG_MEM_LEAKS */ +} t_MemorySegment; + + + +/**************************************************************************//** + @Function MEM_Init + + @Description Create a new memory segment. + + @Param[in] name - Name of memory partition. + @Param[in] p_Handle - Handle to new segment is returned through here. + @Param[in] num - Number of blocks in new segment. + @Param[in] dataSize - Size of blocks in segment. + @Param[in] prefixSize - How many bytes to allocate before the data. + @Param[in] postfixSize - How many bytes to allocate after the data. + @Param[in] alignment - Requested alignment for data field (in bytes). + + @Return E_OK - success, E_NO_MEMORY - out of memory. +*//***************************************************************************/ +t_Error MEM_Init(char name[], + t_Handle *p_Handle, + uint32_t num, + uint16_t dataSize, + uint16_t prefixSize, + uint16_t postfixSize, + uint16_t alignment); + +/**************************************************************************//** + @Function MEM_InitSmart + + @Description Create a new memory segment. + + @Param[in] name - Name of memory partition. + @Param[in] p_Handle - Handle to new segment is returned through here. + @Param[in] num - Number of blocks in new segment. + @Param[in] dataSize - Size of blocks in segment. + @Param[in] prefixSize - How many bytes to allocate before the data. + @Param[in] postfixSize - How many bytes to allocate after the data. + @Param[in] alignment - Requested alignment for data field (in bytes). + @Param[in] memPartitionId - Memory partition ID for allocation. + @Param[in] consecutiveMem - Whether to allocate the memory blocks + continuously or not. + + @Return E_OK - success, E_NO_MEMORY - out of memory. +*//***************************************************************************/ +t_Error MEM_InitSmart(char name[], + t_Handle *p_Handle, + uint32_t num, + uint16_t dataSize, + uint16_t prefixSize, + uint16_t postfixSize, + uint16_t alignment, + uint8_t memPartitionId, + bool consecutiveMem); + +/**************************************************************************//** + @Function MEM_InitByAddress + + @Description Create a new memory segment with a specified base address. + + @Param[in] name - Name of memory partition. + @Param[in] p_Handle - Handle to new segment is returned through here. + @Param[in] num - Number of blocks in new segment. + @Param[in] dataSize - Size of blocks in segment. + @Param[in] prefixSize - How many bytes to allocate before the data. + @Param[in] postfixSize - How many bytes to allocate after the data. + @Param[in] alignment - Requested alignment for data field (in bytes). + @Param[in] address - The required base address. + + @Return E_OK - success, E_NO_MEMORY - out of memory. + *//***************************************************************************/ +t_Error MEM_InitByAddress(char name[], + t_Handle *p_Handle, + uint32_t num, + uint16_t dataSize, + uint16_t prefixSize, + uint16_t postfixSize, + uint16_t alignment, + uint8_t *address); + +/**************************************************************************//** + @Function MEM_Free + + @Description Free a specific memory segment. + + @Param[in] h_Mem - Handle to memory segment. + + @Return None. +*//***************************************************************************/ +void MEM_Free(t_Handle h_Mem); + +/**************************************************************************//** + @Function MEM_Get + + @Description Get a block of memory from a segment. + + @Param[in] h_Mem - Handle to memory segment. + + @Return Pointer to new memory block on success,0 otherwise. +*//***************************************************************************/ +void * MEM_Get(t_Handle h_Mem); + +/**************************************************************************//** + @Function MEM_GetN + + @Description Get up to N blocks of memory from a segment. + + The blocks are assumed to be of a fixed size (one size per segment). + + @Param[in] h_Mem - Handle to memory segment. + @Param[in] num - Number of blocks to allocate. + @Param[out] array - Array of at least num pointers to which the addresses + of the allocated blocks are written. + + @Return The number of blocks actually allocated. + + @Cautions Interrupts are disabled for all of the allocation loop. + Although this loop is very short for each block (several machine + instructions), you should not allocate a very large number + of blocks via this routine. +*//***************************************************************************/ +uint16_t MEM_GetN(t_Handle h_Mem, uint32_t num, void *array[]); + +/**************************************************************************//** + @Function MEM_Put + + @Description Put a block of memory back to a segment. + + @Param[in] h_Mem - Handle to memory segment. + @Param[in] p_Block - The block to return. + + @Return Pointer to new memory block on success,0 otherwise. +*//***************************************************************************/ +t_Error MEM_Put(t_Handle h_Mem, void *p_Block); + +/**************************************************************************//** + @Function MEM_ComputePartitionSize + + @Description calculate a tight upper boundary of the size of a partition with + given attributes. + + The returned value is suitable if one wants to use MEM_InitByAddress(). + + @Param[in] num - The number of blocks in the segment. + @Param[in] dataSize - Size of block to get. + @Param[in] prefixSize - The prefix size + @Param postfixSize - The postfix size + @Param[in] alignment - The requested alignment value (in bytes) + + @Return The memory block size a segment with the given attributes needs. +*//***************************************************************************/ +uint32_t MEM_ComputePartitionSize(uint32_t num, + uint16_t dataSize, + uint16_t prefixSize, + uint16_t postfixSize, + uint16_t alignment); + +#ifdef DEBUG_MEM_LEAKS +#if !((defined(__MWERKS__) || defined(__GNUC__)) && (__dest_os == __ppc_eabi)) +#error "Memory-Leaks-Debug option is supported only for freescale CodeWarrior" +#endif /* !(defined(__MWERKS__) && ... */ + +/**************************************************************************//** + @Function MEM_CheckLeaks + + @Description Report MEM object leaks. + + This routine is automatically called by the MEM_Free() routine, + but it can also be invoked while the MEM object is alive. + + @Param[in] h_Mem - Handle to memory segment. + + @Return None. +*//***************************************************************************/ +void MEM_CheckLeaks(t_Handle h_Mem); + +#else /* not DEBUG_MEM_LEAKS */ +#define MEM_CheckLeaks(h_Mem) +#endif /* not DEBUG_MEM_LEAKS */ + +/**************************************************************************//** + @Description Get base of MEM +*//***************************************************************************/ +#define MEM_GetBase(h_Mem) ((t_MemorySegment *)(h_Mem))->p_Bases[0] + +/**************************************************************************//** + @Description Get size of MEM block +*//***************************************************************************/ +#define MEM_GetSize(h_Mem) ((t_MemorySegment *)(h_Mem))->dataSize + +/**************************************************************************//** + @Description Get prefix size of MEM block +*//***************************************************************************/ +#define MEM_GetPrefixSize(h_Mem) ((t_MemorySegment *)(h_Mem))->prefixSize + +/**************************************************************************//** + @Description Get postfix size of MEM block +*//***************************************************************************/ +#define MEM_GetPostfixSize(h_Mem) ((t_MemorySegment *)(h_Mem))->postfixSize + +/**************************************************************************//** + @Description Get alignment of MEM block (in bytes) +*//***************************************************************************/ +#define MEM_GetAlignment(h_Mem) ((t_MemorySegment *)(h_Mem))->alignment + +/**************************************************************************//** + @Description Get the number of blocks in the segment +*//***************************************************************************/ +#define MEM_GetNumOfBlocks(h_Mem) ((t_MemorySegment *)(h_Mem))->num + +/** @} */ /* end of MEM group */ +/** @} */ /* end of etc_id group */ + + +#endif /* __MEM_EXT_H */ diff --git a/sys/contrib/ncsw/inc/etc/memcpy_ext.h b/sys/contrib/ncsw/inc/etc/memcpy_ext.h new file mode 100644 index 000000000000..1b3a2fac5fad --- /dev/null +++ b/sys/contrib/ncsw/inc/etc/memcpy_ext.h @@ -0,0 +1,208 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + + @File memcpy_ext.h + + @Description Efficient functions for copying and setting blocks of memory. +*//***************************************************************************/ + +#ifndef __MEMCPY_EXT_H +#define __MEMCPY_EXT_H + +#include "std_ext.h" + + +/**************************************************************************//** + @Group etc_id Utility Library Application Programming Interface + + @Description External routines. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group mem_cpy Memory Copy + + @Description Memory Copy module functions,definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function MemCpy32 + + @Description Copies one memory buffer into another one in 4-byte chunks! + Which should be more efficient than byte by byte. + + For large buffers (over 60 bytes) this function is about 4 times + more efficient than the trivial memory copy. For short buffers + it is reduced to the trivial copy and may be a bit worse. + + @Param[in] pDst - The address of the destination buffer. + @Param[in] pSrc - The address of the source buffer. + @Param[in] size - The number of bytes that will be copied from pSrc to pDst. + + @Return pDst (the address of the destination buffer). + + @Cautions There is no parameter or boundary checking! It is up to the user + to supply non-null parameters as source & destination and size + that actually fits into the destination buffer. +*//***************************************************************************/ +void * MemCpy32(void* pDst,void* pSrc, uint32_t size); +void * IO2IOCpy32(void* pDst,void* pSrc, uint32_t size); +void * IO2MemCpy32(void* pDst,void* pSrc, uint32_t size); +void * Mem2IOCpy32(void* pDst,void* pSrc, uint32_t size); + +/**************************************************************************//** + @Function MemCpy64 + + @Description Copies one memory buffer into another one in 8-byte chunks! + Which should be more efficient than byte by byte. + + For large buffers (over 60 bytes) this function is about 8 times + more efficient than the trivial memory copy. For short buffers + it is reduced to the trivial copy and may be a bit worse. + + Some testing suggests that MemCpy32() preforms better than + MemCpy64() over small buffers. On average they break even at + 100 byte buffers. For buffers larger than that MemCpy64 is + superior. + + @Param[in] pDst - The address of the destination buffer. + @Param[in] pSrc - The address of the source buffer. + @Param[in] size - The number of bytes that will be copied from pSrc to pDst. + + @Return pDst (the address of the destination buffer). + + @Cautions There is no parameter or boundary checking! It is up to the user + to supply non null parameters as source & destination and size + that actually fits into their buffer. + + Do not use under Linux. +*//***************************************************************************/ +void * MemCpy64(void* pDst,void* pSrc, uint32_t size); + +/**************************************************************************//** + @Function MemSet32 + + @Description Sets all bytes of a memory buffer to a specific value, in + 4-byte chunks. + + @Param[in] pDst - The address of the destination buffer. + @Param[in] val - Value to set destination bytes to. + @Param[in] size - The number of bytes that will be set to val. + + @Return pDst (the address of the destination buffer). + + @Cautions There is no parameter or boundary checking! It is up to the user + to supply non null parameter as destination and size + that actually fits into the destination buffer. +*//***************************************************************************/ +void * MemSet32(void* pDst, uint8_t val, uint32_t size); +void * IOMemSet32(void* pDst, uint8_t val, uint32_t size); + +/**************************************************************************//** + @Function MemSet64 + + @Description Sets all bytes of a memory buffer to a specific value, in + 8-byte chunks. + + @Param[in] pDst - The address of the destination buffer. + @Param[in] val - Value to set destination bytes to. + @Param[in] size - The number of bytes that will be set to val. + + @Return pDst (the address of the destination buffer). + + @Cautions There is no parameter or boundary checking! It is up to the user + to supply non null parameter as destination and size + that actually fits into the destination buffer. +*//***************************************************************************/ +void * MemSet64(void* pDst, uint8_t val, uint32_t size); + +/**************************************************************************//** + @Function MemDisp + + @Description Displays a block of memory in chunks of 32 bits. + + @Param[in] addr - The address of the memory to display. + @Param[in] size - The number of bytes that will be displayed. + + @Return None. + + @Cautions There is no parameter or boundary checking! It is up to the user + to supply non null parameter as destination and size + that actually fits into the destination buffer. +*//***************************************************************************/ +void MemDisp(uint8_t *addr, int size); + +/**************************************************************************//** + @Function MemCpy8 + + @Description Trivial copy one memory buffer into another byte by byte + + @Param[in] pDst - The address of the destination buffer. + @Param[in] pSrc - The address of the source buffer. + @Param[in] size - The number of bytes that will be copied from pSrc to pDst. + + @Return pDst (the address of the destination buffer). + + @Cautions There is no parameter or boundary checking! It is up to the user + to supply non-null parameters as source & destination and size + that actually fits into the destination buffer. +*//***************************************************************************/ +void * MemCpy8(void* pDst,void* pSrc, uint32_t size); + +/**************************************************************************//** + @Function MemSet8 + + @Description Sets all bytes of a memory buffer to a specific value byte by byte. + + @Param[in] pDst - The address of the destination buffer. + @Param[in] c - Value to set destination bytes to. + @Param[in] size - The number of bytes that will be set to val. + + @Return pDst (the address of the destination buffer). + + @Cautions There is no parameter or boundary checking! It is up to the user + to supply non null parameter as destination and size + that actually fits into the destination buffer. +*//***************************************************************************/ +void * MemSet8(void* pDst, int c, uint32_t size); + +/** @} */ /* end of mem_cpy group */ +/** @} */ /* end of etc_id group */ + + +#endif /* __MEMCPY_EXT_H */ diff --git a/sys/contrib/ncsw/inc/etc/mm_ext.h b/sys/contrib/ncsw/inc/etc/mm_ext.h new file mode 100644 index 000000000000..fa7c85e3b2b8 --- /dev/null +++ b/sys/contrib/ncsw/inc/etc/mm_ext.h @@ -0,0 +1,310 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File mm_ext.h + + @Description Memory Manager Application Programming Interface +*//***************************************************************************/ +#ifndef __MM_EXT +#define __MM_EXT + +#include "std_ext.h" + +#define MM_MAX_ALIGNMENT 20 /* Alignments from 2 to 128 are available + where maximum alignment defined as + MM_MAX_ALIGNMENT power of 2 */ + +#define MM_MAX_NAME_LEN 32 + +/**************************************************************************//** + @Group etc_id Utility Library Application Programming Interface + + @Description External routines. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group mm_grp Flexible Memory Manager + + @Description Flexible Memory Manager module functions,definitions and enums. + (All of the following functions,definitions and enums can be found in mm_ext.h) + + @{ +*//***************************************************************************/ + + +/**************************************************************************//** + @Function MM_Init + + @Description Initializes a new MM object. + + It initializes a new memory block consisting of base address + and size of the available memory by calling to MemBlock_Init + routine. It is also initializes a new free block for each + by calling FreeBlock_Init routine, which is pointed to + the almost all memory started from the required alignment + from the base address and to the end of the memory. + The handle to the new MM object is returned via "MM" + argument (passed by reference). + + @Param[in] h_MM - Handle to the MM object. + @Param[in] base - Base address of the MM. + @Param[in] size - Size of the MM. + + @Return E_OK is returned on success. E_NOMEMORY is returned if the new MM object or a new free block can not be initialized. +*//***************************************************************************/ +t_Error MM_Init(t_Handle *h_MM, uint64_t base, uint64_t size); + +/**************************************************************************//** + @Function MM_Get + + @Description Allocates a block of memory according to the given size and the alignment. + + The Alignment argument tells from which + free list allocate a block of memory. 2^alignment indicates + the alignment that the base address of the allocated block + should have. So, the only values 1, 2, 4, 8, 16, 32 and 64 + are available for the alignment argument. + The routine passes through the specific free list of free + blocks and seeks for a first block that have anough memory + that is required (best fit). + After the block is found and data is allocated, it calls + the internal MM_CutFree routine to update all free lists + do not include a just allocated block. Of course, each + free list contains a free blocks with the same alignment. + It is also creates a busy block that holds + information about an allocated block. + + @Param[in] h_MM - Handle to the MM object. + @Param[in] size - Size of the MM. + @Param[in] alignment - Index as a power of two defines a required + alignment (in bytes); Should be 1, 2, 4, 8, 16, 32 or 64 + @Param[in] name - The name that specifies an allocated block. + + @Return base address of an allocated block ILLEGAL_BASE if can't allocate a block +*//***************************************************************************/ +uint64_t MM_Get(t_Handle h_MM, uint64_t size, uint64_t alignment, char *name); + +/**************************************************************************//** + @Function MM_GetBase + + @Description Gets the base address of the required MM objects. + + @Param[in] h_MM - Handle to the MM object. + + @Return base address of the block. +*//***************************************************************************/ +uint64_t MM_GetBase(t_Handle h_MM); + +/**************************************************************************//** + @Function MM_GetForce + + @Description Force memory allocation. + + It means to allocate a block of memory of the given + size from the given base address. + The routine checks if the required block can be allocated + (that is it is free) and then, calls the internal MM_CutFree + routine to update all free lists do not include that block. + + @Param[in] h_MM - Handle to the MM object. + @Param[in] base - Base address of the MM. + @Param[in] size - Size of the MM. + @Param[in] name - Name that specifies an allocated block. + + @Return base address of an allocated block, ILLEGAL_BASE if can't allocate a block. +*//***************************************************************************/ +uint64_t MM_GetForce(t_Handle h_MM, uint64_t base, uint64_t size, char *name); + +/**************************************************************************//** + @Function MM_GetForceMin + + @Description Allocates a block of memory according to the given size, the alignment and minimum base address. + + The Alignment argument tells from which + free list allocate a block of memory. 2^alignment indicates + the alignment that the base address of the allocated block + should have. So, the only values 1, 2, 4, 8, 16, 32 and 64 + are available for the alignment argument. + The minimum baser address forces the location of the block + to be from a given address onward. + The routine passes through the specific free list of free + blocks and seeks for the first base address equal or smaller + than the required minimum address and end address larger than + than the required base + its size - i.e. that may contain + the required block. + After the block is found and data is allocated, it calls + the internal MM_CutFree routine to update all free lists + do not include a just allocated block. Of course, each + free list contains a free blocks with the same alignment. + It is also creates a busy block that holds + information about an allocated block. + + @Param[in] h_MM - Handle to the MM object. + @Param[in] size - Size of the MM. + @Param[in] alignment - Index as a power of two defines a required + alignment (in bytes); Should be 1, 2, 4, 8, 16, 32 or 64 + @Param[in] min - The minimum base address of the block. + @Param[in] name - Name that specifies an allocated block. + + @Return base address of an allocated block,ILLEGAL_BASE if can't allocate a block. +*//***************************************************************************/ +uint64_t MM_GetForceMin(t_Handle h_MM, + uint64_t size, + uint64_t alignment, + uint64_t min, + char *name); + +/**************************************************************************//** + @Function MM_Put + + @Description Puts a block of memory of the given base address back to the memory. + + It checks if there is a busy block with the + given base address. If not, it returns 0, that + means can't free a block. Otherwise, it gets parameters of + the busy block and after it updates lists of free blocks, + removes that busy block from the list by calling to MM_CutBusy + routine. + After that it calls to MM_AddFree routine to add a new free + block to the free lists. + + @Param[in] h_MM - Handle to the MM object. + @Param[in] base - Base address of the MM. + + @Return The size of bytes released, 0 if failed. +*//***************************************************************************/ +uint64_t MM_Put(t_Handle h_MM, uint64_t base); + +/**************************************************************************//** + @Function MM_PutForce + + @Description Releases a block of memory of the required size from the required base address. + + First, it calls to MM_CutBusy routine + to cut a free block from the busy list. And then, calls to + MM_AddFree routine to add the free block to the free lists. + + @Param[in] h_MM - Handle to the MM object. + @Param[in] base - Base address of of a block to free. + @Param[in] size - Size of a block to free. + + @Return The number of bytes released, 0 on failure. +*//***************************************************************************/ +uint64_t MM_PutForce(t_Handle h_MM, uint64_t base, uint64_t size); + +/**************************************************************************//** + @Function MM_Add + + @Description Adds a new memory block for memory allocation. + + When a new memory block is initialized and added to the + memory list, it calls to MM_AddFree routine to add the + new free block to the free lists. + + @Param[in] h_MM - Handle to the MM object. + @Param[in] base - Base address of the memory block. + @Param[in] size - Size of the memory block. + + @Return E_OK on success, otherwise returns an error code. +*//***************************************************************************/ +t_Error MM_Add(t_Handle h_MM, uint64_t base, uint64_t size); + +/**************************************************************************//** + @Function MM_Dump + + @Description Prints results of free and busy lists. + + @Param[in] h_MM - Handle to the MM object. +*//***************************************************************************/ +void MM_Dump(t_Handle h_MM); + +/**************************************************************************//** + @Function MM_Free + + @Description Releases memory allocated for MM object. + + @Param[in] h_MM - Handle of the MM object. +*//***************************************************************************/ +void MM_Free(t_Handle h_MM); + +/**************************************************************************//** + @Function MM_GetMemBlock + + @Description Returns base address of the memory block specified by the index. + + If index is 0, returns base address + of the first memory block, 1 - returns base address + of the second memory block, etc. + Note, those memory blocks are allocated by the + application before MM_Init or MM_Add and have to + be released by the application before or after invoking + the MM_Free routine. + + @Param[in] h_MM - Handle to the MM object. + @Param[in] index - Index of the memory block. + + @Return valid base address or ILLEGAL_BASE if no memory block specified by the index. +*//***************************************************************************/ +uint64_t MM_GetMemBlock(t_Handle h_MM, int index); + +/**************************************************************************//** + @Function MM_InRange + + @Description Checks if a specific address is in the memory range of the passed MM object. + + @Param[in] h_MM - Handle to the MM object. + @Param[in] addr - The address to be checked. + + @Return TRUE if the address is in the address range of the block, FALSE otherwise. +*//***************************************************************************/ +bool MM_InRange(t_Handle h_MM, uint64_t addr); + +/**************************************************************************//** + @Function MM_GetFreeMemSize + + @Description Returns the size (in bytes) of free memory. + + @Param[in] h_MM - Handle to the MM object. + + @Return Free memory size in bytes. +*//***************************************************************************/ +uint64_t MM_GetFreeMemSize(t_Handle h_MM); + + +/** @} */ /* end of mm_grp group */ +/** @} */ /* end of etc_id group */ + +#endif /* __MM_EXT_H */ diff --git a/sys/contrib/ncsw/inc/etc/sprint_ext.h b/sys/contrib/ncsw/inc/etc/sprint_ext.h new file mode 100644 index 000000000000..0a53b7ce02a0 --- /dev/null +++ b/sys/contrib/ncsw/inc/etc/sprint_ext.h @@ -0,0 +1,123 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File sprint_ext.h + + @Description Debug routines (externals). + +*//***************************************************************************/ + +#ifndef __SPRINT_EXT_H +#define __SPRINT_EXT_H + + +#if defined(NCSW_LINUX) && defined(__KERNEL__) +#include <linux/kernel.h> + +#elif defined(NCSW_VXWORKS) +#include "private/stdioP.h" + +#elif defined(NCSW_FREEBSD) +#include <sys/param.h> +#include <sys/kernel.h> +#include <sys/libkern.h> + +#else +#include <stdio.h> +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */ + +#include "std_ext.h" + + +/**************************************************************************//** + @Group etc_id Utility Library Application Programming Interface + + @Description External routines. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Group sprint_id Sprint + + @Description Sprint & Sscan module functions,definitions and enums. + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Function Sprint + + @Description Format a string and place it in a buffer. + + @Param[in] buff - The buffer to place the result into. + @Param[in] str - The format string to use. + @Param[in] ... - Arguments for the format string. + + @Return Number of bytes formatted. +*//***************************************************************************/ +int Sprint(char *buff, const char *str, ...); + +/**************************************************************************//** + @Function Snprint + + @Description Format a string and place it in a buffer. + + @Param[in] buf - The buffer to place the result into. + @Param[in] size - The size of the buffer, including the trailing null space. + @Param[in] fmt - The format string to use. + @Param[in] ... - Arguments for the format string. + + @Return Number of bytes formatted. +*//***************************************************************************/ +int Snprint(char * buf, uint32_t size, const char *fmt, ...); + +/**************************************************************************//** + @Function Sscan + + @Description Unformat a buffer into a list of arguments. + + @Param[in] buf - input buffer. + @Param[in] fmt - formatting of buffer. + @Param[out] ... - resulting arguments. + + @Return Number of bytes unformatted. +*//***************************************************************************/ +int Sscan(const char * buf, const char * fmt, ...); + +/** @} */ /* end of sprint_id group */ +/** @} */ /* end of etc_id group */ + + +#endif /* __SPRINT_EXT_H */ diff --git a/sys/contrib/ncsw/inc/flib/common/arch/ppc_access.h b/sys/contrib/ncsw/inc/flib/common/arch/ppc_access.h new file mode 100644 index 000000000000..c7b9b46f269b --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/common/arch/ppc_access.h @@ -0,0 +1,37 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef FL_E500_MACROS_H +#define FL_E500_MACROS_H + +#endif /* FL_E500_MACROS_H */ + diff --git a/sys/contrib/ncsw/inc/flib/common/general.h b/sys/contrib/ncsw/inc/flib/common/general.h new file mode 100644 index 000000000000..1b2ce7242805 --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/common/general.h @@ -0,0 +1,52 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __GENERAL_H +#define __GENERAL_H + +#include "std_ext.h" +#if !defined(NCSW_LINUX) && !defined(NCSW_FREEBSD) +#include "errno.h" +#endif + + +extern uint32_t get_mac_addr_crc(uint64_t _addr); + +#ifndef CONFIG_FMAN_ARM +#define iowrite32be(val, addr) WRITE_UINT32(*addr, val) +#define ioread32be(addr) GET_UINT32(*addr) +#endif + +#define ether_crc(len, addr) get_mac_addr_crc(*(uint64_t *)(addr)>>16) + + +#endif /* __GENERAL_H */ diff --git a/sys/contrib/ncsw/inc/flib/fman_common.h b/sys/contrib/ncsw/inc/flib/fman_common.h new file mode 100755 index 000000000000..8b194e995561 --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/fman_common.h @@ -0,0 +1,78 @@ +/* + * Copyright 2008-2013 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef __FMAN_COMMON_H +#define __FMAN_COMMON_H + +/**************************************************************************//** + @Description NIA Description +*//***************************************************************************/ +#define NIA_ORDER_RESTOR 0x00800000 +#define NIA_ENG_FM_CTL 0x00000000 +#define NIA_ENG_PRS 0x00440000 +#define NIA_ENG_KG 0x00480000 +#define NIA_ENG_PLCR 0x004C0000 +#define NIA_ENG_BMI 0x00500000 +#define NIA_ENG_QMI_ENQ 0x00540000 +#define NIA_ENG_QMI_DEQ 0x00580000 +#define NIA_ENG_MASK 0x007C0000 + +#define NIA_FM_CTL_AC_CC 0x00000006 +#define NIA_FM_CTL_AC_HC 0x0000000C +#define NIA_FM_CTL_AC_IND_MODE_TX 0x00000008 +#define NIA_FM_CTL_AC_IND_MODE_RX 0x0000000A +#define NIA_FM_CTL_AC_FRAG 0x0000000e +#define NIA_FM_CTL_AC_PRE_FETCH 0x00000010 +#define NIA_FM_CTL_AC_POST_FETCH_PCD 0x00000012 +#define NIA_FM_CTL_AC_POST_FETCH_PCD_UDP_LEN 0x00000018 +#define NIA_FM_CTL_AC_POST_FETCH_NO_PCD 0x00000012 +#define NIA_FM_CTL_AC_FRAG_CHECK 0x00000014 +#define NIA_FM_CTL_AC_PRE_CC 0x00000020 + + +#define NIA_BMI_AC_ENQ_FRAME 0x00000002 +#define NIA_BMI_AC_TX_RELEASE 0x000002C0 +#define NIA_BMI_AC_RELEASE 0x000000C0 +#define NIA_BMI_AC_DISCARD 0x000000C1 +#define NIA_BMI_AC_TX 0x00000274 +#define NIA_BMI_AC_FETCH 0x00000208 +#define NIA_BMI_AC_MASK 0x000003FF + +#define NIA_KG_DIRECT 0x00000100 +#define NIA_KG_CC_EN 0x00000200 +#define NIA_PLCR_ABSOLUTE 0x00008000 + +#define NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA 0x00000202 +#define NIA_BMI_AC_FETCH_ALL_FRAME 0x0000020c + +#endif /* __FMAN_COMMON_H */ diff --git a/sys/contrib/ncsw/inc/flib/fsl_enet.h b/sys/contrib/ncsw/inc/flib/fsl_enet.h new file mode 100644 index 000000000000..caa87fc6b21d --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/fsl_enet.h @@ -0,0 +1,273 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __FSL_ENET_H +#define __FSL_ENET_H + +/** + @Description Ethernet MAC-PHY Interface +*/ + +enum enet_interface { + E_ENET_IF_MII = 0x00010000, /**< MII interface */ + E_ENET_IF_RMII = 0x00020000, /**< RMII interface */ + E_ENET_IF_SMII = 0x00030000, /**< SMII interface */ + E_ENET_IF_GMII = 0x00040000, /**< GMII interface */ + E_ENET_IF_RGMII = 0x00050000, /**< RGMII interface */ + E_ENET_IF_TBI = 0x00060000, /**< TBI interface */ + E_ENET_IF_RTBI = 0x00070000, /**< RTBI interface */ + E_ENET_IF_SGMII = 0x00080000, /**< SGMII interface */ + E_ENET_IF_XGMII = 0x00090000, /**< XGMII interface */ + E_ENET_IF_QSGMII = 0x000a0000, /**< QSGMII interface */ + E_ENET_IF_XFI = 0x000b0000 /**< XFI interface */ +}; + +/** + @Description Ethernet Speed (nominal data rate) +*/ +enum enet_speed { + E_ENET_SPEED_10 = 10, /**< 10 Mbps */ + E_ENET_SPEED_100 = 100, /**< 100 Mbps */ + E_ENET_SPEED_1000 = 1000, /**< 1000 Mbps = 1 Gbps */ + E_ENET_SPEED_2500 = 2500, /**< 2500 Mbps = 2.5 Gbps */ + E_ENET_SPEED_10000 = 10000 /**< 10000 Mbps = 10 Gbps */ +}; + +enum mac_type { + E_MAC_DTSEC, + E_MAC_TGEC, + E_MAC_MEMAC +}; + +/**************************************************************************//** + @Description Enum for inter-module interrupts registration +*//***************************************************************************/ +enum fman_event_modules { + E_FMAN_MOD_PRS, /**< Parser event */ + E_FMAN_MOD_KG, /**< Keygen event */ + E_FMAN_MOD_PLCR, /**< Policer event */ + E_FMAN_MOD_10G_MAC, /**< 10G MAC event */ + E_FMAN_MOD_1G_MAC, /**< 1G MAC event */ + E_FMAN_MOD_TMR, /**< Timer event */ + E_FMAN_MOD_FMAN_CTRL, /**< FMAN Controller Timer event */ + E_FMAN_MOD_MACSEC, + E_FMAN_MOD_DUMMY_LAST +}; + +/**************************************************************************//** + @Description Enum for interrupts types +*//***************************************************************************/ +enum fman_intr_type { + E_FMAN_INTR_TYPE_ERR, + E_FMAN_INTR_TYPE_NORMAL +}; + +/**************************************************************************//** + @Description enum for defining MAC types +*//***************************************************************************/ +enum fman_mac_type { + E_FMAN_MAC_10G = 0, /**< 10G MAC */ + E_FMAN_MAC_1G /**< 1G MAC */ +}; + +enum fman_mac_exceptions { + E_FMAN_MAC_EX_10G_MDIO_SCAN_EVENTMDIO = 0, + /**< 10GEC MDIO scan event interrupt */ + E_FMAN_MAC_EX_10G_MDIO_CMD_CMPL, + /**< 10GEC MDIO command completion interrupt */ + E_FMAN_MAC_EX_10G_REM_FAULT, + /**< 10GEC, mEMAC Remote fault interrupt */ + E_FMAN_MAC_EX_10G_LOC_FAULT, + /**< 10GEC, mEMAC Local fault interrupt */ + E_FMAN_MAC_EX_10G_1TX_ECC_ER, + /**< 10GEC, mEMAC Transmit frame ECC error interrupt */ + E_FMAN_MAC_EX_10G_TX_FIFO_UNFL, + /**< 10GEC, mEMAC Transmit FIFO underflow interrupt */ + E_FMAN_MAC_EX_10G_TX_FIFO_OVFL, + /**< 10GEC, mEMAC Transmit FIFO overflow interrupt */ + E_FMAN_MAC_EX_10G_TX_ER, + /**< 10GEC Transmit frame error interrupt */ + E_FMAN_MAC_EX_10G_RX_FIFO_OVFL, + /**< 10GEC, mEMAC Receive FIFO overflow interrupt */ + E_FMAN_MAC_EX_10G_RX_ECC_ER, + /**< 10GEC, mEMAC Receive frame ECC error interrupt */ + E_FMAN_MAC_EX_10G_RX_JAB_FRM, + /**< 10GEC Receive jabber frame interrupt */ + E_FMAN_MAC_EX_10G_RX_OVRSZ_FRM, + /**< 10GEC Receive oversized frame interrupt */ + E_FMAN_MAC_EX_10G_RX_RUNT_FRM, + /**< 10GEC Receive runt frame interrupt */ + E_FMAN_MAC_EX_10G_RX_FRAG_FRM, + /**< 10GEC Receive fragment frame interrupt */ + E_FMAN_MAC_EX_10G_RX_LEN_ER, + /**< 10GEC Receive payload length error interrupt */ + E_FMAN_MAC_EX_10G_RX_CRC_ER, + /**< 10GEC Receive CRC error interrupt */ + E_FMAN_MAC_EX_10G_RX_ALIGN_ER, + /**< 10GEC Receive alignment error interrupt */ + E_FMAN_MAC_EX_1G_BAB_RX, + /**< dTSEC Babbling receive error */ + E_FMAN_MAC_EX_1G_RX_CTL, + /**< dTSEC Receive control (pause frame) interrupt */ + E_FMAN_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET, + /**< dTSEC Graceful transmit stop complete */ + E_FMAN_MAC_EX_1G_BAB_TX, + /**< dTSEC Babbling transmit error */ + E_FMAN_MAC_EX_1G_TX_CTL, + /**< dTSEC Transmit control (pause frame) interrupt */ + E_FMAN_MAC_EX_1G_TX_ERR, + /**< dTSEC Transmit error */ + E_FMAN_MAC_EX_1G_LATE_COL, + /**< dTSEC Late collision */ + E_FMAN_MAC_EX_1G_COL_RET_LMT, + /**< dTSEC Collision retry limit */ + E_FMAN_MAC_EX_1G_TX_FIFO_UNDRN, + /**< dTSEC Transmit FIFO underrun */ + E_FMAN_MAC_EX_1G_MAG_PCKT, + /**< dTSEC Magic Packet detection */ + E_FMAN_MAC_EX_1G_MII_MNG_RD_COMPLET, + /**< dTSEC MII management read completion */ + E_FMAN_MAC_EX_1G_MII_MNG_WR_COMPLET, + /**< dTSEC MII management write completion */ + E_FMAN_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET, + /**< dTSEC Graceful receive stop complete */ + E_FMAN_MAC_EX_1G_TX_DATA_ERR, + /**< dTSEC Internal data error on transmit */ + E_FMAN_MAC_EX_1G_RX_DATA_ERR, + /**< dTSEC Internal data error on receive */ + E_FMAN_MAC_EX_1G_1588_TS_RX_ERR, + /**< dTSEC Time-Stamp Receive Error */ + E_FMAN_MAC_EX_1G_RX_MIB_CNT_OVFL, + /**< dTSEC MIB counter overflow */ + E_FMAN_MAC_EX_TS_FIFO_ECC_ERR, + /**< mEMAC Time-stamp FIFO ECC error interrupt; + not supported on T4240/B4860 rev1 chips */ +}; + +#define ENET_IF_SGMII_BASEX 0x80000000 + /**< SGMII/QSGII interface with 1000BaseX auto-negotiation between MAC + and phy or backplane; + Note: 1000BaseX auto-negotiation relates only to interface between MAC + and phy/backplane, SGMII phy can still synchronize with far-end phy at + 10Mbps, 100Mbps or 1000Mbps */ + +enum enet_mode { + E_ENET_MODE_INVALID = 0, + /**< Invalid Ethernet mode */ + E_ENET_MODE_MII_10 = (E_ENET_IF_MII | E_ENET_SPEED_10), + /**< 10 Mbps MII */ + E_ENET_MODE_MII_100 = (E_ENET_IF_MII | E_ENET_SPEED_100), + /**< 100 Mbps MII */ + E_ENET_MODE_RMII_10 = (E_ENET_IF_RMII | E_ENET_SPEED_10), + /**< 10 Mbps RMII */ + E_ENET_MODE_RMII_100 = (E_ENET_IF_RMII | E_ENET_SPEED_100), + /**< 100 Mbps RMII */ + E_ENET_MODE_SMII_10 = (E_ENET_IF_SMII | E_ENET_SPEED_10), + /**< 10 Mbps SMII */ + E_ENET_MODE_SMII_100 = (E_ENET_IF_SMII | E_ENET_SPEED_100), + /**< 100 Mbps SMII */ + E_ENET_MODE_GMII_1000 = (E_ENET_IF_GMII | E_ENET_SPEED_1000), + /**< 1000 Mbps GMII */ + E_ENET_MODE_RGMII_10 = (E_ENET_IF_RGMII | E_ENET_SPEED_10), + /**< 10 Mbps RGMII */ + E_ENET_MODE_RGMII_100 = (E_ENET_IF_RGMII | E_ENET_SPEED_100), + /**< 100 Mbps RGMII */ + E_ENET_MODE_RGMII_1000 = (E_ENET_IF_RGMII | E_ENET_SPEED_1000), + /**< 1000 Mbps RGMII */ + E_ENET_MODE_TBI_1000 = (E_ENET_IF_TBI | E_ENET_SPEED_1000), + /**< 1000 Mbps TBI */ + E_ENET_MODE_RTBI_1000 = (E_ENET_IF_RTBI | E_ENET_SPEED_1000), + /**< 1000 Mbps RTBI */ + E_ENET_MODE_SGMII_10 = (E_ENET_IF_SGMII | E_ENET_SPEED_10), + /**< 10 Mbps SGMII with auto-negotiation between MAC and + SGMII phy according to Cisco SGMII specification */ + E_ENET_MODE_SGMII_100 = (E_ENET_IF_SGMII | E_ENET_SPEED_100), + /**< 100 Mbps SGMII with auto-negotiation between MAC and + SGMII phy according to Cisco SGMII specification */ + E_ENET_MODE_SGMII_1000 = (E_ENET_IF_SGMII | E_ENET_SPEED_1000), + /**< 1000 Mbps SGMII with auto-negotiation between MAC and + SGMII phy according to Cisco SGMII specification */ + E_ENET_MODE_SGMII_BASEX_10 = (ENET_IF_SGMII_BASEX | E_ENET_IF_SGMII + | E_ENET_SPEED_10), + /**< 10 Mbps SGMII with 1000BaseX auto-negotiation between + MAC and SGMII phy or backplane */ + E_ENET_MODE_SGMII_BASEX_100 = (ENET_IF_SGMII_BASEX | E_ENET_IF_SGMII + | E_ENET_SPEED_100), + /**< 100 Mbps SGMII with 1000BaseX auto-negotiation between + MAC and SGMII phy or backplane */ + E_ENET_MODE_SGMII_BASEX_1000 = (ENET_IF_SGMII_BASEX | E_ENET_IF_SGMII + | E_ENET_SPEED_1000), + /**< 1000 Mbps SGMII with 1000BaseX auto-negotiation between + MAC and SGMII phy or backplane */ + E_ENET_MODE_QSGMII_1000 = (E_ENET_IF_QSGMII | E_ENET_SPEED_1000), + /**< 1000 Mbps QSGMII with auto-negotiation between MAC and + QSGMII phy according to Cisco QSGMII specification */ + E_ENET_MODE_QSGMII_BASEX_1000 = (ENET_IF_SGMII_BASEX | E_ENET_IF_QSGMII + | E_ENET_SPEED_1000), + /**< 1000 Mbps QSGMII with 1000BaseX auto-negotiation between + MAC and QSGMII phy or backplane */ + E_ENET_MODE_XGMII_10000 = (E_ENET_IF_XGMII | E_ENET_SPEED_10000), + /**< 10000 Mbps XGMII */ + E_ENET_MODE_XFI_10000 = (E_ENET_IF_XFI | E_ENET_SPEED_10000) + /**< 10000 Mbps XFI */ +}; + +enum fmam_mac_statistics_level { + E_FMAN_MAC_NONE_STATISTICS, /**< No statistics */ + E_FMAN_MAC_PARTIAL_STATISTICS, /**< Only error counters are available; + Optimized for performance */ + E_FMAN_MAC_FULL_STATISTICS /**< All counters available; Not + optimized for performance */ +}; + +#define _MAKE_ENET_MODE(_interface, _speed) (enum enet_mode)((_interface) \ + | (_speed)) + +#define _ENET_INTERFACE_FROM_MODE(mode) (enum enet_interface) \ + ((mode) & 0x0FFF0000) +#define _ENET_SPEED_FROM_MODE(mode) (enum enet_speed)((mode) & 0x0000FFFF) +#define _ENET_ADDR_TO_UINT64(_enet_addr) \ + (uint64_t)(((uint64_t)(_enet_addr)[0] << 40) | \ + ((uint64_t)(_enet_addr)[1] << 32) | \ + ((uint64_t)(_enet_addr)[2] << 24) | \ + ((uint64_t)(_enet_addr)[3] << 16) | \ + ((uint64_t)(_enet_addr)[4] << 8) | \ + ((uint64_t)(_enet_addr)[5])) + +#define _MAKE_ENET_ADDR_FROM_UINT64(_addr64, _enet_addr) \ + do { \ + int i; \ + for (i = 0; i < ENET_NUM_OCTETS_PER_ADDRESS; i++) \ + (_enet_addr)[i] = (uint8_t)((_addr64) >> ((5-i)*8));\ + } while (0) + +#endif /* __FSL_ENET_H */ diff --git a/sys/contrib/ncsw/inc/flib/fsl_fman.h b/sys/contrib/ncsw/inc/flib/fsl_fman.h new file mode 100755 index 000000000000..96a63fa7f283 --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/fsl_fman.h @@ -0,0 +1,825 @@ +/* + * Copyright 2013 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __FSL_FMAN_H +#define __FSL_FMAN_H + +#include "common/general.h" + +struct fman_ext_pool_params { + uint8_t id; /**< External buffer pool id */ + uint16_t size; /**< External buffer pool buffer size */ +}; + +struct fman_ext_pools { + uint8_t num_pools_used; /**< Number of pools use by this port */ + struct fman_ext_pool_params *ext_buf_pool; + /**< Parameters for each port */ +}; + +struct fman_backup_bm_pools { + uint8_t num_backup_pools; /**< Number of BM backup pools - + must be smaller than the total number + of pools defined for the specified + port.*/ + uint8_t *pool_ids; /**< numOfBackupPools pool id's, + specifying which pools should be used + only as backup. Pool id's specified + here must be a subset of the pools + used by the specified port.*/ +}; + +/**************************************************************************//** + @Description A structure for defining BM pool depletion criteria +*//***************************************************************************/ +struct fman_buf_pool_depletion { + bool buf_pool_depletion_enabled; + bool pools_grp_mode_enable; /**< select mode in which pause frames + will be sent after a number of pools + (all together!) are depleted */ + uint8_t num_pools; /**< the number of depleted pools that + will invoke pause frames transmission. + */ + bool *pools_to_consider; /**< For each pool, TRUE if it should be + considered for depletion (Note - this + pool must be used by this port!). */ + bool single_pool_mode_enable; /**< select mode in which pause frames + will be sent after a single-pool + is depleted; */ + bool *pools_to_consider_for_single_mode; + /**< For each pool, TRUE if it should be + considered for depletion (Note - this + pool must be used by this port!) */ + bool has_pfc_priorities; + bool *pfc_priorities_en; /**< This field is used by the MAC as + the Priority Enable Vector in the PFC + frame which is transmitted */ +}; + +/**************************************************************************//** + @Description Enum for defining port DMA swap mode +*//***************************************************************************/ +enum fman_dma_swap_option { + FMAN_DMA_NO_SWP, /**< No swap, transfer data as is.*/ + FMAN_DMA_SWP_PPC_LE, /**< The transferred data should be swapped + in PowerPc Little Endian mode. */ + FMAN_DMA_SWP_BE /**< The transferred data should be swapped + in Big Endian mode */ +}; + +/**************************************************************************//** + @Description Enum for defining port DMA cache attributes +*//***************************************************************************/ +enum fman_dma_cache_option { + FMAN_DMA_NO_STASH = 0, /**< Cacheable, no Allocate (No Stashing) */ + FMAN_DMA_STASH = 1 /**< Cacheable and Allocate (Stashing on) */ +}; + +typedef struct t_FmPrsResult fm_prs_result_t; +typedef enum e_EnetMode enet_mode_t; +typedef t_Handle handle_t; + +struct fman_revision_info { + uint8_t majorRev; /**< Major revision */ + uint8_t minorRev; /**< Minor revision */ +}; + +/* sizes */ +#define CAPWAP_FRAG_EXTRA_SPACE 32 +#define OFFSET_UNITS 16 +#define MAX_INT_OFFSET 240 +#define MAX_IC_SIZE 256 +#define MAX_EXT_OFFSET 496 +#define MAX_EXT_BUFFER_OFFSET 511 + +/************************************************************************** + @Description Memory Mapped Registers +***************************************************************************/ +#define FMAN_LIODN_TBL 64 /* size of LIODN table */ + +struct fman_fpm_regs { + uint32_t fmfp_tnc; /**< FPM TNUM Control 0x00 */ + uint32_t fmfp_prc; /**< FPM Port_ID FmCtl Association 0x04 */ + uint32_t fmfp_brkc; /**< FPM Breakpoint Control 0x08 */ + uint32_t fmfp_mxd; /**< FPM Flush Control 0x0c */ + uint32_t fmfp_dist1; /**< FPM Dispatch Thresholds1 0x10 */ + uint32_t fmfp_dist2; /**< FPM Dispatch Thresholds2 0x14 */ + uint32_t fm_epi; /**< FM Error Pending Interrupts 0x18 */ + uint32_t fm_rie; /**< FM Error Interrupt Enable 0x1c */ + uint32_t fmfp_fcev[4]; /**< FPM FMan-Controller Event 1-4 0x20-0x2f */ + uint32_t res0030[4]; /**< res 0x30 - 0x3f */ + uint32_t fmfp_cee[4]; /**< PM FMan-Controller Event 1-4 0x40-0x4f */ + uint32_t res0050[4]; /**< res 0x50-0x5f */ + uint32_t fmfp_tsc1; /**< FPM TimeStamp Control1 0x60 */ + uint32_t fmfp_tsc2; /**< FPM TimeStamp Control2 0x64 */ + uint32_t fmfp_tsp; /**< FPM Time Stamp 0x68 */ + uint32_t fmfp_tsf; /**< FPM Time Stamp Fraction 0x6c */ + uint32_t fm_rcr; /**< FM Rams Control 0x70 */ + uint32_t fmfp_extc; /**< FPM External Requests Control 0x74 */ + uint32_t fmfp_ext1; /**< FPM External Requests Config1 0x78 */ + uint32_t fmfp_ext2; /**< FPM External Requests Config2 0x7c */ + uint32_t fmfp_drd[16]; /**< FPM Data_Ram Data 0-15 0x80 - 0xbf */ + uint32_t fmfp_dra; /**< FPM Data Ram Access 0xc0 */ + uint32_t fm_ip_rev_1; /**< FM IP Block Revision 1 0xc4 */ + uint32_t fm_ip_rev_2; /**< FM IP Block Revision 2 0xc8 */ + uint32_t fm_rstc; /**< FM Reset Command 0xcc */ + uint32_t fm_cld; /**< FM Classifier Debug 0xd0 */ + uint32_t fm_npi; /**< FM Normal Pending Interrupts 0xd4 */ + uint32_t fmfp_exte; /**< FPM External Requests Enable 0xd8 */ + uint32_t fmfp_ee; /**< FPM Event & Mask 0xdc */ + uint32_t fmfp_cev[4]; /**< FPM CPU Event 1-4 0xe0-0xef */ + uint32_t res00f0[4]; /**< res 0xf0-0xff */ + uint32_t fmfp_ps[64]; /**< FPM Port Status 0x100-0x1ff */ + uint32_t fmfp_clfabc; /**< FPM CLFABC 0x200 */ + uint32_t fmfp_clfcc; /**< FPM CLFCC 0x204 */ + uint32_t fmfp_clfaval; /**< FPM CLFAVAL 0x208 */ + uint32_t fmfp_clfbval; /**< FPM CLFBVAL 0x20c */ + uint32_t fmfp_clfcval; /**< FPM CLFCVAL 0x210 */ + uint32_t fmfp_clfamsk; /**< FPM CLFAMSK 0x214 */ + uint32_t fmfp_clfbmsk; /**< FPM CLFBMSK 0x218 */ + uint32_t fmfp_clfcmsk; /**< FPM CLFCMSK 0x21c */ + uint32_t fmfp_clfamc; /**< FPM CLFAMC 0x220 */ + uint32_t fmfp_clfbmc; /**< FPM CLFBMC 0x224 */ + uint32_t fmfp_clfcmc; /**< FPM CLFCMC 0x228 */ + uint32_t fmfp_decceh; /**< FPM DECCEH 0x22c */ + uint32_t res0230[116]; /**< res 0x230 - 0x3ff */ + uint32_t fmfp_ts[128]; /**< 0x400: FPM Task Status 0x400 - 0x5ff */ + uint32_t res0600[0x400 - 384]; +}; + +struct fman_bmi_regs { + uint32_t fmbm_init; /**< BMI Initialization 0x00 */ + uint32_t fmbm_cfg1; /**< BMI Configuration 1 0x04 */ + uint32_t fmbm_cfg2; /**< BMI Configuration 2 0x08 */ + uint32_t res000c[5]; /**< 0x0c - 0x1f */ + uint32_t fmbm_ievr; /**< Interrupt Event Register 0x20 */ + uint32_t fmbm_ier; /**< Interrupt Enable Register 0x24 */ + uint32_t fmbm_ifr; /**< Interrupt Force Register 0x28 */ + uint32_t res002c[5]; /**< 0x2c - 0x3f */ + uint32_t fmbm_arb[8]; /**< BMI Arbitration 0x40 - 0x5f */ + uint32_t res0060[12]; /**<0x60 - 0x8f */ + uint32_t fmbm_dtc[3]; /**< Debug Trap Counter 0x90 - 0x9b */ + uint32_t res009c; /**< 0x9c */ + uint32_t fmbm_dcv[3][4]; /**< Debug Compare val 0xa0-0xcf */ + uint32_t fmbm_dcm[3][4]; /**< Debug Compare Mask 0xd0-0xff */ + uint32_t fmbm_gde; /**< BMI Global Debug Enable 0x100 */ + uint32_t fmbm_pp[63]; /**< BMI Port Parameters 0x104 - 0x1ff */ + uint32_t res0200; /**< 0x200 */ + uint32_t fmbm_pfs[63]; /**< BMI Port FIFO Size 0x204 - 0x2ff */ + uint32_t res0300; /**< 0x300 */ + uint32_t fmbm_spliodn[63]; /**< Port Partition ID 0x304 - 0x3ff */ +}; + +struct fman_qmi_regs { + uint32_t fmqm_gc; /**< General Configuration Register 0x00 */ + uint32_t res0004; /**< 0x04 */ + uint32_t fmqm_eie; /**< Error Interrupt Event Register 0x08 */ + uint32_t fmqm_eien; /**< Error Interrupt Enable Register 0x0c */ + uint32_t fmqm_eif; /**< Error Interrupt Force Register 0x10 */ + uint32_t fmqm_ie; /**< Interrupt Event Register 0x14 */ + uint32_t fmqm_ien; /**< Interrupt Enable Register 0x18 */ + uint32_t fmqm_if; /**< Interrupt Force Register 0x1c */ + uint32_t fmqm_gs; /**< Global Status Register 0x20 */ + uint32_t fmqm_ts; /**< Task Status Register 0x24 */ + uint32_t fmqm_etfc; /**< Enqueue Total Frame Counter 0x28 */ + uint32_t fmqm_dtfc; /**< Dequeue Total Frame Counter 0x2c */ + uint32_t fmqm_dc0; /**< Dequeue Counter 0 0x30 */ + uint32_t fmqm_dc1; /**< Dequeue Counter 1 0x34 */ + uint32_t fmqm_dc2; /**< Dequeue Counter 2 0x38 */ + uint32_t fmqm_dc3; /**< Dequeue Counter 3 0x3c */ + uint32_t fmqm_dfdc; /**< Dequeue FQID from Default Counter 0x40 */ + uint32_t fmqm_dfcc; /**< Dequeue FQID from Context Counter 0x44 */ + uint32_t fmqm_dffc; /**< Dequeue FQID from FD Counter 0x48 */ + uint32_t fmqm_dcc; /**< Dequeue Confirm Counter 0x4c */ + uint32_t res0050[7]; /**< 0x50 - 0x6b */ + uint32_t fmqm_tapc; /**< Tnum Aging Period Control 0x6c */ + uint32_t fmqm_dmcvc; /**< Dequeue MAC Command Valid Counter 0x70 */ + uint32_t fmqm_difdcc; /**< Dequeue Invalid FD Command Counter 0x74 */ + uint32_t fmqm_da1v; /**< Dequeue A1 Valid Counter 0x78 */ + uint32_t res007c; /**< 0x7c */ + uint32_t fmqm_dtc; /**< 0x80 Debug Trap Counter 0x80 */ + uint32_t fmqm_efddd; /**< 0x84 Enqueue Frame desc Dynamic dbg 0x84 */ + uint32_t res0088[2]; /**< 0x88 - 0x8f */ + struct { + uint32_t fmqm_dtcfg1; /**< 0x90 dbg trap cfg 1 Register 0x00 */ + uint32_t fmqm_dtval1; /**< Debug Trap Value 1 Register 0x04 */ + uint32_t fmqm_dtm1; /**< Debug Trap Mask 1 Register 0x08 */ + uint32_t fmqm_dtc1; /**< Debug Trap Counter 1 Register 0x0c */ + uint32_t fmqm_dtcfg2; /**< dbg Trap cfg 2 Register 0x10 */ + uint32_t fmqm_dtval2; /**< Debug Trap Value 2 Register 0x14 */ + uint32_t fmqm_dtm2; /**< Debug Trap Mask 2 Register 0x18 */ + uint32_t res001c; /**< 0x1c */ + } dbg_traps[3]; /**< 0x90 - 0xef */ + uint8_t res00f0[0x400 - 0xf0]; /**< 0xf0 - 0x3ff */ +}; + +struct fman_dma_regs { + uint32_t fmdmsr; /**< FM DMA status register 0x00 */ + uint32_t fmdmmr; /**< FM DMA mode register 0x04 */ + uint32_t fmdmtr; /**< FM DMA bus threshold register 0x08 */ + uint32_t fmdmhy; /**< FM DMA bus hysteresis register 0x0c */ + uint32_t fmdmsetr; /**< FM DMA SOS emergency Threshold Register 0x10 */ + uint32_t fmdmtah; /**< FM DMA transfer bus address high reg 0x14 */ + uint32_t fmdmtal; /**< FM DMA transfer bus address low reg 0x18 */ + uint32_t fmdmtcid; /**< FM DMA transfer bus communication ID reg 0x1c */ + uint32_t fmdmra; /**< FM DMA bus internal ram address register 0x20 */ + uint32_t fmdmrd; /**< FM DMA bus internal ram data register 0x24 */ + uint32_t fmdmwcr; /**< FM DMA CAM watchdog counter value 0x28 */ + uint32_t fmdmebcr; /**< FM DMA CAM base in MURAM register 0x2c */ + uint32_t fmdmccqdr; /**< FM DMA CAM and CMD Queue Debug reg 0x30 */ + uint32_t fmdmccqvr1; /**< FM DMA CAM and CMD Queue Value reg #1 0x34 */ + uint32_t fmdmccqvr2; /**< FM DMA CAM and CMD Queue Value reg #2 0x38 */ + uint32_t fmdmcqvr3; /**< FM DMA CMD Queue Value register #3 0x3c */ + uint32_t fmdmcqvr4; /**< FM DMA CMD Queue Value register #4 0x40 */ + uint32_t fmdmcqvr5; /**< FM DMA CMD Queue Value register #5 0x44 */ + uint32_t fmdmsefrc; /**< FM DMA Semaphore Entry Full Reject Cntr 0x48 */ + uint32_t fmdmsqfrc; /**< FM DMA Semaphore Queue Full Reject Cntr 0x4c */ + uint32_t fmdmssrc; /**< FM DMA Semaphore SYNC Reject Counter 0x50 */ + uint32_t fmdmdcr; /**< FM DMA Debug Counter 0x54 */ + uint32_t fmdmemsr; /**< FM DMA Emergency Smoother Register 0x58 */ + uint32_t res005c; /**< 0x5c */ + uint32_t fmdmplr[FMAN_LIODN_TBL / 2]; /**< DMA LIODN regs 0x60-0xdf */ + uint32_t res00e0[0x400 - 56]; +}; + +struct fman_rg { + struct fman_fpm_regs *fpm_rg; + struct fman_dma_regs *dma_rg; + struct fman_bmi_regs *bmi_rg; + struct fman_qmi_regs *qmi_rg; +}; + +enum fman_dma_cache_override { + E_FMAN_DMA_NO_CACHE_OR = 0, /**< No override of the Cache field */ + E_FMAN_DMA_NO_STASH_DATA, /**< No data stashing in system level cache */ + E_FMAN_DMA_MAY_STASH_DATA, /**< Stashing allowed in sys level cache */ + E_FMAN_DMA_STASH_DATA /**< Stashing performed in system level cache */ +}; + +enum fman_dma_aid_mode { + E_FMAN_DMA_AID_OUT_PORT_ID = 0, /**< 4 LSB of PORT_ID */ + E_FMAN_DMA_AID_OUT_TNUM /**< 4 LSB of TNUM */ +}; + +enum fman_dma_dbg_cnt_mode { + E_FMAN_DMA_DBG_NO_CNT = 0, /**< No counting */ + E_FMAN_DMA_DBG_CNT_DONE, /**< Count DONE commands */ + E_FMAN_DMA_DBG_CNT_COMM_Q_EM, /**< command Q emergency signal */ + E_FMAN_DMA_DBG_CNT_INT_READ_EM, /**< Read buf emergency signal */ + E_FMAN_DMA_DBG_CNT_INT_WRITE_EM, /**< Write buf emergency signal */ + E_FMAN_DMA_DBG_CNT_FPM_WAIT, /**< FPM WAIT signal */ + E_FMAN_DMA_DBG_CNT_SIGLE_BIT_ECC, /**< Single bit ECC errors */ + E_FMAN_DMA_DBG_CNT_RAW_WAR_PROT /**< RAW & WAR protection counter */ +}; + +enum fman_dma_emergency_level { + E_FMAN_DMA_EM_EBS = 0, /**< EBS emergency */ + E_FMAN_DMA_EM_SOS /**< SOS emergency */ +}; + +enum fman_catastrophic_err { + E_FMAN_CATAST_ERR_STALL_PORT = 0, /**< Port_ID stalled reset required */ + E_FMAN_CATAST_ERR_STALL_TASK /**< Only erroneous task is stalled */ +}; + +enum fman_dma_err { + E_FMAN_DMA_ERR_CATASTROPHIC = 0, /**< Catastrophic DMA error */ + E_FMAN_DMA_ERR_REPORT /**< Reported DMA error */ +}; + +struct fman_cfg { + uint16_t liodn_bs_pr_port[FMAN_LIODN_TBL];/* base per port */ + bool en_counters; + uint8_t disp_limit_tsh; + uint8_t prs_disp_tsh; + uint8_t plcr_disp_tsh; + uint8_t kg_disp_tsh; + uint8_t bmi_disp_tsh; + uint8_t qmi_enq_disp_tsh; + uint8_t qmi_deq_disp_tsh; + uint8_t fm_ctl1_disp_tsh; + uint8_t fm_ctl2_disp_tsh; + enum fman_dma_cache_override dma_cache_override; + enum fman_dma_aid_mode dma_aid_mode; + bool dma_aid_override; + uint8_t dma_axi_dbg_num_of_beats; + uint8_t dma_cam_num_of_entries; + uint32_t dma_watchdog; + uint8_t dma_comm_qtsh_asrt_emer; + uint8_t dma_write_buf_tsh_asrt_emer; + uint8_t dma_read_buf_tsh_asrt_emer; + uint8_t dma_comm_qtsh_clr_emer; + uint8_t dma_write_buf_tsh_clr_emer; + uint8_t dma_read_buf_tsh_clr_emer; + uint32_t dma_sos_emergency; + enum fman_dma_dbg_cnt_mode dma_dbg_cnt_mode; + bool dma_stop_on_bus_error; + bool dma_en_emergency; + uint32_t dma_emergency_bus_select; + enum fman_dma_emergency_level dma_emergency_level; + bool dma_en_emergency_smoother; + uint32_t dma_emergency_switch_counter; + bool halt_on_external_activ; + bool halt_on_unrecov_ecc_err; + enum fman_catastrophic_err catastrophic_err; + enum fman_dma_err dma_err; + bool en_muram_test_mode; + bool en_iram_test_mode; + bool external_ecc_rams_enable; + uint16_t tnum_aging_period; + uint32_t exceptions; + uint16_t clk_freq; + bool pedantic_dma; + uint32_t cam_base_addr; + uint32_t fifo_base_addr; + uint32_t total_fifo_size; + uint8_t total_num_of_tasks; + bool qmi_deq_option_support; + uint32_t qmi_def_tnums_thresh; + bool fman_partition_array; + uint8_t num_of_fman_ctrl_evnt_regs; +}; + +/**************************************************************************//** + @Description Exceptions +*//***************************************************************************/ +#define FMAN_EX_DMA_BUS_ERROR 0x80000000 +#define FMAN_EX_DMA_READ_ECC 0x40000000 +#define FMAN_EX_DMA_SYSTEM_WRITE_ECC 0x20000000 +#define FMAN_EX_DMA_FM_WRITE_ECC 0x10000000 +#define FMAN_EX_FPM_STALL_ON_TASKS 0x08000000 +#define FMAN_EX_FPM_SINGLE_ECC 0x04000000 +#define FMAN_EX_FPM_DOUBLE_ECC 0x02000000 +#define FMAN_EX_QMI_SINGLE_ECC 0x01000000 +#define FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID 0x00800000 +#define FMAN_EX_QMI_DOUBLE_ECC 0x00400000 +#define FMAN_EX_BMI_LIST_RAM_ECC 0x00200000 +#define FMAN_EX_BMI_PIPELINE_ECC 0x00100000 +#define FMAN_EX_BMI_STATISTICS_RAM_ECC 0x00080000 +#define FMAN_EX_IRAM_ECC 0x00040000 +#define FMAN_EX_NURAM_ECC 0x00020000 +#define FMAN_EX_BMI_DISPATCH_RAM_ECC 0x00010000 + +enum fman_exceptions { + E_FMAN_EX_DMA_BUS_ERROR = 0, /**< DMA bus error. */ + E_FMAN_EX_DMA_READ_ECC, /**< Read Buffer ECC error */ + E_FMAN_EX_DMA_SYSTEM_WRITE_ECC, /**< Write Buffer ECC err on sys side */ + E_FMAN_EX_DMA_FM_WRITE_ECC, /**< Write Buffer ECC error on FM side */ + E_FMAN_EX_FPM_STALL_ON_TASKS, /**< Stall of tasks on FPM */ + E_FMAN_EX_FPM_SINGLE_ECC, /**< Single ECC on FPM. */ + E_FMAN_EX_FPM_DOUBLE_ECC, /**< Double ECC error on FPM ram access */ + E_FMAN_EX_QMI_SINGLE_ECC, /**< Single ECC on QMI. */ + E_FMAN_EX_QMI_DOUBLE_ECC, /**< Double bit ECC occurred on QMI */ + E_FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID,/**< DeQ from unknown port id */ + E_FMAN_EX_BMI_LIST_RAM_ECC, /**< Linked List RAM ECC error */ + E_FMAN_EX_BMI_STORAGE_PROFILE_ECC, /**< storage profile */ + E_FMAN_EX_BMI_STATISTICS_RAM_ECC, /**< Statistics RAM ECC Err Enable */ + E_FMAN_EX_BMI_DISPATCH_RAM_ECC, /**< Dispatch RAM ECC Error Enable */ + E_FMAN_EX_IRAM_ECC, /**< Double bit ECC occurred on IRAM*/ + E_FMAN_EX_MURAM_ECC /**< Double bit ECC occurred on MURAM*/ +}; + +enum fman_counters { + E_FMAN_COUNTERS_ENQ_TOTAL_FRAME = 0, /**< QMI tot enQ frames counter */ + E_FMAN_COUNTERS_DEQ_TOTAL_FRAME, /**< QMI tot deQ frames counter */ + E_FMAN_COUNTERS_DEQ_0, /**< QMI 0 frames from QMan counter */ + E_FMAN_COUNTERS_DEQ_1, /**< QMI 1 frames from QMan counter */ + E_FMAN_COUNTERS_DEQ_2, /**< QMI 2 frames from QMan counter */ + E_FMAN_COUNTERS_DEQ_3, /**< QMI 3 frames from QMan counter */ + E_FMAN_COUNTERS_DEQ_FROM_DEFAULT, /**< QMI deQ from dflt queue cntr */ + E_FMAN_COUNTERS_DEQ_FROM_CONTEXT, /**< QMI deQ from FQ context cntr */ + E_FMAN_COUNTERS_DEQ_FROM_FD, /**< QMI deQ from FD command field cntr */ + E_FMAN_COUNTERS_DEQ_CONFIRM, /**< QMI dequeue confirm counter */ + E_FMAN_COUNTERS_SEMAPHOR_ENTRY_FULL_REJECT, /**< DMA full entry cntr */ + E_FMAN_COUNTERS_SEMAPHOR_QUEUE_FULL_REJECT, /**< DMA full CAM Q cntr */ + E_FMAN_COUNTERS_SEMAPHOR_SYNC_REJECT /**< DMA sync counter */ +}; + +#define FPM_PRT_FM_CTL1 0x00000001 +#define FPM_PRT_FM_CTL2 0x00000002 + +/**************************************************************************//** + @Description DMA definitions +*//***************************************************************************/ + +/* masks */ +#define DMA_MODE_AID_OR 0x20000000 +#define DMA_MODE_SBER 0x10000000 +#define DMA_MODE_BER 0x00200000 +#define DMA_MODE_EB 0x00100000 +#define DMA_MODE_ECC 0x00000020 +#define DMA_MODE_PRIVILEGE_PROT 0x00001000 +#define DMA_MODE_SECURE_PROT 0x00000800 +#define DMA_MODE_EMER_READ 0x00080000 +#define DMA_MODE_EMER_WRITE 0x00040000 +#define DMA_MODE_CACHE_OR_MASK 0xC0000000 +#define DMA_MODE_CEN_MASK 0x0000E000 +#define DMA_MODE_DBG_MASK 0x00000380 +#define DMA_MODE_AXI_DBG_MASK 0x0F000000 + +#define DMA_EMSR_EMSTR_MASK 0x0000FFFF + +#define DMA_TRANSFER_PORTID_MASK 0xFF000000 +#define DMA_TRANSFER_TNUM_MASK 0x00FF0000 +#define DMA_TRANSFER_LIODN_MASK 0x00000FFF + +#define DMA_HIGH_LIODN_MASK 0x0FFF0000 +#define DMA_LOW_LIODN_MASK 0x00000FFF + +#define DMA_STATUS_CMD_QUEUE_NOT_EMPTY 0x10000000 +#define DMA_STATUS_BUS_ERR 0x08000000 +#define DMA_STATUS_READ_ECC 0x04000000 +#define DMA_STATUS_SYSTEM_WRITE_ECC 0x02000000 +#define DMA_STATUS_FM_WRITE_ECC 0x01000000 +#define DMA_STATUS_SYSTEM_DPEXT_ECC 0x00800000 +#define DMA_STATUS_FM_DPEXT_ECC 0x00400000 +#define DMA_STATUS_SYSTEM_DPDAT_ECC 0x00200000 +#define DMA_STATUS_FM_DPDAT_ECC 0x00100000 +#define DMA_STATUS_FM_SPDAT_ECC 0x00080000 + +#define FM_LIODN_BASE_MASK 0x00000FFF + +/* shifts */ +#define DMA_MODE_CACHE_OR_SHIFT 30 +#define DMA_MODE_BUS_PRI_SHIFT 16 +#define DMA_MODE_AXI_DBG_SHIFT 24 +#define DMA_MODE_CEN_SHIFT 13 +#define DMA_MODE_BUS_PROT_SHIFT 10 +#define DMA_MODE_DBG_SHIFT 7 +#define DMA_MODE_EMER_LVL_SHIFT 6 +#define DMA_MODE_AID_MODE_SHIFT 4 +#define DMA_MODE_MAX_AXI_DBG_NUM_OF_BEATS 16 +#define DMA_MODE_MAX_CAM_NUM_OF_ENTRIES 32 + +#define DMA_THRESH_COMMQ_SHIFT 24 +#define DMA_THRESH_READ_INT_BUF_SHIFT 16 + +#define DMA_LIODN_SHIFT 16 + +#define DMA_TRANSFER_PORTID_SHIFT 24 +#define DMA_TRANSFER_TNUM_SHIFT 16 + +/* sizes */ +#define DMA_MAX_WATCHDOG 0xffffffff + +/* others */ +#define DMA_CAM_SIZEOF_ENTRY 0x40 +#define DMA_CAM_ALIGN 0x1000 +#define DMA_CAM_UNITS 8 + +/**************************************************************************//** + @Description General defines +*//***************************************************************************/ + +#define FM_DEBUG_STATUS_REGISTER_OFFSET 0x000d1084UL +#define FM_UCODE_DEBUG_INSTRUCTION 0x6ffff805UL + +/**************************************************************************//** + @Description FPM defines +*//***************************************************************************/ + +/* masks */ +#define FPM_EV_MASK_DOUBLE_ECC 0x80000000 +#define FPM_EV_MASK_STALL 0x40000000 +#define FPM_EV_MASK_SINGLE_ECC 0x20000000 +#define FPM_EV_MASK_RELEASE_FM 0x00010000 +#define FPM_EV_MASK_DOUBLE_ECC_EN 0x00008000 +#define FPM_EV_MASK_STALL_EN 0x00004000 +#define FPM_EV_MASK_SINGLE_ECC_EN 0x00002000 +#define FPM_EV_MASK_EXTERNAL_HALT 0x00000008 +#define FPM_EV_MASK_ECC_ERR_HALT 0x00000004 + +#define FPM_RAM_RAMS_ECC_EN 0x80000000 +#define FPM_RAM_IRAM_ECC_EN 0x40000000 +#define FPM_RAM_MURAM_ECC 0x00008000 +#define FPM_RAM_IRAM_ECC 0x00004000 +#define FPM_RAM_MURAM_TEST_ECC 0x20000000 +#define FPM_RAM_IRAM_TEST_ECC 0x10000000 +#define FPM_RAM_RAMS_ECC_EN_SRC_SEL 0x08000000 + +#define FPM_IRAM_ECC_ERR_EX_EN 0x00020000 +#define FPM_MURAM_ECC_ERR_EX_EN 0x00040000 + +#define FPM_REV1_MAJOR_MASK 0x0000FF00 +#define FPM_REV1_MINOR_MASK 0x000000FF + +#define FPM_REV2_INTEG_MASK 0x00FF0000 +#define FPM_REV2_ERR_MASK 0x0000FF00 +#define FPM_REV2_CFG_MASK 0x000000FF + +#define FPM_TS_FRACTION_MASK 0x0000FFFF +#define FPM_TS_CTL_EN 0x80000000 + +#define FPM_PRC_REALSE_STALLED 0x00800000 + +#define FPM_PS_STALLED 0x00800000 +#define FPM_PS_FM_CTL1_SEL 0x80000000 +#define FPM_PS_FM_CTL2_SEL 0x40000000 +#define FPM_PS_FM_CTL_SEL_MASK (FPM_PS_FM_CTL1_SEL | FPM_PS_FM_CTL2_SEL) + +#define FPM_RSTC_FM_RESET 0x80000000 +#define FPM_RSTC_10G0_RESET 0x04000000 +#define FPM_RSTC_1G0_RESET 0x40000000 +#define FPM_RSTC_1G1_RESET 0x20000000 +#define FPM_RSTC_1G2_RESET 0x10000000 +#define FPM_RSTC_1G3_RESET 0x08000000 +#define FPM_RSTC_1G4_RESET 0x02000000 + + +#define FPM_DISP_LIMIT_MASK 0x1F000000 +#define FPM_THR1_PRS_MASK 0xFF000000 +#define FPM_THR1_KG_MASK 0x00FF0000 +#define FPM_THR1_PLCR_MASK 0x0000FF00 +#define FPM_THR1_BMI_MASK 0x000000FF + +#define FPM_THR2_QMI_ENQ_MASK 0xFF000000 +#define FPM_THR2_QMI_DEQ_MASK 0x000000FF +#define FPM_THR2_FM_CTL1_MASK 0x00FF0000 +#define FPM_THR2_FM_CTL2_MASK 0x0000FF00 + +/* shifts */ +#define FPM_DISP_LIMIT_SHIFT 24 + +#define FPM_THR1_PRS_SHIFT 24 +#define FPM_THR1_KG_SHIFT 16 +#define FPM_THR1_PLCR_SHIFT 8 +#define FPM_THR1_BMI_SHIFT 0 + +#define FPM_THR2_QMI_ENQ_SHIFT 24 +#define FPM_THR2_QMI_DEQ_SHIFT 0 +#define FPM_THR2_FM_CTL1_SHIFT 16 +#define FPM_THR2_FM_CTL2_SHIFT 8 + +#define FPM_EV_MASK_CAT_ERR_SHIFT 1 +#define FPM_EV_MASK_DMA_ERR_SHIFT 0 + +#define FPM_REV1_MAJOR_SHIFT 8 +#define FPM_REV1_MINOR_SHIFT 0 + +#define FPM_REV2_INTEG_SHIFT 16 +#define FPM_REV2_ERR_SHIFT 8 +#define FPM_REV2_CFG_SHIFT 0 + +#define FPM_TS_INT_SHIFT 16 + +#define FPM_PORT_FM_CTL_PORTID_SHIFT 24 + +#define FPM_PS_FM_CTL_SEL_SHIFT 30 +#define FPM_PRC_ORA_FM_CTL_SEL_SHIFT 16 + +#define FPM_DISP_LIMIT_SHIFT 24 + +/* Interrupts defines */ +#define FPM_EVENT_FM_CTL_0 0x00008000 +#define FPM_EVENT_FM_CTL 0x0000FF00 +#define FPM_EVENT_FM_CTL_BRK 0x00000080 + +/* others */ +#define FPM_MAX_DISP_LIMIT 31 +#define FPM_RSTC_FM_RESET 0x80000000 +#define FPM_RSTC_1G0_RESET 0x40000000 +#define FPM_RSTC_1G1_RESET 0x20000000 +#define FPM_RSTC_1G2_RESET 0x10000000 +#define FPM_RSTC_1G3_RESET 0x08000000 +#define FPM_RSTC_10G0_RESET 0x04000000 +#define FPM_RSTC_1G4_RESET 0x02000000 +#define FPM_RSTC_1G5_RESET 0x01000000 +#define FPM_RSTC_1G6_RESET 0x00800000 +#define FPM_RSTC_1G7_RESET 0x00400000 +#define FPM_RSTC_10G1_RESET 0x00200000 +/**************************************************************************//** + @Description BMI defines +*//***************************************************************************/ +/* masks */ +#define BMI_INIT_START 0x80000000 +#define BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC 0x80000000 +#define BMI_ERR_INTR_EN_LIST_RAM_ECC 0x40000000 +#define BMI_ERR_INTR_EN_STATISTICS_RAM_ECC 0x20000000 +#define BMI_ERR_INTR_EN_DISPATCH_RAM_ECC 0x10000000 +#define BMI_NUM_OF_TASKS_MASK 0x3F000000 +#define BMI_NUM_OF_EXTRA_TASKS_MASK 0x000F0000 +#define BMI_NUM_OF_DMAS_MASK 0x00000F00 +#define BMI_NUM_OF_EXTRA_DMAS_MASK 0x0000000F +#define BMI_FIFO_SIZE_MASK 0x000003FF +#define BMI_EXTRA_FIFO_SIZE_MASK 0x03FF0000 +#define BMI_CFG2_DMAS_MASK 0x0000003F +#define BMI_TOTAL_FIFO_SIZE_MASK 0x07FF0000 +#define BMI_TOTAL_NUM_OF_TASKS_MASK 0x007F0000 + +/* shifts */ +#define BMI_CFG2_TASKS_SHIFT 16 +#define BMI_CFG2_DMAS_SHIFT 0 +#define BMI_CFG1_FIFO_SIZE_SHIFT 16 +#define BMI_FIFO_SIZE_SHIFT 0 +#define BMI_EXTRA_FIFO_SIZE_SHIFT 16 +#define BMI_NUM_OF_TASKS_SHIFT 24 +#define BMI_EXTRA_NUM_OF_TASKS_SHIFT 16 +#define BMI_NUM_OF_DMAS_SHIFT 8 +#define BMI_EXTRA_NUM_OF_DMAS_SHIFT 0 + +/* others */ +#define BMI_FIFO_ALIGN 0x100 +#define FMAN_BMI_FIFO_UNITS 0x100 + + +/**************************************************************************//** + @Description QMI defines +*//***************************************************************************/ +/* masks */ +#define QMI_CFG_ENQ_EN 0x80000000 +#define QMI_CFG_DEQ_EN 0x40000000 +#define QMI_CFG_EN_COUNTERS 0x10000000 +#define QMI_CFG_SOFT_RESET 0x01000000 +#define QMI_CFG_DEQ_MASK 0x0000003F +#define QMI_CFG_ENQ_MASK 0x00003F00 + +#define QMI_ERR_INTR_EN_DOUBLE_ECC 0x80000000 +#define QMI_ERR_INTR_EN_DEQ_FROM_DEF 0x40000000 +#define QMI_INTR_EN_SINGLE_ECC 0x80000000 + +/* shifts */ +#define QMI_CFG_ENQ_SHIFT 8 +#define QMI_TAPC_TAP 22 + +#define QMI_GS_HALT_NOT_BUSY 0x00000002 + +/**************************************************************************//** + @Description IRAM defines +*//***************************************************************************/ +/* masks */ +#define IRAM_IADD_AIE 0x80000000 +#define IRAM_READY 0x80000000 + +uint32_t fman_get_bmi_err_event(struct fman_bmi_regs *bmi_rg); +uint32_t fman_get_qmi_err_event(struct fman_qmi_regs *qmi_rg); +uint32_t fman_get_dma_com_id(struct fman_dma_regs *dma_rg); +uint64_t fman_get_dma_addr(struct fman_dma_regs *dma_rg); +uint32_t fman_get_dma_err_event(struct fman_dma_regs *dma_rg); +uint32_t fman_get_fpm_err_event(struct fman_fpm_regs *fpm_rg); +uint32_t fman_get_muram_err_event(struct fman_fpm_regs *fpm_rg); +uint32_t fman_get_iram_err_event(struct fman_fpm_regs *fpm_rg); +uint32_t fman_get_qmi_event(struct fman_qmi_regs *qmi_rg); +uint32_t fman_get_fpm_error_interrupts(struct fman_fpm_regs *fpm_rg); +uint32_t fman_get_ctrl_intr(struct fman_fpm_regs *fpm_rg, + uint8_t event_reg_id); +uint8_t fman_get_qmi_deq_th(struct fman_qmi_regs *qmi_rg); +uint8_t fman_get_qmi_enq_th(struct fman_qmi_regs *qmi_rg); +uint16_t fman_get_size_of_fifo(struct fman_bmi_regs *bmi_rg, uint8_t port_id); +uint32_t fman_get_total_fifo_size(struct fman_bmi_regs *bmi_rg); +uint16_t fman_get_size_of_extra_fifo(struct fman_bmi_regs *bmi_rg, + uint8_t port_id); +uint8_t fman_get_num_of_tasks(struct fman_bmi_regs *bmi_rg, uint8_t port_id); +uint8_t fman_get_num_extra_tasks(struct fman_bmi_regs *bmi_rg, + uint8_t port_id); +uint8_t fman_get_num_of_dmas(struct fman_bmi_regs *bmi_rg, uint8_t port_id); +uint8_t fman_get_num_extra_dmas(struct fman_bmi_regs *bmi_rg, + uint8_t port_id); +uint32_t fman_get_normal_pending(struct fman_fpm_regs *fpm_rg); +uint32_t fman_get_controller_event(struct fman_fpm_regs *fpm_rg, + uint8_t reg_id); +uint32_t fman_get_error_pending(struct fman_fpm_regs *fpm_rg); +void fman_get_revision(struct fman_fpm_regs *fpm_rg, uint8_t *major, + uint8_t *minor); +uint32_t fman_get_counter(struct fman_rg *fman_rg, + enum fman_counters reg_name); +uint32_t fman_get_dma_status(struct fman_dma_regs *dma_rg); + + +int fman_set_erratum_10gmac_a004_wa(struct fman_fpm_regs *fpm_rg); +void fman_set_ctrl_intr(struct fman_fpm_regs *fpm_rg, uint8_t event_reg_id, + uint32_t enable_events); +void fman_set_num_of_riscs_per_port(struct fman_fpm_regs *fpm_rg, + uint8_t port_id, + uint8_t num_fman_ctrls, + uint32_t or_fman_ctrl); +void fman_set_order_restoration_per_port(struct fman_fpm_regs *fpm_rg, + uint8_t port_id, + bool independent_mode, + bool is_rx_port); +void fman_set_qmi_enq_th(struct fman_qmi_regs *qmi_rg, uint8_t val); +void fman_set_qmi_deq_th(struct fman_qmi_regs *qmi_rg, uint8_t val); +void fman_set_liodn_per_port(struct fman_rg *fman_rg, + uint8_t port_id, + uint16_t liodn_base, + uint16_t liodn_offset); +void fman_set_size_of_fifo(struct fman_bmi_regs *bmi_rg, + uint8_t port_id, + uint32_t size_of_fifo, + uint32_t extra_size_of_fifo); +void fman_set_num_of_tasks(struct fman_bmi_regs *bmi_rg, + uint8_t port_id, + uint8_t num_of_tasks, + uint8_t num_of_extra_tasks); +void fman_set_num_of_open_dmas(struct fman_bmi_regs *bmi_rg, + uint8_t port_id, + uint8_t num_of_open_dmas, + uint8_t num_of_extra_open_dmas, + uint8_t total_num_of_dmas); +void fman_set_ports_bandwidth(struct fman_bmi_regs *bmi_rg, uint8_t *weights); +int fman_set_exception(struct fman_rg *fman_rg, + enum fman_exceptions exception, + bool enable); +void fman_set_dma_emergency(struct fman_dma_regs *dma_rg, bool is_write, + bool enable); +void fman_set_dma_ext_bus_pri(struct fman_dma_regs *dma_rg, uint32_t pri); +void fman_set_congestion_group_pfc_priority(uint32_t *cpg_rg, + uint32_t congestion_group_id, + uint8_t piority_bit_map, + uint32_t reg_num); + + +void fman_defconfig(struct fman_cfg *cfg, bool is_master); +void fman_regconfig(struct fman_rg *fman_rg, struct fman_cfg *cfg); +int fman_fpm_init(struct fman_fpm_regs *fpm_rg, struct fman_cfg *cfg); +int fman_bmi_init(struct fman_bmi_regs *bmi_rg, struct fman_cfg *cfg); +int fman_qmi_init(struct fman_qmi_regs *qmi_rg, struct fman_cfg *cfg); +int fman_dma_init(struct fman_dma_regs *dma_rg, struct fman_cfg *cfg); +void fman_free_resources(struct fman_rg *fman_rg); +int fman_enable(struct fman_rg *fman_rg, struct fman_cfg *cfg); +void fman_reset(struct fman_fpm_regs *fpm_rg); +void fman_resume(struct fman_fpm_regs *fpm_rg); + + +void fman_enable_time_stamp(struct fman_fpm_regs *fpm_rg, + uint8_t count1ubit, + uint16_t fm_clk_freq); +void fman_enable_rams_ecc(struct fman_fpm_regs *fpm_rg); +void fman_qmi_disable_dispatch_limit(struct fman_fpm_regs *fpm_rg); +void fman_disable_rams_ecc(struct fman_fpm_regs *fpm_rg); +void fman_resume_stalled_port(struct fman_fpm_regs *fpm_rg, uint8_t port_id); +int fman_reset_mac(struct fman_fpm_regs *fpm_rg, uint8_t macId, bool is_10g); +bool fman_is_port_stalled(struct fman_fpm_regs *fpm_rg, uint8_t port_id); +bool fman_rams_ecc_is_external_ctl(struct fman_fpm_regs *fpm_rg); +bool fman_is_qmi_halt_not_busy_state(struct fman_qmi_regs *qmi_rg); +int fman_modify_counter(struct fman_rg *fman_rg, + enum fman_counters reg_name, + uint32_t val); +void fman_force_intr(struct fman_rg *fman_rg, + enum fman_exceptions exception); +void fman_set_vsp_window(struct fman_bmi_regs *bmi_rg, + uint8_t port_id, + uint8_t base_storage_profile, + uint8_t log2_num_of_profiles); + +/**************************************************************************//** + @Description default values +*//***************************************************************************/ +#define DEFAULT_CATASTROPHIC_ERR E_FMAN_CATAST_ERR_STALL_PORT +#define DEFAULT_DMA_ERR E_FMAN_DMA_ERR_CATASTROPHIC +#define DEFAULT_HALT_ON_EXTERNAL_ACTIVATION FALSE /* do not change! if changed, must be disabled for rev1 ! */ +#define DEFAULT_HALT_ON_UNRECOVERABLE_ECC_ERROR FALSE /* do not change! if changed, must be disabled for rev1 ! */ +#define DEFAULT_EXTERNAL_ECC_RAMS_ENABLE FALSE +#define DEFAULT_AID_OVERRIDE FALSE +#define DEFAULT_AID_MODE E_FMAN_DMA_AID_OUT_TNUM +#define DEFAULT_DMA_COMM_Q_LOW 0x2A +#define DEFAULT_DMA_COMM_Q_HIGH 0x3F +#define DEFAULT_CACHE_OVERRIDE E_FMAN_DMA_NO_CACHE_OR +#define DEFAULT_DMA_CAM_NUM_OF_ENTRIES 64 +#define DEFAULT_DMA_DBG_CNT_MODE E_FMAN_DMA_DBG_NO_CNT +#define DEFAULT_DMA_EN_EMERGENCY FALSE +#define DEFAULT_DMA_SOS_EMERGENCY 0 +#define DEFAULT_DMA_WATCHDOG 0 /* disabled */ +#define DEFAULT_DMA_EN_EMERGENCY_SMOOTHER FALSE +#define DEFAULT_DMA_EMERGENCY_SWITCH_COUNTER 0 +#define DEFAULT_DISP_LIMIT 0 +#define DEFAULT_PRS_DISP_TH 16 +#define DEFAULT_PLCR_DISP_TH 16 +#define DEFAULT_KG_DISP_TH 16 +#define DEFAULT_BMI_DISP_TH 16 +#define DEFAULT_QMI_ENQ_DISP_TH 16 +#define DEFAULT_QMI_DEQ_DISP_TH 16 +#define DEFAULT_FM_CTL1_DISP_TH 16 +#define DEFAULT_FM_CTL2_DISP_TH 16 +#define DEFAULT_TNUM_AGING_PERIOD 4 + + +#endif /* __FSL_FMAN_H */ diff --git a/sys/contrib/ncsw/inc/flib/fsl_fman_dtsec.h b/sys/contrib/ncsw/inc/flib/fsl_fman_dtsec.h new file mode 100644 index 000000000000..6004e478081a --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/fsl_fman_dtsec.h @@ -0,0 +1,1096 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __FSL_FMAN_DTSEC_H +#define __FSL_FMAN_DTSEC_H + +#include "common/general.h" +#include "fsl_enet.h" + +/** + * DOC: dTSEC Init sequence + * + * To prepare dTSEC block for transfer use the following call sequence: + * + * - fman_dtsec_defconfig() - This step is optional and yet recommended. Its + * use is to obtain the default dTSEC configuration parameters. + * + * - Change dtsec configuration in &dtsec_cfg. This structure will be used + * to customize the dTSEC behavior. + * + * - fman_dtsec_init() - Applies the configuration on dTSEC hardware. Note that + * dTSEC is initialized while both Tx and Rx are disabled. + * + * - fman_dtsec_set_mac_address() - Set the station address (mac address). + * This is used by dTSEC to match against received packets. + * + * - fman_dtsec_adjust_link() - Set the link speed and duplex parameters + * after the PHY establishes the link. + * + * - dtsec_enable_tx() and dtsec_enable_rx() to enable transmission and + * reception. + */ + +/** + * DOC: dTSEC Graceful stop + * + * To temporary stop dTSEC activity use fman_dtsec_stop_tx() and + * fman_dtsec_stop_rx(). Note that these functions request dTSEC graceful stop + * but return before this stop is complete. To query for graceful stop + * completion use fman_dtsec_get_event() and check DTSEC_IEVENT_GTSC and + * DTSEC_IEVENT_GRSC bits. Alternatively the dTSEC interrupt mask can be set to + * enable graceful stop interrupts. + * + * To resume operation after graceful stop use fman_dtsec_start_tx() and + * fman_dtsec_start_rx(). + */ + +/** + * DOC: dTSEC interrupt handling + * + * This code does not provide an interrupt handler for dTSEC. Instead this + * handler should be implemented and registered to the operating system by the + * caller. Some primitives for accessing the event status and mask registers + * are provided. + * + * See "dTSEC Events" section for a list of events that dTSEC can generate. + */ + +/** + * DOC: dTSEC Events + * + * Interrupt events cause dTSEC event bits to be set. Software may poll the + * event register at any time to check for pending interrupts. If an event + * occurs and its corresponding enable bit is set in the interrupt mask + * register, the event also causes a hardware interrupt at the PIC. + * + * To poll for event status use the fman_dtsec_get_event() function. + * To configure the interrupt mask use fman_dtsec_enable_interrupt() and + * fman_dtsec_disable_interrupt() functions. + * After servicing a dTSEC interrupt use fman_dtsec_ack_event to reset the + * serviced event bit. + * + * The following events may be signaled by dTSEC hardware: + * + * %DTSEC_IEVENT_BABR - Babbling receive error. This bit indicates that + * a frame was received with length in excess of the MAC's maximum frame length + * register. + * + * %DTSEC_IEVENT_RXC - Receive control (pause frame) interrupt. A pause + * control frame was received while Rx pause frame handling is enabled. + * Also see fman_dtsec_handle_rx_pause(). + * + * %DTSEC_IEVENT_MSRO - MIB counter overflow. The count for one of the MIB + * counters has exceeded the size of its register. + * + * %DTSEC_IEVENT_GTSC - Graceful transmit stop complete. Graceful stop is now + * complete. The transmitter is in a stopped state, in which only pause frames + * can be transmitted. + * Also see fman_dtsec_stop_tx(). + * + * %DTSEC_IEVENT_BABT - Babbling transmit error. The transmitted frame length + * has exceeded the value in the MAC's Maximum Frame Length register. + * + * %DTSEC_IEVENT_TXC - Transmit control (pause frame) interrupt. his bit + * indicates that a control frame was transmitted. + * + * %DTSEC_IEVENT_TXE - Transmit error. This bit indicates that an error + * occurred on the transmitted channel. This bit is set whenever any transmit + * error occurs which causes the dTSEC to discard all or part of a frame + * (LC, CRL, XFUN). + * + * %DTSEC_IEVENT_LC - Late collision. This bit indicates that a collision + * occurred beyond the collision window (slot time) in half-duplex mode. + * The frame is truncated with a bad CRC and the remainder of the frame + * is discarded. + * + * %DTSEC_IEVENT_CRL - Collision retry limit. is bit indicates that the number + * of successive transmission collisions has exceeded the MAC's half-duplex + * register's retransmission maximum count. The frame is discarded without + * being transmitted and transmission of the next frame commences. This only + * occurs while in half-duplex mode. + * The number of retransmit attempts can be set in + * &dtsec_halfdup_cfg.@retransmit before calling fman_dtsec_init(). + * + * %DTSEC_IEVENT_XFUN - Transmit FIFO underrun. This bit indicates that the + * transmit FIFO became empty before the complete frame was transmitted. + * The frame is truncated with a bad CRC and the remainder of the frame is + * discarded. + * + * %DTSEC_IEVENT_MAG - TBD + * + * %DTSEC_IEVENT_MMRD - MII management read completion. + * + * %DTSEC_IEVENT_MMWR - MII management write completion. + * + * %DTSEC_IEVENT_GRSC - Graceful receive stop complete. It allows the user to + * know if the system has completed the stop and it is safe to write to receive + * registers (status, control or configuration registers) that are used by the + * system during normal operation. + * + * %DTSEC_IEVENT_TDPE - Internal data error on transmit. This bit indicates + * that the dTSEC has detected a parity error on its stored transmit data, which + * is likely to compromise the validity of recently transferred frames. + * + * %DTSEC_IEVENT_RDPE - Internal data error on receive. This bit indicates that + * the dTSEC has detected a parity error on its stored receive data, which is + * likely to compromise the validity of recently transferred frames. + */ +/* Interrupt Mask Register (IMASK) */ +#define DTSEC_IMASK_BREN 0x80000000 +#define DTSEC_IMASK_RXCEN 0x40000000 +#define DTSEC_IMASK_MSROEN 0x04000000 +#define DTSEC_IMASK_GTSCEN 0x02000000 +#define DTSEC_IMASK_BTEN 0x01000000 +#define DTSEC_IMASK_TXCEN 0x00800000 +#define DTSEC_IMASK_TXEEN 0x00400000 +#define DTSEC_IMASK_LCEN 0x00040000 +#define DTSEC_IMASK_CRLEN 0x00020000 +#define DTSEC_IMASK_XFUNEN 0x00010000 +#define DTSEC_IMASK_ABRTEN 0x00008000 +#define DTSEC_IMASK_IFERREN 0x00004000 +#define DTSEC_IMASK_MAGEN 0x00000800 +#define DTSEC_IMASK_MMRDEN 0x00000400 +#define DTSEC_IMASK_MMWREN 0x00000200 +#define DTSEC_IMASK_GRSCEN 0x00000100 +#define DTSEC_IMASK_TDPEEN 0x00000002 +#define DTSEC_IMASK_RDPEEN 0x00000001 + +#define DTSEC_EVENTS_MASK \ + ((uint32_t)(DTSEC_IMASK_BREN | \ + DTSEC_IMASK_RXCEN | \ + DTSEC_IMASK_BTEN | \ + DTSEC_IMASK_TXCEN | \ + DTSEC_IMASK_TXEEN | \ + DTSEC_IMASK_ABRTEN | \ + DTSEC_IMASK_LCEN | \ + DTSEC_IMASK_CRLEN | \ + DTSEC_IMASK_XFUNEN | \ + DTSEC_IMASK_IFERREN | \ + DTSEC_IMASK_MAGEN | \ + DTSEC_IMASK_TDPEEN | \ + DTSEC_IMASK_RDPEEN)) + +/* dtsec timestamp event bits */ +#define TMR_PEMASK_TSREEN 0x00010000 +#define TMR_PEVENT_TSRE 0x00010000 + +/* Group address bit indication */ +#define MAC_GROUP_ADDRESS 0x0000010000000000ULL +/* size in bytes of L2 address */ +#define MAC_ADDRLEN 6 + +#define DEFAULT_HALFDUP_ON FALSE +#define DEFAULT_HALFDUP_RETRANSMIT 0xf +#define DEFAULT_HALFDUP_COLL_WINDOW 0x37 +#define DEFAULT_HALFDUP_EXCESS_DEFER TRUE +#define DEFAULT_HALFDUP_NO_BACKOFF FALSE +#define DEFAULT_HALFDUP_BP_NO_BACKOFF FALSE +#define DEFAULT_HALFDUP_ALT_BACKOFF_VAL 0x0A +#define DEFAULT_HALFDUP_ALT_BACKOFF_EN FALSE +#define DEFAULT_RX_DROP_BCAST FALSE +#define DEFAULT_RX_SHORT_FRM TRUE +#define DEFAULT_RX_LEN_CHECK FALSE +#define DEFAULT_TX_PAD_CRC TRUE +#define DEFAULT_TX_CRC FALSE +#define DEFAULT_RX_CTRL_ACC FALSE +#define DEFAULT_TX_PAUSE_TIME 0xf000 +#define DEFAULT_TBIPA 5 +#define DEFAULT_RX_PREPEND 0 +#define DEFAULT_PTP_TSU_EN TRUE +#define DEFAULT_PTP_EXCEPTION_EN TRUE +#define DEFAULT_PREAMBLE_LEN 7 +#define DEFAULT_RX_PREAMBLE FALSE +#define DEFAULT_TX_PREAMBLE FALSE +#define DEFAULT_LOOPBACK FALSE +#define DEFAULT_RX_TIME_STAMP_EN FALSE +#define DEFAULT_TX_TIME_STAMP_EN FALSE +#define DEFAULT_RX_FLOW TRUE +#define DEFAULT_TX_FLOW TRUE +#define DEFAULT_RX_GROUP_HASH_EXD FALSE +#define DEFAULT_TX_PAUSE_TIME_EXTD 0 +#define DEFAULT_RX_PROMISC FALSE +#define DEFAULT_NON_BACK_TO_BACK_IPG1 0x40 +#define DEFAULT_NON_BACK_TO_BACK_IPG2 0x60 +#define DEFAULT_MIN_IFG_ENFORCEMENT 0x50 +#define DEFAULT_BACK_TO_BACK_IPG 0x60 +#define DEFAULT_MAXIMUM_FRAME 0x600 +#define DEFAULT_TBI_PHY_ADDR 5 +#define DEFAULT_WAKE_ON_LAN FALSE + +/* register related defines (bits, field offsets..) */ +#define DTSEC_ID1_ID 0xffff0000 +#define DTSEC_ID1_REV_MJ 0x0000FF00 +#define DTSEC_ID1_REV_MN 0x000000ff + +#define DTSEC_ID2_INT_REDUCED_OFF 0x00010000 +#define DTSEC_ID2_INT_NORMAL_OFF 0x00020000 + +#define DTSEC_ECNTRL_CLRCNT 0x00004000 +#define DTSEC_ECNTRL_AUTOZ 0x00002000 +#define DTSEC_ECNTRL_STEN 0x00001000 +#define DTSEC_ECNTRL_CFG_RO 0x80000000 +#define DTSEC_ECNTRL_GMIIM 0x00000040 +#define DTSEC_ECNTRL_TBIM 0x00000020 +#define DTSEC_ECNTRL_SGMIIM 0x00000002 +#define DTSEC_ECNTRL_RPM 0x00000010 +#define DTSEC_ECNTRL_R100M 0x00000008 +#define DTSEC_ECNTRL_RMM 0x00000004 +#define DTSEC_ECNTRL_QSGMIIM 0x00000001 + +#define DTSEC_TCTRL_THDF 0x00000800 +#define DTSEC_TCTRL_TTSE 0x00000040 +#define DTSEC_TCTRL_GTS 0x00000020 +#define DTSEC_TCTRL_TFC_PAUSE 0x00000010 + +/* PTV offsets */ +#define PTV_PTE_OFST 16 + +#define RCTRL_CFA 0x00008000 +#define RCTRL_GHTX 0x00000400 +#define RCTRL_RTSE 0x00000040 +#define RCTRL_GRS 0x00000020 +#define RCTRL_BC_REJ 0x00000010 +#define RCTRL_MPROM 0x00000008 +#define RCTRL_RSF 0x00000004 +#define RCTRL_UPROM 0x00000001 +#define RCTRL_PROM (RCTRL_UPROM | RCTRL_MPROM) + +#define TMR_CTL_ESFDP 0x00000800 +#define TMR_CTL_ESFDE 0x00000400 + +#define MACCFG1_SOFT_RESET 0x80000000 +#define MACCFG1_LOOPBACK 0x00000100 +#define MACCFG1_RX_FLOW 0x00000020 +#define MACCFG1_TX_FLOW 0x00000010 +#define MACCFG1_TX_EN 0x00000001 +#define MACCFG1_RX_EN 0x00000004 +#define MACCFG1_RESET_RxMC 0x00080000 +#define MACCFG1_RESET_TxMC 0x00040000 +#define MACCFG1_RESET_RxFUN 0x00020000 +#define MACCFG1_RESET_TxFUN 0x00010000 + +#define MACCFG2_NIBBLE_MODE 0x00000100 +#define MACCFG2_BYTE_MODE 0x00000200 +#define MACCFG2_PRE_AM_Rx_EN 0x00000080 +#define MACCFG2_PRE_AM_Tx_EN 0x00000040 +#define MACCFG2_LENGTH_CHECK 0x00000010 +#define MACCFG2_MAGIC_PACKET_EN 0x00000008 +#define MACCFG2_PAD_CRC_EN 0x00000004 +#define MACCFG2_CRC_EN 0x00000002 +#define MACCFG2_FULL_DUPLEX 0x00000001 + +#define PREAMBLE_LENGTH_SHIFT 12 + +#define IPGIFG_NON_BACK_TO_BACK_IPG_1_SHIFT 24 +#define IPGIFG_NON_BACK_TO_BACK_IPG_2_SHIFT 16 +#define IPGIFG_MIN_IFG_ENFORCEMENT_SHIFT 8 + +#define IPGIFG_NON_BACK_TO_BACK_IPG_1 0x7F000000 +#define IPGIFG_NON_BACK_TO_BACK_IPG_2 0x007F0000 +#define IPGIFG_MIN_IFG_ENFORCEMENT 0x0000FF00 +#define IPGIFG_BACK_TO_BACK_IPG 0x0000007F + +#define HAFDUP_ALT_BEB 0x00080000 +#define HAFDUP_BP_NO_BACKOFF 0x00040000 +#define HAFDUP_NO_BACKOFF 0x00020000 +#define HAFDUP_EXCESS_DEFER 0x00010000 +#define HAFDUP_COLLISION_WINDOW 0x000003ff + +#define HAFDUP_ALTERNATE_BEB_TRUNCATION_SHIFT 20 +#define HAFDUP_RETRANSMISSION_MAX_SHIFT 12 +#define HAFDUP_RETRANSMISSION_MAX 0x0000f000 + +#define NUM_OF_HASH_REGS 8 /* Number of hash table registers */ + +/* CAR1/2 bits */ +#define DTSEC_CAR1_TR64 0x80000000 +#define DTSEC_CAR1_TR127 0x40000000 +#define DTSEC_CAR1_TR255 0x20000000 +#define DTSEC_CAR1_TR511 0x10000000 +#define DTSEC_CAR1_TRK1 0x08000000 +#define DTSEC_CAR1_TRMAX 0x04000000 +#define DTSEC_CAR1_TRMGV 0x02000000 + +#define DTSEC_CAR1_RBYT 0x00010000 +#define DTSEC_CAR1_RPKT 0x00008000 +#define DTSEC_CAR1_RFCS 0x00004000 +#define DTSEC_CAR1_RMCA 0x00002000 +#define DTSEC_CAR1_RBCA 0x00001000 +#define DTSEC_CAR1_RXCF 0x00000800 +#define DTSEC_CAR1_RXPF 0x00000400 +#define DTSEC_CAR1_RXUO 0x00000200 +#define DTSEC_CAR1_RALN 0x00000100 +#define DTSEC_CAR1_RFLR 0x00000080 +#define DTSEC_CAR1_RCDE 0x00000040 +#define DTSEC_CAR1_RCSE 0x00000020 +#define DTSEC_CAR1_RUND 0x00000010 +#define DTSEC_CAR1_ROVR 0x00000008 +#define DTSEC_CAR1_RFRG 0x00000004 +#define DTSEC_CAR1_RJBR 0x00000002 +#define DTSEC_CAR1_RDRP 0x00000001 + +#define DTSEC_CAR2_TJBR 0x00080000 +#define DTSEC_CAR2_TFCS 0x00040000 +#define DTSEC_CAR2_TXCF 0x00020000 +#define DTSEC_CAR2_TOVR 0x00010000 +#define DTSEC_CAR2_TUND 0x00008000 +#define DTSEC_CAR2_TFRG 0x00004000 +#define DTSEC_CAR2_TBYT 0x00002000 +#define DTSEC_CAR2_TPKT 0x00001000 +#define DTSEC_CAR2_TMCA 0x00000800 +#define DTSEC_CAR2_TBCA 0x00000400 +#define DTSEC_CAR2_TXPF 0x00000200 +#define DTSEC_CAR2_TDFR 0x00000100 +#define DTSEC_CAR2_TEDF 0x00000080 +#define DTSEC_CAR2_TSCL 0x00000040 +#define DTSEC_CAR2_TMCL 0x00000020 +#define DTSEC_CAR2_TLCL 0x00000010 +#define DTSEC_CAR2_TXCL 0x00000008 +#define DTSEC_CAR2_TNCL 0x00000004 +#define DTSEC_CAR2_TDRP 0x00000001 + +#define CAM1_ERRORS_ONLY \ + (DTSEC_CAR1_RXPF | DTSEC_CAR1_RALN | DTSEC_CAR1_RFLR \ + | DTSEC_CAR1_RCDE | DTSEC_CAR1_RCSE | DTSEC_CAR1_RUND \ + | DTSEC_CAR1_ROVR | DTSEC_CAR1_RFRG | DTSEC_CAR1_RJBR \ + | DTSEC_CAR1_RDRP) + +#define CAM2_ERRORS_ONLY (DTSEC_CAR2_TFCS | DTSEC_CAR2_TXPF | DTSEC_CAR2_TDRP) + +/* + * Group of dTSEC specific counters relating to the standard RMON MIB Group 1 + * (or Ethernet) statistics. + */ +#define CAM1_MIB_GRP_1 \ + (DTSEC_CAR1_RDRP | DTSEC_CAR1_RBYT | DTSEC_CAR1_RPKT | DTSEC_CAR1_RMCA\ + | DTSEC_CAR1_RBCA | DTSEC_CAR1_RALN | DTSEC_CAR1_RUND | DTSEC_CAR1_ROVR\ + | DTSEC_CAR1_RFRG | DTSEC_CAR1_RJBR \ + | DTSEC_CAR1_TR64 | DTSEC_CAR1_TR127 | DTSEC_CAR1_TR255 \ + | DTSEC_CAR1_TR511 | DTSEC_CAR1_TRMAX) + +#define CAM2_MIB_GRP_1 (DTSEC_CAR2_TNCL | DTSEC_CAR2_TDRP) + +/* memory map */ + +struct dtsec_regs { + /* dTSEC General Control and Status Registers */ + uint32_t tsec_id; /* 0x000 ETSEC_ID register */ + uint32_t tsec_id2; /* 0x004 ETSEC_ID2 register */ + uint32_t ievent; /* 0x008 Interrupt event register */ + uint32_t imask; /* 0x00C Interrupt mask register */ + uint32_t reserved0010[1]; + uint32_t ecntrl; /* 0x014 E control register */ + uint32_t ptv; /* 0x018 Pause time value register */ + uint32_t tbipa; /* 0x01C TBI PHY address register */ + uint32_t tmr_ctrl; /* 0x020 Time-stamp Control register */ + uint32_t tmr_pevent; /* 0x024 Time-stamp event register */ + uint32_t tmr_pemask; /* 0x028 Timer event mask register */ + uint32_t reserved002c[5]; + uint32_t tctrl; /* 0x040 Transmit control register */ + uint32_t reserved0044[3]; + uint32_t rctrl; /* 0x050 Receive control register */ + uint32_t reserved0054[11]; + uint32_t igaddr[8]; /* 0x080-0x09C Individual/group address */ + uint32_t gaddr[8]; /* 0x0A0-0x0BC Group address registers 0-7 */ + uint32_t reserved00c0[16]; + uint32_t maccfg1; /* 0x100 MAC configuration #1 */ + uint32_t maccfg2; /* 0x104 MAC configuration #2 */ + uint32_t ipgifg; /* 0x108 IPG/IFG */ + uint32_t hafdup; /* 0x10C Half-duplex */ + uint32_t maxfrm; /* 0x110 Maximum frame */ + uint32_t reserved0114[10]; + uint32_t ifstat; /* 0x13C Interface status */ + uint32_t macstnaddr1; /* 0x140 Station Address,part 1 */ + uint32_t macstnaddr2; /* 0x144 Station Address,part 2 */ + struct { + uint32_t exact_match1; /* octets 1-4 */ + uint32_t exact_match2; /* octets 5-6 */ + } macaddr[15]; /* 0x148-0x1BC mac exact match addresses 1-15 */ + uint32_t reserved01c0[16]; + uint32_t tr64; /* 0x200 transmit and receive 64 byte frame counter */ + uint32_t tr127; /* 0x204 transmit and receive 65 to 127 byte frame + * counter */ + uint32_t tr255; /* 0x208 transmit and receive 128 to 255 byte frame + * counter */ + uint32_t tr511; /* 0x20C transmit and receive 256 to 511 byte frame + * counter */ + uint32_t tr1k; /* 0x210 transmit and receive 512 to 1023 byte frame + * counter */ + uint32_t trmax; /* 0x214 transmit and receive 1024 to 1518 byte frame + * counter */ + uint32_t trmgv; /* 0x218 transmit and receive 1519 to 1522 byte good + * VLAN frame count */ + uint32_t rbyt; /* 0x21C receive byte counter */ + uint32_t rpkt; /* 0x220 receive packet counter */ + uint32_t rfcs; /* 0x224 receive FCS error counter */ + uint32_t rmca; /* 0x228 RMCA receive multicast packet counter */ + uint32_t rbca; /* 0x22C receive broadcast packet counter */ + uint32_t rxcf; /* 0x230 receive control frame packet counter */ + uint32_t rxpf; /* 0x234 receive pause frame packet counter */ + uint32_t rxuo; /* 0x238 receive unknown OP code counter */ + uint32_t raln; /* 0x23C receive alignment error counter */ + uint32_t rflr; /* 0x240 receive frame length error counter */ + uint32_t rcde; /* 0x244 receive code error counter */ + uint32_t rcse; /* 0x248 receive carrier sense error counter */ + uint32_t rund; /* 0x24C receive undersize packet counter */ + uint32_t rovr; /* 0x250 receive oversize packet counter */ + uint32_t rfrg; /* 0x254 receive fragments counter */ + uint32_t rjbr; /* 0x258 receive jabber counter */ + uint32_t rdrp; /* 0x25C receive drop */ + uint32_t tbyt; /* 0x260 transmit byte counter */ + uint32_t tpkt; /* 0x264 transmit packet counter */ + uint32_t tmca; /* 0x268 transmit multicast packet counter */ + uint32_t tbca; /* 0x26C transmit broadcast packet counter */ + uint32_t txpf; /* 0x270 transmit pause control frame counter */ + uint32_t tdfr; /* 0x274 transmit deferral packet counter */ + uint32_t tedf; /* 0x278 transmit excessive deferral packet counter */ + uint32_t tscl; /* 0x27C transmit single collision packet counter */ + uint32_t tmcl; /* 0x280 transmit multiple collision packet counter */ + uint32_t tlcl; /* 0x284 transmit late collision packet counter */ + uint32_t txcl; /* 0x288 transmit excessive collision packet counter */ + uint32_t tncl; /* 0x28C transmit total collision counter */ + uint32_t reserved0290[1]; + uint32_t tdrp; /* 0x294 transmit drop frame counter */ + uint32_t tjbr; /* 0x298 transmit jabber frame counter */ + uint32_t tfcs; /* 0x29C transmit FCS error counter */ + uint32_t txcf; /* 0x2A0 transmit control frame counter */ + uint32_t tovr; /* 0x2A4 transmit oversize frame counter */ + uint32_t tund; /* 0x2A8 transmit undersize frame counter */ + uint32_t tfrg; /* 0x2AC transmit fragments frame counter */ + uint32_t car1; /* 0x2B0 carry register one register* */ + uint32_t car2; /* 0x2B4 carry register two register* */ + uint32_t cam1; /* 0x2B8 carry register one mask register */ + uint32_t cam2; /* 0x2BC carry register two mask register */ + uint32_t reserved02c0[848]; +}; + +/** + * struct dtsec_mib_grp_1_counters - MIB counter overflows + * + * @tr64: Transmit and Receive 64 byte frame count. Increment for each + * good or bad frame, of any type, transmitted or received, which + * is 64 bytes in length. + * @tr127: Transmit and Receive 65 to 127 byte frame count. Increments for + * each good or bad frame of any type, transmitted or received, + * which is 65-127 bytes in length. + * @tr255: Transmit and Receive 128 to 255 byte frame count. Increments + * for each good or bad frame, of any type, transmitted or + * received, which is 128-255 bytes in length. + * @tr511: Transmit and Receive 256 to 511 byte frame count. Increments + * for each good or bad frame, of any type, transmitted or + * received, which is 256-511 bytes in length. + * @tr1k: Transmit and Receive 512 to 1023 byte frame count. Increments + * for each good or bad frame, of any type, transmitted or + * received, which is 512-1023 bytes in length. + * @trmax: Transmit and Receive 1024 to 1518 byte frame count. Increments + * for each good or bad frame, of any type, transmitted or + * received, which is 1024-1518 bytes in length. + * @rfrg: Receive fragments count. Increments for each received frame + * which is less than 64 bytes in length and contains an invalid + * FCS. This includes integral and non-integral lengths. + * @rjbr: Receive jabber count. Increments for received frames which + * exceed 1518 (non VLAN) or 1522 (VLAN) bytes and contain an + * invalid FCS. This includes alignment errors. + * @rdrp: Receive dropped packets count. Increments for received frames + * which are streamed to system but are later dropped due to lack + * of system resources. Does not increment for frames rejected due + * to address filtering. + * @raln: Receive alignment error count. Increments for each received + * frame from 64 to 1518 (non VLAN) or 1522 (VLAN) which contains + * an invalid FCS and is not an integral number of bytes. + * @rund: Receive undersize packet count. Increments each time a frame is + * received which is less than 64 bytes in length and contains a + * valid FCS and is otherwise well formed. This count does not + * include range length errors. + * @rovr: Receive oversize packet count. Increments each time a frame is + * received which exceeded 1518 (non VLAN) or 1522 (VLAN) and + * contains a valid FCS and is otherwise well formed. + * @rbyt: Receive byte count. Increments by the byte count of frames + * received, including those in bad packets, excluding preamble and + * SFD but including FCS bytes. + * @rpkt: Receive packet count. Increments for each received frame + * (including bad packets, all unicast, broadcast, and multicast + * packets). + * @rmca: Receive multicast packet count. Increments for each multicast + * frame with valid CRC and of lengths 64 to 1518 (non VLAN) or + * 1522 (VLAN), excluding broadcast frames. This count does not + * include range/length errors. + * @rbca: Receive broadcast packet count. Increments for each broadcast + * frame with valid CRC and of lengths 64 to 1518 (non VLAN) or + * 1522 (VLAN), excluding multicast frames. Does not include + * range/length errors. + * @tdrp: Transmit drop frame count. Increments each time a memory error + * or an underrun has occurred. + * @tncl: Transmit total collision counter. Increments by the number of + * collisions experienced during the transmission of a frame. Does + * not increment for aborted frames. + * + * The structure contains a group of dTSEC HW specific counters relating to the + * standard RMON MIB Group 1 (or Ethernet statistics) counters. This structure + * is counting only the carry events of the corresponding HW counters. + * + * tr64 to trmax notes: Frame sizes specified are considered excluding preamble + * and SFD but including FCS bytes. + */ +struct dtsec_mib_grp_1_counters { + uint64_t rdrp; + uint64_t tdrp; + uint64_t rbyt; + uint64_t rpkt; + uint64_t rbca; + uint64_t rmca; + uint64_t raln; + uint64_t rund; + uint64_t rovr; + uint64_t rfrg; + uint64_t rjbr; + uint64_t tncl; + uint64_t tr64; + uint64_t tr127; + uint64_t tr255; + uint64_t tr511; + uint64_t tr1k; + uint64_t trmax; +}; + +enum dtsec_stat_counters { + E_DTSEC_STAT_TR64, + E_DTSEC_STAT_TR127, + E_DTSEC_STAT_TR255, + E_DTSEC_STAT_TR511, + E_DTSEC_STAT_TR1K, + E_DTSEC_STAT_TRMAX, + E_DTSEC_STAT_TRMGV, + E_DTSEC_STAT_RBYT, + E_DTSEC_STAT_RPKT, + E_DTSEC_STAT_RMCA, + E_DTSEC_STAT_RBCA, + E_DTSEC_STAT_RXPF, + E_DTSEC_STAT_RALN, + E_DTSEC_STAT_RFLR, + E_DTSEC_STAT_RCDE, + E_DTSEC_STAT_RCSE, + E_DTSEC_STAT_RUND, + E_DTSEC_STAT_ROVR, + E_DTSEC_STAT_RFRG, + E_DTSEC_STAT_RJBR, + E_DTSEC_STAT_RDRP, + E_DTSEC_STAT_TFCS, + E_DTSEC_STAT_TBYT, + E_DTSEC_STAT_TPKT, + E_DTSEC_STAT_TMCA, + E_DTSEC_STAT_TBCA, + E_DTSEC_STAT_TXPF, + E_DTSEC_STAT_TNCL, + E_DTSEC_STAT_TDRP +}; + +enum dtsec_stat_level { + /* No statistics */ + E_MAC_STAT_NONE = 0, + /* Only RMON MIB group 1 (ether stats). Optimized for performance */ + E_MAC_STAT_MIB_GRP1, + /* Only error counters are available. Optimized for performance */ + E_MAC_STAT_PARTIAL, + /* All counters available. Not optimized for performance */ + E_MAC_STAT_FULL +}; + + +/** + * struct dtsec_cfg - dTSEC configuration + * + * @halfdup_on: Transmit half-duplex flow control, under software + * control for 10/100-Mbps half-duplex media. If set, + * back pressure is applied to media by raising carrier. + * @halfdup_retransmit: Number of retransmission attempts following a collision. + * If this is exceeded dTSEC aborts transmission due to + * excessive collisions. The standard specifies the + * attempt limit to be 15. + * @halfdup_coll_window:The number of bytes of the frame during which + * collisions may occur. The default value of 55 + * corresponds to the frame byte at the end of the + * standard 512-bit slot time window. If collisions are + * detected after this byte, the late collision event is + * asserted and transmission of current frame is aborted. + * @rx_drop_bcast: Discard broadcast frames. If set, all broadcast frames + * will be discarded by dTSEC. + * @rx_short_frm: Accept short frames. If set, dTSEC will accept frames + * of length 14..63 bytes. + * @rx_len_check: Length check for received frames. If set, the MAC + * checks the frame's length field on receive to ensure it + * matches the actual data field length. This only works + * for received frames with length field less than 1500. + * No check is performed for larger frames. + * @tx_pad_crc: Pad and append CRC. If set, the MAC pads all + * transmitted short frames and appends a CRC to every + * frame regardless of padding requirement. + * @tx_crc: Transmission CRC enable. If set, the MAC appends a CRC + * to all frames. If frames presented to the MAC have a + * valid length and contain a valid CRC, @tx_crc should be + * reset. + * This field is ignored if @tx_pad_crc is set. + * @rx_ctrl_acc: Control frame accept. If set, this overrides 802.3 + * standard control frame behavior, and all Ethernet frames + * that have an ethertype of 0x8808 are treated as normal + * Ethernet frames and passed up to the packet interface on + * a DA match. Received pause control frames are passed to + * the packet interface only if Rx flow control is also + * disabled. See fman_dtsec_handle_rx_pause() function. + * @tx_pause_time: Transmit pause time value. This pause value is used as + * part of the pause frame to be sent when a transmit pause + * frame is initiated. If set to 0 this disables + * transmission of pause frames. + * @rx_preamble: Receive preamble enable. If set, the MAC recovers the + * received Ethernet 7-byte preamble and passes it to the + * packet interface at the start of each received frame. + * This field should be reset for internal MAC loop-back + * mode. + * @tx_preamble: User defined preamble enable for transmitted frames. + * If set, a user-defined preamble must passed to the MAC + * and it is transmitted instead of the standard preamble. + * @preamble_len: Length, in bytes, of the preamble field preceding each + * Ethernet start-of-frame delimiter byte. The default + * value of 0x7 should be used in order to guarantee + * reliable operation with IEEE 802.3 compliant hardware. + * @rx_prepend: Packet alignment padding length. The specified number + * of bytes (1-31) of zero padding are inserted before the + * start of each received frame. For Ethernet, where + * optional preamble extraction is enabled, the padding + * appears before the preamble, otherwise the padding + * precedes the layer 2 header. + * + * This structure contains basic dTSEC configuration and must be passed to + * fman_dtsec_init() function. A default set of configuration values can be + * obtained by calling fman_dtsec_defconfig(). + */ +struct dtsec_cfg { + bool halfdup_on; + bool halfdup_alt_backoff_en; + bool halfdup_excess_defer; + bool halfdup_no_backoff; + bool halfdup_bp_no_backoff; + uint8_t halfdup_alt_backoff_val; + uint16_t halfdup_retransmit; + uint16_t halfdup_coll_window; + bool rx_drop_bcast; + bool rx_short_frm; + bool rx_len_check; + bool tx_pad_crc; + bool tx_crc; + bool rx_ctrl_acc; + unsigned short tx_pause_time; + unsigned short tbipa; + bool ptp_tsu_en; + bool ptp_exception_en; + bool rx_preamble; + bool tx_preamble; + unsigned char preamble_len; + unsigned char rx_prepend; + bool loopback; + bool rx_time_stamp_en; + bool tx_time_stamp_en; + bool rx_flow; + bool tx_flow; + bool rx_group_hash_exd; + bool rx_promisc; + uint8_t tbi_phy_addr; + uint16_t tx_pause_time_extd; + uint16_t maximum_frame; + uint32_t non_back_to_back_ipg1; + uint32_t non_back_to_back_ipg2; + uint32_t min_ifg_enforcement; + uint32_t back_to_back_ipg; + bool wake_on_lan; +}; + + +/** + * fman_dtsec_defconfig() - Get default dTSEC configuration + * @cfg: pointer to configuration structure. + * + * Call this function to obtain a default set of configuration values for + * initializing dTSEC. The user can overwrite any of the values before calling + * fman_dtsec_init(), if specific configuration needs to be applied. + */ +void fman_dtsec_defconfig(struct dtsec_cfg *cfg); + +/** + * fman_dtsec_init() - Init dTSEC hardware block + * @regs: Pointer to dTSEC register block + * @cfg: dTSEC configuration data + * @iface_mode: dTSEC interface mode, the type of MAC - PHY interface. + * @iface_speed: 1G or 10G + * @macaddr: MAC station address to be assigned to the device + * @fm_rev_maj: major rev number + * @fm_rev_min: minor rev number + * @exceptions_mask: initial exceptions mask + * + * This function initializes dTSEC and applies basic configuration. + * + * dTSEC initialization sequence: + * Before enabling Rx/Tx call dtsec_set_address() to set MAC address, + * fman_dtsec_adjust_link() to configure interface speed and duplex and finally + * dtsec_enable_tx()/dtsec_enable_rx() to start transmission and reception. + * + * Returns: 0 if successful, an error code otherwise. + */ +int fman_dtsec_init(struct dtsec_regs *regs, struct dtsec_cfg *cfg, + enum enet_interface iface_mode, + enum enet_speed iface_speed, + uint8_t *macaddr, uint8_t fm_rev_maj, + uint8_t fm_rev_min, + uint32_t exception_mask); + +/** + * fman_dtsec_enable() - Enable dTSEC Tx and Tx + * @regs: Pointer to dTSEC register block + * @apply_rx: enable rx side + * @apply_tx: enable tx side + * + * This function resets Tx and Rx graceful stop bit and enables dTSEC Tx and Rx. + */ +void fman_dtsec_enable(struct dtsec_regs *regs, bool apply_rx, bool apply_tx); + +/** + * fman_dtsec_disable() - Disable dTSEC Tx and Rx + * @regs: Pointer to dTSEC register block + * @apply_rx: disable rx side + * @apply_tx: disable tx side + * + * This function disables Tx and Rx in dTSEC. + */ +void fman_dtsec_disable(struct dtsec_regs *regs, bool apply_rx, bool apply_tx); + +/** + * fman_dtsec_get_revision() - Get dTSEC hardware revision + * @regs: Pointer to dTSEC register block + * + * Returns dtsec_id content + * + * Call this function to obtain the dTSEC hardware version. + */ +uint32_t fman_dtsec_get_revision(struct dtsec_regs *regs); + +/** + * fman_dtsec_set_mac_address() - Set MAC station address + * @regs: Pointer to dTSEC register block + * @macaddr: MAC address array + * + * This function sets MAC station address. To enable unicast reception call + * this after fman_dtsec_init(). While promiscuous mode is disabled dTSEC will + * match the destination address of received unicast frames against this + * address. + */ +void fman_dtsec_set_mac_address(struct dtsec_regs *regs, uint8_t *macaddr); + +/** + * fman_dtsec_get_mac_address() - Query MAC station address + * @regs: Pointer to dTSEC register block + * @macaddr: MAC address array + */ +void fman_dtsec_get_mac_address(struct dtsec_regs *regs, uint8_t *macaddr); + +/** + * fman_dtsec_set_uc_promisc() - Sets unicast promiscuous mode + * @regs: Pointer to dTSEC register block + * @enable: Enable unicast promiscuous mode + * + * Use this function to enable/disable dTSEC L2 address filtering. If the + * address filtering is disabled all unicast packets are accepted. + * To set dTSEC in promiscuous mode call both fman_dtsec_set_uc_promisc() and + * fman_dtsec_set_mc_promisc() to disable filtering for both unicast and + * multicast addresses. + */ +void fman_dtsec_set_uc_promisc(struct dtsec_regs *regs, bool enable); + +/** + * fman_dtsec_set_wol() - Enable/Disable wake on lan + * (magic packet support) + * @regs: Pointer to dTSEC register block + * @en: Enable Wake On Lan support in dTSEC + * + */ +void fman_dtsec_set_wol(struct dtsec_regs *regs, bool en); + +/** + * fman_dtsec_adjust_link() - Adjust dTSEC speed/duplex settings + * @regs: Pointer to dTSEC register block + * @iface_mode: dTSEC interface mode + * @speed: Link speed + * @full_dx: True for full-duplex, false for half-duplex. + * + * This function configures the MAC to function and the desired rates. Use it + * to configure dTSEC after fman_dtsec_init() and whenever the link speed + * changes (for instance following PHY auto-negociation). + * + * Returns: 0 if successful, an error code otherwise. + */ +int fman_dtsec_adjust_link(struct dtsec_regs *regs, + enum enet_interface iface_mode, + enum enet_speed speed, bool full_dx); + +/** + * fman_dtsec_set_tbi_phy_addr() - Updates TBI address field + * @regs: Pointer to dTSEC register block + * @address: Valid PHY address in the range of 1 to 31. 0 is reserved. + * + * In SGMII mode, the dTSEC's TBIPA field must contain a valid TBI PHY address + * so that the associated TBI PHY (i.e. the link) may be initialized. + * + * Returns: 0 if successful, an error code otherwise. + */ +int fman_dtsec_set_tbi_phy_addr(struct dtsec_regs *regs, + uint8_t addr); + +/** + * fman_dtsec_set_max_frame_len() - Set max frame length + * @regs: Pointer to dTSEC register block + * @length: Max frame length. + * + * Sets maximum frame length for received and transmitted frames. Frames that + * exceeds this length are truncated. + */ +void fman_dtsec_set_max_frame_len(struct dtsec_regs *regs, uint16_t length); + +/** + * fman_dtsec_get_max_frame_len() - Query max frame length + * @regs: Pointer to dTSEC register block + * + * Returns: the current value of the maximum frame length. + */ +uint16_t fman_dtsec_get_max_frame_len(struct dtsec_regs *regs); + +/** + * fman_dtsec_handle_rx_pause() - Configure pause frame handling + * @regs: Pointer to dTSEC register block + * @en: Enable pause frame handling in dTSEC + * + * If enabled, dTSEC will handle pause frames internally. This must be disabled + * if dTSEC is set in half-duplex mode. + * If pause frame handling is disabled and &dtsec_cfg.rx_ctrl_acc is set, pause + * frames will be transferred to the packet interface just like regular Ethernet + * frames. + */ +void fman_dtsec_handle_rx_pause(struct dtsec_regs *regs, bool en); + +/** + * fman_dtsec_set_tx_pause_frames() - Configure Tx pause time + * @regs: Pointer to dTSEC register block + * @time: Time value included in pause frames + * + * Call this function to set the time value used in transmitted pause frames. + * If time is 0, transmission of pause frames is disabled + */ +void fman_dtsec_set_tx_pause_frames(struct dtsec_regs *regs, uint16_t time); + +/** + * fman_dtsec_ack_event() - Acknowledge handled events + * @regs: Pointer to dTSEC register block + * @ev_mask: Events to acknowledge + * + * After handling events signaled by dTSEC in either polling or interrupt mode, + * call this function to reset the associated status bits in dTSEC event + * register. + */ +void fman_dtsec_ack_event(struct dtsec_regs *regs, uint32_t ev_mask); + +/** + * fman_dtsec_get_event() - Returns currently asserted events + * @regs: Pointer to dTSEC register block + * @ev_mask: Mask of relevant events + * + * Call this function to obtain a bit-mask of events that are currently asserted + * in dTSEC, taken from IEVENT register. + * + * Returns: a bit-mask of events asserted in dTSEC. + */ +uint32_t fman_dtsec_get_event(struct dtsec_regs *regs, uint32_t ev_mask); + +/** + * fman_dtsec_get_interrupt_mask() - Returns a bit-mask of enabled interrupts + * @regs: Pointer to dTSEC register block + * + * Call this function to obtain a bit-mask of enabled interrupts + * in dTSEC, taken from IMASK register. + * + * Returns: a bit-mask of enabled interrupts in dTSEC. + */ +uint32_t fman_dtsec_get_interrupt_mask(struct dtsec_regs *regs); + +void fman_dtsec_clear_addr_in_paddr(struct dtsec_regs *regs, + uint8_t paddr_num); + +void fman_dtsec_add_addr_in_paddr(struct dtsec_regs *regs, + uint64_t addr, + uint8_t paddr_num); + +void fman_dtsec_enable_tmr_interrupt (struct dtsec_regs *regs); + +void fman_dtsec_disable_tmr_interrupt(struct dtsec_regs *regs); + +/** + * fman_dtsec_disable_interrupt() - Disables interrupts for the specified events + * @regs: Pointer to dTSEC register block + * @ev_mask: Mask of relevant events + * + * Call this function to disable interrupts in dTSEC for the specified events. + * To enable interrupts use fman_dtsec_enable_interrupt(). + */ +void fman_dtsec_disable_interrupt(struct dtsec_regs *regs, uint32_t ev_mask); + +/** + * fman_dtsec_enable_interrupt() - Enable interrupts for the specified events + * @regs: Pointer to dTSEC register block + * @ev_mask: Mask of relevant events + * + * Call this function to enable interrupts in dTSEC for the specified events. + * To disable interrupts use fman_dtsec_disable_interrupt(). + */ +void fman_dtsec_enable_interrupt(struct dtsec_regs *regs, uint32_t ev_mask); + +/** + * fman_dtsec_set_ts() - Enables dTSEC timestamps + * @regs: Pointer to dTSEC register block + * @en: true to enable timestamps, false to disable them + * + * Call this function to enable/disable dTSEC timestamps. This affects both + * Tx and Rx. + */ +void fman_dtsec_set_ts(struct dtsec_regs *regs, bool en); + +/** + * fman_dtsec_set_bucket() - Enables/disables a filter bucket + * @regs: Pointer to dTSEC register block + * @bucket: Bucket index + * @enable: true/false to enable/disable this bucket + * + * This function enables or disables the specified bucket. Enabling a bucket + * associated with an address configures dTSEC to accept received packets + * with that destination address. + * Multiple addresses may be associated with the same bucket. Disabling a + * bucket will affect all addresses associated with that bucket. A bucket that + * is enabled requires further filtering and verification in the upper layers + * + */ +void fman_dtsec_set_bucket(struct dtsec_regs *regs, int bucket, bool enable); + +/** + * dtsec_set_hash_table() - insert a crc code into thr filter table + * @regs: Pointer to dTSEC register block + * @crc: crc to insert + * @mcast: true is this is a multicast address + * @ghtx: true if we are in ghtx mode + * + * This function inserts a crc code into the filter table. + */ +void fman_dtsec_set_hash_table(struct dtsec_regs *regs, uint32_t crc, + bool mcast, bool ghtx); + +/** + * fman_dtsec_reset_filter_table() - Resets the address filtering table + * @regs: Pointer to dTSEC register block + * @mcast: Reset multicast entries + * @ucast: Reset unicast entries + * + * Resets all entries in L2 address filter table. After calling this function + * all buckets enabled using fman_dtsec_set_bucket() will be disabled. + * If dtsec_init_filter_table() was called with @unicast_hash set to false, + * @ucast argument is ignored. + * This does not affect the primary nor the 15 additional addresses configured + * using dtsec_set_address() or dtsec_set_match_address(). + */ +void fman_dtsec_reset_filter_table(struct dtsec_regs *regs, bool mcast, + bool ucast); + +/** + * fman_dtsec_set_mc_promisc() - Set multicast promiscuous mode + * @regs: Pointer to dTSEC register block + * @enable: Enable multicast promiscuous mode + * + * Call this to enable/disable L2 address filtering for multicast packets. + */ +void fman_dtsec_set_mc_promisc(struct dtsec_regs *regs, bool enable); + +/* statistics APIs */ + +/** + * fman_dtsec_set_stat_level() - Enable a group of MIB statistics counters + * @regs: Pointer to dTSEC register block + * @level: Specifies a certain group of dTSEC MIB HW counters or _all_, + * to specify all the existing counters. + * If set to _none_, it disables all the counters. + * + * Enables the MIB statistics hw counters and sets up the carry interrupt + * masks for the counters corresponding to the @level input parameter. + * + * Returns: error if invalid @level value given. + */ +int fman_dtsec_set_stat_level(struct dtsec_regs *regs, + enum dtsec_stat_level level); + +/** + * fman_dtsec_reset_stat() - Completely resets all dTSEC HW counters + * @regs: Pointer to dTSEC register block + */ +void fman_dtsec_reset_stat(struct dtsec_regs *regs); + +/** + * fman_dtsec_get_clear_carry_regs() - Read and clear carry bits (CAR1-2 registers) + * @regs: Pointer to dTSEC register block + * @car1: car1 register value + * @car2: car2 register value + * + * When set, the carry bits signal that an overflow occurred on the + * corresponding counters. + * Note that the carry bits (CAR1-2 registers) will assert the + * %DTSEC_IEVENT_MSRO interrupt if unmasked (via CAM1-2 regs). + * + * Returns: true if overflow occurred, otherwise - false + */ +bool fman_dtsec_get_clear_carry_regs(struct dtsec_regs *regs, + uint32_t *car1, uint32_t *car2); + +uint32_t fman_dtsec_check_and_clear_tmr_event(struct dtsec_regs *regs); + +uint32_t fman_dtsec_get_stat_counter(struct dtsec_regs *regs, + enum dtsec_stat_counters reg_name); + +void fman_dtsec_start_tx(struct dtsec_regs *regs); +void fman_dtsec_start_rx(struct dtsec_regs *regs); +void fman_dtsec_stop_tx(struct dtsec_regs *regs); +void fman_dtsec_stop_rx(struct dtsec_regs *regs); +uint32_t fman_dtsec_get_rctrl(struct dtsec_regs *regs); + + +#endif /* __FSL_FMAN_DTSEC_H */ diff --git a/sys/contrib/ncsw/inc/flib/fsl_fman_dtsec_mii_acc.h b/sys/contrib/ncsw/inc/flib/fsl_fman_dtsec_mii_acc.h new file mode 100644 index 000000000000..0dda09c3c388 --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/fsl_fman_dtsec_mii_acc.h @@ -0,0 +1,107 @@ +/* + * Copyright 2008-2013 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __FSL_FMAN_DTSEC_MII_ACC_H +#define __FSL_FMAN_DTSEC_MII_ACC_H + +#include "common/general.h" + + +/* MII Management Configuration Register */ +#define MIIMCFG_RESET_MGMT 0x80000000 +#define MIIMCFG_MGNTCLK_MASK 0x00000007 +#define MIIMCFG_MGNTCLK_SHIFT 0 + +/* MII Management Command Register */ +#define MIIMCOM_SCAN_CYCLE 0x00000002 +#define MIIMCOM_READ_CYCLE 0x00000001 + +/* MII Management Address Register */ +#define MIIMADD_PHY_ADDR_SHIFT 8 +#define MIIMADD_PHY_ADDR_MASK 0x00001f00 + +#define MIIMADD_REG_ADDR_SHIFT 0 +#define MIIMADD_REG_ADDR_MASK 0x0000001f + +/* MII Management Indicator Register */ +#define MIIMIND_BUSY 0x00000001 + + +/* PHY Control Register */ +#define PHY_CR_PHY_RESET 0x8000 +#define PHY_CR_LOOPBACK 0x4000 +#define PHY_CR_SPEED0 0x2000 +#define PHY_CR_ANE 0x1000 +#define PHY_CR_RESET_AN 0x0200 +#define PHY_CR_FULLDUPLEX 0x0100 +#define PHY_CR_SPEED1 0x0040 + +#define PHY_TBICON_SRESET 0x8000 +#define PHY_TBICON_SPEED2 0x0020 +#define PHY_TBICON_CLK_SEL 0x0020 +#define PHY_TBIANA_SGMII 0x4001 +#define PHY_TBIANA_1000X 0x01a0 +/* register map */ + +/* MII Configuration Control Memory Map Registers */ +struct dtsec_mii_reg { + uint32_t reserved1[72]; + uint32_t miimcfg; /* MII Mgmt:configuration */ + uint32_t miimcom; /* MII Mgmt:command */ + uint32_t miimadd; /* MII Mgmt:address */ + uint32_t miimcon; /* MII Mgmt:control 3 */ + uint32_t miimstat; /* MII Mgmt:status */ + uint32_t miimind; /* MII Mgmt:indicators */ +}; + +/* dTSEC MII API */ + +/* functions to access the mii registers for phy configuration. + * this functionality may not be available for all dtsecs in the system. + * consult the reference manual for details */ +void fman_dtsec_mii_reset(struct dtsec_mii_reg *regs); +/* frequency is in MHz. + * note that dtsec clock is 1/2 of fman clock */ +void fman_dtsec_mii_init(struct dtsec_mii_reg *regs, uint16_t dtsec_freq); +int fman_dtsec_mii_write_reg(struct dtsec_mii_reg *regs, + uint8_t addr, + uint8_t reg, + uint16_t data, + uint16_t dtsec_freq); + +int fman_dtsec_mii_read_reg(struct dtsec_mii_reg *regs, + uint8_t addr, + uint8_t reg, + uint16_t *data, + uint16_t dtsec_freq); + +#endif /* __FSL_FMAN_DTSEC_MII_ACC_H */ diff --git a/sys/contrib/ncsw/inc/flib/fsl_fman_kg.h b/sys/contrib/ncsw/inc/flib/fsl_fman_kg.h new file mode 100644 index 000000000000..010e4b709d63 --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/fsl_fman_kg.h @@ -0,0 +1,514 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __FSL_FMAN_KG_H +#define __FSL_FMAN_KG_H + +#include "common/general.h" + +#define FM_KG_NUM_OF_GENERIC_REGS 8 /**< Num of generic KeyGen regs */ +#define FMAN_MAX_NUM_OF_HW_PORTS 64 +/**< Total num of masks allowed on KG extractions */ +#define FM_KG_EXTRACT_MASKS_NUM 4 +#define FM_KG_NUM_CLS_PLAN_ENTR 8 /**< Num of class. plan regs */ +#define FM_KG_CLS_PLAN_GRPS_NUM 32 /**< Max num of class. groups */ + +struct fman_kg_regs { + uint32_t fmkg_gcr; + uint32_t res004; + uint32_t res008; + uint32_t fmkg_eer; + uint32_t fmkg_eeer; + uint32_t res014; + uint32_t res018; + uint32_t fmkg_seer; + uint32_t fmkg_seeer; + uint32_t fmkg_gsr; + uint32_t fmkg_tpc; + uint32_t fmkg_serc; + uint32_t res030[4]; + uint32_t fmkg_fdor; + uint32_t fmkg_gdv0r; + uint32_t fmkg_gdv1r; + uint32_t res04c[6]; + uint32_t fmkg_feer; + uint32_t res068[38]; + uint32_t fmkg_indirect[63]; + uint32_t fmkg_ar; +}; + +struct fman_kg_scheme_regs { + uint32_t kgse_mode; /**< MODE */ + uint32_t kgse_ekfc; /**< Extract Known Fields Command */ + uint32_t kgse_ekdv; /**< Extract Known Default Value */ + uint32_t kgse_bmch; /**< Bit Mask Command High */ + uint32_t kgse_bmcl; /**< Bit Mask Command Low */ + uint32_t kgse_fqb; /**< Frame Queue Base */ + uint32_t kgse_hc; /**< Hash Command */ + uint32_t kgse_ppc; /**< Policer Profile Command */ + uint32_t kgse_gec[FM_KG_NUM_OF_GENERIC_REGS]; + /**< Generic Extract Command */ + uint32_t kgse_spc; /**< KeyGen Scheme Entry Statistic Packet Counter */ + uint32_t kgse_dv0; /**< KeyGen Scheme Entry Default Value 0 */ + uint32_t kgse_dv1; /**< KeyGen Scheme Entry Default Value 1 */ + uint32_t kgse_ccbs; /**< KeyGen Scheme Entry Coarse Classification Bit*/ + uint32_t kgse_mv; /**< KeyGen Scheme Entry Match vector */ + uint32_t kgse_om; /**< KeyGen Scheme Entry Operation Mode bits */ + uint32_t kgse_vsp; /**< KeyGen Scheme Entry Virtual Storage Profile */ +}; + +struct fman_kg_pe_regs{ + uint32_t fmkg_pe_sp; + uint32_t fmkg_pe_cpp; +}; + +struct fman_kg_cp_regs { + uint32_t kgcpe[FM_KG_NUM_CLS_PLAN_ENTR]; +}; + + +#define FM_KG_KGAR_GO 0x80000000 +#define FM_KG_KGAR_READ 0x40000000 +#define FM_KG_KGAR_WRITE 0x00000000 +#define FM_KG_KGAR_SEL_SCHEME_ENTRY 0x00000000 +#define FM_KG_KGAR_SCM_WSEL_UPDATE_CNT 0x00008000 + +#define KG_SCH_PP_SHIFT_HIGH 0x80000000 +#define KG_SCH_PP_NO_GEN 0x10000000 +#define KG_SCH_PP_SHIFT_LOW 0x0000F000 +#define KG_SCH_MODE_NIA_PLCR 0x40000000 +#define KG_SCH_GEN_EXTRACT_TYPE 0x00008000 +#define KG_SCH_BITMASK_MASK 0x000000FF +#define KG_SCH_GEN_VALID 0x80000000 +#define KG_SCH_GEN_MASK 0x00FF0000 +#define FM_PCD_KG_KGAR_ERR 0x20000000 +#define FM_PCD_KG_KGAR_SEL_CLS_PLAN_ENTRY 0x01000000 +#define FM_PCD_KG_KGAR_SEL_PORT_ENTRY 0x02000000 +#define FM_PCD_KG_KGAR_SEL_PORT_WSEL_SP 0x00008000 +#define FM_PCD_KG_KGAR_SEL_PORT_WSEL_CPP 0x00004000 +#define FM_PCD_KG_KGAR_WSEL_MASK 0x0000FF00 +#define KG_SCH_HASH_CONFIG_NO_FQID 0x80000000 +#define KG_SCH_HASH_CONFIG_SYM 0x40000000 + +#define FM_EX_KG_DOUBLE_ECC 0x80000000 +#define FM_EX_KG_KEYSIZE_OVERFLOW 0x40000000 + +/* ECC capture register */ +#define KG_FMKG_SERC_CAP 0x80000000 +#define KG_FMKG_SERC_CET 0x40000000 +#define KG_FMKG_SERC_CNT_MSK 0x00FF0000 +#define KG_FMKG_SERC_CNT_SHIFT 16 +#define KG_FMKG_SERC_ADDR_MSK 0x000003FF + +/* Masks */ +#define FM_KG_KGGCR_EN 0x80000000 +#define KG_SCH_GEN_VALID 0x80000000 +#define KG_SCH_GEN_EXTRACT_TYPE 0x00008000 +#define KG_ERR_TYPE_DOUBLE 0x40000000 +#define KG_ERR_ADDR_MASK 0x00000FFF +#define KG_SCH_MODE_EN 0x80000000 + +/* shifts */ +#define FM_KG_KGAR_NUM_SHIFT 16 +#define FM_KG_PE_CPP_MASK_SHIFT 16 +#define FM_KG_KGAR_WSEL_SHIFT 8 + +#define FM_KG_SCH_GEN_HT_INVALID 0 + +#define FM_KG_MASK_SEL_GEN_BASE 0x20 + +#define KG_GET_MASK_SEL_SHIFT(shift, i) \ +switch (i) \ +{ \ + case 0: (shift) = 26; break; \ + case 1: (shift) = 20; break; \ + case 2: (shift) = 10; break; \ + case 3: (shift) = 4; break; \ + default: (shift) = 0; \ +} + +#define KG_GET_MASK_OFFSET_SHIFT(shift, i) \ +switch (i) \ +{ \ + case 0: (shift) = 16; break; \ + case 1: (shift) = 0; break; \ + case 2: (shift) = 28; break; \ + case 3: (shift) = 24; break; \ + default: (shift) = 0; \ +} + +#define KG_GET_MASK_SHIFT(shift, i) \ +switch (i) \ +{ \ + case 0: shift = 24; break; \ + case 1: shift = 16; break; \ + case 2: shift = 8; break; \ + case 3: shift = 0; break; \ + default: shift = 0; \ +} + +/* Port entry CPP register */ +#define FMAN_KG_PE_CPP_MASK_SHIFT 16 + +/* Scheme registers */ +#define FMAN_KG_SCH_MODE_EN 0x80000000 +#define FMAN_KG_SCH_MODE_NIA_PLCR 0x40000000 +#define FMAN_KG_SCH_MODE_CCOBASE_SHIFT 24 + +#define FMAN_KG_SCH_DEF_MAC_ADDR_SHIFT 30 +#define FMAN_KG_SCH_DEF_VLAN_TCI_SHIFT 28 +#define FMAN_KG_SCH_DEF_ETYPE_SHIFT 26 +#define FMAN_KG_SCH_DEF_PPP_SID_SHIFT 24 +#define FMAN_KG_SCH_DEF_PPP_PID_SHIFT 22 +#define FMAN_KG_SCH_DEF_MPLS_SHIFT 20 +#define FMAN_KG_SCH_DEF_IP_ADDR_SHIFT 18 +#define FMAN_KG_SCH_DEF_PTYPE_SHIFT 16 +#define FMAN_KG_SCH_DEF_IP_TOS_TC_SHIFT 14 +#define FMAN_KG_SCH_DEF_IPv6_FL_SHIFT 12 +#define FMAN_KG_SCH_DEF_IPSEC_SPI_SHIFT 10 +#define FMAN_KG_SCH_DEF_L4_PORT_SHIFT 8 +#define FMAN_KG_SCH_DEF_TCP_FLG_SHIFT 6 + +#define FMAN_KG_SCH_GEN_VALID 0x80000000 +#define FMAN_KG_SCH_GEN_SIZE_MAX 16 +#define FMAN_KG_SCH_GEN_OR 0x00008000 + +#define FMAN_KG_SCH_GEN_DEF_SHIFT 29 +#define FMAN_KG_SCH_GEN_SIZE_SHIFT 24 +#define FMAN_KG_SCH_GEN_MASK_SHIFT 16 +#define FMAN_KG_SCH_GEN_HT_SHIFT 8 + +#define FMAN_KG_SCH_HASH_HSHIFT_SHIFT 24 +#define FMAN_KG_SCH_HASH_HSHIFT_MAX 0x28 +#define FMAN_KG_SCH_HASH_SYM 0x40000000 +#define FMAN_KG_SCH_HASH_NO_FQID_GEN 0x80000000 + +#define FMAN_KG_SCH_PP_SH_SHIFT 27 +#define FMAN_KG_SCH_PP_SL_SHIFT 12 +#define FMAN_KG_SCH_PP_SH_MASK 0x80000000 +#define FMAN_KG_SCH_PP_SL_MASK 0x0000F000 +#define FMAN_KG_SCH_PP_SHIFT_MAX 0x17 +#define FMAN_KG_SCH_PP_MASK_SHIFT 16 +#define FMAN_KG_SCH_PP_NO_GEN 0x10000000 + +enum fman_kg_gen_extract_src { + E_FMAN_KG_GEN_EXTRACT_ETH, + E_FMAN_KG_GEN_EXTRACT_ETYPE, + E_FMAN_KG_GEN_EXTRACT_SNAP, + E_FMAN_KG_GEN_EXTRACT_VLAN_TCI_1, + E_FMAN_KG_GEN_EXTRACT_VLAN_TCI_N, + E_FMAN_KG_GEN_EXTRACT_PPPoE, + E_FMAN_KG_GEN_EXTRACT_MPLS_1, + E_FMAN_KG_GEN_EXTRACT_MPLS_2, + E_FMAN_KG_GEN_EXTRACT_MPLS_3, + E_FMAN_KG_GEN_EXTRACT_MPLS_N, + E_FMAN_KG_GEN_EXTRACT_IPv4_1, + E_FMAN_KG_GEN_EXTRACT_IPv6_1, + E_FMAN_KG_GEN_EXTRACT_IPv4_2, + E_FMAN_KG_GEN_EXTRACT_IPv6_2, + E_FMAN_KG_GEN_EXTRACT_MINENCAP, + E_FMAN_KG_GEN_EXTRACT_IP_PID, + E_FMAN_KG_GEN_EXTRACT_GRE, + E_FMAN_KG_GEN_EXTRACT_TCP, + E_FMAN_KG_GEN_EXTRACT_UDP, + E_FMAN_KG_GEN_EXTRACT_SCTP, + E_FMAN_KG_GEN_EXTRACT_DCCP, + E_FMAN_KG_GEN_EXTRACT_IPSEC_AH, + E_FMAN_KG_GEN_EXTRACT_IPSEC_ESP, + E_FMAN_KG_GEN_EXTRACT_SHIM_1, + E_FMAN_KG_GEN_EXTRACT_SHIM_2, + E_FMAN_KG_GEN_EXTRACT_FROM_DFLT, + E_FMAN_KG_GEN_EXTRACT_FROM_FRAME_START, + E_FMAN_KG_GEN_EXTRACT_FROM_PARSE_RESULT, + E_FMAN_KG_GEN_EXTRACT_FROM_END_OF_PARSE, + E_FMAN_KG_GEN_EXTRACT_FROM_FQID +}; + +struct fman_kg_ex_ecc_attr +{ + bool valid; + bool double_ecc; + uint16_t addr; + uint8_t single_ecc_count; +}; + +enum fman_kg_def_select +{ + E_FMAN_KG_DEF_GLOBAL_0, + E_FMAN_KG_DEF_GLOBAL_1, + E_FMAN_KG_DEF_SCHEME_0, + E_FMAN_KG_DEF_SCHEME_1 +}; + +struct fman_kg_extract_def +{ + enum fman_kg_def_select mac_addr; + enum fman_kg_def_select vlan_tci; + enum fman_kg_def_select etype; + enum fman_kg_def_select ppp_sid; + enum fman_kg_def_select ppp_pid; + enum fman_kg_def_select mpls; + enum fman_kg_def_select ip_addr; + enum fman_kg_def_select ptype; + enum fman_kg_def_select ip_tos_tc; + enum fman_kg_def_select ipv6_fl; + enum fman_kg_def_select ipsec_spi; + enum fman_kg_def_select l4_port; + enum fman_kg_def_select tcp_flg; +}; + +enum fman_kg_gen_extract_type +{ + E_FMAN_KG_HASH_EXTRACT, + E_FMAN_KG_OR_EXTRACT +}; + +struct fman_kg_gen_extract_params +{ + /* Hash or Or-ed extract */ + enum fman_kg_gen_extract_type type; + enum fman_kg_gen_extract_src src; + bool no_validation; + /* Extraction offset from the header location specified above */ + uint8_t offset; + /* Size of extraction for FMAN_KG_HASH_EXTRACT, + * hash result shift for FMAN_KG_OR_EXTRACT */ + uint8_t extract; + uint8_t mask; + /* Default value to use when header specified + * by fman_kg_gen_extract_src doesn't present */ + enum fman_kg_def_select def_val; +}; + +struct fman_kg_extract_mask +{ + /**< Indication if mask is on known field extraction or + * on general extraction; TRUE for known field */ + bool is_known; + /**< One of FMAN_KG_EXTRACT_xxx defines for known fields mask and + * generic register index for generic extracts mask */ + uint32_t field_or_gen_idx; + /**< Byte offset from start of the extracted data specified + * by field_or_gen_idx */ + uint8_t offset; + /**< Byte mask (selected bits will be used) */ + uint8_t mask; +}; + +struct fman_kg_extract_params +{ + /* Or-ed mask of FMAN_KG_EXTRACT_xxx defines */ + uint32_t known_fields; + struct fman_kg_extract_def known_fields_def; + /* Number of entries in gen_extract */ + uint8_t gen_extract_num; + struct fman_kg_gen_extract_params gen_extract[FM_KG_NUM_OF_GENERIC_REGS]; + /* Number of entries in masks */ + uint8_t masks_num; + struct fman_kg_extract_mask masks[FM_KG_EXTRACT_MASKS_NUM]; + uint32_t def_scheme_0; + uint32_t def_scheme_1; +}; + +struct fman_kg_hash_params +{ + bool use_hash; + uint8_t shift_r; + uint32_t mask; /**< 24-bit mask */ + bool sym; /**< Symmetric hash for src and dest pairs */ +}; + +struct fman_kg_pp_params +{ + uint8_t base; + uint8_t shift; + uint8_t mask; + bool bypass_pp_gen; +}; + +struct fman_kg_cc_params +{ + uint8_t base_offset; + uint32_t qlcv_bits_sel; +}; + +enum fman_pcd_engine +{ + E_FMAN_PCD_INVALID = 0, /**< Invalid PCD engine indicated*/ + E_FMAN_PCD_DONE, /**< No PCD Engine indicated */ + E_FMAN_PCD_KG, /**< Keygen indicated */ + E_FMAN_PCD_CC, /**< Coarse classification indicated */ + E_FMAN_PCD_PLCR, /**< Policer indicated */ + E_FMAN_PCD_PRS /**< Parser indicated */ +}; + +struct fman_kg_cls_plan_params +{ + uint8_t entries_mask; + uint32_t mask_vector[FM_KG_NUM_CLS_PLAN_ENTR]; +}; + +struct fman_kg_scheme_params +{ + uint32_t match_vector; + struct fman_kg_extract_params extract_params; + struct fman_kg_hash_params hash_params; + uint32_t base_fqid; + /* What we do w/features supported per FM version ?? */ + bool bypass_fqid_gen; + struct fman_kg_pp_params policer_params; + struct fman_kg_cc_params cc_params; + bool update_counter; + /**< counter_value: Set scheme counter to the specified value; + * relevant only when update_counter = TRUE. */ + uint32_t counter_value; + enum fman_pcd_engine next_engine; + /**< Next engine action code */ + uint32_t next_engine_action; +}; + + + +int fman_kg_write_ar_wait(struct fman_kg_regs *regs, uint32_t fmkg_ar); +void fman_kg_write_sp(struct fman_kg_regs *regs, uint32_t sp, bool add); +void fman_kg_write_cpp(struct fman_kg_regs *regs, uint32_t cpp); +void fman_kg_get_event(struct fman_kg_regs *regs, + uint32_t *event, + uint32_t *scheme_idx); +void fman_kg_init(struct fman_kg_regs *regs, + uint32_t exceptions, + uint32_t dflt_nia); +void fman_kg_enable_scheme_interrupts(struct fman_kg_regs *regs); +void fman_kg_enable(struct fman_kg_regs *regs); +void fman_kg_disable(struct fman_kg_regs *regs); +int fman_kg_write_bind_cls_plans(struct fman_kg_regs *regs, + uint8_t hwport_id, + uint32_t bind_cls_plans); +int fman_kg_build_bind_cls_plans(uint8_t grp_base, + uint8_t grp_mask, + uint32_t *bind_cls_plans); +int fman_kg_write_bind_schemes(struct fman_kg_regs *regs, + uint8_t hwport_id, + uint32_t schemes); +int fman_kg_write_cls_plan(struct fman_kg_regs *regs, + uint8_t grp_id, + uint8_t entries_mask, + uint8_t hwport_id, + struct fman_kg_cp_regs *cls_plan_regs); +int fman_kg_build_cls_plan(struct fman_kg_cls_plan_params *params, + struct fman_kg_cp_regs *cls_plan_regs); +uint32_t fman_kg_get_schemes_total_counter(struct fman_kg_regs *regs); +int fman_kg_set_scheme_counter(struct fman_kg_regs *regs, + uint8_t scheme_id, + uint8_t hwport_id, + uint32_t counter); +int fman_kg_get_scheme_counter(struct fman_kg_regs *regs, + uint8_t scheme_id, + uint8_t hwport_id, + uint32_t *counter); +int fman_kg_delete_scheme(struct fman_kg_regs *regs, + uint8_t scheme_id, + uint8_t hwport_id); +int fman_kg_write_scheme(struct fman_kg_regs *regs, + uint8_t scheme_id, + uint8_t hwport_id, + struct fman_kg_scheme_regs *scheme_regs, + bool update_counter); +int fman_kg_build_scheme(struct fman_kg_scheme_params *params, + struct fman_kg_scheme_regs *scheme_regs); +void fman_kg_get_capture(struct fman_kg_regs *regs, + struct fman_kg_ex_ecc_attr *ecc_attr, + bool clear); +void fman_kg_get_exception(struct fman_kg_regs *regs, + uint32_t *events, + uint32_t *scheme_ids, + bool clear); +void fman_kg_set_exception(struct fman_kg_regs *regs, + uint32_t exception, + bool enable); +void fman_kg_set_dflt_val(struct fman_kg_regs *regs, + uint8_t def_id, + uint32_t val); +void fman_kg_set_data_after_prs(struct fman_kg_regs *regs, uint8_t offset); + + + +/**************************************************************************//** + @Description NIA Description +*//***************************************************************************/ +#define KG_NIA_ORDER_RESTOR 0x00800000 +#define KG_NIA_ENG_FM_CTL 0x00000000 +#define KG_NIA_ENG_PRS 0x00440000 +#define KG_NIA_ENG_KG 0x00480000 +#define KG_NIA_ENG_PLCR 0x004C0000 +#define KG_NIA_ENG_BMI 0x00500000 +#define KG_NIA_ENG_QMI_ENQ 0x00540000 +#define KG_NIA_ENG_QMI_DEQ 0x00580000 +#define KG_NIA_ENG_MASK 0x007C0000 + +#define KG_NIA_AC_MASK 0x0003FFFF + +#define KG_NIA_INVALID 0xFFFFFFFF + +static __inline__ uint32_t fm_kg_build_nia(enum fman_pcd_engine next_engine, + uint32_t next_engine_action) +{ + uint32_t nia; + + if (next_engine_action & ~KG_NIA_AC_MASK) + return KG_NIA_INVALID; + + switch (next_engine) { + case E_FMAN_PCD_DONE: + nia = KG_NIA_ENG_BMI | next_engine_action; + break; + + case E_FMAN_PCD_KG: + nia = KG_NIA_ENG_KG | next_engine_action; + break; + + case E_FMAN_PCD_CC: + nia = KG_NIA_ENG_FM_CTL | next_engine_action; + break; + + case E_FMAN_PCD_PLCR: + nia = KG_NIA_ENG_PLCR | next_engine_action; + break; + + default: + nia = KG_NIA_INVALID; + } + + return nia; +} + +#endif /* __FSL_FMAN_KG_H */ diff --git a/sys/contrib/ncsw/inc/flib/fsl_fman_memac.h b/sys/contrib/ncsw/inc/flib/fsl_fman_memac.h new file mode 100644 index 000000000000..0dd8286bda93 --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/fsl_fman_memac.h @@ -0,0 +1,427 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef __FSL_FMAN_MEMAC_H +#define __FSL_FMAN_MEMAC_H + +#include "common/general.h" +#include "fsl_enet.h" + + +#define MEMAC_NUM_OF_PADDRS 7 /* Num of additional exact match MAC adr regs */ + +/* Control and Configuration Register (COMMAND_CONFIG) */ +#define CMD_CFG_MG 0x80000000 /* 00 Magic Packet detection */ +#define CMD_CFG_REG_LOWP_RXETY 0x01000000 /* 07 Rx low power indication */ +#define CMD_CFG_TX_LOWP_ENA 0x00800000 /* 08 Tx Low Power Idle Enable */ +#define CMD_CFG_SFD_ANY 0x00200000 /* 10 Disable SFD check */ +#define CMD_CFG_PFC_MODE 0x00080000 /* 12 Enable PFC */ +#define CMD_CFG_NO_LEN_CHK 0x00020000 /* 14 Payload length check disable */ +#define CMD_CFG_SEND_IDLE 0x00010000 /* 15 Force idle generation */ +#define CMD_CFG_CNT_FRM_EN 0x00002000 /* 18 Control frame rx enable */ +#define CMD_CFG_SW_RESET 0x00001000 /* 19 S/W Reset, self clearing bit */ +#define CMD_CFG_TX_PAD_EN 0x00000800 /* 20 Enable Tx padding of frames */ +#define CMD_CFG_LOOPBACK_EN 0x00000400 /* 21 XGMII/GMII loopback enable */ +#define CMD_CFG_TX_ADDR_INS 0x00000200 /* 22 Tx source MAC addr insertion */ +#define CMD_CFG_PAUSE_IGNORE 0x00000100 /* 23 Ignore Pause frame quanta */ +#define CMD_CFG_PAUSE_FWD 0x00000080 /* 24 Terminate/frwd Pause frames */ +#define CMD_CFG_CRC_FWD 0x00000040 /* 25 Terminate/frwd CRC of frames */ +#define CMD_CFG_PAD_EN 0x00000020 /* 26 Frame padding removal */ +#define CMD_CFG_PROMIS_EN 0x00000010 /* 27 Promiscuous operation enable */ +#define CMD_CFG_WAN_MODE 0x00000008 /* 28 WAN mode enable */ +#define CMD_CFG_RX_EN 0x00000002 /* 30 MAC receive path enable */ +#define CMD_CFG_TX_EN 0x00000001 /* 31 MAC transmit path enable */ + +/* Transmit FIFO Sections Register (TX_FIFO_SECTIONS) */ +#define TX_FIFO_SECTIONS_TX_EMPTY_MASK 0xFFFF0000 +#define TX_FIFO_SECTIONS_TX_AVAIL_MASK 0x0000FFFF +#define TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G 0x00400000 +#define TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_1G 0x00100000 +#define TX_FIFO_SECTIONS_TX_EMPTY_PFC_10G 0x00360000 +#define TX_FIFO_SECTIONS_TX_EMPTY_PFC_1G 0x00040000 +#define TX_FIFO_SECTIONS_TX_AVAIL_10G 0x00000019 +#define TX_FIFO_SECTIONS_TX_AVAIL_1G 0x00000020 +#define TX_FIFO_SECTIONS_TX_AVAIL_SLOW_10G 0x00000060 + +#define GET_TX_EMPTY_DEFAULT_VALUE(_val) \ +_val &= ~TX_FIFO_SECTIONS_TX_EMPTY_MASK; \ +((_val == TX_FIFO_SECTIONS_TX_AVAIL_10G) ? \ + (_val |= TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G) : \ + (_val |= TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_1G)); + +#define GET_TX_EMPTY_PFC_VALUE(_val) \ +_val &= ~TX_FIFO_SECTIONS_TX_EMPTY_MASK; \ +((_val == TX_FIFO_SECTIONS_TX_AVAIL_10G) ? \ + (_val |= TX_FIFO_SECTIONS_TX_EMPTY_PFC_10G) : \ + (_val |= TX_FIFO_SECTIONS_TX_EMPTY_PFC_1G)); + +/* Interface Mode Register (IF_MODE) */ +#define IF_MODE_MASK 0x00000003 /* 30-31 Mask on i/f mode bits */ +#define IF_MODE_XGMII 0x00000000 /* 30-31 XGMII (10G) interface */ +#define IF_MODE_GMII 0x00000002 /* 30-31 GMII (1G) interface */ +#define IF_MODE_RGMII 0x00000004 +#define IF_MODE_RGMII_AUTO 0x00008000 +#define IF_MODE_RGMII_1000 0x00004000 /* 10 - 1000Mbps RGMII */ +#define IF_MODE_RGMII_100 0x00000000 /* 00 - 100Mbps RGMII */ +#define IF_MODE_RGMII_10 0x00002000 /* 01 - 10Mbps RGMII */ +#define IF_MODE_RGMII_SP_MASK 0x00006000 /* Setsp mask bits */ +#define IF_MODE_RGMII_FD 0x00001000 /* Full duplex RGMII */ +#define IF_MODE_HD 0x00000040 /* Half duplex operation */ + +/* Hash table Control Register (HASHTABLE_CTRL) */ +#define HASH_CTRL_MCAST_SHIFT 26 +#define HASH_CTRL_MCAST_EN 0x00000100 /* 23 Mcast frame rx for hash */ +#define HASH_CTRL_ADDR_MASK 0x0000003F /* 26-31 Hash table address code */ + +#define GROUP_ADDRESS 0x0000010000000000LL /* MAC mcast indication */ +#define HASH_TABLE_SIZE 64 /* Hash tbl size */ + +/* Transmit Inter-Packet Gap Length Register (TX_IPG_LENGTH) */ +#define MEMAC_TX_IPG_LENGTH_MASK 0x0000003F + +/* Statistics Configuration Register (STATN_CONFIG) */ +#define STATS_CFG_CLR 0x00000004 /* 29 Reset all counters */ +#define STATS_CFG_CLR_ON_RD 0x00000002 /* 30 Clear on read */ +#define STATS_CFG_SATURATE 0x00000001 /* 31 Saturate at the maximum val */ + +/* Interrupt Mask Register (IMASK) */ +#define MEMAC_IMASK_MGI 0x40000000 /* 1 Magic pkt detect indication */ +#define MEMAC_IMASK_TSECC_ER 0x20000000 /* 2 Timestamp FIFO ECC error evnt */ +#define MEMAC_IMASK_TECC_ER 0x02000000 /* 6 Transmit frame ECC error evnt */ +#define MEMAC_IMASK_RECC_ER 0x01000000 /* 7 Receive frame ECC error evnt */ + +#define MEMAC_ALL_ERRS_IMASK \ + ((uint32_t)(MEMAC_IMASK_TSECC_ER | \ + MEMAC_IMASK_TECC_ER | \ + MEMAC_IMASK_RECC_ER | \ + MEMAC_IMASK_MGI)) + +#define MEMAC_IEVNT_PCS 0x80000000 /* PCS (XG). Link sync (G) */ +#define MEMAC_IEVNT_AN 0x40000000 /* Auto-negotiation */ +#define MEMAC_IEVNT_LT 0x20000000 /* Link Training/New page */ +#define MEMAC_IEVNT_MGI 0x00004000 /* Magic pkt detection */ +#define MEMAC_IEVNT_TS_ECC_ER 0x00002000 /* Timestamp FIFO ECC error */ +#define MEMAC_IEVNT_RX_FIFO_OVFL 0x00001000 /* Rx FIFO overflow */ +#define MEMAC_IEVNT_TX_FIFO_UNFL 0x00000800 /* Tx FIFO underflow */ +#define MEMAC_IEVNT_TX_FIFO_OVFL 0x00000400 /* Tx FIFO overflow */ +#define MEMAC_IEVNT_TX_ECC_ER 0x00000200 /* Tx frame ECC error */ +#define MEMAC_IEVNT_RX_ECC_ER 0x00000100 /* Rx frame ECC error */ +#define MEMAC_IEVNT_LI_FAULT 0x00000080 /* Link Interruption flt */ +#define MEMAC_IEVNT_RX_EMPTY 0x00000040 /* Rx FIFO empty */ +#define MEMAC_IEVNT_TX_EMPTY 0x00000020 /* Tx FIFO empty */ +#define MEMAC_IEVNT_RX_LOWP 0x00000010 /* Low Power Idle */ +#define MEMAC_IEVNT_PHY_LOS 0x00000004 /* Phy loss of signal */ +#define MEMAC_IEVNT_REM_FAULT 0x00000002 /* Remote fault (XGMII) */ +#define MEMAC_IEVNT_LOC_FAULT 0x00000001 /* Local fault (XGMII) */ + +enum memac_counters { + E_MEMAC_COUNTER_R64, + E_MEMAC_COUNTER_R127, + E_MEMAC_COUNTER_R255, + E_MEMAC_COUNTER_R511, + E_MEMAC_COUNTER_R1023, + E_MEMAC_COUNTER_R1518, + E_MEMAC_COUNTER_R1519X, + E_MEMAC_COUNTER_RFRG, + E_MEMAC_COUNTER_RJBR, + E_MEMAC_COUNTER_RDRP, + E_MEMAC_COUNTER_RALN, + E_MEMAC_COUNTER_TUND, + E_MEMAC_COUNTER_ROVR, + E_MEMAC_COUNTER_RXPF, + E_MEMAC_COUNTER_TXPF, + E_MEMAC_COUNTER_ROCT, + E_MEMAC_COUNTER_RMCA, + E_MEMAC_COUNTER_RBCA, + E_MEMAC_COUNTER_RPKT, + E_MEMAC_COUNTER_RUCA, + E_MEMAC_COUNTER_RERR, + E_MEMAC_COUNTER_TOCT, + E_MEMAC_COUNTER_TMCA, + E_MEMAC_COUNTER_TBCA, + E_MEMAC_COUNTER_TUCA, + E_MEMAC_COUNTER_TERR +}; + +#define DEFAULT_PAUSE_QUANTA 0xf000 +#define DEFAULT_FRAME_LENGTH 0x600 +#define DEFAULT_TX_IPG_LENGTH 12 + +/* + * memory map + */ + +struct mac_addr { + uint32_t mac_addr_l; /* Lower 32 bits of 48-bit MAC address */ + uint32_t mac_addr_u; /* Upper 16 bits of 48-bit MAC address */ +}; + +struct memac_regs { + /* General Control and Status */ + uint32_t res0000[2]; + uint32_t command_config; /* 0x008 Ctrl and cfg */ + struct mac_addr mac_addr0; /* 0x00C-0x010 MAC_ADDR_0...1 */ + uint32_t maxfrm; /* 0x014 Max frame length */ + uint32_t res0018[1]; + uint32_t rx_fifo_sections; /* Receive FIFO configuration reg */ + uint32_t tx_fifo_sections; /* Transmit FIFO configuration reg */ + uint32_t res0024[2]; + uint32_t hashtable_ctrl; /* 0x02C Hash table control */ + uint32_t res0030[4]; + uint32_t ievent; /* 0x040 Interrupt event */ + uint32_t tx_ipg_length; /* 0x044 Transmitter inter-packet-gap */ + uint32_t res0048; + uint32_t imask; /* 0x04C Interrupt mask */ + uint32_t res0050; + uint32_t pause_quanta[4]; /* 0x054 Pause quanta */ + uint32_t pause_thresh[4]; /* 0x064 Pause quanta threshold */ + uint32_t rx_pause_status; /* 0x074 Receive pause status */ + uint32_t res0078[2]; + struct mac_addr mac_addr[MEMAC_NUM_OF_PADDRS]; /* 0x80-0x0B4 mac padr */ + uint32_t lpwake_timer; /* 0x0B8 Low Power Wakeup Timer */ + uint32_t sleep_timer; /* 0x0BC Transmit EEE Low Power Timer */ + uint32_t res00c0[8]; + uint32_t statn_config; /* 0x0E0 Statistics configuration */ + uint32_t res00e4[7]; + /* Rx Statistics Counter */ + uint32_t reoct_l; + uint32_t reoct_u; + uint32_t roct_l; + uint32_t roct_u; + uint32_t raln_l; + uint32_t raln_u; + uint32_t rxpf_l; + uint32_t rxpf_u; + uint32_t rfrm_l; + uint32_t rfrm_u; + uint32_t rfcs_l; + uint32_t rfcs_u; + uint32_t rvlan_l; + uint32_t rvlan_u; + uint32_t rerr_l; + uint32_t rerr_u; + uint32_t ruca_l; + uint32_t ruca_u; + uint32_t rmca_l; + uint32_t rmca_u; + uint32_t rbca_l; + uint32_t rbca_u; + uint32_t rdrp_l; + uint32_t rdrp_u; + uint32_t rpkt_l; + uint32_t rpkt_u; + uint32_t rund_l; + uint32_t rund_u; + uint32_t r64_l; + uint32_t r64_u; + uint32_t r127_l; + uint32_t r127_u; + uint32_t r255_l; + uint32_t r255_u; + uint32_t r511_l; + uint32_t r511_u; + uint32_t r1023_l; + uint32_t r1023_u; + uint32_t r1518_l; + uint32_t r1518_u; + uint32_t r1519x_l; + uint32_t r1519x_u; + uint32_t rovr_l; + uint32_t rovr_u; + uint32_t rjbr_l; + uint32_t rjbr_u; + uint32_t rfrg_l; + uint32_t rfrg_u; + uint32_t rcnp_l; + uint32_t rcnp_u; + uint32_t rdrntp_l; + uint32_t rdrntp_u; + uint32_t res01d0[12]; + /* Tx Statistics Counter */ + uint32_t teoct_l; + uint32_t teoct_u; + uint32_t toct_l; + uint32_t toct_u; + uint32_t res0210[2]; + uint32_t txpf_l; + uint32_t txpf_u; + uint32_t tfrm_l; + uint32_t tfrm_u; + uint32_t tfcs_l; + uint32_t tfcs_u; + uint32_t tvlan_l; + uint32_t tvlan_u; + uint32_t terr_l; + uint32_t terr_u; + uint32_t tuca_l; + uint32_t tuca_u; + uint32_t tmca_l; + uint32_t tmca_u; + uint32_t tbca_l; + uint32_t tbca_u; + uint32_t res0258[2]; + uint32_t tpkt_l; + uint32_t tpkt_u; + uint32_t tund_l; + uint32_t tund_u; + uint32_t t64_l; + uint32_t t64_u; + uint32_t t127_l; + uint32_t t127_u; + uint32_t t255_l; + uint32_t t255_u; + uint32_t t511_l; + uint32_t t511_u; + uint32_t t1023_l; + uint32_t t1023_u; + uint32_t t1518_l; + uint32_t t1518_u; + uint32_t t1519x_l; + uint32_t t1519x_u; + uint32_t res02a8[6]; + uint32_t tcnp_l; + uint32_t tcnp_u; + uint32_t res02c8[14]; + /* Line Interface Control */ + uint32_t if_mode; /* 0x300 Interface Mode Control */ + uint32_t if_status; /* 0x304 Interface Status */ + uint32_t res0308[14]; + /* HiGig/2 */ + uint32_t hg_config; /* 0x340 Control and cfg */ + uint32_t res0344[3]; + uint32_t hg_pause_quanta; /* 0x350 Pause quanta */ + uint32_t res0354[3]; + uint32_t hg_pause_thresh; /* 0x360 Pause quanta threshold */ + uint32_t res0364[3]; + uint32_t hgrx_pause_status; /* 0x370 Receive pause status */ + uint32_t hg_fifos_status; /* 0x374 fifos status */ + uint32_t rhm; /* 0x378 rx messages counter */ + uint32_t thm; /* 0x37C tx messages counter */ +}; + +struct memac_cfg { + bool reset_on_init; + bool rx_error_discard; + bool pause_ignore; + bool pause_forward_enable; + bool no_length_check_enable; + bool cmd_frame_enable; + bool send_idle_enable; + bool wan_mode_enable; + bool promiscuous_mode_enable; + bool tx_addr_ins_enable; + bool loopback_enable; + bool lgth_check_nostdr; + bool time_stamp_enable; + bool pad_enable; + bool phy_tx_ena_on; + bool rx_sfd_any; + bool rx_pbl_fwd; + bool tx_pbl_fwd; + bool debug_mode; + bool wake_on_lan; + uint16_t max_frame_length; + uint16_t pause_quanta; + uint32_t tx_ipg_length; +}; + + +/** + * fman_memac_defconfig() - Get default MEMAC configuration + * @cfg: pointer to configuration structure. + * + * Call this function to obtain a default set of configuration values for + * initializing MEMAC. The user can overwrite any of the values before calling + * fman_memac_init(), if specific configuration needs to be applied. + */ +void fman_memac_defconfig(struct memac_cfg *cfg); + +int fman_memac_init(struct memac_regs *regs, + struct memac_cfg *cfg, + enum enet_interface enet_interface, + enum enet_speed enet_speed, + bool slow_10g_if, + uint32_t exceptions); + +void fman_memac_enable(struct memac_regs *regs, bool apply_rx, bool apply_tx); + +void fman_memac_disable(struct memac_regs *regs, bool apply_rx, bool apply_tx); + +void fman_memac_set_promiscuous(struct memac_regs *regs, bool val); + +void fman_memac_add_addr_in_paddr(struct memac_regs *regs, + uint8_t *adr, + uint8_t paddr_num); + +void fman_memac_clear_addr_in_paddr(struct memac_regs *regs, + uint8_t paddr_num); + +uint64_t fman_memac_get_counter(struct memac_regs *regs, + enum memac_counters reg_name); + +void fman_memac_set_tx_pause_frames(struct memac_regs *regs, + uint8_t priority, uint16_t pauseTime, uint16_t threshTime); + +uint16_t fman_memac_get_max_frame_len(struct memac_regs *regs); + +void fman_memac_set_exception(struct memac_regs *regs, uint32_t val, + bool enable); + +void fman_memac_reset_stat(struct memac_regs *regs); + +void fman_memac_reset(struct memac_regs *regs); + +void fman_memac_reset_filter_table(struct memac_regs *regs); + +void fman_memac_set_hash_table_entry(struct memac_regs *regs, uint32_t crc); + +void fman_memac_set_hash_table(struct memac_regs *regs, uint32_t val); + +void fman_memac_set_rx_ignore_pause_frames(struct memac_regs *regs, + bool enable); + +void fman_memac_set_wol(struct memac_regs *regs, bool enable); + +uint32_t fman_memac_get_event(struct memac_regs *regs, uint32_t ev_mask); + +void fman_memac_ack_event(struct memac_regs *regs, uint32_t ev_mask); + +uint32_t fman_memac_get_interrupt_mask(struct memac_regs *regs); + +void fman_memac_adjust_link(struct memac_regs *regs, + enum enet_interface iface_mode, + enum enet_speed speed, bool full_dx); + + + +#endif /*__FSL_FMAN_MEMAC_H*/ diff --git a/sys/contrib/ncsw/inc/flib/fsl_fman_memac_mii_acc.h b/sys/contrib/ncsw/inc/flib/fsl_fman_memac_mii_acc.h new file mode 100755 index 000000000000..b43044501b80 --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/fsl_fman_memac_mii_acc.h @@ -0,0 +1,78 @@ +/* + * Copyright 2008-2013 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __FSL_FMAN_MEMAC_MII_ACC_H +#define __FSL_FMAN_MEMAC_MII_ACC_H + +#include "common/general.h" +#include "fsl_enet.h" +/* MII Management Registers */ +#define MDIO_CFG_CLK_DIV_MASK 0x0080ff80 +#define MDIO_CFG_CLK_DIV_SHIFT 7 +#define MDIO_CFG_HOLD_MASK 0x0000001c +#define MDIO_CFG_ENC45 0x00000040 +#define MDIO_CFG_READ_ERR 0x00000002 +#define MDIO_CFG_BSY 0x00000001 + +#define MDIO_CTL_PHY_ADDR_SHIFT 5 +#define MDIO_CTL_READ 0x00008000 + +#define MDIO_DATA_BSY 0x80000000 + +/*MEMAC Internal PHY Registers - SGMII */ +#define PHY_SGMII_CR_PHY_RESET 0x8000 +#define PHY_SGMII_CR_RESET_AN 0x0200 +#define PHY_SGMII_CR_DEF_VAL 0x1140 +#define PHY_SGMII_DEV_ABILITY_SGMII 0x4001 +#define PHY_SGMII_DEV_ABILITY_1000X 0x01A0 +#define PHY_SGMII_IF_MODE_AN 0x0002 +#define PHY_SGMII_IF_MODE_SGMII 0x0001 +#define PHY_SGMII_IF_MODE_1000X 0x0000 + +/*----------------------------------------------------*/ +/* MII Configuration Control Memory Map Registers */ +/*----------------------------------------------------*/ +struct memac_mii_access_mem_map { + uint32_t mdio_cfg; /* 0x030 */ + uint32_t mdio_ctrl; /* 0x034 */ + uint32_t mdio_data; /* 0x038 */ + uint32_t mdio_addr; /* 0x03c */ +}; + +int fman_memac_mii_read_phy_reg(struct memac_mii_access_mem_map *mii_regs, + uint8_t phy_addr, uint8_t reg, uint16_t *data, + enum enet_speed enet_speed); +int fman_memac_mii_write_phy_reg(struct memac_mii_access_mem_map *mii_regs, + uint8_t phy_addr, uint8_t reg, uint16_t data, + enum enet_speed enet_speed); + +#endif /* __MAC_API_MEMAC_MII_ACC_H */ diff --git a/sys/contrib/ncsw/inc/flib/fsl_fman_port.h b/sys/contrib/ncsw/inc/flib/fsl_fman_port.h new file mode 100755 index 000000000000..080a23e963b9 --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/fsl_fman_port.h @@ -0,0 +1,593 @@ +/* + * Copyright 2008-2013 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __FSL_FMAN_PORT_H +#define __FSL_FMAN_PORT_H + +#include "fsl_fman_sp.h" + +/** @Collection Registers bit fields */ + +/** @Description BMI defines */ +#define BMI_EBD_EN 0x80000000 + +#define BMI_PORT_CFG_EN 0x80000000 +#define BMI_PORT_CFG_FDOVR 0x02000000 +#define BMI_PORT_CFG_IM 0x01000000 + +#define BMI_PORT_STATUS_BSY 0x80000000 + +#define BMI_DMA_ATTR_SWP_SHIFT FMAN_SP_DMA_ATTR_SWP_SHIFT +#define BMI_DMA_ATTR_IC_STASH_ON 0x10000000 +#define BMI_DMA_ATTR_HDR_STASH_ON 0x04000000 +#define BMI_DMA_ATTR_SG_STASH_ON 0x01000000 +#define BMI_DMA_ATTR_WRITE_OPTIMIZE FMAN_SP_DMA_ATTR_WRITE_OPTIMIZE + +#define BMI_RX_FIFO_PRI_ELEVATION_SHIFT 16 +#define BMI_RX_FIFO_THRESHOLD_ETHE 0x80000000 + +#define BMI_TX_FRAME_END_CS_IGNORE_SHIFT 24 +#define BMI_RX_FRAME_END_CS_IGNORE_SHIFT 24 +#define BMI_RX_FRAME_END_CUT_SHIFT 16 + +#define BMI_IC_TO_EXT_SHIFT FMAN_SP_IC_TO_EXT_SHIFT +#define BMI_IC_FROM_INT_SHIFT FMAN_SP_IC_FROM_INT_SHIFT + +#define BMI_INT_BUF_MARG_SHIFT 28 +#define BMI_EXT_BUF_MARG_START_SHIFT FMAN_SP_EXT_BUF_MARG_START_SHIFT + +#define BMI_CMD_MR_LEAC 0x00200000 +#define BMI_CMD_MR_SLEAC 0x00100000 +#define BMI_CMD_MR_MA 0x00080000 +#define BMI_CMD_MR_DEAS 0x00040000 +#define BMI_CMD_RX_MR_DEF (BMI_CMD_MR_LEAC | \ + BMI_CMD_MR_SLEAC | \ + BMI_CMD_MR_MA | \ + BMI_CMD_MR_DEAS) +#define BMI_CMD_TX_MR_DEF 0 +#define BMI_CMD_OP_MR_DEF (BMI_CMD_MR_DEAS | \ + BMI_CMD_MR_MA) + +#define BMI_CMD_ATTR_ORDER 0x80000000 +#define BMI_CMD_ATTR_SYNC 0x02000000 +#define BMI_CMD_ATTR_COLOR_SHIFT 26 + +#define BMI_FIFO_PIPELINE_DEPTH_SHIFT 12 +#define BMI_NEXT_ENG_FD_BITS_SHIFT 24 +#define BMI_FRAME_END_CS_IGNORE_SHIFT 24 + +#define BMI_COUNTERS_EN 0x80000000 + +#define BMI_EXT_BUF_POOL_VALID FMAN_SP_EXT_BUF_POOL_VALID +#define BMI_EXT_BUF_POOL_EN_COUNTER FMAN_SP_EXT_BUF_POOL_EN_COUNTER +#define BMI_EXT_BUF_POOL_BACKUP FMAN_SP_EXT_BUF_POOL_BACKUP +#define BMI_EXT_BUF_POOL_ID_SHIFT 16 +#define BMI_EXT_BUF_POOL_ID_MASK 0x003F0000 +#define BMI_POOL_DEP_NUM_OF_POOLS_SHIFT 16 + +#define BMI_TX_FIFO_MIN_FILL_SHIFT 16 +#define BMI_TX_FIFO_PIPELINE_DEPTH_SHIFT 12 + +#define MAX_PERFORMANCE_TASK_COMP 64 +#define MAX_PERFORMANCE_RX_QUEUE_COMP 64 +#define MAX_PERFORMANCE_TX_QUEUE_COMP 8 +#define MAX_PERFORMANCE_DMA_COMP 16 +#define MAX_PERFORMANCE_FIFO_COMP 1024 + +#define BMI_PERFORMANCE_TASK_COMP_SHIFT 24 +#define BMI_PERFORMANCE_QUEUE_COMP_SHIFT 16 +#define BMI_PERFORMANCE_DMA_COMP_SHIFT 12 + +#define BMI_RATE_LIMIT_GRAN_TX 16000 /* In Kbps */ +#define BMI_RATE_LIMIT_GRAN_OP 10000 /* In frames */ +#define BMI_RATE_LIMIT_MAX_RATE_IN_GRAN_UNITS 1024 +#define BMI_RATE_LIMIT_MAX_BURST_SIZE 1024 /* In KBytes */ +#define BMI_RATE_LIMIT_MAX_BURST_SHIFT 16 +#define BMI_RATE_LIMIT_HIGH_BURST_SIZE_GRAN 0x80000000 +#define BMI_RATE_LIMIT_SCALE_TSBS_SHIFT 16 +#define BMI_RATE_LIMIT_SCALE_EN 0x80000000 +#define BMI_SG_DISABLE FMAN_SP_SG_DISABLE + +/** @Description QMI defines */ +#define QMI_PORT_CFG_EN 0x80000000 +#define QMI_PORT_CFG_EN_COUNTERS 0x10000000 + +#define QMI_PORT_STATUS_DEQ_TNUM_BSY 0x80000000 +#define QMI_PORT_STATUS_DEQ_FD_BSY 0x20000000 + +#define QMI_DEQ_CFG_PRI 0x80000000 +#define QMI_DEQ_CFG_TYPE1 0x10000000 +#define QMI_DEQ_CFG_TYPE2 0x20000000 +#define QMI_DEQ_CFG_TYPE3 0x30000000 +#define QMI_DEQ_CFG_PREFETCH_PARTIAL 0x01000000 +#define QMI_DEQ_CFG_PREFETCH_FULL 0x03000000 +#define QMI_DEQ_CFG_SP_MASK 0xf +#define QMI_DEQ_CFG_SP_SHIFT 20 + + +/** @Description General port defines */ +#define FMAN_PORT_EXT_POOLS_NUM(fm_rev_maj) \ + (((fm_rev_maj) == 4) ? 4 : 8) +#define FMAN_PORT_MAX_EXT_POOLS_NUM 8 +#define FMAN_PORT_OBS_EXT_POOLS_NUM 2 +#define FMAN_PORT_CG_MAP_NUM 8 +#define FMAN_PORT_PRS_RESULT_WORDS_NUM 8 +#define FMAN_PORT_BMI_FIFO_UNITS 0x100 +#define FMAN_PORT_IC_OFFSET_UNITS 0x10 + + +/** @Collection FM Port Register Map */ + +/** @Description BMI Rx port register map */ +struct fman_port_rx_bmi_regs { + uint32_t fmbm_rcfg; /**< Rx Configuration */ + uint32_t fmbm_rst; /**< Rx Status */ + uint32_t fmbm_rda; /**< Rx DMA attributes*/ + uint32_t fmbm_rfp; /**< Rx FIFO Parameters*/ + uint32_t fmbm_rfed; /**< Rx Frame End Data*/ + uint32_t fmbm_ricp; /**< Rx Internal Context Parameters*/ + uint32_t fmbm_rim; /**< Rx Internal Buffer Margins*/ + uint32_t fmbm_rebm; /**< Rx External Buffer Margins*/ + uint32_t fmbm_rfne; /**< Rx Frame Next Engine*/ + uint32_t fmbm_rfca; /**< Rx Frame Command Attributes.*/ + uint32_t fmbm_rfpne; /**< Rx Frame Parser Next Engine*/ + uint32_t fmbm_rpso; /**< Rx Parse Start Offset*/ + uint32_t fmbm_rpp; /**< Rx Policer Profile */ + uint32_t fmbm_rccb; /**< Rx Coarse Classification Base */ + uint32_t fmbm_reth; /**< Rx Excessive Threshold */ + uint32_t reserved003c[1]; /**< (0x03C 0x03F) */ + uint32_t fmbm_rprai[FMAN_PORT_PRS_RESULT_WORDS_NUM]; + /**< Rx Parse Results Array Init*/ + uint32_t fmbm_rfqid; /**< Rx Frame Queue ID*/ + uint32_t fmbm_refqid; /**< Rx Error Frame Queue ID*/ + uint32_t fmbm_rfsdm; /**< Rx Frame Status Discard Mask*/ + uint32_t fmbm_rfsem; /**< Rx Frame Status Error Mask*/ + uint32_t fmbm_rfene; /**< Rx Frame Enqueue Next Engine */ + uint32_t reserved0074[0x2]; /**< (0x074-0x07C) */ + uint32_t fmbm_rcmne; /**< Rx Frame Continuous Mode Next Engine */ + uint32_t reserved0080[0x20];/**< (0x080 0x0FF) */ + uint32_t fmbm_ebmpi[FMAN_PORT_MAX_EXT_POOLS_NUM]; + /**< Buffer Manager pool Information-*/ + uint32_t fmbm_acnt[FMAN_PORT_MAX_EXT_POOLS_NUM]; + /**< Allocate Counter-*/ + uint32_t reserved0130[8]; + /**< 0x130/0x140 - 0x15F reserved -*/ + uint32_t fmbm_rcgm[FMAN_PORT_CG_MAP_NUM]; + /**< Congestion Group Map*/ + uint32_t fmbm_mpd; /**< BM Pool Depletion */ + uint32_t reserved0184[0x1F]; /**< (0x184 0x1FF) */ + uint32_t fmbm_rstc; /**< Rx Statistics Counters*/ + uint32_t fmbm_rfrc; /**< Rx Frame Counter*/ + uint32_t fmbm_rfbc; /**< Rx Bad Frames Counter*/ + uint32_t fmbm_rlfc; /**< Rx Large Frames Counter*/ + uint32_t fmbm_rffc; /**< Rx Filter Frames Counter*/ + uint32_t fmbm_rfdc; /**< Rx Frame Discard Counter*/ + uint32_t fmbm_rfldec; /**< Rx Frames List DMA Error Counter*/ + uint32_t fmbm_rodc; /**< Rx Out of Buffers Discard nntr*/ + uint32_t fmbm_rbdc; /**< Rx Buffers Deallocate Counter*/ + uint32_t reserved0224[0x17]; /**< (0x224 0x27F) */ + uint32_t fmbm_rpc; /**< Rx Performance Counters*/ + uint32_t fmbm_rpcp; /**< Rx Performance Count Parameters*/ + uint32_t fmbm_rccn; /**< Rx Cycle Counter*/ + uint32_t fmbm_rtuc; /**< Rx Tasks Utilization Counter*/ + uint32_t fmbm_rrquc; /**< Rx Receive Queue Utilization cntr*/ + uint32_t fmbm_rduc; /**< Rx DMA Utilization Counter*/ + uint32_t fmbm_rfuc; /**< Rx FIFO Utilization Counter*/ + uint32_t fmbm_rpac; /**< Rx Pause Activation Counter*/ + uint32_t reserved02a0[0x18]; /**< (0x2A0 0x2FF) */ + uint32_t fmbm_rdbg; /**< Rx Debug-*/ +}; + +/** @Description BMI Tx port register map */ +struct fman_port_tx_bmi_regs { + uint32_t fmbm_tcfg; /**< Tx Configuration */ + uint32_t fmbm_tst; /**< Tx Status */ + uint32_t fmbm_tda; /**< Tx DMA attributes */ + uint32_t fmbm_tfp; /**< Tx FIFO Parameters */ + uint32_t fmbm_tfed; /**< Tx Frame End Data */ + uint32_t fmbm_ticp; /**< Tx Internal Context Parameters */ + uint32_t fmbm_tfdne; /**< Tx Frame Dequeue Next Engine. */ + uint32_t fmbm_tfca; /**< Tx Frame Command attribute. */ + uint32_t fmbm_tcfqid; /**< Tx Confirmation Frame Queue ID. */ + uint32_t fmbm_tefqid; /**< Tx Frame Error Queue ID */ + uint32_t fmbm_tfene; /**< Tx Frame Enqueue Next Engine */ + uint32_t fmbm_trlmts; /**< Tx Rate Limiter Scale */ + uint32_t fmbm_trlmt; /**< Tx Rate Limiter */ + uint32_t reserved0034[0x0e]; /**< (0x034-0x6c) */ + uint32_t fmbm_tccb; /**< Tx Coarse Classification base */ + uint32_t fmbm_tfne; /**< Tx Frame Next Engine */ + uint32_t fmbm_tpfcm[0x02]; /**< Tx Priority based Flow Control (PFC) Mapping */ + uint32_t fmbm_tcmne; /**< Tx Frame Continuous Mode Next Engine */ + uint32_t reserved0080[0x60]; /**< (0x080-0x200) */ + uint32_t fmbm_tstc; /**< Tx Statistics Counters */ + uint32_t fmbm_tfrc; /**< Tx Frame Counter */ + uint32_t fmbm_tfdc; /**< Tx Frames Discard Counter */ + uint32_t fmbm_tfledc; /**< Tx Frame len error discard cntr */ + uint32_t fmbm_tfufdc; /**< Tx Frame unsprt frmt discard cntr*/ + uint32_t fmbm_tbdc; /**< Tx Buffers Deallocate Counter */ + uint32_t reserved0218[0x1A]; /**< (0x218-0x280) */ + uint32_t fmbm_tpc; /**< Tx Performance Counters*/ + uint32_t fmbm_tpcp; /**< Tx Performance Count Parameters*/ + uint32_t fmbm_tccn; /**< Tx Cycle Counter*/ + uint32_t fmbm_ttuc; /**< Tx Tasks Utilization Counter*/ + uint32_t fmbm_ttcquc; /**< Tx Transmit conf Q util Counter*/ + uint32_t fmbm_tduc; /**< Tx DMA Utilization Counter*/ + uint32_t fmbm_tfuc; /**< Tx FIFO Utilization Counter*/ +}; + +/** @Description BMI O/H port register map */ +struct fman_port_oh_bmi_regs { + uint32_t fmbm_ocfg; /**< O/H Configuration */ + uint32_t fmbm_ost; /**< O/H Status */ + uint32_t fmbm_oda; /**< O/H DMA attributes */ + uint32_t fmbm_oicp; /**< O/H Internal Context Parameters */ + uint32_t fmbm_ofdne; /**< O/H Frame Dequeue Next Engine */ + uint32_t fmbm_ofne; /**< O/H Frame Next Engine */ + uint32_t fmbm_ofca; /**< O/H Frame Command Attributes. */ + uint32_t fmbm_ofpne; /**< O/H Frame Parser Next Engine */ + uint32_t fmbm_opso; /**< O/H Parse Start Offset */ + uint32_t fmbm_opp; /**< O/H Policer Profile */ + uint32_t fmbm_occb; /**< O/H Coarse Classification base */ + uint32_t fmbm_oim; /**< O/H Internal margins*/ + uint32_t fmbm_ofp; /**< O/H Fifo Parameters*/ + uint32_t fmbm_ofed; /**< O/H Frame End Data*/ + uint32_t reserved0030[2]; /**< (0x038 - 0x03F) */ + uint32_t fmbm_oprai[FMAN_PORT_PRS_RESULT_WORDS_NUM]; + /**< O/H Parse Results Array Initialization */ + uint32_t fmbm_ofqid; /**< O/H Frame Queue ID */ + uint32_t fmbm_oefqid; /**< O/H Error Frame Queue ID */ + uint32_t fmbm_ofsdm; /**< O/H Frame Status Discard Mask */ + uint32_t fmbm_ofsem; /**< O/H Frame Status Error Mask */ + uint32_t fmbm_ofene; /**< O/H Frame Enqueue Next Engine */ + uint32_t fmbm_orlmts; /**< O/H Rate Limiter Scale */ + uint32_t fmbm_orlmt; /**< O/H Rate Limiter */ + uint32_t fmbm_ocmne; /**< O/H Continuous Mode Next Engine */ + uint32_t reserved0080[0x20]; /**< 0x080 - 0x0FF Reserved */ + uint32_t fmbm_oebmpi[2]; /**< Buf Mngr Observed Pool Info */ + uint32_t reserved0108[0x16]; /**< 0x108 - 0x15F Reserved */ + uint32_t fmbm_ocgm[FMAN_PORT_CG_MAP_NUM]; /**< Observed Congestion Group Map */ + uint32_t fmbm_ompd; /**< Observed BMan Pool Depletion */ + uint32_t reserved0184[0x1F]; /**< 0x184 - 0x1FF Reserved */ + uint32_t fmbm_ostc; /**< O/H Statistics Counters */ + uint32_t fmbm_ofrc; /**< O/H Frame Counter */ + uint32_t fmbm_ofdc; /**< O/H Frames Discard Counter */ + uint32_t fmbm_ofledc; /**< O/H Frames Len Err Discard Cntr */ + uint32_t fmbm_ofufdc; /**< O/H Frames Unsprtd Discard Cutr */ + uint32_t fmbm_offc; /**< O/H Filter Frames Counter */ + uint32_t fmbm_ofwdc; /**< Rx Frames WRED Discard Counter */ + uint32_t fmbm_ofldec; /**< O/H Frames List DMA Error Cntr */ + uint32_t fmbm_obdc; /**< O/H Buffers Deallocate Counter */ + uint32_t reserved0218[0x17]; /**< (0x218 - 0x27F) */ + uint32_t fmbm_opc; /**< O/H Performance Counters */ + uint32_t fmbm_opcp; /**< O/H Performance Count Parameters */ + uint32_t fmbm_occn; /**< O/H Cycle Counter */ + uint32_t fmbm_otuc; /**< O/H Tasks Utilization Counter */ + uint32_t fmbm_oduc; /**< O/H DMA Utilization Counter */ + uint32_t fmbm_ofuc; /**< O/H FIFO Utilization Counter */ +}; + +/** @Description BMI port register map */ +union fman_port_bmi_regs { + struct fman_port_rx_bmi_regs rx; + struct fman_port_tx_bmi_regs tx; + struct fman_port_oh_bmi_regs oh; +}; + +/** @Description QMI port register map */ +struct fman_port_qmi_regs { + uint32_t fmqm_pnc; /**< PortID n Configuration Register */ + uint32_t fmqm_pns; /**< PortID n Status Register */ + uint32_t fmqm_pnts; /**< PortID n Task Status Register */ + uint32_t reserved00c[4]; /**< 0xn00C - 0xn01B */ + uint32_t fmqm_pnen; /**< PortID n Enqueue NIA Register */ + uint32_t fmqm_pnetfc; /**< PortID n Enq Total Frame Counter */ + uint32_t reserved024[2]; /**< 0xn024 - 0x02B */ + uint32_t fmqm_pndn; /**< PortID n Dequeue NIA Register */ + uint32_t fmqm_pndc; /**< PortID n Dequeue Config Register */ + uint32_t fmqm_pndtfc; /**< PortID n Dequeue tot Frame cntr */ + uint32_t fmqm_pndfdc; /**< PortID n Dequeue FQID Dflt Cntr */ + uint32_t fmqm_pndcc; /**< PortID n Dequeue Confirm Counter */ +}; + + +enum fman_port_dma_swap { + E_FMAN_PORT_DMA_NO_SWAP, /**< No swap, transfer data as is */ + E_FMAN_PORT_DMA_SWAP_LE, + /**< The transferred data should be swapped in PPC Little Endian mode */ + E_FMAN_PORT_DMA_SWAP_BE + /**< The transferred data should be swapped in Big Endian mode */ +}; + +/* Default port color */ +enum fman_port_color { + E_FMAN_PORT_COLOR_GREEN, /**< Default port color is green */ + E_FMAN_PORT_COLOR_YELLOW, /**< Default port color is yellow */ + E_FMAN_PORT_COLOR_RED, /**< Default port color is red */ + E_FMAN_PORT_COLOR_OVERRIDE /**< Ignore color */ +}; + +/* QMI dequeue from the SP channel - types */ +enum fman_port_deq_type { + E_FMAN_PORT_DEQ_BY_PRI, + /**< Priority precedence and Intra-Class scheduling */ + E_FMAN_PORT_DEQ_ACTIVE_FQ, + /**< Active FQ precedence and Intra-Class scheduling */ + E_FMAN_PORT_DEQ_ACTIVE_FQ_NO_ICS + /**< Active FQ precedence and override Intra-Class scheduling */ +}; + +/* QMI dequeue prefetch modes */ +enum fman_port_deq_prefetch { + E_FMAN_PORT_DEQ_NO_PREFETCH, /**< No prefetch mode */ + E_FMAN_PORT_DEQ_PART_PREFETCH, /**< Partial prefetch mode */ + E_FMAN_PORT_DEQ_FULL_PREFETCH /**< Full prefetch mode */ +}; + +/* Parameters for defining performance counters behavior */ +struct fman_port_perf_cnt_params { + uint8_t task_val; /**< Task compare value */ + uint8_t queue_val; + /**< Rx or Tx conf queue compare value (unused for O/H ports) */ + uint8_t dma_val; /**< Dma compare value */ + uint32_t fifo_val; /**< Fifo compare value (in bytes) */ +}; + +/** @Description FM Port configuration structure, used at init */ +struct fman_port_cfg { + struct fman_port_perf_cnt_params perf_cnt_params; + /* BMI parameters */ + enum fman_port_dma_swap dma_swap_data; + bool dma_ic_stash_on; + bool dma_header_stash_on; + bool dma_sg_stash_on; + bool dma_write_optimize; + uint16_t ic_ext_offset; + uint8_t ic_int_offset; + uint16_t ic_size; + enum fman_port_color color; + bool sync_req; + bool discard_override; + uint8_t checksum_bytes_ignore; + uint8_t rx_cut_end_bytes; + uint32_t rx_pri_elevation; + uint32_t rx_fifo_thr; + uint8_t rx_fd_bits; + uint8_t int_buf_start_margin; + uint16_t ext_buf_start_margin; + uint16_t ext_buf_end_margin; + uint32_t tx_fifo_min_level; + uint32_t tx_fifo_low_comf_level; + uint8_t tx_fifo_deq_pipeline_depth; + bool stats_counters_enable; + bool perf_counters_enable; + /* QMI parameters */ + bool deq_high_pri; + enum fman_port_deq_type deq_type; + enum fman_port_deq_prefetch deq_prefetch_opt; + uint16_t deq_byte_cnt; + bool queue_counters_enable; + bool no_scatter_gather; + int errata_A006675; + int errata_A006320; + int excessive_threshold_register; + int fmbm_rebm_has_sgd; + int fmbm_tfne_has_features; + int qmi_deq_options_support; +}; + +enum fman_port_type { + E_FMAN_PORT_TYPE_OP = 0, + /**< Offline parsing port, shares id-s with + * host command, so must have exclusive id-s */ + E_FMAN_PORT_TYPE_RX, /**< 1G Rx port */ + E_FMAN_PORT_TYPE_RX_10G, /**< 10G Rx port */ + E_FMAN_PORT_TYPE_TX, /**< 1G Tx port */ + E_FMAN_PORT_TYPE_TX_10G, /**< 10G Tx port */ + E_FMAN_PORT_TYPE_DUMMY, + E_FMAN_PORT_TYPE_HC = E_FMAN_PORT_TYPE_DUMMY + /**< Host command port, shares id-s with + * offline parsing ports, so must have exclusive id-s */ +}; + +struct fman_port_params { + uint32_t discard_mask; + uint32_t err_mask; + uint32_t dflt_fqid; + uint32_t err_fqid; + uint8_t deq_sp; + bool dont_release_buf; +}; + +/* Port context - used by most API functions */ +struct fman_port { + enum fman_port_type type; + uint8_t fm_rev_maj; + uint8_t fm_rev_min; + union fman_port_bmi_regs *bmi_regs; + struct fman_port_qmi_regs *qmi_regs; + bool im_en; + uint8_t ext_pools_num; +}; + +/** @Description External buffer pools configuration */ +struct fman_port_bpools { + uint8_t count; /**< Num of pools to set up */ + bool counters_enable; /**< Enable allocate counters */ + uint8_t grp_bp_depleted_num; + /**< Number of depleted pools - if reached the BMI indicates + * the MAC to send a pause frame */ + struct { + uint8_t bpid; /**< BM pool ID */ + uint16_t size; + /**< Pool's size - must be in ascending order */ + bool is_backup; + /**< If this is a backup pool */ + bool grp_bp_depleted; + /**< Consider this buffer in multiple pools depletion criteria*/ + bool single_bp_depleted; + /**< Consider this buffer in single pool depletion criteria */ + bool pfc_priorities_en; + } bpool[FMAN_PORT_MAX_EXT_POOLS_NUM]; +}; + +enum fman_port_rate_limiter_scale_down { + E_FMAN_PORT_RATE_DOWN_NONE, + E_FMAN_PORT_RATE_DOWN_BY_2, + E_FMAN_PORT_RATE_DOWN_BY_4, + E_FMAN_PORT_RATE_DOWN_BY_8 +}; + +/* Rate limiter configuration */ +struct fman_port_rate_limiter { + uint8_t count_1micro_bit; + bool high_burst_size_gran; + /**< Defines burst_size granularity for OP ports; when TRUE, + * burst_size below counts in frames, otherwise in 10^3 frames */ + uint16_t burst_size; + /**< Max burst size, in KBytes for Tx port, according to + * high_burst_size_gran definition for OP port */ + uint32_t rate; + /**< In Kbps for Tx port, in frames/sec for OP port */ + enum fman_port_rate_limiter_scale_down rate_factor; +}; + +/* BMI statistics counters */ +enum fman_port_stats_counters { + E_FMAN_PORT_STATS_CNT_FRAME, + /**< Number of processed frames; valid for all ports */ + E_FMAN_PORT_STATS_CNT_DISCARD, + /**< For Rx ports - frames discarded by QMAN, for Tx or O/H ports - + * frames discarded due to DMA error; valid for all ports */ + E_FMAN_PORT_STATS_CNT_DEALLOC_BUF, + /**< Number of buffer deallocate operations; valid for all ports */ + E_FMAN_PORT_STATS_CNT_RX_BAD_FRAME, + /**< Number of bad Rx frames, like CRC error, Rx FIFO overflow etc; + * valid for Rx ports only */ + E_FMAN_PORT_STATS_CNT_RX_LARGE_FRAME, + /**< Number of Rx oversized frames, that is frames exceeding max frame + * size configured for the corresponding ETH controller; + * valid for Rx ports only */ + E_FMAN_PORT_STATS_CNT_RX_OUT_OF_BUF, + /**< Frames discarded due to lack of external buffers; valid for + * Rx ports only */ + E_FMAN_PORT_STATS_CNT_LEN_ERR, + /**< Frames discarded due to frame length error; valid for Tx and + * O/H ports only */ + E_FMAN_PORT_STATS_CNT_UNSUPPORTED_FORMAT, + /**< Frames discarded due to unsupported FD format; valid for Tx + * and O/H ports only */ + E_FMAN_PORT_STATS_CNT_FILTERED_FRAME, + /**< Number of frames filtered out by PCD module; valid for + * Rx and OP ports only */ + E_FMAN_PORT_STATS_CNT_DMA_ERR, + /**< Frames rejected by QMAN that were not able to release their + * buffers due to DMA error; valid for Rx and O/H ports only */ + E_FMAN_PORT_STATS_CNT_WRED_DISCARD + /**< Frames going through O/H port that were not able to to enter the + * return queue due to WRED algorithm; valid for O/H ports only */ +}; + +/* BMI performance counters */ +enum fman_port_perf_counters { + E_FMAN_PORT_PERF_CNT_CYCLE, /**< Cycle counter */ + E_FMAN_PORT_PERF_CNT_TASK_UTIL, /**< Tasks utilization counter */ + E_FMAN_PORT_PERF_CNT_QUEUE_UTIL, + /**< For Rx ports - Rx queue utilization, for Tx ports - Tx conf queue + * utilization; not valid for O/H ports */ + E_FMAN_PORT_PERF_CNT_DMA_UTIL, /**< DMA utilization counter */ + E_FMAN_PORT_PERF_CNT_FIFO_UTIL, /**< FIFO utilization counter */ + E_FMAN_PORT_PERF_CNT_RX_PAUSE + /**< Number of cycles in which Rx pause activation control is on; + * valid for Rx ports only */ +}; + +/* QMI counters */ +enum fman_port_qmi_counters { + E_FMAN_PORT_ENQ_TOTAL, /**< EnQ tot frame cntr */ + E_FMAN_PORT_DEQ_TOTAL, /**< DeQ tot frame cntr; invalid for Rx ports */ + E_FMAN_PORT_DEQ_FROM_DFLT, + /**< Dequeue from default FQID counter not valid for Rx ports */ + E_FMAN_PORT_DEQ_CONFIRM /**< DeQ confirm cntr invalid for Rx ports */ +}; + + +/** @Collection FM Port API */ +void fman_port_defconfig(struct fman_port_cfg *cfg, enum fman_port_type type); +int fman_port_init(struct fman_port *port, + struct fman_port_cfg *cfg, + struct fman_port_params *params); +int fman_port_enable(struct fman_port *port); +int fman_port_disable(const struct fman_port *port); +int fman_port_set_bpools(const struct fman_port *port, + const struct fman_port_bpools *bp); +int fman_port_set_rate_limiter(struct fman_port *port, + struct fman_port_rate_limiter *rate_limiter); +int fman_port_delete_rate_limiter(struct fman_port *port); +int fman_port_set_err_mask(struct fman_port *port, uint32_t err_mask); +int fman_port_set_discard_mask(struct fman_port *port, uint32_t discard_mask); +int fman_port_modify_rx_fd_bits(struct fman_port *port, + uint8_t rx_fd_bits, + bool add); +int fman_port_set_perf_cnt_params(struct fman_port *port, + struct fman_port_perf_cnt_params *params); +int fman_port_set_stats_cnt_mode(struct fman_port *port, bool enable); +int fman_port_set_perf_cnt_mode(struct fman_port *port, bool enable); +int fman_port_set_queue_cnt_mode(struct fman_port *port, bool enable); +int fman_port_set_bpool_cnt_mode(struct fman_port *port, + uint8_t bpid, + bool enable); +uint32_t fman_port_get_stats_counter(struct fman_port *port, + enum fman_port_stats_counters counter); +void fman_port_set_stats_counter(struct fman_port *port, + enum fman_port_stats_counters counter, + uint32_t value); +uint32_t fman_port_get_perf_counter(struct fman_port *port, + enum fman_port_perf_counters counter); +void fman_port_set_perf_counter(struct fman_port *port, + enum fman_port_perf_counters counter, + uint32_t value); +uint32_t fman_port_get_qmi_counter(struct fman_port *port, + enum fman_port_qmi_counters counter); +void fman_port_set_qmi_counter(struct fman_port *port, + enum fman_port_qmi_counters counter, + uint32_t value); +uint32_t fman_port_get_bpool_counter(struct fman_port *port, uint8_t bpid); +void fman_port_set_bpool_counter(struct fman_port *port, + uint8_t bpid, + uint32_t value); +int fman_port_add_congestion_grps(struct fman_port *port, + uint32_t grps_map[FMAN_PORT_CG_MAP_NUM]); +int fman_port_remove_congestion_grps(struct fman_port *port, + uint32_t grps_map[FMAN_PORT_CG_MAP_NUM]); + + +#endif /* __FSL_FMAN_PORT_H */ diff --git a/sys/contrib/ncsw/inc/flib/fsl_fman_prs.h b/sys/contrib/ncsw/inc/flib/fsl_fman_prs.h new file mode 100644 index 000000000000..b18997dc0b8a --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/fsl_fman_prs.h @@ -0,0 +1,102 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __FSL_FMAN_PRS_H +#define __FSL_FMAN_PRS_H + +#include "common/general.h" + +#define FM_PCD_EX_PRS_DOUBLE_ECC 0x02000000 +#define FM_PCD_EX_PRS_SINGLE_ECC 0x01000000 + +#define FM_PCD_PRS_PPSC_ALL_PORTS 0xffff0000 +#define FM_PCD_PRS_RPIMAC_EN 0x00000001 +#define FM_PCD_PRS_PORT_IDLE_STS 0xffff0000 +#define FM_PCD_PRS_SINGLE_ECC 0x00004000 +#define FM_PCD_PRS_DOUBLE_ECC 0x00004000 +#define PRS_MAX_CYCLE_LIMIT 8191 + +#define DEFAULT_MAX_PRS_CYC_LIM 0 + +struct fman_prs_regs { + uint32_t fmpr_rpclim; + uint32_t fmpr_rpimac; + uint32_t pmeec; + uint32_t res00c[5]; + uint32_t fmpr_pevr; + uint32_t fmpr_pever; + uint32_t res028; + uint32_t fmpr_perr; + uint32_t fmpr_perer; + uint32_t res034; + uint32_t res038[10]; + uint32_t fmpr_ppsc; + uint32_t res064; + uint32_t fmpr_pds; + uint32_t fmpr_l2rrs; + uint32_t fmpr_l3rrs; + uint32_t fmpr_l4rrs; + uint32_t fmpr_srrs; + uint32_t fmpr_l2rres; + uint32_t fmpr_l3rres; + uint32_t fmpr_l4rres; + uint32_t fmpr_srres; + uint32_t fmpr_spcs; + uint32_t fmpr_spscs; + uint32_t fmpr_hxscs; + uint32_t fmpr_mrcs; + uint32_t fmpr_mwcs; + uint32_t fmpr_mrscs; + uint32_t fmpr_mwscs; + uint32_t fmpr_fcscs; +}; + +struct fman_prs_cfg { + uint32_t port_id_stat; + uint16_t max_prs_cyc_lim; + uint32_t prs_exceptions; +}; + +uint32_t fman_prs_get_err_event(struct fman_prs_regs *regs, uint32_t ev_mask); +uint32_t fman_prs_get_err_ev_mask(struct fman_prs_regs *regs); +void fman_prs_ack_err_event(struct fman_prs_regs *regs, uint32_t event); +uint32_t fman_prs_get_expt_event(struct fman_prs_regs *regs, uint32_t ev_mask); +uint32_t fman_prs_get_expt_ev_mask(struct fman_prs_regs *regs); +void fman_prs_ack_expt_event(struct fman_prs_regs *regs, uint32_t event); +void fman_prs_defconfig(struct fman_prs_cfg *cfg); +int fman_prs_init(struct fman_prs_regs *regs, struct fman_prs_cfg *cfg); +void fman_prs_enable(struct fman_prs_regs *regs); +void fman_prs_disable(struct fman_prs_regs *regs); +int fman_prs_is_enabled(struct fman_prs_regs *regs); +void fman_prs_set_stst_port_msk(struct fman_prs_regs *regs, uint32_t pid_msk); +void fman_prs_set_stst(struct fman_prs_regs *regs, bool enable); +#endif /* __FSL_FMAN_PRS_H */ diff --git a/sys/contrib/ncsw/inc/flib/fsl_fman_rtc.h b/sys/contrib/ncsw/inc/flib/fsl_fman_rtc.h new file mode 100755 index 000000000000..f6b69a1fbb05 --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/fsl_fman_rtc.h @@ -0,0 +1,449 @@ +/* + * Copyright 2013 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __FSL_FMAN_RTC_H +#define __FSL_FMAN_RTC_H + +#include "common/general.h" + +/* FM RTC Registers definitions */ +#define FMAN_RTC_TMR_CTRL_ALMP1 0x80000000 +#define FMAN_RTC_TMR_CTRL_ALMP2 0x40000000 +#define FMAN_RTC_TMR_CTRL_FS 0x10000000 +#define FMAN_RTC_TMR_CTRL_PP1L 0x08000000 +#define FMAN_RTC_TMR_CTRL_PP2L 0x04000000 +#define FMAN_RTC_TMR_CTRL_TCLK_PERIOD_MASK 0x03FF0000 +#define FMAN_RTC_TMR_CTRL_FRD 0x00004000 +#define FMAN_RTC_TMR_CTRL_SLV 0x00002000 +#define FMAN_RTC_TMR_CTRL_ETEP1 0x00000100 +#define FMAN_RTC_TMR_CTRL_COPH 0x00000080 +#define FMAN_RTC_TMR_CTRL_CIPH 0x00000040 +#define FMAN_RTC_TMR_CTRL_TMSR 0x00000020 +#define FMAN_RTC_TMR_CTRL_DBG 0x00000010 +#define FMAN_RTC_TMR_CTRL_BYP 0x00000008 +#define FMAN_RTC_TMR_CTRL_TE 0x00000004 +#define FMAN_RTC_TMR_CTRL_CKSEL_OSC_CLK 0x00000003 +#define FMAN_RTC_TMR_CTRL_CKSEL_MAC_CLK 0x00000001 +#define FMAN_RTC_TMR_CTRL_CKSEL_EXT_CLK 0x00000000 +#define FMAN_RTC_TMR_CTRL_TCLK_PERIOD_SHIFT 16 + +#define FMAN_RTC_TMR_TEVENT_ETS2 0x02000000 +#define FMAN_RTC_TMR_TEVENT_ETS1 0x01000000 +#define FMAN_RTC_TMR_TEVENT_ALM2 0x00020000 +#define FMAN_RTC_TMR_TEVENT_ALM1 0x00010000 +#define FMAN_RTC_TMR_TEVENT_PP1 0x00000080 +#define FMAN_RTC_TMR_TEVENT_PP2 0x00000040 +#define FMAN_RTC_TMR_TEVENT_PP3 0x00000020 +#define FMAN_RTC_TMR_TEVENT_ALL (FMAN_RTC_TMR_TEVENT_ETS2 |\ + FMAN_RTC_TMR_TEVENT_ETS1 |\ + FMAN_RTC_TMR_TEVENT_ALM2 |\ + FMAN_RTC_TMR_TEVENT_ALM1 |\ + FMAN_RTC_TMR_TEVENT_PP1 |\ + FMAN_RTC_TMR_TEVENT_PP2 |\ + FMAN_RTC_TMR_TEVENT_PP3) + +#define FMAN_RTC_TMR_PRSC_OCK_MASK 0x0000FFFF + +/**************************************************************************//** + @Description FM RTC Alarm Polarity Options. +*//***************************************************************************/ +enum fman_rtc_alarm_polarity { + E_FMAN_RTC_ALARM_POLARITY_ACTIVE_HIGH, /**< Active-high output polarity */ + E_FMAN_RTC_ALARM_POLARITY_ACTIVE_LOW /**< Active-low output polarity */ +}; + +/**************************************************************************//** + @Description FM RTC Trigger Polarity Options. +*//***************************************************************************/ +enum fman_rtc_trigger_polarity { + E_FMAN_RTC_TRIGGER_ON_RISING_EDGE, /**< Trigger on rising edge */ + E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE /**< Trigger on falling edge */ +}; + +/**************************************************************************//** + @Description IEEE1588 Timer Module FM RTC Optional Clock Sources. +*//***************************************************************************/ +enum fman_src_clock { + E_FMAN_RTC_SOURCE_CLOCK_EXTERNAL, /**< external high precision timer + reference clock */ + E_FMAN_RTC_SOURCE_CLOCK_SYSTEM, /**< MAC system clock */ + E_FMAN_RTC_SOURCE_CLOCK_OSCILATOR /**< RTC clock oscilator */ +}; + +/* RTC default values */ +#define DEFAULT_SRC_CLOCK E_FMAN_RTC_SOURCE_CLOCK_SYSTEM +#define DEFAULT_INVERT_INPUT_CLK_PHASE FALSE +#define DEFAULT_INVERT_OUTPUT_CLK_PHASE FALSE +#define DEFAULT_ALARM_POLARITY E_FMAN_RTC_ALARM_POLARITY_ACTIVE_HIGH +#define DEFAULT_TRIGGER_POLARITY E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE +#define DEFAULT_PULSE_REALIGN FALSE + +#define FMAN_RTC_MAX_NUM_OF_ALARMS 3 +#define FMAN_RTC_MAX_NUM_OF_PERIODIC_PULSES 4 +#define FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS 3 + +/**************************************************************************//** + @Description FM RTC timer alarm +*//***************************************************************************/ +struct t_tmr_alarm{ + uint32_t tmr_alarm_h; /**< */ + uint32_t tmr_alarm_l; /**< */ +}; + +/**************************************************************************//** + @Description FM RTC timer Ex trigger +*//***************************************************************************/ +struct t_tmr_ext_trigger{ + uint32_t tmr_etts_h; /**< */ + uint32_t tmr_etts_l; /**< */ +}; + +struct rtc_regs { + uint32_t tmr_id; /* 0x000 Module ID register */ + uint32_t tmr_id2; /* 0x004 Controller ID register */ + uint32_t reserved0008[30]; + uint32_t tmr_ctrl; /* 0x0080 timer control register */ + uint32_t tmr_tevent; /* 0x0084 timer event register */ + uint32_t tmr_temask; /* 0x0088 timer event mask register */ + uint32_t reserved008c[3]; + uint32_t tmr_cnt_h; /* 0x0098 timer counter high register */ + uint32_t tmr_cnt_l; /* 0x009c timer counter low register */ + uint32_t tmr_add; /* 0x00a0 timer drift compensation addend register */ + uint32_t tmr_acc; /* 0x00a4 timer accumulator register */ + uint32_t tmr_prsc; /* 0x00a8 timer prescale */ + uint32_t reserved00ac; + uint32_t tmr_off_h; /* 0x00b0 timer offset high */ + uint32_t tmr_off_l; /* 0x00b4 timer offset low */ + struct t_tmr_alarm tmr_alarm[FMAN_RTC_MAX_NUM_OF_ALARMS]; /* 0x00b8 timer + alarm */ + uint32_t tmr_fiper[FMAN_RTC_MAX_NUM_OF_PERIODIC_PULSES]; /* 0x00d0 timer + fixed period interval */ + struct t_tmr_ext_trigger tmr_etts[FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS]; + /* 0x00e0 time stamp general purpose external */ + uint32_t reserved00f0[4]; +}; + +struct rtc_cfg { + enum fman_src_clock src_clk; + uint32_t ext_src_clk_freq; + uint32_t rtc_freq_hz; + bool timer_slave_mode; + bool invert_input_clk_phase; + bool invert_output_clk_phase; + uint32_t events_mask; + bool bypass; /**< Indicates if frequency compensation + is bypassed */ + bool pulse_realign; + enum fman_rtc_alarm_polarity alarm_polarity[FMAN_RTC_MAX_NUM_OF_ALARMS]; + enum fman_rtc_trigger_polarity trigger_polarity + [FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS]; +}; + +/** + * fman_rtc_defconfig() - Get default RTC configuration + * @cfg: pointer to configuration structure. + * + * Call this function to obtain a default set of configuration values for + * initializing RTC. The user can overwrite any of the values before calling + * fman_rtc_init(), if specific configuration needs to be applied. + */ +void fman_rtc_defconfig(struct rtc_cfg *cfg); + +/** + * fman_rtc_get_events() - Get the events + * @regs: Pointer to RTC register block + * + * Returns: The events + */ +uint32_t fman_rtc_get_events(struct rtc_regs *regs); + +/** + * fman_rtc_get_interrupt_mask() - Get the events mask + * @regs: Pointer to RTC register block + * + * Returns: The events mask + */ +uint32_t fman_rtc_get_interrupt_mask(struct rtc_regs *regs); + + +/** + * fman_rtc_set_interrupt_mask() - Set the events mask + * @regs: Pointer to RTC register block + * @mask: The mask to set + */ +void fman_rtc_set_interrupt_mask(struct rtc_regs *regs, uint32_t mask); + +/** + * fman_rtc_get_event() - Check if specific events occurred + * @regs: Pointer to RTC register block + * @ev_mask: a mask of the events to check + * + * Returns: 0 if the events did not occur. Non zero if one of the events occurred + */ +uint32_t fman_rtc_get_event(struct rtc_regs *regs, uint32_t ev_mask); + +/** + * fman_rtc_check_and_clear_event() - Clear events which are on + * @regs: Pointer to RTC register block + * + * Returns: A mask of the events which were cleared + */ +uint32_t fman_rtc_check_and_clear_event(struct rtc_regs *regs); + +/** + * fman_rtc_ack_event() - Clear events + * @regs: Pointer to RTC register block + * @events: The events to disable + */ +void fman_rtc_ack_event(struct rtc_regs *regs, uint32_t events); + +/** + * fman_rtc_enable_interupt() - Enable events interrupts + * @regs: Pointer to RTC register block + * @mask: The events to disable + */ +void fman_rtc_enable_interupt(struct rtc_regs *regs, uint32_t mask); + +/** + * fman_rtc_disable_interupt() - Disable events interrupts + * @regs: Pointer to RTC register block + * @mask: The events to disable + */ +void fman_rtc_disable_interupt(struct rtc_regs *regs, uint32_t mask); + +/** + * fman_rtc_get_timer_ctrl() - Get the control register + * @regs: Pointer to RTC register block + * + * Returns: The control register value + */ +uint32_t fman_rtc_get_timer_ctrl(struct rtc_regs *regs); + +/** + * fman_rtc_set_timer_ctrl() - Set timer control register + * @regs: Pointer to RTC register block + * @val: The value to set + */ +void fman_rtc_set_timer_ctrl(struct rtc_regs *regs, uint32_t val); + +/** + * fman_rtc_get_frequency_compensation() - Get the frequency compensation + * @regs: Pointer to RTC register block + * + * Returns: The timer counter + */ +uint32_t fman_rtc_get_frequency_compensation(struct rtc_regs *regs); + +/** + * fman_rtc_set_frequency_compensation() - Set frequency compensation + * @regs: Pointer to RTC register block + * @val: The value to set + */ +void fman_rtc_set_frequency_compensation(struct rtc_regs *regs, uint32_t val); + +/** + * fman_rtc_get_trigger_stamp() - Get a trigger stamp + * @regs: Pointer to RTC register block + * @id: The id of the trigger stamp + * + * Returns: The time stamp + */ +uint64_t fman_rtc_get_trigger_stamp(struct rtc_regs *regs, int id); + +/** + * fman_rtc_set_timer_alarm_l() - Set timer alarm low register + * @regs: Pointer to RTC register block + * @index: The index of alarm to set + * @val: The value to set + */ +void fman_rtc_set_timer_alarm_l(struct rtc_regs *regs, int index, + uint32_t val); + +/** + * fman_rtc_set_timer_alarm() - Set timer alarm + * @regs: Pointer to RTC register block + * @index: The index of alarm to set + * @val: The value to set + */ +void fman_rtc_set_timer_alarm(struct rtc_regs *regs, int index, int64_t val); + +/** + * fman_rtc_set_timer_fiper() - Set timer fiper + * @regs: Pointer to RTC register block + * @index: The index of fiper to set + * @val: The value to set + */ +void fman_rtc_set_timer_fiper(struct rtc_regs *regs, int index, uint32_t val); + +/** + * fman_rtc_set_timer_offset() - Set timer offset + * @regs: Pointer to RTC register block + * @val: The value to set + */ +void fman_rtc_set_timer_offset(struct rtc_regs *regs, int64_t val); + +/** + * fman_rtc_get_timer() - Get the timer counter + * @regs: Pointer to RTC register block + * + * Returns: The timer counter + */ +static inline uint64_t fman_rtc_get_timer(struct rtc_regs *regs) +{ + uint64_t time; + /* TMR_CNT_L must be read first to get an accurate value */ + time = (uint64_t)ioread32be(®s->tmr_cnt_l); + time |= ((uint64_t)ioread32be(®s->tmr_cnt_h) << 32); + + return time; +} + +/** + * fman_rtc_set_timer() - Set timer counter + * @regs: Pointer to RTC register block + * @val: The value to set + */ +static inline void fman_rtc_set_timer(struct rtc_regs *regs, int64_t val) +{ + iowrite32be((uint32_t)val, ®s->tmr_cnt_l); + iowrite32be((uint32_t)(val >> 32), ®s->tmr_cnt_h); +} + +/** + * fman_rtc_timers_soft_reset() - Soft reset + * @regs: Pointer to RTC register block + * + * Resets all the timer registers and state machines for the 1588 IP and + * the attached client 1588 + */ +void fman_rtc_timers_soft_reset(struct rtc_regs *regs); + +/** + * fman_rtc_clear_external_trigger() - Clear an external trigger + * @regs: Pointer to RTC register block + * @id: The id of the trigger to clear + */ +void fman_rtc_clear_external_trigger(struct rtc_regs *regs, int id); + +/** + * fman_rtc_clear_periodic_pulse() - Clear periodic pulse + * @regs: Pointer to RTC register block + * @id: The id of the fiper to clear + */ +void fman_rtc_clear_periodic_pulse(struct rtc_regs *regs, int id); + +/** + * fman_rtc_enable() - Enable RTC hardware block + * @regs: Pointer to RTC register block + */ +void fman_rtc_enable(struct rtc_regs *regs, bool reset_clock); + +/** + * fman_rtc_is_enabled() - Is RTC hardware block enabled + * @regs: Pointer to RTC register block + * + * Return: TRUE if enabled + */ +bool fman_rtc_is_enabled(struct rtc_regs *regs); + +/** + * fman_rtc_disable() - Disable RTC hardware block + * @regs: Pointer to RTC register block + */ +void fman_rtc_disable(struct rtc_regs *regs); + +/** + * fman_rtc_init() - Init RTC hardware block + * @cfg: RTC configuration data + * @regs: Pointer to RTC register block + * @num_alarms: Number of alarms in RTC + * @num_fipers: Number of fipers in RTC + * @num_ext_triggers: Number of external triggers in RTC + * @freq_compensation: Frequency compensation + * @output_clock_divisor: Output clock divisor + * + * This function initializes RTC and applies basic configuration. + */ +void fman_rtc_init(struct rtc_cfg *cfg, struct rtc_regs *regs, int num_alarms, + int num_fipers, int num_ext_triggers, bool init_freq_comp, + uint32_t freq_compensation, uint32_t output_clock_divisor); + +/** + * fman_rtc_set_alarm() - Set an alarm + * @regs: Pointer to RTC register block + * @id: id of alarm + * @val: value to write + * @enable: should interrupt be enabled + */ +void fman_rtc_set_alarm(struct rtc_regs *regs, int id, uint32_t val, bool enable); + +/** + * fman_rtc_set_periodic_pulse() - Set an alarm + * @regs: Pointer to RTC register block + * @id: id of fiper + * @val: value to write + * @enable: should interrupt be enabled + */ +void fman_rtc_set_periodic_pulse(struct rtc_regs *regs, int id, uint32_t val, + bool enable); + +/** + * fman_rtc_set_ext_trigger() - Set an external trigger + * @regs: Pointer to RTC register block + * @id: id of trigger + * @enable: should interrupt be enabled + * @use_pulse_as_input: use the pulse as input + */ +void fman_rtc_set_ext_trigger(struct rtc_regs *regs, int id, bool enable, + bool use_pulse_as_input); + +struct fm_rtc_alarm_params { + uint8_t alarm_id; /**< 0 or 1 */ + uint64_t alarm_time; /**< In nanoseconds, the time when the + alarm should go off - must be a + multiple of the RTC period */ + void (*f_alarm_callback)(void* app, uint8_t id); /**< This routine will + be called when RTC reaches alarmTime */ + bool clear_on_expiration; /**< TRUE to turn off the alarm once + expired.*/ +}; + +struct fm_rtc_periodic_pulse_params { + uint8_t periodic_pulse_id; /**< 0 or 1 */ + uint64_t periodic_pulse_period; /**< In Nanoseconds. Must be a multiple + of the RTC period */ + void (*f_periodic_pulse_callback)(void* app, uint8_t id); /**< This + routine will be called every + periodicPulsePeriod. */ +}; + +#endif /* __FSL_FMAN_RTC_H */ diff --git a/sys/contrib/ncsw/inc/flib/fsl_fman_sp.h b/sys/contrib/ncsw/inc/flib/fsl_fman_sp.h new file mode 100755 index 000000000000..f8ef7d569e10 --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/fsl_fman_sp.h @@ -0,0 +1,138 @@ +/* + * Copyright 2013 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __FSL_FMAN_SP_H +#define __FSL_FMAN_SP_H + +#include "common/general.h" +#include "fsl_fman.h" + + +struct fm_pcd_storage_profile_regs{ + uint32_t fm_sp_ebmpi[8]; + /*offset 0 - 0xc*/ + /**< Buffer Manager pool Information */ + + uint32_t fm_sp_acnt; /*offset 0x20*/ + uint32_t fm_sp_ebm; /*offset 0x24*/ + uint32_t fm_sp_da; /*offset 0x28*/ + uint32_t fm_sp_icp; /*offset 0x2c*/ + uint32_t fm_sp_mpd; /*offset 0x30*/ + uint32_t res1[2]; /*offset 0x34 - 0x38*/ + uint32_t fm_sp_spliodn; /*offset 0x3c*/ +}; + +/**************************************************************************//** + @Description structure for defining internal context copying +*//***************************************************************************/ +struct fman_sp_int_context_data_copy{ + uint16_t ext_buf_offset; /**< Offset in External buffer to which + internal context is copied to (Rx) + or taken from (Tx, Op). */ + uint8_t int_context_offset; /**< Offset within internal context to copy + from (Rx) or to copy to (Tx, Op).*/ + uint16_t size; /**< Internal offset size to be copied */ +}; + +/**************************************************************************//** + @Description struct for defining external buffer margins +*//***************************************************************************/ +struct fman_sp_buf_margins{ + uint16_t start_margins; /**< Number of bytes to be left at the + beginning of the external buffer (must be + divisible by 16) */ + uint16_t end_margins; /**< number of bytes to be left at the end of + the external buffer(must be divisible by 16)*/ +}; + +struct fm_storage_profile_params { + struct fman_ext_pools fm_ext_pools; + struct fman_backup_bm_pools backup_pools; + struct fman_sp_int_context_data_copy *int_context; + struct fman_sp_buf_margins *buf_margins; + enum fman_dma_swap_option dma_swap_data; + enum fman_dma_cache_option int_context_cache_attr; + enum fman_dma_cache_option header_cache_attr; + enum fman_dma_cache_option scatter_gather_cache_attr; + bool dma_write_optimize; + uint16_t liodn_offset; + bool no_scather_gather; + struct fman_buf_pool_depletion buf_pool_depletion; +}; + +/**************************************************************************//** + @Description Registers bit fields +*//***************************************************************************/ +#define FMAN_SP_EXT_BUF_POOL_EN_COUNTER 0x40000000 +#define FMAN_SP_EXT_BUF_POOL_VALID 0x80000000 +#define FMAN_SP_EXT_BUF_POOL_BACKUP 0x20000000 +#define FMAN_SP_DMA_ATTR_WRITE_OPTIMIZE 0x00100000 +#define FMAN_SP_SG_DISABLE 0x80000000 + +/* shifts */ +#define FMAN_SP_EXT_BUF_POOL_ID_SHIFT 16 +#define FMAN_SP_POOL_DEP_NUM_OF_POOLS_SHIFT 16 +#define FMAN_SP_EXT_BUF_MARG_START_SHIFT 16 +#define FMAN_SP_EXT_BUF_MARG_END_SHIFT 0 +#define FMAN_SP_DMA_ATTR_SWP_SHIFT 30 +#define FMAN_SP_DMA_ATTR_IC_CACHE_SHIFT 28 +#define FMAN_SP_DMA_ATTR_HDR_CACHE_SHIFT 26 +#define FMAN_SP_DMA_ATTR_SG_CACHE_SHIFT 24 +#define FMAN_SP_IC_TO_EXT_SHIFT 16 +#define FMAN_SP_IC_FROM_INT_SHIFT 8 +#define FMAN_SP_IC_SIZE_SHIFT 0 + +/**************************************************************************//** + @Description defaults +*//***************************************************************************/ +#define DEFAULT_FMAN_SP_DMA_SWAP_DATA FMAN_DMA_NO_SWP +#define DEFAULT_FMAN_SP_DMA_INT_CONTEXT_CACHE_ATTR FMAN_DMA_NO_STASH +#define DEFAULT_FMAN_SP_DMA_HEADER_CACHE_ATTR FMAN_DMA_NO_STASH +#define DEFAULT_FMAN_SP_DMA_SCATTER_GATHER_CACHE_ATTR FMAN_DMA_NO_STASH +#define DEFAULT_FMAN_SP_DMA_WRITE_OPTIMIZE TRUE +#define DEFAULT_FMAN_SP_NO_SCATTER_GATHER FALSE + +void fman_vsp_defconfig(struct fm_storage_profile_params *cfg); + +void fman_vsp_init(struct fm_pcd_storage_profile_regs *regs, + uint16_t index, struct fm_storage_profile_params *fm_vsp_params, + int port_max_num_of_ext_pools, int bm_max_num_of_pools, + int max_num_of_pfc_priorities); + +uint32_t fman_vsp_get_statistics(struct fm_pcd_storage_profile_regs *regs, + uint16_t index); + +void fman_vsp_set_statistics(struct fm_pcd_storage_profile_regs *regs, + uint16_t index, uint32_t value); + + +#endif /* __FSL_FMAN_SP_H */ diff --git a/sys/contrib/ncsw/inc/flib/fsl_fman_tgec.h b/sys/contrib/ncsw/inc/flib/fsl_fman_tgec.h new file mode 100644 index 000000000000..a0373141ac68 --- /dev/null +++ b/sys/contrib/ncsw/inc/flib/fsl_fman_tgec.h @@ -0,0 +1,479 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __FSL_FMAN_TGEC_H +#define __FSL_FMAN_TGEC_H + +#include "common/general.h" +#include "fsl_enet.h" + + +/* Transmit Inter-Packet Gap Length Register (TX_IPG_LENGTH) */ +#define TGEC_TX_IPG_LENGTH_MASK 0x000003ff + +enum tgec_counters { + E_TGEC_COUNTER_R64, + E_TGEC_COUNTER_R127, + E_TGEC_COUNTER_R255, + E_TGEC_COUNTER_R511, + E_TGEC_COUNTER_R1023, + E_TGEC_COUNTER_R1518, + E_TGEC_COUNTER_R1519X, + E_TGEC_COUNTER_TRFRG, + E_TGEC_COUNTER_TRJBR, + E_TGEC_COUNTER_RDRP, + E_TGEC_COUNTER_RALN, + E_TGEC_COUNTER_TRUND, + E_TGEC_COUNTER_TROVR, + E_TGEC_COUNTER_RXPF, + E_TGEC_COUNTER_TXPF, + E_TGEC_COUNTER_ROCT, + E_TGEC_COUNTER_RMCA, + E_TGEC_COUNTER_RBCA, + E_TGEC_COUNTER_RPKT, + E_TGEC_COUNTER_RUCA, + E_TGEC_COUNTER_RERR, + E_TGEC_COUNTER_TOCT, + E_TGEC_COUNTER_TMCA, + E_TGEC_COUNTER_TBCA, + E_TGEC_COUNTER_TUCA, + E_TGEC_COUNTER_TERR +}; + +/* Command and Configuration Register (COMMAND_CONFIG) */ +#define CMD_CFG_EN_TIMESTAMP 0x00100000 +#define CMD_CFG_TX_ADDR_INS_SEL 0x00080000 +#define CMD_CFG_NO_LEN_CHK 0x00020000 +#define CMD_CFG_SEND_IDLE 0x00010000 +#define CMD_CFG_RX_ER_DISC 0x00004000 +#define CMD_CFG_CMD_FRM_EN 0x00002000 +#define CMD_CFG_STAT_CLR 0x00001000 +#define CMD_CFG_LOOPBACK_EN 0x00000400 +#define CMD_CFG_TX_ADDR_INS 0x00000200 +#define CMD_CFG_PAUSE_IGNORE 0x00000100 +#define CMD_CFG_PAUSE_FWD 0x00000080 +#define CMD_CFG_PROMIS_EN 0x00000010 +#define CMD_CFG_WAN_MODE 0x00000008 +#define CMD_CFG_RX_EN 0x00000002 +#define CMD_CFG_TX_EN 0x00000001 + +/* Interrupt Mask Register (IMASK) */ +#define TGEC_IMASK_MDIO_SCAN_EVENT 0x00010000 +#define TGEC_IMASK_MDIO_CMD_CMPL 0x00008000 +#define TGEC_IMASK_REM_FAULT 0x00004000 +#define TGEC_IMASK_LOC_FAULT 0x00002000 +#define TGEC_IMASK_TX_ECC_ER 0x00001000 +#define TGEC_IMASK_TX_FIFO_UNFL 0x00000800 +#define TGEC_IMASK_TX_FIFO_OVFL 0x00000400 +#define TGEC_IMASK_TX_ER 0x00000200 +#define TGEC_IMASK_RX_FIFO_OVFL 0x00000100 +#define TGEC_IMASK_RX_ECC_ER 0x00000080 +#define TGEC_IMASK_RX_JAB_FRM 0x00000040 +#define TGEC_IMASK_RX_OVRSZ_FRM 0x00000020 +#define TGEC_IMASK_RX_RUNT_FRM 0x00000010 +#define TGEC_IMASK_RX_FRAG_FRM 0x00000008 +#define TGEC_IMASK_RX_LEN_ER 0x00000004 +#define TGEC_IMASK_RX_CRC_ER 0x00000002 +#define TGEC_IMASK_RX_ALIGN_ER 0x00000001 + +#define TGEC_EVENTS_MASK \ + ((uint32_t)(TGEC_IMASK_MDIO_SCAN_EVENT | \ + TGEC_IMASK_MDIO_CMD_CMPL | \ + TGEC_IMASK_REM_FAULT | \ + TGEC_IMASK_LOC_FAULT | \ + TGEC_IMASK_TX_ECC_ER | \ + TGEC_IMASK_TX_FIFO_UNFL | \ + TGEC_IMASK_TX_FIFO_OVFL | \ + TGEC_IMASK_TX_ER | \ + TGEC_IMASK_RX_FIFO_OVFL | \ + TGEC_IMASK_RX_ECC_ER | \ + TGEC_IMASK_RX_JAB_FRM | \ + TGEC_IMASK_RX_OVRSZ_FRM | \ + TGEC_IMASK_RX_RUNT_FRM | \ + TGEC_IMASK_RX_FRAG_FRM | \ + TGEC_IMASK_RX_LEN_ER | \ + TGEC_IMASK_RX_CRC_ER | \ + TGEC_IMASK_RX_ALIGN_ER)) + +/* Hashtable Control Register (HASHTABLE_CTRL) */ +#define TGEC_HASH_MCAST_SHIFT 23 +#define TGEC_HASH_MCAST_EN 0x00000200 +#define TGEC_HASH_ADR_MSK 0x000001ff + +#define DEFAULT_WAN_MODE_ENABLE FALSE +#define DEFAULT_PROMISCUOUS_MODE_ENABLE FALSE +#define DEFAULT_PAUSE_FORWARD_ENABLE FALSE +#define DEFAULT_PAUSE_IGNORE FALSE +#define DEFAULT_TX_ADDR_INS_ENABLE FALSE +#define DEFAULT_LOOPBACK_ENABLE FALSE +#define DEFAULT_CMD_FRAME_ENABLE FALSE +#define DEFAULT_RX_ERROR_DISCARD FALSE +#define DEFAULT_SEND_IDLE_ENABLE FALSE +#define DEFAULT_NO_LENGTH_CHECK_ENABLE TRUE +#define DEFAULT_LGTH_CHECK_NOSTDR FALSE +#define DEFAULT_TIME_STAMP_ENABLE FALSE +#define DEFAULT_TX_IPG_LENGTH 12 +#define DEFAULT_MAX_FRAME_LENGTH 0x600 +#define DEFAULT_PAUSE_QUANT 0xf000 + +/* + * 10G memory map + */ +struct tgec_regs { + uint32_t tgec_id; /* 0x000 Controller ID */ + uint32_t reserved001[1]; /* 0x004 */ + uint32_t command_config; /* 0x008 Control and configuration */ + uint32_t mac_addr_0; /* 0x00c Lower 32 bits of the MAC adr */ + uint32_t mac_addr_1; /* 0x010 Upper 16 bits of the MAC adr */ + uint32_t maxfrm; /* 0x014 Maximum frame length */ + uint32_t pause_quant; /* 0x018 Pause quanta */ + uint32_t rx_fifo_sections; /* 0x01c */ + uint32_t tx_fifo_sections; /* 0x020 */ + uint32_t rx_fifo_almost_f_e; /* 0x024 */ + uint32_t tx_fifo_almost_f_e; /* 0x028 */ + uint32_t hashtable_ctrl; /* 0x02c Hash table control*/ + uint32_t mdio_cfg_status; /* 0x030 */ + uint32_t mdio_command; /* 0x034 */ + uint32_t mdio_data; /* 0x038 */ + uint32_t mdio_regaddr; /* 0x03c */ + uint32_t status; /* 0x040 */ + uint32_t tx_ipg_len; /* 0x044 Transmitter inter-packet-gap */ + uint32_t mac_addr_2; /* 0x048 Lower 32 bits of 2nd MAC adr */ + uint32_t mac_addr_3; /* 0x04c Upper 16 bits of 2nd MAC adr */ + uint32_t rx_fifo_ptr_rd; /* 0x050 */ + uint32_t rx_fifo_ptr_wr; /* 0x054 */ + uint32_t tx_fifo_ptr_rd; /* 0x058 */ + uint32_t tx_fifo_ptr_wr; /* 0x05c */ + uint32_t imask; /* 0x060 Interrupt mask */ + uint32_t ievent; /* 0x064 Interrupt event */ + uint32_t udp_port; /* 0x068 Defines a UDP Port number */ + uint32_t type_1588v2; /* 0x06c Type field for 1588v2 */ + uint32_t reserved070[4]; /* 0x070 */ + /*10Ge Statistics Counter */ + uint32_t tfrm_u; /* 80 aFramesTransmittedOK */ + uint32_t tfrm_l; /* 84 aFramesTransmittedOK */ + uint32_t rfrm_u; /* 88 aFramesReceivedOK */ + uint32_t rfrm_l; /* 8c aFramesReceivedOK */ + uint32_t rfcs_u; /* 90 aFrameCheckSequenceErrors */ + uint32_t rfcs_l; /* 94 aFrameCheckSequenceErrors */ + uint32_t raln_u; /* 98 aAlignmentErrors */ + uint32_t raln_l; /* 9c aAlignmentErrors */ + uint32_t txpf_u; /* A0 aPAUSEMACCtrlFramesTransmitted */ + uint32_t txpf_l; /* A4 aPAUSEMACCtrlFramesTransmitted */ + uint32_t rxpf_u; /* A8 aPAUSEMACCtrlFramesReceived */ + uint32_t rxpf_l; /* Ac aPAUSEMACCtrlFramesReceived */ + uint32_t rlong_u; /* B0 aFrameTooLongErrors */ + uint32_t rlong_l; /* B4 aFrameTooLongErrors */ + uint32_t rflr_u; /* B8 aInRangeLengthErrors */ + uint32_t rflr_l; /* Bc aInRangeLengthErrors */ + uint32_t tvlan_u; /* C0 VLANTransmittedOK */ + uint32_t tvlan_l; /* C4 VLANTransmittedOK */ + uint32_t rvlan_u; /* C8 VLANReceivedOK */ + uint32_t rvlan_l; /* Cc VLANReceivedOK */ + uint32_t toct_u; /* D0 ifOutOctets */ + uint32_t toct_l; /* D4 ifOutOctets */ + uint32_t roct_u; /* D8 ifInOctets */ + uint32_t roct_l; /* Dc ifInOctets */ + uint32_t ruca_u; /* E0 ifInUcastPkts */ + uint32_t ruca_l; /* E4 ifInUcastPkts */ + uint32_t rmca_u; /* E8 ifInMulticastPkts */ + uint32_t rmca_l; /* Ec ifInMulticastPkts */ + uint32_t rbca_u; /* F0 ifInBroadcastPkts */ + uint32_t rbca_l; /* F4 ifInBroadcastPkts */ + uint32_t terr_u; /* F8 ifOutErrors */ + uint32_t terr_l; /* Fc ifOutErrors */ + uint32_t reserved100[2]; /* 100-108*/ + uint32_t tuca_u; /* 108 ifOutUcastPkts */ + uint32_t tuca_l; /* 10c ifOutUcastPkts */ + uint32_t tmca_u; /* 110 ifOutMulticastPkts */ + uint32_t tmca_l; /* 114 ifOutMulticastPkts */ + uint32_t tbca_u; /* 118 ifOutBroadcastPkts */ + uint32_t tbca_l; /* 11c ifOutBroadcastPkts */ + uint32_t rdrp_u; /* 120 etherStatsDropEvents */ + uint32_t rdrp_l; /* 124 etherStatsDropEvents */ + uint32_t reoct_u; /* 128 etherStatsOctets */ + uint32_t reoct_l; /* 12c etherStatsOctets */ + uint32_t rpkt_u; /* 130 etherStatsPkts */ + uint32_t rpkt_l; /* 134 etherStatsPkts */ + uint32_t trund_u; /* 138 etherStatsUndersizePkts */ + uint32_t trund_l; /* 13c etherStatsUndersizePkts */ + uint32_t r64_u; /* 140 etherStatsPkts64Octets */ + uint32_t r64_l; /* 144 etherStatsPkts64Octets */ + uint32_t r127_u; /* 148 etherStatsPkts65to127Octets */ + uint32_t r127_l; /* 14c etherStatsPkts65to127Octets */ + uint32_t r255_u; /* 150 etherStatsPkts128to255Octets */ + uint32_t r255_l; /* 154 etherStatsPkts128to255Octets */ + uint32_t r511_u; /* 158 etherStatsPkts256to511Octets */ + uint32_t r511_l; /* 15c etherStatsPkts256to511Octets */ + uint32_t r1023_u; /* 160 etherStatsPkts512to1023Octets */ + uint32_t r1023_l; /* 164 etherStatsPkts512to1023Octets */ + uint32_t r1518_u; /* 168 etherStatsPkts1024to1518Octets */ + uint32_t r1518_l; /* 16c etherStatsPkts1024to1518Octets */ + uint32_t r1519x_u; /* 170 etherStatsPkts1519toX */ + uint32_t r1519x_l; /* 174 etherStatsPkts1519toX */ + uint32_t trovr_u; /* 178 etherStatsOversizePkts */ + uint32_t trovr_l; /* 17c etherStatsOversizePkts */ + uint32_t trjbr_u; /* 180 etherStatsJabbers */ + uint32_t trjbr_l; /* 184 etherStatsJabbers */ + uint32_t trfrg_u; /* 188 etherStatsFragments */ + uint32_t trfrg_l; /* 18C etherStatsFragments */ + uint32_t rerr_u; /* 190 ifInErrors */ + uint32_t rerr_l; /* 194 ifInErrors */ +}; + +/** + * struct tgec_cfg - TGEC configuration + * + * @rx_error_discard: Receive Erroneous Frame Discard Enable. When set to 1 + * any frame received with an error is discarded in the + * Core and not forwarded to the Client interface. + * When set to 0 (Reset value), erroneous Frames are + * forwarded to the Client interface with ff_rx_err + * asserted. + * @pause_ignore: Ignore Pause Frame Quanta. If set to 1 received pause + * frames are ignored by the MAC. When set to 0 + * (Reset value) the transmit process is stopped for the + * amount of time specified in the pause quanta received + * within a pause frame. + * @pause_forward_enable: + * Terminate / Forward Pause Frames. If set to 1 pause + * frames are forwarded to the user application. When set + * to 0 (Reset value) pause frames are terminated and + * discarded within the MAC. + * @no_length_check_enable: + * Payload Length Check Disable. When set to 0 + * (Reset value), the Core checks the frame's payload + * length with the Frame Length/Type field, when set to 1 + * the payload length check is disabled. + * @cmd_frame_enable: Enables reception of all command frames. When set to 1 + * all Command Frames are accepted, when set to 0 + * (Reset Value) only Pause Frames are accepted and all + * other Command Frames are rejected. + * @send_idle_enable: Force Idle Generation. When set to 1, the MAC + * permanently sends XGMII Idle sequences even when faults + * are received. + * @wan_mode_enable: WAN Mode Enable. Sets WAN mode (1) or LAN mode + * (0, default) of operation. + * @promiscuous_mode_enable: + * Enables MAC promiscuous operation. When set to 1, all + * frames are received without any MAC address filtering, + * when set to 0 (Reset value) Unicast Frames with a + * destination address not matching the Core MAC Address + * (MAC Address programmed in Registers MAC_ADDR_0 and + * MAC_ADDR_1 or the MAC address programmed in Registers + * MAC_ADDR_2 and MAC_ADDR_3) are rejected. + * @tx_addr_ins_enable: Set Source MAC Address on Transmit. If set to 1 the + * MAC overwrites the source MAC address received from the + * Client Interface with one of the MAC addresses. If set + * to 0 (Reset value), the source MAC address from the + * Client Interface is transmitted unmodified to the line. + * @loopback_enable: PHY Interface Loopback. When set to 1, the signal + * loop_ena is set to '1', when set to 0 (Reset value) + * the signal loop_ena is set to 0. + * @lgth_check_nostdr: The Core interprets the Length/Type field differently + * depending on the value of this Bit + * @time_stamp_enable: This bit selects between enabling and disabling the + * IEEE 1588 functionality. 1: IEEE 1588 is enabled + * 0: IEEE 1588 is disabled + * @max_frame_length: Maximum supported received frame length. + * The 10GEC MAC supports reception of any frame size up + * to 16,352 bytes (0x3FE0). Typical settings are + * 0x05EE (1,518 bytes) for standard frames. + * Default setting is 0x0600 (1,536 bytes). + * Received frames that exceed this stated maximum + * are truncated. + * @pause_quant: Pause quanta value used with transmitted pause frames. + * Each quanta represents a 512 bit-times. + * @tx_ipg_length: Transmit Inter-Packet-Gap (IPG) value. A 6-bit value: + * Depending on LAN or WAN mode of operation the value has + * the following meaning: - LAN Mode: Number of octets in + * steps of 4. Valid values are 8, 12, 16, ... 100. DIC is + * fully supported (see 10.6.1 page 49) for any setting. A + * default of 12 (reset value) must be set to conform to + * IEEE802.3ae. Warning: When set to 8, PCS layers may not + * be able to perform clock rate compensation. - WAN Mode: + * Stretch factor. Valid values are 4..15. The stretch + * factor is calculated as (value+1)*8. A default of 12 + * (reset value) must be set to conform to IEEE 802.3ae + * (i.e. 13*8=104). A larger value shrinks the IPG + * (increasing bandwidth). + * + * This structure contains basic TGEC configuration and must be passed to + * fman_tgec_init() function. A default set of configuration values can be + * obtained by calling fman_tgec_defconfig(). + */ +struct tgec_cfg { + bool rx_error_discard; + bool pause_ignore; + bool pause_forward_enable; + bool no_length_check_enable; + bool cmd_frame_enable; + bool send_idle_enable; + bool wan_mode_enable; + bool promiscuous_mode_enable; + bool tx_addr_ins_enable; + bool loopback_enable; + bool lgth_check_nostdr; + bool time_stamp_enable; + uint16_t max_frame_length; + uint16_t pause_quant; + uint32_t tx_ipg_length; + bool skip_fman11_workaround; +}; + + +void fman_tgec_defconfig(struct tgec_cfg *cfg); + +/** + * fman_tgec_init() - Init tgec hardware block + * @regs: Pointer to tgec register block + * @cfg: tgec configuration data + * @exceptions_mask: initial exceptions mask + * + * This function initializes the tgec controller and applies its + * basic configuration. + * + * Returns: 0 if successful, an error code otherwise. + */ + +int fman_tgec_init(struct tgec_regs *regs, struct tgec_cfg *cfg, + uint32_t exception_mask); + +void fman_tgec_enable(struct tgec_regs *regs, bool apply_rx, bool apply_tx); + +void fman_tgec_disable(struct tgec_regs *regs, bool apply_rx, bool apply_tx); + +uint32_t fman_tgec_get_revision(struct tgec_regs *regs); + +void fman_tgec_set_mac_address(struct tgec_regs *regs, uint8_t *macaddr); + +void fman_tgec_set_promiscuous(struct tgec_regs *regs, bool val); + +/** + * fman_tgec_reset_stat() - Completely resets all TGEC HW counters + * @regs: Pointer to TGEC register block + */ +void fman_tgec_reset_stat(struct tgec_regs *regs); + +/** + * fman_tgec_get_counter() - Reads TGEC HW counters + * @regs: Pointer to TGEC register block + * @reg_name: Counter name according to the appropriate enum + * + * Returns: Required counter value + */ +uint64_t fman_tgec_get_counter(struct tgec_regs *regs, + enum tgec_counters reg_name); + +/** + * fman_tgec_set_hash_table() - Sets the Hashtable Control Register + * @regs: Pointer to TGEC register block + * @value: Value to be written in Hashtable Control Register + */ +void fman_tgec_set_hash_table(struct tgec_regs *regs, uint32_t value); + +/** + * fman_tgec_set_tx_pause_frames() - Sets the Pause Quanta Register + * @regs: Pointer to TGEC register block + * @pause_time: Pause quanta value used with transmitted pause frames. + * Each quanta represents a 512 bit-times + */ +void fman_tgec_set_tx_pause_frames(struct tgec_regs *regs, uint16_t pause_time); + +/** + * fman_tgec_set_rx_ignore_pause_frames() - Changes the policy WRT pause frames + * @regs: Pointer to TGEC register block + * @en: Ignore/Respond to pause frame quanta + * + * Sets the value of PAUSE_IGNORE field in the COMMAND_CONFIG Register + * 0 - MAC stops transmit process for the duration specified + * in the Pause frame quanta of a received Pause frame. + * 1 - MAC ignores received Pause frames. + */ +void fman_tgec_set_rx_ignore_pause_frames(struct tgec_regs *regs, bool en); + +/** + * fman_tgec_enable_1588_time_stamp() - change timestamp functionality + * @regs: Pointer to TGEC register block + * @en: enable/disable timestamp functionality + * + * Sets the value of EN_TIMESTAMP field in the COMMAND_CONFIG Register + * IEEE 1588 timestamp functionality control: + * 0 disabled, 1 enabled + */ + +void fman_tgec_enable_1588_time_stamp(struct tgec_regs *regs, bool en); + +uint32_t fman_tgec_get_event(struct tgec_regs *regs, uint32_t ev_mask); + +void fman_tgec_ack_event(struct tgec_regs *regs, uint32_t ev_mask); + +uint32_t fman_tgec_get_interrupt_mask(struct tgec_regs *regs); + +/** + * fman_tgec_add_addr_in_paddr() - Sets additional exact match MAC address + * @regs: Pointer to TGEC register block + * @addr_ptr: Pointer to 6-byte array containing the MAC address + * + * Sets the additional station MAC address + */ +void fman_tgec_add_addr_in_paddr(struct tgec_regs *regs, uint8_t *addr_ptr); + +void fman_tgec_clear_addr_in_paddr(struct tgec_regs *regs); + +void fman_tgec_enable_interrupt(struct tgec_regs *regs, uint32_t ev_mask); + +void fman_tgec_disable_interrupt(struct tgec_regs *regs, uint32_t ev_mask); + +void fman_tgec_reset_filter_table(struct tgec_regs *regs); + +void fman_tgec_set_hash_table_entry(struct tgec_regs *regs, uint32_t crc); + + +/** + * fman_tgec_get_max_frame_len() - Returns the maximum frame length value + * @regs: Pointer to TGEC register block + */ +uint16_t fman_tgec_get_max_frame_len(struct tgec_regs *regs); + +/** + * fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007() - Initialize the + * main tgec configuration parameters + * @regs: Pointer to TGEC register block + * + * TODO + */ +void fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007(struct tgec_regs + *regs); + + +#endif /* __FSL_FMAN_TGEC_H */ diff --git a/sys/contrib/ncsw/inc/integrations/dpaa_integration_ext.h b/sys/contrib/ncsw/inc/integrations/dpaa_integration_ext.h new file mode 100644 index 000000000000..27bb5d402378 --- /dev/null +++ b/sys/contrib/ncsw/inc/integrations/dpaa_integration_ext.h @@ -0,0 +1,275 @@ +/****************************************************************************** + + © 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc. + All rights reserved. + + This is proprietary source code of Freescale Semiconductor Inc., + and its use is subject to the NetComm Device Drivers EULA. + The copyright notice above does not evidence any actual or intended + publication of such source code. + + ALTERNATIVELY, redistribution and use in source and binary forms, with + or without modification, are permitted provided that the following + conditions are met: + * Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + * Neither the name of Freescale Semiconductor nor the + names of its contributors may be used to endorse or promote products + derived from this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + **************************************************************************/ +/** + + @File dpaa_integration_ext.h + + @Description P5020 FM external definitions and structures. +*//***************************************************************************/ +#ifndef __DPAA_INTEGRATION_EXT_H +#define __DPAA_INTEGRATION_EXT_H + +#include "std_ext.h" + + +/**************************************************************************//** + @Description DPAA SW Portals Enumeration. +*//***************************************************************************/ +typedef enum +{ + e_DPAA_SWPORTAL0 = 0, + e_DPAA_SWPORTAL1, + e_DPAA_SWPORTAL2, + e_DPAA_SWPORTAL3, + e_DPAA_SWPORTAL4, + e_DPAA_SWPORTAL5, + e_DPAA_SWPORTAL6, + e_DPAA_SWPORTAL7, + e_DPAA_SWPORTAL8, + e_DPAA_SWPORTAL9, + e_DPAA_SWPORTAL_DUMMY_LAST +} e_DpaaSwPortal; + +/**************************************************************************//** + @Description DPAA Direct Connect Portals Enumeration. +*//***************************************************************************/ +typedef enum +{ + e_DPAA_DCPORTAL0 = 0, + e_DPAA_DCPORTAL1, + e_DPAA_DCPORTAL2, + e_DPAA_DCPORTAL3, + e_DPAA_DCPORTAL4, + e_DPAA_DCPORTAL_DUMMY_LAST +} e_DpaaDcPortal; + +#define DPAA_MAX_NUM_OF_SW_PORTALS e_DPAA_SWPORTAL_DUMMY_LAST +#define DPAA_MAX_NUM_OF_DC_PORTALS e_DPAA_DCPORTAL_DUMMY_LAST + +/***************************************************************************** + QMan INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define QM_MAX_NUM_OF_POOL_CHANNELS 15 /**< Total number of channels, dedicated and pool */ +#define QM_MAX_NUM_OF_WQ 8 /**< Number of work queues per channel */ +#define QM_MAX_NUM_OF_CGS 256 /**< Congestion groups number */ +#define QM_MAX_NUM_OF_FQIDS (16 * MEGABYTE) + /**< FQIDs range - 24 bits */ + +/**************************************************************************//** + @Description Work Queue Channel assignments in QMan. +*//***************************************************************************/ +typedef enum +{ + e_QM_FQ_CHANNEL_SWPORTAL0 = 0, /**< Dedicated channels serviced by software portals 0 to 9 */ + e_QM_FQ_CHANNEL_SWPORTAL1, + e_QM_FQ_CHANNEL_SWPORTAL2, + e_QM_FQ_CHANNEL_SWPORTAL3, + e_QM_FQ_CHANNEL_SWPORTAL4, + e_QM_FQ_CHANNEL_SWPORTAL5, + e_QM_FQ_CHANNEL_SWPORTAL6, + e_QM_FQ_CHANNEL_SWPORTAL7, + e_QM_FQ_CHANNEL_SWPORTAL8, + e_QM_FQ_CHANNEL_SWPORTAL9, + + e_QM_FQ_CHANNEL_POOL1 = 0x21, /**< Pool channels that can be serviced by any of the software portals */ + e_QM_FQ_CHANNEL_POOL2, + e_QM_FQ_CHANNEL_POOL3, + e_QM_FQ_CHANNEL_POOL4, + e_QM_FQ_CHANNEL_POOL5, + e_QM_FQ_CHANNEL_POOL6, + e_QM_FQ_CHANNEL_POOL7, + e_QM_FQ_CHANNEL_POOL8, + e_QM_FQ_CHANNEL_POOL9, + e_QM_FQ_CHANNEL_POOL10, + e_QM_FQ_CHANNEL_POOL11, + e_QM_FQ_CHANNEL_POOL12, + e_QM_FQ_CHANNEL_POOL13, + e_QM_FQ_CHANNEL_POOL14, + e_QM_FQ_CHANNEL_POOL15, + + e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x40, /**< Dedicated channels serviced by Direct Connect Portal 0: + connected to FMan 0; assigned in incrementing order to + each sub-portal (SP) in the portal */ + e_QM_FQ_CHANNEL_FMAN0_SP1, + e_QM_FQ_CHANNEL_FMAN0_SP2, + e_QM_FQ_CHANNEL_FMAN0_SP3, + e_QM_FQ_CHANNEL_FMAN0_SP4, + e_QM_FQ_CHANNEL_FMAN0_SP5, + e_QM_FQ_CHANNEL_FMAN0_SP6, + e_QM_FQ_CHANNEL_FMAN0_SP7, + e_QM_FQ_CHANNEL_FMAN0_SP8, + e_QM_FQ_CHANNEL_FMAN0_SP9, + e_QM_FQ_CHANNEL_FMAN0_SP10, + e_QM_FQ_CHANNEL_FMAN0_SP11, + + e_QM_FQ_CHANNEL_RMAN_SP2 = 0x62, /**< Dedicated channels serviced by Direct Connect Portal 1: connected to RMan */ + e_QM_FQ_CHANNEL_RMAN_SP3, + + e_QM_FQ_CHANNEL_CAAM = 0x80, /**< Dedicated channel serviced by Direct Connect Portal 2: + connected to SEC 4.x */ + + e_QM_FQ_CHANNEL_PME = 0xA0, /**< Dedicated channel serviced by Direct Connect Portal 3: + connected to PME */ + e_QM_FQ_CHANNEL_RAID = 0xC0 /**< Dedicated channel serviced by Direct Connect Portal 4: + connected to RAID */ +} e_QmFQChannel; + +/***************************************************************************** + BMan INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define BM_MAX_NUM_OF_POOLS 64 /**< Number of buffers pools */ + +/***************************************************************************** + FM INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define INTG_MAX_NUM_OF_FM 1 + +/* Ports defines */ +#define FM_MAX_NUM_OF_1G_MACS 5 +#define FM_MAX_NUM_OF_10G_MACS 1 +#define FM_MAX_NUM_OF_MACS (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS) +#define FM_MAX_NUM_OF_OH_PORTS 7 + +#define FM_MAX_NUM_OF_1G_RX_PORTS FM_MAX_NUM_OF_1G_MACS +#define FM_MAX_NUM_OF_10G_RX_PORTS FM_MAX_NUM_OF_10G_MACS +#define FM_MAX_NUM_OF_RX_PORTS (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS) + +#define FM_MAX_NUM_OF_1G_TX_PORTS FM_MAX_NUM_OF_1G_MACS +#define FM_MAX_NUM_OF_10G_TX_PORTS FM_MAX_NUM_OF_10G_MACS +#define FM_MAX_NUM_OF_TX_PORTS (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS) + +#define FM_PORT_MAX_NUM_OF_EXT_POOLS 8 /**< Number of external BM pools per Rx port */ +#define FM_PORT_NUM_OF_CONGESTION_GRPS 256 /**< Total number of congestion groups in QM */ +#define FM_MAX_NUM_OF_SUB_PORTALS 12 +#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS 0 + +/* RAMs defines */ +#define FM_MURAM_SIZE (160 * KILOBYTE) +#define FM_IRAM_SIZE(a,b) ( 64 * KILOBYTE) + +/* PCD defines */ +#define FM_PCD_PLCR_NUM_ENTRIES 256 /**< Total number of policer profiles */ +#define FM_PCD_KG_NUM_OF_SCHEMES 32 /**< Total number of KG schemes */ +#define FM_PCD_MAX_NUM_OF_CLS_PLANS 256 /**< Number of classification plan entries. */ + +/* RTC defines */ +#define FM_RTC_NUM_OF_ALARMS 2 /**< RTC number of alarms */ +#define FM_RTC_NUM_OF_PERIODIC_PULSES 2 /**< RTC number of periodic pulses */ +#define FM_RTC_NUM_OF_EXT_TRIGGERS 2 /**< RTC number of external triggers */ + +/* QMI defines */ +#define QMI_MAX_NUM_OF_TNUMS 64 +#define MAX_QMI_DEQ_SUBPORTAL 12 +#define QMI_DEF_TNUMS_THRESH 48 + +/* FPM defines */ +#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS 4 + +/* DMA defines */ +#define DMA_THRESH_MAX_COMMQ 31 +#define DMA_THRESH_MAX_BUF 127 + +/* BMI defines */ +#define BMI_MAX_NUM_OF_TASKS 128 +#define BMI_MAX_NUM_OF_DMAS 32 +#define BMI_MAX_FIFO_SIZE (FM_MURAM_SIZE) +#define PORT_MAX_WEIGHT 16 + + +#define FM_CHECK_PORT_RESTRICTIONS(__validPorts, __newPortIndx) TRUE + +/* P5020 unique features */ +#define FM_QMI_DEQ_OPTIONS_SUPPORT +#define FM_NO_DISPATCH_RAM_ECC +#define FM_FIFO_ALLOCATION_OLD_ALG +#define FM_NO_WATCHDOG +#define FM_NO_TNUM_AGING +#define FM_NO_TGEC_LOOPBACK +#define FM_KG_NO_BYPASS_FQID_GEN +#define FM_KG_NO_BYPASS_PLCR_PROFILE_GEN +#define FM_NO_BACKUP_POOLS +#define FM_NO_OP_OBSERVED_POOLS +#define FM_NO_ADVANCED_RATE_LIMITER +#define FM_NO_OP_OBSERVED_CGS + +/* FM erratas (P5020, P3041) */ +#define FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 +#define FM_TX_SHORT_FRAME_BAD_TS_ERRATA_10GMAC_A006 /* No implementation, Out of LLD scope */ +#define FM_TX_FIFO_CORRUPTION_ERRATA_10GMAC_A007 +#define FM_ECC_HALT_NO_SYNC_ERRATA_10GMAC_A008 + +#define FM_NO_RX_PREAM_ERRATA_DTSECx1 +#define FM_GRS_ERRATA_DTSEC_A002 +#define FM_BAD_TX_TS_IN_B_2_B_ERRATA_DTSEC_A003 +#define FM_GTS_ERRATA_DTSEC_A004 +#define FM_PAUSE_BLOCK_ERRATA_DTSEC_A006 /* do nothing */ +#define FM_RESERVED_ACCESS_TO_DISABLED_DEV_ERRATA_DTSEC_A0011 /* do nothing */ +#define FM_GTS_AFTER_MAC_ABORTED_FRAME_ERRATA_DTSEC_A0012 FM_GTS_ERRATA_DTSEC_A004 +#define FM_10_100_SGMII_NO_TS_ERRATA_DTSEC3 +#define FM_TX_LOCKUP_ERRATA_DTSEC6 + +#define FM_IM_TX_SYNC_SKIP_TNUM_ERRATA_FMAN_A001 /* Implemented by ucode */ +#define FM_HC_DEF_FQID_ONLY_ERRATA_FMAN_A003 /* Implemented by ucode */ +#define FM_IM_TX_SHARED_TNUM_ERRATA_FMAN4 /* Implemented by ucode */ +#define FM_IM_GS_DEADLOCK_ERRATA_FMAN5 /* Implemented by ucode */ +#define FM_IM_DEQ_PIPELINE_DEPTH_ERRATA_FMAN10 /* Implemented by ucode */ +#define FM_CC_GEN6_MISSMATCH_ERRATA_FMAN12 /* Implemented by ucode */ +#define FM_CC_CHANGE_SHARED_TNUM_ERRATA_FMAN13 /* Implemented by ucode */ +#define FM_IM_LARGE_MRBLR_ERRATA_FMAN15 /* Implemented by ucode */ +#define FM_BMI_TO_RISC_ENQ_ERRATA_FMANc /* No implementation, Out of LLD scope */ +#define FM_INVALID_SWPRS_DATA_ERRATA_FMANd +//#define FM_PRS_MPLS_SSA_ERRATA_FMANj /* No implementation, No patch yet */ +//#define FM_PRS_INITIAL_PLANID_ERRATA_FMANk /* No implementation, No patch yet */ + +#define FM_NO_COPY_CTXA_CTXB_ERRATA_FMAN_SW001 + +#define FM_10G_REM_N_LCL_FLT_EX_ERRATA_10GMAC001 + +/* P2041 */ +#define FM_BAD_VLAN_DETECT_ERRATA_10GMAC_A010 + +/* Common to all */ +#define FM_RX_PREAM_4_ERRATA_DTSEC_A001 FM_NO_RX_PREAM_ERRATA_DTSECx1 +#define FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173 +#define FM_MAGIC_PACKET_UNRECOGNIZED_ERRATA_DTSEC2 /* No implementation, Out of LLD scope */ +#define FM_PRS_MEM_ERRATA_FMAN_SW003 +#define FM_LEN_CHECK_ERRATA_FMAN_SW002 + +#define DPAA_VERSION 10 +#define FM_PCD_SW_PRS_SIZE 0x00000800 +#define FM_PCD_PRS_SW_PATCHES_SIZE 0x00000200 +#define FM_NUM_OF_CTRL 2 + +#endif /* __DPAA_INTEGRATION_EXT_H */ diff --git a/sys/contrib/ncsw/inc/integrations/part_ext.h b/sys/contrib/ncsw/inc/integrations/part_ext.h new file mode 100644 index 000000000000..0fa702993892 --- /dev/null +++ b/sys/contrib/ncsw/inc/integrations/part_ext.h @@ -0,0 +1,59 @@ +/* Copyright (c) 2008-2011 Freescale Semiconductor, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/**************************************************************************//** + + @File part_ext.h + + @Description Definitions for the part (integration) module. +*//***************************************************************************/ + +#ifndef __PART_EXT_H +#define __PART_EXT_H + +#include "std_ext.h" +#include "enet_ext.h" +#include "dpaa_integration_ext.h" + +#define CORE_E500MC +#define INTG_MAX_NUM_OF_CORES 24 + +/**************************************************************************//* + @Description Part data structure - must be contained in any integration + data structure. +*//***************************************************************************/ +typedef struct t_Part +{ +} t_Part; + + +#endif /* __PART_EXT_H */ diff --git a/sys/contrib/ncsw/inc/ncsw_ext.h b/sys/contrib/ncsw/inc/ncsw_ext.h new file mode 100644 index 000000000000..ec7aca01fda4 --- /dev/null +++ b/sys/contrib/ncsw/inc/ncsw_ext.h @@ -0,0 +1,433 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File ncsw_ext.h + + @Description General NetCommSw Standard Definitions +*//***************************************************************************/ + +#ifndef __NCSW_EXT_H +#define __NCSW_EXT_H + + +#include "memcpy_ext.h" + +#define WRITE_BLOCK IOMemSet32 /* include memcpy_ext.h */ +#define COPY_BLOCK Mem2IOCpy32 /* include memcpy_ext.h */ + +#define PTR_TO_UINT(_ptr) ((uintptr_t)(_ptr)) +#define UINT_TO_PTR(_val) ((void*)(uintptr_t)(_val)) + +#define PTR_MOVE(_ptr, _offset) (void*)((uint8_t*)(_ptr) + (_offset)) + + +#define WRITE_UINT8_UINT24(arg, data08, data24) \ + WRITE_UINT32(arg,((uint32_t)(data08)<<24)|((uint32_t)(data24)&0x00FFFFFF)) +#define WRITE_UINT24_UINT8(arg, data24, data08) \ + WRITE_UINT32(arg,((uint32_t)(data24)<< 8)|((uint32_t)(data08)&0x000000FF)) + +/* Little-Endian access macros */ + +#define WRITE_UINT16_LE(arg, data) \ + WRITE_UINT16((arg), SwapUint16(data)) + +#define WRITE_UINT32_LE(arg, data) \ + WRITE_UINT32((arg), SwapUint32(data)) + +#define WRITE_UINT64_LE(arg, data) \ + WRITE_UINT64((arg), SwapUint64(data)) + +#define GET_UINT16_LE(arg) \ + SwapUint16(GET_UINT16(arg)) + +#define GET_UINT32_LE(arg) \ + SwapUint32(GET_UINT32(arg)) + +#define GET_UINT64_LE(arg) \ + SwapUint64(GET_UINT64(arg)) + +/* Write and Read again macros */ +#define WRITE_UINT_SYNC(size, arg, data) \ + do { \ + WRITE_UINT##size((arg), (data)); \ + CORE_MemoryBarrier(); \ + } while (0) + +#define WRITE_UINT8_SYNC(arg, data) WRITE_UINT_SYNC(8, (arg), (data)) + +#define WRITE_UINT16_SYNC(arg, data) WRITE_UINT_SYNC(16, (arg), (data)) +#define WRITE_UINT32_SYNC(arg, data) WRITE_UINT_SYNC(32, (arg), (data)) + +#define MAKE_UINT64(high32, low32) (((uint64_t)high32 << 32) | (low32)) + + +/*----------------------*/ +/* Miscellaneous macros */ +/*----------------------*/ + +#define UNUSED(_x) ((void)(_x)) + +#define KILOBYTE 0x400UL /* 1024 */ +#define MEGABYTE (KILOBYTE * KILOBYTE) /* 1024*1024 */ +#define GIGABYTE ((uint64_t)(KILOBYTE * MEGABYTE)) /* 1024*1024*1024 */ +#define TERABYTE ((uint64_t)(KILOBYTE * GIGABYTE)) /* 1024*1024*1024*1024 */ + +#ifndef NO_IRQ +#define NO_IRQ (0) +#endif +#define NCSW_MASTER_ID (0) + +/* Macro for checking if a number is a power of 2 */ +#define POWER_OF_2(n) (!((n) & ((n)-1))) + +/* Macro for calculating log of base 2 */ +#define LOG2(num, log2Num) \ + do \ + { \ + uint64_t tmp = (num); \ + log2Num = 0; \ + while (tmp > 1) \ + { \ + log2Num++; \ + tmp >>= 1; \ + } \ + } while (0) + +#define NEXT_POWER_OF_2(_num, _nextPow) \ +do \ +{ \ + if (POWER_OF_2(_num)) \ + _nextPow = (_num); \ + else \ + { \ + uint64_t tmp = (_num); \ + _nextPow = 1; \ + while (tmp) \ + { \ + _nextPow <<= 1; \ + tmp >>= 1; \ + } \ + } \ +} while (0) + +/* Ceiling division - not the fastest way, but safer in terms of overflow */ +#define DIV_CEIL(x,y) (((x)/(y)) + (((((x)/(y))*(y)) == (x)) ? 0 : 1)) + +/* Round up a number to be a multiple of a second number */ +#define ROUND_UP(x,y) ((((x) + (y) - 1) / (y)) * (y)) + +/* Timing macro for converting usec units to number of ticks. */ +/* (number of usec * clock_Hz) / 1,000,000) - since */ +/* clk is in MHz units, no division needed. */ +#define USEC_TO_CLK(usec,clk) ((usec) * (clk)) +#define CYCLES_TO_USEC(cycles,clk) ((cycles) / (clk)) + +/* Timing macros for converting between nsec units and number of clocks. */ +#define NSEC_TO_CLK(nsec,clk) DIV_CEIL(((nsec) * (clk)), 1000) +#define CYCLES_TO_NSEC(cycles,clk) (((cycles) * 1000) / (clk)) + +/* Timing macros for converting between psec units and number of clocks. */ +#define PSEC_TO_CLK(psec,clk) DIV_CEIL(((psec) * (clk)), 1000000) +#define CYCLES_TO_PSEC(cycles,clk) (((cycles) * 1000000) / (clk)) + +/* Min, Max macros */ +#define IN_RANGE(min,val,max) ((min)<=(val) && (val)<=(max)) + +#define ABS(a) ((a<0)?(a*-1):a) + +#if !(defined(ARRAY_SIZE)) +#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) +#endif /* !defined(ARRAY_SIZE) */ + + +/* possible alignments */ +#define HALF_WORD_ALIGNMENT 2 +#define WORD_ALIGNMENT 4 +#define DOUBLE_WORD_ALIGNMENT 8 +#define BURST_ALIGNMENT 32 + +#define HALF_WORD_ALIGNED 0x00000001 +#define WORD_ALIGNED 0x00000003 +#define DOUBLE_WORD_ALIGNED 0x00000007 +#define BURST_ALIGNED 0x0000001f +#ifndef IS_ALIGNED +#define IS_ALIGNED(n,align) (!((uint32_t)(n) & (align - 1))) +#endif /* IS_ALIGNED */ + + +#define LAST_BUF 1 +#define FIRST_BUF 2 +#define SINGLE_BUF (LAST_BUF | FIRST_BUF) +#define MIDDLE_BUF 4 + +#define ARRAY_END -1 + +#define ILLEGAL_BASE (~0) + +#define BUF_POSITION(first, last) state[(!!(last))<<1 | !!(first)] +#define DECLARE_POSITION static uint8_t state[4] = { (uint8_t)MIDDLE_BUF, (uint8_t)FIRST_BUF, (uint8_t)LAST_BUF, (uint8_t)SINGLE_BUF }; + + +/**************************************************************************//** + @Description Timers operation mode +*//***************************************************************************/ +typedef enum e_TimerMode +{ + e_TIMER_MODE_INVALID = 0, + e_TIMER_MODE_FREE_RUN, /**< Free run - counter continues to increase + after reaching the reference value. */ + e_TIMER_MODE_PERIODIC, /**< Periodic - counter restarts counting from 0 + after reaching the reference value. */ + e_TIMER_MODE_SINGLE /**< Single (one-shot) - counter stops counting + after reaching the reference value. */ +} e_TimerMode; + + +/**************************************************************************//** + @Description Enumeration (bit flags) of communication modes (Transmit, + receive or both). +*//***************************************************************************/ +typedef enum e_CommMode +{ + e_COMM_MODE_NONE = 0, /**< No transmit/receive communication */ + e_COMM_MODE_RX = 1, /**< Only receive communication */ + e_COMM_MODE_TX = 2, /**< Only transmit communication */ + e_COMM_MODE_RX_AND_TX = 3 /**< Both transmit and receive communication */ +} e_CommMode; + +/**************************************************************************//** + @Description General Diagnostic Mode +*//***************************************************************************/ +typedef enum e_DiagMode +{ + e_DIAG_MODE_NONE = 0, /**< Normal operation; no diagnostic mode */ + e_DIAG_MODE_CTRL_LOOPBACK, /**< Loopback in the controller */ + e_DIAG_MODE_CHIP_LOOPBACK, /**< Loopback in the chip but not in the + controller; e.g. IO-pins, SerDes, etc. */ + e_DIAG_MODE_PHY_LOOPBACK, /**< Loopback in the external PHY */ + e_DIAG_MODE_EXT_LOOPBACK, /**< Loopback in the external line (beyond the PHY) */ + e_DIAG_MODE_CTRL_ECHO, /**< Echo incoming data by the controller */ + e_DIAG_MODE_PHY_ECHO /**< Echo incoming data by the PHY */ +} e_DiagMode; + +/**************************************************************************//** + @Description Possible RxStore callback responses. +*//***************************************************************************/ +typedef enum e_RxStoreResponse +{ + e_RX_STORE_RESPONSE_PAUSE /**< Pause invoking callback with received data; + in polling mode, start again invoking callback + only next time user invokes the receive routine; + in interrupt mode, start again invoking callback + only next time a receive event triggers an interrupt; + in all cases, received data that are pending are not + lost, rather, their processing is temporarily deferred; + in all cases, received data are processed in the order + in which they were received. */ + , e_RX_STORE_RESPONSE_CONTINUE /**< Continue invoking callback with received data. */ +} e_RxStoreResponse; + + +/**************************************************************************//** + @Description General Handle +*//***************************************************************************/ +typedef void * t_Handle; /**< handle, used as object's descriptor */ + +/**************************************************************************//** + @Description MUTEX type +*//***************************************************************************/ +typedef uint32_t t_Mutex; + +/**************************************************************************//** + @Description Error Code. + + The high word of the error code is the code of the software + module (driver). The low word is the error type (e_ErrorType). + To get the values from the error code, use GET_ERROR_TYPE() + and GET_ERROR_MODULE(). +*//***************************************************************************/ +typedef uint32_t t_Error; + +/**************************************************************************//** + @Description General prototype of interrupt service routine (ISR). + + @Param[in] handle - Optional handle of the module handling the interrupt. + + @Return None + *//***************************************************************************/ +typedef void (t_Isr)(t_Handle handle); + +/**************************************************************************//** + @Anchor mem_attr + + @Collection Memory Attributes + + Various attributes of memory partitions. These values may be + or'ed together to create a mask of all memory attributes. + @{ +*//***************************************************************************/ +#define MEMORY_ATTR_CACHEABLE 0x00000001 + /**< Memory is cacheable */ +#define MEMORY_ATTR_QE_2ND_BUS_ACCESS 0x00000002 + /**< Memory can be accessed by QUICC Engine + through its secondary bus interface */ + +/* @} */ + + +/**************************************************************************//** + @Function t_GetBufFunction + + @Description User callback function called by driver to get data buffer. + + User provides this function. Driver invokes it. + + @Param[in] h_BufferPool - A handle to buffer pool manager + @Param[out] p_BufContextHandle - Returns the user's private context that + should be associated with the buffer + + @Return Pointer to data buffer, NULL if error + *//***************************************************************************/ +typedef uint8_t * (t_GetBufFunction)(t_Handle h_BufferPool, + t_Handle *p_BufContextHandle); + +/**************************************************************************//** + @Function t_PutBufFunction + + @Description User callback function called by driver to return data buffer. + + User provides this function. Driver invokes it. + + @Param[in] h_BufferPool - A handle to buffer pool manager + @Param[in] p_Buffer - A pointer to buffer to return + @Param[in] h_BufContext - The user's private context associated with + the returned buffer + + @Return E_OK on success; Error code otherwise + *//***************************************************************************/ +typedef t_Error (t_PutBufFunction)(t_Handle h_BufferPool, + uint8_t *p_Buffer, + t_Handle h_BufContext); + +/**************************************************************************//** + @Function t_PhysToVirt + + @Description Translates a physical address to the matching virtual address. + + @Param[in] addr - The physical address to translate. + + @Return Virtual address. +*//***************************************************************************/ +typedef void * t_PhysToVirt(physAddress_t addr); + +/**************************************************************************//** + @Function t_VirtToPhys + + @Description Translates a virtual address to the matching physical address. + + @Param[in] addr - The virtual address to translate. + + @Return Physical address. +*//***************************************************************************/ +typedef physAddress_t t_VirtToPhys(void *addr); + +/**************************************************************************//** + @Description Buffer Pool Information Structure. +*//***************************************************************************/ +typedef struct t_BufferPoolInfo +{ + t_Handle h_BufferPool; /**< A handle to the buffer pool manager */ + t_GetBufFunction *f_GetBuf; /**< User callback to get a free buffer */ + t_PutBufFunction *f_PutBuf; /**< User callback to return a buffer */ + uint16_t bufferSize; /**< Buffer size (in bytes) */ + + t_PhysToVirt *f_PhysToVirt; /**< User callback to translate pool buffers + physical addresses to virtual addresses */ + t_VirtToPhys *f_VirtToPhys; /**< User callback to translate pool buffers + virtual addresses to physical addresses */ +} t_BufferPoolInfo; + + +/**************************************************************************//** + @Description User callback function called by driver when transmit completed. + + User provides this function. Driver invokes it. + + @Param[in] h_App - Application's handle, as was provided to the + driver by the user + @Param[in] queueId - Transmit queue ID + @Param[in] p_Data - Pointer to the data buffer + @Param[in] h_BufContext - The user's private context associated with + the given data buffer + @Param[in] status - Transmit status and errors + @Param[in] flags - Driver-dependent information + *//***************************************************************************/ +typedef void (t_TxConfFunction)(t_Handle h_App, + uint32_t queueId, + uint8_t *p_Data, + t_Handle h_BufContext, + uint16_t status, + uint32_t flags); + +/**************************************************************************//** + @Description User callback function called by driver with receive data. + + User provides this function. Driver invokes it. + + @Param[in] h_App - Application's handle, as was provided to the + driver by the user + @Param[in] queueId - Receive queue ID + @Param[in] p_Data - Pointer to the buffer with received data + @Param[in] h_BufContext - The user's private context associated with + the given data buffer + @Param[in] length - Length of received data + @Param[in] status - Receive status and errors + @Param[in] position - Position of buffer in frame + @Param[in] flags - Driver-dependent information + + @Retval e_RX_STORE_RESPONSE_CONTINUE - order the driver to continue Rx + operation for all ready data. + @Retval e_RX_STORE_RESPONSE_PAUSE - order the driver to stop Rx operation. + *//***************************************************************************/ +typedef e_RxStoreResponse (t_RxStoreFunction)(t_Handle h_App, + uint32_t queueId, + uint8_t *p_Data, + t_Handle h_BufContext, + uint32_t length, + uint16_t status, + uint8_t position, + uint32_t flags); + + +#endif /* __NCSW_EXT_H */ diff --git a/sys/contrib/ncsw/inc/net_ext.h b/sys/contrib/ncsw/inc/net_ext.h new file mode 100644 index 000000000000..8f3bc369247e --- /dev/null +++ b/sys/contrib/ncsw/inc/net_ext.h @@ -0,0 +1,430 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File net_ext.h + + @Description This file contains common and general netcomm headers definitions. +*//***************************************************************************/ +#ifndef __NET_EXT_H +#define __NET_EXT_H + +#include "std_ext.h" + + +typedef uint8_t headerFieldPpp_t; + +#define NET_HEADER_FIELD_PPP_PID (1) +#define NET_HEADER_FIELD_PPP_COMPRESSED (NET_HEADER_FIELD_PPP_PID << 1) +#define NET_HEADER_FIELD_PPP_ALL_FIELDS ((NET_HEADER_FIELD_PPP_PID << 2) - 1) + + +typedef uint8_t headerFieldPppoe_t; + +#define NET_HEADER_FIELD_PPPoE_VER (1) +#define NET_HEADER_FIELD_PPPoE_TYPE (NET_HEADER_FIELD_PPPoE_VER << 1) +#define NET_HEADER_FIELD_PPPoE_CODE (NET_HEADER_FIELD_PPPoE_VER << 2) +#define NET_HEADER_FIELD_PPPoE_SID (NET_HEADER_FIELD_PPPoE_VER << 3) +#define NET_HEADER_FIELD_PPPoE_LEN (NET_HEADER_FIELD_PPPoE_VER << 4) +#define NET_HEADER_FIELD_PPPoE_SESSION (NET_HEADER_FIELD_PPPoE_VER << 5) +#define NET_HEADER_FIELD_PPPoE_PID (NET_HEADER_FIELD_PPPoE_VER << 6) +#define NET_HEADER_FIELD_PPPoE_ALL_FIELDS ((NET_HEADER_FIELD_PPPoE_VER << 7) - 1) + +#define NET_HEADER_FIELD_PPPMUX_PID (1) +#define NET_HEADER_FIELD_PPPMUX_CKSUM (NET_HEADER_FIELD_PPPMUX_PID << 1) +#define NET_HEADER_FIELD_PPPMUX_COMPRESSED (NET_HEADER_FIELD_PPPMUX_PID << 2) +#define NET_HEADER_FIELD_PPPMUX_ALL_FIELDS ((NET_HEADER_FIELD_PPPMUX_PID << 3) - 1) + +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF (1) +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_LXT (NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 1) +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_LEN (NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 2) +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_PID (NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 3) +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_USE_PID (NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 4) +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_ALL_FIELDS ((NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 5) - 1) + + +typedef uint8_t headerFieldEth_t; + +#define NET_HEADER_FIELD_ETH_DA (1) +#define NET_HEADER_FIELD_ETH_SA (NET_HEADER_FIELD_ETH_DA << 1) +#define NET_HEADER_FIELD_ETH_LENGTH (NET_HEADER_FIELD_ETH_DA << 2) +#define NET_HEADER_FIELD_ETH_TYPE (NET_HEADER_FIELD_ETH_DA << 3) +#define NET_HEADER_FIELD_ETH_FINAL_CKSUM (NET_HEADER_FIELD_ETH_DA << 4) +#define NET_HEADER_FIELD_ETH_PADDING (NET_HEADER_FIELD_ETH_DA << 5) +#define NET_HEADER_FIELD_ETH_ALL_FIELDS ((NET_HEADER_FIELD_ETH_DA << 6) - 1) + +#define NET_HEADER_FIELD_ETH_ADDR_SIZE 6 + +typedef uint16_t headerFieldIp_t; + +#define NET_HEADER_FIELD_IP_VER (1) +#define NET_HEADER_FIELD_IP_DSCP (NET_HEADER_FIELD_IP_VER << 2) +#define NET_HEADER_FIELD_IP_ECN (NET_HEADER_FIELD_IP_VER << 3) +#define NET_HEADER_FIELD_IP_PROTO (NET_HEADER_FIELD_IP_VER << 4) + +#define NET_HEADER_FIELD_IP_PROTO_SIZE 1 + +typedef uint16_t headerFieldIpv4_t; + +#define NET_HEADER_FIELD_IPv4_VER (1) +#define NET_HEADER_FIELD_IPv4_HDR_LEN (NET_HEADER_FIELD_IPv4_VER << 1) +#define NET_HEADER_FIELD_IPv4_TOS (NET_HEADER_FIELD_IPv4_VER << 2) +#define NET_HEADER_FIELD_IPv4_TOTAL_LEN (NET_HEADER_FIELD_IPv4_VER << 3) +#define NET_HEADER_FIELD_IPv4_ID (NET_HEADER_FIELD_IPv4_VER << 4) +#define NET_HEADER_FIELD_IPv4_FLAG_D (NET_HEADER_FIELD_IPv4_VER << 5) +#define NET_HEADER_FIELD_IPv4_FLAG_M (NET_HEADER_FIELD_IPv4_VER << 6) +#define NET_HEADER_FIELD_IPv4_OFFSET (NET_HEADER_FIELD_IPv4_VER << 7) +#define NET_HEADER_FIELD_IPv4_TTL (NET_HEADER_FIELD_IPv4_VER << 8) +#define NET_HEADER_FIELD_IPv4_PROTO (NET_HEADER_FIELD_IPv4_VER << 9) +#define NET_HEADER_FIELD_IPv4_CKSUM (NET_HEADER_FIELD_IPv4_VER << 10) +#define NET_HEADER_FIELD_IPv4_SRC_IP (NET_HEADER_FIELD_IPv4_VER << 11) +#define NET_HEADER_FIELD_IPv4_DST_IP (NET_HEADER_FIELD_IPv4_VER << 12) +#define NET_HEADER_FIELD_IPv4_OPTS (NET_HEADER_FIELD_IPv4_VER << 13) +#define NET_HEADER_FIELD_IPv4_OPTS_COUNT (NET_HEADER_FIELD_IPv4_VER << 14) +#define NET_HEADER_FIELD_IPv4_ALL_FIELDS ((NET_HEADER_FIELD_IPv4_VER << 15) - 1) + +#define NET_HEADER_FIELD_IPv4_ADDR_SIZE 4 +#define NET_HEADER_FIELD_IPv4_PROTO_SIZE 1 + + +typedef uint8_t headerFieldIpv6_t; + +#define NET_HEADER_FIELD_IPv6_VER (1) +#define NET_HEADER_FIELD_IPv6_TC (NET_HEADER_FIELD_IPv6_VER << 1) +#define NET_HEADER_FIELD_IPv6_SRC_IP (NET_HEADER_FIELD_IPv6_VER << 2) +#define NET_HEADER_FIELD_IPv6_DST_IP (NET_HEADER_FIELD_IPv6_VER << 3) +#define NET_HEADER_FIELD_IPv6_NEXT_HDR (NET_HEADER_FIELD_IPv6_VER << 4) +#define NET_HEADER_FIELD_IPv6_FL (NET_HEADER_FIELD_IPv6_VER << 5) +#define NET_HEADER_FIELD_IPv6_HOP_LIMIT (NET_HEADER_FIELD_IPv6_VER << 6) +#define NET_HEADER_FIELD_IPv6_ALL_FIELDS ((NET_HEADER_FIELD_IPv6_VER << 7) - 1) + +#define NET_HEADER_FIELD_IPv6_ADDR_SIZE 16 +#define NET_HEADER_FIELD_IPv6_NEXT_HDR_SIZE 1 + +#define NET_HEADER_FIELD_ICMP_TYPE (1) +#define NET_HEADER_FIELD_ICMP_CODE (NET_HEADER_FIELD_ICMP_TYPE << 1) +#define NET_HEADER_FIELD_ICMP_CKSUM (NET_HEADER_FIELD_ICMP_TYPE << 2) +#define NET_HEADER_FIELD_ICMP_ID (NET_HEADER_FIELD_ICMP_TYPE << 3) +#define NET_HEADER_FIELD_ICMP_SQ_NUM (NET_HEADER_FIELD_ICMP_TYPE << 4) +#define NET_HEADER_FIELD_ICMP_ALL_FIELDS ((NET_HEADER_FIELD_ICMP_TYPE << 5) - 1) + +#define NET_HEADER_FIELD_ICMP_CODE_SIZE 1 +#define NET_HEADER_FIELD_ICMP_TYPE_SIZE 1 + +#define NET_HEADER_FIELD_IGMP_VERSION (1) +#define NET_HEADER_FIELD_IGMP_TYPE (NET_HEADER_FIELD_IGMP_VERSION << 1) +#define NET_HEADER_FIELD_IGMP_CKSUM (NET_HEADER_FIELD_IGMP_VERSION << 2) +#define NET_HEADER_FIELD_IGMP_DATA (NET_HEADER_FIELD_IGMP_VERSION << 3) +#define NET_HEADER_FIELD_IGMP_ALL_FIELDS ((NET_HEADER_FIELD_IGMP_VERSION << 4) - 1) + + +typedef uint16_t headerFieldTcp_t; + +#define NET_HEADER_FIELD_TCP_PORT_SRC (1) +#define NET_HEADER_FIELD_TCP_PORT_DST (NET_HEADER_FIELD_TCP_PORT_SRC << 1) +#define NET_HEADER_FIELD_TCP_SEQ (NET_HEADER_FIELD_TCP_PORT_SRC << 2) +#define NET_HEADER_FIELD_TCP_ACK (NET_HEADER_FIELD_TCP_PORT_SRC << 3) +#define NET_HEADER_FIELD_TCP_OFFSET (NET_HEADER_FIELD_TCP_PORT_SRC << 4) +#define NET_HEADER_FIELD_TCP_FLAGS (NET_HEADER_FIELD_TCP_PORT_SRC << 5) +#define NET_HEADER_FIELD_TCP_WINDOW (NET_HEADER_FIELD_TCP_PORT_SRC << 6) +#define NET_HEADER_FIELD_TCP_CKSUM (NET_HEADER_FIELD_TCP_PORT_SRC << 7) +#define NET_HEADER_FIELD_TCP_URGPTR (NET_HEADER_FIELD_TCP_PORT_SRC << 8) +#define NET_HEADER_FIELD_TCP_OPTS (NET_HEADER_FIELD_TCP_PORT_SRC << 9) +#define NET_HEADER_FIELD_TCP_OPTS_COUNT (NET_HEADER_FIELD_TCP_PORT_SRC << 10) +#define NET_HEADER_FIELD_TCP_ALL_FIELDS ((NET_HEADER_FIELD_TCP_PORT_SRC << 11) - 1) + +#define NET_HEADER_FIELD_TCP_PORT_SIZE 2 + + +typedef uint8_t headerFieldSctp_t; + +#define NET_HEADER_FIELD_SCTP_PORT_SRC (1) +#define NET_HEADER_FIELD_SCTP_PORT_DST (NET_HEADER_FIELD_SCTP_PORT_SRC << 1) +#define NET_HEADER_FIELD_SCTP_VER_TAG (NET_HEADER_FIELD_SCTP_PORT_SRC << 2) +#define NET_HEADER_FIELD_SCTP_CKSUM (NET_HEADER_FIELD_SCTP_PORT_SRC << 3) +#define NET_HEADER_FIELD_SCTP_ALL_FIELDS ((NET_HEADER_FIELD_SCTP_PORT_SRC << 4) - 1) + +#define NET_HEADER_FIELD_SCTP_PORT_SIZE 2 + +typedef uint8_t headerFieldDccp_t; + +#define NET_HEADER_FIELD_DCCP_PORT_SRC (1) +#define NET_HEADER_FIELD_DCCP_PORT_DST (NET_HEADER_FIELD_DCCP_PORT_SRC << 1) +#define NET_HEADER_FIELD_DCCP_ALL_FIELDS ((NET_HEADER_FIELD_DCCP_PORT_SRC << 2) - 1) + +#define NET_HEADER_FIELD_DCCP_PORT_SIZE 2 + + +typedef uint8_t headerFieldUdp_t; + +#define NET_HEADER_FIELD_UDP_PORT_SRC (1) +#define NET_HEADER_FIELD_UDP_PORT_DST (NET_HEADER_FIELD_UDP_PORT_SRC << 1) +#define NET_HEADER_FIELD_UDP_LEN (NET_HEADER_FIELD_UDP_PORT_SRC << 2) +#define NET_HEADER_FIELD_UDP_CKSUM (NET_HEADER_FIELD_UDP_PORT_SRC << 3) +#define NET_HEADER_FIELD_UDP_ALL_FIELDS ((NET_HEADER_FIELD_UDP_PORT_SRC << 4) - 1) + +#define NET_HEADER_FIELD_UDP_PORT_SIZE 2 + +typedef uint8_t headerFieldUdpLite_t; + +#define NET_HEADER_FIELD_UDP_LITE_PORT_SRC (1) +#define NET_HEADER_FIELD_UDP_LITE_PORT_DST (NET_HEADER_FIELD_UDP_LITE_PORT_SRC << 1) +#define NET_HEADER_FIELD_UDP_LITE_ALL_FIELDS ((NET_HEADER_FIELD_UDP_LITE_PORT_SRC << 2) - 1) + +#define NET_HEADER_FIELD_UDP_LITE_PORT_SIZE 2 + +typedef uint8_t headerFieldUdpEncapEsp_t; + +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC (1) +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_DST (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 1) +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_LEN (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 2) +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_CKSUM (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 3) +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_SPI (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 4) +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_SEQUENCE_NUM (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 5) +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_ALL_FIELDS ((NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 6) - 1) + +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SIZE 2 +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_SPI_SIZE 4 + +#define NET_HEADER_FIELD_IPHC_CID (1) +#define NET_HEADER_FIELD_IPHC_CID_TYPE (NET_HEADER_FIELD_IPHC_CID << 1) +#define NET_HEADER_FIELD_IPHC_HCINDEX (NET_HEADER_FIELD_IPHC_CID << 2) +#define NET_HEADER_FIELD_IPHC_GEN (NET_HEADER_FIELD_IPHC_CID << 3) +#define NET_HEADER_FIELD_IPHC_D_BIT (NET_HEADER_FIELD_IPHC_CID << 4) +#define NET_HEADER_FIELD_IPHC_ALL_FIELDS ((NET_HEADER_FIELD_IPHC_CID << 5) - 1) + +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE (1) +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_FLAGS (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 1) +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_LENGTH (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 2) +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_TSN (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 3) +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_STREAM_ID (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 4) +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_STREAM_SQN (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 5) +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_PAYLOAD_PID (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 6) +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_UNORDERED (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 7) +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_BEGGINING (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 8) +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_END (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 9) +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_ALL_FIELDS ((NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 10) - 1) + +#define NET_HEADER_FIELD_L2TPv2_TYPE_BIT (1) +#define NET_HEADER_FIELD_L2TPv2_LENGTH_BIT (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 1) +#define NET_HEADER_FIELD_L2TPv2_SEQUENCE_BIT (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 2) +#define NET_HEADER_FIELD_L2TPv2_OFFSET_BIT (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 3) +#define NET_HEADER_FIELD_L2TPv2_PRIORITY_BIT (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 4) +#define NET_HEADER_FIELD_L2TPv2_VERSION (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 5) +#define NET_HEADER_FIELD_L2TPv2_LEN (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 6) +#define NET_HEADER_FIELD_L2TPv2_TUNNEL_ID (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 7) +#define NET_HEADER_FIELD_L2TPv2_SESSION_ID (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 8) +#define NET_HEADER_FIELD_L2TPv2_NS (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 9) +#define NET_HEADER_FIELD_L2TPv2_NR (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 10) +#define NET_HEADER_FIELD_L2TPv2_OFFSET_SIZE (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 11) +#define NET_HEADER_FIELD_L2TPv2_FIRST_BYTE (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 12) +#define NET_HEADER_FIELD_L2TPv2_ALL_FIELDS ((NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 13) - 1) + +#define NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT (1) +#define NET_HEADER_FIELD_L2TPv3_CTRL_LENGTH_BIT (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 1) +#define NET_HEADER_FIELD_L2TPv3_CTRL_SEQUENCE_BIT (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 2) +#define NET_HEADER_FIELD_L2TPv3_CTRL_VERSION (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 3) +#define NET_HEADER_FIELD_L2TPv3_CTRL_LENGTH (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 4) +#define NET_HEADER_FIELD_L2TPv3_CTRL_CONTROL (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 5) +#define NET_HEADER_FIELD_L2TPv3_CTRL_SENT (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 6) +#define NET_HEADER_FIELD_L2TPv3_CTRL_RECV (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 7) +#define NET_HEADER_FIELD_L2TPv3_CTRL_FIRST_BYTE (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 8) +#define NET_HEADER_FIELD_L2TPv3_CTRL_ALL_FIELDS ((NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 9) - 1) + +#define NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT (1) +#define NET_HEADER_FIELD_L2TPv3_SESS_VERSION (NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 1) +#define NET_HEADER_FIELD_L2TPv3_SESS_ID (NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 2) +#define NET_HEADER_FIELD_L2TPv3_SESS_COOKIE (NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 3) +#define NET_HEADER_FIELD_L2TPv3_SESS_ALL_FIELDS ((NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 4) - 1) + + +typedef uint8_t headerFieldVlan_t; + +#define NET_HEADER_FIELD_VLAN_VPRI (1) +#define NET_HEADER_FIELD_VLAN_CFI (NET_HEADER_FIELD_VLAN_VPRI << 1) +#define NET_HEADER_FIELD_VLAN_VID (NET_HEADER_FIELD_VLAN_VPRI << 2) +#define NET_HEADER_FIELD_VLAN_LENGTH (NET_HEADER_FIELD_VLAN_VPRI << 3) +#define NET_HEADER_FIELD_VLAN_TYPE (NET_HEADER_FIELD_VLAN_VPRI << 4) +#define NET_HEADER_FIELD_VLAN_ALL_FIELDS ((NET_HEADER_FIELD_VLAN_VPRI << 5) - 1) + +#define NET_HEADER_FIELD_VLAN_TCI (NET_HEADER_FIELD_VLAN_VPRI | \ + NET_HEADER_FIELD_VLAN_CFI | \ + NET_HEADER_FIELD_VLAN_VID) + + +typedef uint8_t headerFieldLlc_t; + +#define NET_HEADER_FIELD_LLC_DSAP (1) +#define NET_HEADER_FIELD_LLC_SSAP (NET_HEADER_FIELD_LLC_DSAP << 1) +#define NET_HEADER_FIELD_LLC_CTRL (NET_HEADER_FIELD_LLC_DSAP << 2) +#define NET_HEADER_FIELD_LLC_ALL_FIELDS ((NET_HEADER_FIELD_LLC_DSAP << 3) - 1) + +#define NET_HEADER_FIELD_NLPID_NLPID (1) +#define NET_HEADER_FIELD_NLPID_ALL_FIELDS ((NET_HEADER_FIELD_NLPID_NLPID << 1) - 1) + + +typedef uint8_t headerFieldSnap_t; + +#define NET_HEADER_FIELD_SNAP_OUI (1) +#define NET_HEADER_FIELD_SNAP_PID (NET_HEADER_FIELD_SNAP_OUI << 1) +#define NET_HEADER_FIELD_SNAP_ALL_FIELDS ((NET_HEADER_FIELD_SNAP_OUI << 2) - 1) + + +typedef uint8_t headerFieldLlcSnap_t; + +#define NET_HEADER_FIELD_LLC_SNAP_TYPE (1) +#define NET_HEADER_FIELD_LLC_SNAP_ALL_FIELDS ((NET_HEADER_FIELD_LLC_SNAP_TYPE << 1) - 1) + +#define NET_HEADER_FIELD_ARP_HTYPE (1) +#define NET_HEADER_FIELD_ARP_PTYPE (NET_HEADER_FIELD_ARP_HTYPE << 1) +#define NET_HEADER_FIELD_ARP_HLEN (NET_HEADER_FIELD_ARP_HTYPE << 2) +#define NET_HEADER_FIELD_ARP_PLEN (NET_HEADER_FIELD_ARP_HTYPE << 3) +#define NET_HEADER_FIELD_ARP_OPER (NET_HEADER_FIELD_ARP_HTYPE << 4) +#define NET_HEADER_FIELD_ARP_SHA (NET_HEADER_FIELD_ARP_HTYPE << 5) +#define NET_HEADER_FIELD_ARP_SPA (NET_HEADER_FIELD_ARP_HTYPE << 6) +#define NET_HEADER_FIELD_ARP_THA (NET_HEADER_FIELD_ARP_HTYPE << 7) +#define NET_HEADER_FIELD_ARP_TPA (NET_HEADER_FIELD_ARP_HTYPE << 8) +#define NET_HEADER_FIELD_ARP_ALL_FIELDS ((NET_HEADER_FIELD_ARP_HTYPE << 9) - 1) + +#define NET_HEADER_FIELD_RFC2684_LLC (1) +#define NET_HEADER_FIELD_RFC2684_NLPID (NET_HEADER_FIELD_RFC2684_LLC << 1) +#define NET_HEADER_FIELD_RFC2684_OUI (NET_HEADER_FIELD_RFC2684_LLC << 2) +#define NET_HEADER_FIELD_RFC2684_PID (NET_HEADER_FIELD_RFC2684_LLC << 3) +#define NET_HEADER_FIELD_RFC2684_VPN_OUI (NET_HEADER_FIELD_RFC2684_LLC << 4) +#define NET_HEADER_FIELD_RFC2684_VPN_IDX (NET_HEADER_FIELD_RFC2684_LLC << 5) +#define NET_HEADER_FIELD_RFC2684_ALL_FIELDS ((NET_HEADER_FIELD_RFC2684_LLC << 6) - 1) + +#define NET_HEADER_FIELD_USER_DEFINED_SRCPORT (1) +#define NET_HEADER_FIELD_USER_DEFINED_PCDID (NET_HEADER_FIELD_USER_DEFINED_SRCPORT << 1) +#define NET_HEADER_FIELD_USER_DEFINED_ALL_FIELDS ((NET_HEADER_FIELD_USER_DEFINED_SRCPORT << 2) - 1) + +#define NET_HEADER_FIELD_PAYLOAD_BUFFER (1) +#define NET_HEADER_FIELD_PAYLOAD_SIZE (NET_HEADER_FIELD_PAYLOAD_BUFFER << 1) +#define NET_HEADER_FIELD_MAX_FRM_SIZE (NET_HEADER_FIELD_PAYLOAD_BUFFER << 2) +#define NET_HEADER_FIELD_MIN_FRM_SIZE (NET_HEADER_FIELD_PAYLOAD_BUFFER << 3) +#define NET_HEADER_FIELD_PAYLOAD_TYPE (NET_HEADER_FIELD_PAYLOAD_BUFFER << 4) +#define NET_HEADER_FIELD_FRAME_SIZE (NET_HEADER_FIELD_PAYLOAD_BUFFER << 5) +#define NET_HEADER_FIELD_PAYLOAD_ALL_FIELDS ((NET_HEADER_FIELD_PAYLOAD_BUFFER << 6) - 1) + + +typedef uint8_t headerFieldGre_t; + +#define NET_HEADER_FIELD_GRE_TYPE (1) +#define NET_HEADER_FIELD_GRE_ALL_FIELDS ((NET_HEADER_FIELD_GRE_TYPE << 1) - 1) + + +typedef uint8_t headerFieldMinencap_t; + +#define NET_HEADER_FIELD_MINENCAP_SRC_IP (1) +#define NET_HEADER_FIELD_MINENCAP_DST_IP (NET_HEADER_FIELD_MINENCAP_SRC_IP << 1) +#define NET_HEADER_FIELD_MINENCAP_TYPE (NET_HEADER_FIELD_MINENCAP_SRC_IP << 2) +#define NET_HEADER_FIELD_MINENCAP_ALL_FIELDS ((NET_HEADER_FIELD_MINENCAP_SRC_IP << 3) - 1) + + +typedef uint8_t headerFieldIpsecAh_t; + +#define NET_HEADER_FIELD_IPSEC_AH_SPI (1) +#define NET_HEADER_FIELD_IPSEC_AH_NH (NET_HEADER_FIELD_IPSEC_AH_SPI << 1) +#define NET_HEADER_FIELD_IPSEC_AH_ALL_FIELDS ((NET_HEADER_FIELD_IPSEC_AH_SPI << 2) - 1) + + +typedef uint8_t headerFieldIpsecEsp_t; + +#define NET_HEADER_FIELD_IPSEC_ESP_SPI (1) +#define NET_HEADER_FIELD_IPSEC_ESP_SEQUENCE_NUM (NET_HEADER_FIELD_IPSEC_ESP_SPI << 1) +#define NET_HEADER_FIELD_IPSEC_ESP_ALL_FIELDS ((NET_HEADER_FIELD_IPSEC_ESP_SPI << 2) - 1) + +#define NET_HEADER_FIELD_IPSEC_ESP_SPI_SIZE 4 + + +typedef uint8_t headerFieldMpls_t; + +#define NET_HEADER_FIELD_MPLS_LABEL_STACK (1) +#define NET_HEADER_FIELD_MPLS_LABEL_STACK_ALL_FIELDS ((NET_HEADER_FIELD_MPLS_LABEL_STACK << 1) - 1) + + +typedef uint8_t headerFieldMacsec_t; + +#define NET_HEADER_FIELD_MACSEC_SECTAG (1) +#define NET_HEADER_FIELD_MACSEC_ALL_FIELDS ((NET_HEADER_FIELD_MACSEC_SECTAG << 1) - 1) + + +typedef enum { + HEADER_TYPE_NONE = 0, + HEADER_TYPE_PAYLOAD, + HEADER_TYPE_ETH, + HEADER_TYPE_VLAN, + HEADER_TYPE_IPv4, + HEADER_TYPE_IPv6, + HEADER_TYPE_IP, + HEADER_TYPE_TCP, + HEADER_TYPE_UDP, + HEADER_TYPE_UDP_LITE, + HEADER_TYPE_IPHC, + HEADER_TYPE_SCTP, + HEADER_TYPE_SCTP_CHUNK_DATA, + HEADER_TYPE_PPPoE, + HEADER_TYPE_PPP, + HEADER_TYPE_PPPMUX, + HEADER_TYPE_PPPMUX_SUBFRAME, + HEADER_TYPE_L2TPv2, + HEADER_TYPE_L2TPv3_CTRL, + HEADER_TYPE_L2TPv3_SESS, + HEADER_TYPE_LLC, + HEADER_TYPE_LLC_SNAP, + HEADER_TYPE_NLPID, + HEADER_TYPE_SNAP, + HEADER_TYPE_MPLS, + HEADER_TYPE_IPSEC_AH, + HEADER_TYPE_IPSEC_ESP, + HEADER_TYPE_UDP_ENCAP_ESP, /* RFC 3948 */ + HEADER_TYPE_MACSEC, + HEADER_TYPE_GRE, + HEADER_TYPE_MINENCAP, + HEADER_TYPE_DCCP, + HEADER_TYPE_ICMP, + HEADER_TYPE_IGMP, + HEADER_TYPE_ARP, + HEADER_TYPE_CAPWAP, + HEADER_TYPE_CAPWAP_DTLS, + HEADER_TYPE_RFC2684, + HEADER_TYPE_USER_DEFINED_L2, + HEADER_TYPE_USER_DEFINED_L3, + HEADER_TYPE_USER_DEFINED_L4, + HEADER_TYPE_USER_DEFINED_SHIM1, + HEADER_TYPE_USER_DEFINED_SHIM2, + MAX_HEADER_TYPE_COUNT +} e_NetHeaderType; + + +#endif /* __NET_EXT_H */ diff --git a/sys/contrib/ncsw/inc/std_ext.h b/sys/contrib/ncsw/inc/std_ext.h new file mode 100644 index 000000000000..d91e6fddf507 --- /dev/null +++ b/sys/contrib/ncsw/inc/std_ext.h @@ -0,0 +1,48 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File std_ext.h + + @Description General Standard Definitions +*//***************************************************************************/ + +#ifndef __STD_EXT_H +#define __STD_EXT_H + + +#include "types_ext.h" +#include "ncsw_ext.h" + + +#endif /* __STD_EXT_H */ diff --git a/sys/contrib/ncsw/inc/stdarg_ext.h b/sys/contrib/ncsw/inc/stdarg_ext.h new file mode 100644 index 000000000000..2515c4cfe908 --- /dev/null +++ b/sys/contrib/ncsw/inc/stdarg_ext.h @@ -0,0 +1,53 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __STDARG_EXT_H +#define __STDARG_EXT_H + + +#if defined(NCSW_LINUX) && defined(__KERNEL__) +#include <stdarg.h> + +#elif defined(NCSW_FREEBSD) +#include <sys/param.h> +#include <sys/kernel.h> +#include <sys/stdarg.h> + +#else +#include <stdarg.h> + +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */ + +#include "std_ext.h" + + +#endif /* __STDARG_EXT_H */ diff --git a/sys/contrib/ncsw/inc/stdlib_ext.h b/sys/contrib/ncsw/inc/stdlib_ext.h new file mode 100644 index 000000000000..bc89030f13ec --- /dev/null +++ b/sys/contrib/ncsw/inc/stdlib_ext.h @@ -0,0 +1,166 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef __STDLIB_EXT_H +#define __STDLIB_EXT_H + + +#if (defined(NCSW_LINUX)) && defined(__KERNEL__) +#include "stdarg_ext.h" +#include "std_ext.h" + + +/** + * strtoul - convert a string to an uint32_t + * @cp: The start of the string + * @endp: A pointer to the end of the parsed string will be placed here + * @base: The number base to use + */ +uint32_t strtoul(const char *cp,char **endp,uint32_t base); + +/** + * strtol - convert a string to a int32_t + * @cp: The start of the string + * @endp: A pointer to the end of the parsed string will be placed here + * @base: The number base to use + */ +long strtol(const char *cp,char **endp,uint32_t base); + +/** + * strtoull - convert a string to an uint64_t + * @cp: The start of the string + * @endp: A pointer to the end of the parsed string will be placed here + * @base: The number base to use + */ +uint64_t strtoull(const char *cp,char **endp,uint32_t base); + +/** + * strtoll - convert a string to a int64 long + * @cp: The start of the string + * @endp: A pointer to the end of the parsed string will be placed here + * @base: The number base to use + */ +long long strtoll(const char *cp,char **endp,uint32_t base); + +/** + * atoi - convert a character to a int + * @s: The start of the string + */ +int atoi(const char *s); + +/** + * strnlen - Find the length of a length-limited string + * @s: The string to be sized + * @count: The maximum number of bytes to search + */ +size_t strnlen(const char * s, size_t count); + +/** + * strlen - Find the length of a string + * @s: The string to be sized + */ +size_t strlen(const char * s); + +/** + * strtok - Split a string into tokens + * @s: The string to be searched + * @ct: The characters to search for + * + * WARNING: strtok is deprecated, use strsep instead. + */ +char * strtok(char * s,const char * ct); + +/** + * strncpy - Copy a length-limited, %NUL-terminated string + * @dest: Where to copy the string to + * @src: Where to copy the string from + * @count: The maximum number of bytes to copy + * + * Note that unlike userspace strncpy, this does not %NUL-pad the buffer. + * However, the result is not %NUL-terminated if the source exceeds + * @count bytes. + */ +char * strncpy(char * dest,const char *src,size_t count); + +/** + * strcpy - Copy a %NUL terminated string + * @dest: Where to copy the string to + * @src: Where to copy the string from + */ +char * strcpy(char * dest,const char *src); + +/** + * vsscanf - Unformat a buffer into a list of arguments + * @buf: input buffer + * @fmt: format of buffer + * @args: arguments + */ +int vsscanf(const char * buf, const char * fmt, va_list args); + +/** + * vsnprintf - Format a string and place it in a buffer + * @buf: The buffer to place the result into + * @size: The size of the buffer, including the trailing null space + * @fmt: The format string to use + * @args: Arguments for the format string + * + * Call this function if you are already dealing with a va_list. + * You probably want snprintf instead. + */ +int vsnprintf(char *buf, size_t size, const char *fmt, va_list args); + +/** + * vsprintf - Format a string and place it in a buffer + * @buf: The buffer to place the result into + * @fmt: The format string to use + * @args: Arguments for the format string + * + * Call this function if you are already dealing with a va_list. + * You probably want sprintf instead. + */ +int vsprintf(char *buf, const char *fmt, va_list args); + +#elif defined(NCSW_FREEBSD) +#include <sys/param.h> +#include <sys/kernel.h> +#include <sys/libkern.h> + +#else +#include <stdlib.h> +#include <stdio.h> +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */ + +#include "std_ext.h" + + +#endif /* __STDLIB_EXT_H */ diff --git a/sys/contrib/ncsw/inc/string_ext.h b/sys/contrib/ncsw/inc/string_ext.h new file mode 100644 index 000000000000..e2d413067277 --- /dev/null +++ b/sys/contrib/ncsw/inc/string_ext.h @@ -0,0 +1,61 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __STRING_EXT_H +#define __STRING_EXT_H + + +#if defined(NCSW_LINUX) && defined(__KERNEL__) +#include <linux/kernel.h> +#include <linux/string.h> +extern char * strtok ( char * str, const char * delimiters ); + +#elif defined(__KERNEL__) +#include "linux/types.h" +#include "linux/posix_types.h" +#include "linux/string.h" + +#elif defined(NCSW_FREEBSD) +#include <sys/param.h> +#include <sys/kernel.h> +#include <sys/libkern.h> +extern char *strtok(char *str, const char *delimiters); + +#else +#include <string.h> + +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */ + +#include "std_ext.h" + + +#endif /* __STRING_EXT_H */ diff --git a/sys/contrib/ncsw/inc/types_ext.h b/sys/contrib/ncsw/inc/types_ext.h new file mode 100644 index 000000000000..da524cc882be --- /dev/null +++ b/sys/contrib/ncsw/inc/types_ext.h @@ -0,0 +1,65 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File types_ext.h + + @Description General types Standard Definitions +*//***************************************************************************/ + +#ifndef __TYPES_EXT_H +#define __TYPES_EXT_H + +#if defined(NCSW_LINUX) +#include "types_linux.h" + +#elif defined(NCSW_VXWORKS) +#include "types_vxworks.h" + +#elif defined(__GNUC__) && defined(__cplusplus) +#include "types_bb_gpp.h" + +#elif defined(__FreeBSD__) +#include "types_freebsd.h" + +#elif defined(__GNUC__) +#include "types_bb_gcc.h" + +#elif defined(__ghs__) +#include "types_ghs.h" + +#else +#include "types_dflt.h" +#endif /* defined (__ROCOO__) */ + +#endif /* __TYPES_EXT_H */ diff --git a/sys/contrib/ncsw/inc/types_freebsd.h b/sys/contrib/ncsw/inc/types_freebsd.h new file mode 100644 index 000000000000..031da08e0f75 --- /dev/null +++ b/sys/contrib/ncsw/inc/types_freebsd.h @@ -0,0 +1,104 @@ +/*- + * Copyright (c) 2011 Semihalf. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef TYPES_FREEBSD_H_ +#define TYPES_FREEBSD_H_ + +#include <sys/param.h> +#include <sys/kernel.h> +#include <sys/libkern.h> +#include <sys/stddef.h> +#include <sys/types.h> + +#include <machine/pio.h> + +#if !defined(__bool_true_false_are_defined) +typedef boolean_t bool; +#endif +#define TRUE 1 +#define FALSE 0 + +typedef vm_paddr_t physAddress_t; + +#define _Packed +#define _PackedType __attribute__ ((packed)) + +/** + * Accessor defines. + * TODO: These are only stubs and have to be redefined (use bus_space + * facilities). + */ +#define GET_UINT32(arg) in32(&(arg)) +#define GET_UINT64(arg) in64(&(arg)) + +#define _WRITE_UINT32(arg, data) out32(&(arg), (data)) +#define _WRITE_UINT64(arg, data) out64(&(arg), (data)) + +#ifndef QE_32_BIT_ACCESS_RESTRICTION + +#define GET_UINT8(arg) in8(&(arg)) +#define GET_UINT16(arg) in16(&(arg)) + +#define _WRITE_UINT8(arg, data) out8(&(arg), (data)) +#define _WRITE_UINT16(arg, data) out16(&(arg), (data)) + +#else /* QE_32_BIT_ACCESS_RESTRICTION */ + +#define QE_32_BIT_ADDR(_arg) (uint32_t)((uint32_t)&(_arg) & 0xFFFFFFFC) +#define QE_32_BIT_SHIFT8(__arg) (uint32_t)((3 - ((uint32_t)&(__arg) & 0x3)) * 8) +#define QE_32_BIT_SHIFT16(__arg) (uint32_t)((2 - ((uint32_t)&(__arg) & 0x3)) * 8) + +#define GET_UINT8(arg) (uint8_t)(in32(QE_32_BIT_ADDR(arg)) >> QE_32_BIT_SHIFT8(arg)) +#define GET_UINT16(arg) (uint16_t)(in32(QE_32_BIT_ADDR(arg)) >> QE_32_BIT_SHIFT16(arg)) + +#define _WRITE_UINT8(arg, data) \ + do \ + { \ + uint32_t addr = QE_32_BIT_ADDR(arg); \ + uint32_t shift = QE_32_BIT_SHIFT8(arg); \ + uint32_t tmp = in32(addr); \ + tmp = (uint32_t)((tmp & ~(0x000000FF << shift)) | ((uint32_t)(data & 0x000000FF) << shift)); \ + out32(addr, tmp); \ + } while (0) + +#define _WRITE_UINT16(arg, data) \ + do \ + { \ + uint32_t addr = QE_32_BIT_ADDR(arg); \ + uint32_t shift = QE_32_BIT_SHIFT16(arg); \ + uint32_t tmp = in32(addr); \ + tmp = (uint32_t)((tmp & ~(0x0000FFFF << shift)) | ((uint32_t)(data & 0x0000FFFF) << shift)); \ + out32(addr, tmp); \ + } while (0) + +#endif /* QE_32_BIT_ACCESS_RESTRICTION */ + +#define WRITE_UINT8 _WRITE_UINT8 +#define WRITE_UINT16 _WRITE_UINT16 +#define WRITE_UINT32 _WRITE_UINT32 +#define WRITE_UINT64 _WRITE_UINT64 + +#endif /* TYPES_FREEBSD_H_ */ diff --git a/sys/contrib/ncsw/inc/xx_common.h b/sys/contrib/ncsw/inc/xx_common.h new file mode 100644 index 000000000000..8247b9921678 --- /dev/null +++ b/sys/contrib/ncsw/inc/xx_common.h @@ -0,0 +1,58 @@ +/* + * Copyright 2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File debug_ext.h + + @Description Debug mode definitions. +*//***************************************************************************/ + +#ifndef __XX_COMMON_H +#define __XX_COMMON_H + +/***************************************************************************** + * UNIFIED MODULE CODES + *****************************************************************************/ +#define MODULE_UNKNOWN 0x00000000 +#define MODULE_FM 0x00010000 +#define MODULE_FM_MURAM 0x00020000 +#define MODULE_FM_PCD 0x00030000 +#define MODULE_FM_RTC 0x00040000 +#define MODULE_FM_MAC 0x00050000 +#define MODULE_FM_PORT 0x00060000 +#define MODULE_MM 0x00070000 +#define MODULE_FM_SP 0x00080000 +#define MODULE_FM_MACSEC 0x00090000 +#define MODULE_QM 0x000a0000 +#define MODULE_BM 0x000b0000 +#endif /* __XX_COMMON_H */ diff --git a/sys/contrib/ncsw/inc/xx_ext.h b/sys/contrib/ncsw/inc/xx_ext.h new file mode 100644 index 000000000000..632f0c979510 --- /dev/null +++ b/sys/contrib/ncsw/inc/xx_ext.h @@ -0,0 +1,797 @@ +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/**************************************************************************//** + @File xx_ext.h + + @Description Prototypes, externals and typedefs for system-supplied + (external) routines +*//***************************************************************************/ + +#ifndef __XX_EXT_H +#define __XX_EXT_H + +#include "std_ext.h" +#include "xx_common.h" +#include "part_ext.h" + + + +/**************************************************************************//** + @Group xx_id XX Interface (System call hooks) + + @Description Prototypes, externals and typedefs for system-supplied + (external) routines + + @{ +*//***************************************************************************/ + +#ifdef DEBUG_XX_MALLOC +void * XX_MallocDebug(uint32_t size, char *fname, int line); + +void * XX_MallocSmartDebug(uint32_t size, + int memPartitionId, + uint32_t alignment, + char *fname, + int line); + +#define XX_Malloc(sz) \ + XX_MallocDebug((sz), __FILE__, __LINE__) + +#define XX_MallocSmart(sz, memt, al) \ + XX_MallocSmartDebug((sz), (memt), (al), __FILE__, __LINE__) + +#else /* not DEBUG_XX_MALLOC */ +/**************************************************************************//** + @Function XX_Malloc + + @Description allocates contiguous block of memory. + + @Param[in] size - Number of bytes to allocate. + + @Return The address of the newly allocated block on success, NULL on failure. +*//***************************************************************************/ +void * XX_Malloc(uint32_t size); + +/**************************************************************************//** + @Function XX_MallocSmart + + @Description Allocates contiguous block of memory in a specified + alignment and from the specified segment. + + @Param[in] size - Number of bytes to allocate. + @Param[in] memPartitionId - Memory partition ID; The value zero must + be mapped to the default heap partition. + @Param[in] alignment - Required memory alignment (in bytes). + + @Return The address of the newly allocated block on success, NULL on failure. +*//***************************************************************************/ +void * XX_MallocSmart(uint32_t size, int memPartitionId, uint32_t alignment); + +int XX_MallocSmartInit(void); +#endif /* not DEBUG_XX_MALLOC */ + +/**************************************************************************//** + @Function XX_FreeSmart + + @Description Frees the memory block pointed to by "p". + Only for memory allocated by XX_MallocSmart + + @Param[in] p_Memory - pointer to the memory block. + + @Return None. +*//***************************************************************************/ +void XX_FreeSmart(void *p_Memory); + +/**************************************************************************//** + @Function XX_Free + + @Description frees the memory block pointed to by "p". + + @Param[in] p_Memory - pointer to the memory block. + + @Return None. +*//***************************************************************************/ +void XX_Free(void *p_Memory); + +/**************************************************************************//** + @Function XX_Print + + @Description print a string. + + @Param[in] str - string to print. + + @Return None. +*//***************************************************************************/ +void XX_Print(char *str, ...); + +/**************************************************************************//** + @Function XX_SetIntr + + @Description Set an interrupt service routine for a specific interrupt source. + + @Param[in] irq - Interrupt ID (system-specific number). + @Param[in] f_Isr - Callback routine that will be called when the interrupt occurs. + @Param[in] handle - The argument for the user callback routine. + + @Return E_OK on success; error code otherwise.. +*//***************************************************************************/ +t_Error XX_SetIntr(uintptr_t irq, t_Isr *f_Isr, t_Handle handle); + +/**************************************************************************//** + @Function XX_FreeIntr + + @Description Free a specific interrupt and a specific callback routine. + + @Param[in] irq - Interrupt ID (system-specific number). + + @Return E_OK on success; error code otherwise.. +*//***************************************************************************/ +t_Error XX_FreeIntr(uintptr_t irq); + +/**************************************************************************//** + @Function XX_EnableIntr + + @Description Enable a specific interrupt. + + @Param[in] irq - Interrupt ID (system-specific number). + + @Return E_OK on success; error code otherwise.. +*//***************************************************************************/ +t_Error XX_EnableIntr(uintptr_t irq); + +/**************************************************************************//** + @Function XX_DisableIntr + + @Description Disable a specific interrupt. + + @Param[in] irq - Interrupt ID (system-specific number). + + @Return E_OK on success; error code otherwise.. +*//***************************************************************************/ +t_Error XX_DisableIntr(uintptr_t irq); + +/**************************************************************************//** + @Function XX_DisableAllIntr + + @Description Disable all interrupts by masking them at the CPU. + + @Return A value that represents the interrupts state before the + operation, and should be passed to the matching + XX_RestoreAllIntr() call. +*//***************************************************************************/ +uint32_t XX_DisableAllIntr(void); + +/**************************************************************************//** + @Function XX_RestoreAllIntr + + @Description Restore previous state of interrupts level at the CPU. + + @Param[in] flags - A value that represents the interrupts state to restore, + as returned by the matching call for XX_DisableAllIntr(). + + @Return None. +*//***************************************************************************/ +void XX_RestoreAllIntr(uint32_t flags); + + +t_Error XX_PreallocAndBindIntr(device_t dev, uintptr_t irq, unsigned int cpu); +t_Error XX_DeallocIntr(uintptr_t irq); + +/**************************************************************************//** + @Function XX_Exit + + @Description Stop execution and report status (where it is applicable) + + @Param[in] status - exit status +*//***************************************************************************/ +void XX_Exit(int status); + + +/*****************************************************************************/ +/* Tasklet Service Routines */ +/*****************************************************************************/ +typedef t_Handle t_TaskletHandle; + +/**************************************************************************//** + @Function XX_InitTasklet + + @Description Create and initialize a tasklet object. + + @Param[in] routine - A routine to be ran as a tasklet. + @Param[in] data - An argument to pass to the tasklet. + + @Return Tasklet handle is returned on success. NULL is returned otherwise. +*//***************************************************************************/ +t_TaskletHandle XX_InitTasklet (void (*routine)(void *), void *data); + +/**************************************************************************//** + @Function XX_FreeTasklet + + @Description Free a tasklet object. + + @Param[in] h_Tasklet - A handle to a tasklet to be free. + + @Return None. +*//***************************************************************************/ +void XX_FreeTasklet (t_TaskletHandle h_Tasklet); + +/**************************************************************************//** + @Function XX_ScheduleTask + + @Description Schedule a tasklet object. + + @Param[in] h_Tasklet - A handle to a tasklet to be scheduled. + @Param[in] immediate - Indicate whether to schedule this tasklet on + the immediate queue or on the delayed one. + + @Return 0 - on success. Error code - otherwise. +*//***************************************************************************/ +int XX_ScheduleTask(t_TaskletHandle h_Tasklet, int immediate); + +/**************************************************************************//** + @Function XX_FlushScheduledTasks + + @Description Flush all tasks there are in the scheduled tasks queue. + + @Return None. +*//***************************************************************************/ +void XX_FlushScheduledTasks(void); + +/**************************************************************************//** + @Function XX_TaskletIsQueued + + @Description Check if task is queued. + + @Param[in] h_Tasklet - A handle to a tasklet to be scheduled. + + @Return 1 - task is queued. 0 - otherwise. +*//***************************************************************************/ +int XX_TaskletIsQueued(t_TaskletHandle h_Tasklet); + +/**************************************************************************//** + @Function XX_SetTaskletData + + @Description Set data to a scheduled task. Used to change data of already + scheduled task. + + @Param[in] h_Tasklet - A handle to a tasklet to be scheduled. + @Param[in] data - Data to be set. +*//***************************************************************************/ +void XX_SetTaskletData(t_TaskletHandle h_Tasklet, t_Handle data); + +/**************************************************************************//** + @Function XX_GetTaskletData + + @Description Get the data of scheduled task. + + @Param[in] h_Tasklet - A handle to a tasklet to be scheduled. + + @Return handle to the data of the task. +*//***************************************************************************/ +t_Handle XX_GetTaskletData(t_TaskletHandle h_Tasklet); + +/**************************************************************************//** + @Function XX_BottomHalf + + @Description Bottom half implementation, invoked by the interrupt handler. + + This routine handles all bottom-half tasklets with interrupts + enabled. + + @Return None. +*//***************************************************************************/ +void XX_BottomHalf(void); + + +/*****************************************************************************/ +/* Spinlock Service Routines */ +/*****************************************************************************/ + +/**************************************************************************//** + @Function XX_InitSpinlock + + @Description Creates a spinlock. + + @Return Spinlock handle is returned on success; NULL otherwise. +*//***************************************************************************/ +t_Handle XX_InitSpinlock(void); + +/**************************************************************************//** + @Function XX_FreeSpinlock + + @Description Frees the memory allocated for the spinlock creation. + + @Param[in] h_Spinlock - A handle to a spinlock. + + @Return None. +*//***************************************************************************/ +void XX_FreeSpinlock(t_Handle h_Spinlock); + +/**************************************************************************//** + @Function XX_LockSpinlock + + @Description Locks a spinlock. + + @Param[in] h_Spinlock - A handle to a spinlock. + + @Return None. +*//***************************************************************************/ +void XX_LockSpinlock(t_Handle h_Spinlock); + +/**************************************************************************//** + @Function XX_UnlockSpinlock + + @Description Unlocks a spinlock. + + @Param[in] h_Spinlock - A handle to a spinlock. + + @Return None. +*//***************************************************************************/ +void XX_UnlockSpinlock(t_Handle h_Spinlock); + +/**************************************************************************//** + @Function XX_LockIntrSpinlock + + @Description Locks a spinlock (interrupt safe). + + @Param[in] h_Spinlock - A handle to a spinlock. + + @Return A value that represents the interrupts state before the + operation, and should be passed to the matching + XX_UnlockIntrSpinlock() call. +*//***************************************************************************/ +uint32_t XX_LockIntrSpinlock(t_Handle h_Spinlock); + +/**************************************************************************//** + @Function XX_UnlockIntrSpinlock + + @Description Unlocks a spinlock (interrupt safe). + + @Param[in] h_Spinlock - A handle to a spinlock. + @Param[in] intrFlags - A value that represents the interrupts state to + restore, as returned by the matching call for + XX_LockIntrSpinlock(). + + @Return None. +*//***************************************************************************/ +void XX_UnlockIntrSpinlock(t_Handle h_Spinlock, uint32_t intrFlags); + + +/*****************************************************************************/ +/* Timers Service Routines */ +/*****************************************************************************/ + +/**************************************************************************//** + @Function XX_CurrentTime + + @Description Returns current system time. + + @Return Current system time (in milliseconds). +*//***************************************************************************/ +uint32_t XX_CurrentTime(void); + +/**************************************************************************//** + @Function XX_CreateTimer + + @Description Creates a timer. + + @Return Timer handle is returned on success; NULL otherwise. +*//***************************************************************************/ +t_Handle XX_CreateTimer(void); + +/**************************************************************************//** + @Function XX_FreeTimer + + @Description Frees the memory allocated for the timer creation. + + @Param[in] h_Timer - A handle to a timer. + + @Return None. +*//***************************************************************************/ +void XX_FreeTimer(t_Handle h_Timer); + +/**************************************************************************//** + @Function XX_StartTimer + + @Description Starts a timer. + + The user can select to start the timer as periodic timer or as + one-shot timer. The user should provide a callback routine that + will be called when the timer expires. + + @Param[in] h_Timer - A handle to a timer. + @Param[in] msecs - Timer expiration period (in milliseconds). + @Param[in] periodic - TRUE for a periodic timer; + FALSE for a one-shot timer.. + @Param[in] f_TimerExpired - A callback routine to be called when the + timer expires. + @Param[in] h_Arg - The argument to pass in the timer-expired + callback routine. + + @Return None. +*//***************************************************************************/ +void XX_StartTimer(t_Handle h_Timer, + uint32_t msecs, + bool periodic, + void (*f_TimerExpired)(t_Handle h_Arg), + t_Handle h_Arg); + +/**************************************************************************//** + @Function XX_StopTimer + + @Description Frees the memory allocated for the timer creation. + + @Param[in] h_Timer - A handle to a timer. + + @Return None. +*//***************************************************************************/ +void XX_StopTimer(t_Handle h_Timer); + +/**************************************************************************//** + @Function XX_ModTimer + + @Description Updates the expiration time of a timer. + + This routine adds the given time to the current system time, + and sets this value as the new expiration time of the timer. + + @Param[in] h_Timer - A handle to a timer. + @Param[in] msecs - The new interval until timer expiration + (in milliseconds). + + @Return None. +*//***************************************************************************/ +void XX_ModTimer(t_Handle h_Timer, uint32_t msecs); + +/**************************************************************************//** + @Function XX_Sleep + + @Description Non-busy wait until the desired time (in milliseconds) has passed. + + @Param[in] msecs - The requested sleep time (in milliseconds). + + @Return Zero if the requested time has elapsed; Otherwise, the value + returned will be the unslept amount) in milliseconds. + + @Cautions This routine enables interrupts during its wait time. +*//***************************************************************************/ +uint32_t XX_Sleep(uint32_t msecs); + +/**************************************************************************//** + @Function XX_UDelay + + @Description Busy-wait until the desired time (in microseconds) has passed. + + @Param[in] usecs - The requested delay time (in microseconds). + + @Return None. + + @Cautions It is highly unrecommended to call this routine during interrupt + time, because the system time may not be updated properly during + the delay loop. The behavior of this routine during interrupt + time is unexpected. +*//***************************************************************************/ +void XX_UDelay(uint32_t usecs); + + +/*****************************************************************************/ +/* Other Service Routines */ +/*****************************************************************************/ + +/**************************************************************************//** + @Function XX_PhysToVirt + + @Description Translates a physical address to the matching virtual address. + + @Param[in] addr - The physical address to translate. + + @Return Virtual address. +*//***************************************************************************/ +void * XX_PhysToVirt(physAddress_t addr); + +/**************************************************************************//** + @Function XX_VirtToPhys + + @Description Translates a virtual address to the matching physical address. + + @Param[in] addr - The virtual address to translate. + + @Return Physical address. +*//***************************************************************************/ +physAddress_t XX_VirtToPhys(void *addr); + + +/**************************************************************************//** + @Group xx_ipc XX Inter-Partition-Communication API + + @Description The following API is to be used when working with multiple + partitions configuration. + + @{ +*//***************************************************************************/ + +#define XX_IPC_MAX_ADDR_NAME_LENGTH 16 /**< Maximum length of an endpoint name string; + The IPC service can use this constant to limit + the storage space for IPC endpoint names. */ + + +/**************************************************************************//** + @Function t_IpcMsgCompletion + + @Description Callback function used upon IPC non-blocking transaction completion + to return message buffer to the caller and to forward reply if available. + + This callback function may be attached by the source endpoint to any outgoing + IPC message to indicate a non-blocking send (see also XX_IpcSendMessage() routine). + Upon completion of an IPC transaction (consisting of a message and an optional reply), + the IPC service invokes this callback routine to return the message buffer to the sender + and to provide the received reply, if requested. + + User provides this function. Driver invokes it. + + @Param[in] h_Module - Abstract handle to the sending module - the same handle as was passed + in the XX_IpcSendMessage() function; This handle is typically used to point + to the internal data structure of the source endpoint. + @Param[in] p_Msg - Pointer to original (sent) message buffer; + The source endpoint can free (or reuse) this buffer when message + completion callback is called. + @Param[in] p_Reply - Pointer to (received) reply buffer; + This pointer is the same as was provided by the source endpoint in + XX_IpcSendMessage(). + @Param[in] replyLength - Length (in bytes) of actual data in the reply buffer. + @Param[in] status - Completion status - E_OK or failure indication, e.g. IPC transaction completion + timeout. + + @Return None + *//***************************************************************************/ +typedef void (t_IpcMsgCompletion)(t_Handle h_Module, + uint8_t *p_Msg, + uint8_t *p_Reply, + uint32_t replyLength, + t_Error status); + +/**************************************************************************//** + @Function t_IpcMsgHandler + + @Description Callback function used as IPC message handler. + + The IPC service invokes message handlers for each IPC message received. + The actual function pointer should be registered by each destination endpoint + via the XX_IpcRegisterMsgHandler() routine. + + User provides this function. Driver invokes it. + + @Param[in] h_Module - Abstract handle to the message handling module - the same handle as + was passed in the XX_IpcRegisterMsgHandler() function; this handle is + typically used to point to the internal data structure of the destination + endpoint. + @Param[in] p_Msg - Pointer to message buffer with data received from peer. + @Param[in] msgLength - Length (in bytes) of message data. + @Param[in] p_Reply - Pointer to reply buffer, to be filled by the message handler and then sent + by the IPC service; + The reply buffer is allocated by the IPC service with size equals to the + replyLength parameter provided in message handler registration (see + XX_IpcRegisterMsgHandler() function); + If replyLength was initially specified as zero during message handler registration, + the IPC service may set this pointer to NULL and assume that a reply is not needed; + The IPC service is also responsible for freeing the reply buffer after the + reply has been sent or dismissed. + @Param[in,out] p_ReplyLength - Pointer to reply length, which has a dual role in this function: + [In] equals the replyLength parameter provided in message handler + registration (see XX_IpcRegisterMsgHandler() function), and + [Out] should be updated by message handler to the actual reply length; if + this value is set to zero, the IPC service must assume that a reply should + not be sent; + Note: If p_Reply is not NULL, p_ReplyLength must not be NULL as well. + + @Return E_OK on success; Error code otherwise. + *//***************************************************************************/ +typedef t_Error (t_IpcMsgHandler)(t_Handle h_Module, + uint8_t *p_Msg, + uint32_t msgLength, + uint8_t *p_Reply, + uint32_t *p_ReplyLength); + +/**************************************************************************//** + @Function XX_IpcRegisterMsgHandler + + @Description IPC mailbox registration. + + This function is used for registering an IPC message handler in the IPC service. + This function is called by each destination endpoint to indicate that it is ready + to handle incoming messages. The IPC service invokes the message handler upon receiving + a message addressed to the specified destination endpoint. + + @Param[in] addr - The address name string associated with the destination endpoint; + This address must be unique across the IPC service domain to ensure + correct message routing. + @Param[in] f_MsgHandler - Pointer to the message handler callback for processing incoming + message; invoked by the IPC service upon receiving a message + addressed to the destination endpoint specified by the addr + parameter. + @Param[in] h_Module - Abstract handle to the message handling module, passed unchanged + to f_MsgHandler callback function. + @Param[in] replyLength - The maximal data length (in bytes) of any reply that the specified message handler + may generate; the IPC service provides the message handler with buffer + for reply according to the length specified here (refer also to the description + of #t_IpcMsgHandler callback function type); + This size shall be zero if the message handler never generates replies. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error XX_IpcRegisterMsgHandler(char addr[XX_IPC_MAX_ADDR_NAME_LENGTH], + t_IpcMsgHandler *f_MsgHandler, + t_Handle h_Module, + uint32_t replyLength); + +/**************************************************************************//** + @Function XX_IpcUnregisterMsgHandler + + @Description Release IPC mailbox routine. + + This function is used for unregistering an IPC message handler from the IPC service. + This function is called by each destination endpoint to indicate that it is no longer + capable of handling incoming messages. + + @Param[in] addr - The address name string associated with the destination endpoint; + This address is the same as was used when the message handler was + registered via XX_IpcRegisterMsgHandler(). + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error XX_IpcUnregisterMsgHandler(char addr[XX_IPC_MAX_ADDR_NAME_LENGTH]); + +/**************************************************************************//** + @Function XX_IpcInitSession + + @Description This function is used for creating an IPC session between the source endpoint + and the destination endpoint. + + The actual implementation and representation of a session is left for the IPC service. + The function returns an abstract handle to the created session. This handle shall be used + by the source endpoint in subsequent calls to XX_IpcSendMessage(). + The IPC service assumes that before this function is called, no messages are sent from + the specified source endpoint to the specified destination endpoint. + + The IPC service may use a connection-oriented approach or a connectionless approach (or both) + as described below. + + @par Connection-Oriented Approach + + The IPC service may implement a session in a connection-oriented approach - when this function is called, + the IPC service should take the necessary steps to bring up a source-to-destination channel for messages + and a destination-to-source channel for replies. The returned handle should represent the internal + representation of these channels. + + @par Connectionless Approach + + The IPC service may implement a session in a connectionless approach - when this function is called, the + IPC service should not perform any particular steps, but it must store the pair of source and destination + addresses in some session representation and return it as a handle. When XX_IpcSendMessage() shall be + called, the IPC service may use this handle to provide the necessary identifiers for routing the messages + through the connectionless medium. + + @Param[in] destAddr - The address name string associated with the destination endpoint. + @Param[in] srcAddr - The address name string associated with the source endpoint. + + @Return Abstract handle to the initialized session, or NULL on error. +*//***************************************************************************/ +t_Handle XX_IpcInitSession(char destAddr[XX_IPC_MAX_ADDR_NAME_LENGTH], + char srcAddr[XX_IPC_MAX_ADDR_NAME_LENGTH]); + +/**************************************************************************//** + @Function XX_IpcFreeSession + + @Description This function is used for terminating an existing IPC session between a source endpoint + and a destination endpoint. + + The IPC service assumes that after this function is called, no messages shall be sent from + the associated source endpoint to the associated destination endpoint. + + @Param[in] h_Session - Abstract handle to the IPC session - the same handle as was originally + returned by the XX_IpcInitSession() function. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error XX_IpcFreeSession(t_Handle h_Session); + +/**************************************************************************//** + @Function XX_IpcSendMessage + + @Description IPC message send routine. + + This function may be used by a source endpoint to send an IPC message to a destination + endpoint. The source endpoint cannot send a message to the destination endpoint without + first initiating a session with that destination endpoint via XX_IpcInitSession() routine. + + The source endpoint must provide the buffer pointer and length of the outgoing message. + Optionally, it may also provide a buffer for an expected reply. In the latter case, the + transaction is not considered complete by the IPC service until the reply has been received. + If the source endpoint does not provide a reply buffer, the transaction is considered + complete after the message has been sent. The source endpoint must keep the message (and + optional reply) buffers valid until the transaction is complete. + + @par Non-blocking mode + + The source endpoint may request a non-blocking send by providing a non-NULL pointer to a message + completion callback function (f_Completion). Upon completion of the IPC transaction (consisting of a + message and an optional reply), the IPC service invokes this callback routine to return the message + buffer to the sender and to provide the received reply, if requested. + + @par Blocking mode + + The source endpoint may request a blocking send by setting f_Completion to NULL. The function is + expected to block until the IPC transaction is complete - either the reply has been received or (if no reply + was requested) the message has been sent. + + @Param[in] h_Session - Abstract handle to the IPC session - the same handle as was originally + returned by the XX_IpcInitSession() function. + @Param[in] p_Msg - Pointer to message buffer to send. + @Param[in] msgLength - Length (in bytes) of actual data in the message buffer. + @Param[in] p_Reply - Pointer to reply buffer - if this buffer is not NULL, the IPC service + fills this buffer with the received reply data; + In blocking mode, the reply data must be valid when the function returns; + In non-blocking mode, the reply data is valid when f_Completion is called; + If this pointer is NULL, no reply is expected. + @Param[in,out] p_ReplyLength - Pointer to reply length, which has a dual role in this function: + [In] specifies the maximal length (in bytes) of the reply buffer pointed by + p_Reply, and + [Out] in non-blocking mode this value is updated by the IPC service to the + actual reply length (in bytes). + @Param[in] f_Completion - Pointer to a completion callback to be used in non-blocking send mode; + The completion callback is invoked by the IPC service upon + completion of the IPC transaction (consisting of a message and an optional + reply); + If this pointer is NULL, the function is expected to block until the IPC + transaction is complete. + @Param[in] h_Arg - Abstract handle to the sending module; passed unchanged to the f_Completion + callback function as the first argument. + + @Return E_OK on success; Error code otherwise. +*//***************************************************************************/ +t_Error XX_IpcSendMessage(t_Handle h_Session, + uint8_t *p_Msg, + uint32_t msgLength, + uint8_t *p_Reply, + uint32_t *p_ReplyLength, + t_IpcMsgCompletion *f_Completion, + t_Handle h_Arg); + + +/** @} */ /* end of xx_ipc group */ +/** @} */ /* end of xx_id group */ + + +void XX_PortalSetInfo(device_t dev); +#endif /* __XX_EXT_H */ |