diff options
Diffstat (limited to 'sys/dev/cxgbe/common/t4_regs.h')
| -rw-r--r-- | sys/dev/cxgbe/common/t4_regs.h | 100 |
1 files changed, 94 insertions, 6 deletions
diff --git a/sys/dev/cxgbe/common/t4_regs.h b/sys/dev/cxgbe/common/t4_regs.h index 8f500ec0fbdd..51f150443261 100644 --- a/sys/dev/cxgbe/common/t4_regs.h +++ b/sys/dev/cxgbe/common/t4_regs.h @@ -27,11 +27,11 @@ */ /* This file is automatically generated --- changes will be lost */ -/* Generation Date : Thu Sep 11 05:25:56 PM IST 2025 */ +/* Generation Date : Tue Oct 28 05:23:45 PM IST 2025 */ /* Directory name: t4_reg.txt, Date: Not specified */ /* Directory name: t5_reg.txt, Changeset: 6945:54ba4ba7ee8b */ /* Directory name: t6_reg.txt, Changeset: 4277:9c165d0f4899 */ -/* Directory name: t7_reg.txt, Changeset: 5945:1487219ecb20 */ +/* Directory name: t7_sw_reg.txt, Changeset: 5946:0b60ff298e7d */ #define MYPF_BASE 0x1b000 #define MYPF_REG(reg_addr) (MYPF_BASE + (reg_addr)) @@ -44006,10 +44006,57 @@ #define V_MPS2CRYPTO_RX_INTF_FIFO(x) ((x) << S_MPS2CRYPTO_RX_INTF_FIFO) #define G_MPS2CRYPTO_RX_INTF_FIFO(x) (((x) >> S_MPS2CRYPTO_RX_INTF_FIFO) & M_MPS2CRYPTO_RX_INTF_FIFO) -#define S_RX_PRE_PROC_PERR 9 -#define M_RX_PRE_PROC_PERR 0x7ffU -#define V_RX_PRE_PROC_PERR(x) ((x) << S_RX_PRE_PROC_PERR) -#define G_RX_PRE_PROC_PERR(x) (((x) >> S_RX_PRE_PROC_PERR) & M_RX_PRE_PROC_PERR) +#define S_MAC_RX_PPROC_MPS2TP_TF 19 +#define V_MAC_RX_PPROC_MPS2TP_TF(x) ((x) << S_MAC_RX_PPROC_MPS2TP_TF) +#define F_MAC_RX_PPROC_MPS2TP_TF V_MAC_RX_PPROC_MPS2TP_TF(1U) + +#define S_MAC_RX_PPROC_LB_CH3 18 +#define V_MAC_RX_PPROC_LB_CH3(x) ((x) << S_MAC_RX_PPROC_LB_CH3) +#define F_MAC_RX_PPROC_LB_CH3 V_MAC_RX_PPROC_LB_CH3(1U) + +#define S_MAC_RX_PPROC_LB_CH2 17 +#define V_MAC_RX_PPROC_LB_CH2(x) ((x) << S_MAC_RX_PPROC_LB_CH2) +#define F_MAC_RX_PPROC_LB_CH2 V_MAC_RX_PPROC_LB_CH2(1U) + +#define S_MAC_RX_PPROC_LB_CH1 16 +#define V_MAC_RX_PPROC_LB_CH1(x) ((x) << S_MAC_RX_PPROC_LB_CH1) +#define F_MAC_RX_PPROC_LB_CH1 V_MAC_RX_PPROC_LB_CH1(1U) + +#define S_MAC_RX_PPROC_LB_CH0 15 +#define V_MAC_RX_PPROC_LB_CH0(x) ((x) << S_MAC_RX_PPROC_LB_CH0) +#define F_MAC_RX_PPROC_LB_CH0 V_MAC_RX_PPROC_LB_CH0(1U) + +#define S_MAC_RX_PPROC_DWRR_CH0_3 14 +#define V_MAC_RX_PPROC_DWRR_CH0_3(x) ((x) << S_MAC_RX_PPROC_DWRR_CH0_3) +#define F_MAC_RX_PPROC_DWRR_CH0_3 V_MAC_RX_PPROC_DWRR_CH0_3(1U) + +#define S_MAC_RX_FIFO_PERR 13 +#define V_MAC_RX_FIFO_PERR(x) ((x) << S_MAC_RX_FIFO_PERR) +#define F_MAC_RX_FIFO_PERR V_MAC_RX_FIFO_PERR(1U) + +#define S_MAC2MPS_PT3_PERR 12 +#define V_MAC2MPS_PT3_PERR(x) ((x) << S_MAC2MPS_PT3_PERR) +#define F_MAC2MPS_PT3_PERR V_MAC2MPS_PT3_PERR(1U) + +#define S_MAC2MPS_PT2_PERR 11 +#define V_MAC2MPS_PT2_PERR(x) ((x) << S_MAC2MPS_PT2_PERR) +#define F_MAC2MPS_PT2_PERR V_MAC2MPS_PT2_PERR(1U) + +#define S_MAC2MPS_PT1_PERR 10 +#define V_MAC2MPS_PT1_PERR(x) ((x) << S_MAC2MPS_PT1_PERR) +#define F_MAC2MPS_PT1_PERR V_MAC2MPS_PT1_PERR(1U) + +#define S_MAC2MPS_PT0_PERR 9 +#define V_MAC2MPS_PT0_PERR(x) ((x) << S_MAC2MPS_PT0_PERR) +#define F_MAC2MPS_PT0_PERR V_MAC2MPS_PT0_PERR(1U) + +#define S_LPBK_FIFO_PERR 8 +#define V_LPBK_FIFO_PERR(x) ((x) << S_LPBK_FIFO_PERR) +#define F_LPBK_FIFO_PERR V_LPBK_FIFO_PERR(1U) + +#define S_TP2MPS_TF_FIFO_PERR 7 +#define V_TP2MPS_TF_FIFO_PERR(x) ((x) << S_TP2MPS_TF_FIFO_PERR) +#define F_TP2MPS_TF_FIFO_PERR V_TP2MPS_TF_FIFO_PERR(1U) #define A_MPS_RX_PAUSE_GEN_TH_1 0x11090 #define A_MPS_RX_PERR_INT_ENABLE2 0x11090 @@ -78258,6 +78305,26 @@ #define G_RX_CDR_LANE_SEL(x) (((x) >> S_RX_CDR_LANE_SEL) & M_RX_CDR_LANE_SEL) #define A_MAC_DEBUG_PL_IF_1 0x381c4 +#define A_MAC_HSS0_ANALOG_TEST_CTRL 0x381d0 + +#define S_WP_PMT_IN_I 0 +#define M_WP_PMT_IN_I 0xfU +#define V_WP_PMT_IN_I(x) ((x) << S_WP_PMT_IN_I) +#define G_WP_PMT_IN_I(x) (((x) >> S_WP_PMT_IN_I) & M_WP_PMT_IN_I) + +#define A_MAC_HSS1_ANALOG_TEST_CTRL 0x381d4 +#define A_MAC_HSS2_ANALOG_TEST_CTRL 0x381d8 +#define A_MAC_HSS3_ANALOG_TEST_CTRL 0x381dc +#define A_MAC_HSS0_ANALOG_TEST_STATUS 0x381e0 + +#define S_WP_PMT_OUT_O 0 +#define M_WP_PMT_OUT_O 0xfU +#define V_WP_PMT_OUT_O(x) ((x) << S_WP_PMT_OUT_O) +#define G_WP_PMT_OUT_O(x) (((x) >> S_WP_PMT_OUT_O) & M_WP_PMT_OUT_O) + +#define A_MAC_HSS1_ANALOG_TEST_STATUS 0x381e4 +#define A_MAC_HSS2_ANALOG_TEST_STATUS 0x381e8 +#define A_MAC_HSS3_ANALOG_TEST_STATUS 0x381ec #define A_MAC_SIGNAL_DETECT_CTRL 0x381f0 #define S_SIGNAL_DET_LN7 15 @@ -80933,6 +81000,27 @@ #define F_Q1_LOS_0_ASSERT V_Q1_LOS_0_ASSERT(1U) #define A_MAC_IOS_INTR_CAUSE_QUAD1 0x3a09c +#define A_MAC_HSS0_PMD_RECEIVE_SIGNAL_DETECT 0x3a93c + +#define S_PMD_RECEIVE_SIGNAL_DETECT_1N3 4 +#define V_PMD_RECEIVE_SIGNAL_DETECT_1N3(x) ((x) << S_PMD_RECEIVE_SIGNAL_DETECT_1N3) +#define F_PMD_RECEIVE_SIGNAL_DETECT_1N3 V_PMD_RECEIVE_SIGNAL_DETECT_1N3(1U) + +#define S_PMD_RECEIVE_SIGNAL_DETECT_1N2 3 +#define V_PMD_RECEIVE_SIGNAL_DETECT_1N2(x) ((x) << S_PMD_RECEIVE_SIGNAL_DETECT_1N2) +#define F_PMD_RECEIVE_SIGNAL_DETECT_1N2 V_PMD_RECEIVE_SIGNAL_DETECT_1N2(1U) + +#define S_PMD_RECEIVE_SIGNAL_DETECT_LN1 2 +#define V_PMD_RECEIVE_SIGNAL_DETECT_LN1(x) ((x) << S_PMD_RECEIVE_SIGNAL_DETECT_LN1) +#define F_PMD_RECEIVE_SIGNAL_DETECT_LN1 V_PMD_RECEIVE_SIGNAL_DETECT_LN1(1U) + +#define S_PMD_RECEIVE_SIGNAL_DETECT_1N0 1 +#define V_PMD_RECEIVE_SIGNAL_DETECT_1N0(x) ((x) << S_PMD_RECEIVE_SIGNAL_DETECT_1N0) +#define F_PMD_RECEIVE_SIGNAL_DETECT_1N0 V_PMD_RECEIVE_SIGNAL_DETECT_1N0(1U) + +#define A_MAC_HSS1_PMD_RECEIVE_SIGNAL_DETECT 0x3b93c +#define A_MAC_HSS2_PMD_RECEIVE_SIGNAL_DETECT 0x3c93c +#define A_MAC_HSS3_PMD_RECEIVE_SIGNAL_DETECT 0x3d93c #define A_MAC_MTIP_PCS_1G_0_CONTROL 0x3e000 #define S_SPEED_SEL_1 13 |