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path: root/sys/dev/drm2/radeon/radeon_legacy_crtc.c
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Diffstat (limited to 'sys/dev/drm2/radeon/radeon_legacy_crtc.c')
-rw-r--r--sys/dev/drm2/radeon/radeon_legacy_crtc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/sys/dev/drm2/radeon/radeon_legacy_crtc.c b/sys/dev/drm2/radeon/radeon_legacy_crtc.c
index 54f755a6097a..282f2005bdc4 100644
--- a/sys/dev/drm2/radeon/radeon_legacy_crtc.c
+++ b/sys/dev/drm2/radeon/radeon_legacy_crtc.c
@@ -883,7 +883,7 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
(unsigned)((pll_fb_post_div &
RADEON_P2PLL_POST0_DIV_MASK) >> 16));
- DRM_MDELAY(50); /* Let the clock to lock */
+ mdelay(50); /* Let the clock to lock */
WREG32_PLL_P(RADEON_PIXCLKS_CNTL,
RADEON_PIX2CLK_SRC_SEL_P2PLLCLK,
@@ -988,7 +988,7 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
pll_fb_post_div & RADEON_PPLL_FB3_DIV_MASK,
(pll_fb_post_div & RADEON_PPLL_POST3_DIV_MASK) >> 16);
- DRM_MDELAY(50); /* Let the clock to lock */
+ mdelay(50); /* Let the clock to lock */
WREG32_PLL_P(RADEON_VCLK_ECP_CNTL,
RADEON_VCLK_SRC_SEL_PPLLCLK,